1a45c6cb8SMadhusudhan Chikkature /* 2a45c6cb8SMadhusudhan Chikkature * drivers/mmc/host/omap_hsmmc.c 3a45c6cb8SMadhusudhan Chikkature * 4a45c6cb8SMadhusudhan Chikkature * Driver for OMAP2430/3430 MMC controller. 5a45c6cb8SMadhusudhan Chikkature * 6a45c6cb8SMadhusudhan Chikkature * Copyright (C) 2007 Texas Instruments. 7a45c6cb8SMadhusudhan Chikkature * 8a45c6cb8SMadhusudhan Chikkature * Authors: 9a45c6cb8SMadhusudhan Chikkature * Syed Mohammed Khasim <x0khasim@ti.com> 10a45c6cb8SMadhusudhan Chikkature * Madhusudhan <madhu.cr@ti.com> 11a45c6cb8SMadhusudhan Chikkature * Mohit Jalori <mjalori@ti.com> 12a45c6cb8SMadhusudhan Chikkature * 13a45c6cb8SMadhusudhan Chikkature * This file is licensed under the terms of the GNU General Public License 14a45c6cb8SMadhusudhan Chikkature * version 2. This program is licensed "as is" without any warranty of any 15a45c6cb8SMadhusudhan Chikkature * kind, whether express or implied. 16a45c6cb8SMadhusudhan Chikkature */ 17a45c6cb8SMadhusudhan Chikkature 18a45c6cb8SMadhusudhan Chikkature #include <linux/module.h> 19a45c6cb8SMadhusudhan Chikkature #include <linux/init.h> 20a45c6cb8SMadhusudhan Chikkature #include <linux/interrupt.h> 21a45c6cb8SMadhusudhan Chikkature #include <linux/delay.h> 22a45c6cb8SMadhusudhan Chikkature #include <linux/dma-mapping.h> 23a45c6cb8SMadhusudhan Chikkature #include <linux/platform_device.h> 24a45c6cb8SMadhusudhan Chikkature #include <linux/workqueue.h> 25a45c6cb8SMadhusudhan Chikkature #include <linux/timer.h> 26a45c6cb8SMadhusudhan Chikkature #include <linux/clk.h> 27a45c6cb8SMadhusudhan Chikkature #include <linux/mmc/host.h> 28a45c6cb8SMadhusudhan Chikkature #include <linux/io.h> 29a45c6cb8SMadhusudhan Chikkature #include <linux/semaphore.h> 30a45c6cb8SMadhusudhan Chikkature #include <mach/dma.h> 31a45c6cb8SMadhusudhan Chikkature #include <mach/hardware.h> 32a45c6cb8SMadhusudhan Chikkature #include <mach/board.h> 33a45c6cb8SMadhusudhan Chikkature #include <mach/mmc.h> 34a45c6cb8SMadhusudhan Chikkature #include <mach/cpu.h> 35a45c6cb8SMadhusudhan Chikkature 36a45c6cb8SMadhusudhan Chikkature /* OMAP HSMMC Host Controller Registers */ 37a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_SYSCONFIG 0x0010 38a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_CON 0x002C 39a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_BLK 0x0104 40a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_ARG 0x0108 41a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_CMD 0x010C 42a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP10 0x0110 43a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP32 0x0114 44a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP54 0x0118 45a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP76 0x011C 46a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_DATA 0x0120 47a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_HCTL 0x0128 48a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_SYSCTL 0x012C 49a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_STAT 0x0130 50a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_IE 0x0134 51a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_ISE 0x0138 52a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_CAPA 0x0140 53a45c6cb8SMadhusudhan Chikkature 54a45c6cb8SMadhusudhan Chikkature #define VS18 (1 << 26) 55a45c6cb8SMadhusudhan Chikkature #define VS30 (1 << 25) 56a45c6cb8SMadhusudhan Chikkature #define SDVS18 (0x5 << 9) 57a45c6cb8SMadhusudhan Chikkature #define SDVS30 (0x6 << 9) 58eb250826SDavid Brownell #define SDVS33 (0x7 << 9) 591b331e69SKim Kyuwon #define SDVS_MASK 0x00000E00 60a45c6cb8SMadhusudhan Chikkature #define SDVSCLR 0xFFFFF1FF 61a45c6cb8SMadhusudhan Chikkature #define SDVSDET 0x00000400 62a45c6cb8SMadhusudhan Chikkature #define AUTOIDLE 0x1 63a45c6cb8SMadhusudhan Chikkature #define SDBP (1 << 8) 64a45c6cb8SMadhusudhan Chikkature #define DTO 0xe 65a45c6cb8SMadhusudhan Chikkature #define ICE 0x1 66a45c6cb8SMadhusudhan Chikkature #define ICS 0x2 67a45c6cb8SMadhusudhan Chikkature #define CEN (1 << 2) 68a45c6cb8SMadhusudhan Chikkature #define CLKD_MASK 0x0000FFC0 69a45c6cb8SMadhusudhan Chikkature #define CLKD_SHIFT 6 70a45c6cb8SMadhusudhan Chikkature #define DTO_MASK 0x000F0000 71a45c6cb8SMadhusudhan Chikkature #define DTO_SHIFT 16 72a45c6cb8SMadhusudhan Chikkature #define INT_EN_MASK 0x307F0033 73a45c6cb8SMadhusudhan Chikkature #define INIT_STREAM (1 << 1) 74a45c6cb8SMadhusudhan Chikkature #define DP_SELECT (1 << 21) 75a45c6cb8SMadhusudhan Chikkature #define DDIR (1 << 4) 76a45c6cb8SMadhusudhan Chikkature #define DMA_EN 0x1 77a45c6cb8SMadhusudhan Chikkature #define MSBS (1 << 5) 78a45c6cb8SMadhusudhan Chikkature #define BCE (1 << 1) 79a45c6cb8SMadhusudhan Chikkature #define FOUR_BIT (1 << 1) 8073153010SJarkko Lavinen #define DW8 (1 << 5) 81a45c6cb8SMadhusudhan Chikkature #define CC 0x1 82a45c6cb8SMadhusudhan Chikkature #define TC 0x02 83a45c6cb8SMadhusudhan Chikkature #define OD 0x1 84a45c6cb8SMadhusudhan Chikkature #define ERR (1 << 15) 85a45c6cb8SMadhusudhan Chikkature #define CMD_TIMEOUT (1 << 16) 86a45c6cb8SMadhusudhan Chikkature #define DATA_TIMEOUT (1 << 20) 87a45c6cb8SMadhusudhan Chikkature #define CMD_CRC (1 << 17) 88a45c6cb8SMadhusudhan Chikkature #define DATA_CRC (1 << 21) 89a45c6cb8SMadhusudhan Chikkature #define CARD_ERR (1 << 28) 90a45c6cb8SMadhusudhan Chikkature #define STAT_CLEAR 0xFFFFFFFF 91a45c6cb8SMadhusudhan Chikkature #define INIT_STREAM_CMD 0x00000000 92a45c6cb8SMadhusudhan Chikkature #define DUAL_VOLT_OCR_BIT 7 93a45c6cb8SMadhusudhan Chikkature #define SRC (1 << 25) 94a45c6cb8SMadhusudhan Chikkature #define SRD (1 << 26) 95a45c6cb8SMadhusudhan Chikkature 96a45c6cb8SMadhusudhan Chikkature /* 97a45c6cb8SMadhusudhan Chikkature * FIXME: Most likely all the data using these _DEVID defines should come 98a45c6cb8SMadhusudhan Chikkature * from the platform_data, or implemented in controller and slot specific 99a45c6cb8SMadhusudhan Chikkature * functions. 100a45c6cb8SMadhusudhan Chikkature */ 101a45c6cb8SMadhusudhan Chikkature #define OMAP_MMC1_DEVID 0 102a45c6cb8SMadhusudhan Chikkature #define OMAP_MMC2_DEVID 1 103f3e2f1ddSGrazvydas Ignotas #define OMAP_MMC3_DEVID 2 104a45c6cb8SMadhusudhan Chikkature 105a45c6cb8SMadhusudhan Chikkature #define MMC_TIMEOUT_MS 20 106a45c6cb8SMadhusudhan Chikkature #define OMAP_MMC_MASTER_CLOCK 96000000 107a45c6cb8SMadhusudhan Chikkature #define DRIVER_NAME "mmci-omap-hs" 108a45c6cb8SMadhusudhan Chikkature 109a45c6cb8SMadhusudhan Chikkature /* 110a45c6cb8SMadhusudhan Chikkature * One controller can have multiple slots, like on some omap boards using 111a45c6cb8SMadhusudhan Chikkature * omap.c controller driver. Luckily this is not currently done on any known 112a45c6cb8SMadhusudhan Chikkature * omap_hsmmc.c device. 113a45c6cb8SMadhusudhan Chikkature */ 114a45c6cb8SMadhusudhan Chikkature #define mmc_slot(host) (host->pdata->slots[host->slot_id]) 115a45c6cb8SMadhusudhan Chikkature 116a45c6cb8SMadhusudhan Chikkature /* 117a45c6cb8SMadhusudhan Chikkature * MMC Host controller read/write API's 118a45c6cb8SMadhusudhan Chikkature */ 119a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_READ(base, reg) \ 120a45c6cb8SMadhusudhan Chikkature __raw_readl((base) + OMAP_HSMMC_##reg) 121a45c6cb8SMadhusudhan Chikkature 122a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_WRITE(base, reg, val) \ 123a45c6cb8SMadhusudhan Chikkature __raw_writel((val), (base) + OMAP_HSMMC_##reg) 124a45c6cb8SMadhusudhan Chikkature 125a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host { 126a45c6cb8SMadhusudhan Chikkature struct device *dev; 127a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc; 128a45c6cb8SMadhusudhan Chikkature struct mmc_request *mrq; 129a45c6cb8SMadhusudhan Chikkature struct mmc_command *cmd; 130a45c6cb8SMadhusudhan Chikkature struct mmc_data *data; 131a45c6cb8SMadhusudhan Chikkature struct clk *fclk; 132a45c6cb8SMadhusudhan Chikkature struct clk *iclk; 133a45c6cb8SMadhusudhan Chikkature struct clk *dbclk; 134a45c6cb8SMadhusudhan Chikkature struct semaphore sem; 135a45c6cb8SMadhusudhan Chikkature struct work_struct mmc_carddetect_work; 136a45c6cb8SMadhusudhan Chikkature void __iomem *base; 137a45c6cb8SMadhusudhan Chikkature resource_size_t mapbase; 138a45c6cb8SMadhusudhan Chikkature unsigned int id; 139a45c6cb8SMadhusudhan Chikkature unsigned int dma_len; 1400ccd76d4SJuha Yrjola unsigned int dma_sg_idx; 141a45c6cb8SMadhusudhan Chikkature unsigned char bus_mode; 142a45c6cb8SMadhusudhan Chikkature u32 *buffer; 143a45c6cb8SMadhusudhan Chikkature u32 bytesleft; 144a45c6cb8SMadhusudhan Chikkature int suspended; 145a45c6cb8SMadhusudhan Chikkature int irq; 146a45c6cb8SMadhusudhan Chikkature int carddetect; 147a45c6cb8SMadhusudhan Chikkature int use_dma, dma_ch; 148f3e2f1ddSGrazvydas Ignotas int dma_line_tx, dma_line_rx; 149a45c6cb8SMadhusudhan Chikkature int slot_id; 150a45c6cb8SMadhusudhan Chikkature int dbclk_enabled; 1514a694dc9SAdrian Hunter int response_busy; 152a45c6cb8SMadhusudhan Chikkature struct omap_mmc_platform_data *pdata; 153a45c6cb8SMadhusudhan Chikkature }; 154a45c6cb8SMadhusudhan Chikkature 155a45c6cb8SMadhusudhan Chikkature /* 156a45c6cb8SMadhusudhan Chikkature * Stop clock to the card 157a45c6cb8SMadhusudhan Chikkature */ 158a45c6cb8SMadhusudhan Chikkature static void omap_mmc_stop_clock(struct mmc_omap_host *host) 159a45c6cb8SMadhusudhan Chikkature { 160a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, 161a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, SYSCTL) & ~CEN); 162a45c6cb8SMadhusudhan Chikkature if ((OMAP_HSMMC_READ(host->base, SYSCTL) & CEN) != 0x0) 163a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "MMC Clock is not stoped\n"); 164a45c6cb8SMadhusudhan Chikkature } 165a45c6cb8SMadhusudhan Chikkature 166a45c6cb8SMadhusudhan Chikkature /* 167a45c6cb8SMadhusudhan Chikkature * Send init stream sequence to card 168a45c6cb8SMadhusudhan Chikkature * before sending IDLE command 169a45c6cb8SMadhusudhan Chikkature */ 170a45c6cb8SMadhusudhan Chikkature static void send_init_stream(struct mmc_omap_host *host) 171a45c6cb8SMadhusudhan Chikkature { 172a45c6cb8SMadhusudhan Chikkature int reg = 0; 173a45c6cb8SMadhusudhan Chikkature unsigned long timeout; 174a45c6cb8SMadhusudhan Chikkature 175a45c6cb8SMadhusudhan Chikkature disable_irq(host->irq); 176a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CON, 177a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, CON) | INIT_STREAM); 178a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CMD, INIT_STREAM_CMD); 179a45c6cb8SMadhusudhan Chikkature 180a45c6cb8SMadhusudhan Chikkature timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 181a45c6cb8SMadhusudhan Chikkature while ((reg != CC) && time_before(jiffies, timeout)) 182a45c6cb8SMadhusudhan Chikkature reg = OMAP_HSMMC_READ(host->base, STAT) & CC; 183a45c6cb8SMadhusudhan Chikkature 184a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CON, 185a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, CON) & ~INIT_STREAM); 186a45c6cb8SMadhusudhan Chikkature enable_irq(host->irq); 187a45c6cb8SMadhusudhan Chikkature } 188a45c6cb8SMadhusudhan Chikkature 189a45c6cb8SMadhusudhan Chikkature static inline 190a45c6cb8SMadhusudhan Chikkature int mmc_omap_cover_is_closed(struct mmc_omap_host *host) 191a45c6cb8SMadhusudhan Chikkature { 192a45c6cb8SMadhusudhan Chikkature int r = 1; 193a45c6cb8SMadhusudhan Chikkature 194a45c6cb8SMadhusudhan Chikkature if (host->pdata->slots[host->slot_id].get_cover_state) 195a45c6cb8SMadhusudhan Chikkature r = host->pdata->slots[host->slot_id].get_cover_state(host->dev, 196a45c6cb8SMadhusudhan Chikkature host->slot_id); 197a45c6cb8SMadhusudhan Chikkature return r; 198a45c6cb8SMadhusudhan Chikkature } 199a45c6cb8SMadhusudhan Chikkature 200a45c6cb8SMadhusudhan Chikkature static ssize_t 201a45c6cb8SMadhusudhan Chikkature mmc_omap_show_cover_switch(struct device *dev, struct device_attribute *attr, 202a45c6cb8SMadhusudhan Chikkature char *buf) 203a45c6cb8SMadhusudhan Chikkature { 204a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev); 205a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = mmc_priv(mmc); 206a45c6cb8SMadhusudhan Chikkature 207a45c6cb8SMadhusudhan Chikkature return sprintf(buf, "%s\n", mmc_omap_cover_is_closed(host) ? "closed" : 208a45c6cb8SMadhusudhan Chikkature "open"); 209a45c6cb8SMadhusudhan Chikkature } 210a45c6cb8SMadhusudhan Chikkature 211a45c6cb8SMadhusudhan Chikkature static DEVICE_ATTR(cover_switch, S_IRUGO, mmc_omap_show_cover_switch, NULL); 212a45c6cb8SMadhusudhan Chikkature 213a45c6cb8SMadhusudhan Chikkature static ssize_t 214a45c6cb8SMadhusudhan Chikkature mmc_omap_show_slot_name(struct device *dev, struct device_attribute *attr, 215a45c6cb8SMadhusudhan Chikkature char *buf) 216a45c6cb8SMadhusudhan Chikkature { 217a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev); 218a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = mmc_priv(mmc); 219a45c6cb8SMadhusudhan Chikkature struct omap_mmc_slot_data slot = host->pdata->slots[host->slot_id]; 220a45c6cb8SMadhusudhan Chikkature 221e68fdabcSAdrian Hunter return sprintf(buf, "%s\n", slot.name); 222a45c6cb8SMadhusudhan Chikkature } 223a45c6cb8SMadhusudhan Chikkature 224a45c6cb8SMadhusudhan Chikkature static DEVICE_ATTR(slot_name, S_IRUGO, mmc_omap_show_slot_name, NULL); 225a45c6cb8SMadhusudhan Chikkature 226a45c6cb8SMadhusudhan Chikkature /* 227a45c6cb8SMadhusudhan Chikkature * Configure the response type and send the cmd. 228a45c6cb8SMadhusudhan Chikkature */ 229a45c6cb8SMadhusudhan Chikkature static void 230a45c6cb8SMadhusudhan Chikkature mmc_omap_start_command(struct mmc_omap_host *host, struct mmc_command *cmd, 231a45c6cb8SMadhusudhan Chikkature struct mmc_data *data) 232a45c6cb8SMadhusudhan Chikkature { 233a45c6cb8SMadhusudhan Chikkature int cmdreg = 0, resptype = 0, cmdtype = 0; 234a45c6cb8SMadhusudhan Chikkature 235a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "%s: CMD%d, argument 0x%08x\n", 236a45c6cb8SMadhusudhan Chikkature mmc_hostname(host->mmc), cmd->opcode, cmd->arg); 237a45c6cb8SMadhusudhan Chikkature host->cmd = cmd; 238a45c6cb8SMadhusudhan Chikkature 239a45c6cb8SMadhusudhan Chikkature /* 240a45c6cb8SMadhusudhan Chikkature * Clear status bits and enable interrupts 241a45c6cb8SMadhusudhan Chikkature */ 242a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); 243a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK); 244a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK); 245a45c6cb8SMadhusudhan Chikkature 2464a694dc9SAdrian Hunter host->response_busy = 0; 247a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_PRESENT) { 248a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_136) 249a45c6cb8SMadhusudhan Chikkature resptype = 1; 2504a694dc9SAdrian Hunter else if (cmd->flags & MMC_RSP_BUSY) { 2514a694dc9SAdrian Hunter resptype = 3; 2524a694dc9SAdrian Hunter host->response_busy = 1; 2534a694dc9SAdrian Hunter } else 254a45c6cb8SMadhusudhan Chikkature resptype = 2; 255a45c6cb8SMadhusudhan Chikkature } 256a45c6cb8SMadhusudhan Chikkature 257a45c6cb8SMadhusudhan Chikkature /* 258a45c6cb8SMadhusudhan Chikkature * Unlike OMAP1 controller, the cmdtype does not seem to be based on 259a45c6cb8SMadhusudhan Chikkature * ac, bc, adtc, bcr. Only commands ending an open ended transfer need 260a45c6cb8SMadhusudhan Chikkature * a val of 0x3, rest 0x0. 261a45c6cb8SMadhusudhan Chikkature */ 262a45c6cb8SMadhusudhan Chikkature if (cmd == host->mrq->stop) 263a45c6cb8SMadhusudhan Chikkature cmdtype = 0x3; 264a45c6cb8SMadhusudhan Chikkature 265a45c6cb8SMadhusudhan Chikkature cmdreg = (cmd->opcode << 24) | (resptype << 16) | (cmdtype << 22); 266a45c6cb8SMadhusudhan Chikkature 267a45c6cb8SMadhusudhan Chikkature if (data) { 268a45c6cb8SMadhusudhan Chikkature cmdreg |= DP_SELECT | MSBS | BCE; 269a45c6cb8SMadhusudhan Chikkature if (data->flags & MMC_DATA_READ) 270a45c6cb8SMadhusudhan Chikkature cmdreg |= DDIR; 271a45c6cb8SMadhusudhan Chikkature else 272a45c6cb8SMadhusudhan Chikkature cmdreg &= ~(DDIR); 273a45c6cb8SMadhusudhan Chikkature } 274a45c6cb8SMadhusudhan Chikkature 275a45c6cb8SMadhusudhan Chikkature if (host->use_dma) 276a45c6cb8SMadhusudhan Chikkature cmdreg |= DMA_EN; 277a45c6cb8SMadhusudhan Chikkature 278a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, ARG, cmd->arg); 279a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CMD, cmdreg); 280a45c6cb8SMadhusudhan Chikkature } 281a45c6cb8SMadhusudhan Chikkature 2820ccd76d4SJuha Yrjola static int 2830ccd76d4SJuha Yrjola mmc_omap_get_dma_dir(struct mmc_omap_host *host, struct mmc_data *data) 2840ccd76d4SJuha Yrjola { 2850ccd76d4SJuha Yrjola if (data->flags & MMC_DATA_WRITE) 2860ccd76d4SJuha Yrjola return DMA_TO_DEVICE; 2870ccd76d4SJuha Yrjola else 2880ccd76d4SJuha Yrjola return DMA_FROM_DEVICE; 2890ccd76d4SJuha Yrjola } 2900ccd76d4SJuha Yrjola 291a45c6cb8SMadhusudhan Chikkature /* 292a45c6cb8SMadhusudhan Chikkature * Notify the transfer complete to MMC core 293a45c6cb8SMadhusudhan Chikkature */ 294a45c6cb8SMadhusudhan Chikkature static void 295a45c6cb8SMadhusudhan Chikkature mmc_omap_xfer_done(struct mmc_omap_host *host, struct mmc_data *data) 296a45c6cb8SMadhusudhan Chikkature { 2974a694dc9SAdrian Hunter if (!data) { 2984a694dc9SAdrian Hunter struct mmc_request *mrq = host->mrq; 2994a694dc9SAdrian Hunter 3004a694dc9SAdrian Hunter host->mrq = NULL; 3014a694dc9SAdrian Hunter mmc_omap_fclk_lazy_disable(host); 3024a694dc9SAdrian Hunter mmc_request_done(host->mmc, mrq); 3034a694dc9SAdrian Hunter return; 3044a694dc9SAdrian Hunter } 3054a694dc9SAdrian Hunter 306a45c6cb8SMadhusudhan Chikkature host->data = NULL; 307a45c6cb8SMadhusudhan Chikkature 308a45c6cb8SMadhusudhan Chikkature if (host->use_dma && host->dma_ch != -1) 309a45c6cb8SMadhusudhan Chikkature dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->dma_len, 3100ccd76d4SJuha Yrjola mmc_omap_get_dma_dir(host, data)); 311a45c6cb8SMadhusudhan Chikkature 312a45c6cb8SMadhusudhan Chikkature if (!data->error) 313a45c6cb8SMadhusudhan Chikkature data->bytes_xfered += data->blocks * (data->blksz); 314a45c6cb8SMadhusudhan Chikkature else 315a45c6cb8SMadhusudhan Chikkature data->bytes_xfered = 0; 316a45c6cb8SMadhusudhan Chikkature 317a45c6cb8SMadhusudhan Chikkature if (!data->stop) { 318a45c6cb8SMadhusudhan Chikkature host->mrq = NULL; 319a45c6cb8SMadhusudhan Chikkature mmc_request_done(host->mmc, data->mrq); 320a45c6cb8SMadhusudhan Chikkature return; 321a45c6cb8SMadhusudhan Chikkature } 322a45c6cb8SMadhusudhan Chikkature mmc_omap_start_command(host, data->stop, NULL); 323a45c6cb8SMadhusudhan Chikkature } 324a45c6cb8SMadhusudhan Chikkature 325a45c6cb8SMadhusudhan Chikkature /* 326a45c6cb8SMadhusudhan Chikkature * Notify the core about command completion 327a45c6cb8SMadhusudhan Chikkature */ 328a45c6cb8SMadhusudhan Chikkature static void 329a45c6cb8SMadhusudhan Chikkature mmc_omap_cmd_done(struct mmc_omap_host *host, struct mmc_command *cmd) 330a45c6cb8SMadhusudhan Chikkature { 331a45c6cb8SMadhusudhan Chikkature host->cmd = NULL; 332a45c6cb8SMadhusudhan Chikkature 333a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_PRESENT) { 334a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_136) { 335a45c6cb8SMadhusudhan Chikkature /* response type 2 */ 336a45c6cb8SMadhusudhan Chikkature cmd->resp[3] = OMAP_HSMMC_READ(host->base, RSP10); 337a45c6cb8SMadhusudhan Chikkature cmd->resp[2] = OMAP_HSMMC_READ(host->base, RSP32); 338a45c6cb8SMadhusudhan Chikkature cmd->resp[1] = OMAP_HSMMC_READ(host->base, RSP54); 339a45c6cb8SMadhusudhan Chikkature cmd->resp[0] = OMAP_HSMMC_READ(host->base, RSP76); 340a45c6cb8SMadhusudhan Chikkature } else { 341a45c6cb8SMadhusudhan Chikkature /* response types 1, 1b, 3, 4, 5, 6 */ 342a45c6cb8SMadhusudhan Chikkature cmd->resp[0] = OMAP_HSMMC_READ(host->base, RSP10); 343a45c6cb8SMadhusudhan Chikkature } 344a45c6cb8SMadhusudhan Chikkature } 3454a694dc9SAdrian Hunter if ((host->data == NULL && !host->response_busy) || cmd->error) { 346a45c6cb8SMadhusudhan Chikkature host->mrq = NULL; 347a45c6cb8SMadhusudhan Chikkature mmc_request_done(host->mmc, cmd->mrq); 348a45c6cb8SMadhusudhan Chikkature } 349a45c6cb8SMadhusudhan Chikkature } 350a45c6cb8SMadhusudhan Chikkature 351a45c6cb8SMadhusudhan Chikkature /* 352a45c6cb8SMadhusudhan Chikkature * DMA clean up for command errors 353a45c6cb8SMadhusudhan Chikkature */ 35482788ff5SJarkko Lavinen static void mmc_dma_cleanup(struct mmc_omap_host *host, int errno) 355a45c6cb8SMadhusudhan Chikkature { 35682788ff5SJarkko Lavinen host->data->error = errno; 357a45c6cb8SMadhusudhan Chikkature 358a45c6cb8SMadhusudhan Chikkature if (host->use_dma && host->dma_ch != -1) { 359a45c6cb8SMadhusudhan Chikkature dma_unmap_sg(mmc_dev(host->mmc), host->data->sg, host->dma_len, 3600ccd76d4SJuha Yrjola mmc_omap_get_dma_dir(host, host->data)); 361a45c6cb8SMadhusudhan Chikkature omap_free_dma(host->dma_ch); 362a45c6cb8SMadhusudhan Chikkature host->dma_ch = -1; 363a45c6cb8SMadhusudhan Chikkature up(&host->sem); 364a45c6cb8SMadhusudhan Chikkature } 365a45c6cb8SMadhusudhan Chikkature host->data = NULL; 366a45c6cb8SMadhusudhan Chikkature } 367a45c6cb8SMadhusudhan Chikkature 368a45c6cb8SMadhusudhan Chikkature /* 369a45c6cb8SMadhusudhan Chikkature * Readable error output 370a45c6cb8SMadhusudhan Chikkature */ 371a45c6cb8SMadhusudhan Chikkature #ifdef CONFIG_MMC_DEBUG 372a45c6cb8SMadhusudhan Chikkature static void mmc_omap_report_irq(struct mmc_omap_host *host, u32 status) 373a45c6cb8SMadhusudhan Chikkature { 374a45c6cb8SMadhusudhan Chikkature /* --- means reserved bit without definition at documentation */ 375a45c6cb8SMadhusudhan Chikkature static const char *mmc_omap_status_bits[] = { 376a45c6cb8SMadhusudhan Chikkature "CC", "TC", "BGE", "---", "BWR", "BRR", "---", "---", "CIRQ", 377a45c6cb8SMadhusudhan Chikkature "OBI", "---", "---", "---", "---", "---", "ERRI", "CTO", "CCRC", 378a45c6cb8SMadhusudhan Chikkature "CEB", "CIE", "DTO", "DCRC", "DEB", "---", "ACE", "---", 379a45c6cb8SMadhusudhan Chikkature "---", "---", "---", "CERR", "CERR", "BADA", "---", "---", "---" 380a45c6cb8SMadhusudhan Chikkature }; 381a45c6cb8SMadhusudhan Chikkature char res[256]; 382a45c6cb8SMadhusudhan Chikkature char *buf = res; 383a45c6cb8SMadhusudhan Chikkature int len, i; 384a45c6cb8SMadhusudhan Chikkature 385a45c6cb8SMadhusudhan Chikkature len = sprintf(buf, "MMC IRQ 0x%x :", status); 386a45c6cb8SMadhusudhan Chikkature buf += len; 387a45c6cb8SMadhusudhan Chikkature 388a45c6cb8SMadhusudhan Chikkature for (i = 0; i < ARRAY_SIZE(mmc_omap_status_bits); i++) 389a45c6cb8SMadhusudhan Chikkature if (status & (1 << i)) { 390a45c6cb8SMadhusudhan Chikkature len = sprintf(buf, " %s", mmc_omap_status_bits[i]); 391a45c6cb8SMadhusudhan Chikkature buf += len; 392a45c6cb8SMadhusudhan Chikkature } 393a45c6cb8SMadhusudhan Chikkature 394a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "%s\n", res); 395a45c6cb8SMadhusudhan Chikkature } 396a45c6cb8SMadhusudhan Chikkature #endif /* CONFIG_MMC_DEBUG */ 397a45c6cb8SMadhusudhan Chikkature 3983ebf74b1SJean Pihet /* 3993ebf74b1SJean Pihet * MMC controller internal state machines reset 4003ebf74b1SJean Pihet * 4013ebf74b1SJean Pihet * Used to reset command or data internal state machines, using respectively 4023ebf74b1SJean Pihet * SRC or SRD bit of SYSCTL register 4033ebf74b1SJean Pihet * Can be called from interrupt context 4043ebf74b1SJean Pihet */ 4053ebf74b1SJean Pihet static inline void mmc_omap_reset_controller_fsm(struct mmc_omap_host *host, 4063ebf74b1SJean Pihet unsigned long bit) 4073ebf74b1SJean Pihet { 4083ebf74b1SJean Pihet unsigned long i = 0; 4093ebf74b1SJean Pihet unsigned long limit = (loops_per_jiffy * 4103ebf74b1SJean Pihet msecs_to_jiffies(MMC_TIMEOUT_MS)); 4113ebf74b1SJean Pihet 4123ebf74b1SJean Pihet OMAP_HSMMC_WRITE(host->base, SYSCTL, 4133ebf74b1SJean Pihet OMAP_HSMMC_READ(host->base, SYSCTL) | bit); 4143ebf74b1SJean Pihet 4153ebf74b1SJean Pihet while ((OMAP_HSMMC_READ(host->base, SYSCTL) & bit) && 4163ebf74b1SJean Pihet (i++ < limit)) 4173ebf74b1SJean Pihet cpu_relax(); 4183ebf74b1SJean Pihet 4193ebf74b1SJean Pihet if (OMAP_HSMMC_READ(host->base, SYSCTL) & bit) 4203ebf74b1SJean Pihet dev_err(mmc_dev(host->mmc), 4213ebf74b1SJean Pihet "Timeout waiting on controller reset in %s\n", 4223ebf74b1SJean Pihet __func__); 4233ebf74b1SJean Pihet } 424a45c6cb8SMadhusudhan Chikkature 425a45c6cb8SMadhusudhan Chikkature /* 426a45c6cb8SMadhusudhan Chikkature * MMC controller IRQ handler 427a45c6cb8SMadhusudhan Chikkature */ 428a45c6cb8SMadhusudhan Chikkature static irqreturn_t mmc_omap_irq(int irq, void *dev_id) 429a45c6cb8SMadhusudhan Chikkature { 430a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = dev_id; 431a45c6cb8SMadhusudhan Chikkature struct mmc_data *data; 432a45c6cb8SMadhusudhan Chikkature int end_cmd = 0, end_trans = 0, status; 433a45c6cb8SMadhusudhan Chikkature 4344a694dc9SAdrian Hunter if (host->mrq == NULL) { 435a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, STAT, 436a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, STAT)); 437a45c6cb8SMadhusudhan Chikkature return IRQ_HANDLED; 438a45c6cb8SMadhusudhan Chikkature } 439a45c6cb8SMadhusudhan Chikkature 440a45c6cb8SMadhusudhan Chikkature data = host->data; 441a45c6cb8SMadhusudhan Chikkature status = OMAP_HSMMC_READ(host->base, STAT); 442a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "IRQ Status is %x\n", status); 443a45c6cb8SMadhusudhan Chikkature 444a45c6cb8SMadhusudhan Chikkature if (status & ERR) { 445a45c6cb8SMadhusudhan Chikkature #ifdef CONFIG_MMC_DEBUG 446a45c6cb8SMadhusudhan Chikkature mmc_omap_report_irq(host, status); 447a45c6cb8SMadhusudhan Chikkature #endif 448a45c6cb8SMadhusudhan Chikkature if ((status & CMD_TIMEOUT) || 449a45c6cb8SMadhusudhan Chikkature (status & CMD_CRC)) { 450a45c6cb8SMadhusudhan Chikkature if (host->cmd) { 451a45c6cb8SMadhusudhan Chikkature if (status & CMD_TIMEOUT) { 4523ebf74b1SJean Pihet mmc_omap_reset_controller_fsm(host, SRC); 453a45c6cb8SMadhusudhan Chikkature host->cmd->error = -ETIMEDOUT; 454a45c6cb8SMadhusudhan Chikkature } else { 455a45c6cb8SMadhusudhan Chikkature host->cmd->error = -EILSEQ; 456a45c6cb8SMadhusudhan Chikkature } 457a45c6cb8SMadhusudhan Chikkature end_cmd = 1; 458a45c6cb8SMadhusudhan Chikkature } 4594a694dc9SAdrian Hunter if (host->data || host->response_busy) { 4604a694dc9SAdrian Hunter if (host->data) 46182788ff5SJarkko Lavinen mmc_dma_cleanup(host, -ETIMEDOUT); 4624a694dc9SAdrian Hunter host->response_busy = 0; 4633ebf74b1SJean Pihet mmc_omap_reset_controller_fsm(host, SRD); 464c232f457SJean Pihet } 465a45c6cb8SMadhusudhan Chikkature } 466a45c6cb8SMadhusudhan Chikkature if ((status & DATA_TIMEOUT) || 467a45c6cb8SMadhusudhan Chikkature (status & DATA_CRC)) { 4684a694dc9SAdrian Hunter if (host->data || host->response_busy) { 4694a694dc9SAdrian Hunter int err = (status & DATA_TIMEOUT) ? 4704a694dc9SAdrian Hunter -ETIMEDOUT : -EILSEQ; 4714a694dc9SAdrian Hunter 4724a694dc9SAdrian Hunter if (host->data) 4734a694dc9SAdrian Hunter mmc_dma_cleanup(host, err); 474a45c6cb8SMadhusudhan Chikkature else 4754a694dc9SAdrian Hunter host->mrq->cmd->error = err; 4764a694dc9SAdrian Hunter host->response_busy = 0; 4773ebf74b1SJean Pihet mmc_omap_reset_controller_fsm(host, SRD); 478a45c6cb8SMadhusudhan Chikkature end_trans = 1; 479a45c6cb8SMadhusudhan Chikkature } 480a45c6cb8SMadhusudhan Chikkature } 481a45c6cb8SMadhusudhan Chikkature if (status & CARD_ERR) { 482a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 483a45c6cb8SMadhusudhan Chikkature "Ignoring card err CMD%d\n", host->cmd->opcode); 484a45c6cb8SMadhusudhan Chikkature if (host->cmd) 485a45c6cb8SMadhusudhan Chikkature end_cmd = 1; 486a45c6cb8SMadhusudhan Chikkature if (host->data) 487a45c6cb8SMadhusudhan Chikkature end_trans = 1; 488a45c6cb8SMadhusudhan Chikkature } 489a45c6cb8SMadhusudhan Chikkature } 490a45c6cb8SMadhusudhan Chikkature 491a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, STAT, status); 492a45c6cb8SMadhusudhan Chikkature 493a45c6cb8SMadhusudhan Chikkature if (end_cmd || (status & CC)) 494a45c6cb8SMadhusudhan Chikkature mmc_omap_cmd_done(host, host->cmd); 495a45c6cb8SMadhusudhan Chikkature if (end_trans || (status & TC)) 496a45c6cb8SMadhusudhan Chikkature mmc_omap_xfer_done(host, data); 497a45c6cb8SMadhusudhan Chikkature 498a45c6cb8SMadhusudhan Chikkature return IRQ_HANDLED; 499a45c6cb8SMadhusudhan Chikkature } 500a45c6cb8SMadhusudhan Chikkature 501e13bb300SAdrian Hunter static void set_sd_bus_power(struct mmc_omap_host *host) 502e13bb300SAdrian Hunter { 503e13bb300SAdrian Hunter unsigned long i; 504e13bb300SAdrian Hunter 505e13bb300SAdrian Hunter OMAP_HSMMC_WRITE(host->base, HCTL, 506e13bb300SAdrian Hunter OMAP_HSMMC_READ(host->base, HCTL) | SDBP); 507e13bb300SAdrian Hunter for (i = 0; i < loops_per_jiffy; i++) { 508e13bb300SAdrian Hunter if (OMAP_HSMMC_READ(host->base, HCTL) & SDBP) 509e13bb300SAdrian Hunter break; 510e13bb300SAdrian Hunter cpu_relax(); 511e13bb300SAdrian Hunter } 512e13bb300SAdrian Hunter } 513e13bb300SAdrian Hunter 514a45c6cb8SMadhusudhan Chikkature /* 515eb250826SDavid Brownell * Switch MMC interface voltage ... only relevant for MMC1. 516eb250826SDavid Brownell * 517eb250826SDavid Brownell * MMC2 and MMC3 use fixed 1.8V levels, and maybe a transceiver. 518eb250826SDavid Brownell * The MMC2 transceiver controls are used instead of DAT4..DAT7. 519eb250826SDavid Brownell * Some chips, like eMMC ones, use internal transceivers. 520a45c6cb8SMadhusudhan Chikkature */ 521a45c6cb8SMadhusudhan Chikkature static int omap_mmc_switch_opcond(struct mmc_omap_host *host, int vdd) 522a45c6cb8SMadhusudhan Chikkature { 523a45c6cb8SMadhusudhan Chikkature u32 reg_val = 0; 524a45c6cb8SMadhusudhan Chikkature int ret; 525a45c6cb8SMadhusudhan Chikkature 526a45c6cb8SMadhusudhan Chikkature /* Disable the clocks */ 527a45c6cb8SMadhusudhan Chikkature clk_disable(host->fclk); 528a45c6cb8SMadhusudhan Chikkature clk_disable(host->iclk); 529a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 530a45c6cb8SMadhusudhan Chikkature 531a45c6cb8SMadhusudhan Chikkature /* Turn the power off */ 532a45c6cb8SMadhusudhan Chikkature ret = mmc_slot(host).set_power(host->dev, host->slot_id, 0, 0); 533a45c6cb8SMadhusudhan Chikkature if (ret != 0) 534a45c6cb8SMadhusudhan Chikkature goto err; 535a45c6cb8SMadhusudhan Chikkature 536a45c6cb8SMadhusudhan Chikkature /* Turn the power ON with given VDD 1.8 or 3.0v */ 537a45c6cb8SMadhusudhan Chikkature ret = mmc_slot(host).set_power(host->dev, host->slot_id, 1, vdd); 538a45c6cb8SMadhusudhan Chikkature if (ret != 0) 539a45c6cb8SMadhusudhan Chikkature goto err; 540a45c6cb8SMadhusudhan Chikkature 541a45c6cb8SMadhusudhan Chikkature clk_enable(host->fclk); 542a45c6cb8SMadhusudhan Chikkature clk_enable(host->iclk); 543a45c6cb8SMadhusudhan Chikkature clk_enable(host->dbclk); 544a45c6cb8SMadhusudhan Chikkature 545a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 546a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) & SDVSCLR); 547a45c6cb8SMadhusudhan Chikkature reg_val = OMAP_HSMMC_READ(host->base, HCTL); 548eb250826SDavid Brownell 549a45c6cb8SMadhusudhan Chikkature /* 550a45c6cb8SMadhusudhan Chikkature * If a MMC dual voltage card is detected, the set_ios fn calls 551a45c6cb8SMadhusudhan Chikkature * this fn with VDD bit set for 1.8V. Upon card removal from the 552a45c6cb8SMadhusudhan Chikkature * slot, omap_mmc_set_ios sets the VDD back to 3V on MMC_POWER_OFF. 553a45c6cb8SMadhusudhan Chikkature * 554eb250826SDavid Brownell * Cope with a bit of slop in the range ... per data sheets: 555eb250826SDavid Brownell * - "1.8V" for vdds_mmc1/vdds_mmc1a can be up to 2.45V max, 556eb250826SDavid Brownell * but recommended values are 1.71V to 1.89V 557eb250826SDavid Brownell * - "3.0V" for vdds_mmc1/vdds_mmc1a can be up to 3.5V max, 558eb250826SDavid Brownell * but recommended values are 2.7V to 3.3V 559eb250826SDavid Brownell * 560eb250826SDavid Brownell * Board setup code shouldn't permit anything very out-of-range. 561eb250826SDavid Brownell * TWL4030-family VMMC1 and VSIM regulators are fine (avoiding the 562eb250826SDavid Brownell * middle range) but VSIM can't power DAT4..DAT7 at more than 3V. 563a45c6cb8SMadhusudhan Chikkature */ 564eb250826SDavid Brownell if ((1 << vdd) <= MMC_VDD_23_24) 565a45c6cb8SMadhusudhan Chikkature reg_val |= SDVS18; 566eb250826SDavid Brownell else 567eb250826SDavid Brownell reg_val |= SDVS30; 568a45c6cb8SMadhusudhan Chikkature 569a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, reg_val); 570e13bb300SAdrian Hunter set_sd_bus_power(host); 571a45c6cb8SMadhusudhan Chikkature 572a45c6cb8SMadhusudhan Chikkature return 0; 573a45c6cb8SMadhusudhan Chikkature err: 574a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Unable to switch operating voltage\n"); 575a45c6cb8SMadhusudhan Chikkature return ret; 576a45c6cb8SMadhusudhan Chikkature } 577a45c6cb8SMadhusudhan Chikkature 578a45c6cb8SMadhusudhan Chikkature /* 579a45c6cb8SMadhusudhan Chikkature * Work Item to notify the core about card insertion/removal 580a45c6cb8SMadhusudhan Chikkature */ 581a45c6cb8SMadhusudhan Chikkature static void mmc_omap_detect(struct work_struct *work) 582a45c6cb8SMadhusudhan Chikkature { 583a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = container_of(work, struct mmc_omap_host, 584a45c6cb8SMadhusudhan Chikkature mmc_carddetect_work); 585249d0fa9SDavid Brownell struct omap_mmc_slot_data *slot = &mmc_slot(host); 586249d0fa9SDavid Brownell 587e1a55f5eSAdrian Hunter if (mmc_slot(host).card_detect) 588249d0fa9SDavid Brownell host->carddetect = slot->card_detect(slot->card_detect_irq); 589e1a55f5eSAdrian Hunter else 590e1a55f5eSAdrian Hunter host->carddetect = -ENOSYS; 591a45c6cb8SMadhusudhan Chikkature 592a45c6cb8SMadhusudhan Chikkature sysfs_notify(&host->mmc->class_dev.kobj, NULL, "cover_switch"); 593a45c6cb8SMadhusudhan Chikkature if (host->carddetect) { 594a45c6cb8SMadhusudhan Chikkature mmc_detect_change(host->mmc, (HZ * 200) / 1000); 595a45c6cb8SMadhusudhan Chikkature } else { 5963ebf74b1SJean Pihet mmc_omap_reset_controller_fsm(host, SRD); 597a45c6cb8SMadhusudhan Chikkature mmc_detect_change(host->mmc, (HZ * 50) / 1000); 598a45c6cb8SMadhusudhan Chikkature } 599a45c6cb8SMadhusudhan Chikkature } 600a45c6cb8SMadhusudhan Chikkature 601a45c6cb8SMadhusudhan Chikkature /* 602a45c6cb8SMadhusudhan Chikkature * ISR for handling card insertion and removal 603a45c6cb8SMadhusudhan Chikkature */ 604a45c6cb8SMadhusudhan Chikkature static irqreturn_t omap_mmc_cd_handler(int irq, void *dev_id) 605a45c6cb8SMadhusudhan Chikkature { 606a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = (struct mmc_omap_host *)dev_id; 607a45c6cb8SMadhusudhan Chikkature 608a45c6cb8SMadhusudhan Chikkature schedule_work(&host->mmc_carddetect_work); 609a45c6cb8SMadhusudhan Chikkature 610a45c6cb8SMadhusudhan Chikkature return IRQ_HANDLED; 611a45c6cb8SMadhusudhan Chikkature } 612a45c6cb8SMadhusudhan Chikkature 6130ccd76d4SJuha Yrjola static int mmc_omap_get_dma_sync_dev(struct mmc_omap_host *host, 6140ccd76d4SJuha Yrjola struct mmc_data *data) 6150ccd76d4SJuha Yrjola { 6160ccd76d4SJuha Yrjola int sync_dev; 6170ccd76d4SJuha Yrjola 618f3e2f1ddSGrazvydas Ignotas if (data->flags & MMC_DATA_WRITE) 619f3e2f1ddSGrazvydas Ignotas sync_dev = host->dma_line_tx; 6200ccd76d4SJuha Yrjola else 621f3e2f1ddSGrazvydas Ignotas sync_dev = host->dma_line_rx; 6220ccd76d4SJuha Yrjola return sync_dev; 6230ccd76d4SJuha Yrjola } 6240ccd76d4SJuha Yrjola 6250ccd76d4SJuha Yrjola static void mmc_omap_config_dma_params(struct mmc_omap_host *host, 6260ccd76d4SJuha Yrjola struct mmc_data *data, 6270ccd76d4SJuha Yrjola struct scatterlist *sgl) 6280ccd76d4SJuha Yrjola { 6290ccd76d4SJuha Yrjola int blksz, nblk, dma_ch; 6300ccd76d4SJuha Yrjola 6310ccd76d4SJuha Yrjola dma_ch = host->dma_ch; 6320ccd76d4SJuha Yrjola if (data->flags & MMC_DATA_WRITE) { 6330ccd76d4SJuha Yrjola omap_set_dma_dest_params(dma_ch, 0, OMAP_DMA_AMODE_CONSTANT, 6340ccd76d4SJuha Yrjola (host->mapbase + OMAP_HSMMC_DATA), 0, 0); 6350ccd76d4SJuha Yrjola omap_set_dma_src_params(dma_ch, 0, OMAP_DMA_AMODE_POST_INC, 6360ccd76d4SJuha Yrjola sg_dma_address(sgl), 0, 0); 6370ccd76d4SJuha Yrjola } else { 6380ccd76d4SJuha Yrjola omap_set_dma_src_params(dma_ch, 0, OMAP_DMA_AMODE_CONSTANT, 6390ccd76d4SJuha Yrjola (host->mapbase + OMAP_HSMMC_DATA), 0, 0); 6400ccd76d4SJuha Yrjola omap_set_dma_dest_params(dma_ch, 0, OMAP_DMA_AMODE_POST_INC, 6410ccd76d4SJuha Yrjola sg_dma_address(sgl), 0, 0); 6420ccd76d4SJuha Yrjola } 6430ccd76d4SJuha Yrjola 6440ccd76d4SJuha Yrjola blksz = host->data->blksz; 6450ccd76d4SJuha Yrjola nblk = sg_dma_len(sgl) / blksz; 6460ccd76d4SJuha Yrjola 6470ccd76d4SJuha Yrjola omap_set_dma_transfer_params(dma_ch, OMAP_DMA_DATA_TYPE_S32, 6480ccd76d4SJuha Yrjola blksz / 4, nblk, OMAP_DMA_SYNC_FRAME, 6490ccd76d4SJuha Yrjola mmc_omap_get_dma_sync_dev(host, data), 6500ccd76d4SJuha Yrjola !(data->flags & MMC_DATA_WRITE)); 6510ccd76d4SJuha Yrjola 6520ccd76d4SJuha Yrjola omap_start_dma(dma_ch); 6530ccd76d4SJuha Yrjola } 6540ccd76d4SJuha Yrjola 655a45c6cb8SMadhusudhan Chikkature /* 656a45c6cb8SMadhusudhan Chikkature * DMA call back function 657a45c6cb8SMadhusudhan Chikkature */ 658a45c6cb8SMadhusudhan Chikkature static void mmc_omap_dma_cb(int lch, u16 ch_status, void *data) 659a45c6cb8SMadhusudhan Chikkature { 660a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = data; 661a45c6cb8SMadhusudhan Chikkature 662a45c6cb8SMadhusudhan Chikkature if (ch_status & OMAP2_DMA_MISALIGNED_ERR_IRQ) 663a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "MISALIGNED_ADRS_ERR\n"); 664a45c6cb8SMadhusudhan Chikkature 665a45c6cb8SMadhusudhan Chikkature if (host->dma_ch < 0) 666a45c6cb8SMadhusudhan Chikkature return; 667a45c6cb8SMadhusudhan Chikkature 6680ccd76d4SJuha Yrjola host->dma_sg_idx++; 6690ccd76d4SJuha Yrjola if (host->dma_sg_idx < host->dma_len) { 6700ccd76d4SJuha Yrjola /* Fire up the next transfer. */ 6710ccd76d4SJuha Yrjola mmc_omap_config_dma_params(host, host->data, 6720ccd76d4SJuha Yrjola host->data->sg + host->dma_sg_idx); 6730ccd76d4SJuha Yrjola return; 6740ccd76d4SJuha Yrjola } 6750ccd76d4SJuha Yrjola 676a45c6cb8SMadhusudhan Chikkature omap_free_dma(host->dma_ch); 677a45c6cb8SMadhusudhan Chikkature host->dma_ch = -1; 678a45c6cb8SMadhusudhan Chikkature /* 679a45c6cb8SMadhusudhan Chikkature * DMA Callback: run in interrupt context. 680a45c6cb8SMadhusudhan Chikkature * mutex_unlock will through a kernel warning if used. 681a45c6cb8SMadhusudhan Chikkature */ 682a45c6cb8SMadhusudhan Chikkature up(&host->sem); 683a45c6cb8SMadhusudhan Chikkature } 684a45c6cb8SMadhusudhan Chikkature 685a45c6cb8SMadhusudhan Chikkature /* 686a45c6cb8SMadhusudhan Chikkature * Routine to configure and start DMA for the MMC card 687a45c6cb8SMadhusudhan Chikkature */ 688a45c6cb8SMadhusudhan Chikkature static int 689a45c6cb8SMadhusudhan Chikkature mmc_omap_start_dma_transfer(struct mmc_omap_host *host, struct mmc_request *req) 690a45c6cb8SMadhusudhan Chikkature { 6910ccd76d4SJuha Yrjola int dma_ch = 0, ret = 0, err = 1, i; 692a45c6cb8SMadhusudhan Chikkature struct mmc_data *data = req->data; 693a45c6cb8SMadhusudhan Chikkature 6940ccd76d4SJuha Yrjola /* Sanity check: all the SG entries must be aligned by block size. */ 6950ccd76d4SJuha Yrjola for (i = 0; i < host->dma_len; i++) { 6960ccd76d4SJuha Yrjola struct scatterlist *sgl; 6970ccd76d4SJuha Yrjola 6980ccd76d4SJuha Yrjola sgl = data->sg + i; 6990ccd76d4SJuha Yrjola if (sgl->length % data->blksz) 7000ccd76d4SJuha Yrjola return -EINVAL; 7010ccd76d4SJuha Yrjola } 7020ccd76d4SJuha Yrjola if ((data->blksz % 4) != 0) 7030ccd76d4SJuha Yrjola /* REVISIT: The MMC buffer increments only when MSB is written. 7040ccd76d4SJuha Yrjola * Return error for blksz which is non multiple of four. 7050ccd76d4SJuha Yrjola */ 7060ccd76d4SJuha Yrjola return -EINVAL; 7070ccd76d4SJuha Yrjola 708a45c6cb8SMadhusudhan Chikkature /* 709a45c6cb8SMadhusudhan Chikkature * If for some reason the DMA transfer is still active, 710a45c6cb8SMadhusudhan Chikkature * we wait for timeout period and free the dma 711a45c6cb8SMadhusudhan Chikkature */ 712a45c6cb8SMadhusudhan Chikkature if (host->dma_ch != -1) { 713a45c6cb8SMadhusudhan Chikkature set_current_state(TASK_UNINTERRUPTIBLE); 714a45c6cb8SMadhusudhan Chikkature schedule_timeout(100); 715a45c6cb8SMadhusudhan Chikkature if (down_trylock(&host->sem)) { 716a45c6cb8SMadhusudhan Chikkature omap_free_dma(host->dma_ch); 717a45c6cb8SMadhusudhan Chikkature host->dma_ch = -1; 718a45c6cb8SMadhusudhan Chikkature up(&host->sem); 719a45c6cb8SMadhusudhan Chikkature return err; 720a45c6cb8SMadhusudhan Chikkature } 721a45c6cb8SMadhusudhan Chikkature } else { 722a45c6cb8SMadhusudhan Chikkature if (down_trylock(&host->sem)) 723a45c6cb8SMadhusudhan Chikkature return err; 724a45c6cb8SMadhusudhan Chikkature } 725a45c6cb8SMadhusudhan Chikkature 7260ccd76d4SJuha Yrjola ret = omap_request_dma(mmc_omap_get_dma_sync_dev(host, data), "MMC/SD", 7270ccd76d4SJuha Yrjola mmc_omap_dma_cb,host, &dma_ch); 728a45c6cb8SMadhusudhan Chikkature if (ret != 0) { 7290ccd76d4SJuha Yrjola dev_err(mmc_dev(host->mmc), 730a45c6cb8SMadhusudhan Chikkature "%s: omap_request_dma() failed with %d\n", 731a45c6cb8SMadhusudhan Chikkature mmc_hostname(host->mmc), ret); 732a45c6cb8SMadhusudhan Chikkature return ret; 733a45c6cb8SMadhusudhan Chikkature } 734a45c6cb8SMadhusudhan Chikkature 735a45c6cb8SMadhusudhan Chikkature host->dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg, 7360ccd76d4SJuha Yrjola data->sg_len, mmc_omap_get_dma_dir(host, data)); 737a45c6cb8SMadhusudhan Chikkature host->dma_ch = dma_ch; 7380ccd76d4SJuha Yrjola host->dma_sg_idx = 0; 739a45c6cb8SMadhusudhan Chikkature 7400ccd76d4SJuha Yrjola mmc_omap_config_dma_params(host, data, data->sg); 741a45c6cb8SMadhusudhan Chikkature 742a45c6cb8SMadhusudhan Chikkature return 0; 743a45c6cb8SMadhusudhan Chikkature } 744a45c6cb8SMadhusudhan Chikkature 745a45c6cb8SMadhusudhan Chikkature static void set_data_timeout(struct mmc_omap_host *host, 746a45c6cb8SMadhusudhan Chikkature struct mmc_request *req) 747a45c6cb8SMadhusudhan Chikkature { 748a45c6cb8SMadhusudhan Chikkature unsigned int timeout, cycle_ns; 749a45c6cb8SMadhusudhan Chikkature uint32_t reg, clkd, dto = 0; 750a45c6cb8SMadhusudhan Chikkature 751a45c6cb8SMadhusudhan Chikkature reg = OMAP_HSMMC_READ(host->base, SYSCTL); 752a45c6cb8SMadhusudhan Chikkature clkd = (reg & CLKD_MASK) >> CLKD_SHIFT; 753a45c6cb8SMadhusudhan Chikkature if (clkd == 0) 754a45c6cb8SMadhusudhan Chikkature clkd = 1; 755a45c6cb8SMadhusudhan Chikkature 756a45c6cb8SMadhusudhan Chikkature cycle_ns = 1000000000 / (clk_get_rate(host->fclk) / clkd); 757a45c6cb8SMadhusudhan Chikkature timeout = req->data->timeout_ns / cycle_ns; 758a45c6cb8SMadhusudhan Chikkature timeout += req->data->timeout_clks; 759a45c6cb8SMadhusudhan Chikkature if (timeout) { 760a45c6cb8SMadhusudhan Chikkature while ((timeout & 0x80000000) == 0) { 761a45c6cb8SMadhusudhan Chikkature dto += 1; 762a45c6cb8SMadhusudhan Chikkature timeout <<= 1; 763a45c6cb8SMadhusudhan Chikkature } 764a45c6cb8SMadhusudhan Chikkature dto = 31 - dto; 765a45c6cb8SMadhusudhan Chikkature timeout <<= 1; 766a45c6cb8SMadhusudhan Chikkature if (timeout && dto) 767a45c6cb8SMadhusudhan Chikkature dto += 1; 768a45c6cb8SMadhusudhan Chikkature if (dto >= 13) 769a45c6cb8SMadhusudhan Chikkature dto -= 13; 770a45c6cb8SMadhusudhan Chikkature else 771a45c6cb8SMadhusudhan Chikkature dto = 0; 772a45c6cb8SMadhusudhan Chikkature if (dto > 14) 773a45c6cb8SMadhusudhan Chikkature dto = 14; 774a45c6cb8SMadhusudhan Chikkature } 775a45c6cb8SMadhusudhan Chikkature 776a45c6cb8SMadhusudhan Chikkature reg &= ~DTO_MASK; 777a45c6cb8SMadhusudhan Chikkature reg |= dto << DTO_SHIFT; 778a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, reg); 779a45c6cb8SMadhusudhan Chikkature } 780a45c6cb8SMadhusudhan Chikkature 781a45c6cb8SMadhusudhan Chikkature /* 782a45c6cb8SMadhusudhan Chikkature * Configure block length for MMC/SD cards and initiate the transfer. 783a45c6cb8SMadhusudhan Chikkature */ 784a45c6cb8SMadhusudhan Chikkature static int 785a45c6cb8SMadhusudhan Chikkature mmc_omap_prepare_data(struct mmc_omap_host *host, struct mmc_request *req) 786a45c6cb8SMadhusudhan Chikkature { 787a45c6cb8SMadhusudhan Chikkature int ret; 788a45c6cb8SMadhusudhan Chikkature host->data = req->data; 789a45c6cb8SMadhusudhan Chikkature 790a45c6cb8SMadhusudhan Chikkature if (req->data == NULL) { 791a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, BLK, 0); 792a45c6cb8SMadhusudhan Chikkature return 0; 793a45c6cb8SMadhusudhan Chikkature } 794a45c6cb8SMadhusudhan Chikkature 795a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, BLK, (req->data->blksz) 796a45c6cb8SMadhusudhan Chikkature | (req->data->blocks << 16)); 797a45c6cb8SMadhusudhan Chikkature set_data_timeout(host, req); 798a45c6cb8SMadhusudhan Chikkature 799a45c6cb8SMadhusudhan Chikkature if (host->use_dma) { 800a45c6cb8SMadhusudhan Chikkature ret = mmc_omap_start_dma_transfer(host, req); 801a45c6cb8SMadhusudhan Chikkature if (ret != 0) { 802a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "MMC start dma failure\n"); 803a45c6cb8SMadhusudhan Chikkature return ret; 804a45c6cb8SMadhusudhan Chikkature } 805a45c6cb8SMadhusudhan Chikkature } 806a45c6cb8SMadhusudhan Chikkature return 0; 807a45c6cb8SMadhusudhan Chikkature } 808a45c6cb8SMadhusudhan Chikkature 809a45c6cb8SMadhusudhan Chikkature /* 810a45c6cb8SMadhusudhan Chikkature * Request function. for read/write operation 811a45c6cb8SMadhusudhan Chikkature */ 812a45c6cb8SMadhusudhan Chikkature static void omap_mmc_request(struct mmc_host *mmc, struct mmc_request *req) 813a45c6cb8SMadhusudhan Chikkature { 814a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = mmc_priv(mmc); 815a45c6cb8SMadhusudhan Chikkature 816a45c6cb8SMadhusudhan Chikkature WARN_ON(host->mrq != NULL); 817a45c6cb8SMadhusudhan Chikkature host->mrq = req; 818a45c6cb8SMadhusudhan Chikkature mmc_omap_prepare_data(host, req); 819a45c6cb8SMadhusudhan Chikkature mmc_omap_start_command(host, req->cmd, req->data); 820a45c6cb8SMadhusudhan Chikkature } 821a45c6cb8SMadhusudhan Chikkature 822a45c6cb8SMadhusudhan Chikkature 823a45c6cb8SMadhusudhan Chikkature /* Routine to configure clock values. Exposed API to core */ 824a45c6cb8SMadhusudhan Chikkature static void omap_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 825a45c6cb8SMadhusudhan Chikkature { 826a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = mmc_priv(mmc); 827a45c6cb8SMadhusudhan Chikkature u16 dsor = 0; 828a45c6cb8SMadhusudhan Chikkature unsigned long regval; 829a45c6cb8SMadhusudhan Chikkature unsigned long timeout; 83073153010SJarkko Lavinen u32 con; 831a45c6cb8SMadhusudhan Chikkature 832a45c6cb8SMadhusudhan Chikkature switch (ios->power_mode) { 833a45c6cb8SMadhusudhan Chikkature case MMC_POWER_OFF: 834a45c6cb8SMadhusudhan Chikkature mmc_slot(host).set_power(host->dev, host->slot_id, 0, 0); 835a45c6cb8SMadhusudhan Chikkature break; 836a45c6cb8SMadhusudhan Chikkature case MMC_POWER_UP: 837a45c6cb8SMadhusudhan Chikkature mmc_slot(host).set_power(host->dev, host->slot_id, 1, ios->vdd); 838a45c6cb8SMadhusudhan Chikkature break; 839a45c6cb8SMadhusudhan Chikkature } 840a45c6cb8SMadhusudhan Chikkature 84173153010SJarkko Lavinen con = OMAP_HSMMC_READ(host->base, CON); 842a45c6cb8SMadhusudhan Chikkature switch (mmc->ios.bus_width) { 84373153010SJarkko Lavinen case MMC_BUS_WIDTH_8: 84473153010SJarkko Lavinen OMAP_HSMMC_WRITE(host->base, CON, con | DW8); 84573153010SJarkko Lavinen break; 846a45c6cb8SMadhusudhan Chikkature case MMC_BUS_WIDTH_4: 84773153010SJarkko Lavinen OMAP_HSMMC_WRITE(host->base, CON, con & ~DW8); 848a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 849a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) | FOUR_BIT); 850a45c6cb8SMadhusudhan Chikkature break; 851a45c6cb8SMadhusudhan Chikkature case MMC_BUS_WIDTH_1: 85273153010SJarkko Lavinen OMAP_HSMMC_WRITE(host->base, CON, con & ~DW8); 853a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 854a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) & ~FOUR_BIT); 855a45c6cb8SMadhusudhan Chikkature break; 856a45c6cb8SMadhusudhan Chikkature } 857a45c6cb8SMadhusudhan Chikkature 858a45c6cb8SMadhusudhan Chikkature if (host->id == OMAP_MMC1_DEVID) { 859eb250826SDavid Brownell /* Only MMC1 can interface at 3V without some flavor 860eb250826SDavid Brownell * of external transceiver; but they all handle 1.8V. 861eb250826SDavid Brownell */ 862a45c6cb8SMadhusudhan Chikkature if ((OMAP_HSMMC_READ(host->base, HCTL) & SDVSDET) && 863a45c6cb8SMadhusudhan Chikkature (ios->vdd == DUAL_VOLT_OCR_BIT)) { 864a45c6cb8SMadhusudhan Chikkature /* 865a45c6cb8SMadhusudhan Chikkature * The mmc_select_voltage fn of the core does 866a45c6cb8SMadhusudhan Chikkature * not seem to set the power_mode to 867a45c6cb8SMadhusudhan Chikkature * MMC_POWER_UP upon recalculating the voltage. 868a45c6cb8SMadhusudhan Chikkature * vdd 1.8v. 869a45c6cb8SMadhusudhan Chikkature */ 870a45c6cb8SMadhusudhan Chikkature if (omap_mmc_switch_opcond(host, ios->vdd) != 0) 871a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 872a45c6cb8SMadhusudhan Chikkature "Switch operation failed\n"); 873a45c6cb8SMadhusudhan Chikkature } 874a45c6cb8SMadhusudhan Chikkature } 875a45c6cb8SMadhusudhan Chikkature 876a45c6cb8SMadhusudhan Chikkature if (ios->clock) { 877a45c6cb8SMadhusudhan Chikkature dsor = OMAP_MMC_MASTER_CLOCK / ios->clock; 878a45c6cb8SMadhusudhan Chikkature if (dsor < 1) 879a45c6cb8SMadhusudhan Chikkature dsor = 1; 880a45c6cb8SMadhusudhan Chikkature 881a45c6cb8SMadhusudhan Chikkature if (OMAP_MMC_MASTER_CLOCK / dsor > ios->clock) 882a45c6cb8SMadhusudhan Chikkature dsor++; 883a45c6cb8SMadhusudhan Chikkature 884a45c6cb8SMadhusudhan Chikkature if (dsor > 250) 885a45c6cb8SMadhusudhan Chikkature dsor = 250; 886a45c6cb8SMadhusudhan Chikkature } 887a45c6cb8SMadhusudhan Chikkature omap_mmc_stop_clock(host); 888a45c6cb8SMadhusudhan Chikkature regval = OMAP_HSMMC_READ(host->base, SYSCTL); 889a45c6cb8SMadhusudhan Chikkature regval = regval & ~(CLKD_MASK); 890a45c6cb8SMadhusudhan Chikkature regval = regval | (dsor << 6) | (DTO << 16); 891a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, regval); 892a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, 893a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, SYSCTL) | ICE); 894a45c6cb8SMadhusudhan Chikkature 895a45c6cb8SMadhusudhan Chikkature /* Wait till the ICS bit is set */ 896a45c6cb8SMadhusudhan Chikkature timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 897a45c6cb8SMadhusudhan Chikkature while ((OMAP_HSMMC_READ(host->base, SYSCTL) & ICS) != 0x2 898a45c6cb8SMadhusudhan Chikkature && time_before(jiffies, timeout)) 899a45c6cb8SMadhusudhan Chikkature msleep(1); 900a45c6cb8SMadhusudhan Chikkature 901a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, 902a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, SYSCTL) | CEN); 903a45c6cb8SMadhusudhan Chikkature 904a45c6cb8SMadhusudhan Chikkature if (ios->power_mode == MMC_POWER_ON) 905a45c6cb8SMadhusudhan Chikkature send_init_stream(host); 906a45c6cb8SMadhusudhan Chikkature 907a45c6cb8SMadhusudhan Chikkature if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN) 908a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CON, 909a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, CON) | OD); 910a45c6cb8SMadhusudhan Chikkature } 911a45c6cb8SMadhusudhan Chikkature 912a45c6cb8SMadhusudhan Chikkature static int omap_hsmmc_get_cd(struct mmc_host *mmc) 913a45c6cb8SMadhusudhan Chikkature { 914a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = mmc_priv(mmc); 915a45c6cb8SMadhusudhan Chikkature struct omap_mmc_platform_data *pdata = host->pdata; 916a45c6cb8SMadhusudhan Chikkature 917a45c6cb8SMadhusudhan Chikkature if (!pdata->slots[0].card_detect) 918a45c6cb8SMadhusudhan Chikkature return -ENOSYS; 919a45c6cb8SMadhusudhan Chikkature return pdata->slots[0].card_detect(pdata->slots[0].card_detect_irq); 920a45c6cb8SMadhusudhan Chikkature } 921a45c6cb8SMadhusudhan Chikkature 922a45c6cb8SMadhusudhan Chikkature static int omap_hsmmc_get_ro(struct mmc_host *mmc) 923a45c6cb8SMadhusudhan Chikkature { 924a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = mmc_priv(mmc); 925a45c6cb8SMadhusudhan Chikkature struct omap_mmc_platform_data *pdata = host->pdata; 926a45c6cb8SMadhusudhan Chikkature 927a45c6cb8SMadhusudhan Chikkature if (!pdata->slots[0].get_ro) 928a45c6cb8SMadhusudhan Chikkature return -ENOSYS; 929a45c6cb8SMadhusudhan Chikkature return pdata->slots[0].get_ro(host->dev, 0); 930a45c6cb8SMadhusudhan Chikkature } 931a45c6cb8SMadhusudhan Chikkature 9321b331e69SKim Kyuwon static void omap_hsmmc_init(struct mmc_omap_host *host) 9331b331e69SKim Kyuwon { 9341b331e69SKim Kyuwon u32 hctl, capa, value; 9351b331e69SKim Kyuwon 9361b331e69SKim Kyuwon /* Only MMC1 supports 3.0V */ 9371b331e69SKim Kyuwon if (host->id == OMAP_MMC1_DEVID) { 9381b331e69SKim Kyuwon hctl = SDVS30; 9391b331e69SKim Kyuwon capa = VS30 | VS18; 9401b331e69SKim Kyuwon } else { 9411b331e69SKim Kyuwon hctl = SDVS18; 9421b331e69SKim Kyuwon capa = VS18; 9431b331e69SKim Kyuwon } 9441b331e69SKim Kyuwon 9451b331e69SKim Kyuwon value = OMAP_HSMMC_READ(host->base, HCTL) & ~SDVS_MASK; 9461b331e69SKim Kyuwon OMAP_HSMMC_WRITE(host->base, HCTL, value | hctl); 9471b331e69SKim Kyuwon 9481b331e69SKim Kyuwon value = OMAP_HSMMC_READ(host->base, CAPA); 9491b331e69SKim Kyuwon OMAP_HSMMC_WRITE(host->base, CAPA, value | capa); 9501b331e69SKim Kyuwon 9511b331e69SKim Kyuwon /* Set the controller to AUTO IDLE mode */ 9521b331e69SKim Kyuwon value = OMAP_HSMMC_READ(host->base, SYSCONFIG); 9531b331e69SKim Kyuwon OMAP_HSMMC_WRITE(host->base, SYSCONFIG, value | AUTOIDLE); 9541b331e69SKim Kyuwon 9551b331e69SKim Kyuwon /* Set SD bus power bit */ 956e13bb300SAdrian Hunter set_sd_bus_power(host); 9571b331e69SKim Kyuwon } 9581b331e69SKim Kyuwon 959a45c6cb8SMadhusudhan Chikkature static struct mmc_host_ops mmc_omap_ops = { 960a45c6cb8SMadhusudhan Chikkature .request = omap_mmc_request, 961a45c6cb8SMadhusudhan Chikkature .set_ios = omap_mmc_set_ios, 962a45c6cb8SMadhusudhan Chikkature .get_cd = omap_hsmmc_get_cd, 963a45c6cb8SMadhusudhan Chikkature .get_ro = omap_hsmmc_get_ro, 964a45c6cb8SMadhusudhan Chikkature /* NYET -- enable_sdio_irq */ 965a45c6cb8SMadhusudhan Chikkature }; 966a45c6cb8SMadhusudhan Chikkature 967a45c6cb8SMadhusudhan Chikkature static int __init omap_mmc_probe(struct platform_device *pdev) 968a45c6cb8SMadhusudhan Chikkature { 969a45c6cb8SMadhusudhan Chikkature struct omap_mmc_platform_data *pdata = pdev->dev.platform_data; 970a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc; 971a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = NULL; 972a45c6cb8SMadhusudhan Chikkature struct resource *res; 973a45c6cb8SMadhusudhan Chikkature int ret = 0, irq; 974a45c6cb8SMadhusudhan Chikkature 975a45c6cb8SMadhusudhan Chikkature if (pdata == NULL) { 976a45c6cb8SMadhusudhan Chikkature dev_err(&pdev->dev, "Platform Data is missing\n"); 977a45c6cb8SMadhusudhan Chikkature return -ENXIO; 978a45c6cb8SMadhusudhan Chikkature } 979a45c6cb8SMadhusudhan Chikkature 980a45c6cb8SMadhusudhan Chikkature if (pdata->nr_slots == 0) { 981a45c6cb8SMadhusudhan Chikkature dev_err(&pdev->dev, "No Slots\n"); 982a45c6cb8SMadhusudhan Chikkature return -ENXIO; 983a45c6cb8SMadhusudhan Chikkature } 984a45c6cb8SMadhusudhan Chikkature 985a45c6cb8SMadhusudhan Chikkature res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 986a45c6cb8SMadhusudhan Chikkature irq = platform_get_irq(pdev, 0); 987a45c6cb8SMadhusudhan Chikkature if (res == NULL || irq < 0) 988a45c6cb8SMadhusudhan Chikkature return -ENXIO; 989a45c6cb8SMadhusudhan Chikkature 990a45c6cb8SMadhusudhan Chikkature res = request_mem_region(res->start, res->end - res->start + 1, 991a45c6cb8SMadhusudhan Chikkature pdev->name); 992a45c6cb8SMadhusudhan Chikkature if (res == NULL) 993a45c6cb8SMadhusudhan Chikkature return -EBUSY; 994a45c6cb8SMadhusudhan Chikkature 995a45c6cb8SMadhusudhan Chikkature mmc = mmc_alloc_host(sizeof(struct mmc_omap_host), &pdev->dev); 996a45c6cb8SMadhusudhan Chikkature if (!mmc) { 997a45c6cb8SMadhusudhan Chikkature ret = -ENOMEM; 998a45c6cb8SMadhusudhan Chikkature goto err; 999a45c6cb8SMadhusudhan Chikkature } 1000a45c6cb8SMadhusudhan Chikkature 1001a45c6cb8SMadhusudhan Chikkature host = mmc_priv(mmc); 1002a45c6cb8SMadhusudhan Chikkature host->mmc = mmc; 1003a45c6cb8SMadhusudhan Chikkature host->pdata = pdata; 1004a45c6cb8SMadhusudhan Chikkature host->dev = &pdev->dev; 1005a45c6cb8SMadhusudhan Chikkature host->use_dma = 1; 1006a45c6cb8SMadhusudhan Chikkature host->dev->dma_mask = &pdata->dma_mask; 1007a45c6cb8SMadhusudhan Chikkature host->dma_ch = -1; 1008a45c6cb8SMadhusudhan Chikkature host->irq = irq; 1009a45c6cb8SMadhusudhan Chikkature host->id = pdev->id; 1010a45c6cb8SMadhusudhan Chikkature host->slot_id = 0; 1011a45c6cb8SMadhusudhan Chikkature host->mapbase = res->start; 1012a45c6cb8SMadhusudhan Chikkature host->base = ioremap(host->mapbase, SZ_4K); 1013a45c6cb8SMadhusudhan Chikkature 1014a45c6cb8SMadhusudhan Chikkature platform_set_drvdata(pdev, host); 1015a45c6cb8SMadhusudhan Chikkature INIT_WORK(&host->mmc_carddetect_work, mmc_omap_detect); 1016a45c6cb8SMadhusudhan Chikkature 1017a45c6cb8SMadhusudhan Chikkature mmc->ops = &mmc_omap_ops; 1018a45c6cb8SMadhusudhan Chikkature mmc->f_min = 400000; 1019a45c6cb8SMadhusudhan Chikkature mmc->f_max = 52000000; 1020a45c6cb8SMadhusudhan Chikkature 1021a45c6cb8SMadhusudhan Chikkature sema_init(&host->sem, 1); 1022a45c6cb8SMadhusudhan Chikkature 1023a45c6cb8SMadhusudhan Chikkature host->iclk = clk_get(&pdev->dev, "mmchs_ick"); 1024a45c6cb8SMadhusudhan Chikkature if (IS_ERR(host->iclk)) { 1025a45c6cb8SMadhusudhan Chikkature ret = PTR_ERR(host->iclk); 1026a45c6cb8SMadhusudhan Chikkature host->iclk = NULL; 1027a45c6cb8SMadhusudhan Chikkature goto err1; 1028a45c6cb8SMadhusudhan Chikkature } 1029a45c6cb8SMadhusudhan Chikkature host->fclk = clk_get(&pdev->dev, "mmchs_fck"); 1030a45c6cb8SMadhusudhan Chikkature if (IS_ERR(host->fclk)) { 1031a45c6cb8SMadhusudhan Chikkature ret = PTR_ERR(host->fclk); 1032a45c6cb8SMadhusudhan Chikkature host->fclk = NULL; 1033a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 1034a45c6cb8SMadhusudhan Chikkature goto err1; 1035a45c6cb8SMadhusudhan Chikkature } 1036a45c6cb8SMadhusudhan Chikkature 1037a45c6cb8SMadhusudhan Chikkature if (clk_enable(host->fclk) != 0) { 1038a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 1039a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 1040a45c6cb8SMadhusudhan Chikkature goto err1; 1041a45c6cb8SMadhusudhan Chikkature } 1042a45c6cb8SMadhusudhan Chikkature 1043a45c6cb8SMadhusudhan Chikkature if (clk_enable(host->iclk) != 0) { 1044a45c6cb8SMadhusudhan Chikkature clk_disable(host->fclk); 1045a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 1046a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 1047a45c6cb8SMadhusudhan Chikkature goto err1; 1048a45c6cb8SMadhusudhan Chikkature } 1049a45c6cb8SMadhusudhan Chikkature 1050a45c6cb8SMadhusudhan Chikkature host->dbclk = clk_get(&pdev->dev, "mmchsdb_fck"); 1051a45c6cb8SMadhusudhan Chikkature /* 1052a45c6cb8SMadhusudhan Chikkature * MMC can still work without debounce clock. 1053a45c6cb8SMadhusudhan Chikkature */ 1054a45c6cb8SMadhusudhan Chikkature if (IS_ERR(host->dbclk)) 1055a45c6cb8SMadhusudhan Chikkature dev_warn(mmc_dev(host->mmc), "Failed to get debounce clock\n"); 1056a45c6cb8SMadhusudhan Chikkature else 1057a45c6cb8SMadhusudhan Chikkature if (clk_enable(host->dbclk) != 0) 1058a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Enabling debounce" 1059a45c6cb8SMadhusudhan Chikkature " clk failed\n"); 1060a45c6cb8SMadhusudhan Chikkature else 1061a45c6cb8SMadhusudhan Chikkature host->dbclk_enabled = 1; 1062a45c6cb8SMadhusudhan Chikkature 10630ccd76d4SJuha Yrjola /* Since we do only SG emulation, we can have as many segs 10640ccd76d4SJuha Yrjola * as we want. */ 10650ccd76d4SJuha Yrjola mmc->max_phys_segs = 1024; 10660ccd76d4SJuha Yrjola mmc->max_hw_segs = 1024; 10670ccd76d4SJuha Yrjola 1068a45c6cb8SMadhusudhan Chikkature mmc->max_blk_size = 512; /* Block Length at max can be 1024 */ 1069a45c6cb8SMadhusudhan Chikkature mmc->max_blk_count = 0xFFFF; /* No. of Blocks is 16 bits */ 1070a45c6cb8SMadhusudhan Chikkature mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; 1071a45c6cb8SMadhusudhan Chikkature mmc->max_seg_size = mmc->max_req_size; 1072a45c6cb8SMadhusudhan Chikkature 1073a45c6cb8SMadhusudhan Chikkature mmc->ocr_avail = mmc_slot(host).ocr_mask; 1074a45c6cb8SMadhusudhan Chikkature mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED; 1075a45c6cb8SMadhusudhan Chikkature 107673153010SJarkko Lavinen if (pdata->slots[host->slot_id].wires >= 8) 107773153010SJarkko Lavinen mmc->caps |= MMC_CAP_8_BIT_DATA; 107873153010SJarkko Lavinen else if (pdata->slots[host->slot_id].wires >= 4) 1079a45c6cb8SMadhusudhan Chikkature mmc->caps |= MMC_CAP_4_BIT_DATA; 1080a45c6cb8SMadhusudhan Chikkature 10811b331e69SKim Kyuwon omap_hsmmc_init(host); 1082a45c6cb8SMadhusudhan Chikkature 1083f3e2f1ddSGrazvydas Ignotas /* Select DMA lines */ 1084f3e2f1ddSGrazvydas Ignotas switch (host->id) { 1085f3e2f1ddSGrazvydas Ignotas case OMAP_MMC1_DEVID: 1086f3e2f1ddSGrazvydas Ignotas host->dma_line_tx = OMAP24XX_DMA_MMC1_TX; 1087f3e2f1ddSGrazvydas Ignotas host->dma_line_rx = OMAP24XX_DMA_MMC1_RX; 1088f3e2f1ddSGrazvydas Ignotas break; 1089f3e2f1ddSGrazvydas Ignotas case OMAP_MMC2_DEVID: 1090f3e2f1ddSGrazvydas Ignotas host->dma_line_tx = OMAP24XX_DMA_MMC2_TX; 1091f3e2f1ddSGrazvydas Ignotas host->dma_line_rx = OMAP24XX_DMA_MMC2_RX; 1092f3e2f1ddSGrazvydas Ignotas break; 1093f3e2f1ddSGrazvydas Ignotas case OMAP_MMC3_DEVID: 1094f3e2f1ddSGrazvydas Ignotas host->dma_line_tx = OMAP34XX_DMA_MMC3_TX; 1095f3e2f1ddSGrazvydas Ignotas host->dma_line_rx = OMAP34XX_DMA_MMC3_RX; 1096f3e2f1ddSGrazvydas Ignotas break; 1097f3e2f1ddSGrazvydas Ignotas default: 1098f3e2f1ddSGrazvydas Ignotas dev_err(mmc_dev(host->mmc), "Invalid MMC id\n"); 1099f3e2f1ddSGrazvydas Ignotas goto err_irq; 1100f3e2f1ddSGrazvydas Ignotas } 1101f3e2f1ddSGrazvydas Ignotas 1102a45c6cb8SMadhusudhan Chikkature /* Request IRQ for MMC operations */ 1103a45c6cb8SMadhusudhan Chikkature ret = request_irq(host->irq, mmc_omap_irq, IRQF_DISABLED, 1104a45c6cb8SMadhusudhan Chikkature mmc_hostname(mmc), host); 1105a45c6cb8SMadhusudhan Chikkature if (ret) { 1106a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Unable to grab HSMMC IRQ\n"); 1107a45c6cb8SMadhusudhan Chikkature goto err_irq; 1108a45c6cb8SMadhusudhan Chikkature } 1109a45c6cb8SMadhusudhan Chikkature 1110a45c6cb8SMadhusudhan Chikkature if (pdata->init != NULL) { 1111a45c6cb8SMadhusudhan Chikkature if (pdata->init(&pdev->dev) != 0) { 1112a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1113a45c6cb8SMadhusudhan Chikkature "Unable to configure MMC IRQs\n"); 1114a45c6cb8SMadhusudhan Chikkature goto err_irq_cd_init; 1115a45c6cb8SMadhusudhan Chikkature } 1116a45c6cb8SMadhusudhan Chikkature } 1117a45c6cb8SMadhusudhan Chikkature 1118a45c6cb8SMadhusudhan Chikkature /* Request IRQ for card detect */ 1119e1a55f5eSAdrian Hunter if ((mmc_slot(host).card_detect_irq)) { 1120a45c6cb8SMadhusudhan Chikkature ret = request_irq(mmc_slot(host).card_detect_irq, 1121a45c6cb8SMadhusudhan Chikkature omap_mmc_cd_handler, 1122a45c6cb8SMadhusudhan Chikkature IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING 1123a45c6cb8SMadhusudhan Chikkature | IRQF_DISABLED, 1124a45c6cb8SMadhusudhan Chikkature mmc_hostname(mmc), host); 1125a45c6cb8SMadhusudhan Chikkature if (ret) { 1126a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1127a45c6cb8SMadhusudhan Chikkature "Unable to grab MMC CD IRQ\n"); 1128a45c6cb8SMadhusudhan Chikkature goto err_irq_cd; 1129a45c6cb8SMadhusudhan Chikkature } 1130a45c6cb8SMadhusudhan Chikkature } 1131a45c6cb8SMadhusudhan Chikkature 1132a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK); 1133a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK); 1134a45c6cb8SMadhusudhan Chikkature 1135a45c6cb8SMadhusudhan Chikkature mmc_add_host(mmc); 1136a45c6cb8SMadhusudhan Chikkature 1137a45c6cb8SMadhusudhan Chikkature if (host->pdata->slots[host->slot_id].name != NULL) { 1138a45c6cb8SMadhusudhan Chikkature ret = device_create_file(&mmc->class_dev, &dev_attr_slot_name); 1139a45c6cb8SMadhusudhan Chikkature if (ret < 0) 1140a45c6cb8SMadhusudhan Chikkature goto err_slot_name; 1141a45c6cb8SMadhusudhan Chikkature } 1142e1a55f5eSAdrian Hunter if (mmc_slot(host).card_detect_irq && 1143a45c6cb8SMadhusudhan Chikkature host->pdata->slots[host->slot_id].get_cover_state) { 1144a45c6cb8SMadhusudhan Chikkature ret = device_create_file(&mmc->class_dev, 1145a45c6cb8SMadhusudhan Chikkature &dev_attr_cover_switch); 1146a45c6cb8SMadhusudhan Chikkature if (ret < 0) 1147a45c6cb8SMadhusudhan Chikkature goto err_cover_switch; 1148a45c6cb8SMadhusudhan Chikkature } 1149a45c6cb8SMadhusudhan Chikkature 1150a45c6cb8SMadhusudhan Chikkature return 0; 1151a45c6cb8SMadhusudhan Chikkature 1152a45c6cb8SMadhusudhan Chikkature err_cover_switch: 1153a45c6cb8SMadhusudhan Chikkature device_remove_file(&mmc->class_dev, &dev_attr_cover_switch); 1154a45c6cb8SMadhusudhan Chikkature err_slot_name: 1155a45c6cb8SMadhusudhan Chikkature mmc_remove_host(mmc); 1156a45c6cb8SMadhusudhan Chikkature err_irq_cd: 1157a45c6cb8SMadhusudhan Chikkature free_irq(mmc_slot(host).card_detect_irq, host); 1158a45c6cb8SMadhusudhan Chikkature err_irq_cd_init: 1159a45c6cb8SMadhusudhan Chikkature free_irq(host->irq, host); 1160a45c6cb8SMadhusudhan Chikkature err_irq: 1161a45c6cb8SMadhusudhan Chikkature clk_disable(host->fclk); 1162a45c6cb8SMadhusudhan Chikkature clk_disable(host->iclk); 1163a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 1164a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 1165a45c6cb8SMadhusudhan Chikkature if (host->dbclk_enabled) { 1166a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 1167a45c6cb8SMadhusudhan Chikkature clk_put(host->dbclk); 1168a45c6cb8SMadhusudhan Chikkature } 1169a45c6cb8SMadhusudhan Chikkature 1170a45c6cb8SMadhusudhan Chikkature err1: 1171a45c6cb8SMadhusudhan Chikkature iounmap(host->base); 1172a45c6cb8SMadhusudhan Chikkature err: 1173a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Probe Failed\n"); 1174a45c6cb8SMadhusudhan Chikkature release_mem_region(res->start, res->end - res->start + 1); 1175a45c6cb8SMadhusudhan Chikkature if (host) 1176a45c6cb8SMadhusudhan Chikkature mmc_free_host(mmc); 1177a45c6cb8SMadhusudhan Chikkature return ret; 1178a45c6cb8SMadhusudhan Chikkature } 1179a45c6cb8SMadhusudhan Chikkature 1180a45c6cb8SMadhusudhan Chikkature static int omap_mmc_remove(struct platform_device *pdev) 1181a45c6cb8SMadhusudhan Chikkature { 1182a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = platform_get_drvdata(pdev); 1183a45c6cb8SMadhusudhan Chikkature struct resource *res; 1184a45c6cb8SMadhusudhan Chikkature 1185a45c6cb8SMadhusudhan Chikkature if (host) { 1186a45c6cb8SMadhusudhan Chikkature mmc_remove_host(host->mmc); 1187a45c6cb8SMadhusudhan Chikkature if (host->pdata->cleanup) 1188a45c6cb8SMadhusudhan Chikkature host->pdata->cleanup(&pdev->dev); 1189a45c6cb8SMadhusudhan Chikkature free_irq(host->irq, host); 1190a45c6cb8SMadhusudhan Chikkature if (mmc_slot(host).card_detect_irq) 1191a45c6cb8SMadhusudhan Chikkature free_irq(mmc_slot(host).card_detect_irq, host); 1192a45c6cb8SMadhusudhan Chikkature flush_scheduled_work(); 1193a45c6cb8SMadhusudhan Chikkature 1194a45c6cb8SMadhusudhan Chikkature clk_disable(host->fclk); 1195a45c6cb8SMadhusudhan Chikkature clk_disable(host->iclk); 1196a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 1197a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 1198a45c6cb8SMadhusudhan Chikkature if (host->dbclk_enabled) { 1199a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 1200a45c6cb8SMadhusudhan Chikkature clk_put(host->dbclk); 1201a45c6cb8SMadhusudhan Chikkature } 1202a45c6cb8SMadhusudhan Chikkature 1203a45c6cb8SMadhusudhan Chikkature mmc_free_host(host->mmc); 1204a45c6cb8SMadhusudhan Chikkature iounmap(host->base); 1205a45c6cb8SMadhusudhan Chikkature } 1206a45c6cb8SMadhusudhan Chikkature 1207a45c6cb8SMadhusudhan Chikkature res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1208a45c6cb8SMadhusudhan Chikkature if (res) 1209a45c6cb8SMadhusudhan Chikkature release_mem_region(res->start, res->end - res->start + 1); 1210a45c6cb8SMadhusudhan Chikkature platform_set_drvdata(pdev, NULL); 1211a45c6cb8SMadhusudhan Chikkature 1212a45c6cb8SMadhusudhan Chikkature return 0; 1213a45c6cb8SMadhusudhan Chikkature } 1214a45c6cb8SMadhusudhan Chikkature 1215a45c6cb8SMadhusudhan Chikkature #ifdef CONFIG_PM 1216a45c6cb8SMadhusudhan Chikkature static int omap_mmc_suspend(struct platform_device *pdev, pm_message_t state) 1217a45c6cb8SMadhusudhan Chikkature { 1218a45c6cb8SMadhusudhan Chikkature int ret = 0; 1219a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = platform_get_drvdata(pdev); 1220a45c6cb8SMadhusudhan Chikkature 1221a45c6cb8SMadhusudhan Chikkature if (host && host->suspended) 1222a45c6cb8SMadhusudhan Chikkature return 0; 1223a45c6cb8SMadhusudhan Chikkature 1224a45c6cb8SMadhusudhan Chikkature if (host) { 1225a45c6cb8SMadhusudhan Chikkature ret = mmc_suspend_host(host->mmc, state); 1226a45c6cb8SMadhusudhan Chikkature if (ret == 0) { 1227a45c6cb8SMadhusudhan Chikkature host->suspended = 1; 1228a45c6cb8SMadhusudhan Chikkature 1229a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, ISE, 0); 1230a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, IE, 0); 1231a45c6cb8SMadhusudhan Chikkature 1232a45c6cb8SMadhusudhan Chikkature if (host->pdata->suspend) { 1233a45c6cb8SMadhusudhan Chikkature ret = host->pdata->suspend(&pdev->dev, 1234a45c6cb8SMadhusudhan Chikkature host->slot_id); 1235a45c6cb8SMadhusudhan Chikkature if (ret) 1236a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1237a45c6cb8SMadhusudhan Chikkature "Unable to handle MMC board" 1238a45c6cb8SMadhusudhan Chikkature " level suspend\n"); 1239a45c6cb8SMadhusudhan Chikkature } 1240a45c6cb8SMadhusudhan Chikkature 1241a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 12420683af48SJarkko Lavinen OMAP_HSMMC_READ(host->base, HCTL) & ~SDBP); 1243a45c6cb8SMadhusudhan Chikkature clk_disable(host->fclk); 1244a45c6cb8SMadhusudhan Chikkature clk_disable(host->iclk); 1245a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 1246a45c6cb8SMadhusudhan Chikkature } 1247a45c6cb8SMadhusudhan Chikkature 1248a45c6cb8SMadhusudhan Chikkature } 1249a45c6cb8SMadhusudhan Chikkature return ret; 1250a45c6cb8SMadhusudhan Chikkature } 1251a45c6cb8SMadhusudhan Chikkature 1252a45c6cb8SMadhusudhan Chikkature /* Routine to resume the MMC device */ 1253a45c6cb8SMadhusudhan Chikkature static int omap_mmc_resume(struct platform_device *pdev) 1254a45c6cb8SMadhusudhan Chikkature { 1255a45c6cb8SMadhusudhan Chikkature int ret = 0; 1256a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = platform_get_drvdata(pdev); 1257a45c6cb8SMadhusudhan Chikkature 1258a45c6cb8SMadhusudhan Chikkature if (host && !host->suspended) 1259a45c6cb8SMadhusudhan Chikkature return 0; 1260a45c6cb8SMadhusudhan Chikkature 1261a45c6cb8SMadhusudhan Chikkature if (host) { 1262a45c6cb8SMadhusudhan Chikkature 1263a45c6cb8SMadhusudhan Chikkature ret = clk_enable(host->fclk); 1264a45c6cb8SMadhusudhan Chikkature if (ret) 1265a45c6cb8SMadhusudhan Chikkature goto clk_en_err; 1266a45c6cb8SMadhusudhan Chikkature 1267a45c6cb8SMadhusudhan Chikkature ret = clk_enable(host->iclk); 1268a45c6cb8SMadhusudhan Chikkature if (ret) { 1269a45c6cb8SMadhusudhan Chikkature clk_disable(host->fclk); 1270a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 1271a45c6cb8SMadhusudhan Chikkature goto clk_en_err; 1272a45c6cb8SMadhusudhan Chikkature } 1273a45c6cb8SMadhusudhan Chikkature 1274a45c6cb8SMadhusudhan Chikkature if (clk_enable(host->dbclk) != 0) 1275a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1276a45c6cb8SMadhusudhan Chikkature "Enabling debounce clk failed\n"); 1277a45c6cb8SMadhusudhan Chikkature 12781b331e69SKim Kyuwon omap_hsmmc_init(host); 12791b331e69SKim Kyuwon 1280a45c6cb8SMadhusudhan Chikkature if (host->pdata->resume) { 1281a45c6cb8SMadhusudhan Chikkature ret = host->pdata->resume(&pdev->dev, host->slot_id); 1282a45c6cb8SMadhusudhan Chikkature if (ret) 1283a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1284a45c6cb8SMadhusudhan Chikkature "Unmask interrupt failed\n"); 1285a45c6cb8SMadhusudhan Chikkature } 1286a45c6cb8SMadhusudhan Chikkature 1287a45c6cb8SMadhusudhan Chikkature /* Notify the core to resume the host */ 1288a45c6cb8SMadhusudhan Chikkature ret = mmc_resume_host(host->mmc); 1289a45c6cb8SMadhusudhan Chikkature if (ret == 0) 1290a45c6cb8SMadhusudhan Chikkature host->suspended = 0; 1291a45c6cb8SMadhusudhan Chikkature } 1292a45c6cb8SMadhusudhan Chikkature 1293a45c6cb8SMadhusudhan Chikkature return ret; 1294a45c6cb8SMadhusudhan Chikkature 1295a45c6cb8SMadhusudhan Chikkature clk_en_err: 1296a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1297a45c6cb8SMadhusudhan Chikkature "Failed to enable MMC clocks during resume\n"); 1298a45c6cb8SMadhusudhan Chikkature return ret; 1299a45c6cb8SMadhusudhan Chikkature } 1300a45c6cb8SMadhusudhan Chikkature 1301a45c6cb8SMadhusudhan Chikkature #else 1302a45c6cb8SMadhusudhan Chikkature #define omap_mmc_suspend NULL 1303a45c6cb8SMadhusudhan Chikkature #define omap_mmc_resume NULL 1304a45c6cb8SMadhusudhan Chikkature #endif 1305a45c6cb8SMadhusudhan Chikkature 1306a45c6cb8SMadhusudhan Chikkature static struct platform_driver omap_mmc_driver = { 1307a45c6cb8SMadhusudhan Chikkature .probe = omap_mmc_probe, 1308a45c6cb8SMadhusudhan Chikkature .remove = omap_mmc_remove, 1309a45c6cb8SMadhusudhan Chikkature .suspend = omap_mmc_suspend, 1310a45c6cb8SMadhusudhan Chikkature .resume = omap_mmc_resume, 1311a45c6cb8SMadhusudhan Chikkature .driver = { 1312a45c6cb8SMadhusudhan Chikkature .name = DRIVER_NAME, 1313a45c6cb8SMadhusudhan Chikkature .owner = THIS_MODULE, 1314a45c6cb8SMadhusudhan Chikkature }, 1315a45c6cb8SMadhusudhan Chikkature }; 1316a45c6cb8SMadhusudhan Chikkature 1317a45c6cb8SMadhusudhan Chikkature static int __init omap_mmc_init(void) 1318a45c6cb8SMadhusudhan Chikkature { 1319a45c6cb8SMadhusudhan Chikkature /* Register the MMC driver */ 1320a45c6cb8SMadhusudhan Chikkature return platform_driver_register(&omap_mmc_driver); 1321a45c6cb8SMadhusudhan Chikkature } 1322a45c6cb8SMadhusudhan Chikkature 1323a45c6cb8SMadhusudhan Chikkature static void __exit omap_mmc_cleanup(void) 1324a45c6cb8SMadhusudhan Chikkature { 1325a45c6cb8SMadhusudhan Chikkature /* Unregister MMC driver */ 1326a45c6cb8SMadhusudhan Chikkature platform_driver_unregister(&omap_mmc_driver); 1327a45c6cb8SMadhusudhan Chikkature } 1328a45c6cb8SMadhusudhan Chikkature 1329a45c6cb8SMadhusudhan Chikkature module_init(omap_mmc_init); 1330a45c6cb8SMadhusudhan Chikkature module_exit(omap_mmc_cleanup); 1331a45c6cb8SMadhusudhan Chikkature 1332a45c6cb8SMadhusudhan Chikkature MODULE_DESCRIPTION("OMAP High Speed Multimedia Card driver"); 1333a45c6cb8SMadhusudhan Chikkature MODULE_LICENSE("GPL"); 1334a45c6cb8SMadhusudhan Chikkature MODULE_ALIAS("platform:" DRIVER_NAME); 1335a45c6cb8SMadhusudhan Chikkature MODULE_AUTHOR("Texas Instruments Inc"); 1336