1a45c6cb8SMadhusudhan Chikkature /* 2a45c6cb8SMadhusudhan Chikkature * drivers/mmc/host/omap_hsmmc.c 3a45c6cb8SMadhusudhan Chikkature * 4a45c6cb8SMadhusudhan Chikkature * Driver for OMAP2430/3430 MMC controller. 5a45c6cb8SMadhusudhan Chikkature * 6a45c6cb8SMadhusudhan Chikkature * Copyright (C) 2007 Texas Instruments. 7a45c6cb8SMadhusudhan Chikkature * 8a45c6cb8SMadhusudhan Chikkature * Authors: 9a45c6cb8SMadhusudhan Chikkature * Syed Mohammed Khasim <x0khasim@ti.com> 10a45c6cb8SMadhusudhan Chikkature * Madhusudhan <madhu.cr@ti.com> 11a45c6cb8SMadhusudhan Chikkature * Mohit Jalori <mjalori@ti.com> 12a45c6cb8SMadhusudhan Chikkature * 13a45c6cb8SMadhusudhan Chikkature * This file is licensed under the terms of the GNU General Public License 14a45c6cb8SMadhusudhan Chikkature * version 2. This program is licensed "as is" without any warranty of any 15a45c6cb8SMadhusudhan Chikkature * kind, whether express or implied. 16a45c6cb8SMadhusudhan Chikkature */ 17a45c6cb8SMadhusudhan Chikkature 18a45c6cb8SMadhusudhan Chikkature #include <linux/module.h> 19a45c6cb8SMadhusudhan Chikkature #include <linux/init.h> 20d900f712SDenis Karpov #include <linux/debugfs.h> 21d900f712SDenis Karpov #include <linux/seq_file.h> 22a45c6cb8SMadhusudhan Chikkature #include <linux/interrupt.h> 23a45c6cb8SMadhusudhan Chikkature #include <linux/delay.h> 24a45c6cb8SMadhusudhan Chikkature #include <linux/dma-mapping.h> 25a45c6cb8SMadhusudhan Chikkature #include <linux/platform_device.h> 26a45c6cb8SMadhusudhan Chikkature #include <linux/workqueue.h> 27a45c6cb8SMadhusudhan Chikkature #include <linux/timer.h> 28a45c6cb8SMadhusudhan Chikkature #include <linux/clk.h> 29a45c6cb8SMadhusudhan Chikkature #include <linux/mmc/host.h> 3013189e78SJarkko Lavinen #include <linux/mmc/core.h> 31a45c6cb8SMadhusudhan Chikkature #include <linux/io.h> 32a45c6cb8SMadhusudhan Chikkature #include <linux/semaphore.h> 33db0fefc5SAdrian Hunter #include <linux/gpio.h> 34db0fefc5SAdrian Hunter #include <linux/regulator/consumer.h> 35ce491cf8STony Lindgren #include <plat/dma.h> 36a45c6cb8SMadhusudhan Chikkature #include <mach/hardware.h> 37ce491cf8STony Lindgren #include <plat/board.h> 38ce491cf8STony Lindgren #include <plat/mmc.h> 39ce491cf8STony Lindgren #include <plat/cpu.h> 40a45c6cb8SMadhusudhan Chikkature 41a45c6cb8SMadhusudhan Chikkature /* OMAP HSMMC Host Controller Registers */ 42a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_SYSCONFIG 0x0010 4311dd62a7SDenis Karpov #define OMAP_HSMMC_SYSSTATUS 0x0014 44a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_CON 0x002C 45a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_BLK 0x0104 46a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_ARG 0x0108 47a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_CMD 0x010C 48a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP10 0x0110 49a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP32 0x0114 50a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP54 0x0118 51a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP76 0x011C 52a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_DATA 0x0120 53a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_HCTL 0x0128 54a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_SYSCTL 0x012C 55a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_STAT 0x0130 56a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_IE 0x0134 57a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_ISE 0x0138 58a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_CAPA 0x0140 59a45c6cb8SMadhusudhan Chikkature 60a45c6cb8SMadhusudhan Chikkature #define VS18 (1 << 26) 61a45c6cb8SMadhusudhan Chikkature #define VS30 (1 << 25) 62a45c6cb8SMadhusudhan Chikkature #define SDVS18 (0x5 << 9) 63a45c6cb8SMadhusudhan Chikkature #define SDVS30 (0x6 << 9) 64eb250826SDavid Brownell #define SDVS33 (0x7 << 9) 651b331e69SKim Kyuwon #define SDVS_MASK 0x00000E00 66a45c6cb8SMadhusudhan Chikkature #define SDVSCLR 0xFFFFF1FF 67a45c6cb8SMadhusudhan Chikkature #define SDVSDET 0x00000400 68a45c6cb8SMadhusudhan Chikkature #define AUTOIDLE 0x1 69a45c6cb8SMadhusudhan Chikkature #define SDBP (1 << 8) 70a45c6cb8SMadhusudhan Chikkature #define DTO 0xe 71a45c6cb8SMadhusudhan Chikkature #define ICE 0x1 72a45c6cb8SMadhusudhan Chikkature #define ICS 0x2 73a45c6cb8SMadhusudhan Chikkature #define CEN (1 << 2) 74a45c6cb8SMadhusudhan Chikkature #define CLKD_MASK 0x0000FFC0 75a45c6cb8SMadhusudhan Chikkature #define CLKD_SHIFT 6 76a45c6cb8SMadhusudhan Chikkature #define DTO_MASK 0x000F0000 77a45c6cb8SMadhusudhan Chikkature #define DTO_SHIFT 16 78a45c6cb8SMadhusudhan Chikkature #define INT_EN_MASK 0x307F0033 79ccdfe3a6SAnand Gadiyar #define BWR_ENABLE (1 << 4) 80ccdfe3a6SAnand Gadiyar #define BRR_ENABLE (1 << 5) 81a45c6cb8SMadhusudhan Chikkature #define INIT_STREAM (1 << 1) 82a45c6cb8SMadhusudhan Chikkature #define DP_SELECT (1 << 21) 83a45c6cb8SMadhusudhan Chikkature #define DDIR (1 << 4) 84a45c6cb8SMadhusudhan Chikkature #define DMA_EN 0x1 85a45c6cb8SMadhusudhan Chikkature #define MSBS (1 << 5) 86a45c6cb8SMadhusudhan Chikkature #define BCE (1 << 1) 87a45c6cb8SMadhusudhan Chikkature #define FOUR_BIT (1 << 1) 8873153010SJarkko Lavinen #define DW8 (1 << 5) 89a45c6cb8SMadhusudhan Chikkature #define CC 0x1 90a45c6cb8SMadhusudhan Chikkature #define TC 0x02 91a45c6cb8SMadhusudhan Chikkature #define OD 0x1 92a45c6cb8SMadhusudhan Chikkature #define ERR (1 << 15) 93a45c6cb8SMadhusudhan Chikkature #define CMD_TIMEOUT (1 << 16) 94a45c6cb8SMadhusudhan Chikkature #define DATA_TIMEOUT (1 << 20) 95a45c6cb8SMadhusudhan Chikkature #define CMD_CRC (1 << 17) 96a45c6cb8SMadhusudhan Chikkature #define DATA_CRC (1 << 21) 97a45c6cb8SMadhusudhan Chikkature #define CARD_ERR (1 << 28) 98a45c6cb8SMadhusudhan Chikkature #define STAT_CLEAR 0xFFFFFFFF 99a45c6cb8SMadhusudhan Chikkature #define INIT_STREAM_CMD 0x00000000 100a45c6cb8SMadhusudhan Chikkature #define DUAL_VOLT_OCR_BIT 7 101a45c6cb8SMadhusudhan Chikkature #define SRC (1 << 25) 102a45c6cb8SMadhusudhan Chikkature #define SRD (1 << 26) 10311dd62a7SDenis Karpov #define SOFTRESET (1 << 1) 10411dd62a7SDenis Karpov #define RESETDONE (1 << 0) 105a45c6cb8SMadhusudhan Chikkature 106a45c6cb8SMadhusudhan Chikkature /* 107a45c6cb8SMadhusudhan Chikkature * FIXME: Most likely all the data using these _DEVID defines should come 108a45c6cb8SMadhusudhan Chikkature * from the platform_data, or implemented in controller and slot specific 109a45c6cb8SMadhusudhan Chikkature * functions. 110a45c6cb8SMadhusudhan Chikkature */ 111a45c6cb8SMadhusudhan Chikkature #define OMAP_MMC1_DEVID 0 112a45c6cb8SMadhusudhan Chikkature #define OMAP_MMC2_DEVID 1 113f3e2f1ddSGrazvydas Ignotas #define OMAP_MMC3_DEVID 2 11482cf818dSkishore kadiyala #define OMAP_MMC4_DEVID 3 11582cf818dSkishore kadiyala #define OMAP_MMC5_DEVID 4 116a45c6cb8SMadhusudhan Chikkature 117a45c6cb8SMadhusudhan Chikkature #define MMC_TIMEOUT_MS 20 118a45c6cb8SMadhusudhan Chikkature #define OMAP_MMC_MASTER_CLOCK 96000000 119a45c6cb8SMadhusudhan Chikkature #define DRIVER_NAME "mmci-omap-hs" 120a45c6cb8SMadhusudhan Chikkature 121dd498effSDenis Karpov /* Timeouts for entering power saving states on inactivity, msec */ 122dd498effSDenis Karpov #define OMAP_MMC_DISABLED_TIMEOUT 100 12313189e78SJarkko Lavinen #define OMAP_MMC_SLEEP_TIMEOUT 1000 12413189e78SJarkko Lavinen #define OMAP_MMC_OFF_TIMEOUT 8000 125dd498effSDenis Karpov 126a45c6cb8SMadhusudhan Chikkature /* 127a45c6cb8SMadhusudhan Chikkature * One controller can have multiple slots, like on some omap boards using 128a45c6cb8SMadhusudhan Chikkature * omap.c controller driver. Luckily this is not currently done on any known 129a45c6cb8SMadhusudhan Chikkature * omap_hsmmc.c device. 130a45c6cb8SMadhusudhan Chikkature */ 131a45c6cb8SMadhusudhan Chikkature #define mmc_slot(host) (host->pdata->slots[host->slot_id]) 132a45c6cb8SMadhusudhan Chikkature 133a45c6cb8SMadhusudhan Chikkature /* 134a45c6cb8SMadhusudhan Chikkature * MMC Host controller read/write API's 135a45c6cb8SMadhusudhan Chikkature */ 136a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_READ(base, reg) \ 137a45c6cb8SMadhusudhan Chikkature __raw_readl((base) + OMAP_HSMMC_##reg) 138a45c6cb8SMadhusudhan Chikkature 139a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_WRITE(base, reg, val) \ 140a45c6cb8SMadhusudhan Chikkature __raw_writel((val), (base) + OMAP_HSMMC_##reg) 141a45c6cb8SMadhusudhan Chikkature 14270a3341aSDenis Karpov struct omap_hsmmc_host { 143a45c6cb8SMadhusudhan Chikkature struct device *dev; 144a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc; 145a45c6cb8SMadhusudhan Chikkature struct mmc_request *mrq; 146a45c6cb8SMadhusudhan Chikkature struct mmc_command *cmd; 147a45c6cb8SMadhusudhan Chikkature struct mmc_data *data; 148a45c6cb8SMadhusudhan Chikkature struct clk *fclk; 149a45c6cb8SMadhusudhan Chikkature struct clk *iclk; 150a45c6cb8SMadhusudhan Chikkature struct clk *dbclk; 151db0fefc5SAdrian Hunter /* 152db0fefc5SAdrian Hunter * vcc == configured supply 153db0fefc5SAdrian Hunter * vcc_aux == optional 154db0fefc5SAdrian Hunter * - MMC1, supply for DAT4..DAT7 155db0fefc5SAdrian Hunter * - MMC2/MMC2, external level shifter voltage supply, for 156db0fefc5SAdrian Hunter * chip (SDIO, eMMC, etc) or transceiver (MMC2 only) 157db0fefc5SAdrian Hunter */ 158db0fefc5SAdrian Hunter struct regulator *vcc; 159db0fefc5SAdrian Hunter struct regulator *vcc_aux; 160a45c6cb8SMadhusudhan Chikkature struct semaphore sem; 161a45c6cb8SMadhusudhan Chikkature struct work_struct mmc_carddetect_work; 162a45c6cb8SMadhusudhan Chikkature void __iomem *base; 163a45c6cb8SMadhusudhan Chikkature resource_size_t mapbase; 1644dffd7a2SAdrian Hunter spinlock_t irq_lock; /* Prevent races with irq handler */ 1654dffd7a2SAdrian Hunter unsigned long flags; 166a45c6cb8SMadhusudhan Chikkature unsigned int id; 167a45c6cb8SMadhusudhan Chikkature unsigned int dma_len; 1680ccd76d4SJuha Yrjola unsigned int dma_sg_idx; 169a45c6cb8SMadhusudhan Chikkature unsigned char bus_mode; 170a3621465SAdrian Hunter unsigned char power_mode; 171a45c6cb8SMadhusudhan Chikkature u32 *buffer; 172a45c6cb8SMadhusudhan Chikkature u32 bytesleft; 173a45c6cb8SMadhusudhan Chikkature int suspended; 174a45c6cb8SMadhusudhan Chikkature int irq; 175a45c6cb8SMadhusudhan Chikkature int use_dma, dma_ch; 176f3e2f1ddSGrazvydas Ignotas int dma_line_tx, dma_line_rx; 177a45c6cb8SMadhusudhan Chikkature int slot_id; 1782bec0893SAdrian Hunter int got_dbclk; 1794a694dc9SAdrian Hunter int response_busy; 18011dd62a7SDenis Karpov int context_loss; 181dd498effSDenis Karpov int dpm_state; 182623821f7SAdrian Hunter int vdd; 183b62f6228SAdrian Hunter int protect_card; 184b62f6228SAdrian Hunter int reqs_blocked; 185db0fefc5SAdrian Hunter int use_reg; 18611dd62a7SDenis Karpov 187a45c6cb8SMadhusudhan Chikkature struct omap_mmc_platform_data *pdata; 188a45c6cb8SMadhusudhan Chikkature }; 189a45c6cb8SMadhusudhan Chikkature 190db0fefc5SAdrian Hunter static int omap_hsmmc_card_detect(struct device *dev, int slot) 191db0fefc5SAdrian Hunter { 192db0fefc5SAdrian Hunter struct omap_mmc_platform_data *mmc = dev->platform_data; 193db0fefc5SAdrian Hunter 194db0fefc5SAdrian Hunter /* NOTE: assumes card detect signal is active-low */ 195db0fefc5SAdrian Hunter return !gpio_get_value_cansleep(mmc->slots[0].switch_pin); 196db0fefc5SAdrian Hunter } 197db0fefc5SAdrian Hunter 198db0fefc5SAdrian Hunter static int omap_hsmmc_get_wp(struct device *dev, int slot) 199db0fefc5SAdrian Hunter { 200db0fefc5SAdrian Hunter struct omap_mmc_platform_data *mmc = dev->platform_data; 201db0fefc5SAdrian Hunter 202db0fefc5SAdrian Hunter /* NOTE: assumes write protect signal is active-high */ 203db0fefc5SAdrian Hunter return gpio_get_value_cansleep(mmc->slots[0].gpio_wp); 204db0fefc5SAdrian Hunter } 205db0fefc5SAdrian Hunter 206db0fefc5SAdrian Hunter static int omap_hsmmc_get_cover_state(struct device *dev, int slot) 207db0fefc5SAdrian Hunter { 208db0fefc5SAdrian Hunter struct omap_mmc_platform_data *mmc = dev->platform_data; 209db0fefc5SAdrian Hunter 210db0fefc5SAdrian Hunter /* NOTE: assumes card detect signal is active-low */ 211db0fefc5SAdrian Hunter return !gpio_get_value_cansleep(mmc->slots[0].switch_pin); 212db0fefc5SAdrian Hunter } 213db0fefc5SAdrian Hunter 214db0fefc5SAdrian Hunter #ifdef CONFIG_PM 215db0fefc5SAdrian Hunter 216db0fefc5SAdrian Hunter static int omap_hsmmc_suspend_cdirq(struct device *dev, int slot) 217db0fefc5SAdrian Hunter { 218db0fefc5SAdrian Hunter struct omap_mmc_platform_data *mmc = dev->platform_data; 219db0fefc5SAdrian Hunter 220db0fefc5SAdrian Hunter disable_irq(mmc->slots[0].card_detect_irq); 221db0fefc5SAdrian Hunter return 0; 222db0fefc5SAdrian Hunter } 223db0fefc5SAdrian Hunter 224db0fefc5SAdrian Hunter static int omap_hsmmc_resume_cdirq(struct device *dev, int slot) 225db0fefc5SAdrian Hunter { 226db0fefc5SAdrian Hunter struct omap_mmc_platform_data *mmc = dev->platform_data; 227db0fefc5SAdrian Hunter 228db0fefc5SAdrian Hunter enable_irq(mmc->slots[0].card_detect_irq); 229db0fefc5SAdrian Hunter return 0; 230db0fefc5SAdrian Hunter } 231db0fefc5SAdrian Hunter 232db0fefc5SAdrian Hunter #else 233db0fefc5SAdrian Hunter 234db0fefc5SAdrian Hunter #define omap_hsmmc_suspend_cdirq NULL 235db0fefc5SAdrian Hunter #define omap_hsmmc_resume_cdirq NULL 236db0fefc5SAdrian Hunter 237db0fefc5SAdrian Hunter #endif 238db0fefc5SAdrian Hunter 239db0fefc5SAdrian Hunter static int omap_hsmmc_1_set_power(struct device *dev, int slot, int power_on, 240db0fefc5SAdrian Hunter int vdd) 241db0fefc5SAdrian Hunter { 242db0fefc5SAdrian Hunter struct omap_hsmmc_host *host = 243db0fefc5SAdrian Hunter platform_get_drvdata(to_platform_device(dev)); 244db0fefc5SAdrian Hunter int ret; 245db0fefc5SAdrian Hunter 246db0fefc5SAdrian Hunter if (mmc_slot(host).before_set_reg) 247db0fefc5SAdrian Hunter mmc_slot(host).before_set_reg(dev, slot, power_on, vdd); 248db0fefc5SAdrian Hunter 249db0fefc5SAdrian Hunter if (power_on) 250db0fefc5SAdrian Hunter ret = mmc_regulator_set_ocr(host->vcc, vdd); 251db0fefc5SAdrian Hunter else 252db0fefc5SAdrian Hunter ret = mmc_regulator_set_ocr(host->vcc, 0); 253db0fefc5SAdrian Hunter 254db0fefc5SAdrian Hunter if (mmc_slot(host).after_set_reg) 255db0fefc5SAdrian Hunter mmc_slot(host).after_set_reg(dev, slot, power_on, vdd); 256db0fefc5SAdrian Hunter 257db0fefc5SAdrian Hunter return ret; 258db0fefc5SAdrian Hunter } 259db0fefc5SAdrian Hunter 260db0fefc5SAdrian Hunter static int omap_hsmmc_23_set_power(struct device *dev, int slot, int power_on, 261db0fefc5SAdrian Hunter int vdd) 262db0fefc5SAdrian Hunter { 263db0fefc5SAdrian Hunter struct omap_hsmmc_host *host = 264db0fefc5SAdrian Hunter platform_get_drvdata(to_platform_device(dev)); 265db0fefc5SAdrian Hunter int ret = 0; 266db0fefc5SAdrian Hunter 267db0fefc5SAdrian Hunter /* 268db0fefc5SAdrian Hunter * If we don't see a Vcc regulator, assume it's a fixed 269db0fefc5SAdrian Hunter * voltage always-on regulator. 270db0fefc5SAdrian Hunter */ 271db0fefc5SAdrian Hunter if (!host->vcc) 272db0fefc5SAdrian Hunter return 0; 273db0fefc5SAdrian Hunter 274db0fefc5SAdrian Hunter if (mmc_slot(host).before_set_reg) 275db0fefc5SAdrian Hunter mmc_slot(host).before_set_reg(dev, slot, power_on, vdd); 276db0fefc5SAdrian Hunter 277db0fefc5SAdrian Hunter /* 278db0fefc5SAdrian Hunter * Assume Vcc regulator is used only to power the card ... OMAP 279db0fefc5SAdrian Hunter * VDDS is used to power the pins, optionally with a transceiver to 280db0fefc5SAdrian Hunter * support cards using voltages other than VDDS (1.8V nominal). When a 281db0fefc5SAdrian Hunter * transceiver is used, DAT3..7 are muxed as transceiver control pins. 282db0fefc5SAdrian Hunter * 283db0fefc5SAdrian Hunter * In some cases this regulator won't support enable/disable; 284db0fefc5SAdrian Hunter * e.g. it's a fixed rail for a WLAN chip. 285db0fefc5SAdrian Hunter * 286db0fefc5SAdrian Hunter * In other cases vcc_aux switches interface power. Example, for 287db0fefc5SAdrian Hunter * eMMC cards it represents VccQ. Sometimes transceivers or SDIO 288db0fefc5SAdrian Hunter * chips/cards need an interface voltage rail too. 289db0fefc5SAdrian Hunter */ 290db0fefc5SAdrian Hunter if (power_on) { 291db0fefc5SAdrian Hunter ret = mmc_regulator_set_ocr(host->vcc, vdd); 292db0fefc5SAdrian Hunter /* Enable interface voltage rail, if needed */ 293db0fefc5SAdrian Hunter if (ret == 0 && host->vcc_aux) { 294db0fefc5SAdrian Hunter ret = regulator_enable(host->vcc_aux); 295db0fefc5SAdrian Hunter if (ret < 0) 296db0fefc5SAdrian Hunter ret = mmc_regulator_set_ocr(host->vcc, 0); 297db0fefc5SAdrian Hunter } 298db0fefc5SAdrian Hunter } else { 299db0fefc5SAdrian Hunter if (host->vcc_aux) { 300db0fefc5SAdrian Hunter ret = regulator_is_enabled(host->vcc_aux); 301db0fefc5SAdrian Hunter if (ret > 0) 302db0fefc5SAdrian Hunter ret = regulator_disable(host->vcc_aux); 303db0fefc5SAdrian Hunter } 304db0fefc5SAdrian Hunter if (ret == 0) 305db0fefc5SAdrian Hunter ret = mmc_regulator_set_ocr(host->vcc, 0); 306db0fefc5SAdrian Hunter } 307db0fefc5SAdrian Hunter 308db0fefc5SAdrian Hunter if (mmc_slot(host).after_set_reg) 309db0fefc5SAdrian Hunter mmc_slot(host).after_set_reg(dev, slot, power_on, vdd); 310db0fefc5SAdrian Hunter 311db0fefc5SAdrian Hunter return ret; 312db0fefc5SAdrian Hunter } 313db0fefc5SAdrian Hunter 314db0fefc5SAdrian Hunter static int omap_hsmmc_1_set_sleep(struct device *dev, int slot, int sleep, 315db0fefc5SAdrian Hunter int vdd, int cardsleep) 316db0fefc5SAdrian Hunter { 317db0fefc5SAdrian Hunter struct omap_hsmmc_host *host = 318db0fefc5SAdrian Hunter platform_get_drvdata(to_platform_device(dev)); 319db0fefc5SAdrian Hunter int mode = sleep ? REGULATOR_MODE_STANDBY : REGULATOR_MODE_NORMAL; 320db0fefc5SAdrian Hunter 321db0fefc5SAdrian Hunter return regulator_set_mode(host->vcc, mode); 322db0fefc5SAdrian Hunter } 323db0fefc5SAdrian Hunter 324db0fefc5SAdrian Hunter static int omap_hsmmc_23_set_sleep(struct device *dev, int slot, int sleep, 325db0fefc5SAdrian Hunter int vdd, int cardsleep) 326db0fefc5SAdrian Hunter { 327db0fefc5SAdrian Hunter struct omap_hsmmc_host *host = 328db0fefc5SAdrian Hunter platform_get_drvdata(to_platform_device(dev)); 329db0fefc5SAdrian Hunter int err, mode; 330db0fefc5SAdrian Hunter 331db0fefc5SAdrian Hunter /* 332db0fefc5SAdrian Hunter * If we don't see a Vcc regulator, assume it's a fixed 333db0fefc5SAdrian Hunter * voltage always-on regulator. 334db0fefc5SAdrian Hunter */ 335db0fefc5SAdrian Hunter if (!host->vcc) 336db0fefc5SAdrian Hunter return 0; 337db0fefc5SAdrian Hunter 338db0fefc5SAdrian Hunter mode = sleep ? REGULATOR_MODE_STANDBY : REGULATOR_MODE_NORMAL; 339db0fefc5SAdrian Hunter 340db0fefc5SAdrian Hunter if (!host->vcc_aux) 341db0fefc5SAdrian Hunter return regulator_set_mode(host->vcc, mode); 342db0fefc5SAdrian Hunter 343db0fefc5SAdrian Hunter if (cardsleep) { 344db0fefc5SAdrian Hunter /* VCC can be turned off if card is asleep */ 345db0fefc5SAdrian Hunter if (sleep) 346db0fefc5SAdrian Hunter err = mmc_regulator_set_ocr(host->vcc, 0); 347db0fefc5SAdrian Hunter else 348db0fefc5SAdrian Hunter err = mmc_regulator_set_ocr(host->vcc, vdd); 349db0fefc5SAdrian Hunter } else 350db0fefc5SAdrian Hunter err = regulator_set_mode(host->vcc, mode); 351db0fefc5SAdrian Hunter if (err) 352db0fefc5SAdrian Hunter return err; 353db0fefc5SAdrian Hunter return regulator_set_mode(host->vcc_aux, mode); 354db0fefc5SAdrian Hunter } 355db0fefc5SAdrian Hunter 356db0fefc5SAdrian Hunter static int omap_hsmmc_gpio_init(struct omap_mmc_platform_data *pdata) 357db0fefc5SAdrian Hunter { 358db0fefc5SAdrian Hunter int ret; 359db0fefc5SAdrian Hunter 360db0fefc5SAdrian Hunter if (gpio_is_valid(pdata->slots[0].switch_pin)) { 361db0fefc5SAdrian Hunter pdata->suspend = omap_hsmmc_suspend_cdirq; 362db0fefc5SAdrian Hunter pdata->resume = omap_hsmmc_resume_cdirq; 363db0fefc5SAdrian Hunter if (pdata->slots[0].cover) 364db0fefc5SAdrian Hunter pdata->slots[0].get_cover_state = 365db0fefc5SAdrian Hunter omap_hsmmc_get_cover_state; 366db0fefc5SAdrian Hunter else 367db0fefc5SAdrian Hunter pdata->slots[0].card_detect = omap_hsmmc_card_detect; 368db0fefc5SAdrian Hunter pdata->slots[0].card_detect_irq = 369db0fefc5SAdrian Hunter gpio_to_irq(pdata->slots[0].switch_pin); 370db0fefc5SAdrian Hunter ret = gpio_request(pdata->slots[0].switch_pin, "mmc_cd"); 371db0fefc5SAdrian Hunter if (ret) 372db0fefc5SAdrian Hunter return ret; 373db0fefc5SAdrian Hunter ret = gpio_direction_input(pdata->slots[0].switch_pin); 374db0fefc5SAdrian Hunter if (ret) 375db0fefc5SAdrian Hunter goto err_free_sp; 376db0fefc5SAdrian Hunter } else 377db0fefc5SAdrian Hunter pdata->slots[0].switch_pin = -EINVAL; 378db0fefc5SAdrian Hunter 379db0fefc5SAdrian Hunter if (gpio_is_valid(pdata->slots[0].gpio_wp)) { 380db0fefc5SAdrian Hunter pdata->slots[0].get_ro = omap_hsmmc_get_wp; 381db0fefc5SAdrian Hunter ret = gpio_request(pdata->slots[0].gpio_wp, "mmc_wp"); 382db0fefc5SAdrian Hunter if (ret) 383db0fefc5SAdrian Hunter goto err_free_cd; 384db0fefc5SAdrian Hunter ret = gpio_direction_input(pdata->slots[0].gpio_wp); 385db0fefc5SAdrian Hunter if (ret) 386db0fefc5SAdrian Hunter goto err_free_wp; 387db0fefc5SAdrian Hunter } else 388db0fefc5SAdrian Hunter pdata->slots[0].gpio_wp = -EINVAL; 389db0fefc5SAdrian Hunter 390db0fefc5SAdrian Hunter return 0; 391db0fefc5SAdrian Hunter 392db0fefc5SAdrian Hunter err_free_wp: 393db0fefc5SAdrian Hunter gpio_free(pdata->slots[0].gpio_wp); 394db0fefc5SAdrian Hunter err_free_cd: 395db0fefc5SAdrian Hunter if (gpio_is_valid(pdata->slots[0].switch_pin)) 396db0fefc5SAdrian Hunter err_free_sp: 397db0fefc5SAdrian Hunter gpio_free(pdata->slots[0].switch_pin); 398db0fefc5SAdrian Hunter return ret; 399db0fefc5SAdrian Hunter } 400db0fefc5SAdrian Hunter 401db0fefc5SAdrian Hunter static void omap_hsmmc_gpio_free(struct omap_mmc_platform_data *pdata) 402db0fefc5SAdrian Hunter { 403db0fefc5SAdrian Hunter if (gpio_is_valid(pdata->slots[0].gpio_wp)) 404db0fefc5SAdrian Hunter gpio_free(pdata->slots[0].gpio_wp); 405db0fefc5SAdrian Hunter if (gpio_is_valid(pdata->slots[0].switch_pin)) 406db0fefc5SAdrian Hunter gpio_free(pdata->slots[0].switch_pin); 407db0fefc5SAdrian Hunter } 408db0fefc5SAdrian Hunter 409db0fefc5SAdrian Hunter static int omap_hsmmc_reg_get(struct omap_hsmmc_host *host) 410db0fefc5SAdrian Hunter { 411db0fefc5SAdrian Hunter struct regulator *reg; 412db0fefc5SAdrian Hunter int ret = 0; 413db0fefc5SAdrian Hunter 414db0fefc5SAdrian Hunter switch (host->id) { 415db0fefc5SAdrian Hunter case OMAP_MMC1_DEVID: 416db0fefc5SAdrian Hunter /* On-chip level shifting via PBIAS0/PBIAS1 */ 417db0fefc5SAdrian Hunter mmc_slot(host).set_power = omap_hsmmc_1_set_power; 418db0fefc5SAdrian Hunter mmc_slot(host).set_sleep = omap_hsmmc_1_set_sleep; 419db0fefc5SAdrian Hunter break; 420db0fefc5SAdrian Hunter case OMAP_MMC2_DEVID: 421db0fefc5SAdrian Hunter case OMAP_MMC3_DEVID: 422db0fefc5SAdrian Hunter /* Off-chip level shifting, or none */ 423db0fefc5SAdrian Hunter mmc_slot(host).set_power = omap_hsmmc_23_set_power; 424db0fefc5SAdrian Hunter mmc_slot(host).set_sleep = omap_hsmmc_23_set_sleep; 425db0fefc5SAdrian Hunter break; 426db0fefc5SAdrian Hunter default: 427db0fefc5SAdrian Hunter pr_err("MMC%d configuration not supported!\n", host->id); 428db0fefc5SAdrian Hunter return -EINVAL; 429db0fefc5SAdrian Hunter } 430db0fefc5SAdrian Hunter 431db0fefc5SAdrian Hunter reg = regulator_get(host->dev, "vmmc"); 432db0fefc5SAdrian Hunter if (IS_ERR(reg)) { 433db0fefc5SAdrian Hunter dev_dbg(host->dev, "vmmc regulator missing\n"); 434db0fefc5SAdrian Hunter /* 435db0fefc5SAdrian Hunter * HACK: until fixed.c regulator is usable, 436db0fefc5SAdrian Hunter * we don't require a main regulator 437db0fefc5SAdrian Hunter * for MMC2 or MMC3 438db0fefc5SAdrian Hunter */ 439db0fefc5SAdrian Hunter if (host->id == OMAP_MMC1_DEVID) { 440db0fefc5SAdrian Hunter ret = PTR_ERR(reg); 441db0fefc5SAdrian Hunter goto err; 442db0fefc5SAdrian Hunter } 443db0fefc5SAdrian Hunter } else { 444db0fefc5SAdrian Hunter host->vcc = reg; 445db0fefc5SAdrian Hunter mmc_slot(host).ocr_mask = mmc_regulator_get_ocrmask(reg); 446db0fefc5SAdrian Hunter 447db0fefc5SAdrian Hunter /* Allow an aux regulator */ 448db0fefc5SAdrian Hunter reg = regulator_get(host->dev, "vmmc_aux"); 449db0fefc5SAdrian Hunter host->vcc_aux = IS_ERR(reg) ? NULL : reg; 450db0fefc5SAdrian Hunter 451db0fefc5SAdrian Hunter /* 452db0fefc5SAdrian Hunter * UGLY HACK: workaround regulator framework bugs. 453db0fefc5SAdrian Hunter * When the bootloader leaves a supply active, it's 454db0fefc5SAdrian Hunter * initialized with zero usecount ... and we can't 455db0fefc5SAdrian Hunter * disable it without first enabling it. Until the 456db0fefc5SAdrian Hunter * framework is fixed, we need a workaround like this 457db0fefc5SAdrian Hunter * (which is safe for MMC, but not in general). 458db0fefc5SAdrian Hunter */ 459db0fefc5SAdrian Hunter if (regulator_is_enabled(host->vcc) > 0) { 460db0fefc5SAdrian Hunter regulator_enable(host->vcc); 461db0fefc5SAdrian Hunter regulator_disable(host->vcc); 462db0fefc5SAdrian Hunter } 463db0fefc5SAdrian Hunter if (host->vcc_aux) { 464db0fefc5SAdrian Hunter if (regulator_is_enabled(reg) > 0) { 465db0fefc5SAdrian Hunter regulator_enable(reg); 466db0fefc5SAdrian Hunter regulator_disable(reg); 467db0fefc5SAdrian Hunter } 468db0fefc5SAdrian Hunter } 469db0fefc5SAdrian Hunter } 470db0fefc5SAdrian Hunter 471db0fefc5SAdrian Hunter return 0; 472db0fefc5SAdrian Hunter 473db0fefc5SAdrian Hunter err: 474db0fefc5SAdrian Hunter mmc_slot(host).set_power = NULL; 475db0fefc5SAdrian Hunter mmc_slot(host).set_sleep = NULL; 476db0fefc5SAdrian Hunter return ret; 477db0fefc5SAdrian Hunter } 478db0fefc5SAdrian Hunter 479db0fefc5SAdrian Hunter static void omap_hsmmc_reg_put(struct omap_hsmmc_host *host) 480db0fefc5SAdrian Hunter { 481db0fefc5SAdrian Hunter regulator_put(host->vcc); 482db0fefc5SAdrian Hunter regulator_put(host->vcc_aux); 483db0fefc5SAdrian Hunter mmc_slot(host).set_power = NULL; 484db0fefc5SAdrian Hunter mmc_slot(host).set_sleep = NULL; 485db0fefc5SAdrian Hunter } 486db0fefc5SAdrian Hunter 487a45c6cb8SMadhusudhan Chikkature /* 488a45c6cb8SMadhusudhan Chikkature * Stop clock to the card 489a45c6cb8SMadhusudhan Chikkature */ 49070a3341aSDenis Karpov static void omap_hsmmc_stop_clock(struct omap_hsmmc_host *host) 491a45c6cb8SMadhusudhan Chikkature { 492a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, 493a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, SYSCTL) & ~CEN); 494a45c6cb8SMadhusudhan Chikkature if ((OMAP_HSMMC_READ(host->base, SYSCTL) & CEN) != 0x0) 495a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "MMC Clock is not stoped\n"); 496a45c6cb8SMadhusudhan Chikkature } 497a45c6cb8SMadhusudhan Chikkature 49811dd62a7SDenis Karpov #ifdef CONFIG_PM 49911dd62a7SDenis Karpov 50011dd62a7SDenis Karpov /* 50111dd62a7SDenis Karpov * Restore the MMC host context, if it was lost as result of a 50211dd62a7SDenis Karpov * power state change. 50311dd62a7SDenis Karpov */ 50470a3341aSDenis Karpov static int omap_hsmmc_context_restore(struct omap_hsmmc_host *host) 50511dd62a7SDenis Karpov { 50611dd62a7SDenis Karpov struct mmc_ios *ios = &host->mmc->ios; 50711dd62a7SDenis Karpov struct omap_mmc_platform_data *pdata = host->pdata; 50811dd62a7SDenis Karpov int context_loss = 0; 50911dd62a7SDenis Karpov u32 hctl, capa, con; 51011dd62a7SDenis Karpov u16 dsor = 0; 51111dd62a7SDenis Karpov unsigned long timeout; 51211dd62a7SDenis Karpov 51311dd62a7SDenis Karpov if (pdata->get_context_loss_count) { 51411dd62a7SDenis Karpov context_loss = pdata->get_context_loss_count(host->dev); 51511dd62a7SDenis Karpov if (context_loss < 0) 51611dd62a7SDenis Karpov return 1; 51711dd62a7SDenis Karpov } 51811dd62a7SDenis Karpov 51911dd62a7SDenis Karpov dev_dbg(mmc_dev(host->mmc), "context was %slost\n", 52011dd62a7SDenis Karpov context_loss == host->context_loss ? "not " : ""); 52111dd62a7SDenis Karpov if (host->context_loss == context_loss) 52211dd62a7SDenis Karpov return 1; 52311dd62a7SDenis Karpov 52411dd62a7SDenis Karpov /* Wait for hardware reset */ 52511dd62a7SDenis Karpov timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 52611dd62a7SDenis Karpov while ((OMAP_HSMMC_READ(host->base, SYSSTATUS) & RESETDONE) != RESETDONE 52711dd62a7SDenis Karpov && time_before(jiffies, timeout)) 52811dd62a7SDenis Karpov ; 52911dd62a7SDenis Karpov 53011dd62a7SDenis Karpov /* Do software reset */ 53111dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, SYSCONFIG, SOFTRESET); 53211dd62a7SDenis Karpov timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 53311dd62a7SDenis Karpov while ((OMAP_HSMMC_READ(host->base, SYSSTATUS) & RESETDONE) != RESETDONE 53411dd62a7SDenis Karpov && time_before(jiffies, timeout)) 53511dd62a7SDenis Karpov ; 53611dd62a7SDenis Karpov 53711dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, SYSCONFIG, 53811dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCONFIG) | AUTOIDLE); 53911dd62a7SDenis Karpov 54011dd62a7SDenis Karpov if (host->id == OMAP_MMC1_DEVID) { 54111dd62a7SDenis Karpov if (host->power_mode != MMC_POWER_OFF && 54211dd62a7SDenis Karpov (1 << ios->vdd) <= MMC_VDD_23_24) 54311dd62a7SDenis Karpov hctl = SDVS18; 54411dd62a7SDenis Karpov else 54511dd62a7SDenis Karpov hctl = SDVS30; 54611dd62a7SDenis Karpov capa = VS30 | VS18; 54711dd62a7SDenis Karpov } else { 54811dd62a7SDenis Karpov hctl = SDVS18; 54911dd62a7SDenis Karpov capa = VS18; 55011dd62a7SDenis Karpov } 55111dd62a7SDenis Karpov 55211dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, HCTL, 55311dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, HCTL) | hctl); 55411dd62a7SDenis Karpov 55511dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, CAPA, 55611dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, CAPA) | capa); 55711dd62a7SDenis Karpov 55811dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, HCTL, 55911dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, HCTL) | SDBP); 56011dd62a7SDenis Karpov 56111dd62a7SDenis Karpov timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 56211dd62a7SDenis Karpov while ((OMAP_HSMMC_READ(host->base, HCTL) & SDBP) != SDBP 56311dd62a7SDenis Karpov && time_before(jiffies, timeout)) 56411dd62a7SDenis Karpov ; 56511dd62a7SDenis Karpov 56611dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); 56711dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK); 56811dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK); 56911dd62a7SDenis Karpov 57011dd62a7SDenis Karpov /* Do not initialize card-specific things if the power is off */ 57111dd62a7SDenis Karpov if (host->power_mode == MMC_POWER_OFF) 57211dd62a7SDenis Karpov goto out; 57311dd62a7SDenis Karpov 57411dd62a7SDenis Karpov con = OMAP_HSMMC_READ(host->base, CON); 57511dd62a7SDenis Karpov switch (ios->bus_width) { 57611dd62a7SDenis Karpov case MMC_BUS_WIDTH_8: 57711dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, CON, con | DW8); 57811dd62a7SDenis Karpov break; 57911dd62a7SDenis Karpov case MMC_BUS_WIDTH_4: 58011dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, CON, con & ~DW8); 58111dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, HCTL, 58211dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, HCTL) | FOUR_BIT); 58311dd62a7SDenis Karpov break; 58411dd62a7SDenis Karpov case MMC_BUS_WIDTH_1: 58511dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, CON, con & ~DW8); 58611dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, HCTL, 58711dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, HCTL) & ~FOUR_BIT); 58811dd62a7SDenis Karpov break; 58911dd62a7SDenis Karpov } 59011dd62a7SDenis Karpov 59111dd62a7SDenis Karpov if (ios->clock) { 59211dd62a7SDenis Karpov dsor = OMAP_MMC_MASTER_CLOCK / ios->clock; 59311dd62a7SDenis Karpov if (dsor < 1) 59411dd62a7SDenis Karpov dsor = 1; 59511dd62a7SDenis Karpov 59611dd62a7SDenis Karpov if (OMAP_MMC_MASTER_CLOCK / dsor > ios->clock) 59711dd62a7SDenis Karpov dsor++; 59811dd62a7SDenis Karpov 59911dd62a7SDenis Karpov if (dsor > 250) 60011dd62a7SDenis Karpov dsor = 250; 60111dd62a7SDenis Karpov } 60211dd62a7SDenis Karpov 60311dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, SYSCTL, 60411dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCTL) & ~CEN); 60511dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, SYSCTL, (dsor << 6) | (DTO << 16)); 60611dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, SYSCTL, 60711dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCTL) | ICE); 60811dd62a7SDenis Karpov 60911dd62a7SDenis Karpov timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 61011dd62a7SDenis Karpov while ((OMAP_HSMMC_READ(host->base, SYSCTL) & ICS) != ICS 61111dd62a7SDenis Karpov && time_before(jiffies, timeout)) 61211dd62a7SDenis Karpov ; 61311dd62a7SDenis Karpov 61411dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, SYSCTL, 61511dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCTL) | CEN); 61611dd62a7SDenis Karpov 61711dd62a7SDenis Karpov con = OMAP_HSMMC_READ(host->base, CON); 61811dd62a7SDenis Karpov if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN) 61911dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, CON, con | OD); 62011dd62a7SDenis Karpov else 62111dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, CON, con & ~OD); 62211dd62a7SDenis Karpov out: 62311dd62a7SDenis Karpov host->context_loss = context_loss; 62411dd62a7SDenis Karpov 62511dd62a7SDenis Karpov dev_dbg(mmc_dev(host->mmc), "context is restored\n"); 62611dd62a7SDenis Karpov return 0; 62711dd62a7SDenis Karpov } 62811dd62a7SDenis Karpov 62911dd62a7SDenis Karpov /* 63011dd62a7SDenis Karpov * Save the MMC host context (store the number of power state changes so far). 63111dd62a7SDenis Karpov */ 63270a3341aSDenis Karpov static void omap_hsmmc_context_save(struct omap_hsmmc_host *host) 63311dd62a7SDenis Karpov { 63411dd62a7SDenis Karpov struct omap_mmc_platform_data *pdata = host->pdata; 63511dd62a7SDenis Karpov int context_loss; 63611dd62a7SDenis Karpov 63711dd62a7SDenis Karpov if (pdata->get_context_loss_count) { 63811dd62a7SDenis Karpov context_loss = pdata->get_context_loss_count(host->dev); 63911dd62a7SDenis Karpov if (context_loss < 0) 64011dd62a7SDenis Karpov return; 64111dd62a7SDenis Karpov host->context_loss = context_loss; 64211dd62a7SDenis Karpov } 64311dd62a7SDenis Karpov } 64411dd62a7SDenis Karpov 64511dd62a7SDenis Karpov #else 64611dd62a7SDenis Karpov 64770a3341aSDenis Karpov static int omap_hsmmc_context_restore(struct omap_hsmmc_host *host) 64811dd62a7SDenis Karpov { 64911dd62a7SDenis Karpov return 0; 65011dd62a7SDenis Karpov } 65111dd62a7SDenis Karpov 65270a3341aSDenis Karpov static void omap_hsmmc_context_save(struct omap_hsmmc_host *host) 65311dd62a7SDenis Karpov { 65411dd62a7SDenis Karpov } 65511dd62a7SDenis Karpov 65611dd62a7SDenis Karpov #endif 65711dd62a7SDenis Karpov 658a45c6cb8SMadhusudhan Chikkature /* 659a45c6cb8SMadhusudhan Chikkature * Send init stream sequence to card 660a45c6cb8SMadhusudhan Chikkature * before sending IDLE command 661a45c6cb8SMadhusudhan Chikkature */ 66270a3341aSDenis Karpov static void send_init_stream(struct omap_hsmmc_host *host) 663a45c6cb8SMadhusudhan Chikkature { 664a45c6cb8SMadhusudhan Chikkature int reg = 0; 665a45c6cb8SMadhusudhan Chikkature unsigned long timeout; 666a45c6cb8SMadhusudhan Chikkature 667b62f6228SAdrian Hunter if (host->protect_card) 668b62f6228SAdrian Hunter return; 669b62f6228SAdrian Hunter 670a45c6cb8SMadhusudhan Chikkature disable_irq(host->irq); 671a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CON, 672a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, CON) | INIT_STREAM); 673a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CMD, INIT_STREAM_CMD); 674a45c6cb8SMadhusudhan Chikkature 675a45c6cb8SMadhusudhan Chikkature timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 676a45c6cb8SMadhusudhan Chikkature while ((reg != CC) && time_before(jiffies, timeout)) 677a45c6cb8SMadhusudhan Chikkature reg = OMAP_HSMMC_READ(host->base, STAT) & CC; 678a45c6cb8SMadhusudhan Chikkature 679a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CON, 680a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, CON) & ~INIT_STREAM); 681c653a6d4SAdrian Hunter 682c653a6d4SAdrian Hunter OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); 683c653a6d4SAdrian Hunter OMAP_HSMMC_READ(host->base, STAT); 684c653a6d4SAdrian Hunter 685a45c6cb8SMadhusudhan Chikkature enable_irq(host->irq); 686a45c6cb8SMadhusudhan Chikkature } 687a45c6cb8SMadhusudhan Chikkature 688a45c6cb8SMadhusudhan Chikkature static inline 68970a3341aSDenis Karpov int omap_hsmmc_cover_is_closed(struct omap_hsmmc_host *host) 690a45c6cb8SMadhusudhan Chikkature { 691a45c6cb8SMadhusudhan Chikkature int r = 1; 692a45c6cb8SMadhusudhan Chikkature 693191d1f1dSDenis Karpov if (mmc_slot(host).get_cover_state) 694191d1f1dSDenis Karpov r = mmc_slot(host).get_cover_state(host->dev, host->slot_id); 695a45c6cb8SMadhusudhan Chikkature return r; 696a45c6cb8SMadhusudhan Chikkature } 697a45c6cb8SMadhusudhan Chikkature 698a45c6cb8SMadhusudhan Chikkature static ssize_t 69970a3341aSDenis Karpov omap_hsmmc_show_cover_switch(struct device *dev, struct device_attribute *attr, 700a45c6cb8SMadhusudhan Chikkature char *buf) 701a45c6cb8SMadhusudhan Chikkature { 702a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev); 70370a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 704a45c6cb8SMadhusudhan Chikkature 70570a3341aSDenis Karpov return sprintf(buf, "%s\n", 70670a3341aSDenis Karpov omap_hsmmc_cover_is_closed(host) ? "closed" : "open"); 707a45c6cb8SMadhusudhan Chikkature } 708a45c6cb8SMadhusudhan Chikkature 70970a3341aSDenis Karpov static DEVICE_ATTR(cover_switch, S_IRUGO, omap_hsmmc_show_cover_switch, NULL); 710a45c6cb8SMadhusudhan Chikkature 711a45c6cb8SMadhusudhan Chikkature static ssize_t 71270a3341aSDenis Karpov omap_hsmmc_show_slot_name(struct device *dev, struct device_attribute *attr, 713a45c6cb8SMadhusudhan Chikkature char *buf) 714a45c6cb8SMadhusudhan Chikkature { 715a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev); 71670a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 717a45c6cb8SMadhusudhan Chikkature 718191d1f1dSDenis Karpov return sprintf(buf, "%s\n", mmc_slot(host).name); 719a45c6cb8SMadhusudhan Chikkature } 720a45c6cb8SMadhusudhan Chikkature 72170a3341aSDenis Karpov static DEVICE_ATTR(slot_name, S_IRUGO, omap_hsmmc_show_slot_name, NULL); 722a45c6cb8SMadhusudhan Chikkature 723a45c6cb8SMadhusudhan Chikkature /* 724a45c6cb8SMadhusudhan Chikkature * Configure the response type and send the cmd. 725a45c6cb8SMadhusudhan Chikkature */ 726a45c6cb8SMadhusudhan Chikkature static void 72770a3341aSDenis Karpov omap_hsmmc_start_command(struct omap_hsmmc_host *host, struct mmc_command *cmd, 728a45c6cb8SMadhusudhan Chikkature struct mmc_data *data) 729a45c6cb8SMadhusudhan Chikkature { 730a45c6cb8SMadhusudhan Chikkature int cmdreg = 0, resptype = 0, cmdtype = 0; 731a45c6cb8SMadhusudhan Chikkature 732a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "%s: CMD%d, argument 0x%08x\n", 733a45c6cb8SMadhusudhan Chikkature mmc_hostname(host->mmc), cmd->opcode, cmd->arg); 734a45c6cb8SMadhusudhan Chikkature host->cmd = cmd; 735a45c6cb8SMadhusudhan Chikkature 736a45c6cb8SMadhusudhan Chikkature /* 737a45c6cb8SMadhusudhan Chikkature * Clear status bits and enable interrupts 738a45c6cb8SMadhusudhan Chikkature */ 739a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); 740a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK); 741ccdfe3a6SAnand Gadiyar 742ccdfe3a6SAnand Gadiyar if (host->use_dma) 743ccdfe3a6SAnand Gadiyar OMAP_HSMMC_WRITE(host->base, IE, 744ccdfe3a6SAnand Gadiyar INT_EN_MASK & ~(BRR_ENABLE | BWR_ENABLE)); 745ccdfe3a6SAnand Gadiyar else 746a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK); 747a45c6cb8SMadhusudhan Chikkature 7484a694dc9SAdrian Hunter host->response_busy = 0; 749a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_PRESENT) { 750a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_136) 751a45c6cb8SMadhusudhan Chikkature resptype = 1; 7524a694dc9SAdrian Hunter else if (cmd->flags & MMC_RSP_BUSY) { 7534a694dc9SAdrian Hunter resptype = 3; 7544a694dc9SAdrian Hunter host->response_busy = 1; 7554a694dc9SAdrian Hunter } else 756a45c6cb8SMadhusudhan Chikkature resptype = 2; 757a45c6cb8SMadhusudhan Chikkature } 758a45c6cb8SMadhusudhan Chikkature 759a45c6cb8SMadhusudhan Chikkature /* 760a45c6cb8SMadhusudhan Chikkature * Unlike OMAP1 controller, the cmdtype does not seem to be based on 761a45c6cb8SMadhusudhan Chikkature * ac, bc, adtc, bcr. Only commands ending an open ended transfer need 762a45c6cb8SMadhusudhan Chikkature * a val of 0x3, rest 0x0. 763a45c6cb8SMadhusudhan Chikkature */ 764a45c6cb8SMadhusudhan Chikkature if (cmd == host->mrq->stop) 765a45c6cb8SMadhusudhan Chikkature cmdtype = 0x3; 766a45c6cb8SMadhusudhan Chikkature 767a45c6cb8SMadhusudhan Chikkature cmdreg = (cmd->opcode << 24) | (resptype << 16) | (cmdtype << 22); 768a45c6cb8SMadhusudhan Chikkature 769a45c6cb8SMadhusudhan Chikkature if (data) { 770a45c6cb8SMadhusudhan Chikkature cmdreg |= DP_SELECT | MSBS | BCE; 771a45c6cb8SMadhusudhan Chikkature if (data->flags & MMC_DATA_READ) 772a45c6cb8SMadhusudhan Chikkature cmdreg |= DDIR; 773a45c6cb8SMadhusudhan Chikkature else 774a45c6cb8SMadhusudhan Chikkature cmdreg &= ~(DDIR); 775a45c6cb8SMadhusudhan Chikkature } 776a45c6cb8SMadhusudhan Chikkature 777a45c6cb8SMadhusudhan Chikkature if (host->use_dma) 778a45c6cb8SMadhusudhan Chikkature cmdreg |= DMA_EN; 779a45c6cb8SMadhusudhan Chikkature 7804dffd7a2SAdrian Hunter /* 7814dffd7a2SAdrian Hunter * In an interrupt context (i.e. STOP command), the spinlock is unlocked 7824dffd7a2SAdrian Hunter * by the interrupt handler, otherwise (i.e. for a new request) it is 7834dffd7a2SAdrian Hunter * unlocked here. 7844dffd7a2SAdrian Hunter */ 7854dffd7a2SAdrian Hunter if (!in_interrupt()) 7864dffd7a2SAdrian Hunter spin_unlock_irqrestore(&host->irq_lock, host->flags); 7874dffd7a2SAdrian Hunter 788a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, ARG, cmd->arg); 789a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CMD, cmdreg); 790a45c6cb8SMadhusudhan Chikkature } 791a45c6cb8SMadhusudhan Chikkature 7920ccd76d4SJuha Yrjola static int 79370a3341aSDenis Karpov omap_hsmmc_get_dma_dir(struct omap_hsmmc_host *host, struct mmc_data *data) 7940ccd76d4SJuha Yrjola { 7950ccd76d4SJuha Yrjola if (data->flags & MMC_DATA_WRITE) 7960ccd76d4SJuha Yrjola return DMA_TO_DEVICE; 7970ccd76d4SJuha Yrjola else 7980ccd76d4SJuha Yrjola return DMA_FROM_DEVICE; 7990ccd76d4SJuha Yrjola } 8000ccd76d4SJuha Yrjola 801a45c6cb8SMadhusudhan Chikkature /* 802a45c6cb8SMadhusudhan Chikkature * Notify the transfer complete to MMC core 803a45c6cb8SMadhusudhan Chikkature */ 804a45c6cb8SMadhusudhan Chikkature static void 80570a3341aSDenis Karpov omap_hsmmc_xfer_done(struct omap_hsmmc_host *host, struct mmc_data *data) 806a45c6cb8SMadhusudhan Chikkature { 8074a694dc9SAdrian Hunter if (!data) { 8084a694dc9SAdrian Hunter struct mmc_request *mrq = host->mrq; 8094a694dc9SAdrian Hunter 81023050103SAdrian Hunter /* TC before CC from CMD6 - don't know why, but it happens */ 81123050103SAdrian Hunter if (host->cmd && host->cmd->opcode == 6 && 81223050103SAdrian Hunter host->response_busy) { 81323050103SAdrian Hunter host->response_busy = 0; 81423050103SAdrian Hunter return; 81523050103SAdrian Hunter } 81623050103SAdrian Hunter 8174a694dc9SAdrian Hunter host->mrq = NULL; 8184a694dc9SAdrian Hunter mmc_request_done(host->mmc, mrq); 8194a694dc9SAdrian Hunter return; 8204a694dc9SAdrian Hunter } 8214a694dc9SAdrian Hunter 822a45c6cb8SMadhusudhan Chikkature host->data = NULL; 823a45c6cb8SMadhusudhan Chikkature 824a45c6cb8SMadhusudhan Chikkature if (host->use_dma && host->dma_ch != -1) 825a45c6cb8SMadhusudhan Chikkature dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->dma_len, 82670a3341aSDenis Karpov omap_hsmmc_get_dma_dir(host, data)); 827a45c6cb8SMadhusudhan Chikkature 828a45c6cb8SMadhusudhan Chikkature if (!data->error) 829a45c6cb8SMadhusudhan Chikkature data->bytes_xfered += data->blocks * (data->blksz); 830a45c6cb8SMadhusudhan Chikkature else 831a45c6cb8SMadhusudhan Chikkature data->bytes_xfered = 0; 832a45c6cb8SMadhusudhan Chikkature 833a45c6cb8SMadhusudhan Chikkature if (!data->stop) { 834a45c6cb8SMadhusudhan Chikkature host->mrq = NULL; 835a45c6cb8SMadhusudhan Chikkature mmc_request_done(host->mmc, data->mrq); 836a45c6cb8SMadhusudhan Chikkature return; 837a45c6cb8SMadhusudhan Chikkature } 83870a3341aSDenis Karpov omap_hsmmc_start_command(host, data->stop, NULL); 839a45c6cb8SMadhusudhan Chikkature } 840a45c6cb8SMadhusudhan Chikkature 841a45c6cb8SMadhusudhan Chikkature /* 842a45c6cb8SMadhusudhan Chikkature * Notify the core about command completion 843a45c6cb8SMadhusudhan Chikkature */ 844a45c6cb8SMadhusudhan Chikkature static void 84570a3341aSDenis Karpov omap_hsmmc_cmd_done(struct omap_hsmmc_host *host, struct mmc_command *cmd) 846a45c6cb8SMadhusudhan Chikkature { 847a45c6cb8SMadhusudhan Chikkature host->cmd = NULL; 848a45c6cb8SMadhusudhan Chikkature 849a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_PRESENT) { 850a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_136) { 851a45c6cb8SMadhusudhan Chikkature /* response type 2 */ 852a45c6cb8SMadhusudhan Chikkature cmd->resp[3] = OMAP_HSMMC_READ(host->base, RSP10); 853a45c6cb8SMadhusudhan Chikkature cmd->resp[2] = OMAP_HSMMC_READ(host->base, RSP32); 854a45c6cb8SMadhusudhan Chikkature cmd->resp[1] = OMAP_HSMMC_READ(host->base, RSP54); 855a45c6cb8SMadhusudhan Chikkature cmd->resp[0] = OMAP_HSMMC_READ(host->base, RSP76); 856a45c6cb8SMadhusudhan Chikkature } else { 857a45c6cb8SMadhusudhan Chikkature /* response types 1, 1b, 3, 4, 5, 6 */ 858a45c6cb8SMadhusudhan Chikkature cmd->resp[0] = OMAP_HSMMC_READ(host->base, RSP10); 859a45c6cb8SMadhusudhan Chikkature } 860a45c6cb8SMadhusudhan Chikkature } 8614a694dc9SAdrian Hunter if ((host->data == NULL && !host->response_busy) || cmd->error) { 862a45c6cb8SMadhusudhan Chikkature host->mrq = NULL; 863a45c6cb8SMadhusudhan Chikkature mmc_request_done(host->mmc, cmd->mrq); 864a45c6cb8SMadhusudhan Chikkature } 865a45c6cb8SMadhusudhan Chikkature } 866a45c6cb8SMadhusudhan Chikkature 867a45c6cb8SMadhusudhan Chikkature /* 868a45c6cb8SMadhusudhan Chikkature * DMA clean up for command errors 869a45c6cb8SMadhusudhan Chikkature */ 87070a3341aSDenis Karpov static void omap_hsmmc_dma_cleanup(struct omap_hsmmc_host *host, int errno) 871a45c6cb8SMadhusudhan Chikkature { 87282788ff5SJarkko Lavinen host->data->error = errno; 873a45c6cb8SMadhusudhan Chikkature 874a45c6cb8SMadhusudhan Chikkature if (host->use_dma && host->dma_ch != -1) { 875a45c6cb8SMadhusudhan Chikkature dma_unmap_sg(mmc_dev(host->mmc), host->data->sg, host->dma_len, 87670a3341aSDenis Karpov omap_hsmmc_get_dma_dir(host, host->data)); 877a45c6cb8SMadhusudhan Chikkature omap_free_dma(host->dma_ch); 878a45c6cb8SMadhusudhan Chikkature host->dma_ch = -1; 879a45c6cb8SMadhusudhan Chikkature up(&host->sem); 880a45c6cb8SMadhusudhan Chikkature } 881a45c6cb8SMadhusudhan Chikkature host->data = NULL; 882a45c6cb8SMadhusudhan Chikkature } 883a45c6cb8SMadhusudhan Chikkature 884a45c6cb8SMadhusudhan Chikkature /* 885a45c6cb8SMadhusudhan Chikkature * Readable error output 886a45c6cb8SMadhusudhan Chikkature */ 887a45c6cb8SMadhusudhan Chikkature #ifdef CONFIG_MMC_DEBUG 88870a3341aSDenis Karpov static void omap_hsmmc_report_irq(struct omap_hsmmc_host *host, u32 status) 889a45c6cb8SMadhusudhan Chikkature { 890a45c6cb8SMadhusudhan Chikkature /* --- means reserved bit without definition at documentation */ 89170a3341aSDenis Karpov static const char *omap_hsmmc_status_bits[] = { 892a45c6cb8SMadhusudhan Chikkature "CC", "TC", "BGE", "---", "BWR", "BRR", "---", "---", "CIRQ", 893a45c6cb8SMadhusudhan Chikkature "OBI", "---", "---", "---", "---", "---", "ERRI", "CTO", "CCRC", 894a45c6cb8SMadhusudhan Chikkature "CEB", "CIE", "DTO", "DCRC", "DEB", "---", "ACE", "---", 895a45c6cb8SMadhusudhan Chikkature "---", "---", "---", "CERR", "CERR", "BADA", "---", "---", "---" 896a45c6cb8SMadhusudhan Chikkature }; 897a45c6cb8SMadhusudhan Chikkature char res[256]; 898a45c6cb8SMadhusudhan Chikkature char *buf = res; 899a45c6cb8SMadhusudhan Chikkature int len, i; 900a45c6cb8SMadhusudhan Chikkature 901a45c6cb8SMadhusudhan Chikkature len = sprintf(buf, "MMC IRQ 0x%x :", status); 902a45c6cb8SMadhusudhan Chikkature buf += len; 903a45c6cb8SMadhusudhan Chikkature 90470a3341aSDenis Karpov for (i = 0; i < ARRAY_SIZE(omap_hsmmc_status_bits); i++) 905a45c6cb8SMadhusudhan Chikkature if (status & (1 << i)) { 90670a3341aSDenis Karpov len = sprintf(buf, " %s", omap_hsmmc_status_bits[i]); 907a45c6cb8SMadhusudhan Chikkature buf += len; 908a45c6cb8SMadhusudhan Chikkature } 909a45c6cb8SMadhusudhan Chikkature 910a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "%s\n", res); 911a45c6cb8SMadhusudhan Chikkature } 912a45c6cb8SMadhusudhan Chikkature #endif /* CONFIG_MMC_DEBUG */ 913a45c6cb8SMadhusudhan Chikkature 9143ebf74b1SJean Pihet /* 9153ebf74b1SJean Pihet * MMC controller internal state machines reset 9163ebf74b1SJean Pihet * 9173ebf74b1SJean Pihet * Used to reset command or data internal state machines, using respectively 9183ebf74b1SJean Pihet * SRC or SRD bit of SYSCTL register 9193ebf74b1SJean Pihet * Can be called from interrupt context 9203ebf74b1SJean Pihet */ 92170a3341aSDenis Karpov static inline void omap_hsmmc_reset_controller_fsm(struct omap_hsmmc_host *host, 9223ebf74b1SJean Pihet unsigned long bit) 9233ebf74b1SJean Pihet { 9243ebf74b1SJean Pihet unsigned long i = 0; 9253ebf74b1SJean Pihet unsigned long limit = (loops_per_jiffy * 9263ebf74b1SJean Pihet msecs_to_jiffies(MMC_TIMEOUT_MS)); 9273ebf74b1SJean Pihet 9283ebf74b1SJean Pihet OMAP_HSMMC_WRITE(host->base, SYSCTL, 9293ebf74b1SJean Pihet OMAP_HSMMC_READ(host->base, SYSCTL) | bit); 9303ebf74b1SJean Pihet 9313ebf74b1SJean Pihet while ((OMAP_HSMMC_READ(host->base, SYSCTL) & bit) && 9323ebf74b1SJean Pihet (i++ < limit)) 9333ebf74b1SJean Pihet cpu_relax(); 9343ebf74b1SJean Pihet 9353ebf74b1SJean Pihet if (OMAP_HSMMC_READ(host->base, SYSCTL) & bit) 9363ebf74b1SJean Pihet dev_err(mmc_dev(host->mmc), 9373ebf74b1SJean Pihet "Timeout waiting on controller reset in %s\n", 9383ebf74b1SJean Pihet __func__); 9393ebf74b1SJean Pihet } 940a45c6cb8SMadhusudhan Chikkature 941a45c6cb8SMadhusudhan Chikkature /* 942a45c6cb8SMadhusudhan Chikkature * MMC controller IRQ handler 943a45c6cb8SMadhusudhan Chikkature */ 94470a3341aSDenis Karpov static irqreturn_t omap_hsmmc_irq(int irq, void *dev_id) 945a45c6cb8SMadhusudhan Chikkature { 94670a3341aSDenis Karpov struct omap_hsmmc_host *host = dev_id; 947a45c6cb8SMadhusudhan Chikkature struct mmc_data *data; 948a45c6cb8SMadhusudhan Chikkature int end_cmd = 0, end_trans = 0, status; 949a45c6cb8SMadhusudhan Chikkature 9504dffd7a2SAdrian Hunter spin_lock(&host->irq_lock); 9514dffd7a2SAdrian Hunter 9524a694dc9SAdrian Hunter if (host->mrq == NULL) { 953a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, STAT, 954a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, STAT)); 95500adadc1SKevin Hilman /* Flush posted write */ 95600adadc1SKevin Hilman OMAP_HSMMC_READ(host->base, STAT); 9574dffd7a2SAdrian Hunter spin_unlock(&host->irq_lock); 958a45c6cb8SMadhusudhan Chikkature return IRQ_HANDLED; 959a45c6cb8SMadhusudhan Chikkature } 960a45c6cb8SMadhusudhan Chikkature 961a45c6cb8SMadhusudhan Chikkature data = host->data; 962a45c6cb8SMadhusudhan Chikkature status = OMAP_HSMMC_READ(host->base, STAT); 963a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "IRQ Status is %x\n", status); 964a45c6cb8SMadhusudhan Chikkature 965a45c6cb8SMadhusudhan Chikkature if (status & ERR) { 966a45c6cb8SMadhusudhan Chikkature #ifdef CONFIG_MMC_DEBUG 96770a3341aSDenis Karpov omap_hsmmc_report_irq(host, status); 968a45c6cb8SMadhusudhan Chikkature #endif 969a45c6cb8SMadhusudhan Chikkature if ((status & CMD_TIMEOUT) || 970a45c6cb8SMadhusudhan Chikkature (status & CMD_CRC)) { 971a45c6cb8SMadhusudhan Chikkature if (host->cmd) { 972a45c6cb8SMadhusudhan Chikkature if (status & CMD_TIMEOUT) { 97370a3341aSDenis Karpov omap_hsmmc_reset_controller_fsm(host, 974191d1f1dSDenis Karpov SRC); 975a45c6cb8SMadhusudhan Chikkature host->cmd->error = -ETIMEDOUT; 976a45c6cb8SMadhusudhan Chikkature } else { 977a45c6cb8SMadhusudhan Chikkature host->cmd->error = -EILSEQ; 978a45c6cb8SMadhusudhan Chikkature } 979a45c6cb8SMadhusudhan Chikkature end_cmd = 1; 980a45c6cb8SMadhusudhan Chikkature } 9814a694dc9SAdrian Hunter if (host->data || host->response_busy) { 9824a694dc9SAdrian Hunter if (host->data) 98370a3341aSDenis Karpov omap_hsmmc_dma_cleanup(host, 98470a3341aSDenis Karpov -ETIMEDOUT); 9854a694dc9SAdrian Hunter host->response_busy = 0; 98670a3341aSDenis Karpov omap_hsmmc_reset_controller_fsm(host, SRD); 987c232f457SJean Pihet } 988a45c6cb8SMadhusudhan Chikkature } 989a45c6cb8SMadhusudhan Chikkature if ((status & DATA_TIMEOUT) || 990a45c6cb8SMadhusudhan Chikkature (status & DATA_CRC)) { 9914a694dc9SAdrian Hunter if (host->data || host->response_busy) { 9924a694dc9SAdrian Hunter int err = (status & DATA_TIMEOUT) ? 9934a694dc9SAdrian Hunter -ETIMEDOUT : -EILSEQ; 9944a694dc9SAdrian Hunter 9954a694dc9SAdrian Hunter if (host->data) 99670a3341aSDenis Karpov omap_hsmmc_dma_cleanup(host, err); 997a45c6cb8SMadhusudhan Chikkature else 9984a694dc9SAdrian Hunter host->mrq->cmd->error = err; 9994a694dc9SAdrian Hunter host->response_busy = 0; 100070a3341aSDenis Karpov omap_hsmmc_reset_controller_fsm(host, SRD); 1001a45c6cb8SMadhusudhan Chikkature end_trans = 1; 1002a45c6cb8SMadhusudhan Chikkature } 1003a45c6cb8SMadhusudhan Chikkature } 1004a45c6cb8SMadhusudhan Chikkature if (status & CARD_ERR) { 1005a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1006a45c6cb8SMadhusudhan Chikkature "Ignoring card err CMD%d\n", host->cmd->opcode); 1007a45c6cb8SMadhusudhan Chikkature if (host->cmd) 1008a45c6cb8SMadhusudhan Chikkature end_cmd = 1; 1009a45c6cb8SMadhusudhan Chikkature if (host->data) 1010a45c6cb8SMadhusudhan Chikkature end_trans = 1; 1011a45c6cb8SMadhusudhan Chikkature } 1012a45c6cb8SMadhusudhan Chikkature } 1013a45c6cb8SMadhusudhan Chikkature 1014a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, STAT, status); 101500adadc1SKevin Hilman /* Flush posted write */ 101600adadc1SKevin Hilman OMAP_HSMMC_READ(host->base, STAT); 1017a45c6cb8SMadhusudhan Chikkature 1018a8fe29d8SJarkko Lavinen if (end_cmd || ((status & CC) && host->cmd)) 101970a3341aSDenis Karpov omap_hsmmc_cmd_done(host, host->cmd); 10200a40e647SJarkko Lavinen if ((end_trans || (status & TC)) && host->mrq) 102170a3341aSDenis Karpov omap_hsmmc_xfer_done(host, data); 1022a45c6cb8SMadhusudhan Chikkature 10234dffd7a2SAdrian Hunter spin_unlock(&host->irq_lock); 10244dffd7a2SAdrian Hunter 1025a45c6cb8SMadhusudhan Chikkature return IRQ_HANDLED; 1026a45c6cb8SMadhusudhan Chikkature } 1027a45c6cb8SMadhusudhan Chikkature 102870a3341aSDenis Karpov static void set_sd_bus_power(struct omap_hsmmc_host *host) 1029e13bb300SAdrian Hunter { 1030e13bb300SAdrian Hunter unsigned long i; 1031e13bb300SAdrian Hunter 1032e13bb300SAdrian Hunter OMAP_HSMMC_WRITE(host->base, HCTL, 1033e13bb300SAdrian Hunter OMAP_HSMMC_READ(host->base, HCTL) | SDBP); 1034e13bb300SAdrian Hunter for (i = 0; i < loops_per_jiffy; i++) { 1035e13bb300SAdrian Hunter if (OMAP_HSMMC_READ(host->base, HCTL) & SDBP) 1036e13bb300SAdrian Hunter break; 1037e13bb300SAdrian Hunter cpu_relax(); 1038e13bb300SAdrian Hunter } 1039e13bb300SAdrian Hunter } 1040e13bb300SAdrian Hunter 1041a45c6cb8SMadhusudhan Chikkature /* 1042eb250826SDavid Brownell * Switch MMC interface voltage ... only relevant for MMC1. 1043eb250826SDavid Brownell * 1044eb250826SDavid Brownell * MMC2 and MMC3 use fixed 1.8V levels, and maybe a transceiver. 1045eb250826SDavid Brownell * The MMC2 transceiver controls are used instead of DAT4..DAT7. 1046eb250826SDavid Brownell * Some chips, like eMMC ones, use internal transceivers. 1047a45c6cb8SMadhusudhan Chikkature */ 104870a3341aSDenis Karpov static int omap_hsmmc_switch_opcond(struct omap_hsmmc_host *host, int vdd) 1049a45c6cb8SMadhusudhan Chikkature { 1050a45c6cb8SMadhusudhan Chikkature u32 reg_val = 0; 1051a45c6cb8SMadhusudhan Chikkature int ret; 1052a45c6cb8SMadhusudhan Chikkature 1053a45c6cb8SMadhusudhan Chikkature /* Disable the clocks */ 1054a45c6cb8SMadhusudhan Chikkature clk_disable(host->fclk); 1055a45c6cb8SMadhusudhan Chikkature clk_disable(host->iclk); 10562bec0893SAdrian Hunter if (host->got_dbclk) 1057a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 1058a45c6cb8SMadhusudhan Chikkature 1059a45c6cb8SMadhusudhan Chikkature /* Turn the power off */ 1060a45c6cb8SMadhusudhan Chikkature ret = mmc_slot(host).set_power(host->dev, host->slot_id, 0, 0); 1061a45c6cb8SMadhusudhan Chikkature 1062a45c6cb8SMadhusudhan Chikkature /* Turn the power ON with given VDD 1.8 or 3.0v */ 10632bec0893SAdrian Hunter if (!ret) 10642bec0893SAdrian Hunter ret = mmc_slot(host).set_power(host->dev, host->slot_id, 1, 10652bec0893SAdrian Hunter vdd); 10662bec0893SAdrian Hunter clk_enable(host->iclk); 10672bec0893SAdrian Hunter clk_enable(host->fclk); 10682bec0893SAdrian Hunter if (host->got_dbclk) 10692bec0893SAdrian Hunter clk_enable(host->dbclk); 10702bec0893SAdrian Hunter 1071a45c6cb8SMadhusudhan Chikkature if (ret != 0) 1072a45c6cb8SMadhusudhan Chikkature goto err; 1073a45c6cb8SMadhusudhan Chikkature 1074a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 1075a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) & SDVSCLR); 1076a45c6cb8SMadhusudhan Chikkature reg_val = OMAP_HSMMC_READ(host->base, HCTL); 1077eb250826SDavid Brownell 1078a45c6cb8SMadhusudhan Chikkature /* 1079a45c6cb8SMadhusudhan Chikkature * If a MMC dual voltage card is detected, the set_ios fn calls 1080a45c6cb8SMadhusudhan Chikkature * this fn with VDD bit set for 1.8V. Upon card removal from the 108170a3341aSDenis Karpov * slot, omap_hsmmc_set_ios sets the VDD back to 3V on MMC_POWER_OFF. 1082a45c6cb8SMadhusudhan Chikkature * 1083eb250826SDavid Brownell * Cope with a bit of slop in the range ... per data sheets: 1084eb250826SDavid Brownell * - "1.8V" for vdds_mmc1/vdds_mmc1a can be up to 2.45V max, 1085eb250826SDavid Brownell * but recommended values are 1.71V to 1.89V 1086eb250826SDavid Brownell * - "3.0V" for vdds_mmc1/vdds_mmc1a can be up to 3.5V max, 1087eb250826SDavid Brownell * but recommended values are 2.7V to 3.3V 1088eb250826SDavid Brownell * 1089eb250826SDavid Brownell * Board setup code shouldn't permit anything very out-of-range. 1090eb250826SDavid Brownell * TWL4030-family VMMC1 and VSIM regulators are fine (avoiding the 1091eb250826SDavid Brownell * middle range) but VSIM can't power DAT4..DAT7 at more than 3V. 1092a45c6cb8SMadhusudhan Chikkature */ 1093eb250826SDavid Brownell if ((1 << vdd) <= MMC_VDD_23_24) 1094a45c6cb8SMadhusudhan Chikkature reg_val |= SDVS18; 1095eb250826SDavid Brownell else 1096eb250826SDavid Brownell reg_val |= SDVS30; 1097a45c6cb8SMadhusudhan Chikkature 1098a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, reg_val); 1099e13bb300SAdrian Hunter set_sd_bus_power(host); 1100a45c6cb8SMadhusudhan Chikkature 1101a45c6cb8SMadhusudhan Chikkature return 0; 1102a45c6cb8SMadhusudhan Chikkature err: 1103a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Unable to switch operating voltage\n"); 1104a45c6cb8SMadhusudhan Chikkature return ret; 1105a45c6cb8SMadhusudhan Chikkature } 1106a45c6cb8SMadhusudhan Chikkature 1107b62f6228SAdrian Hunter /* Protect the card while the cover is open */ 1108b62f6228SAdrian Hunter static void omap_hsmmc_protect_card(struct omap_hsmmc_host *host) 1109b62f6228SAdrian Hunter { 1110b62f6228SAdrian Hunter if (!mmc_slot(host).get_cover_state) 1111b62f6228SAdrian Hunter return; 1112b62f6228SAdrian Hunter 1113b62f6228SAdrian Hunter host->reqs_blocked = 0; 1114b62f6228SAdrian Hunter if (mmc_slot(host).get_cover_state(host->dev, host->slot_id)) { 1115b62f6228SAdrian Hunter if (host->protect_card) { 1116b62f6228SAdrian Hunter printk(KERN_INFO "%s: cover is closed, " 1117b62f6228SAdrian Hunter "card is now accessible\n", 1118b62f6228SAdrian Hunter mmc_hostname(host->mmc)); 1119b62f6228SAdrian Hunter host->protect_card = 0; 1120b62f6228SAdrian Hunter } 1121b62f6228SAdrian Hunter } else { 1122b62f6228SAdrian Hunter if (!host->protect_card) { 1123b62f6228SAdrian Hunter printk(KERN_INFO "%s: cover is open, " 1124b62f6228SAdrian Hunter "card is now inaccessible\n", 1125b62f6228SAdrian Hunter mmc_hostname(host->mmc)); 1126b62f6228SAdrian Hunter host->protect_card = 1; 1127b62f6228SAdrian Hunter } 1128b62f6228SAdrian Hunter } 1129b62f6228SAdrian Hunter } 1130b62f6228SAdrian Hunter 1131a45c6cb8SMadhusudhan Chikkature /* 1132a45c6cb8SMadhusudhan Chikkature * Work Item to notify the core about card insertion/removal 1133a45c6cb8SMadhusudhan Chikkature */ 113470a3341aSDenis Karpov static void omap_hsmmc_detect(struct work_struct *work) 1135a45c6cb8SMadhusudhan Chikkature { 113670a3341aSDenis Karpov struct omap_hsmmc_host *host = 113770a3341aSDenis Karpov container_of(work, struct omap_hsmmc_host, mmc_carddetect_work); 1138249d0fa9SDavid Brownell struct omap_mmc_slot_data *slot = &mmc_slot(host); 1139a6b2240dSAdrian Hunter int carddetect; 1140249d0fa9SDavid Brownell 1141a6b2240dSAdrian Hunter if (host->suspended) 1142a6b2240dSAdrian Hunter return; 1143a45c6cb8SMadhusudhan Chikkature 1144a45c6cb8SMadhusudhan Chikkature sysfs_notify(&host->mmc->class_dev.kobj, NULL, "cover_switch"); 1145a6b2240dSAdrian Hunter 1146191d1f1dSDenis Karpov if (slot->card_detect) 1147db0fefc5SAdrian Hunter carddetect = slot->card_detect(host->dev, host->slot_id); 1148b62f6228SAdrian Hunter else { 1149b62f6228SAdrian Hunter omap_hsmmc_protect_card(host); 1150a6b2240dSAdrian Hunter carddetect = -ENOSYS; 1151b62f6228SAdrian Hunter } 1152a6b2240dSAdrian Hunter 1153a6b2240dSAdrian Hunter if (carddetect) { 1154a45c6cb8SMadhusudhan Chikkature mmc_detect_change(host->mmc, (HZ * 200) / 1000); 1155a45c6cb8SMadhusudhan Chikkature } else { 11565e2ea617SAdrian Hunter mmc_host_enable(host->mmc); 115770a3341aSDenis Karpov omap_hsmmc_reset_controller_fsm(host, SRD); 11585e2ea617SAdrian Hunter mmc_host_lazy_disable(host->mmc); 115970a3341aSDenis Karpov 1160a45c6cb8SMadhusudhan Chikkature mmc_detect_change(host->mmc, (HZ * 50) / 1000); 1161a45c6cb8SMadhusudhan Chikkature } 1162a45c6cb8SMadhusudhan Chikkature } 1163a45c6cb8SMadhusudhan Chikkature 1164a45c6cb8SMadhusudhan Chikkature /* 1165a45c6cb8SMadhusudhan Chikkature * ISR for handling card insertion and removal 1166a45c6cb8SMadhusudhan Chikkature */ 116770a3341aSDenis Karpov static irqreturn_t omap_hsmmc_cd_handler(int irq, void *dev_id) 1168a45c6cb8SMadhusudhan Chikkature { 116970a3341aSDenis Karpov struct omap_hsmmc_host *host = (struct omap_hsmmc_host *)dev_id; 1170a45c6cb8SMadhusudhan Chikkature 1171a6b2240dSAdrian Hunter if (host->suspended) 1172a6b2240dSAdrian Hunter return IRQ_HANDLED; 1173a45c6cb8SMadhusudhan Chikkature schedule_work(&host->mmc_carddetect_work); 1174a45c6cb8SMadhusudhan Chikkature 1175a45c6cb8SMadhusudhan Chikkature return IRQ_HANDLED; 1176a45c6cb8SMadhusudhan Chikkature } 1177a45c6cb8SMadhusudhan Chikkature 117870a3341aSDenis Karpov static int omap_hsmmc_get_dma_sync_dev(struct omap_hsmmc_host *host, 11790ccd76d4SJuha Yrjola struct mmc_data *data) 11800ccd76d4SJuha Yrjola { 11810ccd76d4SJuha Yrjola int sync_dev; 11820ccd76d4SJuha Yrjola 1183f3e2f1ddSGrazvydas Ignotas if (data->flags & MMC_DATA_WRITE) 1184f3e2f1ddSGrazvydas Ignotas sync_dev = host->dma_line_tx; 11850ccd76d4SJuha Yrjola else 1186f3e2f1ddSGrazvydas Ignotas sync_dev = host->dma_line_rx; 11870ccd76d4SJuha Yrjola return sync_dev; 11880ccd76d4SJuha Yrjola } 11890ccd76d4SJuha Yrjola 119070a3341aSDenis Karpov static void omap_hsmmc_config_dma_params(struct omap_hsmmc_host *host, 11910ccd76d4SJuha Yrjola struct mmc_data *data, 11920ccd76d4SJuha Yrjola struct scatterlist *sgl) 11930ccd76d4SJuha Yrjola { 11940ccd76d4SJuha Yrjola int blksz, nblk, dma_ch; 11950ccd76d4SJuha Yrjola 11960ccd76d4SJuha Yrjola dma_ch = host->dma_ch; 11970ccd76d4SJuha Yrjola if (data->flags & MMC_DATA_WRITE) { 11980ccd76d4SJuha Yrjola omap_set_dma_dest_params(dma_ch, 0, OMAP_DMA_AMODE_CONSTANT, 11990ccd76d4SJuha Yrjola (host->mapbase + OMAP_HSMMC_DATA), 0, 0); 12000ccd76d4SJuha Yrjola omap_set_dma_src_params(dma_ch, 0, OMAP_DMA_AMODE_POST_INC, 12010ccd76d4SJuha Yrjola sg_dma_address(sgl), 0, 0); 12020ccd76d4SJuha Yrjola } else { 12030ccd76d4SJuha Yrjola omap_set_dma_src_params(dma_ch, 0, OMAP_DMA_AMODE_CONSTANT, 12040ccd76d4SJuha Yrjola (host->mapbase + OMAP_HSMMC_DATA), 0, 0); 12050ccd76d4SJuha Yrjola omap_set_dma_dest_params(dma_ch, 0, OMAP_DMA_AMODE_POST_INC, 12060ccd76d4SJuha Yrjola sg_dma_address(sgl), 0, 0); 12070ccd76d4SJuha Yrjola } 12080ccd76d4SJuha Yrjola 12090ccd76d4SJuha Yrjola blksz = host->data->blksz; 12100ccd76d4SJuha Yrjola nblk = sg_dma_len(sgl) / blksz; 12110ccd76d4SJuha Yrjola 12120ccd76d4SJuha Yrjola omap_set_dma_transfer_params(dma_ch, OMAP_DMA_DATA_TYPE_S32, 12130ccd76d4SJuha Yrjola blksz / 4, nblk, OMAP_DMA_SYNC_FRAME, 121470a3341aSDenis Karpov omap_hsmmc_get_dma_sync_dev(host, data), 12150ccd76d4SJuha Yrjola !(data->flags & MMC_DATA_WRITE)); 12160ccd76d4SJuha Yrjola 12170ccd76d4SJuha Yrjola omap_start_dma(dma_ch); 12180ccd76d4SJuha Yrjola } 12190ccd76d4SJuha Yrjola 1220a45c6cb8SMadhusudhan Chikkature /* 1221a45c6cb8SMadhusudhan Chikkature * DMA call back function 1222a45c6cb8SMadhusudhan Chikkature */ 122370a3341aSDenis Karpov static void omap_hsmmc_dma_cb(int lch, u16 ch_status, void *data) 1224a45c6cb8SMadhusudhan Chikkature { 122570a3341aSDenis Karpov struct omap_hsmmc_host *host = data; 1226a45c6cb8SMadhusudhan Chikkature 1227a45c6cb8SMadhusudhan Chikkature if (ch_status & OMAP2_DMA_MISALIGNED_ERR_IRQ) 1228a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "MISALIGNED_ADRS_ERR\n"); 1229a45c6cb8SMadhusudhan Chikkature 1230a45c6cb8SMadhusudhan Chikkature if (host->dma_ch < 0) 1231a45c6cb8SMadhusudhan Chikkature return; 1232a45c6cb8SMadhusudhan Chikkature 12330ccd76d4SJuha Yrjola host->dma_sg_idx++; 12340ccd76d4SJuha Yrjola if (host->dma_sg_idx < host->dma_len) { 12350ccd76d4SJuha Yrjola /* Fire up the next transfer. */ 123670a3341aSDenis Karpov omap_hsmmc_config_dma_params(host, host->data, 12370ccd76d4SJuha Yrjola host->data->sg + host->dma_sg_idx); 12380ccd76d4SJuha Yrjola return; 12390ccd76d4SJuha Yrjola } 12400ccd76d4SJuha Yrjola 1241a45c6cb8SMadhusudhan Chikkature omap_free_dma(host->dma_ch); 1242a45c6cb8SMadhusudhan Chikkature host->dma_ch = -1; 1243a45c6cb8SMadhusudhan Chikkature /* 1244a45c6cb8SMadhusudhan Chikkature * DMA Callback: run in interrupt context. 124585b84322SAnand Gadiyar * mutex_unlock will throw a kernel warning if used. 1246a45c6cb8SMadhusudhan Chikkature */ 1247a45c6cb8SMadhusudhan Chikkature up(&host->sem); 1248a45c6cb8SMadhusudhan Chikkature } 1249a45c6cb8SMadhusudhan Chikkature 1250a45c6cb8SMadhusudhan Chikkature /* 1251a45c6cb8SMadhusudhan Chikkature * Routine to configure and start DMA for the MMC card 1252a45c6cb8SMadhusudhan Chikkature */ 125370a3341aSDenis Karpov static int omap_hsmmc_start_dma_transfer(struct omap_hsmmc_host *host, 125470a3341aSDenis Karpov struct mmc_request *req) 1255a45c6cb8SMadhusudhan Chikkature { 12560ccd76d4SJuha Yrjola int dma_ch = 0, ret = 0, err = 1, i; 1257a45c6cb8SMadhusudhan Chikkature struct mmc_data *data = req->data; 1258a45c6cb8SMadhusudhan Chikkature 12590ccd76d4SJuha Yrjola /* Sanity check: all the SG entries must be aligned by block size. */ 1260a3f406f8SJarkko Lavinen for (i = 0; i < data->sg_len; i++) { 12610ccd76d4SJuha Yrjola struct scatterlist *sgl; 12620ccd76d4SJuha Yrjola 12630ccd76d4SJuha Yrjola sgl = data->sg + i; 12640ccd76d4SJuha Yrjola if (sgl->length % data->blksz) 12650ccd76d4SJuha Yrjola return -EINVAL; 12660ccd76d4SJuha Yrjola } 12670ccd76d4SJuha Yrjola if ((data->blksz % 4) != 0) 12680ccd76d4SJuha Yrjola /* REVISIT: The MMC buffer increments only when MSB is written. 12690ccd76d4SJuha Yrjola * Return error for blksz which is non multiple of four. 12700ccd76d4SJuha Yrjola */ 12710ccd76d4SJuha Yrjola return -EINVAL; 12720ccd76d4SJuha Yrjola 1273a45c6cb8SMadhusudhan Chikkature /* 1274a45c6cb8SMadhusudhan Chikkature * If for some reason the DMA transfer is still active, 1275a45c6cb8SMadhusudhan Chikkature * we wait for timeout period and free the dma 1276a45c6cb8SMadhusudhan Chikkature */ 1277a45c6cb8SMadhusudhan Chikkature if (host->dma_ch != -1) { 1278a45c6cb8SMadhusudhan Chikkature set_current_state(TASK_UNINTERRUPTIBLE); 1279a45c6cb8SMadhusudhan Chikkature schedule_timeout(100); 1280a45c6cb8SMadhusudhan Chikkature if (down_trylock(&host->sem)) { 1281a45c6cb8SMadhusudhan Chikkature omap_free_dma(host->dma_ch); 1282a45c6cb8SMadhusudhan Chikkature host->dma_ch = -1; 1283a45c6cb8SMadhusudhan Chikkature up(&host->sem); 1284a45c6cb8SMadhusudhan Chikkature return err; 1285a45c6cb8SMadhusudhan Chikkature } 1286a45c6cb8SMadhusudhan Chikkature } else { 1287a45c6cb8SMadhusudhan Chikkature if (down_trylock(&host->sem)) 1288a45c6cb8SMadhusudhan Chikkature return err; 1289a45c6cb8SMadhusudhan Chikkature } 1290a45c6cb8SMadhusudhan Chikkature 129170a3341aSDenis Karpov ret = omap_request_dma(omap_hsmmc_get_dma_sync_dev(host, data), 129270a3341aSDenis Karpov "MMC/SD", omap_hsmmc_dma_cb, host, &dma_ch); 1293a45c6cb8SMadhusudhan Chikkature if (ret != 0) { 12940ccd76d4SJuha Yrjola dev_err(mmc_dev(host->mmc), 1295a45c6cb8SMadhusudhan Chikkature "%s: omap_request_dma() failed with %d\n", 1296a45c6cb8SMadhusudhan Chikkature mmc_hostname(host->mmc), ret); 1297a45c6cb8SMadhusudhan Chikkature return ret; 1298a45c6cb8SMadhusudhan Chikkature } 1299a45c6cb8SMadhusudhan Chikkature 1300a45c6cb8SMadhusudhan Chikkature host->dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg, 130170a3341aSDenis Karpov data->sg_len, omap_hsmmc_get_dma_dir(host, data)); 1302a45c6cb8SMadhusudhan Chikkature host->dma_ch = dma_ch; 13030ccd76d4SJuha Yrjola host->dma_sg_idx = 0; 1304a45c6cb8SMadhusudhan Chikkature 130570a3341aSDenis Karpov omap_hsmmc_config_dma_params(host, data, data->sg); 1306a45c6cb8SMadhusudhan Chikkature 1307a45c6cb8SMadhusudhan Chikkature return 0; 1308a45c6cb8SMadhusudhan Chikkature } 1309a45c6cb8SMadhusudhan Chikkature 131070a3341aSDenis Karpov static void set_data_timeout(struct omap_hsmmc_host *host, 1311e2bf08d6SAdrian Hunter unsigned int timeout_ns, 1312e2bf08d6SAdrian Hunter unsigned int timeout_clks) 1313a45c6cb8SMadhusudhan Chikkature { 1314a45c6cb8SMadhusudhan Chikkature unsigned int timeout, cycle_ns; 1315a45c6cb8SMadhusudhan Chikkature uint32_t reg, clkd, dto = 0; 1316a45c6cb8SMadhusudhan Chikkature 1317a45c6cb8SMadhusudhan Chikkature reg = OMAP_HSMMC_READ(host->base, SYSCTL); 1318a45c6cb8SMadhusudhan Chikkature clkd = (reg & CLKD_MASK) >> CLKD_SHIFT; 1319a45c6cb8SMadhusudhan Chikkature if (clkd == 0) 1320a45c6cb8SMadhusudhan Chikkature clkd = 1; 1321a45c6cb8SMadhusudhan Chikkature 1322a45c6cb8SMadhusudhan Chikkature cycle_ns = 1000000000 / (clk_get_rate(host->fclk) / clkd); 1323e2bf08d6SAdrian Hunter timeout = timeout_ns / cycle_ns; 1324e2bf08d6SAdrian Hunter timeout += timeout_clks; 1325a45c6cb8SMadhusudhan Chikkature if (timeout) { 1326a45c6cb8SMadhusudhan Chikkature while ((timeout & 0x80000000) == 0) { 1327a45c6cb8SMadhusudhan Chikkature dto += 1; 1328a45c6cb8SMadhusudhan Chikkature timeout <<= 1; 1329a45c6cb8SMadhusudhan Chikkature } 1330a45c6cb8SMadhusudhan Chikkature dto = 31 - dto; 1331a45c6cb8SMadhusudhan Chikkature timeout <<= 1; 1332a45c6cb8SMadhusudhan Chikkature if (timeout && dto) 1333a45c6cb8SMadhusudhan Chikkature dto += 1; 1334a45c6cb8SMadhusudhan Chikkature if (dto >= 13) 1335a45c6cb8SMadhusudhan Chikkature dto -= 13; 1336a45c6cb8SMadhusudhan Chikkature else 1337a45c6cb8SMadhusudhan Chikkature dto = 0; 1338a45c6cb8SMadhusudhan Chikkature if (dto > 14) 1339a45c6cb8SMadhusudhan Chikkature dto = 14; 1340a45c6cb8SMadhusudhan Chikkature } 1341a45c6cb8SMadhusudhan Chikkature 1342a45c6cb8SMadhusudhan Chikkature reg &= ~DTO_MASK; 1343a45c6cb8SMadhusudhan Chikkature reg |= dto << DTO_SHIFT; 1344a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, reg); 1345a45c6cb8SMadhusudhan Chikkature } 1346a45c6cb8SMadhusudhan Chikkature 1347a45c6cb8SMadhusudhan Chikkature /* 1348a45c6cb8SMadhusudhan Chikkature * Configure block length for MMC/SD cards and initiate the transfer. 1349a45c6cb8SMadhusudhan Chikkature */ 1350a45c6cb8SMadhusudhan Chikkature static int 135170a3341aSDenis Karpov omap_hsmmc_prepare_data(struct omap_hsmmc_host *host, struct mmc_request *req) 1352a45c6cb8SMadhusudhan Chikkature { 1353a45c6cb8SMadhusudhan Chikkature int ret; 1354a45c6cb8SMadhusudhan Chikkature host->data = req->data; 1355a45c6cb8SMadhusudhan Chikkature 1356a45c6cb8SMadhusudhan Chikkature if (req->data == NULL) { 1357a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, BLK, 0); 1358e2bf08d6SAdrian Hunter /* 1359e2bf08d6SAdrian Hunter * Set an arbitrary 100ms data timeout for commands with 1360e2bf08d6SAdrian Hunter * busy signal. 1361e2bf08d6SAdrian Hunter */ 1362e2bf08d6SAdrian Hunter if (req->cmd->flags & MMC_RSP_BUSY) 1363e2bf08d6SAdrian Hunter set_data_timeout(host, 100000000U, 0); 1364a45c6cb8SMadhusudhan Chikkature return 0; 1365a45c6cb8SMadhusudhan Chikkature } 1366a45c6cb8SMadhusudhan Chikkature 1367a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, BLK, (req->data->blksz) 1368a45c6cb8SMadhusudhan Chikkature | (req->data->blocks << 16)); 1369e2bf08d6SAdrian Hunter set_data_timeout(host, req->data->timeout_ns, req->data->timeout_clks); 1370a45c6cb8SMadhusudhan Chikkature 1371a45c6cb8SMadhusudhan Chikkature if (host->use_dma) { 137270a3341aSDenis Karpov ret = omap_hsmmc_start_dma_transfer(host, req); 1373a45c6cb8SMadhusudhan Chikkature if (ret != 0) { 1374a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "MMC start dma failure\n"); 1375a45c6cb8SMadhusudhan Chikkature return ret; 1376a45c6cb8SMadhusudhan Chikkature } 1377a45c6cb8SMadhusudhan Chikkature } 1378a45c6cb8SMadhusudhan Chikkature return 0; 1379a45c6cb8SMadhusudhan Chikkature } 1380a45c6cb8SMadhusudhan Chikkature 1381a45c6cb8SMadhusudhan Chikkature /* 1382a45c6cb8SMadhusudhan Chikkature * Request function. for read/write operation 1383a45c6cb8SMadhusudhan Chikkature */ 138470a3341aSDenis Karpov static void omap_hsmmc_request(struct mmc_host *mmc, struct mmc_request *req) 1385a45c6cb8SMadhusudhan Chikkature { 138670a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1387a3f406f8SJarkko Lavinen int err; 1388a45c6cb8SMadhusudhan Chikkature 13894dffd7a2SAdrian Hunter /* 13904dffd7a2SAdrian Hunter * Prevent races with the interrupt handler because of unexpected 13914dffd7a2SAdrian Hunter * interrupts, but not if we are already in interrupt context i.e. 13924dffd7a2SAdrian Hunter * retries. 13934dffd7a2SAdrian Hunter */ 1394b62f6228SAdrian Hunter if (!in_interrupt()) { 13954dffd7a2SAdrian Hunter spin_lock_irqsave(&host->irq_lock, host->flags); 1396b62f6228SAdrian Hunter /* 1397b62f6228SAdrian Hunter * Protect the card from I/O if there is a possibility 1398b62f6228SAdrian Hunter * it can be removed. 1399b62f6228SAdrian Hunter */ 1400b62f6228SAdrian Hunter if (host->protect_card) { 1401b62f6228SAdrian Hunter if (host->reqs_blocked < 3) { 1402b62f6228SAdrian Hunter /* 1403b62f6228SAdrian Hunter * Ensure the controller is left in a consistent 1404b62f6228SAdrian Hunter * state by resetting the command and data state 1405b62f6228SAdrian Hunter * machines. 1406b62f6228SAdrian Hunter */ 1407b62f6228SAdrian Hunter omap_hsmmc_reset_controller_fsm(host, SRD); 1408b62f6228SAdrian Hunter omap_hsmmc_reset_controller_fsm(host, SRC); 1409b62f6228SAdrian Hunter host->reqs_blocked += 1; 1410b62f6228SAdrian Hunter } 1411b62f6228SAdrian Hunter req->cmd->error = -EBADF; 1412b62f6228SAdrian Hunter if (req->data) 1413b62f6228SAdrian Hunter req->data->error = -EBADF; 1414b62f6228SAdrian Hunter spin_unlock_irqrestore(&host->irq_lock, host->flags); 1415b62f6228SAdrian Hunter mmc_request_done(mmc, req); 1416b62f6228SAdrian Hunter return; 1417b62f6228SAdrian Hunter } else if (host->reqs_blocked) 1418b62f6228SAdrian Hunter host->reqs_blocked = 0; 1419b62f6228SAdrian Hunter } 1420a45c6cb8SMadhusudhan Chikkature WARN_ON(host->mrq != NULL); 1421a45c6cb8SMadhusudhan Chikkature host->mrq = req; 142270a3341aSDenis Karpov err = omap_hsmmc_prepare_data(host, req); 1423a3f406f8SJarkko Lavinen if (err) { 1424a3f406f8SJarkko Lavinen req->cmd->error = err; 1425a3f406f8SJarkko Lavinen if (req->data) 1426a3f406f8SJarkko Lavinen req->data->error = err; 1427a3f406f8SJarkko Lavinen host->mrq = NULL; 14284dffd7a2SAdrian Hunter if (!in_interrupt()) 14294dffd7a2SAdrian Hunter spin_unlock_irqrestore(&host->irq_lock, host->flags); 1430a3f406f8SJarkko Lavinen mmc_request_done(mmc, req); 1431a3f406f8SJarkko Lavinen return; 1432a3f406f8SJarkko Lavinen } 1433a3f406f8SJarkko Lavinen 143470a3341aSDenis Karpov omap_hsmmc_start_command(host, req->cmd, req->data); 1435a45c6cb8SMadhusudhan Chikkature } 1436a45c6cb8SMadhusudhan Chikkature 1437a45c6cb8SMadhusudhan Chikkature /* Routine to configure clock values. Exposed API to core */ 143870a3341aSDenis Karpov static void omap_hsmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 1439a45c6cb8SMadhusudhan Chikkature { 144070a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1441a45c6cb8SMadhusudhan Chikkature u16 dsor = 0; 1442a45c6cb8SMadhusudhan Chikkature unsigned long regval; 1443a45c6cb8SMadhusudhan Chikkature unsigned long timeout; 144473153010SJarkko Lavinen u32 con; 1445a3621465SAdrian Hunter int do_send_init_stream = 0; 1446a45c6cb8SMadhusudhan Chikkature 14475e2ea617SAdrian Hunter mmc_host_enable(host->mmc); 14485e2ea617SAdrian Hunter 1449a3621465SAdrian Hunter if (ios->power_mode != host->power_mode) { 1450a45c6cb8SMadhusudhan Chikkature switch (ios->power_mode) { 1451a45c6cb8SMadhusudhan Chikkature case MMC_POWER_OFF: 1452a3621465SAdrian Hunter mmc_slot(host).set_power(host->dev, host->slot_id, 1453a3621465SAdrian Hunter 0, 0); 1454623821f7SAdrian Hunter host->vdd = 0; 1455a45c6cb8SMadhusudhan Chikkature break; 1456a45c6cb8SMadhusudhan Chikkature case MMC_POWER_UP: 1457a3621465SAdrian Hunter mmc_slot(host).set_power(host->dev, host->slot_id, 1458a3621465SAdrian Hunter 1, ios->vdd); 1459623821f7SAdrian Hunter host->vdd = ios->vdd; 1460a45c6cb8SMadhusudhan Chikkature break; 1461a3621465SAdrian Hunter case MMC_POWER_ON: 1462a3621465SAdrian Hunter do_send_init_stream = 1; 1463a3621465SAdrian Hunter break; 1464a3621465SAdrian Hunter } 1465a3621465SAdrian Hunter host->power_mode = ios->power_mode; 1466a45c6cb8SMadhusudhan Chikkature } 1467a45c6cb8SMadhusudhan Chikkature 1468dd498effSDenis Karpov /* FIXME: set registers based only on changes to ios */ 1469dd498effSDenis Karpov 147073153010SJarkko Lavinen con = OMAP_HSMMC_READ(host->base, CON); 1471a45c6cb8SMadhusudhan Chikkature switch (mmc->ios.bus_width) { 147273153010SJarkko Lavinen case MMC_BUS_WIDTH_8: 147373153010SJarkko Lavinen OMAP_HSMMC_WRITE(host->base, CON, con | DW8); 147473153010SJarkko Lavinen break; 1475a45c6cb8SMadhusudhan Chikkature case MMC_BUS_WIDTH_4: 147673153010SJarkko Lavinen OMAP_HSMMC_WRITE(host->base, CON, con & ~DW8); 1477a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 1478a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) | FOUR_BIT); 1479a45c6cb8SMadhusudhan Chikkature break; 1480a45c6cb8SMadhusudhan Chikkature case MMC_BUS_WIDTH_1: 148173153010SJarkko Lavinen OMAP_HSMMC_WRITE(host->base, CON, con & ~DW8); 1482a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 1483a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) & ~FOUR_BIT); 1484a45c6cb8SMadhusudhan Chikkature break; 1485a45c6cb8SMadhusudhan Chikkature } 1486a45c6cb8SMadhusudhan Chikkature 1487a45c6cb8SMadhusudhan Chikkature if (host->id == OMAP_MMC1_DEVID) { 1488eb250826SDavid Brownell /* Only MMC1 can interface at 3V without some flavor 1489eb250826SDavid Brownell * of external transceiver; but they all handle 1.8V. 1490eb250826SDavid Brownell */ 1491a45c6cb8SMadhusudhan Chikkature if ((OMAP_HSMMC_READ(host->base, HCTL) & SDVSDET) && 1492a45c6cb8SMadhusudhan Chikkature (ios->vdd == DUAL_VOLT_OCR_BIT)) { 1493a45c6cb8SMadhusudhan Chikkature /* 1494a45c6cb8SMadhusudhan Chikkature * The mmc_select_voltage fn of the core does 1495a45c6cb8SMadhusudhan Chikkature * not seem to set the power_mode to 1496a45c6cb8SMadhusudhan Chikkature * MMC_POWER_UP upon recalculating the voltage. 1497a45c6cb8SMadhusudhan Chikkature * vdd 1.8v. 1498a45c6cb8SMadhusudhan Chikkature */ 149970a3341aSDenis Karpov if (omap_hsmmc_switch_opcond(host, ios->vdd) != 0) 1500a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1501a45c6cb8SMadhusudhan Chikkature "Switch operation failed\n"); 1502a45c6cb8SMadhusudhan Chikkature } 1503a45c6cb8SMadhusudhan Chikkature } 1504a45c6cb8SMadhusudhan Chikkature 1505a45c6cb8SMadhusudhan Chikkature if (ios->clock) { 1506a45c6cb8SMadhusudhan Chikkature dsor = OMAP_MMC_MASTER_CLOCK / ios->clock; 1507a45c6cb8SMadhusudhan Chikkature if (dsor < 1) 1508a45c6cb8SMadhusudhan Chikkature dsor = 1; 1509a45c6cb8SMadhusudhan Chikkature 1510a45c6cb8SMadhusudhan Chikkature if (OMAP_MMC_MASTER_CLOCK / dsor > ios->clock) 1511a45c6cb8SMadhusudhan Chikkature dsor++; 1512a45c6cb8SMadhusudhan Chikkature 1513a45c6cb8SMadhusudhan Chikkature if (dsor > 250) 1514a45c6cb8SMadhusudhan Chikkature dsor = 250; 1515a45c6cb8SMadhusudhan Chikkature } 151670a3341aSDenis Karpov omap_hsmmc_stop_clock(host); 1517a45c6cb8SMadhusudhan Chikkature regval = OMAP_HSMMC_READ(host->base, SYSCTL); 1518a45c6cb8SMadhusudhan Chikkature regval = regval & ~(CLKD_MASK); 1519a45c6cb8SMadhusudhan Chikkature regval = regval | (dsor << 6) | (DTO << 16); 1520a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, regval); 1521a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, 1522a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, SYSCTL) | ICE); 1523a45c6cb8SMadhusudhan Chikkature 1524a45c6cb8SMadhusudhan Chikkature /* Wait till the ICS bit is set */ 1525a45c6cb8SMadhusudhan Chikkature timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 152611dd62a7SDenis Karpov while ((OMAP_HSMMC_READ(host->base, SYSCTL) & ICS) != ICS 1527a45c6cb8SMadhusudhan Chikkature && time_before(jiffies, timeout)) 1528a45c6cb8SMadhusudhan Chikkature msleep(1); 1529a45c6cb8SMadhusudhan Chikkature 1530a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, 1531a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, SYSCTL) | CEN); 1532a45c6cb8SMadhusudhan Chikkature 1533a3621465SAdrian Hunter if (do_send_init_stream) 1534a45c6cb8SMadhusudhan Chikkature send_init_stream(host); 1535a45c6cb8SMadhusudhan Chikkature 1536abb28e73SDenis Karpov con = OMAP_HSMMC_READ(host->base, CON); 1537a45c6cb8SMadhusudhan Chikkature if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN) 1538abb28e73SDenis Karpov OMAP_HSMMC_WRITE(host->base, CON, con | OD); 1539abb28e73SDenis Karpov else 1540abb28e73SDenis Karpov OMAP_HSMMC_WRITE(host->base, CON, con & ~OD); 15415e2ea617SAdrian Hunter 1542dd498effSDenis Karpov if (host->power_mode == MMC_POWER_OFF) 1543dd498effSDenis Karpov mmc_host_disable(host->mmc); 1544dd498effSDenis Karpov else 15455e2ea617SAdrian Hunter mmc_host_lazy_disable(host->mmc); 1546a45c6cb8SMadhusudhan Chikkature } 1547a45c6cb8SMadhusudhan Chikkature 1548a45c6cb8SMadhusudhan Chikkature static int omap_hsmmc_get_cd(struct mmc_host *mmc) 1549a45c6cb8SMadhusudhan Chikkature { 155070a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1551a45c6cb8SMadhusudhan Chikkature 1552191d1f1dSDenis Karpov if (!mmc_slot(host).card_detect) 1553a45c6cb8SMadhusudhan Chikkature return -ENOSYS; 1554db0fefc5SAdrian Hunter return mmc_slot(host).card_detect(host->dev, host->slot_id); 1555a45c6cb8SMadhusudhan Chikkature } 1556a45c6cb8SMadhusudhan Chikkature 1557a45c6cb8SMadhusudhan Chikkature static int omap_hsmmc_get_ro(struct mmc_host *mmc) 1558a45c6cb8SMadhusudhan Chikkature { 155970a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1560a45c6cb8SMadhusudhan Chikkature 1561191d1f1dSDenis Karpov if (!mmc_slot(host).get_ro) 1562a45c6cb8SMadhusudhan Chikkature return -ENOSYS; 1563191d1f1dSDenis Karpov return mmc_slot(host).get_ro(host->dev, 0); 1564a45c6cb8SMadhusudhan Chikkature } 1565a45c6cb8SMadhusudhan Chikkature 156670a3341aSDenis Karpov static void omap_hsmmc_conf_bus_power(struct omap_hsmmc_host *host) 15671b331e69SKim Kyuwon { 15681b331e69SKim Kyuwon u32 hctl, capa, value; 15691b331e69SKim Kyuwon 15701b331e69SKim Kyuwon /* Only MMC1 supports 3.0V */ 15711b331e69SKim Kyuwon if (host->id == OMAP_MMC1_DEVID) { 15721b331e69SKim Kyuwon hctl = SDVS30; 15731b331e69SKim Kyuwon capa = VS30 | VS18; 15741b331e69SKim Kyuwon } else { 15751b331e69SKim Kyuwon hctl = SDVS18; 15761b331e69SKim Kyuwon capa = VS18; 15771b331e69SKim Kyuwon } 15781b331e69SKim Kyuwon 15791b331e69SKim Kyuwon value = OMAP_HSMMC_READ(host->base, HCTL) & ~SDVS_MASK; 15801b331e69SKim Kyuwon OMAP_HSMMC_WRITE(host->base, HCTL, value | hctl); 15811b331e69SKim Kyuwon 15821b331e69SKim Kyuwon value = OMAP_HSMMC_READ(host->base, CAPA); 15831b331e69SKim Kyuwon OMAP_HSMMC_WRITE(host->base, CAPA, value | capa); 15841b331e69SKim Kyuwon 15851b331e69SKim Kyuwon /* Set the controller to AUTO IDLE mode */ 15861b331e69SKim Kyuwon value = OMAP_HSMMC_READ(host->base, SYSCONFIG); 15871b331e69SKim Kyuwon OMAP_HSMMC_WRITE(host->base, SYSCONFIG, value | AUTOIDLE); 15881b331e69SKim Kyuwon 15891b331e69SKim Kyuwon /* Set SD bus power bit */ 1590e13bb300SAdrian Hunter set_sd_bus_power(host); 15911b331e69SKim Kyuwon } 15921b331e69SKim Kyuwon 1593dd498effSDenis Karpov /* 1594dd498effSDenis Karpov * Dynamic power saving handling, FSM: 159513189e78SJarkko Lavinen * ENABLED -> DISABLED -> CARDSLEEP / REGSLEEP -> OFF 159613189e78SJarkko Lavinen * ^___________| | | 159713189e78SJarkko Lavinen * |______________________|______________________| 1598dd498effSDenis Karpov * 1599dd498effSDenis Karpov * ENABLED: mmc host is fully functional 1600dd498effSDenis Karpov * DISABLED: fclk is off 160113189e78SJarkko Lavinen * CARDSLEEP: fclk is off, card is asleep, voltage regulator is asleep 1602623821f7SAdrian Hunter * REGSLEEP: fclk is off, voltage regulator is asleep 160313189e78SJarkko Lavinen * OFF: fclk is off, voltage regulator is off 1604dd498effSDenis Karpov * 1605dd498effSDenis Karpov * Transition handlers return the timeout for the next state transition 1606dd498effSDenis Karpov * or negative error. 1607dd498effSDenis Karpov */ 1608dd498effSDenis Karpov 160913189e78SJarkko Lavinen enum {ENABLED = 0, DISABLED, CARDSLEEP, REGSLEEP, OFF}; 1610dd498effSDenis Karpov 1611dd498effSDenis Karpov /* Handler for [ENABLED -> DISABLED] transition */ 161270a3341aSDenis Karpov static int omap_hsmmc_enabled_to_disabled(struct omap_hsmmc_host *host) 1613dd498effSDenis Karpov { 161470a3341aSDenis Karpov omap_hsmmc_context_save(host); 1615dd498effSDenis Karpov clk_disable(host->fclk); 1616dd498effSDenis Karpov host->dpm_state = DISABLED; 1617dd498effSDenis Karpov 1618dd498effSDenis Karpov dev_dbg(mmc_dev(host->mmc), "ENABLED -> DISABLED\n"); 1619dd498effSDenis Karpov 1620dd498effSDenis Karpov if (host->power_mode == MMC_POWER_OFF) 1621dd498effSDenis Karpov return 0; 1622dd498effSDenis Karpov 162313189e78SJarkko Lavinen return msecs_to_jiffies(OMAP_MMC_SLEEP_TIMEOUT); 1624dd498effSDenis Karpov } 1625dd498effSDenis Karpov 162613189e78SJarkko Lavinen /* Handler for [DISABLED -> REGSLEEP / CARDSLEEP] transition */ 162770a3341aSDenis Karpov static int omap_hsmmc_disabled_to_sleep(struct omap_hsmmc_host *host) 1628dd498effSDenis Karpov { 162913189e78SJarkko Lavinen int err, new_state; 1630dd498effSDenis Karpov 1631dd498effSDenis Karpov if (!mmc_try_claim_host(host->mmc)) 1632dd498effSDenis Karpov return 0; 1633dd498effSDenis Karpov 1634dd498effSDenis Karpov clk_enable(host->fclk); 163570a3341aSDenis Karpov omap_hsmmc_context_restore(host); 163613189e78SJarkko Lavinen if (mmc_card_can_sleep(host->mmc)) { 163713189e78SJarkko Lavinen err = mmc_card_sleep(host->mmc); 163813189e78SJarkko Lavinen if (err < 0) { 163913189e78SJarkko Lavinen clk_disable(host->fclk); 164013189e78SJarkko Lavinen mmc_release_host(host->mmc); 164113189e78SJarkko Lavinen return err; 164213189e78SJarkko Lavinen } 164313189e78SJarkko Lavinen new_state = CARDSLEEP; 164470a3341aSDenis Karpov } else { 164513189e78SJarkko Lavinen new_state = REGSLEEP; 164670a3341aSDenis Karpov } 164713189e78SJarkko Lavinen if (mmc_slot(host).set_sleep) 164813189e78SJarkko Lavinen mmc_slot(host).set_sleep(host->dev, host->slot_id, 1, 0, 164913189e78SJarkko Lavinen new_state == CARDSLEEP); 165013189e78SJarkko Lavinen /* FIXME: turn off bus power and perhaps interrupts too */ 165113189e78SJarkko Lavinen clk_disable(host->fclk); 165213189e78SJarkko Lavinen host->dpm_state = new_state; 165313189e78SJarkko Lavinen 165413189e78SJarkko Lavinen mmc_release_host(host->mmc); 165513189e78SJarkko Lavinen 165613189e78SJarkko Lavinen dev_dbg(mmc_dev(host->mmc), "DISABLED -> %s\n", 165713189e78SJarkko Lavinen host->dpm_state == CARDSLEEP ? "CARDSLEEP" : "REGSLEEP"); 1658dd498effSDenis Karpov 1659dd498effSDenis Karpov if ((host->mmc->caps & MMC_CAP_NONREMOVABLE) || 1660dd498effSDenis Karpov mmc_slot(host).card_detect || 1661dd498effSDenis Karpov (mmc_slot(host).get_cover_state && 166213189e78SJarkko Lavinen mmc_slot(host).get_cover_state(host->dev, host->slot_id))) 166313189e78SJarkko Lavinen return msecs_to_jiffies(OMAP_MMC_OFF_TIMEOUT); 166413189e78SJarkko Lavinen 166513189e78SJarkko Lavinen return 0; 1666623821f7SAdrian Hunter } 1667dd498effSDenis Karpov 166813189e78SJarkko Lavinen /* Handler for [REGSLEEP / CARDSLEEP -> OFF] transition */ 166970a3341aSDenis Karpov static int omap_hsmmc_sleep_to_off(struct omap_hsmmc_host *host) 167013189e78SJarkko Lavinen { 167113189e78SJarkko Lavinen if (!mmc_try_claim_host(host->mmc)) 167213189e78SJarkko Lavinen return 0; 1673dd498effSDenis Karpov 167413189e78SJarkko Lavinen if (!((host->mmc->caps & MMC_CAP_NONREMOVABLE) || 167513189e78SJarkko Lavinen mmc_slot(host).card_detect || 167613189e78SJarkko Lavinen (mmc_slot(host).get_cover_state && 167713189e78SJarkko Lavinen mmc_slot(host).get_cover_state(host->dev, host->slot_id)))) { 167813189e78SJarkko Lavinen mmc_release_host(host->mmc); 167913189e78SJarkko Lavinen return 0; 168013189e78SJarkko Lavinen } 1681dd498effSDenis Karpov 168213189e78SJarkko Lavinen mmc_slot(host).set_power(host->dev, host->slot_id, 0, 0); 168313189e78SJarkko Lavinen host->vdd = 0; 168413189e78SJarkko Lavinen host->power_mode = MMC_POWER_OFF; 168513189e78SJarkko Lavinen 168613189e78SJarkko Lavinen dev_dbg(mmc_dev(host->mmc), "%s -> OFF\n", 168713189e78SJarkko Lavinen host->dpm_state == CARDSLEEP ? "CARDSLEEP" : "REGSLEEP"); 168813189e78SJarkko Lavinen 168913189e78SJarkko Lavinen host->dpm_state = OFF; 1690dd498effSDenis Karpov 1691dd498effSDenis Karpov mmc_release_host(host->mmc); 1692dd498effSDenis Karpov 1693dd498effSDenis Karpov return 0; 1694dd498effSDenis Karpov } 1695dd498effSDenis Karpov 1696dd498effSDenis Karpov /* Handler for [DISABLED -> ENABLED] transition */ 169770a3341aSDenis Karpov static int omap_hsmmc_disabled_to_enabled(struct omap_hsmmc_host *host) 1698dd498effSDenis Karpov { 1699dd498effSDenis Karpov int err; 1700dd498effSDenis Karpov 1701dd498effSDenis Karpov err = clk_enable(host->fclk); 1702dd498effSDenis Karpov if (err < 0) 1703dd498effSDenis Karpov return err; 1704dd498effSDenis Karpov 170570a3341aSDenis Karpov omap_hsmmc_context_restore(host); 1706dd498effSDenis Karpov host->dpm_state = ENABLED; 1707dd498effSDenis Karpov 1708dd498effSDenis Karpov dev_dbg(mmc_dev(host->mmc), "DISABLED -> ENABLED\n"); 1709dd498effSDenis Karpov 1710dd498effSDenis Karpov return 0; 1711dd498effSDenis Karpov } 1712dd498effSDenis Karpov 171313189e78SJarkko Lavinen /* Handler for [SLEEP -> ENABLED] transition */ 171470a3341aSDenis Karpov static int omap_hsmmc_sleep_to_enabled(struct omap_hsmmc_host *host) 171513189e78SJarkko Lavinen { 171613189e78SJarkko Lavinen if (!mmc_try_claim_host(host->mmc)) 171713189e78SJarkko Lavinen return 0; 171813189e78SJarkko Lavinen 171913189e78SJarkko Lavinen clk_enable(host->fclk); 172070a3341aSDenis Karpov omap_hsmmc_context_restore(host); 172113189e78SJarkko Lavinen if (mmc_slot(host).set_sleep) 172213189e78SJarkko Lavinen mmc_slot(host).set_sleep(host->dev, host->slot_id, 0, 172313189e78SJarkko Lavinen host->vdd, host->dpm_state == CARDSLEEP); 172413189e78SJarkko Lavinen if (mmc_card_can_sleep(host->mmc)) 172513189e78SJarkko Lavinen mmc_card_awake(host->mmc); 172613189e78SJarkko Lavinen 172713189e78SJarkko Lavinen dev_dbg(mmc_dev(host->mmc), "%s -> ENABLED\n", 172813189e78SJarkko Lavinen host->dpm_state == CARDSLEEP ? "CARDSLEEP" : "REGSLEEP"); 172913189e78SJarkko Lavinen 173013189e78SJarkko Lavinen host->dpm_state = ENABLED; 173113189e78SJarkko Lavinen 173213189e78SJarkko Lavinen mmc_release_host(host->mmc); 173313189e78SJarkko Lavinen 173413189e78SJarkko Lavinen return 0; 173513189e78SJarkko Lavinen } 173613189e78SJarkko Lavinen 1737dd498effSDenis Karpov /* Handler for [OFF -> ENABLED] transition */ 173870a3341aSDenis Karpov static int omap_hsmmc_off_to_enabled(struct omap_hsmmc_host *host) 1739dd498effSDenis Karpov { 1740dd498effSDenis Karpov clk_enable(host->fclk); 1741dd498effSDenis Karpov 174270a3341aSDenis Karpov omap_hsmmc_context_restore(host); 174370a3341aSDenis Karpov omap_hsmmc_conf_bus_power(host); 1744dd498effSDenis Karpov mmc_power_restore_host(host->mmc); 1745dd498effSDenis Karpov 1746dd498effSDenis Karpov host->dpm_state = ENABLED; 1747dd498effSDenis Karpov 1748dd498effSDenis Karpov dev_dbg(mmc_dev(host->mmc), "OFF -> ENABLED\n"); 1749dd498effSDenis Karpov 1750dd498effSDenis Karpov return 0; 1751dd498effSDenis Karpov } 1752dd498effSDenis Karpov 1753dd498effSDenis Karpov /* 1754dd498effSDenis Karpov * Bring MMC host to ENABLED from any other PM state. 1755dd498effSDenis Karpov */ 175670a3341aSDenis Karpov static int omap_hsmmc_enable(struct mmc_host *mmc) 1757dd498effSDenis Karpov { 175870a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1759dd498effSDenis Karpov 1760dd498effSDenis Karpov switch (host->dpm_state) { 1761dd498effSDenis Karpov case DISABLED: 176270a3341aSDenis Karpov return omap_hsmmc_disabled_to_enabled(host); 176313189e78SJarkko Lavinen case CARDSLEEP: 1764623821f7SAdrian Hunter case REGSLEEP: 176570a3341aSDenis Karpov return omap_hsmmc_sleep_to_enabled(host); 1766dd498effSDenis Karpov case OFF: 176770a3341aSDenis Karpov return omap_hsmmc_off_to_enabled(host); 1768dd498effSDenis Karpov default: 1769dd498effSDenis Karpov dev_dbg(mmc_dev(host->mmc), "UNKNOWN state\n"); 1770dd498effSDenis Karpov return -EINVAL; 1771dd498effSDenis Karpov } 1772dd498effSDenis Karpov } 1773dd498effSDenis Karpov 1774dd498effSDenis Karpov /* 1775dd498effSDenis Karpov * Bring MMC host in PM state (one level deeper). 1776dd498effSDenis Karpov */ 177770a3341aSDenis Karpov static int omap_hsmmc_disable(struct mmc_host *mmc, int lazy) 1778dd498effSDenis Karpov { 177970a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1780dd498effSDenis Karpov 1781dd498effSDenis Karpov switch (host->dpm_state) { 1782dd498effSDenis Karpov case ENABLED: { 1783dd498effSDenis Karpov int delay; 1784dd498effSDenis Karpov 178570a3341aSDenis Karpov delay = omap_hsmmc_enabled_to_disabled(host); 1786dd498effSDenis Karpov if (lazy || delay < 0) 1787dd498effSDenis Karpov return delay; 1788dd498effSDenis Karpov return 0; 1789dd498effSDenis Karpov } 1790dd498effSDenis Karpov case DISABLED: 179170a3341aSDenis Karpov return omap_hsmmc_disabled_to_sleep(host); 179213189e78SJarkko Lavinen case CARDSLEEP: 179313189e78SJarkko Lavinen case REGSLEEP: 179470a3341aSDenis Karpov return omap_hsmmc_sleep_to_off(host); 1795dd498effSDenis Karpov default: 1796dd498effSDenis Karpov dev_dbg(mmc_dev(host->mmc), "UNKNOWN state\n"); 1797dd498effSDenis Karpov return -EINVAL; 1798dd498effSDenis Karpov } 1799dd498effSDenis Karpov } 1800dd498effSDenis Karpov 180170a3341aSDenis Karpov static int omap_hsmmc_enable_fclk(struct mmc_host *mmc) 1802dd498effSDenis Karpov { 180370a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1804dd498effSDenis Karpov int err; 1805dd498effSDenis Karpov 1806dd498effSDenis Karpov err = clk_enable(host->fclk); 1807dd498effSDenis Karpov if (err) 1808dd498effSDenis Karpov return err; 1809dd498effSDenis Karpov dev_dbg(mmc_dev(host->mmc), "mmc_fclk: enabled\n"); 181070a3341aSDenis Karpov omap_hsmmc_context_restore(host); 1811dd498effSDenis Karpov return 0; 1812dd498effSDenis Karpov } 1813dd498effSDenis Karpov 181470a3341aSDenis Karpov static int omap_hsmmc_disable_fclk(struct mmc_host *mmc, int lazy) 1815dd498effSDenis Karpov { 181670a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1817dd498effSDenis Karpov 181870a3341aSDenis Karpov omap_hsmmc_context_save(host); 1819dd498effSDenis Karpov clk_disable(host->fclk); 1820dd498effSDenis Karpov dev_dbg(mmc_dev(host->mmc), "mmc_fclk: disabled\n"); 1821dd498effSDenis Karpov return 0; 1822dd498effSDenis Karpov } 1823dd498effSDenis Karpov 182470a3341aSDenis Karpov static const struct mmc_host_ops omap_hsmmc_ops = { 182570a3341aSDenis Karpov .enable = omap_hsmmc_enable_fclk, 182670a3341aSDenis Karpov .disable = omap_hsmmc_disable_fclk, 182770a3341aSDenis Karpov .request = omap_hsmmc_request, 182870a3341aSDenis Karpov .set_ios = omap_hsmmc_set_ios, 1829dd498effSDenis Karpov .get_cd = omap_hsmmc_get_cd, 1830dd498effSDenis Karpov .get_ro = omap_hsmmc_get_ro, 1831dd498effSDenis Karpov /* NYET -- enable_sdio_irq */ 1832dd498effSDenis Karpov }; 1833dd498effSDenis Karpov 183470a3341aSDenis Karpov static const struct mmc_host_ops omap_hsmmc_ps_ops = { 183570a3341aSDenis Karpov .enable = omap_hsmmc_enable, 183670a3341aSDenis Karpov .disable = omap_hsmmc_disable, 183770a3341aSDenis Karpov .request = omap_hsmmc_request, 183870a3341aSDenis Karpov .set_ios = omap_hsmmc_set_ios, 1839a45c6cb8SMadhusudhan Chikkature .get_cd = omap_hsmmc_get_cd, 1840a45c6cb8SMadhusudhan Chikkature .get_ro = omap_hsmmc_get_ro, 1841a45c6cb8SMadhusudhan Chikkature /* NYET -- enable_sdio_irq */ 1842a45c6cb8SMadhusudhan Chikkature }; 1843a45c6cb8SMadhusudhan Chikkature 1844d900f712SDenis Karpov #ifdef CONFIG_DEBUG_FS 1845d900f712SDenis Karpov 184670a3341aSDenis Karpov static int omap_hsmmc_regs_show(struct seq_file *s, void *data) 1847d900f712SDenis Karpov { 1848d900f712SDenis Karpov struct mmc_host *mmc = s->private; 184970a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 185011dd62a7SDenis Karpov int context_loss = 0; 185111dd62a7SDenis Karpov 185270a3341aSDenis Karpov if (host->pdata->get_context_loss_count) 185370a3341aSDenis Karpov context_loss = host->pdata->get_context_loss_count(host->dev); 1854d900f712SDenis Karpov 18555e2ea617SAdrian Hunter seq_printf(s, "mmc%d:\n" 18565e2ea617SAdrian Hunter " enabled:\t%d\n" 1857dd498effSDenis Karpov " dpm_state:\t%d\n" 18585e2ea617SAdrian Hunter " nesting_cnt:\t%d\n" 185911dd62a7SDenis Karpov " ctx_loss:\t%d:%d\n" 18605e2ea617SAdrian Hunter "\nregs:\n", 1861dd498effSDenis Karpov mmc->index, mmc->enabled ? 1 : 0, 1862dd498effSDenis Karpov host->dpm_state, mmc->nesting_cnt, 186311dd62a7SDenis Karpov host->context_loss, context_loss); 18645e2ea617SAdrian Hunter 186513189e78SJarkko Lavinen if (host->suspended || host->dpm_state == OFF) { 1866dd498effSDenis Karpov seq_printf(s, "host suspended, can't read registers\n"); 1867dd498effSDenis Karpov return 0; 1868dd498effSDenis Karpov } 1869dd498effSDenis Karpov 18705e2ea617SAdrian Hunter if (clk_enable(host->fclk) != 0) { 18715e2ea617SAdrian Hunter seq_printf(s, "can't read the regs\n"); 1872dd498effSDenis Karpov return 0; 18735e2ea617SAdrian Hunter } 1874d900f712SDenis Karpov 1875d900f712SDenis Karpov seq_printf(s, "SYSCONFIG:\t0x%08x\n", 1876d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCONFIG)); 1877d900f712SDenis Karpov seq_printf(s, "CON:\t\t0x%08x\n", 1878d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, CON)); 1879d900f712SDenis Karpov seq_printf(s, "HCTL:\t\t0x%08x\n", 1880d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, HCTL)); 1881d900f712SDenis Karpov seq_printf(s, "SYSCTL:\t\t0x%08x\n", 1882d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCTL)); 1883d900f712SDenis Karpov seq_printf(s, "IE:\t\t0x%08x\n", 1884d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, IE)); 1885d900f712SDenis Karpov seq_printf(s, "ISE:\t\t0x%08x\n", 1886d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, ISE)); 1887d900f712SDenis Karpov seq_printf(s, "CAPA:\t\t0x%08x\n", 1888d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, CAPA)); 18895e2ea617SAdrian Hunter 18905e2ea617SAdrian Hunter clk_disable(host->fclk); 1891dd498effSDenis Karpov 1892d900f712SDenis Karpov return 0; 1893d900f712SDenis Karpov } 1894d900f712SDenis Karpov 189570a3341aSDenis Karpov static int omap_hsmmc_regs_open(struct inode *inode, struct file *file) 1896d900f712SDenis Karpov { 189770a3341aSDenis Karpov return single_open(file, omap_hsmmc_regs_show, inode->i_private); 1898d900f712SDenis Karpov } 1899d900f712SDenis Karpov 1900d900f712SDenis Karpov static const struct file_operations mmc_regs_fops = { 190170a3341aSDenis Karpov .open = omap_hsmmc_regs_open, 1902d900f712SDenis Karpov .read = seq_read, 1903d900f712SDenis Karpov .llseek = seq_lseek, 1904d900f712SDenis Karpov .release = single_release, 1905d900f712SDenis Karpov }; 1906d900f712SDenis Karpov 190770a3341aSDenis Karpov static void omap_hsmmc_debugfs(struct mmc_host *mmc) 1908d900f712SDenis Karpov { 1909d900f712SDenis Karpov if (mmc->debugfs_root) 1910d900f712SDenis Karpov debugfs_create_file("regs", S_IRUSR, mmc->debugfs_root, 1911d900f712SDenis Karpov mmc, &mmc_regs_fops); 1912d900f712SDenis Karpov } 1913d900f712SDenis Karpov 1914d900f712SDenis Karpov #else 1915d900f712SDenis Karpov 191670a3341aSDenis Karpov static void omap_hsmmc_debugfs(struct mmc_host *mmc) 1917d900f712SDenis Karpov { 1918d900f712SDenis Karpov } 1919d900f712SDenis Karpov 1920d900f712SDenis Karpov #endif 1921d900f712SDenis Karpov 192270a3341aSDenis Karpov static int __init omap_hsmmc_probe(struct platform_device *pdev) 1923a45c6cb8SMadhusudhan Chikkature { 1924a45c6cb8SMadhusudhan Chikkature struct omap_mmc_platform_data *pdata = pdev->dev.platform_data; 1925a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc; 192670a3341aSDenis Karpov struct omap_hsmmc_host *host = NULL; 1927a45c6cb8SMadhusudhan Chikkature struct resource *res; 1928db0fefc5SAdrian Hunter int ret, irq; 1929a45c6cb8SMadhusudhan Chikkature 1930a45c6cb8SMadhusudhan Chikkature if (pdata == NULL) { 1931a45c6cb8SMadhusudhan Chikkature dev_err(&pdev->dev, "Platform Data is missing\n"); 1932a45c6cb8SMadhusudhan Chikkature return -ENXIO; 1933a45c6cb8SMadhusudhan Chikkature } 1934a45c6cb8SMadhusudhan Chikkature 1935a45c6cb8SMadhusudhan Chikkature if (pdata->nr_slots == 0) { 1936a45c6cb8SMadhusudhan Chikkature dev_err(&pdev->dev, "No Slots\n"); 1937a45c6cb8SMadhusudhan Chikkature return -ENXIO; 1938a45c6cb8SMadhusudhan Chikkature } 1939a45c6cb8SMadhusudhan Chikkature 1940a45c6cb8SMadhusudhan Chikkature res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1941a45c6cb8SMadhusudhan Chikkature irq = platform_get_irq(pdev, 0); 1942a45c6cb8SMadhusudhan Chikkature if (res == NULL || irq < 0) 1943a45c6cb8SMadhusudhan Chikkature return -ENXIO; 1944a45c6cb8SMadhusudhan Chikkature 1945a45c6cb8SMadhusudhan Chikkature res = request_mem_region(res->start, res->end - res->start + 1, 1946a45c6cb8SMadhusudhan Chikkature pdev->name); 1947a45c6cb8SMadhusudhan Chikkature if (res == NULL) 1948a45c6cb8SMadhusudhan Chikkature return -EBUSY; 1949a45c6cb8SMadhusudhan Chikkature 1950db0fefc5SAdrian Hunter ret = omap_hsmmc_gpio_init(pdata); 1951db0fefc5SAdrian Hunter if (ret) 1952db0fefc5SAdrian Hunter goto err; 1953db0fefc5SAdrian Hunter 195470a3341aSDenis Karpov mmc = mmc_alloc_host(sizeof(struct omap_hsmmc_host), &pdev->dev); 1955a45c6cb8SMadhusudhan Chikkature if (!mmc) { 1956a45c6cb8SMadhusudhan Chikkature ret = -ENOMEM; 1957db0fefc5SAdrian Hunter goto err_alloc; 1958a45c6cb8SMadhusudhan Chikkature } 1959a45c6cb8SMadhusudhan Chikkature 1960a45c6cb8SMadhusudhan Chikkature host = mmc_priv(mmc); 1961a45c6cb8SMadhusudhan Chikkature host->mmc = mmc; 1962a45c6cb8SMadhusudhan Chikkature host->pdata = pdata; 1963a45c6cb8SMadhusudhan Chikkature host->dev = &pdev->dev; 1964a45c6cb8SMadhusudhan Chikkature host->use_dma = 1; 1965a45c6cb8SMadhusudhan Chikkature host->dev->dma_mask = &pdata->dma_mask; 1966a45c6cb8SMadhusudhan Chikkature host->dma_ch = -1; 1967a45c6cb8SMadhusudhan Chikkature host->irq = irq; 1968a45c6cb8SMadhusudhan Chikkature host->id = pdev->id; 1969a45c6cb8SMadhusudhan Chikkature host->slot_id = 0; 1970a45c6cb8SMadhusudhan Chikkature host->mapbase = res->start; 1971a45c6cb8SMadhusudhan Chikkature host->base = ioremap(host->mapbase, SZ_4K); 1972a3621465SAdrian Hunter host->power_mode = -1; 1973a45c6cb8SMadhusudhan Chikkature 1974a45c6cb8SMadhusudhan Chikkature platform_set_drvdata(pdev, host); 197570a3341aSDenis Karpov INIT_WORK(&host->mmc_carddetect_work, omap_hsmmc_detect); 1976a45c6cb8SMadhusudhan Chikkature 1977191d1f1dSDenis Karpov if (mmc_slot(host).power_saving) 197870a3341aSDenis Karpov mmc->ops = &omap_hsmmc_ps_ops; 1979dd498effSDenis Karpov else 198070a3341aSDenis Karpov mmc->ops = &omap_hsmmc_ops; 1981dd498effSDenis Karpov 1982a45c6cb8SMadhusudhan Chikkature mmc->f_min = 400000; 1983a45c6cb8SMadhusudhan Chikkature mmc->f_max = 52000000; 1984a45c6cb8SMadhusudhan Chikkature 1985a45c6cb8SMadhusudhan Chikkature sema_init(&host->sem, 1); 19864dffd7a2SAdrian Hunter spin_lock_init(&host->irq_lock); 1987a45c6cb8SMadhusudhan Chikkature 19886f7607ccSRussell King host->iclk = clk_get(&pdev->dev, "ick"); 1989a45c6cb8SMadhusudhan Chikkature if (IS_ERR(host->iclk)) { 1990a45c6cb8SMadhusudhan Chikkature ret = PTR_ERR(host->iclk); 1991a45c6cb8SMadhusudhan Chikkature host->iclk = NULL; 1992a45c6cb8SMadhusudhan Chikkature goto err1; 1993a45c6cb8SMadhusudhan Chikkature } 19946f7607ccSRussell King host->fclk = clk_get(&pdev->dev, "fck"); 1995a45c6cb8SMadhusudhan Chikkature if (IS_ERR(host->fclk)) { 1996a45c6cb8SMadhusudhan Chikkature ret = PTR_ERR(host->fclk); 1997a45c6cb8SMadhusudhan Chikkature host->fclk = NULL; 1998a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 1999a45c6cb8SMadhusudhan Chikkature goto err1; 2000a45c6cb8SMadhusudhan Chikkature } 2001a45c6cb8SMadhusudhan Chikkature 200270a3341aSDenis Karpov omap_hsmmc_context_save(host); 200311dd62a7SDenis Karpov 20045e2ea617SAdrian Hunter mmc->caps |= MMC_CAP_DISABLE; 2005dd498effSDenis Karpov mmc_set_disable_delay(mmc, OMAP_MMC_DISABLED_TIMEOUT); 2006dd498effSDenis Karpov /* we start off in DISABLED state */ 2007dd498effSDenis Karpov host->dpm_state = DISABLED; 2008dd498effSDenis Karpov 20095e2ea617SAdrian Hunter if (mmc_host_enable(host->mmc) != 0) { 2010a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 2011a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 2012a45c6cb8SMadhusudhan Chikkature goto err1; 2013a45c6cb8SMadhusudhan Chikkature } 2014a45c6cb8SMadhusudhan Chikkature 2015a45c6cb8SMadhusudhan Chikkature if (clk_enable(host->iclk) != 0) { 20165e2ea617SAdrian Hunter mmc_host_disable(host->mmc); 2017a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 2018a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 2019a45c6cb8SMadhusudhan Chikkature goto err1; 2020a45c6cb8SMadhusudhan Chikkature } 2021a45c6cb8SMadhusudhan Chikkature 20222bec0893SAdrian Hunter if (cpu_is_omap2430()) { 2023a45c6cb8SMadhusudhan Chikkature host->dbclk = clk_get(&pdev->dev, "mmchsdb_fck"); 2024a45c6cb8SMadhusudhan Chikkature /* 2025a45c6cb8SMadhusudhan Chikkature * MMC can still work without debounce clock. 2026a45c6cb8SMadhusudhan Chikkature */ 2027a45c6cb8SMadhusudhan Chikkature if (IS_ERR(host->dbclk)) 20282bec0893SAdrian Hunter dev_warn(mmc_dev(host->mmc), 20292bec0893SAdrian Hunter "Failed to get debounce clock\n"); 2030a45c6cb8SMadhusudhan Chikkature else 20312bec0893SAdrian Hunter host->got_dbclk = 1; 20322bec0893SAdrian Hunter 20332bec0893SAdrian Hunter if (host->got_dbclk) 2034a45c6cb8SMadhusudhan Chikkature if (clk_enable(host->dbclk) != 0) 2035a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Enabling debounce" 2036a45c6cb8SMadhusudhan Chikkature " clk failed\n"); 20372bec0893SAdrian Hunter } 2038a45c6cb8SMadhusudhan Chikkature 20390ccd76d4SJuha Yrjola /* Since we do only SG emulation, we can have as many segs 20400ccd76d4SJuha Yrjola * as we want. */ 20410ccd76d4SJuha Yrjola mmc->max_phys_segs = 1024; 20420ccd76d4SJuha Yrjola mmc->max_hw_segs = 1024; 20430ccd76d4SJuha Yrjola 2044a45c6cb8SMadhusudhan Chikkature mmc->max_blk_size = 512; /* Block Length at max can be 1024 */ 2045a45c6cb8SMadhusudhan Chikkature mmc->max_blk_count = 0xFFFF; /* No. of Blocks is 16 bits */ 2046a45c6cb8SMadhusudhan Chikkature mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; 2047a45c6cb8SMadhusudhan Chikkature mmc->max_seg_size = mmc->max_req_size; 2048a45c6cb8SMadhusudhan Chikkature 204913189e78SJarkko Lavinen mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED | 205013189e78SJarkko Lavinen MMC_CAP_WAIT_WHILE_BUSY; 2051a45c6cb8SMadhusudhan Chikkature 2052191d1f1dSDenis Karpov if (mmc_slot(host).wires >= 8) 205373153010SJarkko Lavinen mmc->caps |= MMC_CAP_8_BIT_DATA; 2054191d1f1dSDenis Karpov else if (mmc_slot(host).wires >= 4) 2055a45c6cb8SMadhusudhan Chikkature mmc->caps |= MMC_CAP_4_BIT_DATA; 2056a45c6cb8SMadhusudhan Chikkature 2057191d1f1dSDenis Karpov if (mmc_slot(host).nonremovable) 205823d99bb9SAdrian Hunter mmc->caps |= MMC_CAP_NONREMOVABLE; 205923d99bb9SAdrian Hunter 206070a3341aSDenis Karpov omap_hsmmc_conf_bus_power(host); 2061a45c6cb8SMadhusudhan Chikkature 2062f3e2f1ddSGrazvydas Ignotas /* Select DMA lines */ 2063f3e2f1ddSGrazvydas Ignotas switch (host->id) { 2064f3e2f1ddSGrazvydas Ignotas case OMAP_MMC1_DEVID: 2065f3e2f1ddSGrazvydas Ignotas host->dma_line_tx = OMAP24XX_DMA_MMC1_TX; 2066f3e2f1ddSGrazvydas Ignotas host->dma_line_rx = OMAP24XX_DMA_MMC1_RX; 2067f3e2f1ddSGrazvydas Ignotas break; 2068f3e2f1ddSGrazvydas Ignotas case OMAP_MMC2_DEVID: 2069f3e2f1ddSGrazvydas Ignotas host->dma_line_tx = OMAP24XX_DMA_MMC2_TX; 2070f3e2f1ddSGrazvydas Ignotas host->dma_line_rx = OMAP24XX_DMA_MMC2_RX; 2071f3e2f1ddSGrazvydas Ignotas break; 2072f3e2f1ddSGrazvydas Ignotas case OMAP_MMC3_DEVID: 2073f3e2f1ddSGrazvydas Ignotas host->dma_line_tx = OMAP34XX_DMA_MMC3_TX; 2074f3e2f1ddSGrazvydas Ignotas host->dma_line_rx = OMAP34XX_DMA_MMC3_RX; 2075f3e2f1ddSGrazvydas Ignotas break; 207682cf818dSkishore kadiyala case OMAP_MMC4_DEVID: 207782cf818dSkishore kadiyala host->dma_line_tx = OMAP44XX_DMA_MMC4_TX; 207882cf818dSkishore kadiyala host->dma_line_rx = OMAP44XX_DMA_MMC4_RX; 207982cf818dSkishore kadiyala break; 208082cf818dSkishore kadiyala case OMAP_MMC5_DEVID: 208182cf818dSkishore kadiyala host->dma_line_tx = OMAP44XX_DMA_MMC5_TX; 208282cf818dSkishore kadiyala host->dma_line_rx = OMAP44XX_DMA_MMC5_RX; 208382cf818dSkishore kadiyala break; 2084f3e2f1ddSGrazvydas Ignotas default: 2085f3e2f1ddSGrazvydas Ignotas dev_err(mmc_dev(host->mmc), "Invalid MMC id\n"); 2086f3e2f1ddSGrazvydas Ignotas goto err_irq; 2087a45c6cb8SMadhusudhan Chikkature } 2088a45c6cb8SMadhusudhan Chikkature 2089a45c6cb8SMadhusudhan Chikkature /* Request IRQ for MMC operations */ 209070a3341aSDenis Karpov ret = request_irq(host->irq, omap_hsmmc_irq, IRQF_DISABLED, 2091a45c6cb8SMadhusudhan Chikkature mmc_hostname(mmc), host); 2092a45c6cb8SMadhusudhan Chikkature if (ret) { 2093a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Unable to grab HSMMC IRQ\n"); 2094a45c6cb8SMadhusudhan Chikkature goto err_irq; 2095a45c6cb8SMadhusudhan Chikkature } 2096a45c6cb8SMadhusudhan Chikkature 2097a45c6cb8SMadhusudhan Chikkature if (pdata->init != NULL) { 2098a45c6cb8SMadhusudhan Chikkature if (pdata->init(&pdev->dev) != 0) { 209970a3341aSDenis Karpov dev_dbg(mmc_dev(host->mmc), 210070a3341aSDenis Karpov "Unable to configure MMC IRQs\n"); 2101a45c6cb8SMadhusudhan Chikkature goto err_irq_cd_init; 2102a45c6cb8SMadhusudhan Chikkature } 2103a45c6cb8SMadhusudhan Chikkature } 2104db0fefc5SAdrian Hunter 2105db0fefc5SAdrian Hunter if (!mmc_slot(host).set_power) { 2106db0fefc5SAdrian Hunter ret = omap_hsmmc_reg_get(host); 2107db0fefc5SAdrian Hunter if (ret) 2108db0fefc5SAdrian Hunter goto err_reg; 2109db0fefc5SAdrian Hunter host->use_reg = 1; 2110db0fefc5SAdrian Hunter } 2111db0fefc5SAdrian Hunter 2112b583f26dSDavid Brownell mmc->ocr_avail = mmc_slot(host).ocr_mask; 2113a45c6cb8SMadhusudhan Chikkature 2114a45c6cb8SMadhusudhan Chikkature /* Request IRQ for card detect */ 2115e1a55f5eSAdrian Hunter if ((mmc_slot(host).card_detect_irq)) { 2116a45c6cb8SMadhusudhan Chikkature ret = request_irq(mmc_slot(host).card_detect_irq, 211770a3341aSDenis Karpov omap_hsmmc_cd_handler, 2118a45c6cb8SMadhusudhan Chikkature IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING 2119a45c6cb8SMadhusudhan Chikkature | IRQF_DISABLED, 2120a45c6cb8SMadhusudhan Chikkature mmc_hostname(mmc), host); 2121a45c6cb8SMadhusudhan Chikkature if (ret) { 2122a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 2123a45c6cb8SMadhusudhan Chikkature "Unable to grab MMC CD IRQ\n"); 2124a45c6cb8SMadhusudhan Chikkature goto err_irq_cd; 2125a45c6cb8SMadhusudhan Chikkature } 2126a45c6cb8SMadhusudhan Chikkature } 2127a45c6cb8SMadhusudhan Chikkature 2128a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK); 2129a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK); 2130a45c6cb8SMadhusudhan Chikkature 21315e2ea617SAdrian Hunter mmc_host_lazy_disable(host->mmc); 21325e2ea617SAdrian Hunter 2133b62f6228SAdrian Hunter omap_hsmmc_protect_card(host); 2134b62f6228SAdrian Hunter 2135a45c6cb8SMadhusudhan Chikkature mmc_add_host(mmc); 2136a45c6cb8SMadhusudhan Chikkature 2137191d1f1dSDenis Karpov if (mmc_slot(host).name != NULL) { 2138a45c6cb8SMadhusudhan Chikkature ret = device_create_file(&mmc->class_dev, &dev_attr_slot_name); 2139a45c6cb8SMadhusudhan Chikkature if (ret < 0) 2140a45c6cb8SMadhusudhan Chikkature goto err_slot_name; 2141a45c6cb8SMadhusudhan Chikkature } 2142191d1f1dSDenis Karpov if (mmc_slot(host).card_detect_irq && mmc_slot(host).get_cover_state) { 2143a45c6cb8SMadhusudhan Chikkature ret = device_create_file(&mmc->class_dev, 2144a45c6cb8SMadhusudhan Chikkature &dev_attr_cover_switch); 2145a45c6cb8SMadhusudhan Chikkature if (ret < 0) 2146db0fefc5SAdrian Hunter goto err_slot_name; 2147a45c6cb8SMadhusudhan Chikkature } 2148a45c6cb8SMadhusudhan Chikkature 214970a3341aSDenis Karpov omap_hsmmc_debugfs(mmc); 2150d900f712SDenis Karpov 2151a45c6cb8SMadhusudhan Chikkature return 0; 2152a45c6cb8SMadhusudhan Chikkature 2153a45c6cb8SMadhusudhan Chikkature err_slot_name: 2154a45c6cb8SMadhusudhan Chikkature mmc_remove_host(mmc); 2155a45c6cb8SMadhusudhan Chikkature free_irq(mmc_slot(host).card_detect_irq, host); 2156db0fefc5SAdrian Hunter err_irq_cd: 2157db0fefc5SAdrian Hunter if (host->use_reg) 2158db0fefc5SAdrian Hunter omap_hsmmc_reg_put(host); 2159db0fefc5SAdrian Hunter err_reg: 2160db0fefc5SAdrian Hunter if (host->pdata->cleanup) 2161db0fefc5SAdrian Hunter host->pdata->cleanup(&pdev->dev); 2162a45c6cb8SMadhusudhan Chikkature err_irq_cd_init: 2163a45c6cb8SMadhusudhan Chikkature free_irq(host->irq, host); 2164a45c6cb8SMadhusudhan Chikkature err_irq: 21655e2ea617SAdrian Hunter mmc_host_disable(host->mmc); 2166a45c6cb8SMadhusudhan Chikkature clk_disable(host->iclk); 2167a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 2168a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 21692bec0893SAdrian Hunter if (host->got_dbclk) { 2170a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 2171a45c6cb8SMadhusudhan Chikkature clk_put(host->dbclk); 2172a45c6cb8SMadhusudhan Chikkature } 2173a45c6cb8SMadhusudhan Chikkature err1: 2174a45c6cb8SMadhusudhan Chikkature iounmap(host->base); 2175db0fefc5SAdrian Hunter platform_set_drvdata(pdev, NULL); 2176a45c6cb8SMadhusudhan Chikkature mmc_free_host(mmc); 2177db0fefc5SAdrian Hunter err_alloc: 2178db0fefc5SAdrian Hunter omap_hsmmc_gpio_free(pdata); 2179db0fefc5SAdrian Hunter err: 2180db0fefc5SAdrian Hunter release_mem_region(res->start, res->end - res->start + 1); 2181a45c6cb8SMadhusudhan Chikkature return ret; 2182a45c6cb8SMadhusudhan Chikkature } 2183a45c6cb8SMadhusudhan Chikkature 218470a3341aSDenis Karpov static int omap_hsmmc_remove(struct platform_device *pdev) 2185a45c6cb8SMadhusudhan Chikkature { 218670a3341aSDenis Karpov struct omap_hsmmc_host *host = platform_get_drvdata(pdev); 2187a45c6cb8SMadhusudhan Chikkature struct resource *res; 2188a45c6cb8SMadhusudhan Chikkature 2189a45c6cb8SMadhusudhan Chikkature if (host) { 21905e2ea617SAdrian Hunter mmc_host_enable(host->mmc); 2191a45c6cb8SMadhusudhan Chikkature mmc_remove_host(host->mmc); 2192db0fefc5SAdrian Hunter if (host->use_reg) 2193db0fefc5SAdrian Hunter omap_hsmmc_reg_put(host); 2194a45c6cb8SMadhusudhan Chikkature if (host->pdata->cleanup) 2195a45c6cb8SMadhusudhan Chikkature host->pdata->cleanup(&pdev->dev); 2196a45c6cb8SMadhusudhan Chikkature free_irq(host->irq, host); 2197a45c6cb8SMadhusudhan Chikkature if (mmc_slot(host).card_detect_irq) 2198a45c6cb8SMadhusudhan Chikkature free_irq(mmc_slot(host).card_detect_irq, host); 2199a45c6cb8SMadhusudhan Chikkature flush_scheduled_work(); 2200a45c6cb8SMadhusudhan Chikkature 22015e2ea617SAdrian Hunter mmc_host_disable(host->mmc); 2202a45c6cb8SMadhusudhan Chikkature clk_disable(host->iclk); 2203a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 2204a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 22052bec0893SAdrian Hunter if (host->got_dbclk) { 2206a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 2207a45c6cb8SMadhusudhan Chikkature clk_put(host->dbclk); 2208a45c6cb8SMadhusudhan Chikkature } 2209a45c6cb8SMadhusudhan Chikkature 2210a45c6cb8SMadhusudhan Chikkature mmc_free_host(host->mmc); 2211a45c6cb8SMadhusudhan Chikkature iounmap(host->base); 2212db0fefc5SAdrian Hunter omap_hsmmc_gpio_free(pdev->dev.platform_data); 2213a45c6cb8SMadhusudhan Chikkature } 2214a45c6cb8SMadhusudhan Chikkature 2215a45c6cb8SMadhusudhan Chikkature res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2216a45c6cb8SMadhusudhan Chikkature if (res) 2217a45c6cb8SMadhusudhan Chikkature release_mem_region(res->start, res->end - res->start + 1); 2218a45c6cb8SMadhusudhan Chikkature platform_set_drvdata(pdev, NULL); 2219a45c6cb8SMadhusudhan Chikkature 2220a45c6cb8SMadhusudhan Chikkature return 0; 2221a45c6cb8SMadhusudhan Chikkature } 2222a45c6cb8SMadhusudhan Chikkature 2223a45c6cb8SMadhusudhan Chikkature #ifdef CONFIG_PM 222470a3341aSDenis Karpov static int omap_hsmmc_suspend(struct platform_device *pdev, pm_message_t state) 2225a45c6cb8SMadhusudhan Chikkature { 2226a45c6cb8SMadhusudhan Chikkature int ret = 0; 222770a3341aSDenis Karpov struct omap_hsmmc_host *host = platform_get_drvdata(pdev); 2228a45c6cb8SMadhusudhan Chikkature 2229a45c6cb8SMadhusudhan Chikkature if (host && host->suspended) 2230a45c6cb8SMadhusudhan Chikkature return 0; 2231a45c6cb8SMadhusudhan Chikkature 2232a45c6cb8SMadhusudhan Chikkature if (host) { 2233a45c6cb8SMadhusudhan Chikkature host->suspended = 1; 2234a45c6cb8SMadhusudhan Chikkature if (host->pdata->suspend) { 2235a45c6cb8SMadhusudhan Chikkature ret = host->pdata->suspend(&pdev->dev, 2236a45c6cb8SMadhusudhan Chikkature host->slot_id); 2237a6b2240dSAdrian Hunter if (ret) { 2238a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 2239a45c6cb8SMadhusudhan Chikkature "Unable to handle MMC board" 2240a45c6cb8SMadhusudhan Chikkature " level suspend\n"); 2241a6b2240dSAdrian Hunter host->suspended = 0; 2242a6b2240dSAdrian Hunter return ret; 2243a45c6cb8SMadhusudhan Chikkature } 2244a6b2240dSAdrian Hunter } 2245a6b2240dSAdrian Hunter cancel_work_sync(&host->mmc_carddetect_work); 2246a6b2240dSAdrian Hunter mmc_host_enable(host->mmc); 2247a6b2240dSAdrian Hunter ret = mmc_suspend_host(host->mmc, state); 2248a6b2240dSAdrian Hunter if (ret == 0) { 2249a6b2240dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, ISE, 0); 2250a6b2240dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, IE, 0); 2251a6b2240dSAdrian Hunter 2252a45c6cb8SMadhusudhan Chikkature 2253a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 22540683af48SJarkko Lavinen OMAP_HSMMC_READ(host->base, HCTL) & ~SDBP); 22555e2ea617SAdrian Hunter mmc_host_disable(host->mmc); 2256a45c6cb8SMadhusudhan Chikkature clk_disable(host->iclk); 22572bec0893SAdrian Hunter if (host->got_dbclk) 2258a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 2259a6b2240dSAdrian Hunter } else { 2260a6b2240dSAdrian Hunter host->suspended = 0; 2261a6b2240dSAdrian Hunter if (host->pdata->resume) { 2262a6b2240dSAdrian Hunter ret = host->pdata->resume(&pdev->dev, 2263a6b2240dSAdrian Hunter host->slot_id); 2264a6b2240dSAdrian Hunter if (ret) 2265a6b2240dSAdrian Hunter dev_dbg(mmc_dev(host->mmc), 2266a6b2240dSAdrian Hunter "Unmask interrupt failed\n"); 2267a6b2240dSAdrian Hunter } 22685e2ea617SAdrian Hunter mmc_host_disable(host->mmc); 2269a6b2240dSAdrian Hunter } 2270a45c6cb8SMadhusudhan Chikkature 2271a45c6cb8SMadhusudhan Chikkature } 2272a45c6cb8SMadhusudhan Chikkature return ret; 2273a45c6cb8SMadhusudhan Chikkature } 2274a45c6cb8SMadhusudhan Chikkature 2275a45c6cb8SMadhusudhan Chikkature /* Routine to resume the MMC device */ 227670a3341aSDenis Karpov static int omap_hsmmc_resume(struct platform_device *pdev) 2277a45c6cb8SMadhusudhan Chikkature { 2278a45c6cb8SMadhusudhan Chikkature int ret = 0; 227970a3341aSDenis Karpov struct omap_hsmmc_host *host = platform_get_drvdata(pdev); 2280a45c6cb8SMadhusudhan Chikkature 2281a45c6cb8SMadhusudhan Chikkature if (host && !host->suspended) 2282a45c6cb8SMadhusudhan Chikkature return 0; 2283a45c6cb8SMadhusudhan Chikkature 2284a45c6cb8SMadhusudhan Chikkature if (host) { 2285a45c6cb8SMadhusudhan Chikkature ret = clk_enable(host->iclk); 228611dd62a7SDenis Karpov if (ret) 2287a45c6cb8SMadhusudhan Chikkature goto clk_en_err; 2288a45c6cb8SMadhusudhan Chikkature 228911dd62a7SDenis Karpov if (mmc_host_enable(host->mmc) != 0) { 229011dd62a7SDenis Karpov clk_disable(host->iclk); 229111dd62a7SDenis Karpov goto clk_en_err; 229211dd62a7SDenis Karpov } 229311dd62a7SDenis Karpov 22942bec0893SAdrian Hunter if (host->got_dbclk) 22952bec0893SAdrian Hunter clk_enable(host->dbclk); 22962bec0893SAdrian Hunter 229770a3341aSDenis Karpov omap_hsmmc_conf_bus_power(host); 22981b331e69SKim Kyuwon 2299a45c6cb8SMadhusudhan Chikkature if (host->pdata->resume) { 2300a45c6cb8SMadhusudhan Chikkature ret = host->pdata->resume(&pdev->dev, host->slot_id); 2301a45c6cb8SMadhusudhan Chikkature if (ret) 2302a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 2303a45c6cb8SMadhusudhan Chikkature "Unmask interrupt failed\n"); 2304a45c6cb8SMadhusudhan Chikkature } 2305a45c6cb8SMadhusudhan Chikkature 2306b62f6228SAdrian Hunter omap_hsmmc_protect_card(host); 2307b62f6228SAdrian Hunter 2308a45c6cb8SMadhusudhan Chikkature /* Notify the core to resume the host */ 2309a45c6cb8SMadhusudhan Chikkature ret = mmc_resume_host(host->mmc); 2310a45c6cb8SMadhusudhan Chikkature if (ret == 0) 2311a45c6cb8SMadhusudhan Chikkature host->suspended = 0; 231270a3341aSDenis Karpov 23135e2ea617SAdrian Hunter mmc_host_lazy_disable(host->mmc); 2314a45c6cb8SMadhusudhan Chikkature } 2315a45c6cb8SMadhusudhan Chikkature 2316a45c6cb8SMadhusudhan Chikkature return ret; 2317a45c6cb8SMadhusudhan Chikkature 2318a45c6cb8SMadhusudhan Chikkature clk_en_err: 2319a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 2320a45c6cb8SMadhusudhan Chikkature "Failed to enable MMC clocks during resume\n"); 2321a45c6cb8SMadhusudhan Chikkature return ret; 2322a45c6cb8SMadhusudhan Chikkature } 2323a45c6cb8SMadhusudhan Chikkature 2324a45c6cb8SMadhusudhan Chikkature #else 232570a3341aSDenis Karpov #define omap_hsmmc_suspend NULL 232670a3341aSDenis Karpov #define omap_hsmmc_resume NULL 2327a45c6cb8SMadhusudhan Chikkature #endif 2328a45c6cb8SMadhusudhan Chikkature 232970a3341aSDenis Karpov static struct platform_driver omap_hsmmc_driver = { 233070a3341aSDenis Karpov .remove = omap_hsmmc_remove, 233170a3341aSDenis Karpov .suspend = omap_hsmmc_suspend, 233270a3341aSDenis Karpov .resume = omap_hsmmc_resume, 2333a45c6cb8SMadhusudhan Chikkature .driver = { 2334a45c6cb8SMadhusudhan Chikkature .name = DRIVER_NAME, 2335a45c6cb8SMadhusudhan Chikkature .owner = THIS_MODULE, 2336a45c6cb8SMadhusudhan Chikkature }, 2337a45c6cb8SMadhusudhan Chikkature }; 2338a45c6cb8SMadhusudhan Chikkature 233970a3341aSDenis Karpov static int __init omap_hsmmc_init(void) 2340a45c6cb8SMadhusudhan Chikkature { 2341a45c6cb8SMadhusudhan Chikkature /* Register the MMC driver */ 23428753298aSRoger Quadros return platform_driver_probe(&omap_hsmmc_driver, omap_hsmmc_probe); 2343a45c6cb8SMadhusudhan Chikkature } 2344a45c6cb8SMadhusudhan Chikkature 234570a3341aSDenis Karpov static void __exit omap_hsmmc_cleanup(void) 2346a45c6cb8SMadhusudhan Chikkature { 2347a45c6cb8SMadhusudhan Chikkature /* Unregister MMC driver */ 234870a3341aSDenis Karpov platform_driver_unregister(&omap_hsmmc_driver); 2349a45c6cb8SMadhusudhan Chikkature } 2350a45c6cb8SMadhusudhan Chikkature 235170a3341aSDenis Karpov module_init(omap_hsmmc_init); 235270a3341aSDenis Karpov module_exit(omap_hsmmc_cleanup); 2353a45c6cb8SMadhusudhan Chikkature 2354a45c6cb8SMadhusudhan Chikkature MODULE_DESCRIPTION("OMAP High Speed Multimedia Card driver"); 2355a45c6cb8SMadhusudhan Chikkature MODULE_LICENSE("GPL"); 2356a45c6cb8SMadhusudhan Chikkature MODULE_ALIAS("platform:" DRIVER_NAME); 2357a45c6cb8SMadhusudhan Chikkature MODULE_AUTHOR("Texas Instruments Inc"); 2358