1a45c6cb8SMadhusudhan Chikkature /* 2a45c6cb8SMadhusudhan Chikkature * drivers/mmc/host/omap_hsmmc.c 3a45c6cb8SMadhusudhan Chikkature * 4a45c6cb8SMadhusudhan Chikkature * Driver for OMAP2430/3430 MMC controller. 5a45c6cb8SMadhusudhan Chikkature * 6a45c6cb8SMadhusudhan Chikkature * Copyright (C) 2007 Texas Instruments. 7a45c6cb8SMadhusudhan Chikkature * 8a45c6cb8SMadhusudhan Chikkature * Authors: 9a45c6cb8SMadhusudhan Chikkature * Syed Mohammed Khasim <x0khasim@ti.com> 10a45c6cb8SMadhusudhan Chikkature * Madhusudhan <madhu.cr@ti.com> 11a45c6cb8SMadhusudhan Chikkature * Mohit Jalori <mjalori@ti.com> 12a45c6cb8SMadhusudhan Chikkature * 13a45c6cb8SMadhusudhan Chikkature * This file is licensed under the terms of the GNU General Public License 14a45c6cb8SMadhusudhan Chikkature * version 2. This program is licensed "as is" without any warranty of any 15a45c6cb8SMadhusudhan Chikkature * kind, whether express or implied. 16a45c6cb8SMadhusudhan Chikkature */ 17a45c6cb8SMadhusudhan Chikkature 18a45c6cb8SMadhusudhan Chikkature #include <linux/module.h> 19a45c6cb8SMadhusudhan Chikkature #include <linux/init.h> 20ac330f44SAndy Shevchenko #include <linux/kernel.h> 21d900f712SDenis Karpov #include <linux/debugfs.h> 22c5c98927SRussell King #include <linux/dmaengine.h> 23d900f712SDenis Karpov #include <linux/seq_file.h> 24a45c6cb8SMadhusudhan Chikkature #include <linux/interrupt.h> 25a45c6cb8SMadhusudhan Chikkature #include <linux/delay.h> 26a45c6cb8SMadhusudhan Chikkature #include <linux/dma-mapping.h> 27a45c6cb8SMadhusudhan Chikkature #include <linux/platform_device.h> 28a45c6cb8SMadhusudhan Chikkature #include <linux/timer.h> 29a45c6cb8SMadhusudhan Chikkature #include <linux/clk.h> 3046856a68SRajendra Nayak #include <linux/of.h> 3146856a68SRajendra Nayak #include <linux/of_gpio.h> 3246856a68SRajendra Nayak #include <linux/of_device.h> 333451c067SRussell King #include <linux/omap-dma.h> 34a45c6cb8SMadhusudhan Chikkature #include <linux/mmc/host.h> 3513189e78SJarkko Lavinen #include <linux/mmc/core.h> 3693caf8e6SAdrian Hunter #include <linux/mmc/mmc.h> 37a45c6cb8SMadhusudhan Chikkature #include <linux/io.h> 38db0fefc5SAdrian Hunter #include <linux/gpio.h> 39db0fefc5SAdrian Hunter #include <linux/regulator/consumer.h> 40fa4aa2d4SBalaji T K #include <linux/pm_runtime.h> 41a45c6cb8SMadhusudhan Chikkature #include <mach/hardware.h> 42ce491cf8STony Lindgren #include <plat/mmc.h> 43ce491cf8STony Lindgren #include <plat/cpu.h> 44a45c6cb8SMadhusudhan Chikkature 45a45c6cb8SMadhusudhan Chikkature /* OMAP HSMMC Host Controller Registers */ 4611dd62a7SDenis Karpov #define OMAP_HSMMC_SYSSTATUS 0x0014 47a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_CON 0x002C 48a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_BLK 0x0104 49a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_ARG 0x0108 50a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_CMD 0x010C 51a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP10 0x0110 52a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP32 0x0114 53a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP54 0x0118 54a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP76 0x011C 55a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_DATA 0x0120 56a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_HCTL 0x0128 57a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_SYSCTL 0x012C 58a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_STAT 0x0130 59a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_IE 0x0134 60a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_ISE 0x0138 61a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_CAPA 0x0140 62a45c6cb8SMadhusudhan Chikkature 63a45c6cb8SMadhusudhan Chikkature #define VS18 (1 << 26) 64a45c6cb8SMadhusudhan Chikkature #define VS30 (1 << 25) 65a45c6cb8SMadhusudhan Chikkature #define SDVS18 (0x5 << 9) 66a45c6cb8SMadhusudhan Chikkature #define SDVS30 (0x6 << 9) 67eb250826SDavid Brownell #define SDVS33 (0x7 << 9) 681b331e69SKim Kyuwon #define SDVS_MASK 0x00000E00 69a45c6cb8SMadhusudhan Chikkature #define SDVSCLR 0xFFFFF1FF 70a45c6cb8SMadhusudhan Chikkature #define SDVSDET 0x00000400 71a45c6cb8SMadhusudhan Chikkature #define AUTOIDLE 0x1 72a45c6cb8SMadhusudhan Chikkature #define SDBP (1 << 8) 73a45c6cb8SMadhusudhan Chikkature #define DTO 0xe 74a45c6cb8SMadhusudhan Chikkature #define ICE 0x1 75a45c6cb8SMadhusudhan Chikkature #define ICS 0x2 76a45c6cb8SMadhusudhan Chikkature #define CEN (1 << 2) 77a45c6cb8SMadhusudhan Chikkature #define CLKD_MASK 0x0000FFC0 78a45c6cb8SMadhusudhan Chikkature #define CLKD_SHIFT 6 79a45c6cb8SMadhusudhan Chikkature #define DTO_MASK 0x000F0000 80a45c6cb8SMadhusudhan Chikkature #define DTO_SHIFT 16 81a45c6cb8SMadhusudhan Chikkature #define INT_EN_MASK 0x307F0033 82ccdfe3a6SAnand Gadiyar #define BWR_ENABLE (1 << 4) 83ccdfe3a6SAnand Gadiyar #define BRR_ENABLE (1 << 5) 8493caf8e6SAdrian Hunter #define DTO_ENABLE (1 << 20) 85a45c6cb8SMadhusudhan Chikkature #define INIT_STREAM (1 << 1) 86a45c6cb8SMadhusudhan Chikkature #define DP_SELECT (1 << 21) 87a45c6cb8SMadhusudhan Chikkature #define DDIR (1 << 4) 88a45c6cb8SMadhusudhan Chikkature #define DMA_EN 0x1 89a45c6cb8SMadhusudhan Chikkature #define MSBS (1 << 5) 90a45c6cb8SMadhusudhan Chikkature #define BCE (1 << 1) 91a45c6cb8SMadhusudhan Chikkature #define FOUR_BIT (1 << 1) 9203b5d924SBalaji T K #define DDR (1 << 19) 9373153010SJarkko Lavinen #define DW8 (1 << 5) 94a45c6cb8SMadhusudhan Chikkature #define CC 0x1 95a45c6cb8SMadhusudhan Chikkature #define TC 0x02 96a45c6cb8SMadhusudhan Chikkature #define OD 0x1 97a45c6cb8SMadhusudhan Chikkature #define ERR (1 << 15) 98a45c6cb8SMadhusudhan Chikkature #define CMD_TIMEOUT (1 << 16) 99a45c6cb8SMadhusudhan Chikkature #define DATA_TIMEOUT (1 << 20) 100a45c6cb8SMadhusudhan Chikkature #define CMD_CRC (1 << 17) 101a45c6cb8SMadhusudhan Chikkature #define DATA_CRC (1 << 21) 102a45c6cb8SMadhusudhan Chikkature #define CARD_ERR (1 << 28) 103a45c6cb8SMadhusudhan Chikkature #define STAT_CLEAR 0xFFFFFFFF 104a45c6cb8SMadhusudhan Chikkature #define INIT_STREAM_CMD 0x00000000 105a45c6cb8SMadhusudhan Chikkature #define DUAL_VOLT_OCR_BIT 7 106a45c6cb8SMadhusudhan Chikkature #define SRC (1 << 25) 107a45c6cb8SMadhusudhan Chikkature #define SRD (1 << 26) 10811dd62a7SDenis Karpov #define SOFTRESET (1 << 1) 10911dd62a7SDenis Karpov #define RESETDONE (1 << 0) 110a45c6cb8SMadhusudhan Chikkature 111fa4aa2d4SBalaji T K #define MMC_AUTOSUSPEND_DELAY 100 112a45c6cb8SMadhusudhan Chikkature #define MMC_TIMEOUT_MS 20 1136b206efeSAndy Shevchenko #define OMAP_MMC_MIN_CLOCK 400000 1146b206efeSAndy Shevchenko #define OMAP_MMC_MAX_CLOCK 52000000 1150005ae73SKishore Kadiyala #define DRIVER_NAME "omap_hsmmc" 116a45c6cb8SMadhusudhan Chikkature 117a45c6cb8SMadhusudhan Chikkature /* 118a45c6cb8SMadhusudhan Chikkature * One controller can have multiple slots, like on some omap boards using 119a45c6cb8SMadhusudhan Chikkature * omap.c controller driver. Luckily this is not currently done on any known 120a45c6cb8SMadhusudhan Chikkature * omap_hsmmc.c device. 121a45c6cb8SMadhusudhan Chikkature */ 122a45c6cb8SMadhusudhan Chikkature #define mmc_slot(host) (host->pdata->slots[host->slot_id]) 123a45c6cb8SMadhusudhan Chikkature 124a45c6cb8SMadhusudhan Chikkature /* 125a45c6cb8SMadhusudhan Chikkature * MMC Host controller read/write API's 126a45c6cb8SMadhusudhan Chikkature */ 127a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_READ(base, reg) \ 128a45c6cb8SMadhusudhan Chikkature __raw_readl((base) + OMAP_HSMMC_##reg) 129a45c6cb8SMadhusudhan Chikkature 130a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_WRITE(base, reg, val) \ 131a45c6cb8SMadhusudhan Chikkature __raw_writel((val), (base) + OMAP_HSMMC_##reg) 132a45c6cb8SMadhusudhan Chikkature 1339782aff8SPer Forlin struct omap_hsmmc_next { 1349782aff8SPer Forlin unsigned int dma_len; 1359782aff8SPer Forlin s32 cookie; 1369782aff8SPer Forlin }; 1379782aff8SPer Forlin 13870a3341aSDenis Karpov struct omap_hsmmc_host { 139a45c6cb8SMadhusudhan Chikkature struct device *dev; 140a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc; 141a45c6cb8SMadhusudhan Chikkature struct mmc_request *mrq; 142a45c6cb8SMadhusudhan Chikkature struct mmc_command *cmd; 143a45c6cb8SMadhusudhan Chikkature struct mmc_data *data; 144a45c6cb8SMadhusudhan Chikkature struct clk *fclk; 145a45c6cb8SMadhusudhan Chikkature struct clk *dbclk; 146db0fefc5SAdrian Hunter /* 147db0fefc5SAdrian Hunter * vcc == configured supply 148db0fefc5SAdrian Hunter * vcc_aux == optional 149db0fefc5SAdrian Hunter * - MMC1, supply for DAT4..DAT7 150db0fefc5SAdrian Hunter * - MMC2/MMC2, external level shifter voltage supply, for 151db0fefc5SAdrian Hunter * chip (SDIO, eMMC, etc) or transceiver (MMC2 only) 152db0fefc5SAdrian Hunter */ 153db0fefc5SAdrian Hunter struct regulator *vcc; 154db0fefc5SAdrian Hunter struct regulator *vcc_aux; 155a45c6cb8SMadhusudhan Chikkature void __iomem *base; 156a45c6cb8SMadhusudhan Chikkature resource_size_t mapbase; 1574dffd7a2SAdrian Hunter spinlock_t irq_lock; /* Prevent races with irq handler */ 158a45c6cb8SMadhusudhan Chikkature unsigned int dma_len; 1590ccd76d4SJuha Yrjola unsigned int dma_sg_idx; 160a45c6cb8SMadhusudhan Chikkature unsigned char bus_mode; 161a3621465SAdrian Hunter unsigned char power_mode; 162a45c6cb8SMadhusudhan Chikkature int suspended; 163a45c6cb8SMadhusudhan Chikkature int irq; 164a45c6cb8SMadhusudhan Chikkature int use_dma, dma_ch; 165c5c98927SRussell King struct dma_chan *tx_chan; 166c5c98927SRussell King struct dma_chan *rx_chan; 167a45c6cb8SMadhusudhan Chikkature int slot_id; 1684a694dc9SAdrian Hunter int response_busy; 16911dd62a7SDenis Karpov int context_loss; 170b62f6228SAdrian Hunter int protect_card; 171b62f6228SAdrian Hunter int reqs_blocked; 172db0fefc5SAdrian Hunter int use_reg; 173b417577dSAdrian Hunter int req_in_progress; 1749782aff8SPer Forlin struct omap_hsmmc_next next_data; 17511dd62a7SDenis Karpov 176a45c6cb8SMadhusudhan Chikkature struct omap_mmc_platform_data *pdata; 177a45c6cb8SMadhusudhan Chikkature }; 178a45c6cb8SMadhusudhan Chikkature 179db0fefc5SAdrian Hunter static int omap_hsmmc_card_detect(struct device *dev, int slot) 180db0fefc5SAdrian Hunter { 1819ea28ecbSBalaji T K struct omap_hsmmc_host *host = dev_get_drvdata(dev); 1829ea28ecbSBalaji T K struct omap_mmc_platform_data *mmc = host->pdata; 183db0fefc5SAdrian Hunter 184db0fefc5SAdrian Hunter /* NOTE: assumes card detect signal is active-low */ 185db0fefc5SAdrian Hunter return !gpio_get_value_cansleep(mmc->slots[0].switch_pin); 186db0fefc5SAdrian Hunter } 187db0fefc5SAdrian Hunter 188db0fefc5SAdrian Hunter static int omap_hsmmc_get_wp(struct device *dev, int slot) 189db0fefc5SAdrian Hunter { 1909ea28ecbSBalaji T K struct omap_hsmmc_host *host = dev_get_drvdata(dev); 1919ea28ecbSBalaji T K struct omap_mmc_platform_data *mmc = host->pdata; 192db0fefc5SAdrian Hunter 193db0fefc5SAdrian Hunter /* NOTE: assumes write protect signal is active-high */ 194db0fefc5SAdrian Hunter return gpio_get_value_cansleep(mmc->slots[0].gpio_wp); 195db0fefc5SAdrian Hunter } 196db0fefc5SAdrian Hunter 197db0fefc5SAdrian Hunter static int omap_hsmmc_get_cover_state(struct device *dev, int slot) 198db0fefc5SAdrian Hunter { 1999ea28ecbSBalaji T K struct omap_hsmmc_host *host = dev_get_drvdata(dev); 2009ea28ecbSBalaji T K struct omap_mmc_platform_data *mmc = host->pdata; 201db0fefc5SAdrian Hunter 202db0fefc5SAdrian Hunter /* NOTE: assumes card detect signal is active-low */ 203db0fefc5SAdrian Hunter return !gpio_get_value_cansleep(mmc->slots[0].switch_pin); 204db0fefc5SAdrian Hunter } 205db0fefc5SAdrian Hunter 206db0fefc5SAdrian Hunter #ifdef CONFIG_PM 207db0fefc5SAdrian Hunter 208db0fefc5SAdrian Hunter static int omap_hsmmc_suspend_cdirq(struct device *dev, int slot) 209db0fefc5SAdrian Hunter { 2109ea28ecbSBalaji T K struct omap_hsmmc_host *host = dev_get_drvdata(dev); 2119ea28ecbSBalaji T K struct omap_mmc_platform_data *mmc = host->pdata; 212db0fefc5SAdrian Hunter 213db0fefc5SAdrian Hunter disable_irq(mmc->slots[0].card_detect_irq); 214db0fefc5SAdrian Hunter return 0; 215db0fefc5SAdrian Hunter } 216db0fefc5SAdrian Hunter 217db0fefc5SAdrian Hunter static int omap_hsmmc_resume_cdirq(struct device *dev, int slot) 218db0fefc5SAdrian Hunter { 2199ea28ecbSBalaji T K struct omap_hsmmc_host *host = dev_get_drvdata(dev); 2209ea28ecbSBalaji T K struct omap_mmc_platform_data *mmc = host->pdata; 221db0fefc5SAdrian Hunter 222db0fefc5SAdrian Hunter enable_irq(mmc->slots[0].card_detect_irq); 223db0fefc5SAdrian Hunter return 0; 224db0fefc5SAdrian Hunter } 225db0fefc5SAdrian Hunter 226db0fefc5SAdrian Hunter #else 227db0fefc5SAdrian Hunter 228db0fefc5SAdrian Hunter #define omap_hsmmc_suspend_cdirq NULL 229db0fefc5SAdrian Hunter #define omap_hsmmc_resume_cdirq NULL 230db0fefc5SAdrian Hunter 231db0fefc5SAdrian Hunter #endif 232db0fefc5SAdrian Hunter 233b702b106SAdrian Hunter #ifdef CONFIG_REGULATOR 234b702b106SAdrian Hunter 23569b07eceSRajendra Nayak static int omap_hsmmc_set_power(struct device *dev, int slot, int power_on, 236db0fefc5SAdrian Hunter int vdd) 237db0fefc5SAdrian Hunter { 238db0fefc5SAdrian Hunter struct omap_hsmmc_host *host = 239db0fefc5SAdrian Hunter platform_get_drvdata(to_platform_device(dev)); 240db0fefc5SAdrian Hunter int ret = 0; 241db0fefc5SAdrian Hunter 242db0fefc5SAdrian Hunter /* 243db0fefc5SAdrian Hunter * If we don't see a Vcc regulator, assume it's a fixed 244db0fefc5SAdrian Hunter * voltage always-on regulator. 245db0fefc5SAdrian Hunter */ 246db0fefc5SAdrian Hunter if (!host->vcc) 247db0fefc5SAdrian Hunter return 0; 2481f84b71bSRajendra Nayak /* 2491f84b71bSRajendra Nayak * With DT, never turn OFF the regulator. This is because 2501f84b71bSRajendra Nayak * the pbias cell programming support is still missing when 2511f84b71bSRajendra Nayak * booting with Device tree 2521f84b71bSRajendra Nayak */ 2534d048f91SRajendra Nayak if (dev->of_node && !vdd) 2541f84b71bSRajendra Nayak return 0; 255db0fefc5SAdrian Hunter 256db0fefc5SAdrian Hunter if (mmc_slot(host).before_set_reg) 257db0fefc5SAdrian Hunter mmc_slot(host).before_set_reg(dev, slot, power_on, vdd); 258db0fefc5SAdrian Hunter 259db0fefc5SAdrian Hunter /* 260db0fefc5SAdrian Hunter * Assume Vcc regulator is used only to power the card ... OMAP 261db0fefc5SAdrian Hunter * VDDS is used to power the pins, optionally with a transceiver to 262db0fefc5SAdrian Hunter * support cards using voltages other than VDDS (1.8V nominal). When a 263db0fefc5SAdrian Hunter * transceiver is used, DAT3..7 are muxed as transceiver control pins. 264db0fefc5SAdrian Hunter * 265db0fefc5SAdrian Hunter * In some cases this regulator won't support enable/disable; 266db0fefc5SAdrian Hunter * e.g. it's a fixed rail for a WLAN chip. 267db0fefc5SAdrian Hunter * 268db0fefc5SAdrian Hunter * In other cases vcc_aux switches interface power. Example, for 269db0fefc5SAdrian Hunter * eMMC cards it represents VccQ. Sometimes transceivers or SDIO 270db0fefc5SAdrian Hunter * chips/cards need an interface voltage rail too. 271db0fefc5SAdrian Hunter */ 272db0fefc5SAdrian Hunter if (power_on) { 27399fc5131SLinus Walleij ret = mmc_regulator_set_ocr(host->mmc, host->vcc, vdd); 274db0fefc5SAdrian Hunter /* Enable interface voltage rail, if needed */ 275db0fefc5SAdrian Hunter if (ret == 0 && host->vcc_aux) { 276db0fefc5SAdrian Hunter ret = regulator_enable(host->vcc_aux); 277db0fefc5SAdrian Hunter if (ret < 0) 27899fc5131SLinus Walleij ret = mmc_regulator_set_ocr(host->mmc, 27999fc5131SLinus Walleij host->vcc, 0); 280db0fefc5SAdrian Hunter } 281db0fefc5SAdrian Hunter } else { 28299fc5131SLinus Walleij /* Shut down the rail */ 2836da20c89SAdrian Hunter if (host->vcc_aux) 284db0fefc5SAdrian Hunter ret = regulator_disable(host->vcc_aux); 28599fc5131SLinus Walleij if (!ret) { 28699fc5131SLinus Walleij /* Then proceed to shut down the local regulator */ 28799fc5131SLinus Walleij ret = mmc_regulator_set_ocr(host->mmc, 28899fc5131SLinus Walleij host->vcc, 0); 28999fc5131SLinus Walleij } 290db0fefc5SAdrian Hunter } 291db0fefc5SAdrian Hunter 292db0fefc5SAdrian Hunter if (mmc_slot(host).after_set_reg) 293db0fefc5SAdrian Hunter mmc_slot(host).after_set_reg(dev, slot, power_on, vdd); 294db0fefc5SAdrian Hunter 295db0fefc5SAdrian Hunter return ret; 296db0fefc5SAdrian Hunter } 297db0fefc5SAdrian Hunter 298db0fefc5SAdrian Hunter static int omap_hsmmc_reg_get(struct omap_hsmmc_host *host) 299db0fefc5SAdrian Hunter { 300db0fefc5SAdrian Hunter struct regulator *reg; 30164be9782Skishore kadiyala int ocr_value = 0; 302db0fefc5SAdrian Hunter 303db0fefc5SAdrian Hunter reg = regulator_get(host->dev, "vmmc"); 304db0fefc5SAdrian Hunter if (IS_ERR(reg)) { 305db0fefc5SAdrian Hunter dev_dbg(host->dev, "vmmc regulator missing\n"); 3061fdc90fbSNeilBrown return PTR_ERR(reg); 307db0fefc5SAdrian Hunter } else { 3081fdc90fbSNeilBrown mmc_slot(host).set_power = omap_hsmmc_set_power; 309db0fefc5SAdrian Hunter host->vcc = reg; 31064be9782Skishore kadiyala ocr_value = mmc_regulator_get_ocrmask(reg); 31164be9782Skishore kadiyala if (!mmc_slot(host).ocr_mask) { 31264be9782Skishore kadiyala mmc_slot(host).ocr_mask = ocr_value; 31364be9782Skishore kadiyala } else { 31464be9782Skishore kadiyala if (!(mmc_slot(host).ocr_mask & ocr_value)) { 3152cecdf00SRajendra Nayak dev_err(host->dev, "ocrmask %x is not supported\n", 316e3f1adb6SRajendra Nayak mmc_slot(host).ocr_mask); 31764be9782Skishore kadiyala mmc_slot(host).ocr_mask = 0; 31864be9782Skishore kadiyala return -EINVAL; 31964be9782Skishore kadiyala } 32064be9782Skishore kadiyala } 321db0fefc5SAdrian Hunter 322db0fefc5SAdrian Hunter /* Allow an aux regulator */ 323db0fefc5SAdrian Hunter reg = regulator_get(host->dev, "vmmc_aux"); 324db0fefc5SAdrian Hunter host->vcc_aux = IS_ERR(reg) ? NULL : reg; 325db0fefc5SAdrian Hunter 326b1c1df7aSBalaji T K /* For eMMC do not power off when not in sleep state */ 327b1c1df7aSBalaji T K if (mmc_slot(host).no_regulator_off_init) 328b1c1df7aSBalaji T K return 0; 329db0fefc5SAdrian Hunter /* 330db0fefc5SAdrian Hunter * UGLY HACK: workaround regulator framework bugs. 331db0fefc5SAdrian Hunter * When the bootloader leaves a supply active, it's 332db0fefc5SAdrian Hunter * initialized with zero usecount ... and we can't 333db0fefc5SAdrian Hunter * disable it without first enabling it. Until the 334db0fefc5SAdrian Hunter * framework is fixed, we need a workaround like this 335db0fefc5SAdrian Hunter * (which is safe for MMC, but not in general). 336db0fefc5SAdrian Hunter */ 337e840ce13SAdrian Hunter if (regulator_is_enabled(host->vcc) > 0 || 338e840ce13SAdrian Hunter (host->vcc_aux && regulator_is_enabled(host->vcc_aux))) { 339e840ce13SAdrian Hunter int vdd = ffs(mmc_slot(host).ocr_mask) - 1; 340e840ce13SAdrian Hunter 341e840ce13SAdrian Hunter mmc_slot(host).set_power(host->dev, host->slot_id, 342e840ce13SAdrian Hunter 1, vdd); 343e840ce13SAdrian Hunter mmc_slot(host).set_power(host->dev, host->slot_id, 344e840ce13SAdrian Hunter 0, 0); 345db0fefc5SAdrian Hunter } 346db0fefc5SAdrian Hunter } 347db0fefc5SAdrian Hunter 348db0fefc5SAdrian Hunter return 0; 349db0fefc5SAdrian Hunter } 350db0fefc5SAdrian Hunter 351db0fefc5SAdrian Hunter static void omap_hsmmc_reg_put(struct omap_hsmmc_host *host) 352db0fefc5SAdrian Hunter { 353db0fefc5SAdrian Hunter regulator_put(host->vcc); 354db0fefc5SAdrian Hunter regulator_put(host->vcc_aux); 355db0fefc5SAdrian Hunter mmc_slot(host).set_power = NULL; 356db0fefc5SAdrian Hunter } 357db0fefc5SAdrian Hunter 358b702b106SAdrian Hunter static inline int omap_hsmmc_have_reg(void) 359b702b106SAdrian Hunter { 360b702b106SAdrian Hunter return 1; 361b702b106SAdrian Hunter } 362b702b106SAdrian Hunter 363b702b106SAdrian Hunter #else 364b702b106SAdrian Hunter 365b702b106SAdrian Hunter static inline int omap_hsmmc_reg_get(struct omap_hsmmc_host *host) 366b702b106SAdrian Hunter { 367b702b106SAdrian Hunter return -EINVAL; 368b702b106SAdrian Hunter } 369b702b106SAdrian Hunter 370b702b106SAdrian Hunter static inline void omap_hsmmc_reg_put(struct omap_hsmmc_host *host) 371b702b106SAdrian Hunter { 372b702b106SAdrian Hunter } 373b702b106SAdrian Hunter 374b702b106SAdrian Hunter static inline int omap_hsmmc_have_reg(void) 375b702b106SAdrian Hunter { 376b702b106SAdrian Hunter return 0; 377b702b106SAdrian Hunter } 378b702b106SAdrian Hunter 379b702b106SAdrian Hunter #endif 380b702b106SAdrian Hunter 381b702b106SAdrian Hunter static int omap_hsmmc_gpio_init(struct omap_mmc_platform_data *pdata) 382b702b106SAdrian Hunter { 383b702b106SAdrian Hunter int ret; 384b702b106SAdrian Hunter 385b702b106SAdrian Hunter if (gpio_is_valid(pdata->slots[0].switch_pin)) { 386b702b106SAdrian Hunter if (pdata->slots[0].cover) 387b702b106SAdrian Hunter pdata->slots[0].get_cover_state = 388b702b106SAdrian Hunter omap_hsmmc_get_cover_state; 389b702b106SAdrian Hunter else 390b702b106SAdrian Hunter pdata->slots[0].card_detect = omap_hsmmc_card_detect; 391b702b106SAdrian Hunter pdata->slots[0].card_detect_irq = 392b702b106SAdrian Hunter gpio_to_irq(pdata->slots[0].switch_pin); 393b702b106SAdrian Hunter ret = gpio_request(pdata->slots[0].switch_pin, "mmc_cd"); 394b702b106SAdrian Hunter if (ret) 395b702b106SAdrian Hunter return ret; 396b702b106SAdrian Hunter ret = gpio_direction_input(pdata->slots[0].switch_pin); 397b702b106SAdrian Hunter if (ret) 398b702b106SAdrian Hunter goto err_free_sp; 399b702b106SAdrian Hunter } else 400b702b106SAdrian Hunter pdata->slots[0].switch_pin = -EINVAL; 401b702b106SAdrian Hunter 402b702b106SAdrian Hunter if (gpio_is_valid(pdata->slots[0].gpio_wp)) { 403b702b106SAdrian Hunter pdata->slots[0].get_ro = omap_hsmmc_get_wp; 404b702b106SAdrian Hunter ret = gpio_request(pdata->slots[0].gpio_wp, "mmc_wp"); 405b702b106SAdrian Hunter if (ret) 406b702b106SAdrian Hunter goto err_free_cd; 407b702b106SAdrian Hunter ret = gpio_direction_input(pdata->slots[0].gpio_wp); 408b702b106SAdrian Hunter if (ret) 409b702b106SAdrian Hunter goto err_free_wp; 410b702b106SAdrian Hunter } else 411b702b106SAdrian Hunter pdata->slots[0].gpio_wp = -EINVAL; 412b702b106SAdrian Hunter 413b702b106SAdrian Hunter return 0; 414b702b106SAdrian Hunter 415b702b106SAdrian Hunter err_free_wp: 416b702b106SAdrian Hunter gpio_free(pdata->slots[0].gpio_wp); 417b702b106SAdrian Hunter err_free_cd: 418b702b106SAdrian Hunter if (gpio_is_valid(pdata->slots[0].switch_pin)) 419b702b106SAdrian Hunter err_free_sp: 420b702b106SAdrian Hunter gpio_free(pdata->slots[0].switch_pin); 421b702b106SAdrian Hunter return ret; 422b702b106SAdrian Hunter } 423b702b106SAdrian Hunter 424b702b106SAdrian Hunter static void omap_hsmmc_gpio_free(struct omap_mmc_platform_data *pdata) 425b702b106SAdrian Hunter { 426b702b106SAdrian Hunter if (gpio_is_valid(pdata->slots[0].gpio_wp)) 427b702b106SAdrian Hunter gpio_free(pdata->slots[0].gpio_wp); 428b702b106SAdrian Hunter if (gpio_is_valid(pdata->slots[0].switch_pin)) 429b702b106SAdrian Hunter gpio_free(pdata->slots[0].switch_pin); 430b702b106SAdrian Hunter } 431b702b106SAdrian Hunter 432a45c6cb8SMadhusudhan Chikkature /* 433e0c7f99bSAndy Shevchenko * Start clock to the card 434e0c7f99bSAndy Shevchenko */ 435e0c7f99bSAndy Shevchenko static void omap_hsmmc_start_clock(struct omap_hsmmc_host *host) 436e0c7f99bSAndy Shevchenko { 437e0c7f99bSAndy Shevchenko OMAP_HSMMC_WRITE(host->base, SYSCTL, 438e0c7f99bSAndy Shevchenko OMAP_HSMMC_READ(host->base, SYSCTL) | CEN); 439e0c7f99bSAndy Shevchenko } 440e0c7f99bSAndy Shevchenko 441e0c7f99bSAndy Shevchenko /* 442a45c6cb8SMadhusudhan Chikkature * Stop clock to the card 443a45c6cb8SMadhusudhan Chikkature */ 44470a3341aSDenis Karpov static void omap_hsmmc_stop_clock(struct omap_hsmmc_host *host) 445a45c6cb8SMadhusudhan Chikkature { 446a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, 447a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, SYSCTL) & ~CEN); 448a45c6cb8SMadhusudhan Chikkature if ((OMAP_HSMMC_READ(host->base, SYSCTL) & CEN) != 0x0) 4497122bbb0SMasanari Iida dev_dbg(mmc_dev(host->mmc), "MMC Clock is not stopped\n"); 450a45c6cb8SMadhusudhan Chikkature } 451a45c6cb8SMadhusudhan Chikkature 45293caf8e6SAdrian Hunter static void omap_hsmmc_enable_irq(struct omap_hsmmc_host *host, 45393caf8e6SAdrian Hunter struct mmc_command *cmd) 454b417577dSAdrian Hunter { 455b417577dSAdrian Hunter unsigned int irq_mask; 456b417577dSAdrian Hunter 457b417577dSAdrian Hunter if (host->use_dma) 458b417577dSAdrian Hunter irq_mask = INT_EN_MASK & ~(BRR_ENABLE | BWR_ENABLE); 459b417577dSAdrian Hunter else 460b417577dSAdrian Hunter irq_mask = INT_EN_MASK; 461b417577dSAdrian Hunter 46293caf8e6SAdrian Hunter /* Disable timeout for erases */ 46393caf8e6SAdrian Hunter if (cmd->opcode == MMC_ERASE) 46493caf8e6SAdrian Hunter irq_mask &= ~DTO_ENABLE; 46593caf8e6SAdrian Hunter 466b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); 467b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, ISE, irq_mask); 468b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, IE, irq_mask); 469b417577dSAdrian Hunter } 470b417577dSAdrian Hunter 471b417577dSAdrian Hunter static void omap_hsmmc_disable_irq(struct omap_hsmmc_host *host) 472b417577dSAdrian Hunter { 473b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, ISE, 0); 474b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, IE, 0); 475b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); 476b417577dSAdrian Hunter } 477b417577dSAdrian Hunter 478ac330f44SAndy Shevchenko /* Calculate divisor for the given clock frequency */ 479d83b6e03SBalaji TK static u16 calc_divisor(struct omap_hsmmc_host *host, struct mmc_ios *ios) 480ac330f44SAndy Shevchenko { 481ac330f44SAndy Shevchenko u16 dsor = 0; 482ac330f44SAndy Shevchenko 483ac330f44SAndy Shevchenko if (ios->clock) { 484d83b6e03SBalaji TK dsor = DIV_ROUND_UP(clk_get_rate(host->fclk), ios->clock); 485ac330f44SAndy Shevchenko if (dsor > 250) 486ac330f44SAndy Shevchenko dsor = 250; 487ac330f44SAndy Shevchenko } 488ac330f44SAndy Shevchenko 489ac330f44SAndy Shevchenko return dsor; 490ac330f44SAndy Shevchenko } 491ac330f44SAndy Shevchenko 4925934df2fSAndy Shevchenko static void omap_hsmmc_set_clock(struct omap_hsmmc_host *host) 4935934df2fSAndy Shevchenko { 4945934df2fSAndy Shevchenko struct mmc_ios *ios = &host->mmc->ios; 4955934df2fSAndy Shevchenko unsigned long regval; 4965934df2fSAndy Shevchenko unsigned long timeout; 4975934df2fSAndy Shevchenko 4988986d31bSVenkatraman S dev_vdbg(mmc_dev(host->mmc), "Set clock to %uHz\n", ios->clock); 4995934df2fSAndy Shevchenko 5005934df2fSAndy Shevchenko omap_hsmmc_stop_clock(host); 5015934df2fSAndy Shevchenko 5025934df2fSAndy Shevchenko regval = OMAP_HSMMC_READ(host->base, SYSCTL); 5035934df2fSAndy Shevchenko regval = regval & ~(CLKD_MASK | DTO_MASK); 504d83b6e03SBalaji TK regval = regval | (calc_divisor(host, ios) << 6) | (DTO << 16); 5055934df2fSAndy Shevchenko OMAP_HSMMC_WRITE(host->base, SYSCTL, regval); 5065934df2fSAndy Shevchenko OMAP_HSMMC_WRITE(host->base, SYSCTL, 5075934df2fSAndy Shevchenko OMAP_HSMMC_READ(host->base, SYSCTL) | ICE); 5085934df2fSAndy Shevchenko 5095934df2fSAndy Shevchenko /* Wait till the ICS bit is set */ 5105934df2fSAndy Shevchenko timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 5115934df2fSAndy Shevchenko while ((OMAP_HSMMC_READ(host->base, SYSCTL) & ICS) != ICS 5125934df2fSAndy Shevchenko && time_before(jiffies, timeout)) 5135934df2fSAndy Shevchenko cpu_relax(); 5145934df2fSAndy Shevchenko 5155934df2fSAndy Shevchenko omap_hsmmc_start_clock(host); 5165934df2fSAndy Shevchenko } 5175934df2fSAndy Shevchenko 5183796fb8aSAndy Shevchenko static void omap_hsmmc_set_bus_width(struct omap_hsmmc_host *host) 5193796fb8aSAndy Shevchenko { 5203796fb8aSAndy Shevchenko struct mmc_ios *ios = &host->mmc->ios; 5213796fb8aSAndy Shevchenko u32 con; 5223796fb8aSAndy Shevchenko 5233796fb8aSAndy Shevchenko con = OMAP_HSMMC_READ(host->base, CON); 52403b5d924SBalaji T K if (ios->timing == MMC_TIMING_UHS_DDR50) 52503b5d924SBalaji T K con |= DDR; /* configure in DDR mode */ 52603b5d924SBalaji T K else 52703b5d924SBalaji T K con &= ~DDR; 5283796fb8aSAndy Shevchenko switch (ios->bus_width) { 5293796fb8aSAndy Shevchenko case MMC_BUS_WIDTH_8: 5303796fb8aSAndy Shevchenko OMAP_HSMMC_WRITE(host->base, CON, con | DW8); 5313796fb8aSAndy Shevchenko break; 5323796fb8aSAndy Shevchenko case MMC_BUS_WIDTH_4: 5333796fb8aSAndy Shevchenko OMAP_HSMMC_WRITE(host->base, CON, con & ~DW8); 5343796fb8aSAndy Shevchenko OMAP_HSMMC_WRITE(host->base, HCTL, 5353796fb8aSAndy Shevchenko OMAP_HSMMC_READ(host->base, HCTL) | FOUR_BIT); 5363796fb8aSAndy Shevchenko break; 5373796fb8aSAndy Shevchenko case MMC_BUS_WIDTH_1: 5383796fb8aSAndy Shevchenko OMAP_HSMMC_WRITE(host->base, CON, con & ~DW8); 5393796fb8aSAndy Shevchenko OMAP_HSMMC_WRITE(host->base, HCTL, 5403796fb8aSAndy Shevchenko OMAP_HSMMC_READ(host->base, HCTL) & ~FOUR_BIT); 5413796fb8aSAndy Shevchenko break; 5423796fb8aSAndy Shevchenko } 5433796fb8aSAndy Shevchenko } 5443796fb8aSAndy Shevchenko 5453796fb8aSAndy Shevchenko static void omap_hsmmc_set_bus_mode(struct omap_hsmmc_host *host) 5463796fb8aSAndy Shevchenko { 5473796fb8aSAndy Shevchenko struct mmc_ios *ios = &host->mmc->ios; 5483796fb8aSAndy Shevchenko u32 con; 5493796fb8aSAndy Shevchenko 5503796fb8aSAndy Shevchenko con = OMAP_HSMMC_READ(host->base, CON); 5513796fb8aSAndy Shevchenko if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN) 5523796fb8aSAndy Shevchenko OMAP_HSMMC_WRITE(host->base, CON, con | OD); 5533796fb8aSAndy Shevchenko else 5543796fb8aSAndy Shevchenko OMAP_HSMMC_WRITE(host->base, CON, con & ~OD); 5553796fb8aSAndy Shevchenko } 5563796fb8aSAndy Shevchenko 55711dd62a7SDenis Karpov #ifdef CONFIG_PM 55811dd62a7SDenis Karpov 55911dd62a7SDenis Karpov /* 56011dd62a7SDenis Karpov * Restore the MMC host context, if it was lost as result of a 56111dd62a7SDenis Karpov * power state change. 56211dd62a7SDenis Karpov */ 56370a3341aSDenis Karpov static int omap_hsmmc_context_restore(struct omap_hsmmc_host *host) 56411dd62a7SDenis Karpov { 56511dd62a7SDenis Karpov struct mmc_ios *ios = &host->mmc->ios; 56611dd62a7SDenis Karpov struct omap_mmc_platform_data *pdata = host->pdata; 56711dd62a7SDenis Karpov int context_loss = 0; 5683796fb8aSAndy Shevchenko u32 hctl, capa; 56911dd62a7SDenis Karpov unsigned long timeout; 57011dd62a7SDenis Karpov 57111dd62a7SDenis Karpov if (pdata->get_context_loss_count) { 57211dd62a7SDenis Karpov context_loss = pdata->get_context_loss_count(host->dev); 57311dd62a7SDenis Karpov if (context_loss < 0) 57411dd62a7SDenis Karpov return 1; 57511dd62a7SDenis Karpov } 57611dd62a7SDenis Karpov 57711dd62a7SDenis Karpov dev_dbg(mmc_dev(host->mmc), "context was %slost\n", 57811dd62a7SDenis Karpov context_loss == host->context_loss ? "not " : ""); 57911dd62a7SDenis Karpov if (host->context_loss == context_loss) 58011dd62a7SDenis Karpov return 1; 58111dd62a7SDenis Karpov 5826c31b215SVenkatraman S if (!OMAP_HSMMC_READ(host->base, SYSSTATUS) & RESETDONE) 5836c31b215SVenkatraman S return 1; 58411dd62a7SDenis Karpov 585c2200efbSBalaji T K if (host->pdata->controller_flags & OMAP_HSMMC_SUPPORTS_DUAL_VOLT) { 58611dd62a7SDenis Karpov if (host->power_mode != MMC_POWER_OFF && 58711dd62a7SDenis Karpov (1 << ios->vdd) <= MMC_VDD_23_24) 58811dd62a7SDenis Karpov hctl = SDVS18; 58911dd62a7SDenis Karpov else 59011dd62a7SDenis Karpov hctl = SDVS30; 59111dd62a7SDenis Karpov capa = VS30 | VS18; 59211dd62a7SDenis Karpov } else { 59311dd62a7SDenis Karpov hctl = SDVS18; 59411dd62a7SDenis Karpov capa = VS18; 59511dd62a7SDenis Karpov } 59611dd62a7SDenis Karpov 59711dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, HCTL, 59811dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, HCTL) | hctl); 59911dd62a7SDenis Karpov 60011dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, CAPA, 60111dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, CAPA) | capa); 60211dd62a7SDenis Karpov 60311dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, HCTL, 60411dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, HCTL) | SDBP); 60511dd62a7SDenis Karpov 60611dd62a7SDenis Karpov timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 60711dd62a7SDenis Karpov while ((OMAP_HSMMC_READ(host->base, HCTL) & SDBP) != SDBP 60811dd62a7SDenis Karpov && time_before(jiffies, timeout)) 60911dd62a7SDenis Karpov ; 61011dd62a7SDenis Karpov 611b417577dSAdrian Hunter omap_hsmmc_disable_irq(host); 61211dd62a7SDenis Karpov 61311dd62a7SDenis Karpov /* Do not initialize card-specific things if the power is off */ 61411dd62a7SDenis Karpov if (host->power_mode == MMC_POWER_OFF) 61511dd62a7SDenis Karpov goto out; 61611dd62a7SDenis Karpov 6173796fb8aSAndy Shevchenko omap_hsmmc_set_bus_width(host); 61811dd62a7SDenis Karpov 6195934df2fSAndy Shevchenko omap_hsmmc_set_clock(host); 62011dd62a7SDenis Karpov 6213796fb8aSAndy Shevchenko omap_hsmmc_set_bus_mode(host); 6223796fb8aSAndy Shevchenko 62311dd62a7SDenis Karpov out: 62411dd62a7SDenis Karpov host->context_loss = context_loss; 62511dd62a7SDenis Karpov 62611dd62a7SDenis Karpov dev_dbg(mmc_dev(host->mmc), "context is restored\n"); 62711dd62a7SDenis Karpov return 0; 62811dd62a7SDenis Karpov } 62911dd62a7SDenis Karpov 63011dd62a7SDenis Karpov /* 63111dd62a7SDenis Karpov * Save the MMC host context (store the number of power state changes so far). 63211dd62a7SDenis Karpov */ 63370a3341aSDenis Karpov static void omap_hsmmc_context_save(struct omap_hsmmc_host *host) 63411dd62a7SDenis Karpov { 63511dd62a7SDenis Karpov struct omap_mmc_platform_data *pdata = host->pdata; 63611dd62a7SDenis Karpov int context_loss; 63711dd62a7SDenis Karpov 63811dd62a7SDenis Karpov if (pdata->get_context_loss_count) { 63911dd62a7SDenis Karpov context_loss = pdata->get_context_loss_count(host->dev); 64011dd62a7SDenis Karpov if (context_loss < 0) 64111dd62a7SDenis Karpov return; 64211dd62a7SDenis Karpov host->context_loss = context_loss; 64311dd62a7SDenis Karpov } 64411dd62a7SDenis Karpov } 64511dd62a7SDenis Karpov 64611dd62a7SDenis Karpov #else 64711dd62a7SDenis Karpov 64870a3341aSDenis Karpov static int omap_hsmmc_context_restore(struct omap_hsmmc_host *host) 64911dd62a7SDenis Karpov { 65011dd62a7SDenis Karpov return 0; 65111dd62a7SDenis Karpov } 65211dd62a7SDenis Karpov 65370a3341aSDenis Karpov static void omap_hsmmc_context_save(struct omap_hsmmc_host *host) 65411dd62a7SDenis Karpov { 65511dd62a7SDenis Karpov } 65611dd62a7SDenis Karpov 65711dd62a7SDenis Karpov #endif 65811dd62a7SDenis Karpov 659a45c6cb8SMadhusudhan Chikkature /* 660a45c6cb8SMadhusudhan Chikkature * Send init stream sequence to card 661a45c6cb8SMadhusudhan Chikkature * before sending IDLE command 662a45c6cb8SMadhusudhan Chikkature */ 66370a3341aSDenis Karpov static void send_init_stream(struct omap_hsmmc_host *host) 664a45c6cb8SMadhusudhan Chikkature { 665a45c6cb8SMadhusudhan Chikkature int reg = 0; 666a45c6cb8SMadhusudhan Chikkature unsigned long timeout; 667a45c6cb8SMadhusudhan Chikkature 668b62f6228SAdrian Hunter if (host->protect_card) 669b62f6228SAdrian Hunter return; 670b62f6228SAdrian Hunter 671a45c6cb8SMadhusudhan Chikkature disable_irq(host->irq); 672b417577dSAdrian Hunter 673b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK); 674a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CON, 675a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, CON) | INIT_STREAM); 676a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CMD, INIT_STREAM_CMD); 677a45c6cb8SMadhusudhan Chikkature 678a45c6cb8SMadhusudhan Chikkature timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 679a45c6cb8SMadhusudhan Chikkature while ((reg != CC) && time_before(jiffies, timeout)) 680a45c6cb8SMadhusudhan Chikkature reg = OMAP_HSMMC_READ(host->base, STAT) & CC; 681a45c6cb8SMadhusudhan Chikkature 682a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CON, 683a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, CON) & ~INIT_STREAM); 684c653a6d4SAdrian Hunter 685c653a6d4SAdrian Hunter OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); 686c653a6d4SAdrian Hunter OMAP_HSMMC_READ(host->base, STAT); 687c653a6d4SAdrian Hunter 688a45c6cb8SMadhusudhan Chikkature enable_irq(host->irq); 689a45c6cb8SMadhusudhan Chikkature } 690a45c6cb8SMadhusudhan Chikkature 691a45c6cb8SMadhusudhan Chikkature static inline 69270a3341aSDenis Karpov int omap_hsmmc_cover_is_closed(struct omap_hsmmc_host *host) 693a45c6cb8SMadhusudhan Chikkature { 694a45c6cb8SMadhusudhan Chikkature int r = 1; 695a45c6cb8SMadhusudhan Chikkature 696191d1f1dSDenis Karpov if (mmc_slot(host).get_cover_state) 697191d1f1dSDenis Karpov r = mmc_slot(host).get_cover_state(host->dev, host->slot_id); 698a45c6cb8SMadhusudhan Chikkature return r; 699a45c6cb8SMadhusudhan Chikkature } 700a45c6cb8SMadhusudhan Chikkature 701a45c6cb8SMadhusudhan Chikkature static ssize_t 70270a3341aSDenis Karpov omap_hsmmc_show_cover_switch(struct device *dev, struct device_attribute *attr, 703a45c6cb8SMadhusudhan Chikkature char *buf) 704a45c6cb8SMadhusudhan Chikkature { 705a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev); 70670a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 707a45c6cb8SMadhusudhan Chikkature 70870a3341aSDenis Karpov return sprintf(buf, "%s\n", 70970a3341aSDenis Karpov omap_hsmmc_cover_is_closed(host) ? "closed" : "open"); 710a45c6cb8SMadhusudhan Chikkature } 711a45c6cb8SMadhusudhan Chikkature 71270a3341aSDenis Karpov static DEVICE_ATTR(cover_switch, S_IRUGO, omap_hsmmc_show_cover_switch, NULL); 713a45c6cb8SMadhusudhan Chikkature 714a45c6cb8SMadhusudhan Chikkature static ssize_t 71570a3341aSDenis Karpov omap_hsmmc_show_slot_name(struct device *dev, struct device_attribute *attr, 716a45c6cb8SMadhusudhan Chikkature char *buf) 717a45c6cb8SMadhusudhan Chikkature { 718a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev); 71970a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 720a45c6cb8SMadhusudhan Chikkature 721191d1f1dSDenis Karpov return sprintf(buf, "%s\n", mmc_slot(host).name); 722a45c6cb8SMadhusudhan Chikkature } 723a45c6cb8SMadhusudhan Chikkature 72470a3341aSDenis Karpov static DEVICE_ATTR(slot_name, S_IRUGO, omap_hsmmc_show_slot_name, NULL); 725a45c6cb8SMadhusudhan Chikkature 726a45c6cb8SMadhusudhan Chikkature /* 727a45c6cb8SMadhusudhan Chikkature * Configure the response type and send the cmd. 728a45c6cb8SMadhusudhan Chikkature */ 729a45c6cb8SMadhusudhan Chikkature static void 73070a3341aSDenis Karpov omap_hsmmc_start_command(struct omap_hsmmc_host *host, struct mmc_command *cmd, 731a45c6cb8SMadhusudhan Chikkature struct mmc_data *data) 732a45c6cb8SMadhusudhan Chikkature { 733a45c6cb8SMadhusudhan Chikkature int cmdreg = 0, resptype = 0, cmdtype = 0; 734a45c6cb8SMadhusudhan Chikkature 7358986d31bSVenkatraman S dev_vdbg(mmc_dev(host->mmc), "%s: CMD%d, argument 0x%08x\n", 736a45c6cb8SMadhusudhan Chikkature mmc_hostname(host->mmc), cmd->opcode, cmd->arg); 737a45c6cb8SMadhusudhan Chikkature host->cmd = cmd; 738a45c6cb8SMadhusudhan Chikkature 73993caf8e6SAdrian Hunter omap_hsmmc_enable_irq(host, cmd); 740a45c6cb8SMadhusudhan Chikkature 7414a694dc9SAdrian Hunter host->response_busy = 0; 742a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_PRESENT) { 743a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_136) 744a45c6cb8SMadhusudhan Chikkature resptype = 1; 7454a694dc9SAdrian Hunter else if (cmd->flags & MMC_RSP_BUSY) { 7464a694dc9SAdrian Hunter resptype = 3; 7474a694dc9SAdrian Hunter host->response_busy = 1; 7484a694dc9SAdrian Hunter } else 749a45c6cb8SMadhusudhan Chikkature resptype = 2; 750a45c6cb8SMadhusudhan Chikkature } 751a45c6cb8SMadhusudhan Chikkature 752a45c6cb8SMadhusudhan Chikkature /* 753a45c6cb8SMadhusudhan Chikkature * Unlike OMAP1 controller, the cmdtype does not seem to be based on 754a45c6cb8SMadhusudhan Chikkature * ac, bc, adtc, bcr. Only commands ending an open ended transfer need 755a45c6cb8SMadhusudhan Chikkature * a val of 0x3, rest 0x0. 756a45c6cb8SMadhusudhan Chikkature */ 757a45c6cb8SMadhusudhan Chikkature if (cmd == host->mrq->stop) 758a45c6cb8SMadhusudhan Chikkature cmdtype = 0x3; 759a45c6cb8SMadhusudhan Chikkature 760a45c6cb8SMadhusudhan Chikkature cmdreg = (cmd->opcode << 24) | (resptype << 16) | (cmdtype << 22); 761a45c6cb8SMadhusudhan Chikkature 762a45c6cb8SMadhusudhan Chikkature if (data) { 763a45c6cb8SMadhusudhan Chikkature cmdreg |= DP_SELECT | MSBS | BCE; 764a45c6cb8SMadhusudhan Chikkature if (data->flags & MMC_DATA_READ) 765a45c6cb8SMadhusudhan Chikkature cmdreg |= DDIR; 766a45c6cb8SMadhusudhan Chikkature else 767a45c6cb8SMadhusudhan Chikkature cmdreg &= ~(DDIR); 768a45c6cb8SMadhusudhan Chikkature } 769a45c6cb8SMadhusudhan Chikkature 770a45c6cb8SMadhusudhan Chikkature if (host->use_dma) 771a45c6cb8SMadhusudhan Chikkature cmdreg |= DMA_EN; 772a45c6cb8SMadhusudhan Chikkature 773b417577dSAdrian Hunter host->req_in_progress = 1; 7744dffd7a2SAdrian Hunter 775a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, ARG, cmd->arg); 776a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CMD, cmdreg); 777a45c6cb8SMadhusudhan Chikkature } 778a45c6cb8SMadhusudhan Chikkature 7790ccd76d4SJuha Yrjola static int 78070a3341aSDenis Karpov omap_hsmmc_get_dma_dir(struct omap_hsmmc_host *host, struct mmc_data *data) 7810ccd76d4SJuha Yrjola { 7820ccd76d4SJuha Yrjola if (data->flags & MMC_DATA_WRITE) 7830ccd76d4SJuha Yrjola return DMA_TO_DEVICE; 7840ccd76d4SJuha Yrjola else 7850ccd76d4SJuha Yrjola return DMA_FROM_DEVICE; 7860ccd76d4SJuha Yrjola } 7870ccd76d4SJuha Yrjola 788c5c98927SRussell King static struct dma_chan *omap_hsmmc_get_dma_chan(struct omap_hsmmc_host *host, 789c5c98927SRussell King struct mmc_data *data) 790c5c98927SRussell King { 791c5c98927SRussell King return data->flags & MMC_DATA_WRITE ? host->tx_chan : host->rx_chan; 792c5c98927SRussell King } 793c5c98927SRussell King 794b417577dSAdrian Hunter static void omap_hsmmc_request_done(struct omap_hsmmc_host *host, struct mmc_request *mrq) 795b417577dSAdrian Hunter { 796b417577dSAdrian Hunter int dma_ch; 79731463b14SVenkatraman S unsigned long flags; 798b417577dSAdrian Hunter 79931463b14SVenkatraman S spin_lock_irqsave(&host->irq_lock, flags); 800b417577dSAdrian Hunter host->req_in_progress = 0; 801b417577dSAdrian Hunter dma_ch = host->dma_ch; 80231463b14SVenkatraman S spin_unlock_irqrestore(&host->irq_lock, flags); 803b417577dSAdrian Hunter 804b417577dSAdrian Hunter omap_hsmmc_disable_irq(host); 805b417577dSAdrian Hunter /* Do not complete the request if DMA is still in progress */ 806b417577dSAdrian Hunter if (mrq->data && host->use_dma && dma_ch != -1) 807b417577dSAdrian Hunter return; 808b417577dSAdrian Hunter host->mrq = NULL; 809b417577dSAdrian Hunter mmc_request_done(host->mmc, mrq); 810b417577dSAdrian Hunter } 811b417577dSAdrian Hunter 812a45c6cb8SMadhusudhan Chikkature /* 813a45c6cb8SMadhusudhan Chikkature * Notify the transfer complete to MMC core 814a45c6cb8SMadhusudhan Chikkature */ 815a45c6cb8SMadhusudhan Chikkature static void 81670a3341aSDenis Karpov omap_hsmmc_xfer_done(struct omap_hsmmc_host *host, struct mmc_data *data) 817a45c6cb8SMadhusudhan Chikkature { 8184a694dc9SAdrian Hunter if (!data) { 8194a694dc9SAdrian Hunter struct mmc_request *mrq = host->mrq; 8204a694dc9SAdrian Hunter 82123050103SAdrian Hunter /* TC before CC from CMD6 - don't know why, but it happens */ 82223050103SAdrian Hunter if (host->cmd && host->cmd->opcode == 6 && 82323050103SAdrian Hunter host->response_busy) { 82423050103SAdrian Hunter host->response_busy = 0; 82523050103SAdrian Hunter return; 82623050103SAdrian Hunter } 82723050103SAdrian Hunter 828b417577dSAdrian Hunter omap_hsmmc_request_done(host, mrq); 8294a694dc9SAdrian Hunter return; 8304a694dc9SAdrian Hunter } 8314a694dc9SAdrian Hunter 832a45c6cb8SMadhusudhan Chikkature host->data = NULL; 833a45c6cb8SMadhusudhan Chikkature 834a45c6cb8SMadhusudhan Chikkature if (!data->error) 835a45c6cb8SMadhusudhan Chikkature data->bytes_xfered += data->blocks * (data->blksz); 836a45c6cb8SMadhusudhan Chikkature else 837a45c6cb8SMadhusudhan Chikkature data->bytes_xfered = 0; 838a45c6cb8SMadhusudhan Chikkature 839fe852273SMing Lei if (!data->stop) { 840dba3c29eSBalaji T K omap_hsmmc_request_done(host, data->mrq); 841fe852273SMing Lei return; 842dba3c29eSBalaji T K } 843fe852273SMing Lei omap_hsmmc_start_command(host, data->stop, NULL); 844a45c6cb8SMadhusudhan Chikkature } 845a45c6cb8SMadhusudhan Chikkature 846a45c6cb8SMadhusudhan Chikkature /* 847a45c6cb8SMadhusudhan Chikkature * Notify the core about command completion 848a45c6cb8SMadhusudhan Chikkature */ 849a45c6cb8SMadhusudhan Chikkature static void 85070a3341aSDenis Karpov omap_hsmmc_cmd_done(struct omap_hsmmc_host *host, struct mmc_command *cmd) 851a45c6cb8SMadhusudhan Chikkature { 852a45c6cb8SMadhusudhan Chikkature host->cmd = NULL; 853a45c6cb8SMadhusudhan Chikkature 854a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_PRESENT) { 855a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_136) { 856a45c6cb8SMadhusudhan Chikkature /* response type 2 */ 857a45c6cb8SMadhusudhan Chikkature cmd->resp[3] = OMAP_HSMMC_READ(host->base, RSP10); 858a45c6cb8SMadhusudhan Chikkature cmd->resp[2] = OMAP_HSMMC_READ(host->base, RSP32); 859a45c6cb8SMadhusudhan Chikkature cmd->resp[1] = OMAP_HSMMC_READ(host->base, RSP54); 860a45c6cb8SMadhusudhan Chikkature cmd->resp[0] = OMAP_HSMMC_READ(host->base, RSP76); 861a45c6cb8SMadhusudhan Chikkature } else { 862a45c6cb8SMadhusudhan Chikkature /* response types 1, 1b, 3, 4, 5, 6 */ 863a45c6cb8SMadhusudhan Chikkature cmd->resp[0] = OMAP_HSMMC_READ(host->base, RSP10); 864a45c6cb8SMadhusudhan Chikkature } 865a45c6cb8SMadhusudhan Chikkature } 866b417577dSAdrian Hunter if ((host->data == NULL && !host->response_busy) || cmd->error) 867b417577dSAdrian Hunter omap_hsmmc_request_done(host, cmd->mrq); 868a45c6cb8SMadhusudhan Chikkature } 869a45c6cb8SMadhusudhan Chikkature 870a45c6cb8SMadhusudhan Chikkature /* 871a45c6cb8SMadhusudhan Chikkature * DMA clean up for command errors 872a45c6cb8SMadhusudhan Chikkature */ 87370a3341aSDenis Karpov static void omap_hsmmc_dma_cleanup(struct omap_hsmmc_host *host, int errno) 874a45c6cb8SMadhusudhan Chikkature { 875b417577dSAdrian Hunter int dma_ch; 87631463b14SVenkatraman S unsigned long flags; 877b417577dSAdrian Hunter 87882788ff5SJarkko Lavinen host->data->error = errno; 879a45c6cb8SMadhusudhan Chikkature 88031463b14SVenkatraman S spin_lock_irqsave(&host->irq_lock, flags); 881b417577dSAdrian Hunter dma_ch = host->dma_ch; 882b417577dSAdrian Hunter host->dma_ch = -1; 88331463b14SVenkatraman S spin_unlock_irqrestore(&host->irq_lock, flags); 884b417577dSAdrian Hunter 885b417577dSAdrian Hunter if (host->use_dma && dma_ch != -1) { 886c5c98927SRussell King struct dma_chan *chan = omap_hsmmc_get_dma_chan(host, host->data); 887c5c98927SRussell King 888c5c98927SRussell King dmaengine_terminate_all(chan); 889c5c98927SRussell King dma_unmap_sg(chan->device->dev, 890c5c98927SRussell King host->data->sg, host->data->sg_len, 89170a3341aSDenis Karpov omap_hsmmc_get_dma_dir(host, host->data)); 892c5c98927SRussell King 893053bf34fSPer Forlin host->data->host_cookie = 0; 894a45c6cb8SMadhusudhan Chikkature } 895a45c6cb8SMadhusudhan Chikkature host->data = NULL; 896a45c6cb8SMadhusudhan Chikkature } 897a45c6cb8SMadhusudhan Chikkature 898a45c6cb8SMadhusudhan Chikkature /* 899a45c6cb8SMadhusudhan Chikkature * Readable error output 900a45c6cb8SMadhusudhan Chikkature */ 901a45c6cb8SMadhusudhan Chikkature #ifdef CONFIG_MMC_DEBUG 902699b958bSAdrian Hunter static void omap_hsmmc_dbg_report_irq(struct omap_hsmmc_host *host, u32 status) 903a45c6cb8SMadhusudhan Chikkature { 904a45c6cb8SMadhusudhan Chikkature /* --- means reserved bit without definition at documentation */ 90570a3341aSDenis Karpov static const char *omap_hsmmc_status_bits[] = { 906699b958bSAdrian Hunter "CC" , "TC" , "BGE", "---", "BWR" , "BRR" , "---" , "---" , 907699b958bSAdrian Hunter "CIRQ", "OBI" , "---", "---", "---" , "---" , "---" , "ERRI", 908699b958bSAdrian Hunter "CTO" , "CCRC", "CEB", "CIE", "DTO" , "DCRC", "DEB" , "---" , 909699b958bSAdrian Hunter "ACE" , "---" , "---", "---", "CERR", "BADA", "---" , "---" 910a45c6cb8SMadhusudhan Chikkature }; 911a45c6cb8SMadhusudhan Chikkature char res[256]; 912a45c6cb8SMadhusudhan Chikkature char *buf = res; 913a45c6cb8SMadhusudhan Chikkature int len, i; 914a45c6cb8SMadhusudhan Chikkature 915a45c6cb8SMadhusudhan Chikkature len = sprintf(buf, "MMC IRQ 0x%x :", status); 916a45c6cb8SMadhusudhan Chikkature buf += len; 917a45c6cb8SMadhusudhan Chikkature 91870a3341aSDenis Karpov for (i = 0; i < ARRAY_SIZE(omap_hsmmc_status_bits); i++) 919a45c6cb8SMadhusudhan Chikkature if (status & (1 << i)) { 92070a3341aSDenis Karpov len = sprintf(buf, " %s", omap_hsmmc_status_bits[i]); 921a45c6cb8SMadhusudhan Chikkature buf += len; 922a45c6cb8SMadhusudhan Chikkature } 923a45c6cb8SMadhusudhan Chikkature 9248986d31bSVenkatraman S dev_vdbg(mmc_dev(host->mmc), "%s\n", res); 925a45c6cb8SMadhusudhan Chikkature } 926699b958bSAdrian Hunter #else 927699b958bSAdrian Hunter static inline void omap_hsmmc_dbg_report_irq(struct omap_hsmmc_host *host, 928699b958bSAdrian Hunter u32 status) 929699b958bSAdrian Hunter { 930699b958bSAdrian Hunter } 931a45c6cb8SMadhusudhan Chikkature #endif /* CONFIG_MMC_DEBUG */ 932a45c6cb8SMadhusudhan Chikkature 9333ebf74b1SJean Pihet /* 9343ebf74b1SJean Pihet * MMC controller internal state machines reset 9353ebf74b1SJean Pihet * 9363ebf74b1SJean Pihet * Used to reset command or data internal state machines, using respectively 9373ebf74b1SJean Pihet * SRC or SRD bit of SYSCTL register 9383ebf74b1SJean Pihet * Can be called from interrupt context 9393ebf74b1SJean Pihet */ 94070a3341aSDenis Karpov static inline void omap_hsmmc_reset_controller_fsm(struct omap_hsmmc_host *host, 9413ebf74b1SJean Pihet unsigned long bit) 9423ebf74b1SJean Pihet { 9433ebf74b1SJean Pihet unsigned long i = 0; 9443ebf74b1SJean Pihet unsigned long limit = (loops_per_jiffy * 9453ebf74b1SJean Pihet msecs_to_jiffies(MMC_TIMEOUT_MS)); 9463ebf74b1SJean Pihet 9473ebf74b1SJean Pihet OMAP_HSMMC_WRITE(host->base, SYSCTL, 9483ebf74b1SJean Pihet OMAP_HSMMC_READ(host->base, SYSCTL) | bit); 9493ebf74b1SJean Pihet 95007ad64b6SMadhusudhan Chikkature /* 95107ad64b6SMadhusudhan Chikkature * OMAP4 ES2 and greater has an updated reset logic. 95207ad64b6SMadhusudhan Chikkature * Monitor a 0->1 transition first 95307ad64b6SMadhusudhan Chikkature */ 95407ad64b6SMadhusudhan Chikkature if (mmc_slot(host).features & HSMMC_HAS_UPDATED_RESET) { 955b432b4b3Skishore kadiyala while ((!(OMAP_HSMMC_READ(host->base, SYSCTL) & bit)) 95607ad64b6SMadhusudhan Chikkature && (i++ < limit)) 95707ad64b6SMadhusudhan Chikkature cpu_relax(); 95807ad64b6SMadhusudhan Chikkature } 95907ad64b6SMadhusudhan Chikkature i = 0; 96007ad64b6SMadhusudhan Chikkature 9613ebf74b1SJean Pihet while ((OMAP_HSMMC_READ(host->base, SYSCTL) & bit) && 9623ebf74b1SJean Pihet (i++ < limit)) 9633ebf74b1SJean Pihet cpu_relax(); 9643ebf74b1SJean Pihet 9653ebf74b1SJean Pihet if (OMAP_HSMMC_READ(host->base, SYSCTL) & bit) 9663ebf74b1SJean Pihet dev_err(mmc_dev(host->mmc), 9673ebf74b1SJean Pihet "Timeout waiting on controller reset in %s\n", 9683ebf74b1SJean Pihet __func__); 9693ebf74b1SJean Pihet } 970a45c6cb8SMadhusudhan Chikkature 971ae4bf788SVenkatraman S static void hsmmc_command_incomplete(struct omap_hsmmc_host *host, int err) 972ae4bf788SVenkatraman S { 973ae4bf788SVenkatraman S omap_hsmmc_reset_controller_fsm(host, SRC); 974ae4bf788SVenkatraman S host->cmd->error = err; 975ae4bf788SVenkatraman S 976ae4bf788SVenkatraman S if (host->data) { 977ae4bf788SVenkatraman S omap_hsmmc_reset_controller_fsm(host, SRD); 978ae4bf788SVenkatraman S omap_hsmmc_dma_cleanup(host, err); 979ae4bf788SVenkatraman S } 980ae4bf788SVenkatraman S 981ae4bf788SVenkatraman S } 982ae4bf788SVenkatraman S 983b417577dSAdrian Hunter static void omap_hsmmc_do_irq(struct omap_hsmmc_host *host, int status) 984a45c6cb8SMadhusudhan Chikkature { 985a45c6cb8SMadhusudhan Chikkature struct mmc_data *data; 986b417577dSAdrian Hunter int end_cmd = 0, end_trans = 0; 987a45c6cb8SMadhusudhan Chikkature 988a45c6cb8SMadhusudhan Chikkature data = host->data; 9898986d31bSVenkatraman S dev_vdbg(mmc_dev(host->mmc), "IRQ Status is %x\n", status); 990a45c6cb8SMadhusudhan Chikkature 991a45c6cb8SMadhusudhan Chikkature if (status & ERR) { 992699b958bSAdrian Hunter omap_hsmmc_dbg_report_irq(host, status); 993ae4bf788SVenkatraman S if (status & (CMD_TIMEOUT | DATA_TIMEOUT)) 994ae4bf788SVenkatraman S hsmmc_command_incomplete(host, -ETIMEDOUT); 995ae4bf788SVenkatraman S else if (status & (CMD_CRC | DATA_CRC)) 996ae4bf788SVenkatraman S hsmmc_command_incomplete(host, -EILSEQ); 9974a694dc9SAdrian Hunter 998a45c6cb8SMadhusudhan Chikkature end_cmd = 1; 999ae4bf788SVenkatraman S if (host->data || host->response_busy) { 1000a45c6cb8SMadhusudhan Chikkature end_trans = 1; 1001ae4bf788SVenkatraman S host->response_busy = 0; 1002a45c6cb8SMadhusudhan Chikkature } 1003a45c6cb8SMadhusudhan Chikkature } 1004a45c6cb8SMadhusudhan Chikkature 1005a8fe29d8SJarkko Lavinen if (end_cmd || ((status & CC) && host->cmd)) 100670a3341aSDenis Karpov omap_hsmmc_cmd_done(host, host->cmd); 10070a40e647SJarkko Lavinen if ((end_trans || (status & TC)) && host->mrq) 100870a3341aSDenis Karpov omap_hsmmc_xfer_done(host, data); 1009b417577dSAdrian Hunter } 1010a45c6cb8SMadhusudhan Chikkature 1011b417577dSAdrian Hunter /* 1012b417577dSAdrian Hunter * MMC controller IRQ handler 1013b417577dSAdrian Hunter */ 1014b417577dSAdrian Hunter static irqreturn_t omap_hsmmc_irq(int irq, void *dev_id) 1015b417577dSAdrian Hunter { 1016b417577dSAdrian Hunter struct omap_hsmmc_host *host = dev_id; 1017b417577dSAdrian Hunter int status; 1018b417577dSAdrian Hunter 1019b417577dSAdrian Hunter status = OMAP_HSMMC_READ(host->base, STAT); 10201f6b9fa4SVenkatraman S while (status & INT_EN_MASK && host->req_in_progress) { 1021b417577dSAdrian Hunter omap_hsmmc_do_irq(host, status); 10221f6b9fa4SVenkatraman S 1023b417577dSAdrian Hunter /* Flush posted write */ 10241f6b9fa4SVenkatraman S OMAP_HSMMC_WRITE(host->base, STAT, status); 1025b417577dSAdrian Hunter status = OMAP_HSMMC_READ(host->base, STAT); 10261f6b9fa4SVenkatraman S } 10274dffd7a2SAdrian Hunter 1028a45c6cb8SMadhusudhan Chikkature return IRQ_HANDLED; 1029a45c6cb8SMadhusudhan Chikkature } 1030a45c6cb8SMadhusudhan Chikkature 103170a3341aSDenis Karpov static void set_sd_bus_power(struct omap_hsmmc_host *host) 1032e13bb300SAdrian Hunter { 1033e13bb300SAdrian Hunter unsigned long i; 1034e13bb300SAdrian Hunter 1035e13bb300SAdrian Hunter OMAP_HSMMC_WRITE(host->base, HCTL, 1036e13bb300SAdrian Hunter OMAP_HSMMC_READ(host->base, HCTL) | SDBP); 1037e13bb300SAdrian Hunter for (i = 0; i < loops_per_jiffy; i++) { 1038e13bb300SAdrian Hunter if (OMAP_HSMMC_READ(host->base, HCTL) & SDBP) 1039e13bb300SAdrian Hunter break; 1040e13bb300SAdrian Hunter cpu_relax(); 1041e13bb300SAdrian Hunter } 1042e13bb300SAdrian Hunter } 1043e13bb300SAdrian Hunter 1044a45c6cb8SMadhusudhan Chikkature /* 1045eb250826SDavid Brownell * Switch MMC interface voltage ... only relevant for MMC1. 1046eb250826SDavid Brownell * 1047eb250826SDavid Brownell * MMC2 and MMC3 use fixed 1.8V levels, and maybe a transceiver. 1048eb250826SDavid Brownell * The MMC2 transceiver controls are used instead of DAT4..DAT7. 1049eb250826SDavid Brownell * Some chips, like eMMC ones, use internal transceivers. 1050a45c6cb8SMadhusudhan Chikkature */ 105170a3341aSDenis Karpov static int omap_hsmmc_switch_opcond(struct omap_hsmmc_host *host, int vdd) 1052a45c6cb8SMadhusudhan Chikkature { 1053a45c6cb8SMadhusudhan Chikkature u32 reg_val = 0; 1054a45c6cb8SMadhusudhan Chikkature int ret; 1055a45c6cb8SMadhusudhan Chikkature 1056a45c6cb8SMadhusudhan Chikkature /* Disable the clocks */ 1057fa4aa2d4SBalaji T K pm_runtime_put_sync(host->dev); 1058cd03d9a8SRajendra Nayak if (host->dbclk) 105994c18149SRajendra Nayak clk_disable_unprepare(host->dbclk); 1060a45c6cb8SMadhusudhan Chikkature 1061a45c6cb8SMadhusudhan Chikkature /* Turn the power off */ 1062a45c6cb8SMadhusudhan Chikkature ret = mmc_slot(host).set_power(host->dev, host->slot_id, 0, 0); 1063a45c6cb8SMadhusudhan Chikkature 1064a45c6cb8SMadhusudhan Chikkature /* Turn the power ON with given VDD 1.8 or 3.0v */ 10652bec0893SAdrian Hunter if (!ret) 10662bec0893SAdrian Hunter ret = mmc_slot(host).set_power(host->dev, host->slot_id, 1, 10672bec0893SAdrian Hunter vdd); 1068fa4aa2d4SBalaji T K pm_runtime_get_sync(host->dev); 1069cd03d9a8SRajendra Nayak if (host->dbclk) 107094c18149SRajendra Nayak clk_prepare_enable(host->dbclk); 10712bec0893SAdrian Hunter 1072a45c6cb8SMadhusudhan Chikkature if (ret != 0) 1073a45c6cb8SMadhusudhan Chikkature goto err; 1074a45c6cb8SMadhusudhan Chikkature 1075a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 1076a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) & SDVSCLR); 1077a45c6cb8SMadhusudhan Chikkature reg_val = OMAP_HSMMC_READ(host->base, HCTL); 1078eb250826SDavid Brownell 1079a45c6cb8SMadhusudhan Chikkature /* 1080a45c6cb8SMadhusudhan Chikkature * If a MMC dual voltage card is detected, the set_ios fn calls 1081a45c6cb8SMadhusudhan Chikkature * this fn with VDD bit set for 1.8V. Upon card removal from the 108270a3341aSDenis Karpov * slot, omap_hsmmc_set_ios sets the VDD back to 3V on MMC_POWER_OFF. 1083a45c6cb8SMadhusudhan Chikkature * 1084eb250826SDavid Brownell * Cope with a bit of slop in the range ... per data sheets: 1085eb250826SDavid Brownell * - "1.8V" for vdds_mmc1/vdds_mmc1a can be up to 2.45V max, 1086eb250826SDavid Brownell * but recommended values are 1.71V to 1.89V 1087eb250826SDavid Brownell * - "3.0V" for vdds_mmc1/vdds_mmc1a can be up to 3.5V max, 1088eb250826SDavid Brownell * but recommended values are 2.7V to 3.3V 1089eb250826SDavid Brownell * 1090eb250826SDavid Brownell * Board setup code shouldn't permit anything very out-of-range. 1091eb250826SDavid Brownell * TWL4030-family VMMC1 and VSIM regulators are fine (avoiding the 1092eb250826SDavid Brownell * middle range) but VSIM can't power DAT4..DAT7 at more than 3V. 1093a45c6cb8SMadhusudhan Chikkature */ 1094eb250826SDavid Brownell if ((1 << vdd) <= MMC_VDD_23_24) 1095a45c6cb8SMadhusudhan Chikkature reg_val |= SDVS18; 1096eb250826SDavid Brownell else 1097eb250826SDavid Brownell reg_val |= SDVS30; 1098a45c6cb8SMadhusudhan Chikkature 1099a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, reg_val); 1100e13bb300SAdrian Hunter set_sd_bus_power(host); 1101a45c6cb8SMadhusudhan Chikkature 1102a45c6cb8SMadhusudhan Chikkature return 0; 1103a45c6cb8SMadhusudhan Chikkature err: 1104a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Unable to switch operating voltage\n"); 1105a45c6cb8SMadhusudhan Chikkature return ret; 1106a45c6cb8SMadhusudhan Chikkature } 1107a45c6cb8SMadhusudhan Chikkature 1108b62f6228SAdrian Hunter /* Protect the card while the cover is open */ 1109b62f6228SAdrian Hunter static void omap_hsmmc_protect_card(struct omap_hsmmc_host *host) 1110b62f6228SAdrian Hunter { 1111b62f6228SAdrian Hunter if (!mmc_slot(host).get_cover_state) 1112b62f6228SAdrian Hunter return; 1113b62f6228SAdrian Hunter 1114b62f6228SAdrian Hunter host->reqs_blocked = 0; 1115b62f6228SAdrian Hunter if (mmc_slot(host).get_cover_state(host->dev, host->slot_id)) { 1116b62f6228SAdrian Hunter if (host->protect_card) { 11172cecdf00SRajendra Nayak dev_info(host->dev, "%s: cover is closed, " 1118b62f6228SAdrian Hunter "card is now accessible\n", 1119b62f6228SAdrian Hunter mmc_hostname(host->mmc)); 1120b62f6228SAdrian Hunter host->protect_card = 0; 1121b62f6228SAdrian Hunter } 1122b62f6228SAdrian Hunter } else { 1123b62f6228SAdrian Hunter if (!host->protect_card) { 11242cecdf00SRajendra Nayak dev_info(host->dev, "%s: cover is open, " 1125b62f6228SAdrian Hunter "card is now inaccessible\n", 1126b62f6228SAdrian Hunter mmc_hostname(host->mmc)); 1127b62f6228SAdrian Hunter host->protect_card = 1; 1128b62f6228SAdrian Hunter } 1129b62f6228SAdrian Hunter } 1130b62f6228SAdrian Hunter } 1131b62f6228SAdrian Hunter 1132a45c6cb8SMadhusudhan Chikkature /* 11337efab4f3SNeilBrown * irq handler to notify the core about card insertion/removal 1134a45c6cb8SMadhusudhan Chikkature */ 11357efab4f3SNeilBrown static irqreturn_t omap_hsmmc_detect(int irq, void *dev_id) 1136a45c6cb8SMadhusudhan Chikkature { 11377efab4f3SNeilBrown struct omap_hsmmc_host *host = dev_id; 1138249d0fa9SDavid Brownell struct omap_mmc_slot_data *slot = &mmc_slot(host); 1139a6b2240dSAdrian Hunter int carddetect; 1140249d0fa9SDavid Brownell 1141a6b2240dSAdrian Hunter if (host->suspended) 11427efab4f3SNeilBrown return IRQ_HANDLED; 1143a45c6cb8SMadhusudhan Chikkature 1144a45c6cb8SMadhusudhan Chikkature sysfs_notify(&host->mmc->class_dev.kobj, NULL, "cover_switch"); 1145a6b2240dSAdrian Hunter 1146191d1f1dSDenis Karpov if (slot->card_detect) 1147db0fefc5SAdrian Hunter carddetect = slot->card_detect(host->dev, host->slot_id); 1148b62f6228SAdrian Hunter else { 1149b62f6228SAdrian Hunter omap_hsmmc_protect_card(host); 1150a6b2240dSAdrian Hunter carddetect = -ENOSYS; 1151b62f6228SAdrian Hunter } 1152a6b2240dSAdrian Hunter 1153cdeebaddSMadhusudhan Chikkature if (carddetect) 1154a45c6cb8SMadhusudhan Chikkature mmc_detect_change(host->mmc, (HZ * 200) / 1000); 1155cdeebaddSMadhusudhan Chikkature else 1156a45c6cb8SMadhusudhan Chikkature mmc_detect_change(host->mmc, (HZ * 50) / 1000); 1157a45c6cb8SMadhusudhan Chikkature return IRQ_HANDLED; 1158a45c6cb8SMadhusudhan Chikkature } 1159a45c6cb8SMadhusudhan Chikkature 1160c5c98927SRussell King static void omap_hsmmc_dma_callback(void *param) 11610ccd76d4SJuha Yrjola { 1162c5c98927SRussell King struct omap_hsmmc_host *host = param; 1163c5c98927SRussell King struct dma_chan *chan; 1164770d7432SAdrian Hunter struct mmc_data *data; 1165c5c98927SRussell King int req_in_progress; 1166a45c6cb8SMadhusudhan Chikkature 1167c5c98927SRussell King spin_lock_irq(&host->irq_lock); 1168b417577dSAdrian Hunter if (host->dma_ch < 0) { 1169c5c98927SRussell King spin_unlock_irq(&host->irq_lock); 1170a45c6cb8SMadhusudhan Chikkature return; 1171b417577dSAdrian Hunter } 1172a45c6cb8SMadhusudhan Chikkature 1173770d7432SAdrian Hunter data = host->mrq->data; 1174c5c98927SRussell King chan = omap_hsmmc_get_dma_chan(host, data); 11759782aff8SPer Forlin if (!data->host_cookie) 1176c5c98927SRussell King dma_unmap_sg(chan->device->dev, 1177c5c98927SRussell King data->sg, data->sg_len, 1178b417577dSAdrian Hunter omap_hsmmc_get_dma_dir(host, data)); 1179b417577dSAdrian Hunter 1180b417577dSAdrian Hunter req_in_progress = host->req_in_progress; 1181a45c6cb8SMadhusudhan Chikkature host->dma_ch = -1; 1182c5c98927SRussell King spin_unlock_irq(&host->irq_lock); 1183b417577dSAdrian Hunter 1184b417577dSAdrian Hunter /* If DMA has finished after TC, complete the request */ 1185b417577dSAdrian Hunter if (!req_in_progress) { 1186b417577dSAdrian Hunter struct mmc_request *mrq = host->mrq; 1187b417577dSAdrian Hunter 1188b417577dSAdrian Hunter host->mrq = NULL; 1189b417577dSAdrian Hunter mmc_request_done(host->mmc, mrq); 1190b417577dSAdrian Hunter } 1191a45c6cb8SMadhusudhan Chikkature } 1192a45c6cb8SMadhusudhan Chikkature 11939782aff8SPer Forlin static int omap_hsmmc_pre_dma_transfer(struct omap_hsmmc_host *host, 11949782aff8SPer Forlin struct mmc_data *data, 1195c5c98927SRussell King struct omap_hsmmc_next *next, 119626b88520SRussell King struct dma_chan *chan) 11979782aff8SPer Forlin { 11989782aff8SPer Forlin int dma_len; 11999782aff8SPer Forlin 12009782aff8SPer Forlin if (!next && data->host_cookie && 12019782aff8SPer Forlin data->host_cookie != host->next_data.cookie) { 12022cecdf00SRajendra Nayak dev_warn(host->dev, "[%s] invalid cookie: data->host_cookie %d" 12039782aff8SPer Forlin " host->next_data.cookie %d\n", 12049782aff8SPer Forlin __func__, data->host_cookie, host->next_data.cookie); 12059782aff8SPer Forlin data->host_cookie = 0; 12069782aff8SPer Forlin } 12079782aff8SPer Forlin 12089782aff8SPer Forlin /* Check if next job is already prepared */ 12099782aff8SPer Forlin if (next || 12109782aff8SPer Forlin (!next && data->host_cookie != host->next_data.cookie)) { 121126b88520SRussell King dma_len = dma_map_sg(chan->device->dev, data->sg, data->sg_len, 12129782aff8SPer Forlin omap_hsmmc_get_dma_dir(host, data)); 12139782aff8SPer Forlin 12149782aff8SPer Forlin } else { 12159782aff8SPer Forlin dma_len = host->next_data.dma_len; 12169782aff8SPer Forlin host->next_data.dma_len = 0; 12179782aff8SPer Forlin } 12189782aff8SPer Forlin 12199782aff8SPer Forlin 12209782aff8SPer Forlin if (dma_len == 0) 12219782aff8SPer Forlin return -EINVAL; 12229782aff8SPer Forlin 12239782aff8SPer Forlin if (next) { 12249782aff8SPer Forlin next->dma_len = dma_len; 12259782aff8SPer Forlin data->host_cookie = ++next->cookie < 0 ? 1 : next->cookie; 12269782aff8SPer Forlin } else 12279782aff8SPer Forlin host->dma_len = dma_len; 12289782aff8SPer Forlin 12299782aff8SPer Forlin return 0; 12309782aff8SPer Forlin } 12319782aff8SPer Forlin 1232a45c6cb8SMadhusudhan Chikkature /* 1233a45c6cb8SMadhusudhan Chikkature * Routine to configure and start DMA for the MMC card 1234a45c6cb8SMadhusudhan Chikkature */ 123570a3341aSDenis Karpov static int omap_hsmmc_start_dma_transfer(struct omap_hsmmc_host *host, 123670a3341aSDenis Karpov struct mmc_request *req) 1237a45c6cb8SMadhusudhan Chikkature { 123826b88520SRussell King struct dma_slave_config cfg; 123926b88520SRussell King struct dma_async_tx_descriptor *tx; 124026b88520SRussell King int ret = 0, i; 1241a45c6cb8SMadhusudhan Chikkature struct mmc_data *data = req->data; 1242c5c98927SRussell King struct dma_chan *chan; 1243a45c6cb8SMadhusudhan Chikkature 12440ccd76d4SJuha Yrjola /* Sanity check: all the SG entries must be aligned by block size. */ 1245a3f406f8SJarkko Lavinen for (i = 0; i < data->sg_len; i++) { 12460ccd76d4SJuha Yrjola struct scatterlist *sgl; 12470ccd76d4SJuha Yrjola 12480ccd76d4SJuha Yrjola sgl = data->sg + i; 12490ccd76d4SJuha Yrjola if (sgl->length % data->blksz) 12500ccd76d4SJuha Yrjola return -EINVAL; 12510ccd76d4SJuha Yrjola } 12520ccd76d4SJuha Yrjola if ((data->blksz % 4) != 0) 12530ccd76d4SJuha Yrjola /* REVISIT: The MMC buffer increments only when MSB is written. 12540ccd76d4SJuha Yrjola * Return error for blksz which is non multiple of four. 12550ccd76d4SJuha Yrjola */ 12560ccd76d4SJuha Yrjola return -EINVAL; 12570ccd76d4SJuha Yrjola 1258b417577dSAdrian Hunter BUG_ON(host->dma_ch != -1); 1259a45c6cb8SMadhusudhan Chikkature 1260c5c98927SRussell King chan = omap_hsmmc_get_dma_chan(host, data); 1261c5c98927SRussell King 1262c5c98927SRussell King cfg.src_addr = host->mapbase + OMAP_HSMMC_DATA; 1263c5c98927SRussell King cfg.dst_addr = host->mapbase + OMAP_HSMMC_DATA; 1264c5c98927SRussell King cfg.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; 1265c5c98927SRussell King cfg.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; 1266c5c98927SRussell King cfg.src_maxburst = data->blksz / 4; 1267c5c98927SRussell King cfg.dst_maxburst = data->blksz / 4; 1268c5c98927SRussell King 1269c5c98927SRussell King ret = dmaengine_slave_config(chan, &cfg); 12709782aff8SPer Forlin if (ret) 12719782aff8SPer Forlin return ret; 1272a45c6cb8SMadhusudhan Chikkature 127326b88520SRussell King ret = omap_hsmmc_pre_dma_transfer(host, data, NULL, chan); 1274c5c98927SRussell King if (ret) 1275c5c98927SRussell King return ret; 1276a45c6cb8SMadhusudhan Chikkature 1277c5c98927SRussell King tx = dmaengine_prep_slave_sg(chan, data->sg, data->sg_len, 1278c5c98927SRussell King data->flags & MMC_DATA_WRITE ? DMA_MEM_TO_DEV : DMA_DEV_TO_MEM, 1279c5c98927SRussell King DMA_PREP_INTERRUPT | DMA_CTRL_ACK); 1280c5c98927SRussell King if (!tx) { 1281c5c98927SRussell King dev_err(mmc_dev(host->mmc), "prep_slave_sg() failed\n"); 1282c5c98927SRussell King /* FIXME: cleanup */ 1283c5c98927SRussell King return -1; 1284c5c98927SRussell King } 1285c5c98927SRussell King 1286c5c98927SRussell King tx->callback = omap_hsmmc_dma_callback; 1287c5c98927SRussell King tx->callback_param = host; 1288c5c98927SRussell King 1289c5c98927SRussell King /* Does not fail */ 1290c5c98927SRussell King dmaengine_submit(tx); 1291c5c98927SRussell King 129226b88520SRussell King host->dma_ch = 1; 1293c5c98927SRussell King 1294c5c98927SRussell King dma_async_issue_pending(chan); 1295a45c6cb8SMadhusudhan Chikkature 1296a45c6cb8SMadhusudhan Chikkature return 0; 1297a45c6cb8SMadhusudhan Chikkature } 1298a45c6cb8SMadhusudhan Chikkature 129970a3341aSDenis Karpov static void set_data_timeout(struct omap_hsmmc_host *host, 1300e2bf08d6SAdrian Hunter unsigned int timeout_ns, 1301e2bf08d6SAdrian Hunter unsigned int timeout_clks) 1302a45c6cb8SMadhusudhan Chikkature { 1303a45c6cb8SMadhusudhan Chikkature unsigned int timeout, cycle_ns; 1304a45c6cb8SMadhusudhan Chikkature uint32_t reg, clkd, dto = 0; 1305a45c6cb8SMadhusudhan Chikkature 1306a45c6cb8SMadhusudhan Chikkature reg = OMAP_HSMMC_READ(host->base, SYSCTL); 1307a45c6cb8SMadhusudhan Chikkature clkd = (reg & CLKD_MASK) >> CLKD_SHIFT; 1308a45c6cb8SMadhusudhan Chikkature if (clkd == 0) 1309a45c6cb8SMadhusudhan Chikkature clkd = 1; 1310a45c6cb8SMadhusudhan Chikkature 1311a45c6cb8SMadhusudhan Chikkature cycle_ns = 1000000000 / (clk_get_rate(host->fclk) / clkd); 1312e2bf08d6SAdrian Hunter timeout = timeout_ns / cycle_ns; 1313e2bf08d6SAdrian Hunter timeout += timeout_clks; 1314a45c6cb8SMadhusudhan Chikkature if (timeout) { 1315a45c6cb8SMadhusudhan Chikkature while ((timeout & 0x80000000) == 0) { 1316a45c6cb8SMadhusudhan Chikkature dto += 1; 1317a45c6cb8SMadhusudhan Chikkature timeout <<= 1; 1318a45c6cb8SMadhusudhan Chikkature } 1319a45c6cb8SMadhusudhan Chikkature dto = 31 - dto; 1320a45c6cb8SMadhusudhan Chikkature timeout <<= 1; 1321a45c6cb8SMadhusudhan Chikkature if (timeout && dto) 1322a45c6cb8SMadhusudhan Chikkature dto += 1; 1323a45c6cb8SMadhusudhan Chikkature if (dto >= 13) 1324a45c6cb8SMadhusudhan Chikkature dto -= 13; 1325a45c6cb8SMadhusudhan Chikkature else 1326a45c6cb8SMadhusudhan Chikkature dto = 0; 1327a45c6cb8SMadhusudhan Chikkature if (dto > 14) 1328a45c6cb8SMadhusudhan Chikkature dto = 14; 1329a45c6cb8SMadhusudhan Chikkature } 1330a45c6cb8SMadhusudhan Chikkature 1331a45c6cb8SMadhusudhan Chikkature reg &= ~DTO_MASK; 1332a45c6cb8SMadhusudhan Chikkature reg |= dto << DTO_SHIFT; 1333a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, reg); 1334a45c6cb8SMadhusudhan Chikkature } 1335a45c6cb8SMadhusudhan Chikkature 1336a45c6cb8SMadhusudhan Chikkature /* 1337a45c6cb8SMadhusudhan Chikkature * Configure block length for MMC/SD cards and initiate the transfer. 1338a45c6cb8SMadhusudhan Chikkature */ 1339a45c6cb8SMadhusudhan Chikkature static int 134070a3341aSDenis Karpov omap_hsmmc_prepare_data(struct omap_hsmmc_host *host, struct mmc_request *req) 1341a45c6cb8SMadhusudhan Chikkature { 1342a45c6cb8SMadhusudhan Chikkature int ret; 1343a45c6cb8SMadhusudhan Chikkature host->data = req->data; 1344a45c6cb8SMadhusudhan Chikkature 1345a45c6cb8SMadhusudhan Chikkature if (req->data == NULL) { 1346a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, BLK, 0); 1347e2bf08d6SAdrian Hunter /* 1348e2bf08d6SAdrian Hunter * Set an arbitrary 100ms data timeout for commands with 1349e2bf08d6SAdrian Hunter * busy signal. 1350e2bf08d6SAdrian Hunter */ 1351e2bf08d6SAdrian Hunter if (req->cmd->flags & MMC_RSP_BUSY) 1352e2bf08d6SAdrian Hunter set_data_timeout(host, 100000000U, 0); 1353a45c6cb8SMadhusudhan Chikkature return 0; 1354a45c6cb8SMadhusudhan Chikkature } 1355a45c6cb8SMadhusudhan Chikkature 1356a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, BLK, (req->data->blksz) 1357a45c6cb8SMadhusudhan Chikkature | (req->data->blocks << 16)); 1358e2bf08d6SAdrian Hunter set_data_timeout(host, req->data->timeout_ns, req->data->timeout_clks); 1359a45c6cb8SMadhusudhan Chikkature 1360a45c6cb8SMadhusudhan Chikkature if (host->use_dma) { 136170a3341aSDenis Karpov ret = omap_hsmmc_start_dma_transfer(host, req); 1362a45c6cb8SMadhusudhan Chikkature if (ret != 0) { 1363a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "MMC start dma failure\n"); 1364a45c6cb8SMadhusudhan Chikkature return ret; 1365a45c6cb8SMadhusudhan Chikkature } 1366a45c6cb8SMadhusudhan Chikkature } 1367a45c6cb8SMadhusudhan Chikkature return 0; 1368a45c6cb8SMadhusudhan Chikkature } 1369a45c6cb8SMadhusudhan Chikkature 13709782aff8SPer Forlin static void omap_hsmmc_post_req(struct mmc_host *mmc, struct mmc_request *mrq, 13719782aff8SPer Forlin int err) 13729782aff8SPer Forlin { 13739782aff8SPer Forlin struct omap_hsmmc_host *host = mmc_priv(mmc); 13749782aff8SPer Forlin struct mmc_data *data = mrq->data; 13759782aff8SPer Forlin 137626b88520SRussell King if (host->use_dma && data->host_cookie) { 1377c5c98927SRussell King struct dma_chan *c = omap_hsmmc_get_dma_chan(host, data); 1378c5c98927SRussell King 137926b88520SRussell King dma_unmap_sg(c->device->dev, data->sg, data->sg_len, 13809782aff8SPer Forlin omap_hsmmc_get_dma_dir(host, data)); 13819782aff8SPer Forlin data->host_cookie = 0; 13829782aff8SPer Forlin } 13839782aff8SPer Forlin } 13849782aff8SPer Forlin 13859782aff8SPer Forlin static void omap_hsmmc_pre_req(struct mmc_host *mmc, struct mmc_request *mrq, 13869782aff8SPer Forlin bool is_first_req) 13879782aff8SPer Forlin { 13889782aff8SPer Forlin struct omap_hsmmc_host *host = mmc_priv(mmc); 13899782aff8SPer Forlin 13909782aff8SPer Forlin if (mrq->data->host_cookie) { 13919782aff8SPer Forlin mrq->data->host_cookie = 0; 13929782aff8SPer Forlin return ; 13939782aff8SPer Forlin } 13949782aff8SPer Forlin 1395c5c98927SRussell King if (host->use_dma) { 1396c5c98927SRussell King struct dma_chan *c = omap_hsmmc_get_dma_chan(host, mrq->data); 1397c5c98927SRussell King 13989782aff8SPer Forlin if (omap_hsmmc_pre_dma_transfer(host, mrq->data, 139926b88520SRussell King &host->next_data, c)) 14009782aff8SPer Forlin mrq->data->host_cookie = 0; 14019782aff8SPer Forlin } 1402c5c98927SRussell King } 14039782aff8SPer Forlin 1404a45c6cb8SMadhusudhan Chikkature /* 1405a45c6cb8SMadhusudhan Chikkature * Request function. for read/write operation 1406a45c6cb8SMadhusudhan Chikkature */ 140770a3341aSDenis Karpov static void omap_hsmmc_request(struct mmc_host *mmc, struct mmc_request *req) 1408a45c6cb8SMadhusudhan Chikkature { 140970a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1410a3f406f8SJarkko Lavinen int err; 1411a45c6cb8SMadhusudhan Chikkature 1412b417577dSAdrian Hunter BUG_ON(host->req_in_progress); 1413b417577dSAdrian Hunter BUG_ON(host->dma_ch != -1); 1414b62f6228SAdrian Hunter if (host->protect_card) { 1415b62f6228SAdrian Hunter if (host->reqs_blocked < 3) { 1416b62f6228SAdrian Hunter /* 1417b62f6228SAdrian Hunter * Ensure the controller is left in a consistent 1418b62f6228SAdrian Hunter * state by resetting the command and data state 1419b62f6228SAdrian Hunter * machines. 1420b62f6228SAdrian Hunter */ 1421b62f6228SAdrian Hunter omap_hsmmc_reset_controller_fsm(host, SRD); 1422b62f6228SAdrian Hunter omap_hsmmc_reset_controller_fsm(host, SRC); 1423b62f6228SAdrian Hunter host->reqs_blocked += 1; 1424b62f6228SAdrian Hunter } 1425b62f6228SAdrian Hunter req->cmd->error = -EBADF; 1426b62f6228SAdrian Hunter if (req->data) 1427b62f6228SAdrian Hunter req->data->error = -EBADF; 1428b417577dSAdrian Hunter req->cmd->retries = 0; 1429b62f6228SAdrian Hunter mmc_request_done(mmc, req); 1430b62f6228SAdrian Hunter return; 1431b62f6228SAdrian Hunter } else if (host->reqs_blocked) 1432b62f6228SAdrian Hunter host->reqs_blocked = 0; 1433a45c6cb8SMadhusudhan Chikkature WARN_ON(host->mrq != NULL); 1434a45c6cb8SMadhusudhan Chikkature host->mrq = req; 143570a3341aSDenis Karpov err = omap_hsmmc_prepare_data(host, req); 1436a3f406f8SJarkko Lavinen if (err) { 1437a3f406f8SJarkko Lavinen req->cmd->error = err; 1438a3f406f8SJarkko Lavinen if (req->data) 1439a3f406f8SJarkko Lavinen req->data->error = err; 1440a3f406f8SJarkko Lavinen host->mrq = NULL; 1441a3f406f8SJarkko Lavinen mmc_request_done(mmc, req); 1442a3f406f8SJarkko Lavinen return; 1443a3f406f8SJarkko Lavinen } 1444a3f406f8SJarkko Lavinen 144570a3341aSDenis Karpov omap_hsmmc_start_command(host, req->cmd, req->data); 1446a45c6cb8SMadhusudhan Chikkature } 1447a45c6cb8SMadhusudhan Chikkature 1448a45c6cb8SMadhusudhan Chikkature /* Routine to configure clock values. Exposed API to core */ 144970a3341aSDenis Karpov static void omap_hsmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 1450a45c6cb8SMadhusudhan Chikkature { 145170a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1452a3621465SAdrian Hunter int do_send_init_stream = 0; 1453a45c6cb8SMadhusudhan Chikkature 1454fa4aa2d4SBalaji T K pm_runtime_get_sync(host->dev); 14555e2ea617SAdrian Hunter 1456a3621465SAdrian Hunter if (ios->power_mode != host->power_mode) { 1457a45c6cb8SMadhusudhan Chikkature switch (ios->power_mode) { 1458a45c6cb8SMadhusudhan Chikkature case MMC_POWER_OFF: 1459a3621465SAdrian Hunter mmc_slot(host).set_power(host->dev, host->slot_id, 1460a3621465SAdrian Hunter 0, 0); 1461a45c6cb8SMadhusudhan Chikkature break; 1462a45c6cb8SMadhusudhan Chikkature case MMC_POWER_UP: 1463a3621465SAdrian Hunter mmc_slot(host).set_power(host->dev, host->slot_id, 1464a3621465SAdrian Hunter 1, ios->vdd); 1465a45c6cb8SMadhusudhan Chikkature break; 1466a3621465SAdrian Hunter case MMC_POWER_ON: 1467a3621465SAdrian Hunter do_send_init_stream = 1; 1468a3621465SAdrian Hunter break; 1469a3621465SAdrian Hunter } 1470a3621465SAdrian Hunter host->power_mode = ios->power_mode; 1471a45c6cb8SMadhusudhan Chikkature } 1472a45c6cb8SMadhusudhan Chikkature 1473dd498effSDenis Karpov /* FIXME: set registers based only on changes to ios */ 1474dd498effSDenis Karpov 14753796fb8aSAndy Shevchenko omap_hsmmc_set_bus_width(host); 1476a45c6cb8SMadhusudhan Chikkature 14774621d5f8SKishore Kadiyala if (host->pdata->controller_flags & OMAP_HSMMC_SUPPORTS_DUAL_VOLT) { 1478eb250826SDavid Brownell /* Only MMC1 can interface at 3V without some flavor 1479eb250826SDavid Brownell * of external transceiver; but they all handle 1.8V. 1480eb250826SDavid Brownell */ 1481a45c6cb8SMadhusudhan Chikkature if ((OMAP_HSMMC_READ(host->base, HCTL) & SDVSDET) && 14821f84b71bSRajendra Nayak (ios->vdd == DUAL_VOLT_OCR_BIT) && 14831f84b71bSRajendra Nayak /* 14841f84b71bSRajendra Nayak * With pbias cell programming missing, this 14851f84b71bSRajendra Nayak * can't be allowed when booting with device 14861f84b71bSRajendra Nayak * tree. 14871f84b71bSRajendra Nayak */ 14884d048f91SRajendra Nayak !host->dev->of_node) { 1489a45c6cb8SMadhusudhan Chikkature /* 1490a45c6cb8SMadhusudhan Chikkature * The mmc_select_voltage fn of the core does 1491a45c6cb8SMadhusudhan Chikkature * not seem to set the power_mode to 1492a45c6cb8SMadhusudhan Chikkature * MMC_POWER_UP upon recalculating the voltage. 1493a45c6cb8SMadhusudhan Chikkature * vdd 1.8v. 1494a45c6cb8SMadhusudhan Chikkature */ 149570a3341aSDenis Karpov if (omap_hsmmc_switch_opcond(host, ios->vdd) != 0) 1496a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1497a45c6cb8SMadhusudhan Chikkature "Switch operation failed\n"); 1498a45c6cb8SMadhusudhan Chikkature } 1499a45c6cb8SMadhusudhan Chikkature } 1500a45c6cb8SMadhusudhan Chikkature 15015934df2fSAndy Shevchenko omap_hsmmc_set_clock(host); 1502a45c6cb8SMadhusudhan Chikkature 1503a3621465SAdrian Hunter if (do_send_init_stream) 1504a45c6cb8SMadhusudhan Chikkature send_init_stream(host); 1505a45c6cb8SMadhusudhan Chikkature 15063796fb8aSAndy Shevchenko omap_hsmmc_set_bus_mode(host); 15075e2ea617SAdrian Hunter 1508fa4aa2d4SBalaji T K pm_runtime_put_autosuspend(host->dev); 1509a45c6cb8SMadhusudhan Chikkature } 1510a45c6cb8SMadhusudhan Chikkature 1511a45c6cb8SMadhusudhan Chikkature static int omap_hsmmc_get_cd(struct mmc_host *mmc) 1512a45c6cb8SMadhusudhan Chikkature { 151370a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1514a45c6cb8SMadhusudhan Chikkature 1515191d1f1dSDenis Karpov if (!mmc_slot(host).card_detect) 1516a45c6cb8SMadhusudhan Chikkature return -ENOSYS; 1517db0fefc5SAdrian Hunter return mmc_slot(host).card_detect(host->dev, host->slot_id); 1518a45c6cb8SMadhusudhan Chikkature } 1519a45c6cb8SMadhusudhan Chikkature 1520a45c6cb8SMadhusudhan Chikkature static int omap_hsmmc_get_ro(struct mmc_host *mmc) 1521a45c6cb8SMadhusudhan Chikkature { 152270a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1523a45c6cb8SMadhusudhan Chikkature 1524191d1f1dSDenis Karpov if (!mmc_slot(host).get_ro) 1525a45c6cb8SMadhusudhan Chikkature return -ENOSYS; 1526191d1f1dSDenis Karpov return mmc_slot(host).get_ro(host->dev, 0); 1527a45c6cb8SMadhusudhan Chikkature } 1528a45c6cb8SMadhusudhan Chikkature 15294816858cSGrazvydas Ignotas static void omap_hsmmc_init_card(struct mmc_host *mmc, struct mmc_card *card) 15304816858cSGrazvydas Ignotas { 15314816858cSGrazvydas Ignotas struct omap_hsmmc_host *host = mmc_priv(mmc); 15324816858cSGrazvydas Ignotas 15334816858cSGrazvydas Ignotas if (mmc_slot(host).init_card) 15344816858cSGrazvydas Ignotas mmc_slot(host).init_card(card); 15354816858cSGrazvydas Ignotas } 15364816858cSGrazvydas Ignotas 153770a3341aSDenis Karpov static void omap_hsmmc_conf_bus_power(struct omap_hsmmc_host *host) 15381b331e69SKim Kyuwon { 15391b331e69SKim Kyuwon u32 hctl, capa, value; 15401b331e69SKim Kyuwon 15411b331e69SKim Kyuwon /* Only MMC1 supports 3.0V */ 15424621d5f8SKishore Kadiyala if (host->pdata->controller_flags & OMAP_HSMMC_SUPPORTS_DUAL_VOLT) { 15431b331e69SKim Kyuwon hctl = SDVS30; 15441b331e69SKim Kyuwon capa = VS30 | VS18; 15451b331e69SKim Kyuwon } else { 15461b331e69SKim Kyuwon hctl = SDVS18; 15471b331e69SKim Kyuwon capa = VS18; 15481b331e69SKim Kyuwon } 15491b331e69SKim Kyuwon 15501b331e69SKim Kyuwon value = OMAP_HSMMC_READ(host->base, HCTL) & ~SDVS_MASK; 15511b331e69SKim Kyuwon OMAP_HSMMC_WRITE(host->base, HCTL, value | hctl); 15521b331e69SKim Kyuwon 15531b331e69SKim Kyuwon value = OMAP_HSMMC_READ(host->base, CAPA); 15541b331e69SKim Kyuwon OMAP_HSMMC_WRITE(host->base, CAPA, value | capa); 15551b331e69SKim Kyuwon 15561b331e69SKim Kyuwon /* Set SD bus power bit */ 1557e13bb300SAdrian Hunter set_sd_bus_power(host); 15581b331e69SKim Kyuwon } 15591b331e69SKim Kyuwon 156070a3341aSDenis Karpov static int omap_hsmmc_enable_fclk(struct mmc_host *mmc) 1561dd498effSDenis Karpov { 156270a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1563dd498effSDenis Karpov 1564fa4aa2d4SBalaji T K pm_runtime_get_sync(host->dev); 1565fa4aa2d4SBalaji T K 1566dd498effSDenis Karpov return 0; 1567dd498effSDenis Karpov } 1568dd498effSDenis Karpov 1569907d2e7cSAdrian Hunter static int omap_hsmmc_disable_fclk(struct mmc_host *mmc) 1570dd498effSDenis Karpov { 157170a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1572dd498effSDenis Karpov 1573fa4aa2d4SBalaji T K pm_runtime_mark_last_busy(host->dev); 1574fa4aa2d4SBalaji T K pm_runtime_put_autosuspend(host->dev); 1575fa4aa2d4SBalaji T K 1576dd498effSDenis Karpov return 0; 1577dd498effSDenis Karpov } 1578dd498effSDenis Karpov 157970a3341aSDenis Karpov static const struct mmc_host_ops omap_hsmmc_ops = { 158070a3341aSDenis Karpov .enable = omap_hsmmc_enable_fclk, 158170a3341aSDenis Karpov .disable = omap_hsmmc_disable_fclk, 15829782aff8SPer Forlin .post_req = omap_hsmmc_post_req, 15839782aff8SPer Forlin .pre_req = omap_hsmmc_pre_req, 158470a3341aSDenis Karpov .request = omap_hsmmc_request, 158570a3341aSDenis Karpov .set_ios = omap_hsmmc_set_ios, 1586dd498effSDenis Karpov .get_cd = omap_hsmmc_get_cd, 1587dd498effSDenis Karpov .get_ro = omap_hsmmc_get_ro, 15884816858cSGrazvydas Ignotas .init_card = omap_hsmmc_init_card, 1589dd498effSDenis Karpov /* NYET -- enable_sdio_irq */ 1590dd498effSDenis Karpov }; 1591dd498effSDenis Karpov 1592d900f712SDenis Karpov #ifdef CONFIG_DEBUG_FS 1593d900f712SDenis Karpov 159470a3341aSDenis Karpov static int omap_hsmmc_regs_show(struct seq_file *s, void *data) 1595d900f712SDenis Karpov { 1596d900f712SDenis Karpov struct mmc_host *mmc = s->private; 159770a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 159811dd62a7SDenis Karpov int context_loss = 0; 159911dd62a7SDenis Karpov 160070a3341aSDenis Karpov if (host->pdata->get_context_loss_count) 160170a3341aSDenis Karpov context_loss = host->pdata->get_context_loss_count(host->dev); 1602d900f712SDenis Karpov 1603907d2e7cSAdrian Hunter seq_printf(s, "mmc%d:\n ctx_loss:\t%d:%d\n\nregs:\n", 1604907d2e7cSAdrian Hunter mmc->index, host->context_loss, context_loss); 16055e2ea617SAdrian Hunter 16067a8c2cefSBalaji T K if (host->suspended) { 1607dd498effSDenis Karpov seq_printf(s, "host suspended, can't read registers\n"); 1608dd498effSDenis Karpov return 0; 1609dd498effSDenis Karpov } 1610dd498effSDenis Karpov 1611fa4aa2d4SBalaji T K pm_runtime_get_sync(host->dev); 1612d900f712SDenis Karpov 1613d900f712SDenis Karpov seq_printf(s, "CON:\t\t0x%08x\n", 1614d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, CON)); 1615d900f712SDenis Karpov seq_printf(s, "HCTL:\t\t0x%08x\n", 1616d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, HCTL)); 1617d900f712SDenis Karpov seq_printf(s, "SYSCTL:\t\t0x%08x\n", 1618d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCTL)); 1619d900f712SDenis Karpov seq_printf(s, "IE:\t\t0x%08x\n", 1620d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, IE)); 1621d900f712SDenis Karpov seq_printf(s, "ISE:\t\t0x%08x\n", 1622d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, ISE)); 1623d900f712SDenis Karpov seq_printf(s, "CAPA:\t\t0x%08x\n", 1624d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, CAPA)); 16255e2ea617SAdrian Hunter 1626fa4aa2d4SBalaji T K pm_runtime_mark_last_busy(host->dev); 1627fa4aa2d4SBalaji T K pm_runtime_put_autosuspend(host->dev); 1628dd498effSDenis Karpov 1629d900f712SDenis Karpov return 0; 1630d900f712SDenis Karpov } 1631d900f712SDenis Karpov 163270a3341aSDenis Karpov static int omap_hsmmc_regs_open(struct inode *inode, struct file *file) 1633d900f712SDenis Karpov { 163470a3341aSDenis Karpov return single_open(file, omap_hsmmc_regs_show, inode->i_private); 1635d900f712SDenis Karpov } 1636d900f712SDenis Karpov 1637d900f712SDenis Karpov static const struct file_operations mmc_regs_fops = { 163870a3341aSDenis Karpov .open = omap_hsmmc_regs_open, 1639d900f712SDenis Karpov .read = seq_read, 1640d900f712SDenis Karpov .llseek = seq_lseek, 1641d900f712SDenis Karpov .release = single_release, 1642d900f712SDenis Karpov }; 1643d900f712SDenis Karpov 164470a3341aSDenis Karpov static void omap_hsmmc_debugfs(struct mmc_host *mmc) 1645d900f712SDenis Karpov { 1646d900f712SDenis Karpov if (mmc->debugfs_root) 1647d900f712SDenis Karpov debugfs_create_file("regs", S_IRUSR, mmc->debugfs_root, 1648d900f712SDenis Karpov mmc, &mmc_regs_fops); 1649d900f712SDenis Karpov } 1650d900f712SDenis Karpov 1651d900f712SDenis Karpov #else 1652d900f712SDenis Karpov 165370a3341aSDenis Karpov static void omap_hsmmc_debugfs(struct mmc_host *mmc) 1654d900f712SDenis Karpov { 1655d900f712SDenis Karpov } 1656d900f712SDenis Karpov 1657d900f712SDenis Karpov #endif 1658d900f712SDenis Karpov 165946856a68SRajendra Nayak #ifdef CONFIG_OF 166046856a68SRajendra Nayak static u16 omap4_reg_offset = 0x100; 166146856a68SRajendra Nayak 166246856a68SRajendra Nayak static const struct of_device_id omap_mmc_of_match[] = { 166346856a68SRajendra Nayak { 166446856a68SRajendra Nayak .compatible = "ti,omap2-hsmmc", 166546856a68SRajendra Nayak }, 166646856a68SRajendra Nayak { 166746856a68SRajendra Nayak .compatible = "ti,omap3-hsmmc", 166846856a68SRajendra Nayak }, 166946856a68SRajendra Nayak { 167046856a68SRajendra Nayak .compatible = "ti,omap4-hsmmc", 167146856a68SRajendra Nayak .data = &omap4_reg_offset, 167246856a68SRajendra Nayak }, 167346856a68SRajendra Nayak {}, 1674b6d085f6SChris Ball }; 167546856a68SRajendra Nayak MODULE_DEVICE_TABLE(of, omap_mmc_of_match); 167646856a68SRajendra Nayak 167746856a68SRajendra Nayak static struct omap_mmc_platform_data *of_get_hsmmc_pdata(struct device *dev) 167846856a68SRajendra Nayak { 167946856a68SRajendra Nayak struct omap_mmc_platform_data *pdata; 168046856a68SRajendra Nayak struct device_node *np = dev->of_node; 168146856a68SRajendra Nayak u32 bus_width; 168246856a68SRajendra Nayak 168346856a68SRajendra Nayak pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); 168446856a68SRajendra Nayak if (!pdata) 168546856a68SRajendra Nayak return NULL; /* out of memory */ 168646856a68SRajendra Nayak 168746856a68SRajendra Nayak if (of_find_property(np, "ti,dual-volt", NULL)) 168846856a68SRajendra Nayak pdata->controller_flags |= OMAP_HSMMC_SUPPORTS_DUAL_VOLT; 168946856a68SRajendra Nayak 169046856a68SRajendra Nayak /* This driver only supports 1 slot */ 169146856a68SRajendra Nayak pdata->nr_slots = 1; 169246856a68SRajendra Nayak pdata->slots[0].switch_pin = of_get_named_gpio(np, "cd-gpios", 0); 169346856a68SRajendra Nayak pdata->slots[0].gpio_wp = of_get_named_gpio(np, "wp-gpios", 0); 169446856a68SRajendra Nayak 169546856a68SRajendra Nayak if (of_find_property(np, "ti,non-removable", NULL)) { 169646856a68SRajendra Nayak pdata->slots[0].nonremovable = true; 169746856a68SRajendra Nayak pdata->slots[0].no_regulator_off_init = true; 169846856a68SRajendra Nayak } 16997f217794SArnd Bergmann of_property_read_u32(np, "bus-width", &bus_width); 170046856a68SRajendra Nayak if (bus_width == 4) 170146856a68SRajendra Nayak pdata->slots[0].caps |= MMC_CAP_4_BIT_DATA; 170246856a68SRajendra Nayak else if (bus_width == 8) 170346856a68SRajendra Nayak pdata->slots[0].caps |= MMC_CAP_8_BIT_DATA; 170446856a68SRajendra Nayak 170546856a68SRajendra Nayak if (of_find_property(np, "ti,needs-special-reset", NULL)) 170646856a68SRajendra Nayak pdata->slots[0].features |= HSMMC_HAS_UPDATED_RESET; 170746856a68SRajendra Nayak 170846856a68SRajendra Nayak return pdata; 170946856a68SRajendra Nayak } 171046856a68SRajendra Nayak #else 171146856a68SRajendra Nayak static inline struct omap_mmc_platform_data 171246856a68SRajendra Nayak *of_get_hsmmc_pdata(struct device *dev) 171346856a68SRajendra Nayak { 171446856a68SRajendra Nayak return NULL; 171546856a68SRajendra Nayak } 171646856a68SRajendra Nayak #endif 171746856a68SRajendra Nayak 1718c3be1efdSBill Pemberton static int omap_hsmmc_probe(struct platform_device *pdev) 1719a45c6cb8SMadhusudhan Chikkature { 1720a45c6cb8SMadhusudhan Chikkature struct omap_mmc_platform_data *pdata = pdev->dev.platform_data; 1721a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc; 172270a3341aSDenis Karpov struct omap_hsmmc_host *host = NULL; 1723a45c6cb8SMadhusudhan Chikkature struct resource *res; 1724db0fefc5SAdrian Hunter int ret, irq; 172546856a68SRajendra Nayak const struct of_device_id *match; 172626b88520SRussell King dma_cap_mask_t mask; 172726b88520SRussell King unsigned tx_req, rx_req; 172846856a68SRajendra Nayak 172946856a68SRajendra Nayak match = of_match_device(of_match_ptr(omap_mmc_of_match), &pdev->dev); 173046856a68SRajendra Nayak if (match) { 173146856a68SRajendra Nayak pdata = of_get_hsmmc_pdata(&pdev->dev); 173246856a68SRajendra Nayak if (match->data) { 1733efc9b736SUwe Kleine-König const u16 *offsetp = match->data; 173446856a68SRajendra Nayak pdata->reg_offset = *offsetp; 173546856a68SRajendra Nayak } 173646856a68SRajendra Nayak } 1737a45c6cb8SMadhusudhan Chikkature 1738a45c6cb8SMadhusudhan Chikkature if (pdata == NULL) { 1739a45c6cb8SMadhusudhan Chikkature dev_err(&pdev->dev, "Platform Data is missing\n"); 1740a45c6cb8SMadhusudhan Chikkature return -ENXIO; 1741a45c6cb8SMadhusudhan Chikkature } 1742a45c6cb8SMadhusudhan Chikkature 1743a45c6cb8SMadhusudhan Chikkature if (pdata->nr_slots == 0) { 1744a45c6cb8SMadhusudhan Chikkature dev_err(&pdev->dev, "No Slots\n"); 1745a45c6cb8SMadhusudhan Chikkature return -ENXIO; 1746a45c6cb8SMadhusudhan Chikkature } 1747a45c6cb8SMadhusudhan Chikkature 1748a45c6cb8SMadhusudhan Chikkature res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1749a45c6cb8SMadhusudhan Chikkature irq = platform_get_irq(pdev, 0); 1750a45c6cb8SMadhusudhan Chikkature if (res == NULL || irq < 0) 1751a45c6cb8SMadhusudhan Chikkature return -ENXIO; 1752a45c6cb8SMadhusudhan Chikkature 1753984b203aSChris Ball res = request_mem_region(res->start, resource_size(res), pdev->name); 1754a45c6cb8SMadhusudhan Chikkature if (res == NULL) 1755a45c6cb8SMadhusudhan Chikkature return -EBUSY; 1756a45c6cb8SMadhusudhan Chikkature 1757db0fefc5SAdrian Hunter ret = omap_hsmmc_gpio_init(pdata); 1758db0fefc5SAdrian Hunter if (ret) 1759db0fefc5SAdrian Hunter goto err; 1760db0fefc5SAdrian Hunter 176170a3341aSDenis Karpov mmc = mmc_alloc_host(sizeof(struct omap_hsmmc_host), &pdev->dev); 1762a45c6cb8SMadhusudhan Chikkature if (!mmc) { 1763a45c6cb8SMadhusudhan Chikkature ret = -ENOMEM; 1764db0fefc5SAdrian Hunter goto err_alloc; 1765a45c6cb8SMadhusudhan Chikkature } 1766a45c6cb8SMadhusudhan Chikkature 1767a45c6cb8SMadhusudhan Chikkature host = mmc_priv(mmc); 1768a45c6cb8SMadhusudhan Chikkature host->mmc = mmc; 1769a45c6cb8SMadhusudhan Chikkature host->pdata = pdata; 1770a45c6cb8SMadhusudhan Chikkature host->dev = &pdev->dev; 1771a45c6cb8SMadhusudhan Chikkature host->use_dma = 1; 1772a45c6cb8SMadhusudhan Chikkature host->dma_ch = -1; 1773a45c6cb8SMadhusudhan Chikkature host->irq = irq; 1774a45c6cb8SMadhusudhan Chikkature host->slot_id = 0; 1775fc307df8SBalaji T K host->mapbase = res->start + pdata->reg_offset; 1776a45c6cb8SMadhusudhan Chikkature host->base = ioremap(host->mapbase, SZ_4K); 17776da20c89SAdrian Hunter host->power_mode = MMC_POWER_OFF; 17789782aff8SPer Forlin host->next_data.cookie = 1; 1779a45c6cb8SMadhusudhan Chikkature 1780a45c6cb8SMadhusudhan Chikkature platform_set_drvdata(pdev, host); 1781a45c6cb8SMadhusudhan Chikkature 178270a3341aSDenis Karpov mmc->ops = &omap_hsmmc_ops; 1783dd498effSDenis Karpov 1784e0eb2424SAdrian Hunter /* 1785e0eb2424SAdrian Hunter * If regulator_disable can only put vcc_aux to sleep then there is 1786e0eb2424SAdrian Hunter * no off state. 1787e0eb2424SAdrian Hunter */ 1788e0eb2424SAdrian Hunter if (mmc_slot(host).vcc_aux_disable_is_sleep) 1789e0eb2424SAdrian Hunter mmc_slot(host).no_off = 1; 1790e0eb2424SAdrian Hunter 17916b206efeSAndy Shevchenko mmc->f_min = OMAP_MMC_MIN_CLOCK; 1792d418ed87SDaniel Mack 1793d418ed87SDaniel Mack if (pdata->max_freq > 0) 1794d418ed87SDaniel Mack mmc->f_max = pdata->max_freq; 1795d418ed87SDaniel Mack else 17966b206efeSAndy Shevchenko mmc->f_max = OMAP_MMC_MAX_CLOCK; 1797a45c6cb8SMadhusudhan Chikkature 17984dffd7a2SAdrian Hunter spin_lock_init(&host->irq_lock); 1799a45c6cb8SMadhusudhan Chikkature 18006f7607ccSRussell King host->fclk = clk_get(&pdev->dev, "fck"); 1801a45c6cb8SMadhusudhan Chikkature if (IS_ERR(host->fclk)) { 1802a45c6cb8SMadhusudhan Chikkature ret = PTR_ERR(host->fclk); 1803a45c6cb8SMadhusudhan Chikkature host->fclk = NULL; 1804a45c6cb8SMadhusudhan Chikkature goto err1; 1805a45c6cb8SMadhusudhan Chikkature } 1806a45c6cb8SMadhusudhan Chikkature 18079b68256cSPaul Walmsley if (host->pdata->controller_flags & OMAP_HSMMC_BROKEN_MULTIBLOCK_READ) { 18089b68256cSPaul Walmsley dev_info(&pdev->dev, "multiblock reads disabled due to 35xx erratum 2.1.1.128; MMC read performance may suffer\n"); 18099b68256cSPaul Walmsley mmc->caps2 |= MMC_CAP2_NO_MULTI_READ; 18109b68256cSPaul Walmsley } 1811dd498effSDenis Karpov 1812fa4aa2d4SBalaji T K pm_runtime_enable(host->dev); 1813fa4aa2d4SBalaji T K pm_runtime_get_sync(host->dev); 1814fa4aa2d4SBalaji T K pm_runtime_set_autosuspend_delay(host->dev, MMC_AUTOSUSPEND_DELAY); 1815fa4aa2d4SBalaji T K pm_runtime_use_autosuspend(host->dev); 1816a45c6cb8SMadhusudhan Chikkature 181792a3aebfSBalaji T K omap_hsmmc_context_save(host); 181892a3aebfSBalaji T K 1819a45c6cb8SMadhusudhan Chikkature host->dbclk = clk_get(&pdev->dev, "mmchsdb_fck"); 1820a45c6cb8SMadhusudhan Chikkature /* 1821a45c6cb8SMadhusudhan Chikkature * MMC can still work without debounce clock. 1822a45c6cb8SMadhusudhan Chikkature */ 1823cd03d9a8SRajendra Nayak if (IS_ERR(host->dbclk)) { 1824cd03d9a8SRajendra Nayak dev_warn(mmc_dev(host->mmc), "Failed to get debounce clk\n"); 1825cd03d9a8SRajendra Nayak host->dbclk = NULL; 182694c18149SRajendra Nayak } else if (clk_prepare_enable(host->dbclk) != 0) { 1827cd03d9a8SRajendra Nayak dev_warn(mmc_dev(host->mmc), "Failed to enable debounce clk\n"); 1828cd03d9a8SRajendra Nayak clk_put(host->dbclk); 1829cd03d9a8SRajendra Nayak host->dbclk = NULL; 18302bec0893SAdrian Hunter } 1831a45c6cb8SMadhusudhan Chikkature 18320ccd76d4SJuha Yrjola /* Since we do only SG emulation, we can have as many segs 18330ccd76d4SJuha Yrjola * as we want. */ 1834a36274e0SMartin K. Petersen mmc->max_segs = 1024; 18350ccd76d4SJuha Yrjola 1836a45c6cb8SMadhusudhan Chikkature mmc->max_blk_size = 512; /* Block Length at max can be 1024 */ 1837a45c6cb8SMadhusudhan Chikkature mmc->max_blk_count = 0xFFFF; /* No. of Blocks is 16 bits */ 1838a45c6cb8SMadhusudhan Chikkature mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; 1839a45c6cb8SMadhusudhan Chikkature mmc->max_seg_size = mmc->max_req_size; 1840a45c6cb8SMadhusudhan Chikkature 184113189e78SJarkko Lavinen mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED | 184293caf8e6SAdrian Hunter MMC_CAP_WAIT_WHILE_BUSY | MMC_CAP_ERASE; 1843a45c6cb8SMadhusudhan Chikkature 18443a63833eSSukumar Ghorai mmc->caps |= mmc_slot(host).caps; 18453a63833eSSukumar Ghorai if (mmc->caps & MMC_CAP_8_BIT_DATA) 1846a45c6cb8SMadhusudhan Chikkature mmc->caps |= MMC_CAP_4_BIT_DATA; 1847a45c6cb8SMadhusudhan Chikkature 1848191d1f1dSDenis Karpov if (mmc_slot(host).nonremovable) 184923d99bb9SAdrian Hunter mmc->caps |= MMC_CAP_NONREMOVABLE; 185023d99bb9SAdrian Hunter 18516fdc75deSEliad Peller mmc->pm_caps = mmc_slot(host).pm_caps; 18526fdc75deSEliad Peller 185370a3341aSDenis Karpov omap_hsmmc_conf_bus_power(host); 1854a45c6cb8SMadhusudhan Chikkature 1855b7bf773bSBalaji T K res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "tx"); 1856b7bf773bSBalaji T K if (!res) { 1857b7bf773bSBalaji T K dev_err(mmc_dev(host->mmc), "cannot get DMA TX channel\n"); 18589c17d08cSKevin Hilman ret = -ENXIO; 1859f3e2f1ddSGrazvydas Ignotas goto err_irq; 1860a45c6cb8SMadhusudhan Chikkature } 186126b88520SRussell King tx_req = res->start; 1862b7bf773bSBalaji T K 1863b7bf773bSBalaji T K res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "rx"); 1864b7bf773bSBalaji T K if (!res) { 1865b7bf773bSBalaji T K dev_err(mmc_dev(host->mmc), "cannot get DMA RX channel\n"); 18669c17d08cSKevin Hilman ret = -ENXIO; 1867b7bf773bSBalaji T K goto err_irq; 1868b7bf773bSBalaji T K } 186926b88520SRussell King rx_req = res->start; 1870c5c98927SRussell King 1871c5c98927SRussell King dma_cap_zero(mask); 1872c5c98927SRussell King dma_cap_set(DMA_SLAVE, mask); 187326b88520SRussell King 187426b88520SRussell King host->rx_chan = dma_request_channel(mask, omap_dma_filter_fn, &rx_req); 1875c5c98927SRussell King if (!host->rx_chan) { 187626b88520SRussell King dev_err(mmc_dev(host->mmc), "unable to obtain RX DMA engine channel %u\n", rx_req); 187704e8c7bcSKevin Hilman ret = -ENXIO; 187826b88520SRussell King goto err_irq; 1879c5c98927SRussell King } 188026b88520SRussell King 188126b88520SRussell King host->tx_chan = dma_request_channel(mask, omap_dma_filter_fn, &tx_req); 1882c5c98927SRussell King if (!host->tx_chan) { 188326b88520SRussell King dev_err(mmc_dev(host->mmc), "unable to obtain TX DMA engine channel %u\n", tx_req); 188404e8c7bcSKevin Hilman ret = -ENXIO; 188526b88520SRussell King goto err_irq; 1886c5c98927SRussell King } 1887a45c6cb8SMadhusudhan Chikkature 1888a45c6cb8SMadhusudhan Chikkature /* Request IRQ for MMC operations */ 1889d9618e9fSYong Zhang ret = request_irq(host->irq, omap_hsmmc_irq, 0, 1890a45c6cb8SMadhusudhan Chikkature mmc_hostname(mmc), host); 1891a45c6cb8SMadhusudhan Chikkature if (ret) { 1892a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Unable to grab HSMMC IRQ\n"); 1893a45c6cb8SMadhusudhan Chikkature goto err_irq; 1894a45c6cb8SMadhusudhan Chikkature } 1895a45c6cb8SMadhusudhan Chikkature 1896a45c6cb8SMadhusudhan Chikkature if (pdata->init != NULL) { 1897a45c6cb8SMadhusudhan Chikkature if (pdata->init(&pdev->dev) != 0) { 189870a3341aSDenis Karpov dev_dbg(mmc_dev(host->mmc), 189970a3341aSDenis Karpov "Unable to configure MMC IRQs\n"); 1900a45c6cb8SMadhusudhan Chikkature goto err_irq_cd_init; 1901a45c6cb8SMadhusudhan Chikkature } 1902a45c6cb8SMadhusudhan Chikkature } 1903db0fefc5SAdrian Hunter 1904b702b106SAdrian Hunter if (omap_hsmmc_have_reg() && !mmc_slot(host).set_power) { 1905db0fefc5SAdrian Hunter ret = omap_hsmmc_reg_get(host); 1906db0fefc5SAdrian Hunter if (ret) 1907db0fefc5SAdrian Hunter goto err_reg; 1908db0fefc5SAdrian Hunter host->use_reg = 1; 1909db0fefc5SAdrian Hunter } 1910db0fefc5SAdrian Hunter 1911b583f26dSDavid Brownell mmc->ocr_avail = mmc_slot(host).ocr_mask; 1912a45c6cb8SMadhusudhan Chikkature 1913a45c6cb8SMadhusudhan Chikkature /* Request IRQ for card detect */ 1914e1a55f5eSAdrian Hunter if ((mmc_slot(host).card_detect_irq)) { 19157efab4f3SNeilBrown ret = request_threaded_irq(mmc_slot(host).card_detect_irq, 19167efab4f3SNeilBrown NULL, 19177efab4f3SNeilBrown omap_hsmmc_detect, 1918db35f83eSMing Lei IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING | IRQF_ONESHOT, 1919a45c6cb8SMadhusudhan Chikkature mmc_hostname(mmc), host); 1920a45c6cb8SMadhusudhan Chikkature if (ret) { 1921a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1922a45c6cb8SMadhusudhan Chikkature "Unable to grab MMC CD IRQ\n"); 1923a45c6cb8SMadhusudhan Chikkature goto err_irq_cd; 1924a45c6cb8SMadhusudhan Chikkature } 192572f2e2c7Skishore kadiyala pdata->suspend = omap_hsmmc_suspend_cdirq; 192672f2e2c7Skishore kadiyala pdata->resume = omap_hsmmc_resume_cdirq; 1927a45c6cb8SMadhusudhan Chikkature } 1928a45c6cb8SMadhusudhan Chikkature 1929b417577dSAdrian Hunter omap_hsmmc_disable_irq(host); 1930a45c6cb8SMadhusudhan Chikkature 1931b62f6228SAdrian Hunter omap_hsmmc_protect_card(host); 1932b62f6228SAdrian Hunter 1933a45c6cb8SMadhusudhan Chikkature mmc_add_host(mmc); 1934a45c6cb8SMadhusudhan Chikkature 1935191d1f1dSDenis Karpov if (mmc_slot(host).name != NULL) { 1936a45c6cb8SMadhusudhan Chikkature ret = device_create_file(&mmc->class_dev, &dev_attr_slot_name); 1937a45c6cb8SMadhusudhan Chikkature if (ret < 0) 1938a45c6cb8SMadhusudhan Chikkature goto err_slot_name; 1939a45c6cb8SMadhusudhan Chikkature } 1940191d1f1dSDenis Karpov if (mmc_slot(host).card_detect_irq && mmc_slot(host).get_cover_state) { 1941a45c6cb8SMadhusudhan Chikkature ret = device_create_file(&mmc->class_dev, 1942a45c6cb8SMadhusudhan Chikkature &dev_attr_cover_switch); 1943a45c6cb8SMadhusudhan Chikkature if (ret < 0) 1944db0fefc5SAdrian Hunter goto err_slot_name; 1945a45c6cb8SMadhusudhan Chikkature } 1946a45c6cb8SMadhusudhan Chikkature 194770a3341aSDenis Karpov omap_hsmmc_debugfs(mmc); 1948fa4aa2d4SBalaji T K pm_runtime_mark_last_busy(host->dev); 1949fa4aa2d4SBalaji T K pm_runtime_put_autosuspend(host->dev); 1950d900f712SDenis Karpov 1951a45c6cb8SMadhusudhan Chikkature return 0; 1952a45c6cb8SMadhusudhan Chikkature 1953a45c6cb8SMadhusudhan Chikkature err_slot_name: 1954a45c6cb8SMadhusudhan Chikkature mmc_remove_host(mmc); 1955a45c6cb8SMadhusudhan Chikkature free_irq(mmc_slot(host).card_detect_irq, host); 1956db0fefc5SAdrian Hunter err_irq_cd: 1957db0fefc5SAdrian Hunter if (host->use_reg) 1958db0fefc5SAdrian Hunter omap_hsmmc_reg_put(host); 1959db0fefc5SAdrian Hunter err_reg: 1960db0fefc5SAdrian Hunter if (host->pdata->cleanup) 1961db0fefc5SAdrian Hunter host->pdata->cleanup(&pdev->dev); 1962a45c6cb8SMadhusudhan Chikkature err_irq_cd_init: 1963a45c6cb8SMadhusudhan Chikkature free_irq(host->irq, host); 1964a45c6cb8SMadhusudhan Chikkature err_irq: 1965c5c98927SRussell King if (host->tx_chan) 1966c5c98927SRussell King dma_release_channel(host->tx_chan); 1967c5c98927SRussell King if (host->rx_chan) 1968c5c98927SRussell King dma_release_channel(host->rx_chan); 1969d59d77edSBalaji T K pm_runtime_put_sync(host->dev); 197037f6190dSTony Lindgren pm_runtime_disable(host->dev); 1971a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 1972cd03d9a8SRajendra Nayak if (host->dbclk) { 197394c18149SRajendra Nayak clk_disable_unprepare(host->dbclk); 1974a45c6cb8SMadhusudhan Chikkature clk_put(host->dbclk); 1975a45c6cb8SMadhusudhan Chikkature } 1976a45c6cb8SMadhusudhan Chikkature err1: 1977a45c6cb8SMadhusudhan Chikkature iounmap(host->base); 1978db0fefc5SAdrian Hunter platform_set_drvdata(pdev, NULL); 1979a45c6cb8SMadhusudhan Chikkature mmc_free_host(mmc); 1980db0fefc5SAdrian Hunter err_alloc: 1981db0fefc5SAdrian Hunter omap_hsmmc_gpio_free(pdata); 1982db0fefc5SAdrian Hunter err: 198348b332f9SRussell King res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 198448b332f9SRussell King if (res) 1985984b203aSChris Ball release_mem_region(res->start, resource_size(res)); 1986a45c6cb8SMadhusudhan Chikkature return ret; 1987a45c6cb8SMadhusudhan Chikkature } 1988a45c6cb8SMadhusudhan Chikkature 1989efa25fd3SFelipe Balbi static int __devexit omap_hsmmc_remove(struct platform_device *pdev) 1990a45c6cb8SMadhusudhan Chikkature { 199170a3341aSDenis Karpov struct omap_hsmmc_host *host = platform_get_drvdata(pdev); 1992a45c6cb8SMadhusudhan Chikkature struct resource *res; 1993a45c6cb8SMadhusudhan Chikkature 1994fa4aa2d4SBalaji T K pm_runtime_get_sync(host->dev); 1995a45c6cb8SMadhusudhan Chikkature mmc_remove_host(host->mmc); 1996db0fefc5SAdrian Hunter if (host->use_reg) 1997db0fefc5SAdrian Hunter omap_hsmmc_reg_put(host); 1998a45c6cb8SMadhusudhan Chikkature if (host->pdata->cleanup) 1999a45c6cb8SMadhusudhan Chikkature host->pdata->cleanup(&pdev->dev); 2000a45c6cb8SMadhusudhan Chikkature free_irq(host->irq, host); 2001a45c6cb8SMadhusudhan Chikkature if (mmc_slot(host).card_detect_irq) 2002a45c6cb8SMadhusudhan Chikkature free_irq(mmc_slot(host).card_detect_irq, host); 2003a45c6cb8SMadhusudhan Chikkature 2004c5c98927SRussell King if (host->tx_chan) 2005c5c98927SRussell King dma_release_channel(host->tx_chan); 2006c5c98927SRussell King if (host->rx_chan) 2007c5c98927SRussell King dma_release_channel(host->rx_chan); 2008c5c98927SRussell King 2009fa4aa2d4SBalaji T K pm_runtime_put_sync(host->dev); 2010fa4aa2d4SBalaji T K pm_runtime_disable(host->dev); 2011a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 2012cd03d9a8SRajendra Nayak if (host->dbclk) { 201394c18149SRajendra Nayak clk_disable_unprepare(host->dbclk); 2014a45c6cb8SMadhusudhan Chikkature clk_put(host->dbclk); 2015a45c6cb8SMadhusudhan Chikkature } 2016a45c6cb8SMadhusudhan Chikkature 20179ea28ecbSBalaji T K omap_hsmmc_gpio_free(host->pdata); 2018a45c6cb8SMadhusudhan Chikkature iounmap(host->base); 20199d1f0286SBalaji T K mmc_free_host(host->mmc); 2020a45c6cb8SMadhusudhan Chikkature 2021a45c6cb8SMadhusudhan Chikkature res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2022a45c6cb8SMadhusudhan Chikkature if (res) 2023984b203aSChris Ball release_mem_region(res->start, resource_size(res)); 2024a45c6cb8SMadhusudhan Chikkature platform_set_drvdata(pdev, NULL); 2025a45c6cb8SMadhusudhan Chikkature 2026a45c6cb8SMadhusudhan Chikkature return 0; 2027a45c6cb8SMadhusudhan Chikkature } 2028a45c6cb8SMadhusudhan Chikkature 2029a45c6cb8SMadhusudhan Chikkature #ifdef CONFIG_PM 2030a791daa1SKevin Hilman static int omap_hsmmc_suspend(struct device *dev) 2031a45c6cb8SMadhusudhan Chikkature { 2032a45c6cb8SMadhusudhan Chikkature int ret = 0; 2033927ce944SFelipe Balbi struct omap_hsmmc_host *host = dev_get_drvdata(dev); 2034927ce944SFelipe Balbi 2035927ce944SFelipe Balbi if (!host) 2036927ce944SFelipe Balbi return 0; 2037a45c6cb8SMadhusudhan Chikkature 2038a45c6cb8SMadhusudhan Chikkature if (host && host->suspended) 2039a45c6cb8SMadhusudhan Chikkature return 0; 2040a45c6cb8SMadhusudhan Chikkature 2041fa4aa2d4SBalaji T K pm_runtime_get_sync(host->dev); 2042a45c6cb8SMadhusudhan Chikkature host->suspended = 1; 2043a45c6cb8SMadhusudhan Chikkature if (host->pdata->suspend) { 2044927ce944SFelipe Balbi ret = host->pdata->suspend(dev, host->slot_id); 2045a6b2240dSAdrian Hunter if (ret) { 2046927ce944SFelipe Balbi dev_dbg(dev, "Unable to handle MMC board" 2047a45c6cb8SMadhusudhan Chikkature " level suspend\n"); 2048a6b2240dSAdrian Hunter host->suspended = 0; 2049a6b2240dSAdrian Hunter return ret; 2050a45c6cb8SMadhusudhan Chikkature } 2051a6b2240dSAdrian Hunter } 20521a13f8faSMatt Fleming ret = mmc_suspend_host(host->mmc); 2053fa4aa2d4SBalaji T K 205431f9d463SEliad Peller if (ret) { 2055a6b2240dSAdrian Hunter host->suspended = 0; 2056a6b2240dSAdrian Hunter if (host->pdata->resume) { 2057c4c8eeb4SVaibhav Bedia if (host->pdata->resume(dev, host->slot_id)) 2058927ce944SFelipe Balbi dev_dbg(dev, "Unmask interrupt failed\n"); 2059a6b2240dSAdrian Hunter } 206031f9d463SEliad Peller goto err; 2061a6b2240dSAdrian Hunter } 206231f9d463SEliad Peller 206331f9d463SEliad Peller if (!(host->mmc->pm_flags & MMC_PM_KEEP_POWER)) { 206431f9d463SEliad Peller omap_hsmmc_disable_irq(host); 206531f9d463SEliad Peller OMAP_HSMMC_WRITE(host->base, HCTL, 206631f9d463SEliad Peller OMAP_HSMMC_READ(host->base, HCTL) & ~SDBP); 206731f9d463SEliad Peller } 2068927ce944SFelipe Balbi 2069cd03d9a8SRajendra Nayak if (host->dbclk) 207094c18149SRajendra Nayak clk_disable_unprepare(host->dbclk); 207131f9d463SEliad Peller err: 2072fa4aa2d4SBalaji T K pm_runtime_put_sync(host->dev); 2073a45c6cb8SMadhusudhan Chikkature return ret; 2074a45c6cb8SMadhusudhan Chikkature } 2075a45c6cb8SMadhusudhan Chikkature 2076a45c6cb8SMadhusudhan Chikkature /* Routine to resume the MMC device */ 2077a791daa1SKevin Hilman static int omap_hsmmc_resume(struct device *dev) 2078a45c6cb8SMadhusudhan Chikkature { 2079a45c6cb8SMadhusudhan Chikkature int ret = 0; 2080927ce944SFelipe Balbi struct omap_hsmmc_host *host = dev_get_drvdata(dev); 2081927ce944SFelipe Balbi 2082927ce944SFelipe Balbi if (!host) 2083927ce944SFelipe Balbi return 0; 2084a45c6cb8SMadhusudhan Chikkature 2085a45c6cb8SMadhusudhan Chikkature if (host && !host->suspended) 2086a45c6cb8SMadhusudhan Chikkature return 0; 2087a45c6cb8SMadhusudhan Chikkature 2088fa4aa2d4SBalaji T K pm_runtime_get_sync(host->dev); 208911dd62a7SDenis Karpov 2090cd03d9a8SRajendra Nayak if (host->dbclk) 209194c18149SRajendra Nayak clk_prepare_enable(host->dbclk); 20922bec0893SAdrian Hunter 209331f9d463SEliad Peller if (!(host->mmc->pm_flags & MMC_PM_KEEP_POWER)) 209470a3341aSDenis Karpov omap_hsmmc_conf_bus_power(host); 20951b331e69SKim Kyuwon 2096a45c6cb8SMadhusudhan Chikkature if (host->pdata->resume) { 2097927ce944SFelipe Balbi ret = host->pdata->resume(dev, host->slot_id); 2098a45c6cb8SMadhusudhan Chikkature if (ret) 2099927ce944SFelipe Balbi dev_dbg(dev, "Unmask interrupt failed\n"); 2100a45c6cb8SMadhusudhan Chikkature } 2101a45c6cb8SMadhusudhan Chikkature 2102b62f6228SAdrian Hunter omap_hsmmc_protect_card(host); 2103b62f6228SAdrian Hunter 2104a45c6cb8SMadhusudhan Chikkature /* Notify the core to resume the host */ 2105a45c6cb8SMadhusudhan Chikkature ret = mmc_resume_host(host->mmc); 2106a45c6cb8SMadhusudhan Chikkature if (ret == 0) 2107a45c6cb8SMadhusudhan Chikkature host->suspended = 0; 2108fa4aa2d4SBalaji T K 2109fa4aa2d4SBalaji T K pm_runtime_mark_last_busy(host->dev); 2110fa4aa2d4SBalaji T K pm_runtime_put_autosuspend(host->dev); 2111a45c6cb8SMadhusudhan Chikkature 2112a45c6cb8SMadhusudhan Chikkature return ret; 2113a45c6cb8SMadhusudhan Chikkature 2114a45c6cb8SMadhusudhan Chikkature } 2115a45c6cb8SMadhusudhan Chikkature 2116a45c6cb8SMadhusudhan Chikkature #else 211770a3341aSDenis Karpov #define omap_hsmmc_suspend NULL 211870a3341aSDenis Karpov #define omap_hsmmc_resume NULL 2119a45c6cb8SMadhusudhan Chikkature #endif 2120a45c6cb8SMadhusudhan Chikkature 2121fa4aa2d4SBalaji T K static int omap_hsmmc_runtime_suspend(struct device *dev) 2122fa4aa2d4SBalaji T K { 2123fa4aa2d4SBalaji T K struct omap_hsmmc_host *host; 2124fa4aa2d4SBalaji T K 2125fa4aa2d4SBalaji T K host = platform_get_drvdata(to_platform_device(dev)); 2126fa4aa2d4SBalaji T K omap_hsmmc_context_save(host); 2127927ce944SFelipe Balbi dev_dbg(dev, "disabled\n"); 2128fa4aa2d4SBalaji T K 2129fa4aa2d4SBalaji T K return 0; 2130fa4aa2d4SBalaji T K } 2131fa4aa2d4SBalaji T K 2132fa4aa2d4SBalaji T K static int omap_hsmmc_runtime_resume(struct device *dev) 2133fa4aa2d4SBalaji T K { 2134fa4aa2d4SBalaji T K struct omap_hsmmc_host *host; 2135fa4aa2d4SBalaji T K 2136fa4aa2d4SBalaji T K host = platform_get_drvdata(to_platform_device(dev)); 2137fa4aa2d4SBalaji T K omap_hsmmc_context_restore(host); 2138927ce944SFelipe Balbi dev_dbg(dev, "enabled\n"); 2139fa4aa2d4SBalaji T K 2140fa4aa2d4SBalaji T K return 0; 2141fa4aa2d4SBalaji T K } 2142fa4aa2d4SBalaji T K 2143a791daa1SKevin Hilman static struct dev_pm_ops omap_hsmmc_dev_pm_ops = { 214470a3341aSDenis Karpov .suspend = omap_hsmmc_suspend, 214570a3341aSDenis Karpov .resume = omap_hsmmc_resume, 2146fa4aa2d4SBalaji T K .runtime_suspend = omap_hsmmc_runtime_suspend, 2147fa4aa2d4SBalaji T K .runtime_resume = omap_hsmmc_runtime_resume, 2148a791daa1SKevin Hilman }; 2149a791daa1SKevin Hilman 2150a791daa1SKevin Hilman static struct platform_driver omap_hsmmc_driver = { 2151efa25fd3SFelipe Balbi .probe = omap_hsmmc_probe, 21520433c143SBill Pemberton .remove = omap_hsmmc_remove, 2153a45c6cb8SMadhusudhan Chikkature .driver = { 2154a45c6cb8SMadhusudhan Chikkature .name = DRIVER_NAME, 2155a45c6cb8SMadhusudhan Chikkature .owner = THIS_MODULE, 2156a791daa1SKevin Hilman .pm = &omap_hsmmc_dev_pm_ops, 215746856a68SRajendra Nayak .of_match_table = of_match_ptr(omap_mmc_of_match), 2158a45c6cb8SMadhusudhan Chikkature }, 2159a45c6cb8SMadhusudhan Chikkature }; 2160a45c6cb8SMadhusudhan Chikkature 2161b796450bSFelipe Balbi module_platform_driver(omap_hsmmc_driver); 2162a45c6cb8SMadhusudhan Chikkature MODULE_DESCRIPTION("OMAP High Speed Multimedia Card driver"); 2163a45c6cb8SMadhusudhan Chikkature MODULE_LICENSE("GPL"); 2164a45c6cb8SMadhusudhan Chikkature MODULE_ALIAS("platform:" DRIVER_NAME); 2165a45c6cb8SMadhusudhan Chikkature MODULE_AUTHOR("Texas Instruments Inc"); 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