1a45c6cb8SMadhusudhan Chikkature /* 2a45c6cb8SMadhusudhan Chikkature * drivers/mmc/host/omap_hsmmc.c 3a45c6cb8SMadhusudhan Chikkature * 4a45c6cb8SMadhusudhan Chikkature * Driver for OMAP2430/3430 MMC controller. 5a45c6cb8SMadhusudhan Chikkature * 6a45c6cb8SMadhusudhan Chikkature * Copyright (C) 2007 Texas Instruments. 7a45c6cb8SMadhusudhan Chikkature * 8a45c6cb8SMadhusudhan Chikkature * Authors: 9a45c6cb8SMadhusudhan Chikkature * Syed Mohammed Khasim <x0khasim@ti.com> 10a45c6cb8SMadhusudhan Chikkature * Madhusudhan <madhu.cr@ti.com> 11a45c6cb8SMadhusudhan Chikkature * Mohit Jalori <mjalori@ti.com> 12a45c6cb8SMadhusudhan Chikkature * 13a45c6cb8SMadhusudhan Chikkature * This file is licensed under the terms of the GNU General Public License 14a45c6cb8SMadhusudhan Chikkature * version 2. This program is licensed "as is" without any warranty of any 15a45c6cb8SMadhusudhan Chikkature * kind, whether express or implied. 16a45c6cb8SMadhusudhan Chikkature */ 17a45c6cb8SMadhusudhan Chikkature 18a45c6cb8SMadhusudhan Chikkature #include <linux/module.h> 19a45c6cb8SMadhusudhan Chikkature #include <linux/init.h> 20d900f712SDenis Karpov #include <linux/debugfs.h> 21d900f712SDenis Karpov #include <linux/seq_file.h> 22a45c6cb8SMadhusudhan Chikkature #include <linux/interrupt.h> 23a45c6cb8SMadhusudhan Chikkature #include <linux/delay.h> 24a45c6cb8SMadhusudhan Chikkature #include <linux/dma-mapping.h> 25a45c6cb8SMadhusudhan Chikkature #include <linux/platform_device.h> 26a45c6cb8SMadhusudhan Chikkature #include <linux/workqueue.h> 27a45c6cb8SMadhusudhan Chikkature #include <linux/timer.h> 28a45c6cb8SMadhusudhan Chikkature #include <linux/clk.h> 29a45c6cb8SMadhusudhan Chikkature #include <linux/mmc/host.h> 3013189e78SJarkko Lavinen #include <linux/mmc/core.h> 31a45c6cb8SMadhusudhan Chikkature #include <linux/io.h> 32a45c6cb8SMadhusudhan Chikkature #include <linux/semaphore.h> 33db0fefc5SAdrian Hunter #include <linux/gpio.h> 34db0fefc5SAdrian Hunter #include <linux/regulator/consumer.h> 35ce491cf8STony Lindgren #include <plat/dma.h> 36a45c6cb8SMadhusudhan Chikkature #include <mach/hardware.h> 37ce491cf8STony Lindgren #include <plat/board.h> 38ce491cf8STony Lindgren #include <plat/mmc.h> 39ce491cf8STony Lindgren #include <plat/cpu.h> 40a45c6cb8SMadhusudhan Chikkature 41a45c6cb8SMadhusudhan Chikkature /* OMAP HSMMC Host Controller Registers */ 42a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_SYSCONFIG 0x0010 4311dd62a7SDenis Karpov #define OMAP_HSMMC_SYSSTATUS 0x0014 44a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_CON 0x002C 45a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_BLK 0x0104 46a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_ARG 0x0108 47a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_CMD 0x010C 48a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP10 0x0110 49a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP32 0x0114 50a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP54 0x0118 51a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP76 0x011C 52a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_DATA 0x0120 53a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_HCTL 0x0128 54a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_SYSCTL 0x012C 55a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_STAT 0x0130 56a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_IE 0x0134 57a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_ISE 0x0138 58a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_CAPA 0x0140 59a45c6cb8SMadhusudhan Chikkature 60a45c6cb8SMadhusudhan Chikkature #define VS18 (1 << 26) 61a45c6cb8SMadhusudhan Chikkature #define VS30 (1 << 25) 62a45c6cb8SMadhusudhan Chikkature #define SDVS18 (0x5 << 9) 63a45c6cb8SMadhusudhan Chikkature #define SDVS30 (0x6 << 9) 64eb250826SDavid Brownell #define SDVS33 (0x7 << 9) 651b331e69SKim Kyuwon #define SDVS_MASK 0x00000E00 66a45c6cb8SMadhusudhan Chikkature #define SDVSCLR 0xFFFFF1FF 67a45c6cb8SMadhusudhan Chikkature #define SDVSDET 0x00000400 68a45c6cb8SMadhusudhan Chikkature #define AUTOIDLE 0x1 69a45c6cb8SMadhusudhan Chikkature #define SDBP (1 << 8) 70a45c6cb8SMadhusudhan Chikkature #define DTO 0xe 71a45c6cb8SMadhusudhan Chikkature #define ICE 0x1 72a45c6cb8SMadhusudhan Chikkature #define ICS 0x2 73a45c6cb8SMadhusudhan Chikkature #define CEN (1 << 2) 74a45c6cb8SMadhusudhan Chikkature #define CLKD_MASK 0x0000FFC0 75a45c6cb8SMadhusudhan Chikkature #define CLKD_SHIFT 6 76a45c6cb8SMadhusudhan Chikkature #define DTO_MASK 0x000F0000 77a45c6cb8SMadhusudhan Chikkature #define DTO_SHIFT 16 78a45c6cb8SMadhusudhan Chikkature #define INT_EN_MASK 0x307F0033 79ccdfe3a6SAnand Gadiyar #define BWR_ENABLE (1 << 4) 80ccdfe3a6SAnand Gadiyar #define BRR_ENABLE (1 << 5) 81a45c6cb8SMadhusudhan Chikkature #define INIT_STREAM (1 << 1) 82a45c6cb8SMadhusudhan Chikkature #define DP_SELECT (1 << 21) 83a45c6cb8SMadhusudhan Chikkature #define DDIR (1 << 4) 84a45c6cb8SMadhusudhan Chikkature #define DMA_EN 0x1 85a45c6cb8SMadhusudhan Chikkature #define MSBS (1 << 5) 86a45c6cb8SMadhusudhan Chikkature #define BCE (1 << 1) 87a45c6cb8SMadhusudhan Chikkature #define FOUR_BIT (1 << 1) 8873153010SJarkko Lavinen #define DW8 (1 << 5) 89a45c6cb8SMadhusudhan Chikkature #define CC 0x1 90a45c6cb8SMadhusudhan Chikkature #define TC 0x02 91a45c6cb8SMadhusudhan Chikkature #define OD 0x1 92a45c6cb8SMadhusudhan Chikkature #define ERR (1 << 15) 93a45c6cb8SMadhusudhan Chikkature #define CMD_TIMEOUT (1 << 16) 94a45c6cb8SMadhusudhan Chikkature #define DATA_TIMEOUT (1 << 20) 95a45c6cb8SMadhusudhan Chikkature #define CMD_CRC (1 << 17) 96a45c6cb8SMadhusudhan Chikkature #define DATA_CRC (1 << 21) 97a45c6cb8SMadhusudhan Chikkature #define CARD_ERR (1 << 28) 98a45c6cb8SMadhusudhan Chikkature #define STAT_CLEAR 0xFFFFFFFF 99a45c6cb8SMadhusudhan Chikkature #define INIT_STREAM_CMD 0x00000000 100a45c6cb8SMadhusudhan Chikkature #define DUAL_VOLT_OCR_BIT 7 101a45c6cb8SMadhusudhan Chikkature #define SRC (1 << 25) 102a45c6cb8SMadhusudhan Chikkature #define SRD (1 << 26) 10311dd62a7SDenis Karpov #define SOFTRESET (1 << 1) 10411dd62a7SDenis Karpov #define RESETDONE (1 << 0) 105a45c6cb8SMadhusudhan Chikkature 106a45c6cb8SMadhusudhan Chikkature /* 107a45c6cb8SMadhusudhan Chikkature * FIXME: Most likely all the data using these _DEVID defines should come 108a45c6cb8SMadhusudhan Chikkature * from the platform_data, or implemented in controller and slot specific 109a45c6cb8SMadhusudhan Chikkature * functions. 110a45c6cb8SMadhusudhan Chikkature */ 111a45c6cb8SMadhusudhan Chikkature #define OMAP_MMC1_DEVID 0 112a45c6cb8SMadhusudhan Chikkature #define OMAP_MMC2_DEVID 1 113f3e2f1ddSGrazvydas Ignotas #define OMAP_MMC3_DEVID 2 11482cf818dSkishore kadiyala #define OMAP_MMC4_DEVID 3 11582cf818dSkishore kadiyala #define OMAP_MMC5_DEVID 4 116a45c6cb8SMadhusudhan Chikkature 117a45c6cb8SMadhusudhan Chikkature #define MMC_TIMEOUT_MS 20 118a45c6cb8SMadhusudhan Chikkature #define OMAP_MMC_MASTER_CLOCK 96000000 119a45c6cb8SMadhusudhan Chikkature #define DRIVER_NAME "mmci-omap-hs" 120a45c6cb8SMadhusudhan Chikkature 121dd498effSDenis Karpov /* Timeouts for entering power saving states on inactivity, msec */ 122dd498effSDenis Karpov #define OMAP_MMC_DISABLED_TIMEOUT 100 12313189e78SJarkko Lavinen #define OMAP_MMC_SLEEP_TIMEOUT 1000 12413189e78SJarkko Lavinen #define OMAP_MMC_OFF_TIMEOUT 8000 125dd498effSDenis Karpov 126a45c6cb8SMadhusudhan Chikkature /* 127a45c6cb8SMadhusudhan Chikkature * One controller can have multiple slots, like on some omap boards using 128a45c6cb8SMadhusudhan Chikkature * omap.c controller driver. Luckily this is not currently done on any known 129a45c6cb8SMadhusudhan Chikkature * omap_hsmmc.c device. 130a45c6cb8SMadhusudhan Chikkature */ 131a45c6cb8SMadhusudhan Chikkature #define mmc_slot(host) (host->pdata->slots[host->slot_id]) 132a45c6cb8SMadhusudhan Chikkature 133a45c6cb8SMadhusudhan Chikkature /* 134a45c6cb8SMadhusudhan Chikkature * MMC Host controller read/write API's 135a45c6cb8SMadhusudhan Chikkature */ 136a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_READ(base, reg) \ 137a45c6cb8SMadhusudhan Chikkature __raw_readl((base) + OMAP_HSMMC_##reg) 138a45c6cb8SMadhusudhan Chikkature 139a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_WRITE(base, reg, val) \ 140a45c6cb8SMadhusudhan Chikkature __raw_writel((val), (base) + OMAP_HSMMC_##reg) 141a45c6cb8SMadhusudhan Chikkature 14270a3341aSDenis Karpov struct omap_hsmmc_host { 143a45c6cb8SMadhusudhan Chikkature struct device *dev; 144a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc; 145a45c6cb8SMadhusudhan Chikkature struct mmc_request *mrq; 146a45c6cb8SMadhusudhan Chikkature struct mmc_command *cmd; 147a45c6cb8SMadhusudhan Chikkature struct mmc_data *data; 148a45c6cb8SMadhusudhan Chikkature struct clk *fclk; 149a45c6cb8SMadhusudhan Chikkature struct clk *iclk; 150a45c6cb8SMadhusudhan Chikkature struct clk *dbclk; 151db0fefc5SAdrian Hunter /* 152db0fefc5SAdrian Hunter * vcc == configured supply 153db0fefc5SAdrian Hunter * vcc_aux == optional 154db0fefc5SAdrian Hunter * - MMC1, supply for DAT4..DAT7 155db0fefc5SAdrian Hunter * - MMC2/MMC2, external level shifter voltage supply, for 156db0fefc5SAdrian Hunter * chip (SDIO, eMMC, etc) or transceiver (MMC2 only) 157db0fefc5SAdrian Hunter */ 158db0fefc5SAdrian Hunter struct regulator *vcc; 159db0fefc5SAdrian Hunter struct regulator *vcc_aux; 160a45c6cb8SMadhusudhan Chikkature struct work_struct mmc_carddetect_work; 161a45c6cb8SMadhusudhan Chikkature void __iomem *base; 162a45c6cb8SMadhusudhan Chikkature resource_size_t mapbase; 1634dffd7a2SAdrian Hunter spinlock_t irq_lock; /* Prevent races with irq handler */ 164a45c6cb8SMadhusudhan Chikkature unsigned int id; 165a45c6cb8SMadhusudhan Chikkature unsigned int dma_len; 1660ccd76d4SJuha Yrjola unsigned int dma_sg_idx; 167a45c6cb8SMadhusudhan Chikkature unsigned char bus_mode; 168a3621465SAdrian Hunter unsigned char power_mode; 169a45c6cb8SMadhusudhan Chikkature u32 *buffer; 170a45c6cb8SMadhusudhan Chikkature u32 bytesleft; 171a45c6cb8SMadhusudhan Chikkature int suspended; 172a45c6cb8SMadhusudhan Chikkature int irq; 173a45c6cb8SMadhusudhan Chikkature int use_dma, dma_ch; 174f3e2f1ddSGrazvydas Ignotas int dma_line_tx, dma_line_rx; 175a45c6cb8SMadhusudhan Chikkature int slot_id; 1762bec0893SAdrian Hunter int got_dbclk; 1774a694dc9SAdrian Hunter int response_busy; 17811dd62a7SDenis Karpov int context_loss; 179dd498effSDenis Karpov int dpm_state; 180623821f7SAdrian Hunter int vdd; 181b62f6228SAdrian Hunter int protect_card; 182b62f6228SAdrian Hunter int reqs_blocked; 183db0fefc5SAdrian Hunter int use_reg; 184b417577dSAdrian Hunter int req_in_progress; 18511dd62a7SDenis Karpov 186a45c6cb8SMadhusudhan Chikkature struct omap_mmc_platform_data *pdata; 187a45c6cb8SMadhusudhan Chikkature }; 188a45c6cb8SMadhusudhan Chikkature 189db0fefc5SAdrian Hunter static int omap_hsmmc_card_detect(struct device *dev, int slot) 190db0fefc5SAdrian Hunter { 191db0fefc5SAdrian Hunter struct omap_mmc_platform_data *mmc = dev->platform_data; 192db0fefc5SAdrian Hunter 193db0fefc5SAdrian Hunter /* NOTE: assumes card detect signal is active-low */ 194db0fefc5SAdrian Hunter return !gpio_get_value_cansleep(mmc->slots[0].switch_pin); 195db0fefc5SAdrian Hunter } 196db0fefc5SAdrian Hunter 197db0fefc5SAdrian Hunter static int omap_hsmmc_get_wp(struct device *dev, int slot) 198db0fefc5SAdrian Hunter { 199db0fefc5SAdrian Hunter struct omap_mmc_platform_data *mmc = dev->platform_data; 200db0fefc5SAdrian Hunter 201db0fefc5SAdrian Hunter /* NOTE: assumes write protect signal is active-high */ 202db0fefc5SAdrian Hunter return gpio_get_value_cansleep(mmc->slots[0].gpio_wp); 203db0fefc5SAdrian Hunter } 204db0fefc5SAdrian Hunter 205db0fefc5SAdrian Hunter static int omap_hsmmc_get_cover_state(struct device *dev, int slot) 206db0fefc5SAdrian Hunter { 207db0fefc5SAdrian Hunter struct omap_mmc_platform_data *mmc = dev->platform_data; 208db0fefc5SAdrian Hunter 209db0fefc5SAdrian Hunter /* NOTE: assumes card detect signal is active-low */ 210db0fefc5SAdrian Hunter return !gpio_get_value_cansleep(mmc->slots[0].switch_pin); 211db0fefc5SAdrian Hunter } 212db0fefc5SAdrian Hunter 213db0fefc5SAdrian Hunter #ifdef CONFIG_PM 214db0fefc5SAdrian Hunter 215db0fefc5SAdrian Hunter static int omap_hsmmc_suspend_cdirq(struct device *dev, int slot) 216db0fefc5SAdrian Hunter { 217db0fefc5SAdrian Hunter struct omap_mmc_platform_data *mmc = dev->platform_data; 218db0fefc5SAdrian Hunter 219db0fefc5SAdrian Hunter disable_irq(mmc->slots[0].card_detect_irq); 220db0fefc5SAdrian Hunter return 0; 221db0fefc5SAdrian Hunter } 222db0fefc5SAdrian Hunter 223db0fefc5SAdrian Hunter static int omap_hsmmc_resume_cdirq(struct device *dev, int slot) 224db0fefc5SAdrian Hunter { 225db0fefc5SAdrian Hunter struct omap_mmc_platform_data *mmc = dev->platform_data; 226db0fefc5SAdrian Hunter 227db0fefc5SAdrian Hunter enable_irq(mmc->slots[0].card_detect_irq); 228db0fefc5SAdrian Hunter return 0; 229db0fefc5SAdrian Hunter } 230db0fefc5SAdrian Hunter 231db0fefc5SAdrian Hunter #else 232db0fefc5SAdrian Hunter 233db0fefc5SAdrian Hunter #define omap_hsmmc_suspend_cdirq NULL 234db0fefc5SAdrian Hunter #define omap_hsmmc_resume_cdirq NULL 235db0fefc5SAdrian Hunter 236db0fefc5SAdrian Hunter #endif 237db0fefc5SAdrian Hunter 238b702b106SAdrian Hunter #ifdef CONFIG_REGULATOR 239b702b106SAdrian Hunter 240db0fefc5SAdrian Hunter static int omap_hsmmc_1_set_power(struct device *dev, int slot, int power_on, 241db0fefc5SAdrian Hunter int vdd) 242db0fefc5SAdrian Hunter { 243db0fefc5SAdrian Hunter struct omap_hsmmc_host *host = 244db0fefc5SAdrian Hunter platform_get_drvdata(to_platform_device(dev)); 245db0fefc5SAdrian Hunter int ret; 246db0fefc5SAdrian Hunter 247db0fefc5SAdrian Hunter if (mmc_slot(host).before_set_reg) 248db0fefc5SAdrian Hunter mmc_slot(host).before_set_reg(dev, slot, power_on, vdd); 249db0fefc5SAdrian Hunter 250db0fefc5SAdrian Hunter if (power_on) 251db0fefc5SAdrian Hunter ret = mmc_regulator_set_ocr(host->vcc, vdd); 252db0fefc5SAdrian Hunter else 253db0fefc5SAdrian Hunter ret = mmc_regulator_set_ocr(host->vcc, 0); 254db0fefc5SAdrian Hunter 255db0fefc5SAdrian Hunter if (mmc_slot(host).after_set_reg) 256db0fefc5SAdrian Hunter mmc_slot(host).after_set_reg(dev, slot, power_on, vdd); 257db0fefc5SAdrian Hunter 258db0fefc5SAdrian Hunter return ret; 259db0fefc5SAdrian Hunter } 260db0fefc5SAdrian Hunter 261db0fefc5SAdrian Hunter static int omap_hsmmc_23_set_power(struct device *dev, int slot, int power_on, 262db0fefc5SAdrian Hunter int vdd) 263db0fefc5SAdrian Hunter { 264db0fefc5SAdrian Hunter struct omap_hsmmc_host *host = 265db0fefc5SAdrian Hunter platform_get_drvdata(to_platform_device(dev)); 266db0fefc5SAdrian Hunter int ret = 0; 267db0fefc5SAdrian Hunter 268db0fefc5SAdrian Hunter /* 269db0fefc5SAdrian Hunter * If we don't see a Vcc regulator, assume it's a fixed 270db0fefc5SAdrian Hunter * voltage always-on regulator. 271db0fefc5SAdrian Hunter */ 272db0fefc5SAdrian Hunter if (!host->vcc) 273db0fefc5SAdrian Hunter return 0; 274db0fefc5SAdrian Hunter 275db0fefc5SAdrian Hunter if (mmc_slot(host).before_set_reg) 276db0fefc5SAdrian Hunter mmc_slot(host).before_set_reg(dev, slot, power_on, vdd); 277db0fefc5SAdrian Hunter 278db0fefc5SAdrian Hunter /* 279db0fefc5SAdrian Hunter * Assume Vcc regulator is used only to power the card ... OMAP 280db0fefc5SAdrian Hunter * VDDS is used to power the pins, optionally with a transceiver to 281db0fefc5SAdrian Hunter * support cards using voltages other than VDDS (1.8V nominal). When a 282db0fefc5SAdrian Hunter * transceiver is used, DAT3..7 are muxed as transceiver control pins. 283db0fefc5SAdrian Hunter * 284db0fefc5SAdrian Hunter * In some cases this regulator won't support enable/disable; 285db0fefc5SAdrian Hunter * e.g. it's a fixed rail for a WLAN chip. 286db0fefc5SAdrian Hunter * 287db0fefc5SAdrian Hunter * In other cases vcc_aux switches interface power. Example, for 288db0fefc5SAdrian Hunter * eMMC cards it represents VccQ. Sometimes transceivers or SDIO 289db0fefc5SAdrian Hunter * chips/cards need an interface voltage rail too. 290db0fefc5SAdrian Hunter */ 291db0fefc5SAdrian Hunter if (power_on) { 292db0fefc5SAdrian Hunter ret = mmc_regulator_set_ocr(host->vcc, vdd); 293db0fefc5SAdrian Hunter /* Enable interface voltage rail, if needed */ 294db0fefc5SAdrian Hunter if (ret == 0 && host->vcc_aux) { 295db0fefc5SAdrian Hunter ret = regulator_enable(host->vcc_aux); 296db0fefc5SAdrian Hunter if (ret < 0) 297db0fefc5SAdrian Hunter ret = mmc_regulator_set_ocr(host->vcc, 0); 298db0fefc5SAdrian Hunter } 299db0fefc5SAdrian Hunter } else { 3006da20c89SAdrian Hunter if (host->vcc_aux) 301db0fefc5SAdrian Hunter ret = regulator_disable(host->vcc_aux); 302db0fefc5SAdrian Hunter if (ret == 0) 303db0fefc5SAdrian Hunter ret = mmc_regulator_set_ocr(host->vcc, 0); 304db0fefc5SAdrian Hunter } 305db0fefc5SAdrian Hunter 306db0fefc5SAdrian Hunter if (mmc_slot(host).after_set_reg) 307db0fefc5SAdrian Hunter mmc_slot(host).after_set_reg(dev, slot, power_on, vdd); 308db0fefc5SAdrian Hunter 309db0fefc5SAdrian Hunter return ret; 310db0fefc5SAdrian Hunter } 311db0fefc5SAdrian Hunter 312db0fefc5SAdrian Hunter static int omap_hsmmc_1_set_sleep(struct device *dev, int slot, int sleep, 313db0fefc5SAdrian Hunter int vdd, int cardsleep) 314db0fefc5SAdrian Hunter { 315db0fefc5SAdrian Hunter struct omap_hsmmc_host *host = 316db0fefc5SAdrian Hunter platform_get_drvdata(to_platform_device(dev)); 317db0fefc5SAdrian Hunter int mode = sleep ? REGULATOR_MODE_STANDBY : REGULATOR_MODE_NORMAL; 318db0fefc5SAdrian Hunter 319db0fefc5SAdrian Hunter return regulator_set_mode(host->vcc, mode); 320db0fefc5SAdrian Hunter } 321db0fefc5SAdrian Hunter 322db0fefc5SAdrian Hunter static int omap_hsmmc_23_set_sleep(struct device *dev, int slot, int sleep, 323db0fefc5SAdrian Hunter int vdd, int cardsleep) 324db0fefc5SAdrian Hunter { 325db0fefc5SAdrian Hunter struct omap_hsmmc_host *host = 326db0fefc5SAdrian Hunter platform_get_drvdata(to_platform_device(dev)); 327db0fefc5SAdrian Hunter int err, mode; 328db0fefc5SAdrian Hunter 329db0fefc5SAdrian Hunter /* 330db0fefc5SAdrian Hunter * If we don't see a Vcc regulator, assume it's a fixed 331db0fefc5SAdrian Hunter * voltage always-on regulator. 332db0fefc5SAdrian Hunter */ 333db0fefc5SAdrian Hunter if (!host->vcc) 334db0fefc5SAdrian Hunter return 0; 335db0fefc5SAdrian Hunter 336db0fefc5SAdrian Hunter mode = sleep ? REGULATOR_MODE_STANDBY : REGULATOR_MODE_NORMAL; 337db0fefc5SAdrian Hunter 338db0fefc5SAdrian Hunter if (!host->vcc_aux) 339db0fefc5SAdrian Hunter return regulator_set_mode(host->vcc, mode); 340db0fefc5SAdrian Hunter 341db0fefc5SAdrian Hunter if (cardsleep) { 342db0fefc5SAdrian Hunter /* VCC can be turned off if card is asleep */ 343db0fefc5SAdrian Hunter if (sleep) 344db0fefc5SAdrian Hunter err = mmc_regulator_set_ocr(host->vcc, 0); 345db0fefc5SAdrian Hunter else 346db0fefc5SAdrian Hunter err = mmc_regulator_set_ocr(host->vcc, vdd); 347db0fefc5SAdrian Hunter } else 348db0fefc5SAdrian Hunter err = regulator_set_mode(host->vcc, mode); 349db0fefc5SAdrian Hunter if (err) 350db0fefc5SAdrian Hunter return err; 351e0eb2424SAdrian Hunter 352e0eb2424SAdrian Hunter if (!mmc_slot(host).vcc_aux_disable_is_sleep) 353db0fefc5SAdrian Hunter return regulator_set_mode(host->vcc_aux, mode); 354e0eb2424SAdrian Hunter 355e0eb2424SAdrian Hunter if (sleep) 356e0eb2424SAdrian Hunter return regulator_disable(host->vcc_aux); 357e0eb2424SAdrian Hunter else 358e0eb2424SAdrian Hunter return regulator_enable(host->vcc_aux); 359db0fefc5SAdrian Hunter } 360db0fefc5SAdrian Hunter 361db0fefc5SAdrian Hunter static int omap_hsmmc_reg_get(struct omap_hsmmc_host *host) 362db0fefc5SAdrian Hunter { 363db0fefc5SAdrian Hunter struct regulator *reg; 364db0fefc5SAdrian Hunter int ret = 0; 365db0fefc5SAdrian Hunter 366db0fefc5SAdrian Hunter switch (host->id) { 367db0fefc5SAdrian Hunter case OMAP_MMC1_DEVID: 368db0fefc5SAdrian Hunter /* On-chip level shifting via PBIAS0/PBIAS1 */ 369db0fefc5SAdrian Hunter mmc_slot(host).set_power = omap_hsmmc_1_set_power; 370db0fefc5SAdrian Hunter mmc_slot(host).set_sleep = omap_hsmmc_1_set_sleep; 371db0fefc5SAdrian Hunter break; 372db0fefc5SAdrian Hunter case OMAP_MMC2_DEVID: 373db0fefc5SAdrian Hunter case OMAP_MMC3_DEVID: 374db0fefc5SAdrian Hunter /* Off-chip level shifting, or none */ 375db0fefc5SAdrian Hunter mmc_slot(host).set_power = omap_hsmmc_23_set_power; 376db0fefc5SAdrian Hunter mmc_slot(host).set_sleep = omap_hsmmc_23_set_sleep; 377db0fefc5SAdrian Hunter break; 378db0fefc5SAdrian Hunter default: 379db0fefc5SAdrian Hunter pr_err("MMC%d configuration not supported!\n", host->id); 380db0fefc5SAdrian Hunter return -EINVAL; 381db0fefc5SAdrian Hunter } 382db0fefc5SAdrian Hunter 383db0fefc5SAdrian Hunter reg = regulator_get(host->dev, "vmmc"); 384db0fefc5SAdrian Hunter if (IS_ERR(reg)) { 385db0fefc5SAdrian Hunter dev_dbg(host->dev, "vmmc regulator missing\n"); 386db0fefc5SAdrian Hunter /* 387db0fefc5SAdrian Hunter * HACK: until fixed.c regulator is usable, 388db0fefc5SAdrian Hunter * we don't require a main regulator 389db0fefc5SAdrian Hunter * for MMC2 or MMC3 390db0fefc5SAdrian Hunter */ 391db0fefc5SAdrian Hunter if (host->id == OMAP_MMC1_DEVID) { 392db0fefc5SAdrian Hunter ret = PTR_ERR(reg); 393db0fefc5SAdrian Hunter goto err; 394db0fefc5SAdrian Hunter } 395db0fefc5SAdrian Hunter } else { 396db0fefc5SAdrian Hunter host->vcc = reg; 397db0fefc5SAdrian Hunter mmc_slot(host).ocr_mask = mmc_regulator_get_ocrmask(reg); 398db0fefc5SAdrian Hunter 399db0fefc5SAdrian Hunter /* Allow an aux regulator */ 400db0fefc5SAdrian Hunter reg = regulator_get(host->dev, "vmmc_aux"); 401db0fefc5SAdrian Hunter host->vcc_aux = IS_ERR(reg) ? NULL : reg; 402db0fefc5SAdrian Hunter 403db0fefc5SAdrian Hunter /* 404db0fefc5SAdrian Hunter * UGLY HACK: workaround regulator framework bugs. 405db0fefc5SAdrian Hunter * When the bootloader leaves a supply active, it's 406db0fefc5SAdrian Hunter * initialized with zero usecount ... and we can't 407db0fefc5SAdrian Hunter * disable it without first enabling it. Until the 408db0fefc5SAdrian Hunter * framework is fixed, we need a workaround like this 409db0fefc5SAdrian Hunter * (which is safe for MMC, but not in general). 410db0fefc5SAdrian Hunter */ 411db0fefc5SAdrian Hunter if (regulator_is_enabled(host->vcc) > 0) { 412db0fefc5SAdrian Hunter regulator_enable(host->vcc); 413db0fefc5SAdrian Hunter regulator_disable(host->vcc); 414db0fefc5SAdrian Hunter } 415db0fefc5SAdrian Hunter if (host->vcc_aux) { 416db0fefc5SAdrian Hunter if (regulator_is_enabled(reg) > 0) { 417db0fefc5SAdrian Hunter regulator_enable(reg); 418db0fefc5SAdrian Hunter regulator_disable(reg); 419db0fefc5SAdrian Hunter } 420db0fefc5SAdrian Hunter } 421db0fefc5SAdrian Hunter } 422db0fefc5SAdrian Hunter 423db0fefc5SAdrian Hunter return 0; 424db0fefc5SAdrian Hunter 425db0fefc5SAdrian Hunter err: 426db0fefc5SAdrian Hunter mmc_slot(host).set_power = NULL; 427db0fefc5SAdrian Hunter mmc_slot(host).set_sleep = NULL; 428db0fefc5SAdrian Hunter return ret; 429db0fefc5SAdrian Hunter } 430db0fefc5SAdrian Hunter 431db0fefc5SAdrian Hunter static void omap_hsmmc_reg_put(struct omap_hsmmc_host *host) 432db0fefc5SAdrian Hunter { 433db0fefc5SAdrian Hunter regulator_put(host->vcc); 434db0fefc5SAdrian Hunter regulator_put(host->vcc_aux); 435db0fefc5SAdrian Hunter mmc_slot(host).set_power = NULL; 436db0fefc5SAdrian Hunter mmc_slot(host).set_sleep = NULL; 437db0fefc5SAdrian Hunter } 438db0fefc5SAdrian Hunter 439b702b106SAdrian Hunter static inline int omap_hsmmc_have_reg(void) 440b702b106SAdrian Hunter { 441b702b106SAdrian Hunter return 1; 442b702b106SAdrian Hunter } 443b702b106SAdrian Hunter 444b702b106SAdrian Hunter #else 445b702b106SAdrian Hunter 446b702b106SAdrian Hunter static inline int omap_hsmmc_reg_get(struct omap_hsmmc_host *host) 447b702b106SAdrian Hunter { 448b702b106SAdrian Hunter return -EINVAL; 449b702b106SAdrian Hunter } 450b702b106SAdrian Hunter 451b702b106SAdrian Hunter static inline void omap_hsmmc_reg_put(struct omap_hsmmc_host *host) 452b702b106SAdrian Hunter { 453b702b106SAdrian Hunter } 454b702b106SAdrian Hunter 455b702b106SAdrian Hunter static inline int omap_hsmmc_have_reg(void) 456b702b106SAdrian Hunter { 457b702b106SAdrian Hunter return 0; 458b702b106SAdrian Hunter } 459b702b106SAdrian Hunter 460b702b106SAdrian Hunter #endif 461b702b106SAdrian Hunter 462b702b106SAdrian Hunter static int omap_hsmmc_gpio_init(struct omap_mmc_platform_data *pdata) 463b702b106SAdrian Hunter { 464b702b106SAdrian Hunter int ret; 465b702b106SAdrian Hunter 466b702b106SAdrian Hunter if (gpio_is_valid(pdata->slots[0].switch_pin)) { 467b702b106SAdrian Hunter pdata->suspend = omap_hsmmc_suspend_cdirq; 468b702b106SAdrian Hunter pdata->resume = omap_hsmmc_resume_cdirq; 469b702b106SAdrian Hunter if (pdata->slots[0].cover) 470b702b106SAdrian Hunter pdata->slots[0].get_cover_state = 471b702b106SAdrian Hunter omap_hsmmc_get_cover_state; 472b702b106SAdrian Hunter else 473b702b106SAdrian Hunter pdata->slots[0].card_detect = omap_hsmmc_card_detect; 474b702b106SAdrian Hunter pdata->slots[0].card_detect_irq = 475b702b106SAdrian Hunter gpio_to_irq(pdata->slots[0].switch_pin); 476b702b106SAdrian Hunter ret = gpio_request(pdata->slots[0].switch_pin, "mmc_cd"); 477b702b106SAdrian Hunter if (ret) 478b702b106SAdrian Hunter return ret; 479b702b106SAdrian Hunter ret = gpio_direction_input(pdata->slots[0].switch_pin); 480b702b106SAdrian Hunter if (ret) 481b702b106SAdrian Hunter goto err_free_sp; 482b702b106SAdrian Hunter } else 483b702b106SAdrian Hunter pdata->slots[0].switch_pin = -EINVAL; 484b702b106SAdrian Hunter 485b702b106SAdrian Hunter if (gpio_is_valid(pdata->slots[0].gpio_wp)) { 486b702b106SAdrian Hunter pdata->slots[0].get_ro = omap_hsmmc_get_wp; 487b702b106SAdrian Hunter ret = gpio_request(pdata->slots[0].gpio_wp, "mmc_wp"); 488b702b106SAdrian Hunter if (ret) 489b702b106SAdrian Hunter goto err_free_cd; 490b702b106SAdrian Hunter ret = gpio_direction_input(pdata->slots[0].gpio_wp); 491b702b106SAdrian Hunter if (ret) 492b702b106SAdrian Hunter goto err_free_wp; 493b702b106SAdrian Hunter } else 494b702b106SAdrian Hunter pdata->slots[0].gpio_wp = -EINVAL; 495b702b106SAdrian Hunter 496b702b106SAdrian Hunter return 0; 497b702b106SAdrian Hunter 498b702b106SAdrian Hunter err_free_wp: 499b702b106SAdrian Hunter gpio_free(pdata->slots[0].gpio_wp); 500b702b106SAdrian Hunter err_free_cd: 501b702b106SAdrian Hunter if (gpio_is_valid(pdata->slots[0].switch_pin)) 502b702b106SAdrian Hunter err_free_sp: 503b702b106SAdrian Hunter gpio_free(pdata->slots[0].switch_pin); 504b702b106SAdrian Hunter return ret; 505b702b106SAdrian Hunter } 506b702b106SAdrian Hunter 507b702b106SAdrian Hunter static void omap_hsmmc_gpio_free(struct omap_mmc_platform_data *pdata) 508b702b106SAdrian Hunter { 509b702b106SAdrian Hunter if (gpio_is_valid(pdata->slots[0].gpio_wp)) 510b702b106SAdrian Hunter gpio_free(pdata->slots[0].gpio_wp); 511b702b106SAdrian Hunter if (gpio_is_valid(pdata->slots[0].switch_pin)) 512b702b106SAdrian Hunter gpio_free(pdata->slots[0].switch_pin); 513b702b106SAdrian Hunter } 514b702b106SAdrian Hunter 515a45c6cb8SMadhusudhan Chikkature /* 516a45c6cb8SMadhusudhan Chikkature * Stop clock to the card 517a45c6cb8SMadhusudhan Chikkature */ 51870a3341aSDenis Karpov static void omap_hsmmc_stop_clock(struct omap_hsmmc_host *host) 519a45c6cb8SMadhusudhan Chikkature { 520a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, 521a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, SYSCTL) & ~CEN); 522a45c6cb8SMadhusudhan Chikkature if ((OMAP_HSMMC_READ(host->base, SYSCTL) & CEN) != 0x0) 523a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "MMC Clock is not stoped\n"); 524a45c6cb8SMadhusudhan Chikkature } 525a45c6cb8SMadhusudhan Chikkature 526b417577dSAdrian Hunter static void omap_hsmmc_enable_irq(struct omap_hsmmc_host *host) 527b417577dSAdrian Hunter { 528b417577dSAdrian Hunter unsigned int irq_mask; 529b417577dSAdrian Hunter 530b417577dSAdrian Hunter if (host->use_dma) 531b417577dSAdrian Hunter irq_mask = INT_EN_MASK & ~(BRR_ENABLE | BWR_ENABLE); 532b417577dSAdrian Hunter else 533b417577dSAdrian Hunter irq_mask = INT_EN_MASK; 534b417577dSAdrian Hunter 535b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); 536b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, ISE, irq_mask); 537b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, IE, irq_mask); 538b417577dSAdrian Hunter } 539b417577dSAdrian Hunter 540b417577dSAdrian Hunter static void omap_hsmmc_disable_irq(struct omap_hsmmc_host *host) 541b417577dSAdrian Hunter { 542b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, ISE, 0); 543b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, IE, 0); 544b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); 545b417577dSAdrian Hunter } 546b417577dSAdrian Hunter 54711dd62a7SDenis Karpov #ifdef CONFIG_PM 54811dd62a7SDenis Karpov 54911dd62a7SDenis Karpov /* 55011dd62a7SDenis Karpov * Restore the MMC host context, if it was lost as result of a 55111dd62a7SDenis Karpov * power state change. 55211dd62a7SDenis Karpov */ 55370a3341aSDenis Karpov static int omap_hsmmc_context_restore(struct omap_hsmmc_host *host) 55411dd62a7SDenis Karpov { 55511dd62a7SDenis Karpov struct mmc_ios *ios = &host->mmc->ios; 55611dd62a7SDenis Karpov struct omap_mmc_platform_data *pdata = host->pdata; 55711dd62a7SDenis Karpov int context_loss = 0; 55811dd62a7SDenis Karpov u32 hctl, capa, con; 55911dd62a7SDenis Karpov u16 dsor = 0; 56011dd62a7SDenis Karpov unsigned long timeout; 56111dd62a7SDenis Karpov 56211dd62a7SDenis Karpov if (pdata->get_context_loss_count) { 56311dd62a7SDenis Karpov context_loss = pdata->get_context_loss_count(host->dev); 56411dd62a7SDenis Karpov if (context_loss < 0) 56511dd62a7SDenis Karpov return 1; 56611dd62a7SDenis Karpov } 56711dd62a7SDenis Karpov 56811dd62a7SDenis Karpov dev_dbg(mmc_dev(host->mmc), "context was %slost\n", 56911dd62a7SDenis Karpov context_loss == host->context_loss ? "not " : ""); 57011dd62a7SDenis Karpov if (host->context_loss == context_loss) 57111dd62a7SDenis Karpov return 1; 57211dd62a7SDenis Karpov 57311dd62a7SDenis Karpov /* Wait for hardware reset */ 57411dd62a7SDenis Karpov timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 57511dd62a7SDenis Karpov while ((OMAP_HSMMC_READ(host->base, SYSSTATUS) & RESETDONE) != RESETDONE 57611dd62a7SDenis Karpov && time_before(jiffies, timeout)) 57711dd62a7SDenis Karpov ; 57811dd62a7SDenis Karpov 57911dd62a7SDenis Karpov /* Do software reset */ 58011dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, SYSCONFIG, SOFTRESET); 58111dd62a7SDenis Karpov timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 58211dd62a7SDenis Karpov while ((OMAP_HSMMC_READ(host->base, SYSSTATUS) & RESETDONE) != RESETDONE 58311dd62a7SDenis Karpov && time_before(jiffies, timeout)) 58411dd62a7SDenis Karpov ; 58511dd62a7SDenis Karpov 58611dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, SYSCONFIG, 58711dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCONFIG) | AUTOIDLE); 58811dd62a7SDenis Karpov 58911dd62a7SDenis Karpov if (host->id == OMAP_MMC1_DEVID) { 59011dd62a7SDenis Karpov if (host->power_mode != MMC_POWER_OFF && 59111dd62a7SDenis Karpov (1 << ios->vdd) <= MMC_VDD_23_24) 59211dd62a7SDenis Karpov hctl = SDVS18; 59311dd62a7SDenis Karpov else 59411dd62a7SDenis Karpov hctl = SDVS30; 59511dd62a7SDenis Karpov capa = VS30 | VS18; 59611dd62a7SDenis Karpov } else { 59711dd62a7SDenis Karpov hctl = SDVS18; 59811dd62a7SDenis Karpov capa = VS18; 59911dd62a7SDenis Karpov } 60011dd62a7SDenis Karpov 60111dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, HCTL, 60211dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, HCTL) | hctl); 60311dd62a7SDenis Karpov 60411dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, CAPA, 60511dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, CAPA) | capa); 60611dd62a7SDenis Karpov 60711dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, HCTL, 60811dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, HCTL) | SDBP); 60911dd62a7SDenis Karpov 61011dd62a7SDenis Karpov timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 61111dd62a7SDenis Karpov while ((OMAP_HSMMC_READ(host->base, HCTL) & SDBP) != SDBP 61211dd62a7SDenis Karpov && time_before(jiffies, timeout)) 61311dd62a7SDenis Karpov ; 61411dd62a7SDenis Karpov 615b417577dSAdrian Hunter omap_hsmmc_disable_irq(host); 61611dd62a7SDenis Karpov 61711dd62a7SDenis Karpov /* Do not initialize card-specific things if the power is off */ 61811dd62a7SDenis Karpov if (host->power_mode == MMC_POWER_OFF) 61911dd62a7SDenis Karpov goto out; 62011dd62a7SDenis Karpov 62111dd62a7SDenis Karpov con = OMAP_HSMMC_READ(host->base, CON); 62211dd62a7SDenis Karpov switch (ios->bus_width) { 62311dd62a7SDenis Karpov case MMC_BUS_WIDTH_8: 62411dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, CON, con | DW8); 62511dd62a7SDenis Karpov break; 62611dd62a7SDenis Karpov case MMC_BUS_WIDTH_4: 62711dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, CON, con & ~DW8); 62811dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, HCTL, 62911dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, HCTL) | FOUR_BIT); 63011dd62a7SDenis Karpov break; 63111dd62a7SDenis Karpov case MMC_BUS_WIDTH_1: 63211dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, CON, con & ~DW8); 63311dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, HCTL, 63411dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, HCTL) & ~FOUR_BIT); 63511dd62a7SDenis Karpov break; 63611dd62a7SDenis Karpov } 63711dd62a7SDenis Karpov 63811dd62a7SDenis Karpov if (ios->clock) { 63911dd62a7SDenis Karpov dsor = OMAP_MMC_MASTER_CLOCK / ios->clock; 64011dd62a7SDenis Karpov if (dsor < 1) 64111dd62a7SDenis Karpov dsor = 1; 64211dd62a7SDenis Karpov 64311dd62a7SDenis Karpov if (OMAP_MMC_MASTER_CLOCK / dsor > ios->clock) 64411dd62a7SDenis Karpov dsor++; 64511dd62a7SDenis Karpov 64611dd62a7SDenis Karpov if (dsor > 250) 64711dd62a7SDenis Karpov dsor = 250; 64811dd62a7SDenis Karpov } 64911dd62a7SDenis Karpov 65011dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, SYSCTL, 65111dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCTL) & ~CEN); 65211dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, SYSCTL, (dsor << 6) | (DTO << 16)); 65311dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, SYSCTL, 65411dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCTL) | ICE); 65511dd62a7SDenis Karpov 65611dd62a7SDenis Karpov timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 65711dd62a7SDenis Karpov while ((OMAP_HSMMC_READ(host->base, SYSCTL) & ICS) != ICS 65811dd62a7SDenis Karpov && time_before(jiffies, timeout)) 65911dd62a7SDenis Karpov ; 66011dd62a7SDenis Karpov 66111dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, SYSCTL, 66211dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCTL) | CEN); 66311dd62a7SDenis Karpov 66411dd62a7SDenis Karpov con = OMAP_HSMMC_READ(host->base, CON); 66511dd62a7SDenis Karpov if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN) 66611dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, CON, con | OD); 66711dd62a7SDenis Karpov else 66811dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, CON, con & ~OD); 66911dd62a7SDenis Karpov out: 67011dd62a7SDenis Karpov host->context_loss = context_loss; 67111dd62a7SDenis Karpov 67211dd62a7SDenis Karpov dev_dbg(mmc_dev(host->mmc), "context is restored\n"); 67311dd62a7SDenis Karpov return 0; 67411dd62a7SDenis Karpov } 67511dd62a7SDenis Karpov 67611dd62a7SDenis Karpov /* 67711dd62a7SDenis Karpov * Save the MMC host context (store the number of power state changes so far). 67811dd62a7SDenis Karpov */ 67970a3341aSDenis Karpov static void omap_hsmmc_context_save(struct omap_hsmmc_host *host) 68011dd62a7SDenis Karpov { 68111dd62a7SDenis Karpov struct omap_mmc_platform_data *pdata = host->pdata; 68211dd62a7SDenis Karpov int context_loss; 68311dd62a7SDenis Karpov 68411dd62a7SDenis Karpov if (pdata->get_context_loss_count) { 68511dd62a7SDenis Karpov context_loss = pdata->get_context_loss_count(host->dev); 68611dd62a7SDenis Karpov if (context_loss < 0) 68711dd62a7SDenis Karpov return; 68811dd62a7SDenis Karpov host->context_loss = context_loss; 68911dd62a7SDenis Karpov } 69011dd62a7SDenis Karpov } 69111dd62a7SDenis Karpov 69211dd62a7SDenis Karpov #else 69311dd62a7SDenis Karpov 69470a3341aSDenis Karpov static int omap_hsmmc_context_restore(struct omap_hsmmc_host *host) 69511dd62a7SDenis Karpov { 69611dd62a7SDenis Karpov return 0; 69711dd62a7SDenis Karpov } 69811dd62a7SDenis Karpov 69970a3341aSDenis Karpov static void omap_hsmmc_context_save(struct omap_hsmmc_host *host) 70011dd62a7SDenis Karpov { 70111dd62a7SDenis Karpov } 70211dd62a7SDenis Karpov 70311dd62a7SDenis Karpov #endif 70411dd62a7SDenis Karpov 705a45c6cb8SMadhusudhan Chikkature /* 706a45c6cb8SMadhusudhan Chikkature * Send init stream sequence to card 707a45c6cb8SMadhusudhan Chikkature * before sending IDLE command 708a45c6cb8SMadhusudhan Chikkature */ 70970a3341aSDenis Karpov static void send_init_stream(struct omap_hsmmc_host *host) 710a45c6cb8SMadhusudhan Chikkature { 711a45c6cb8SMadhusudhan Chikkature int reg = 0; 712a45c6cb8SMadhusudhan Chikkature unsigned long timeout; 713a45c6cb8SMadhusudhan Chikkature 714b62f6228SAdrian Hunter if (host->protect_card) 715b62f6228SAdrian Hunter return; 716b62f6228SAdrian Hunter 717a45c6cb8SMadhusudhan Chikkature disable_irq(host->irq); 718b417577dSAdrian Hunter 719b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK); 720a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CON, 721a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, CON) | INIT_STREAM); 722a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CMD, INIT_STREAM_CMD); 723a45c6cb8SMadhusudhan Chikkature 724a45c6cb8SMadhusudhan Chikkature timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 725a45c6cb8SMadhusudhan Chikkature while ((reg != CC) && time_before(jiffies, timeout)) 726a45c6cb8SMadhusudhan Chikkature reg = OMAP_HSMMC_READ(host->base, STAT) & CC; 727a45c6cb8SMadhusudhan Chikkature 728a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CON, 729a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, CON) & ~INIT_STREAM); 730c653a6d4SAdrian Hunter 731c653a6d4SAdrian Hunter OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); 732c653a6d4SAdrian Hunter OMAP_HSMMC_READ(host->base, STAT); 733c653a6d4SAdrian Hunter 734a45c6cb8SMadhusudhan Chikkature enable_irq(host->irq); 735a45c6cb8SMadhusudhan Chikkature } 736a45c6cb8SMadhusudhan Chikkature 737a45c6cb8SMadhusudhan Chikkature static inline 73870a3341aSDenis Karpov int omap_hsmmc_cover_is_closed(struct omap_hsmmc_host *host) 739a45c6cb8SMadhusudhan Chikkature { 740a45c6cb8SMadhusudhan Chikkature int r = 1; 741a45c6cb8SMadhusudhan Chikkature 742191d1f1dSDenis Karpov if (mmc_slot(host).get_cover_state) 743191d1f1dSDenis Karpov r = mmc_slot(host).get_cover_state(host->dev, host->slot_id); 744a45c6cb8SMadhusudhan Chikkature return r; 745a45c6cb8SMadhusudhan Chikkature } 746a45c6cb8SMadhusudhan Chikkature 747a45c6cb8SMadhusudhan Chikkature static ssize_t 74870a3341aSDenis Karpov omap_hsmmc_show_cover_switch(struct device *dev, struct device_attribute *attr, 749a45c6cb8SMadhusudhan Chikkature char *buf) 750a45c6cb8SMadhusudhan Chikkature { 751a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev); 75270a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 753a45c6cb8SMadhusudhan Chikkature 75470a3341aSDenis Karpov return sprintf(buf, "%s\n", 75570a3341aSDenis Karpov omap_hsmmc_cover_is_closed(host) ? "closed" : "open"); 756a45c6cb8SMadhusudhan Chikkature } 757a45c6cb8SMadhusudhan Chikkature 75870a3341aSDenis Karpov static DEVICE_ATTR(cover_switch, S_IRUGO, omap_hsmmc_show_cover_switch, NULL); 759a45c6cb8SMadhusudhan Chikkature 760a45c6cb8SMadhusudhan Chikkature static ssize_t 76170a3341aSDenis Karpov omap_hsmmc_show_slot_name(struct device *dev, struct device_attribute *attr, 762a45c6cb8SMadhusudhan Chikkature char *buf) 763a45c6cb8SMadhusudhan Chikkature { 764a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev); 76570a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 766a45c6cb8SMadhusudhan Chikkature 767191d1f1dSDenis Karpov return sprintf(buf, "%s\n", mmc_slot(host).name); 768a45c6cb8SMadhusudhan Chikkature } 769a45c6cb8SMadhusudhan Chikkature 77070a3341aSDenis Karpov static DEVICE_ATTR(slot_name, S_IRUGO, omap_hsmmc_show_slot_name, NULL); 771a45c6cb8SMadhusudhan Chikkature 772a45c6cb8SMadhusudhan Chikkature /* 773a45c6cb8SMadhusudhan Chikkature * Configure the response type and send the cmd. 774a45c6cb8SMadhusudhan Chikkature */ 775a45c6cb8SMadhusudhan Chikkature static void 77670a3341aSDenis Karpov omap_hsmmc_start_command(struct omap_hsmmc_host *host, struct mmc_command *cmd, 777a45c6cb8SMadhusudhan Chikkature struct mmc_data *data) 778a45c6cb8SMadhusudhan Chikkature { 779a45c6cb8SMadhusudhan Chikkature int cmdreg = 0, resptype = 0, cmdtype = 0; 780a45c6cb8SMadhusudhan Chikkature 781a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "%s: CMD%d, argument 0x%08x\n", 782a45c6cb8SMadhusudhan Chikkature mmc_hostname(host->mmc), cmd->opcode, cmd->arg); 783a45c6cb8SMadhusudhan Chikkature host->cmd = cmd; 784a45c6cb8SMadhusudhan Chikkature 785b417577dSAdrian Hunter omap_hsmmc_enable_irq(host); 786a45c6cb8SMadhusudhan Chikkature 7874a694dc9SAdrian Hunter host->response_busy = 0; 788a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_PRESENT) { 789a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_136) 790a45c6cb8SMadhusudhan Chikkature resptype = 1; 7914a694dc9SAdrian Hunter else if (cmd->flags & MMC_RSP_BUSY) { 7924a694dc9SAdrian Hunter resptype = 3; 7934a694dc9SAdrian Hunter host->response_busy = 1; 7944a694dc9SAdrian Hunter } else 795a45c6cb8SMadhusudhan Chikkature resptype = 2; 796a45c6cb8SMadhusudhan Chikkature } 797a45c6cb8SMadhusudhan Chikkature 798a45c6cb8SMadhusudhan Chikkature /* 799a45c6cb8SMadhusudhan Chikkature * Unlike OMAP1 controller, the cmdtype does not seem to be based on 800a45c6cb8SMadhusudhan Chikkature * ac, bc, adtc, bcr. Only commands ending an open ended transfer need 801a45c6cb8SMadhusudhan Chikkature * a val of 0x3, rest 0x0. 802a45c6cb8SMadhusudhan Chikkature */ 803a45c6cb8SMadhusudhan Chikkature if (cmd == host->mrq->stop) 804a45c6cb8SMadhusudhan Chikkature cmdtype = 0x3; 805a45c6cb8SMadhusudhan Chikkature 806a45c6cb8SMadhusudhan Chikkature cmdreg = (cmd->opcode << 24) | (resptype << 16) | (cmdtype << 22); 807a45c6cb8SMadhusudhan Chikkature 808a45c6cb8SMadhusudhan Chikkature if (data) { 809a45c6cb8SMadhusudhan Chikkature cmdreg |= DP_SELECT | MSBS | BCE; 810a45c6cb8SMadhusudhan Chikkature if (data->flags & MMC_DATA_READ) 811a45c6cb8SMadhusudhan Chikkature cmdreg |= DDIR; 812a45c6cb8SMadhusudhan Chikkature else 813a45c6cb8SMadhusudhan Chikkature cmdreg &= ~(DDIR); 814a45c6cb8SMadhusudhan Chikkature } 815a45c6cb8SMadhusudhan Chikkature 816a45c6cb8SMadhusudhan Chikkature if (host->use_dma) 817a45c6cb8SMadhusudhan Chikkature cmdreg |= DMA_EN; 818a45c6cb8SMadhusudhan Chikkature 819b417577dSAdrian Hunter host->req_in_progress = 1; 8204dffd7a2SAdrian Hunter 821a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, ARG, cmd->arg); 822a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CMD, cmdreg); 823a45c6cb8SMadhusudhan Chikkature } 824a45c6cb8SMadhusudhan Chikkature 8250ccd76d4SJuha Yrjola static int 82670a3341aSDenis Karpov omap_hsmmc_get_dma_dir(struct omap_hsmmc_host *host, struct mmc_data *data) 8270ccd76d4SJuha Yrjola { 8280ccd76d4SJuha Yrjola if (data->flags & MMC_DATA_WRITE) 8290ccd76d4SJuha Yrjola return DMA_TO_DEVICE; 8300ccd76d4SJuha Yrjola else 8310ccd76d4SJuha Yrjola return DMA_FROM_DEVICE; 8320ccd76d4SJuha Yrjola } 8330ccd76d4SJuha Yrjola 834b417577dSAdrian Hunter static void omap_hsmmc_request_done(struct omap_hsmmc_host *host, struct mmc_request *mrq) 835b417577dSAdrian Hunter { 836b417577dSAdrian Hunter int dma_ch; 837b417577dSAdrian Hunter 838b417577dSAdrian Hunter spin_lock(&host->irq_lock); 839b417577dSAdrian Hunter host->req_in_progress = 0; 840b417577dSAdrian Hunter dma_ch = host->dma_ch; 841b417577dSAdrian Hunter spin_unlock(&host->irq_lock); 842b417577dSAdrian Hunter 843b417577dSAdrian Hunter omap_hsmmc_disable_irq(host); 844b417577dSAdrian Hunter /* Do not complete the request if DMA is still in progress */ 845b417577dSAdrian Hunter if (mrq->data && host->use_dma && dma_ch != -1) 846b417577dSAdrian Hunter return; 847b417577dSAdrian Hunter host->mrq = NULL; 848b417577dSAdrian Hunter mmc_request_done(host->mmc, mrq); 849b417577dSAdrian Hunter } 850b417577dSAdrian Hunter 851a45c6cb8SMadhusudhan Chikkature /* 852a45c6cb8SMadhusudhan Chikkature * Notify the transfer complete to MMC core 853a45c6cb8SMadhusudhan Chikkature */ 854a45c6cb8SMadhusudhan Chikkature static void 85570a3341aSDenis Karpov omap_hsmmc_xfer_done(struct omap_hsmmc_host *host, struct mmc_data *data) 856a45c6cb8SMadhusudhan Chikkature { 8574a694dc9SAdrian Hunter if (!data) { 8584a694dc9SAdrian Hunter struct mmc_request *mrq = host->mrq; 8594a694dc9SAdrian Hunter 86023050103SAdrian Hunter /* TC before CC from CMD6 - don't know why, but it happens */ 86123050103SAdrian Hunter if (host->cmd && host->cmd->opcode == 6 && 86223050103SAdrian Hunter host->response_busy) { 86323050103SAdrian Hunter host->response_busy = 0; 86423050103SAdrian Hunter return; 86523050103SAdrian Hunter } 86623050103SAdrian Hunter 867b417577dSAdrian Hunter omap_hsmmc_request_done(host, mrq); 8684a694dc9SAdrian Hunter return; 8694a694dc9SAdrian Hunter } 8704a694dc9SAdrian Hunter 871a45c6cb8SMadhusudhan Chikkature host->data = NULL; 872a45c6cb8SMadhusudhan Chikkature 873a45c6cb8SMadhusudhan Chikkature if (!data->error) 874a45c6cb8SMadhusudhan Chikkature data->bytes_xfered += data->blocks * (data->blksz); 875a45c6cb8SMadhusudhan Chikkature else 876a45c6cb8SMadhusudhan Chikkature data->bytes_xfered = 0; 877a45c6cb8SMadhusudhan Chikkature 878a45c6cb8SMadhusudhan Chikkature if (!data->stop) { 879b417577dSAdrian Hunter omap_hsmmc_request_done(host, data->mrq); 880a45c6cb8SMadhusudhan Chikkature return; 881a45c6cb8SMadhusudhan Chikkature } 88270a3341aSDenis Karpov omap_hsmmc_start_command(host, data->stop, NULL); 883a45c6cb8SMadhusudhan Chikkature } 884a45c6cb8SMadhusudhan Chikkature 885a45c6cb8SMadhusudhan Chikkature /* 886a45c6cb8SMadhusudhan Chikkature * Notify the core about command completion 887a45c6cb8SMadhusudhan Chikkature */ 888a45c6cb8SMadhusudhan Chikkature static void 88970a3341aSDenis Karpov omap_hsmmc_cmd_done(struct omap_hsmmc_host *host, struct mmc_command *cmd) 890a45c6cb8SMadhusudhan Chikkature { 891a45c6cb8SMadhusudhan Chikkature host->cmd = NULL; 892a45c6cb8SMadhusudhan Chikkature 893a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_PRESENT) { 894a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_136) { 895a45c6cb8SMadhusudhan Chikkature /* response type 2 */ 896a45c6cb8SMadhusudhan Chikkature cmd->resp[3] = OMAP_HSMMC_READ(host->base, RSP10); 897a45c6cb8SMadhusudhan Chikkature cmd->resp[2] = OMAP_HSMMC_READ(host->base, RSP32); 898a45c6cb8SMadhusudhan Chikkature cmd->resp[1] = OMAP_HSMMC_READ(host->base, RSP54); 899a45c6cb8SMadhusudhan Chikkature cmd->resp[0] = OMAP_HSMMC_READ(host->base, RSP76); 900a45c6cb8SMadhusudhan Chikkature } else { 901a45c6cb8SMadhusudhan Chikkature /* response types 1, 1b, 3, 4, 5, 6 */ 902a45c6cb8SMadhusudhan Chikkature cmd->resp[0] = OMAP_HSMMC_READ(host->base, RSP10); 903a45c6cb8SMadhusudhan Chikkature } 904a45c6cb8SMadhusudhan Chikkature } 905b417577dSAdrian Hunter if ((host->data == NULL && !host->response_busy) || cmd->error) 906b417577dSAdrian Hunter omap_hsmmc_request_done(host, cmd->mrq); 907a45c6cb8SMadhusudhan Chikkature } 908a45c6cb8SMadhusudhan Chikkature 909a45c6cb8SMadhusudhan Chikkature /* 910a45c6cb8SMadhusudhan Chikkature * DMA clean up for command errors 911a45c6cb8SMadhusudhan Chikkature */ 91270a3341aSDenis Karpov static void omap_hsmmc_dma_cleanup(struct omap_hsmmc_host *host, int errno) 913a45c6cb8SMadhusudhan Chikkature { 914b417577dSAdrian Hunter int dma_ch; 915b417577dSAdrian Hunter 91682788ff5SJarkko Lavinen host->data->error = errno; 917a45c6cb8SMadhusudhan Chikkature 918b417577dSAdrian Hunter spin_lock(&host->irq_lock); 919b417577dSAdrian Hunter dma_ch = host->dma_ch; 920b417577dSAdrian Hunter host->dma_ch = -1; 921b417577dSAdrian Hunter spin_unlock(&host->irq_lock); 922b417577dSAdrian Hunter 923b417577dSAdrian Hunter if (host->use_dma && dma_ch != -1) { 924a45c6cb8SMadhusudhan Chikkature dma_unmap_sg(mmc_dev(host->mmc), host->data->sg, host->dma_len, 92570a3341aSDenis Karpov omap_hsmmc_get_dma_dir(host, host->data)); 926b417577dSAdrian Hunter omap_free_dma(dma_ch); 927a45c6cb8SMadhusudhan Chikkature } 928a45c6cb8SMadhusudhan Chikkature host->data = NULL; 929a45c6cb8SMadhusudhan Chikkature } 930a45c6cb8SMadhusudhan Chikkature 931a45c6cb8SMadhusudhan Chikkature /* 932a45c6cb8SMadhusudhan Chikkature * Readable error output 933a45c6cb8SMadhusudhan Chikkature */ 934a45c6cb8SMadhusudhan Chikkature #ifdef CONFIG_MMC_DEBUG 93570a3341aSDenis Karpov static void omap_hsmmc_report_irq(struct omap_hsmmc_host *host, u32 status) 936a45c6cb8SMadhusudhan Chikkature { 937a45c6cb8SMadhusudhan Chikkature /* --- means reserved bit without definition at documentation */ 93870a3341aSDenis Karpov static const char *omap_hsmmc_status_bits[] = { 939a45c6cb8SMadhusudhan Chikkature "CC", "TC", "BGE", "---", "BWR", "BRR", "---", "---", "CIRQ", 940a45c6cb8SMadhusudhan Chikkature "OBI", "---", "---", "---", "---", "---", "ERRI", "CTO", "CCRC", 941a45c6cb8SMadhusudhan Chikkature "CEB", "CIE", "DTO", "DCRC", "DEB", "---", "ACE", "---", 942a45c6cb8SMadhusudhan Chikkature "---", "---", "---", "CERR", "CERR", "BADA", "---", "---", "---" 943a45c6cb8SMadhusudhan Chikkature }; 944a45c6cb8SMadhusudhan Chikkature char res[256]; 945a45c6cb8SMadhusudhan Chikkature char *buf = res; 946a45c6cb8SMadhusudhan Chikkature int len, i; 947a45c6cb8SMadhusudhan Chikkature 948a45c6cb8SMadhusudhan Chikkature len = sprintf(buf, "MMC IRQ 0x%x :", status); 949a45c6cb8SMadhusudhan Chikkature buf += len; 950a45c6cb8SMadhusudhan Chikkature 95170a3341aSDenis Karpov for (i = 0; i < ARRAY_SIZE(omap_hsmmc_status_bits); i++) 952a45c6cb8SMadhusudhan Chikkature if (status & (1 << i)) { 95370a3341aSDenis Karpov len = sprintf(buf, " %s", omap_hsmmc_status_bits[i]); 954a45c6cb8SMadhusudhan Chikkature buf += len; 955a45c6cb8SMadhusudhan Chikkature } 956a45c6cb8SMadhusudhan Chikkature 957a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "%s\n", res); 958a45c6cb8SMadhusudhan Chikkature } 959a45c6cb8SMadhusudhan Chikkature #endif /* CONFIG_MMC_DEBUG */ 960a45c6cb8SMadhusudhan Chikkature 9613ebf74b1SJean Pihet /* 9623ebf74b1SJean Pihet * MMC controller internal state machines reset 9633ebf74b1SJean Pihet * 9643ebf74b1SJean Pihet * Used to reset command or data internal state machines, using respectively 9653ebf74b1SJean Pihet * SRC or SRD bit of SYSCTL register 9663ebf74b1SJean Pihet * Can be called from interrupt context 9673ebf74b1SJean Pihet */ 96870a3341aSDenis Karpov static inline void omap_hsmmc_reset_controller_fsm(struct omap_hsmmc_host *host, 9693ebf74b1SJean Pihet unsigned long bit) 9703ebf74b1SJean Pihet { 9713ebf74b1SJean Pihet unsigned long i = 0; 9723ebf74b1SJean Pihet unsigned long limit = (loops_per_jiffy * 9733ebf74b1SJean Pihet msecs_to_jiffies(MMC_TIMEOUT_MS)); 9743ebf74b1SJean Pihet 9753ebf74b1SJean Pihet OMAP_HSMMC_WRITE(host->base, SYSCTL, 9763ebf74b1SJean Pihet OMAP_HSMMC_READ(host->base, SYSCTL) | bit); 9773ebf74b1SJean Pihet 9783ebf74b1SJean Pihet while ((OMAP_HSMMC_READ(host->base, SYSCTL) & bit) && 9793ebf74b1SJean Pihet (i++ < limit)) 9803ebf74b1SJean Pihet cpu_relax(); 9813ebf74b1SJean Pihet 9823ebf74b1SJean Pihet if (OMAP_HSMMC_READ(host->base, SYSCTL) & bit) 9833ebf74b1SJean Pihet dev_err(mmc_dev(host->mmc), 9843ebf74b1SJean Pihet "Timeout waiting on controller reset in %s\n", 9853ebf74b1SJean Pihet __func__); 9863ebf74b1SJean Pihet } 987a45c6cb8SMadhusudhan Chikkature 988b417577dSAdrian Hunter static void omap_hsmmc_do_irq(struct omap_hsmmc_host *host, int status) 989a45c6cb8SMadhusudhan Chikkature { 990a45c6cb8SMadhusudhan Chikkature struct mmc_data *data; 991b417577dSAdrian Hunter int end_cmd = 0, end_trans = 0; 992a45c6cb8SMadhusudhan Chikkature 993b417577dSAdrian Hunter if (!host->req_in_progress) { 994b417577dSAdrian Hunter do { 995b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, STAT, status); 99600adadc1SKevin Hilman /* Flush posted write */ 997b417577dSAdrian Hunter status = OMAP_HSMMC_READ(host->base, STAT); 998b417577dSAdrian Hunter } while (status & INT_EN_MASK); 999b417577dSAdrian Hunter return; 1000a45c6cb8SMadhusudhan Chikkature } 1001a45c6cb8SMadhusudhan Chikkature 1002a45c6cb8SMadhusudhan Chikkature data = host->data; 1003a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "IRQ Status is %x\n", status); 1004a45c6cb8SMadhusudhan Chikkature 1005a45c6cb8SMadhusudhan Chikkature if (status & ERR) { 1006a45c6cb8SMadhusudhan Chikkature #ifdef CONFIG_MMC_DEBUG 100770a3341aSDenis Karpov omap_hsmmc_report_irq(host, status); 1008a45c6cb8SMadhusudhan Chikkature #endif 1009a45c6cb8SMadhusudhan Chikkature if ((status & CMD_TIMEOUT) || 1010a45c6cb8SMadhusudhan Chikkature (status & CMD_CRC)) { 1011a45c6cb8SMadhusudhan Chikkature if (host->cmd) { 1012a45c6cb8SMadhusudhan Chikkature if (status & CMD_TIMEOUT) { 101370a3341aSDenis Karpov omap_hsmmc_reset_controller_fsm(host, 1014191d1f1dSDenis Karpov SRC); 1015a45c6cb8SMadhusudhan Chikkature host->cmd->error = -ETIMEDOUT; 1016a45c6cb8SMadhusudhan Chikkature } else { 1017a45c6cb8SMadhusudhan Chikkature host->cmd->error = -EILSEQ; 1018a45c6cb8SMadhusudhan Chikkature } 1019a45c6cb8SMadhusudhan Chikkature end_cmd = 1; 1020a45c6cb8SMadhusudhan Chikkature } 10214a694dc9SAdrian Hunter if (host->data || host->response_busy) { 10224a694dc9SAdrian Hunter if (host->data) 102370a3341aSDenis Karpov omap_hsmmc_dma_cleanup(host, 102470a3341aSDenis Karpov -ETIMEDOUT); 10254a694dc9SAdrian Hunter host->response_busy = 0; 102670a3341aSDenis Karpov omap_hsmmc_reset_controller_fsm(host, SRD); 1027c232f457SJean Pihet } 1028a45c6cb8SMadhusudhan Chikkature } 1029a45c6cb8SMadhusudhan Chikkature if ((status & DATA_TIMEOUT) || 1030a45c6cb8SMadhusudhan Chikkature (status & DATA_CRC)) { 10314a694dc9SAdrian Hunter if (host->data || host->response_busy) { 10324a694dc9SAdrian Hunter int err = (status & DATA_TIMEOUT) ? 10334a694dc9SAdrian Hunter -ETIMEDOUT : -EILSEQ; 10344a694dc9SAdrian Hunter 10354a694dc9SAdrian Hunter if (host->data) 103670a3341aSDenis Karpov omap_hsmmc_dma_cleanup(host, err); 1037a45c6cb8SMadhusudhan Chikkature else 10384a694dc9SAdrian Hunter host->mrq->cmd->error = err; 10394a694dc9SAdrian Hunter host->response_busy = 0; 104070a3341aSDenis Karpov omap_hsmmc_reset_controller_fsm(host, SRD); 1041a45c6cb8SMadhusudhan Chikkature end_trans = 1; 1042a45c6cb8SMadhusudhan Chikkature } 1043a45c6cb8SMadhusudhan Chikkature } 1044a45c6cb8SMadhusudhan Chikkature if (status & CARD_ERR) { 1045a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1046a45c6cb8SMadhusudhan Chikkature "Ignoring card err CMD%d\n", host->cmd->opcode); 1047a45c6cb8SMadhusudhan Chikkature if (host->cmd) 1048a45c6cb8SMadhusudhan Chikkature end_cmd = 1; 1049a45c6cb8SMadhusudhan Chikkature if (host->data) 1050a45c6cb8SMadhusudhan Chikkature end_trans = 1; 1051a45c6cb8SMadhusudhan Chikkature } 1052a45c6cb8SMadhusudhan Chikkature } 1053a45c6cb8SMadhusudhan Chikkature 1054a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, STAT, status); 1055a45c6cb8SMadhusudhan Chikkature 1056a8fe29d8SJarkko Lavinen if (end_cmd || ((status & CC) && host->cmd)) 105770a3341aSDenis Karpov omap_hsmmc_cmd_done(host, host->cmd); 10580a40e647SJarkko Lavinen if ((end_trans || (status & TC)) && host->mrq) 105970a3341aSDenis Karpov omap_hsmmc_xfer_done(host, data); 1060b417577dSAdrian Hunter } 1061a45c6cb8SMadhusudhan Chikkature 1062b417577dSAdrian Hunter /* 1063b417577dSAdrian Hunter * MMC controller IRQ handler 1064b417577dSAdrian Hunter */ 1065b417577dSAdrian Hunter static irqreturn_t omap_hsmmc_irq(int irq, void *dev_id) 1066b417577dSAdrian Hunter { 1067b417577dSAdrian Hunter struct omap_hsmmc_host *host = dev_id; 1068b417577dSAdrian Hunter int status; 1069b417577dSAdrian Hunter 1070b417577dSAdrian Hunter status = OMAP_HSMMC_READ(host->base, STAT); 1071b417577dSAdrian Hunter do { 1072b417577dSAdrian Hunter omap_hsmmc_do_irq(host, status); 1073b417577dSAdrian Hunter /* Flush posted write */ 1074b417577dSAdrian Hunter status = OMAP_HSMMC_READ(host->base, STAT); 1075b417577dSAdrian Hunter } while (status & INT_EN_MASK); 10764dffd7a2SAdrian Hunter 1077a45c6cb8SMadhusudhan Chikkature return IRQ_HANDLED; 1078a45c6cb8SMadhusudhan Chikkature } 1079a45c6cb8SMadhusudhan Chikkature 108070a3341aSDenis Karpov static void set_sd_bus_power(struct omap_hsmmc_host *host) 1081e13bb300SAdrian Hunter { 1082e13bb300SAdrian Hunter unsigned long i; 1083e13bb300SAdrian Hunter 1084e13bb300SAdrian Hunter OMAP_HSMMC_WRITE(host->base, HCTL, 1085e13bb300SAdrian Hunter OMAP_HSMMC_READ(host->base, HCTL) | SDBP); 1086e13bb300SAdrian Hunter for (i = 0; i < loops_per_jiffy; i++) { 1087e13bb300SAdrian Hunter if (OMAP_HSMMC_READ(host->base, HCTL) & SDBP) 1088e13bb300SAdrian Hunter break; 1089e13bb300SAdrian Hunter cpu_relax(); 1090e13bb300SAdrian Hunter } 1091e13bb300SAdrian Hunter } 1092e13bb300SAdrian Hunter 1093a45c6cb8SMadhusudhan Chikkature /* 1094eb250826SDavid Brownell * Switch MMC interface voltage ... only relevant for MMC1. 1095eb250826SDavid Brownell * 1096eb250826SDavid Brownell * MMC2 and MMC3 use fixed 1.8V levels, and maybe a transceiver. 1097eb250826SDavid Brownell * The MMC2 transceiver controls are used instead of DAT4..DAT7. 1098eb250826SDavid Brownell * Some chips, like eMMC ones, use internal transceivers. 1099a45c6cb8SMadhusudhan Chikkature */ 110070a3341aSDenis Karpov static int omap_hsmmc_switch_opcond(struct omap_hsmmc_host *host, int vdd) 1101a45c6cb8SMadhusudhan Chikkature { 1102a45c6cb8SMadhusudhan Chikkature u32 reg_val = 0; 1103a45c6cb8SMadhusudhan Chikkature int ret; 1104a45c6cb8SMadhusudhan Chikkature 1105a45c6cb8SMadhusudhan Chikkature /* Disable the clocks */ 1106a45c6cb8SMadhusudhan Chikkature clk_disable(host->fclk); 1107a45c6cb8SMadhusudhan Chikkature clk_disable(host->iclk); 11082bec0893SAdrian Hunter if (host->got_dbclk) 1109a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 1110a45c6cb8SMadhusudhan Chikkature 1111a45c6cb8SMadhusudhan Chikkature /* Turn the power off */ 1112a45c6cb8SMadhusudhan Chikkature ret = mmc_slot(host).set_power(host->dev, host->slot_id, 0, 0); 1113a45c6cb8SMadhusudhan Chikkature 1114a45c6cb8SMadhusudhan Chikkature /* Turn the power ON with given VDD 1.8 or 3.0v */ 11152bec0893SAdrian Hunter if (!ret) 11162bec0893SAdrian Hunter ret = mmc_slot(host).set_power(host->dev, host->slot_id, 1, 11172bec0893SAdrian Hunter vdd); 11182bec0893SAdrian Hunter clk_enable(host->iclk); 11192bec0893SAdrian Hunter clk_enable(host->fclk); 11202bec0893SAdrian Hunter if (host->got_dbclk) 11212bec0893SAdrian Hunter clk_enable(host->dbclk); 11222bec0893SAdrian Hunter 1123a45c6cb8SMadhusudhan Chikkature if (ret != 0) 1124a45c6cb8SMadhusudhan Chikkature goto err; 1125a45c6cb8SMadhusudhan Chikkature 1126a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 1127a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) & SDVSCLR); 1128a45c6cb8SMadhusudhan Chikkature reg_val = OMAP_HSMMC_READ(host->base, HCTL); 1129eb250826SDavid Brownell 1130a45c6cb8SMadhusudhan Chikkature /* 1131a45c6cb8SMadhusudhan Chikkature * If a MMC dual voltage card is detected, the set_ios fn calls 1132a45c6cb8SMadhusudhan Chikkature * this fn with VDD bit set for 1.8V. Upon card removal from the 113370a3341aSDenis Karpov * slot, omap_hsmmc_set_ios sets the VDD back to 3V on MMC_POWER_OFF. 1134a45c6cb8SMadhusudhan Chikkature * 1135eb250826SDavid Brownell * Cope with a bit of slop in the range ... per data sheets: 1136eb250826SDavid Brownell * - "1.8V" for vdds_mmc1/vdds_mmc1a can be up to 2.45V max, 1137eb250826SDavid Brownell * but recommended values are 1.71V to 1.89V 1138eb250826SDavid Brownell * - "3.0V" for vdds_mmc1/vdds_mmc1a can be up to 3.5V max, 1139eb250826SDavid Brownell * but recommended values are 2.7V to 3.3V 1140eb250826SDavid Brownell * 1141eb250826SDavid Brownell * Board setup code shouldn't permit anything very out-of-range. 1142eb250826SDavid Brownell * TWL4030-family VMMC1 and VSIM regulators are fine (avoiding the 1143eb250826SDavid Brownell * middle range) but VSIM can't power DAT4..DAT7 at more than 3V. 1144a45c6cb8SMadhusudhan Chikkature */ 1145eb250826SDavid Brownell if ((1 << vdd) <= MMC_VDD_23_24) 1146a45c6cb8SMadhusudhan Chikkature reg_val |= SDVS18; 1147eb250826SDavid Brownell else 1148eb250826SDavid Brownell reg_val |= SDVS30; 1149a45c6cb8SMadhusudhan Chikkature 1150a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, reg_val); 1151e13bb300SAdrian Hunter set_sd_bus_power(host); 1152a45c6cb8SMadhusudhan Chikkature 1153a45c6cb8SMadhusudhan Chikkature return 0; 1154a45c6cb8SMadhusudhan Chikkature err: 1155a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Unable to switch operating voltage\n"); 1156a45c6cb8SMadhusudhan Chikkature return ret; 1157a45c6cb8SMadhusudhan Chikkature } 1158a45c6cb8SMadhusudhan Chikkature 1159b62f6228SAdrian Hunter /* Protect the card while the cover is open */ 1160b62f6228SAdrian Hunter static void omap_hsmmc_protect_card(struct omap_hsmmc_host *host) 1161b62f6228SAdrian Hunter { 1162b62f6228SAdrian Hunter if (!mmc_slot(host).get_cover_state) 1163b62f6228SAdrian Hunter return; 1164b62f6228SAdrian Hunter 1165b62f6228SAdrian Hunter host->reqs_blocked = 0; 1166b62f6228SAdrian Hunter if (mmc_slot(host).get_cover_state(host->dev, host->slot_id)) { 1167b62f6228SAdrian Hunter if (host->protect_card) { 1168b62f6228SAdrian Hunter printk(KERN_INFO "%s: cover is closed, " 1169b62f6228SAdrian Hunter "card is now accessible\n", 1170b62f6228SAdrian Hunter mmc_hostname(host->mmc)); 1171b62f6228SAdrian Hunter host->protect_card = 0; 1172b62f6228SAdrian Hunter } 1173b62f6228SAdrian Hunter } else { 1174b62f6228SAdrian Hunter if (!host->protect_card) { 1175b62f6228SAdrian Hunter printk(KERN_INFO "%s: cover is open, " 1176b62f6228SAdrian Hunter "card is now inaccessible\n", 1177b62f6228SAdrian Hunter mmc_hostname(host->mmc)); 1178b62f6228SAdrian Hunter host->protect_card = 1; 1179b62f6228SAdrian Hunter } 1180b62f6228SAdrian Hunter } 1181b62f6228SAdrian Hunter } 1182b62f6228SAdrian Hunter 1183a45c6cb8SMadhusudhan Chikkature /* 1184a45c6cb8SMadhusudhan Chikkature * Work Item to notify the core about card insertion/removal 1185a45c6cb8SMadhusudhan Chikkature */ 118670a3341aSDenis Karpov static void omap_hsmmc_detect(struct work_struct *work) 1187a45c6cb8SMadhusudhan Chikkature { 118870a3341aSDenis Karpov struct omap_hsmmc_host *host = 118970a3341aSDenis Karpov container_of(work, struct omap_hsmmc_host, mmc_carddetect_work); 1190249d0fa9SDavid Brownell struct omap_mmc_slot_data *slot = &mmc_slot(host); 1191a6b2240dSAdrian Hunter int carddetect; 1192249d0fa9SDavid Brownell 1193a6b2240dSAdrian Hunter if (host->suspended) 1194a6b2240dSAdrian Hunter return; 1195a45c6cb8SMadhusudhan Chikkature 1196a45c6cb8SMadhusudhan Chikkature sysfs_notify(&host->mmc->class_dev.kobj, NULL, "cover_switch"); 1197a6b2240dSAdrian Hunter 1198191d1f1dSDenis Karpov if (slot->card_detect) 1199db0fefc5SAdrian Hunter carddetect = slot->card_detect(host->dev, host->slot_id); 1200b62f6228SAdrian Hunter else { 1201b62f6228SAdrian Hunter omap_hsmmc_protect_card(host); 1202a6b2240dSAdrian Hunter carddetect = -ENOSYS; 1203b62f6228SAdrian Hunter } 1204a6b2240dSAdrian Hunter 1205cdeebaddSMadhusudhan Chikkature if (carddetect) 1206a45c6cb8SMadhusudhan Chikkature mmc_detect_change(host->mmc, (HZ * 200) / 1000); 1207cdeebaddSMadhusudhan Chikkature else 1208a45c6cb8SMadhusudhan Chikkature mmc_detect_change(host->mmc, (HZ * 50) / 1000); 1209a45c6cb8SMadhusudhan Chikkature } 1210a45c6cb8SMadhusudhan Chikkature 1211a45c6cb8SMadhusudhan Chikkature /* 1212a45c6cb8SMadhusudhan Chikkature * ISR for handling card insertion and removal 1213a45c6cb8SMadhusudhan Chikkature */ 121470a3341aSDenis Karpov static irqreturn_t omap_hsmmc_cd_handler(int irq, void *dev_id) 1215a45c6cb8SMadhusudhan Chikkature { 121670a3341aSDenis Karpov struct omap_hsmmc_host *host = (struct omap_hsmmc_host *)dev_id; 1217a45c6cb8SMadhusudhan Chikkature 1218a6b2240dSAdrian Hunter if (host->suspended) 1219a6b2240dSAdrian Hunter return IRQ_HANDLED; 1220a45c6cb8SMadhusudhan Chikkature schedule_work(&host->mmc_carddetect_work); 1221a45c6cb8SMadhusudhan Chikkature 1222a45c6cb8SMadhusudhan Chikkature return IRQ_HANDLED; 1223a45c6cb8SMadhusudhan Chikkature } 1224a45c6cb8SMadhusudhan Chikkature 122570a3341aSDenis Karpov static int omap_hsmmc_get_dma_sync_dev(struct omap_hsmmc_host *host, 12260ccd76d4SJuha Yrjola struct mmc_data *data) 12270ccd76d4SJuha Yrjola { 12280ccd76d4SJuha Yrjola int sync_dev; 12290ccd76d4SJuha Yrjola 1230f3e2f1ddSGrazvydas Ignotas if (data->flags & MMC_DATA_WRITE) 1231f3e2f1ddSGrazvydas Ignotas sync_dev = host->dma_line_tx; 12320ccd76d4SJuha Yrjola else 1233f3e2f1ddSGrazvydas Ignotas sync_dev = host->dma_line_rx; 12340ccd76d4SJuha Yrjola return sync_dev; 12350ccd76d4SJuha Yrjola } 12360ccd76d4SJuha Yrjola 123770a3341aSDenis Karpov static void omap_hsmmc_config_dma_params(struct omap_hsmmc_host *host, 12380ccd76d4SJuha Yrjola struct mmc_data *data, 12390ccd76d4SJuha Yrjola struct scatterlist *sgl) 12400ccd76d4SJuha Yrjola { 12410ccd76d4SJuha Yrjola int blksz, nblk, dma_ch; 12420ccd76d4SJuha Yrjola 12430ccd76d4SJuha Yrjola dma_ch = host->dma_ch; 12440ccd76d4SJuha Yrjola if (data->flags & MMC_DATA_WRITE) { 12450ccd76d4SJuha Yrjola omap_set_dma_dest_params(dma_ch, 0, OMAP_DMA_AMODE_CONSTANT, 12460ccd76d4SJuha Yrjola (host->mapbase + OMAP_HSMMC_DATA), 0, 0); 12470ccd76d4SJuha Yrjola omap_set_dma_src_params(dma_ch, 0, OMAP_DMA_AMODE_POST_INC, 12480ccd76d4SJuha Yrjola sg_dma_address(sgl), 0, 0); 12490ccd76d4SJuha Yrjola } else { 12500ccd76d4SJuha Yrjola omap_set_dma_src_params(dma_ch, 0, OMAP_DMA_AMODE_CONSTANT, 12510ccd76d4SJuha Yrjola (host->mapbase + OMAP_HSMMC_DATA), 0, 0); 12520ccd76d4SJuha Yrjola omap_set_dma_dest_params(dma_ch, 0, OMAP_DMA_AMODE_POST_INC, 12530ccd76d4SJuha Yrjola sg_dma_address(sgl), 0, 0); 12540ccd76d4SJuha Yrjola } 12550ccd76d4SJuha Yrjola 12560ccd76d4SJuha Yrjola blksz = host->data->blksz; 12570ccd76d4SJuha Yrjola nblk = sg_dma_len(sgl) / blksz; 12580ccd76d4SJuha Yrjola 12590ccd76d4SJuha Yrjola omap_set_dma_transfer_params(dma_ch, OMAP_DMA_DATA_TYPE_S32, 12600ccd76d4SJuha Yrjola blksz / 4, nblk, OMAP_DMA_SYNC_FRAME, 126170a3341aSDenis Karpov omap_hsmmc_get_dma_sync_dev(host, data), 12620ccd76d4SJuha Yrjola !(data->flags & MMC_DATA_WRITE)); 12630ccd76d4SJuha Yrjola 12640ccd76d4SJuha Yrjola omap_start_dma(dma_ch); 12650ccd76d4SJuha Yrjola } 12660ccd76d4SJuha Yrjola 1267a45c6cb8SMadhusudhan Chikkature /* 1268a45c6cb8SMadhusudhan Chikkature * DMA call back function 1269a45c6cb8SMadhusudhan Chikkature */ 1270b417577dSAdrian Hunter static void omap_hsmmc_dma_cb(int lch, u16 ch_status, void *cb_data) 1271a45c6cb8SMadhusudhan Chikkature { 1272b417577dSAdrian Hunter struct omap_hsmmc_host *host = cb_data; 1273b417577dSAdrian Hunter struct mmc_data *data = host->mrq->data; 1274b417577dSAdrian Hunter int dma_ch, req_in_progress; 1275a45c6cb8SMadhusudhan Chikkature 1276a45c6cb8SMadhusudhan Chikkature if (ch_status & OMAP2_DMA_MISALIGNED_ERR_IRQ) 1277a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "MISALIGNED_ADRS_ERR\n"); 1278a45c6cb8SMadhusudhan Chikkature 1279b417577dSAdrian Hunter spin_lock(&host->irq_lock); 1280b417577dSAdrian Hunter if (host->dma_ch < 0) { 1281b417577dSAdrian Hunter spin_unlock(&host->irq_lock); 1282a45c6cb8SMadhusudhan Chikkature return; 1283b417577dSAdrian Hunter } 1284a45c6cb8SMadhusudhan Chikkature 12850ccd76d4SJuha Yrjola host->dma_sg_idx++; 12860ccd76d4SJuha Yrjola if (host->dma_sg_idx < host->dma_len) { 12870ccd76d4SJuha Yrjola /* Fire up the next transfer. */ 1288b417577dSAdrian Hunter omap_hsmmc_config_dma_params(host, data, 1289b417577dSAdrian Hunter data->sg + host->dma_sg_idx); 1290b417577dSAdrian Hunter spin_unlock(&host->irq_lock); 12910ccd76d4SJuha Yrjola return; 12920ccd76d4SJuha Yrjola } 12930ccd76d4SJuha Yrjola 1294b417577dSAdrian Hunter dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->dma_len, 1295b417577dSAdrian Hunter omap_hsmmc_get_dma_dir(host, data)); 1296b417577dSAdrian Hunter 1297b417577dSAdrian Hunter req_in_progress = host->req_in_progress; 1298b417577dSAdrian Hunter dma_ch = host->dma_ch; 1299a45c6cb8SMadhusudhan Chikkature host->dma_ch = -1; 1300b417577dSAdrian Hunter spin_unlock(&host->irq_lock); 1301b417577dSAdrian Hunter 1302b417577dSAdrian Hunter omap_free_dma(dma_ch); 1303b417577dSAdrian Hunter 1304b417577dSAdrian Hunter /* If DMA has finished after TC, complete the request */ 1305b417577dSAdrian Hunter if (!req_in_progress) { 1306b417577dSAdrian Hunter struct mmc_request *mrq = host->mrq; 1307b417577dSAdrian Hunter 1308b417577dSAdrian Hunter host->mrq = NULL; 1309b417577dSAdrian Hunter mmc_request_done(host->mmc, mrq); 1310b417577dSAdrian Hunter } 1311a45c6cb8SMadhusudhan Chikkature } 1312a45c6cb8SMadhusudhan Chikkature 1313a45c6cb8SMadhusudhan Chikkature /* 1314a45c6cb8SMadhusudhan Chikkature * Routine to configure and start DMA for the MMC card 1315a45c6cb8SMadhusudhan Chikkature */ 131670a3341aSDenis Karpov static int omap_hsmmc_start_dma_transfer(struct omap_hsmmc_host *host, 131770a3341aSDenis Karpov struct mmc_request *req) 1318a45c6cb8SMadhusudhan Chikkature { 1319b417577dSAdrian Hunter int dma_ch = 0, ret = 0, i; 1320a45c6cb8SMadhusudhan Chikkature struct mmc_data *data = req->data; 1321a45c6cb8SMadhusudhan Chikkature 13220ccd76d4SJuha Yrjola /* Sanity check: all the SG entries must be aligned by block size. */ 1323a3f406f8SJarkko Lavinen for (i = 0; i < data->sg_len; i++) { 13240ccd76d4SJuha Yrjola struct scatterlist *sgl; 13250ccd76d4SJuha Yrjola 13260ccd76d4SJuha Yrjola sgl = data->sg + i; 13270ccd76d4SJuha Yrjola if (sgl->length % data->blksz) 13280ccd76d4SJuha Yrjola return -EINVAL; 13290ccd76d4SJuha Yrjola } 13300ccd76d4SJuha Yrjola if ((data->blksz % 4) != 0) 13310ccd76d4SJuha Yrjola /* REVISIT: The MMC buffer increments only when MSB is written. 13320ccd76d4SJuha Yrjola * Return error for blksz which is non multiple of four. 13330ccd76d4SJuha Yrjola */ 13340ccd76d4SJuha Yrjola return -EINVAL; 13350ccd76d4SJuha Yrjola 1336b417577dSAdrian Hunter BUG_ON(host->dma_ch != -1); 1337a45c6cb8SMadhusudhan Chikkature 133870a3341aSDenis Karpov ret = omap_request_dma(omap_hsmmc_get_dma_sync_dev(host, data), 133970a3341aSDenis Karpov "MMC/SD", omap_hsmmc_dma_cb, host, &dma_ch); 1340a45c6cb8SMadhusudhan Chikkature if (ret != 0) { 13410ccd76d4SJuha Yrjola dev_err(mmc_dev(host->mmc), 1342a45c6cb8SMadhusudhan Chikkature "%s: omap_request_dma() failed with %d\n", 1343a45c6cb8SMadhusudhan Chikkature mmc_hostname(host->mmc), ret); 1344a45c6cb8SMadhusudhan Chikkature return ret; 1345a45c6cb8SMadhusudhan Chikkature } 1346a45c6cb8SMadhusudhan Chikkature 1347a45c6cb8SMadhusudhan Chikkature host->dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg, 134870a3341aSDenis Karpov data->sg_len, omap_hsmmc_get_dma_dir(host, data)); 1349a45c6cb8SMadhusudhan Chikkature host->dma_ch = dma_ch; 13500ccd76d4SJuha Yrjola host->dma_sg_idx = 0; 1351a45c6cb8SMadhusudhan Chikkature 135270a3341aSDenis Karpov omap_hsmmc_config_dma_params(host, data, data->sg); 1353a45c6cb8SMadhusudhan Chikkature 1354a45c6cb8SMadhusudhan Chikkature return 0; 1355a45c6cb8SMadhusudhan Chikkature } 1356a45c6cb8SMadhusudhan Chikkature 135770a3341aSDenis Karpov static void set_data_timeout(struct omap_hsmmc_host *host, 1358e2bf08d6SAdrian Hunter unsigned int timeout_ns, 1359e2bf08d6SAdrian Hunter unsigned int timeout_clks) 1360a45c6cb8SMadhusudhan Chikkature { 1361a45c6cb8SMadhusudhan Chikkature unsigned int timeout, cycle_ns; 1362a45c6cb8SMadhusudhan Chikkature uint32_t reg, clkd, dto = 0; 1363a45c6cb8SMadhusudhan Chikkature 1364a45c6cb8SMadhusudhan Chikkature reg = OMAP_HSMMC_READ(host->base, SYSCTL); 1365a45c6cb8SMadhusudhan Chikkature clkd = (reg & CLKD_MASK) >> CLKD_SHIFT; 1366a45c6cb8SMadhusudhan Chikkature if (clkd == 0) 1367a45c6cb8SMadhusudhan Chikkature clkd = 1; 1368a45c6cb8SMadhusudhan Chikkature 1369a45c6cb8SMadhusudhan Chikkature cycle_ns = 1000000000 / (clk_get_rate(host->fclk) / clkd); 1370e2bf08d6SAdrian Hunter timeout = timeout_ns / cycle_ns; 1371e2bf08d6SAdrian Hunter timeout += timeout_clks; 1372a45c6cb8SMadhusudhan Chikkature if (timeout) { 1373a45c6cb8SMadhusudhan Chikkature while ((timeout & 0x80000000) == 0) { 1374a45c6cb8SMadhusudhan Chikkature dto += 1; 1375a45c6cb8SMadhusudhan Chikkature timeout <<= 1; 1376a45c6cb8SMadhusudhan Chikkature } 1377a45c6cb8SMadhusudhan Chikkature dto = 31 - dto; 1378a45c6cb8SMadhusudhan Chikkature timeout <<= 1; 1379a45c6cb8SMadhusudhan Chikkature if (timeout && dto) 1380a45c6cb8SMadhusudhan Chikkature dto += 1; 1381a45c6cb8SMadhusudhan Chikkature if (dto >= 13) 1382a45c6cb8SMadhusudhan Chikkature dto -= 13; 1383a45c6cb8SMadhusudhan Chikkature else 1384a45c6cb8SMadhusudhan Chikkature dto = 0; 1385a45c6cb8SMadhusudhan Chikkature if (dto > 14) 1386a45c6cb8SMadhusudhan Chikkature dto = 14; 1387a45c6cb8SMadhusudhan Chikkature } 1388a45c6cb8SMadhusudhan Chikkature 1389a45c6cb8SMadhusudhan Chikkature reg &= ~DTO_MASK; 1390a45c6cb8SMadhusudhan Chikkature reg |= dto << DTO_SHIFT; 1391a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, reg); 1392a45c6cb8SMadhusudhan Chikkature } 1393a45c6cb8SMadhusudhan Chikkature 1394a45c6cb8SMadhusudhan Chikkature /* 1395a45c6cb8SMadhusudhan Chikkature * Configure block length for MMC/SD cards and initiate the transfer. 1396a45c6cb8SMadhusudhan Chikkature */ 1397a45c6cb8SMadhusudhan Chikkature static int 139870a3341aSDenis Karpov omap_hsmmc_prepare_data(struct omap_hsmmc_host *host, struct mmc_request *req) 1399a45c6cb8SMadhusudhan Chikkature { 1400a45c6cb8SMadhusudhan Chikkature int ret; 1401a45c6cb8SMadhusudhan Chikkature host->data = req->data; 1402a45c6cb8SMadhusudhan Chikkature 1403a45c6cb8SMadhusudhan Chikkature if (req->data == NULL) { 1404a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, BLK, 0); 1405e2bf08d6SAdrian Hunter /* 1406e2bf08d6SAdrian Hunter * Set an arbitrary 100ms data timeout for commands with 1407e2bf08d6SAdrian Hunter * busy signal. 1408e2bf08d6SAdrian Hunter */ 1409e2bf08d6SAdrian Hunter if (req->cmd->flags & MMC_RSP_BUSY) 1410e2bf08d6SAdrian Hunter set_data_timeout(host, 100000000U, 0); 1411a45c6cb8SMadhusudhan Chikkature return 0; 1412a45c6cb8SMadhusudhan Chikkature } 1413a45c6cb8SMadhusudhan Chikkature 1414a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, BLK, (req->data->blksz) 1415a45c6cb8SMadhusudhan Chikkature | (req->data->blocks << 16)); 1416e2bf08d6SAdrian Hunter set_data_timeout(host, req->data->timeout_ns, req->data->timeout_clks); 1417a45c6cb8SMadhusudhan Chikkature 1418a45c6cb8SMadhusudhan Chikkature if (host->use_dma) { 141970a3341aSDenis Karpov ret = omap_hsmmc_start_dma_transfer(host, req); 1420a45c6cb8SMadhusudhan Chikkature if (ret != 0) { 1421a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "MMC start dma failure\n"); 1422a45c6cb8SMadhusudhan Chikkature return ret; 1423a45c6cb8SMadhusudhan Chikkature } 1424a45c6cb8SMadhusudhan Chikkature } 1425a45c6cb8SMadhusudhan Chikkature return 0; 1426a45c6cb8SMadhusudhan Chikkature } 1427a45c6cb8SMadhusudhan Chikkature 1428a45c6cb8SMadhusudhan Chikkature /* 1429a45c6cb8SMadhusudhan Chikkature * Request function. for read/write operation 1430a45c6cb8SMadhusudhan Chikkature */ 143170a3341aSDenis Karpov static void omap_hsmmc_request(struct mmc_host *mmc, struct mmc_request *req) 1432a45c6cb8SMadhusudhan Chikkature { 143370a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1434a3f406f8SJarkko Lavinen int err; 1435a45c6cb8SMadhusudhan Chikkature 1436b417577dSAdrian Hunter BUG_ON(host->req_in_progress); 1437b417577dSAdrian Hunter BUG_ON(host->dma_ch != -1); 1438b62f6228SAdrian Hunter if (host->protect_card) { 1439b62f6228SAdrian Hunter if (host->reqs_blocked < 3) { 1440b62f6228SAdrian Hunter /* 1441b62f6228SAdrian Hunter * Ensure the controller is left in a consistent 1442b62f6228SAdrian Hunter * state by resetting the command and data state 1443b62f6228SAdrian Hunter * machines. 1444b62f6228SAdrian Hunter */ 1445b62f6228SAdrian Hunter omap_hsmmc_reset_controller_fsm(host, SRD); 1446b62f6228SAdrian Hunter omap_hsmmc_reset_controller_fsm(host, SRC); 1447b62f6228SAdrian Hunter host->reqs_blocked += 1; 1448b62f6228SAdrian Hunter } 1449b62f6228SAdrian Hunter req->cmd->error = -EBADF; 1450b62f6228SAdrian Hunter if (req->data) 1451b62f6228SAdrian Hunter req->data->error = -EBADF; 1452b417577dSAdrian Hunter req->cmd->retries = 0; 1453b62f6228SAdrian Hunter mmc_request_done(mmc, req); 1454b62f6228SAdrian Hunter return; 1455b62f6228SAdrian Hunter } else if (host->reqs_blocked) 1456b62f6228SAdrian Hunter host->reqs_blocked = 0; 1457a45c6cb8SMadhusudhan Chikkature WARN_ON(host->mrq != NULL); 1458a45c6cb8SMadhusudhan Chikkature host->mrq = req; 145970a3341aSDenis Karpov err = omap_hsmmc_prepare_data(host, req); 1460a3f406f8SJarkko Lavinen if (err) { 1461a3f406f8SJarkko Lavinen req->cmd->error = err; 1462a3f406f8SJarkko Lavinen if (req->data) 1463a3f406f8SJarkko Lavinen req->data->error = err; 1464a3f406f8SJarkko Lavinen host->mrq = NULL; 1465a3f406f8SJarkko Lavinen mmc_request_done(mmc, req); 1466a3f406f8SJarkko Lavinen return; 1467a3f406f8SJarkko Lavinen } 1468a3f406f8SJarkko Lavinen 146970a3341aSDenis Karpov omap_hsmmc_start_command(host, req->cmd, req->data); 1470a45c6cb8SMadhusudhan Chikkature } 1471a45c6cb8SMadhusudhan Chikkature 1472a45c6cb8SMadhusudhan Chikkature /* Routine to configure clock values. Exposed API to core */ 147370a3341aSDenis Karpov static void omap_hsmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 1474a45c6cb8SMadhusudhan Chikkature { 147570a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1476a45c6cb8SMadhusudhan Chikkature u16 dsor = 0; 1477a45c6cb8SMadhusudhan Chikkature unsigned long regval; 1478a45c6cb8SMadhusudhan Chikkature unsigned long timeout; 147973153010SJarkko Lavinen u32 con; 1480a3621465SAdrian Hunter int do_send_init_stream = 0; 1481a45c6cb8SMadhusudhan Chikkature 14825e2ea617SAdrian Hunter mmc_host_enable(host->mmc); 14835e2ea617SAdrian Hunter 1484a3621465SAdrian Hunter if (ios->power_mode != host->power_mode) { 1485a45c6cb8SMadhusudhan Chikkature switch (ios->power_mode) { 1486a45c6cb8SMadhusudhan Chikkature case MMC_POWER_OFF: 1487a3621465SAdrian Hunter mmc_slot(host).set_power(host->dev, host->slot_id, 1488a3621465SAdrian Hunter 0, 0); 1489623821f7SAdrian Hunter host->vdd = 0; 1490a45c6cb8SMadhusudhan Chikkature break; 1491a45c6cb8SMadhusudhan Chikkature case MMC_POWER_UP: 1492a3621465SAdrian Hunter mmc_slot(host).set_power(host->dev, host->slot_id, 1493a3621465SAdrian Hunter 1, ios->vdd); 1494623821f7SAdrian Hunter host->vdd = ios->vdd; 1495a45c6cb8SMadhusudhan Chikkature break; 1496a3621465SAdrian Hunter case MMC_POWER_ON: 1497a3621465SAdrian Hunter do_send_init_stream = 1; 1498a3621465SAdrian Hunter break; 1499a3621465SAdrian Hunter } 1500a3621465SAdrian Hunter host->power_mode = ios->power_mode; 1501a45c6cb8SMadhusudhan Chikkature } 1502a45c6cb8SMadhusudhan Chikkature 1503dd498effSDenis Karpov /* FIXME: set registers based only on changes to ios */ 1504dd498effSDenis Karpov 150573153010SJarkko Lavinen con = OMAP_HSMMC_READ(host->base, CON); 1506a45c6cb8SMadhusudhan Chikkature switch (mmc->ios.bus_width) { 150773153010SJarkko Lavinen case MMC_BUS_WIDTH_8: 150873153010SJarkko Lavinen OMAP_HSMMC_WRITE(host->base, CON, con | DW8); 150973153010SJarkko Lavinen break; 1510a45c6cb8SMadhusudhan Chikkature case MMC_BUS_WIDTH_4: 151173153010SJarkko Lavinen OMAP_HSMMC_WRITE(host->base, CON, con & ~DW8); 1512a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 1513a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) | FOUR_BIT); 1514a45c6cb8SMadhusudhan Chikkature break; 1515a45c6cb8SMadhusudhan Chikkature case MMC_BUS_WIDTH_1: 151673153010SJarkko Lavinen OMAP_HSMMC_WRITE(host->base, CON, con & ~DW8); 1517a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 1518a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) & ~FOUR_BIT); 1519a45c6cb8SMadhusudhan Chikkature break; 1520a45c6cb8SMadhusudhan Chikkature } 1521a45c6cb8SMadhusudhan Chikkature 1522a45c6cb8SMadhusudhan Chikkature if (host->id == OMAP_MMC1_DEVID) { 1523eb250826SDavid Brownell /* Only MMC1 can interface at 3V without some flavor 1524eb250826SDavid Brownell * of external transceiver; but they all handle 1.8V. 1525eb250826SDavid Brownell */ 1526a45c6cb8SMadhusudhan Chikkature if ((OMAP_HSMMC_READ(host->base, HCTL) & SDVSDET) && 1527a45c6cb8SMadhusudhan Chikkature (ios->vdd == DUAL_VOLT_OCR_BIT)) { 1528a45c6cb8SMadhusudhan Chikkature /* 1529a45c6cb8SMadhusudhan Chikkature * The mmc_select_voltage fn of the core does 1530a45c6cb8SMadhusudhan Chikkature * not seem to set the power_mode to 1531a45c6cb8SMadhusudhan Chikkature * MMC_POWER_UP upon recalculating the voltage. 1532a45c6cb8SMadhusudhan Chikkature * vdd 1.8v. 1533a45c6cb8SMadhusudhan Chikkature */ 153470a3341aSDenis Karpov if (omap_hsmmc_switch_opcond(host, ios->vdd) != 0) 1535a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1536a45c6cb8SMadhusudhan Chikkature "Switch operation failed\n"); 1537a45c6cb8SMadhusudhan Chikkature } 1538a45c6cb8SMadhusudhan Chikkature } 1539a45c6cb8SMadhusudhan Chikkature 1540a45c6cb8SMadhusudhan Chikkature if (ios->clock) { 1541a45c6cb8SMadhusudhan Chikkature dsor = OMAP_MMC_MASTER_CLOCK / ios->clock; 1542a45c6cb8SMadhusudhan Chikkature if (dsor < 1) 1543a45c6cb8SMadhusudhan Chikkature dsor = 1; 1544a45c6cb8SMadhusudhan Chikkature 1545a45c6cb8SMadhusudhan Chikkature if (OMAP_MMC_MASTER_CLOCK / dsor > ios->clock) 1546a45c6cb8SMadhusudhan Chikkature dsor++; 1547a45c6cb8SMadhusudhan Chikkature 1548a45c6cb8SMadhusudhan Chikkature if (dsor > 250) 1549a45c6cb8SMadhusudhan Chikkature dsor = 250; 1550a45c6cb8SMadhusudhan Chikkature } 155170a3341aSDenis Karpov omap_hsmmc_stop_clock(host); 1552a45c6cb8SMadhusudhan Chikkature regval = OMAP_HSMMC_READ(host->base, SYSCTL); 1553a45c6cb8SMadhusudhan Chikkature regval = regval & ~(CLKD_MASK); 1554a45c6cb8SMadhusudhan Chikkature regval = regval | (dsor << 6) | (DTO << 16); 1555a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, regval); 1556a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, 1557a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, SYSCTL) | ICE); 1558a45c6cb8SMadhusudhan Chikkature 1559a45c6cb8SMadhusudhan Chikkature /* Wait till the ICS bit is set */ 1560a45c6cb8SMadhusudhan Chikkature timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 156111dd62a7SDenis Karpov while ((OMAP_HSMMC_READ(host->base, SYSCTL) & ICS) != ICS 1562a45c6cb8SMadhusudhan Chikkature && time_before(jiffies, timeout)) 1563a45c6cb8SMadhusudhan Chikkature msleep(1); 1564a45c6cb8SMadhusudhan Chikkature 1565a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, 1566a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, SYSCTL) | CEN); 1567a45c6cb8SMadhusudhan Chikkature 1568a3621465SAdrian Hunter if (do_send_init_stream) 1569a45c6cb8SMadhusudhan Chikkature send_init_stream(host); 1570a45c6cb8SMadhusudhan Chikkature 1571abb28e73SDenis Karpov con = OMAP_HSMMC_READ(host->base, CON); 1572a45c6cb8SMadhusudhan Chikkature if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN) 1573abb28e73SDenis Karpov OMAP_HSMMC_WRITE(host->base, CON, con | OD); 1574abb28e73SDenis Karpov else 1575abb28e73SDenis Karpov OMAP_HSMMC_WRITE(host->base, CON, con & ~OD); 15765e2ea617SAdrian Hunter 1577dd498effSDenis Karpov if (host->power_mode == MMC_POWER_OFF) 1578dd498effSDenis Karpov mmc_host_disable(host->mmc); 1579dd498effSDenis Karpov else 15805e2ea617SAdrian Hunter mmc_host_lazy_disable(host->mmc); 1581a45c6cb8SMadhusudhan Chikkature } 1582a45c6cb8SMadhusudhan Chikkature 1583a45c6cb8SMadhusudhan Chikkature static int omap_hsmmc_get_cd(struct mmc_host *mmc) 1584a45c6cb8SMadhusudhan Chikkature { 158570a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1586a45c6cb8SMadhusudhan Chikkature 1587191d1f1dSDenis Karpov if (!mmc_slot(host).card_detect) 1588a45c6cb8SMadhusudhan Chikkature return -ENOSYS; 1589db0fefc5SAdrian Hunter return mmc_slot(host).card_detect(host->dev, host->slot_id); 1590a45c6cb8SMadhusudhan Chikkature } 1591a45c6cb8SMadhusudhan Chikkature 1592a45c6cb8SMadhusudhan Chikkature static int omap_hsmmc_get_ro(struct mmc_host *mmc) 1593a45c6cb8SMadhusudhan Chikkature { 159470a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1595a45c6cb8SMadhusudhan Chikkature 1596191d1f1dSDenis Karpov if (!mmc_slot(host).get_ro) 1597a45c6cb8SMadhusudhan Chikkature return -ENOSYS; 1598191d1f1dSDenis Karpov return mmc_slot(host).get_ro(host->dev, 0); 1599a45c6cb8SMadhusudhan Chikkature } 1600a45c6cb8SMadhusudhan Chikkature 160170a3341aSDenis Karpov static void omap_hsmmc_conf_bus_power(struct omap_hsmmc_host *host) 16021b331e69SKim Kyuwon { 16031b331e69SKim Kyuwon u32 hctl, capa, value; 16041b331e69SKim Kyuwon 16051b331e69SKim Kyuwon /* Only MMC1 supports 3.0V */ 16061b331e69SKim Kyuwon if (host->id == OMAP_MMC1_DEVID) { 16071b331e69SKim Kyuwon hctl = SDVS30; 16081b331e69SKim Kyuwon capa = VS30 | VS18; 16091b331e69SKim Kyuwon } else { 16101b331e69SKim Kyuwon hctl = SDVS18; 16111b331e69SKim Kyuwon capa = VS18; 16121b331e69SKim Kyuwon } 16131b331e69SKim Kyuwon 16141b331e69SKim Kyuwon value = OMAP_HSMMC_READ(host->base, HCTL) & ~SDVS_MASK; 16151b331e69SKim Kyuwon OMAP_HSMMC_WRITE(host->base, HCTL, value | hctl); 16161b331e69SKim Kyuwon 16171b331e69SKim Kyuwon value = OMAP_HSMMC_READ(host->base, CAPA); 16181b331e69SKim Kyuwon OMAP_HSMMC_WRITE(host->base, CAPA, value | capa); 16191b331e69SKim Kyuwon 16201b331e69SKim Kyuwon /* Set the controller to AUTO IDLE mode */ 16211b331e69SKim Kyuwon value = OMAP_HSMMC_READ(host->base, SYSCONFIG); 16221b331e69SKim Kyuwon OMAP_HSMMC_WRITE(host->base, SYSCONFIG, value | AUTOIDLE); 16231b331e69SKim Kyuwon 16241b331e69SKim Kyuwon /* Set SD bus power bit */ 1625e13bb300SAdrian Hunter set_sd_bus_power(host); 16261b331e69SKim Kyuwon } 16271b331e69SKim Kyuwon 1628dd498effSDenis Karpov /* 1629dd498effSDenis Karpov * Dynamic power saving handling, FSM: 163013189e78SJarkko Lavinen * ENABLED -> DISABLED -> CARDSLEEP / REGSLEEP -> OFF 163113189e78SJarkko Lavinen * ^___________| | | 163213189e78SJarkko Lavinen * |______________________|______________________| 1633dd498effSDenis Karpov * 1634dd498effSDenis Karpov * ENABLED: mmc host is fully functional 1635dd498effSDenis Karpov * DISABLED: fclk is off 163613189e78SJarkko Lavinen * CARDSLEEP: fclk is off, card is asleep, voltage regulator is asleep 1637623821f7SAdrian Hunter * REGSLEEP: fclk is off, voltage regulator is asleep 163813189e78SJarkko Lavinen * OFF: fclk is off, voltage regulator is off 1639dd498effSDenis Karpov * 1640dd498effSDenis Karpov * Transition handlers return the timeout for the next state transition 1641dd498effSDenis Karpov * or negative error. 1642dd498effSDenis Karpov */ 1643dd498effSDenis Karpov 164413189e78SJarkko Lavinen enum {ENABLED = 0, DISABLED, CARDSLEEP, REGSLEEP, OFF}; 1645dd498effSDenis Karpov 1646dd498effSDenis Karpov /* Handler for [ENABLED -> DISABLED] transition */ 164770a3341aSDenis Karpov static int omap_hsmmc_enabled_to_disabled(struct omap_hsmmc_host *host) 1648dd498effSDenis Karpov { 164970a3341aSDenis Karpov omap_hsmmc_context_save(host); 1650dd498effSDenis Karpov clk_disable(host->fclk); 1651dd498effSDenis Karpov host->dpm_state = DISABLED; 1652dd498effSDenis Karpov 1653dd498effSDenis Karpov dev_dbg(mmc_dev(host->mmc), "ENABLED -> DISABLED\n"); 1654dd498effSDenis Karpov 1655dd498effSDenis Karpov if (host->power_mode == MMC_POWER_OFF) 1656dd498effSDenis Karpov return 0; 1657dd498effSDenis Karpov 16584380eea2SAdrian Hunter return OMAP_MMC_SLEEP_TIMEOUT; 1659dd498effSDenis Karpov } 1660dd498effSDenis Karpov 166113189e78SJarkko Lavinen /* Handler for [DISABLED -> REGSLEEP / CARDSLEEP] transition */ 166270a3341aSDenis Karpov static int omap_hsmmc_disabled_to_sleep(struct omap_hsmmc_host *host) 1663dd498effSDenis Karpov { 166413189e78SJarkko Lavinen int err, new_state; 1665dd498effSDenis Karpov 1666dd498effSDenis Karpov if (!mmc_try_claim_host(host->mmc)) 1667dd498effSDenis Karpov return 0; 1668dd498effSDenis Karpov 1669dd498effSDenis Karpov clk_enable(host->fclk); 167070a3341aSDenis Karpov omap_hsmmc_context_restore(host); 167113189e78SJarkko Lavinen if (mmc_card_can_sleep(host->mmc)) { 167213189e78SJarkko Lavinen err = mmc_card_sleep(host->mmc); 167313189e78SJarkko Lavinen if (err < 0) { 167413189e78SJarkko Lavinen clk_disable(host->fclk); 167513189e78SJarkko Lavinen mmc_release_host(host->mmc); 167613189e78SJarkko Lavinen return err; 167713189e78SJarkko Lavinen } 167813189e78SJarkko Lavinen new_state = CARDSLEEP; 167970a3341aSDenis Karpov } else { 168013189e78SJarkko Lavinen new_state = REGSLEEP; 168170a3341aSDenis Karpov } 168213189e78SJarkko Lavinen if (mmc_slot(host).set_sleep) 168313189e78SJarkko Lavinen mmc_slot(host).set_sleep(host->dev, host->slot_id, 1, 0, 168413189e78SJarkko Lavinen new_state == CARDSLEEP); 168513189e78SJarkko Lavinen /* FIXME: turn off bus power and perhaps interrupts too */ 168613189e78SJarkko Lavinen clk_disable(host->fclk); 168713189e78SJarkko Lavinen host->dpm_state = new_state; 168813189e78SJarkko Lavinen 168913189e78SJarkko Lavinen mmc_release_host(host->mmc); 169013189e78SJarkko Lavinen 169113189e78SJarkko Lavinen dev_dbg(mmc_dev(host->mmc), "DISABLED -> %s\n", 169213189e78SJarkko Lavinen host->dpm_state == CARDSLEEP ? "CARDSLEEP" : "REGSLEEP"); 1693dd498effSDenis Karpov 16941df58db8SAdrian Hunter if (mmc_slot(host).no_off) 16951df58db8SAdrian Hunter return 0; 16961df58db8SAdrian Hunter 1697dd498effSDenis Karpov if ((host->mmc->caps & MMC_CAP_NONREMOVABLE) || 1698dd498effSDenis Karpov mmc_slot(host).card_detect || 1699dd498effSDenis Karpov (mmc_slot(host).get_cover_state && 170013189e78SJarkko Lavinen mmc_slot(host).get_cover_state(host->dev, host->slot_id))) 17014380eea2SAdrian Hunter return OMAP_MMC_OFF_TIMEOUT; 170213189e78SJarkko Lavinen 170313189e78SJarkko Lavinen return 0; 1704623821f7SAdrian Hunter } 1705dd498effSDenis Karpov 170613189e78SJarkko Lavinen /* Handler for [REGSLEEP / CARDSLEEP -> OFF] transition */ 170770a3341aSDenis Karpov static int omap_hsmmc_sleep_to_off(struct omap_hsmmc_host *host) 170813189e78SJarkko Lavinen { 170913189e78SJarkko Lavinen if (!mmc_try_claim_host(host->mmc)) 171013189e78SJarkko Lavinen return 0; 1711dd498effSDenis Karpov 17121df58db8SAdrian Hunter if (mmc_slot(host).no_off) 17131df58db8SAdrian Hunter return 0; 17141df58db8SAdrian Hunter 171513189e78SJarkko Lavinen if (!((host->mmc->caps & MMC_CAP_NONREMOVABLE) || 171613189e78SJarkko Lavinen mmc_slot(host).card_detect || 171713189e78SJarkko Lavinen (mmc_slot(host).get_cover_state && 171813189e78SJarkko Lavinen mmc_slot(host).get_cover_state(host->dev, host->slot_id)))) { 171913189e78SJarkko Lavinen mmc_release_host(host->mmc); 172013189e78SJarkko Lavinen return 0; 172113189e78SJarkko Lavinen } 1722dd498effSDenis Karpov 172313189e78SJarkko Lavinen mmc_slot(host).set_power(host->dev, host->slot_id, 0, 0); 172413189e78SJarkko Lavinen host->vdd = 0; 172513189e78SJarkko Lavinen host->power_mode = MMC_POWER_OFF; 172613189e78SJarkko Lavinen 172713189e78SJarkko Lavinen dev_dbg(mmc_dev(host->mmc), "%s -> OFF\n", 172813189e78SJarkko Lavinen host->dpm_state == CARDSLEEP ? "CARDSLEEP" : "REGSLEEP"); 172913189e78SJarkko Lavinen 173013189e78SJarkko Lavinen host->dpm_state = OFF; 1731dd498effSDenis Karpov 1732dd498effSDenis Karpov mmc_release_host(host->mmc); 1733dd498effSDenis Karpov 1734dd498effSDenis Karpov return 0; 1735dd498effSDenis Karpov } 1736dd498effSDenis Karpov 1737dd498effSDenis Karpov /* Handler for [DISABLED -> ENABLED] transition */ 173870a3341aSDenis Karpov static int omap_hsmmc_disabled_to_enabled(struct omap_hsmmc_host *host) 1739dd498effSDenis Karpov { 1740dd498effSDenis Karpov int err; 1741dd498effSDenis Karpov 1742dd498effSDenis Karpov err = clk_enable(host->fclk); 1743dd498effSDenis Karpov if (err < 0) 1744dd498effSDenis Karpov return err; 1745dd498effSDenis Karpov 174670a3341aSDenis Karpov omap_hsmmc_context_restore(host); 1747dd498effSDenis Karpov host->dpm_state = ENABLED; 1748dd498effSDenis Karpov 1749dd498effSDenis Karpov dev_dbg(mmc_dev(host->mmc), "DISABLED -> ENABLED\n"); 1750dd498effSDenis Karpov 1751dd498effSDenis Karpov return 0; 1752dd498effSDenis Karpov } 1753dd498effSDenis Karpov 175413189e78SJarkko Lavinen /* Handler for [SLEEP -> ENABLED] transition */ 175570a3341aSDenis Karpov static int omap_hsmmc_sleep_to_enabled(struct omap_hsmmc_host *host) 175613189e78SJarkko Lavinen { 175713189e78SJarkko Lavinen if (!mmc_try_claim_host(host->mmc)) 175813189e78SJarkko Lavinen return 0; 175913189e78SJarkko Lavinen 176013189e78SJarkko Lavinen clk_enable(host->fclk); 176170a3341aSDenis Karpov omap_hsmmc_context_restore(host); 176213189e78SJarkko Lavinen if (mmc_slot(host).set_sleep) 176313189e78SJarkko Lavinen mmc_slot(host).set_sleep(host->dev, host->slot_id, 0, 176413189e78SJarkko Lavinen host->vdd, host->dpm_state == CARDSLEEP); 176513189e78SJarkko Lavinen if (mmc_card_can_sleep(host->mmc)) 176613189e78SJarkko Lavinen mmc_card_awake(host->mmc); 176713189e78SJarkko Lavinen 176813189e78SJarkko Lavinen dev_dbg(mmc_dev(host->mmc), "%s -> ENABLED\n", 176913189e78SJarkko Lavinen host->dpm_state == CARDSLEEP ? "CARDSLEEP" : "REGSLEEP"); 177013189e78SJarkko Lavinen 177113189e78SJarkko Lavinen host->dpm_state = ENABLED; 177213189e78SJarkko Lavinen 177313189e78SJarkko Lavinen mmc_release_host(host->mmc); 177413189e78SJarkko Lavinen 177513189e78SJarkko Lavinen return 0; 177613189e78SJarkko Lavinen } 177713189e78SJarkko Lavinen 1778dd498effSDenis Karpov /* Handler for [OFF -> ENABLED] transition */ 177970a3341aSDenis Karpov static int omap_hsmmc_off_to_enabled(struct omap_hsmmc_host *host) 1780dd498effSDenis Karpov { 1781dd498effSDenis Karpov clk_enable(host->fclk); 1782dd498effSDenis Karpov 178370a3341aSDenis Karpov omap_hsmmc_context_restore(host); 178470a3341aSDenis Karpov omap_hsmmc_conf_bus_power(host); 1785dd498effSDenis Karpov mmc_power_restore_host(host->mmc); 1786dd498effSDenis Karpov 1787dd498effSDenis Karpov host->dpm_state = ENABLED; 1788dd498effSDenis Karpov 1789dd498effSDenis Karpov dev_dbg(mmc_dev(host->mmc), "OFF -> ENABLED\n"); 1790dd498effSDenis Karpov 1791dd498effSDenis Karpov return 0; 1792dd498effSDenis Karpov } 1793dd498effSDenis Karpov 1794dd498effSDenis Karpov /* 1795dd498effSDenis Karpov * Bring MMC host to ENABLED from any other PM state. 1796dd498effSDenis Karpov */ 179770a3341aSDenis Karpov static int omap_hsmmc_enable(struct mmc_host *mmc) 1798dd498effSDenis Karpov { 179970a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1800dd498effSDenis Karpov 1801dd498effSDenis Karpov switch (host->dpm_state) { 1802dd498effSDenis Karpov case DISABLED: 180370a3341aSDenis Karpov return omap_hsmmc_disabled_to_enabled(host); 180413189e78SJarkko Lavinen case CARDSLEEP: 1805623821f7SAdrian Hunter case REGSLEEP: 180670a3341aSDenis Karpov return omap_hsmmc_sleep_to_enabled(host); 1807dd498effSDenis Karpov case OFF: 180870a3341aSDenis Karpov return omap_hsmmc_off_to_enabled(host); 1809dd498effSDenis Karpov default: 1810dd498effSDenis Karpov dev_dbg(mmc_dev(host->mmc), "UNKNOWN state\n"); 1811dd498effSDenis Karpov return -EINVAL; 1812dd498effSDenis Karpov } 1813dd498effSDenis Karpov } 1814dd498effSDenis Karpov 1815dd498effSDenis Karpov /* 1816dd498effSDenis Karpov * Bring MMC host in PM state (one level deeper). 1817dd498effSDenis Karpov */ 181870a3341aSDenis Karpov static int omap_hsmmc_disable(struct mmc_host *mmc, int lazy) 1819dd498effSDenis Karpov { 182070a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1821dd498effSDenis Karpov 1822dd498effSDenis Karpov switch (host->dpm_state) { 1823dd498effSDenis Karpov case ENABLED: { 1824dd498effSDenis Karpov int delay; 1825dd498effSDenis Karpov 182670a3341aSDenis Karpov delay = omap_hsmmc_enabled_to_disabled(host); 1827dd498effSDenis Karpov if (lazy || delay < 0) 1828dd498effSDenis Karpov return delay; 1829dd498effSDenis Karpov return 0; 1830dd498effSDenis Karpov } 1831dd498effSDenis Karpov case DISABLED: 183270a3341aSDenis Karpov return omap_hsmmc_disabled_to_sleep(host); 183313189e78SJarkko Lavinen case CARDSLEEP: 183413189e78SJarkko Lavinen case REGSLEEP: 183570a3341aSDenis Karpov return omap_hsmmc_sleep_to_off(host); 1836dd498effSDenis Karpov default: 1837dd498effSDenis Karpov dev_dbg(mmc_dev(host->mmc), "UNKNOWN state\n"); 1838dd498effSDenis Karpov return -EINVAL; 1839dd498effSDenis Karpov } 1840dd498effSDenis Karpov } 1841dd498effSDenis Karpov 184270a3341aSDenis Karpov static int omap_hsmmc_enable_fclk(struct mmc_host *mmc) 1843dd498effSDenis Karpov { 184470a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1845dd498effSDenis Karpov int err; 1846dd498effSDenis Karpov 1847dd498effSDenis Karpov err = clk_enable(host->fclk); 1848dd498effSDenis Karpov if (err) 1849dd498effSDenis Karpov return err; 1850dd498effSDenis Karpov dev_dbg(mmc_dev(host->mmc), "mmc_fclk: enabled\n"); 185170a3341aSDenis Karpov omap_hsmmc_context_restore(host); 1852dd498effSDenis Karpov return 0; 1853dd498effSDenis Karpov } 1854dd498effSDenis Karpov 185570a3341aSDenis Karpov static int omap_hsmmc_disable_fclk(struct mmc_host *mmc, int lazy) 1856dd498effSDenis Karpov { 185770a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1858dd498effSDenis Karpov 185970a3341aSDenis Karpov omap_hsmmc_context_save(host); 1860dd498effSDenis Karpov clk_disable(host->fclk); 1861dd498effSDenis Karpov dev_dbg(mmc_dev(host->mmc), "mmc_fclk: disabled\n"); 1862dd498effSDenis Karpov return 0; 1863dd498effSDenis Karpov } 1864dd498effSDenis Karpov 186570a3341aSDenis Karpov static const struct mmc_host_ops omap_hsmmc_ops = { 186670a3341aSDenis Karpov .enable = omap_hsmmc_enable_fclk, 186770a3341aSDenis Karpov .disable = omap_hsmmc_disable_fclk, 186870a3341aSDenis Karpov .request = omap_hsmmc_request, 186970a3341aSDenis Karpov .set_ios = omap_hsmmc_set_ios, 1870dd498effSDenis Karpov .get_cd = omap_hsmmc_get_cd, 1871dd498effSDenis Karpov .get_ro = omap_hsmmc_get_ro, 1872dd498effSDenis Karpov /* NYET -- enable_sdio_irq */ 1873dd498effSDenis Karpov }; 1874dd498effSDenis Karpov 187570a3341aSDenis Karpov static const struct mmc_host_ops omap_hsmmc_ps_ops = { 187670a3341aSDenis Karpov .enable = omap_hsmmc_enable, 187770a3341aSDenis Karpov .disable = omap_hsmmc_disable, 187870a3341aSDenis Karpov .request = omap_hsmmc_request, 187970a3341aSDenis Karpov .set_ios = omap_hsmmc_set_ios, 1880a45c6cb8SMadhusudhan Chikkature .get_cd = omap_hsmmc_get_cd, 1881a45c6cb8SMadhusudhan Chikkature .get_ro = omap_hsmmc_get_ro, 1882a45c6cb8SMadhusudhan Chikkature /* NYET -- enable_sdio_irq */ 1883a45c6cb8SMadhusudhan Chikkature }; 1884a45c6cb8SMadhusudhan Chikkature 1885d900f712SDenis Karpov #ifdef CONFIG_DEBUG_FS 1886d900f712SDenis Karpov 188770a3341aSDenis Karpov static int omap_hsmmc_regs_show(struct seq_file *s, void *data) 1888d900f712SDenis Karpov { 1889d900f712SDenis Karpov struct mmc_host *mmc = s->private; 189070a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 189111dd62a7SDenis Karpov int context_loss = 0; 189211dd62a7SDenis Karpov 189370a3341aSDenis Karpov if (host->pdata->get_context_loss_count) 189470a3341aSDenis Karpov context_loss = host->pdata->get_context_loss_count(host->dev); 1895d900f712SDenis Karpov 18965e2ea617SAdrian Hunter seq_printf(s, "mmc%d:\n" 18975e2ea617SAdrian Hunter " enabled:\t%d\n" 1898dd498effSDenis Karpov " dpm_state:\t%d\n" 18995e2ea617SAdrian Hunter " nesting_cnt:\t%d\n" 190011dd62a7SDenis Karpov " ctx_loss:\t%d:%d\n" 19015e2ea617SAdrian Hunter "\nregs:\n", 1902dd498effSDenis Karpov mmc->index, mmc->enabled ? 1 : 0, 1903dd498effSDenis Karpov host->dpm_state, mmc->nesting_cnt, 190411dd62a7SDenis Karpov host->context_loss, context_loss); 19055e2ea617SAdrian Hunter 190613189e78SJarkko Lavinen if (host->suspended || host->dpm_state == OFF) { 1907dd498effSDenis Karpov seq_printf(s, "host suspended, can't read registers\n"); 1908dd498effSDenis Karpov return 0; 1909dd498effSDenis Karpov } 1910dd498effSDenis Karpov 19115e2ea617SAdrian Hunter if (clk_enable(host->fclk) != 0) { 19125e2ea617SAdrian Hunter seq_printf(s, "can't read the regs\n"); 1913dd498effSDenis Karpov return 0; 19145e2ea617SAdrian Hunter } 1915d900f712SDenis Karpov 1916d900f712SDenis Karpov seq_printf(s, "SYSCONFIG:\t0x%08x\n", 1917d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCONFIG)); 1918d900f712SDenis Karpov seq_printf(s, "CON:\t\t0x%08x\n", 1919d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, CON)); 1920d900f712SDenis Karpov seq_printf(s, "HCTL:\t\t0x%08x\n", 1921d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, HCTL)); 1922d900f712SDenis Karpov seq_printf(s, "SYSCTL:\t\t0x%08x\n", 1923d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCTL)); 1924d900f712SDenis Karpov seq_printf(s, "IE:\t\t0x%08x\n", 1925d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, IE)); 1926d900f712SDenis Karpov seq_printf(s, "ISE:\t\t0x%08x\n", 1927d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, ISE)); 1928d900f712SDenis Karpov seq_printf(s, "CAPA:\t\t0x%08x\n", 1929d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, CAPA)); 19305e2ea617SAdrian Hunter 19315e2ea617SAdrian Hunter clk_disable(host->fclk); 1932dd498effSDenis Karpov 1933d900f712SDenis Karpov return 0; 1934d900f712SDenis Karpov } 1935d900f712SDenis Karpov 193670a3341aSDenis Karpov static int omap_hsmmc_regs_open(struct inode *inode, struct file *file) 1937d900f712SDenis Karpov { 193870a3341aSDenis Karpov return single_open(file, omap_hsmmc_regs_show, inode->i_private); 1939d900f712SDenis Karpov } 1940d900f712SDenis Karpov 1941d900f712SDenis Karpov static const struct file_operations mmc_regs_fops = { 194270a3341aSDenis Karpov .open = omap_hsmmc_regs_open, 1943d900f712SDenis Karpov .read = seq_read, 1944d900f712SDenis Karpov .llseek = seq_lseek, 1945d900f712SDenis Karpov .release = single_release, 1946d900f712SDenis Karpov }; 1947d900f712SDenis Karpov 194870a3341aSDenis Karpov static void omap_hsmmc_debugfs(struct mmc_host *mmc) 1949d900f712SDenis Karpov { 1950d900f712SDenis Karpov if (mmc->debugfs_root) 1951d900f712SDenis Karpov debugfs_create_file("regs", S_IRUSR, mmc->debugfs_root, 1952d900f712SDenis Karpov mmc, &mmc_regs_fops); 1953d900f712SDenis Karpov } 1954d900f712SDenis Karpov 1955d900f712SDenis Karpov #else 1956d900f712SDenis Karpov 195770a3341aSDenis Karpov static void omap_hsmmc_debugfs(struct mmc_host *mmc) 1958d900f712SDenis Karpov { 1959d900f712SDenis Karpov } 1960d900f712SDenis Karpov 1961d900f712SDenis Karpov #endif 1962d900f712SDenis Karpov 196370a3341aSDenis Karpov static int __init omap_hsmmc_probe(struct platform_device *pdev) 1964a45c6cb8SMadhusudhan Chikkature { 1965a45c6cb8SMadhusudhan Chikkature struct omap_mmc_platform_data *pdata = pdev->dev.platform_data; 1966a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc; 196770a3341aSDenis Karpov struct omap_hsmmc_host *host = NULL; 1968a45c6cb8SMadhusudhan Chikkature struct resource *res; 1969db0fefc5SAdrian Hunter int ret, irq; 1970a45c6cb8SMadhusudhan Chikkature 1971a45c6cb8SMadhusudhan Chikkature if (pdata == NULL) { 1972a45c6cb8SMadhusudhan Chikkature dev_err(&pdev->dev, "Platform Data is missing\n"); 1973a45c6cb8SMadhusudhan Chikkature return -ENXIO; 1974a45c6cb8SMadhusudhan Chikkature } 1975a45c6cb8SMadhusudhan Chikkature 1976a45c6cb8SMadhusudhan Chikkature if (pdata->nr_slots == 0) { 1977a45c6cb8SMadhusudhan Chikkature dev_err(&pdev->dev, "No Slots\n"); 1978a45c6cb8SMadhusudhan Chikkature return -ENXIO; 1979a45c6cb8SMadhusudhan Chikkature } 1980a45c6cb8SMadhusudhan Chikkature 1981a45c6cb8SMadhusudhan Chikkature res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1982a45c6cb8SMadhusudhan Chikkature irq = platform_get_irq(pdev, 0); 1983a45c6cb8SMadhusudhan Chikkature if (res == NULL || irq < 0) 1984a45c6cb8SMadhusudhan Chikkature return -ENXIO; 1985a45c6cb8SMadhusudhan Chikkature 1986a45c6cb8SMadhusudhan Chikkature res = request_mem_region(res->start, res->end - res->start + 1, 1987a45c6cb8SMadhusudhan Chikkature pdev->name); 1988a45c6cb8SMadhusudhan Chikkature if (res == NULL) 1989a45c6cb8SMadhusudhan Chikkature return -EBUSY; 1990a45c6cb8SMadhusudhan Chikkature 1991db0fefc5SAdrian Hunter ret = omap_hsmmc_gpio_init(pdata); 1992db0fefc5SAdrian Hunter if (ret) 1993db0fefc5SAdrian Hunter goto err; 1994db0fefc5SAdrian Hunter 199570a3341aSDenis Karpov mmc = mmc_alloc_host(sizeof(struct omap_hsmmc_host), &pdev->dev); 1996a45c6cb8SMadhusudhan Chikkature if (!mmc) { 1997a45c6cb8SMadhusudhan Chikkature ret = -ENOMEM; 1998db0fefc5SAdrian Hunter goto err_alloc; 1999a45c6cb8SMadhusudhan Chikkature } 2000a45c6cb8SMadhusudhan Chikkature 2001a45c6cb8SMadhusudhan Chikkature host = mmc_priv(mmc); 2002a45c6cb8SMadhusudhan Chikkature host->mmc = mmc; 2003a45c6cb8SMadhusudhan Chikkature host->pdata = pdata; 2004a45c6cb8SMadhusudhan Chikkature host->dev = &pdev->dev; 2005a45c6cb8SMadhusudhan Chikkature host->use_dma = 1; 2006a45c6cb8SMadhusudhan Chikkature host->dev->dma_mask = &pdata->dma_mask; 2007a45c6cb8SMadhusudhan Chikkature host->dma_ch = -1; 2008a45c6cb8SMadhusudhan Chikkature host->irq = irq; 2009a45c6cb8SMadhusudhan Chikkature host->id = pdev->id; 2010a45c6cb8SMadhusudhan Chikkature host->slot_id = 0; 2011a45c6cb8SMadhusudhan Chikkature host->mapbase = res->start; 2012a45c6cb8SMadhusudhan Chikkature host->base = ioremap(host->mapbase, SZ_4K); 20136da20c89SAdrian Hunter host->power_mode = MMC_POWER_OFF; 2014a45c6cb8SMadhusudhan Chikkature 2015a45c6cb8SMadhusudhan Chikkature platform_set_drvdata(pdev, host); 201670a3341aSDenis Karpov INIT_WORK(&host->mmc_carddetect_work, omap_hsmmc_detect); 2017a45c6cb8SMadhusudhan Chikkature 2018191d1f1dSDenis Karpov if (mmc_slot(host).power_saving) 201970a3341aSDenis Karpov mmc->ops = &omap_hsmmc_ps_ops; 2020dd498effSDenis Karpov else 202170a3341aSDenis Karpov mmc->ops = &omap_hsmmc_ops; 2022dd498effSDenis Karpov 2023e0eb2424SAdrian Hunter /* 2024e0eb2424SAdrian Hunter * If regulator_disable can only put vcc_aux to sleep then there is 2025e0eb2424SAdrian Hunter * no off state. 2026e0eb2424SAdrian Hunter */ 2027e0eb2424SAdrian Hunter if (mmc_slot(host).vcc_aux_disable_is_sleep) 2028e0eb2424SAdrian Hunter mmc_slot(host).no_off = 1; 2029e0eb2424SAdrian Hunter 2030a45c6cb8SMadhusudhan Chikkature mmc->f_min = 400000; 2031a45c6cb8SMadhusudhan Chikkature mmc->f_max = 52000000; 2032a45c6cb8SMadhusudhan Chikkature 20334dffd7a2SAdrian Hunter spin_lock_init(&host->irq_lock); 2034a45c6cb8SMadhusudhan Chikkature 20356f7607ccSRussell King host->iclk = clk_get(&pdev->dev, "ick"); 2036a45c6cb8SMadhusudhan Chikkature if (IS_ERR(host->iclk)) { 2037a45c6cb8SMadhusudhan Chikkature ret = PTR_ERR(host->iclk); 2038a45c6cb8SMadhusudhan Chikkature host->iclk = NULL; 2039a45c6cb8SMadhusudhan Chikkature goto err1; 2040a45c6cb8SMadhusudhan Chikkature } 20416f7607ccSRussell King host->fclk = clk_get(&pdev->dev, "fck"); 2042a45c6cb8SMadhusudhan Chikkature if (IS_ERR(host->fclk)) { 2043a45c6cb8SMadhusudhan Chikkature ret = PTR_ERR(host->fclk); 2044a45c6cb8SMadhusudhan Chikkature host->fclk = NULL; 2045a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 2046a45c6cb8SMadhusudhan Chikkature goto err1; 2047a45c6cb8SMadhusudhan Chikkature } 2048a45c6cb8SMadhusudhan Chikkature 204970a3341aSDenis Karpov omap_hsmmc_context_save(host); 205011dd62a7SDenis Karpov 20515e2ea617SAdrian Hunter mmc->caps |= MMC_CAP_DISABLE; 2052dd498effSDenis Karpov mmc_set_disable_delay(mmc, OMAP_MMC_DISABLED_TIMEOUT); 2053dd498effSDenis Karpov /* we start off in DISABLED state */ 2054dd498effSDenis Karpov host->dpm_state = DISABLED; 2055dd498effSDenis Karpov 20565e2ea617SAdrian Hunter if (mmc_host_enable(host->mmc) != 0) { 2057a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 2058a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 2059a45c6cb8SMadhusudhan Chikkature goto err1; 2060a45c6cb8SMadhusudhan Chikkature } 2061a45c6cb8SMadhusudhan Chikkature 2062a45c6cb8SMadhusudhan Chikkature if (clk_enable(host->iclk) != 0) { 20635e2ea617SAdrian Hunter mmc_host_disable(host->mmc); 2064a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 2065a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 2066a45c6cb8SMadhusudhan Chikkature goto err1; 2067a45c6cb8SMadhusudhan Chikkature } 2068a45c6cb8SMadhusudhan Chikkature 20692bec0893SAdrian Hunter if (cpu_is_omap2430()) { 2070a45c6cb8SMadhusudhan Chikkature host->dbclk = clk_get(&pdev->dev, "mmchsdb_fck"); 2071a45c6cb8SMadhusudhan Chikkature /* 2072a45c6cb8SMadhusudhan Chikkature * MMC can still work without debounce clock. 2073a45c6cb8SMadhusudhan Chikkature */ 2074a45c6cb8SMadhusudhan Chikkature if (IS_ERR(host->dbclk)) 20752bec0893SAdrian Hunter dev_warn(mmc_dev(host->mmc), 20762bec0893SAdrian Hunter "Failed to get debounce clock\n"); 2077a45c6cb8SMadhusudhan Chikkature else 20782bec0893SAdrian Hunter host->got_dbclk = 1; 20792bec0893SAdrian Hunter 20802bec0893SAdrian Hunter if (host->got_dbclk) 2081a45c6cb8SMadhusudhan Chikkature if (clk_enable(host->dbclk) != 0) 2082a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Enabling debounce" 2083a45c6cb8SMadhusudhan Chikkature " clk failed\n"); 20842bec0893SAdrian Hunter } 2085a45c6cb8SMadhusudhan Chikkature 20860ccd76d4SJuha Yrjola /* Since we do only SG emulation, we can have as many segs 20870ccd76d4SJuha Yrjola * as we want. */ 20880ccd76d4SJuha Yrjola mmc->max_phys_segs = 1024; 20890ccd76d4SJuha Yrjola mmc->max_hw_segs = 1024; 20900ccd76d4SJuha Yrjola 2091a45c6cb8SMadhusudhan Chikkature mmc->max_blk_size = 512; /* Block Length at max can be 1024 */ 2092a45c6cb8SMadhusudhan Chikkature mmc->max_blk_count = 0xFFFF; /* No. of Blocks is 16 bits */ 2093a45c6cb8SMadhusudhan Chikkature mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; 2094a45c6cb8SMadhusudhan Chikkature mmc->max_seg_size = mmc->max_req_size; 2095a45c6cb8SMadhusudhan Chikkature 209613189e78SJarkko Lavinen mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED | 209713189e78SJarkko Lavinen MMC_CAP_WAIT_WHILE_BUSY; 2098a45c6cb8SMadhusudhan Chikkature 2099191d1f1dSDenis Karpov if (mmc_slot(host).wires >= 8) 210073153010SJarkko Lavinen mmc->caps |= MMC_CAP_8_BIT_DATA; 2101191d1f1dSDenis Karpov else if (mmc_slot(host).wires >= 4) 2102a45c6cb8SMadhusudhan Chikkature mmc->caps |= MMC_CAP_4_BIT_DATA; 2103a45c6cb8SMadhusudhan Chikkature 2104191d1f1dSDenis Karpov if (mmc_slot(host).nonremovable) 210523d99bb9SAdrian Hunter mmc->caps |= MMC_CAP_NONREMOVABLE; 210623d99bb9SAdrian Hunter 210770a3341aSDenis Karpov omap_hsmmc_conf_bus_power(host); 2108a45c6cb8SMadhusudhan Chikkature 2109f3e2f1ddSGrazvydas Ignotas /* Select DMA lines */ 2110f3e2f1ddSGrazvydas Ignotas switch (host->id) { 2111f3e2f1ddSGrazvydas Ignotas case OMAP_MMC1_DEVID: 2112f3e2f1ddSGrazvydas Ignotas host->dma_line_tx = OMAP24XX_DMA_MMC1_TX; 2113f3e2f1ddSGrazvydas Ignotas host->dma_line_rx = OMAP24XX_DMA_MMC1_RX; 2114f3e2f1ddSGrazvydas Ignotas break; 2115f3e2f1ddSGrazvydas Ignotas case OMAP_MMC2_DEVID: 2116f3e2f1ddSGrazvydas Ignotas host->dma_line_tx = OMAP24XX_DMA_MMC2_TX; 2117f3e2f1ddSGrazvydas Ignotas host->dma_line_rx = OMAP24XX_DMA_MMC2_RX; 2118f3e2f1ddSGrazvydas Ignotas break; 2119f3e2f1ddSGrazvydas Ignotas case OMAP_MMC3_DEVID: 2120f3e2f1ddSGrazvydas Ignotas host->dma_line_tx = OMAP34XX_DMA_MMC3_TX; 2121f3e2f1ddSGrazvydas Ignotas host->dma_line_rx = OMAP34XX_DMA_MMC3_RX; 2122f3e2f1ddSGrazvydas Ignotas break; 212382cf818dSkishore kadiyala case OMAP_MMC4_DEVID: 212482cf818dSkishore kadiyala host->dma_line_tx = OMAP44XX_DMA_MMC4_TX; 212582cf818dSkishore kadiyala host->dma_line_rx = OMAP44XX_DMA_MMC4_RX; 212682cf818dSkishore kadiyala break; 212782cf818dSkishore kadiyala case OMAP_MMC5_DEVID: 212882cf818dSkishore kadiyala host->dma_line_tx = OMAP44XX_DMA_MMC5_TX; 212982cf818dSkishore kadiyala host->dma_line_rx = OMAP44XX_DMA_MMC5_RX; 213082cf818dSkishore kadiyala break; 2131f3e2f1ddSGrazvydas Ignotas default: 2132f3e2f1ddSGrazvydas Ignotas dev_err(mmc_dev(host->mmc), "Invalid MMC id\n"); 2133f3e2f1ddSGrazvydas Ignotas goto err_irq; 2134a45c6cb8SMadhusudhan Chikkature } 2135a45c6cb8SMadhusudhan Chikkature 2136a45c6cb8SMadhusudhan Chikkature /* Request IRQ for MMC operations */ 213770a3341aSDenis Karpov ret = request_irq(host->irq, omap_hsmmc_irq, IRQF_DISABLED, 2138a45c6cb8SMadhusudhan Chikkature mmc_hostname(mmc), host); 2139a45c6cb8SMadhusudhan Chikkature if (ret) { 2140a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Unable to grab HSMMC IRQ\n"); 2141a45c6cb8SMadhusudhan Chikkature goto err_irq; 2142a45c6cb8SMadhusudhan Chikkature } 2143a45c6cb8SMadhusudhan Chikkature 2144a45c6cb8SMadhusudhan Chikkature if (pdata->init != NULL) { 2145a45c6cb8SMadhusudhan Chikkature if (pdata->init(&pdev->dev) != 0) { 214670a3341aSDenis Karpov dev_dbg(mmc_dev(host->mmc), 214770a3341aSDenis Karpov "Unable to configure MMC IRQs\n"); 2148a45c6cb8SMadhusudhan Chikkature goto err_irq_cd_init; 2149a45c6cb8SMadhusudhan Chikkature } 2150a45c6cb8SMadhusudhan Chikkature } 2151db0fefc5SAdrian Hunter 2152b702b106SAdrian Hunter if (omap_hsmmc_have_reg() && !mmc_slot(host).set_power) { 2153db0fefc5SAdrian Hunter ret = omap_hsmmc_reg_get(host); 2154db0fefc5SAdrian Hunter if (ret) 2155db0fefc5SAdrian Hunter goto err_reg; 2156db0fefc5SAdrian Hunter host->use_reg = 1; 2157db0fefc5SAdrian Hunter } 2158db0fefc5SAdrian Hunter 2159b583f26dSDavid Brownell mmc->ocr_avail = mmc_slot(host).ocr_mask; 2160a45c6cb8SMadhusudhan Chikkature 2161a45c6cb8SMadhusudhan Chikkature /* Request IRQ for card detect */ 2162e1a55f5eSAdrian Hunter if ((mmc_slot(host).card_detect_irq)) { 2163a45c6cb8SMadhusudhan Chikkature ret = request_irq(mmc_slot(host).card_detect_irq, 216470a3341aSDenis Karpov omap_hsmmc_cd_handler, 2165a45c6cb8SMadhusudhan Chikkature IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING 2166a45c6cb8SMadhusudhan Chikkature | IRQF_DISABLED, 2167a45c6cb8SMadhusudhan Chikkature mmc_hostname(mmc), host); 2168a45c6cb8SMadhusudhan Chikkature if (ret) { 2169a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 2170a45c6cb8SMadhusudhan Chikkature "Unable to grab MMC CD IRQ\n"); 2171a45c6cb8SMadhusudhan Chikkature goto err_irq_cd; 2172a45c6cb8SMadhusudhan Chikkature } 2173a45c6cb8SMadhusudhan Chikkature } 2174a45c6cb8SMadhusudhan Chikkature 2175b417577dSAdrian Hunter omap_hsmmc_disable_irq(host); 2176a45c6cb8SMadhusudhan Chikkature 21775e2ea617SAdrian Hunter mmc_host_lazy_disable(host->mmc); 21785e2ea617SAdrian Hunter 2179b62f6228SAdrian Hunter omap_hsmmc_protect_card(host); 2180b62f6228SAdrian Hunter 2181a45c6cb8SMadhusudhan Chikkature mmc_add_host(mmc); 2182a45c6cb8SMadhusudhan Chikkature 2183191d1f1dSDenis Karpov if (mmc_slot(host).name != NULL) { 2184a45c6cb8SMadhusudhan Chikkature ret = device_create_file(&mmc->class_dev, &dev_attr_slot_name); 2185a45c6cb8SMadhusudhan Chikkature if (ret < 0) 2186a45c6cb8SMadhusudhan Chikkature goto err_slot_name; 2187a45c6cb8SMadhusudhan Chikkature } 2188191d1f1dSDenis Karpov if (mmc_slot(host).card_detect_irq && mmc_slot(host).get_cover_state) { 2189a45c6cb8SMadhusudhan Chikkature ret = device_create_file(&mmc->class_dev, 2190a45c6cb8SMadhusudhan Chikkature &dev_attr_cover_switch); 2191a45c6cb8SMadhusudhan Chikkature if (ret < 0) 2192db0fefc5SAdrian Hunter goto err_slot_name; 2193a45c6cb8SMadhusudhan Chikkature } 2194a45c6cb8SMadhusudhan Chikkature 219570a3341aSDenis Karpov omap_hsmmc_debugfs(mmc); 2196d900f712SDenis Karpov 2197a45c6cb8SMadhusudhan Chikkature return 0; 2198a45c6cb8SMadhusudhan Chikkature 2199a45c6cb8SMadhusudhan Chikkature err_slot_name: 2200a45c6cb8SMadhusudhan Chikkature mmc_remove_host(mmc); 2201a45c6cb8SMadhusudhan Chikkature free_irq(mmc_slot(host).card_detect_irq, host); 2202db0fefc5SAdrian Hunter err_irq_cd: 2203db0fefc5SAdrian Hunter if (host->use_reg) 2204db0fefc5SAdrian Hunter omap_hsmmc_reg_put(host); 2205db0fefc5SAdrian Hunter err_reg: 2206db0fefc5SAdrian Hunter if (host->pdata->cleanup) 2207db0fefc5SAdrian Hunter host->pdata->cleanup(&pdev->dev); 2208a45c6cb8SMadhusudhan Chikkature err_irq_cd_init: 2209a45c6cb8SMadhusudhan Chikkature free_irq(host->irq, host); 2210a45c6cb8SMadhusudhan Chikkature err_irq: 22115e2ea617SAdrian Hunter mmc_host_disable(host->mmc); 2212a45c6cb8SMadhusudhan Chikkature clk_disable(host->iclk); 2213a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 2214a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 22152bec0893SAdrian Hunter if (host->got_dbclk) { 2216a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 2217a45c6cb8SMadhusudhan Chikkature clk_put(host->dbclk); 2218a45c6cb8SMadhusudhan Chikkature } 2219a45c6cb8SMadhusudhan Chikkature err1: 2220a45c6cb8SMadhusudhan Chikkature iounmap(host->base); 2221db0fefc5SAdrian Hunter platform_set_drvdata(pdev, NULL); 2222a45c6cb8SMadhusudhan Chikkature mmc_free_host(mmc); 2223db0fefc5SAdrian Hunter err_alloc: 2224db0fefc5SAdrian Hunter omap_hsmmc_gpio_free(pdata); 2225db0fefc5SAdrian Hunter err: 2226db0fefc5SAdrian Hunter release_mem_region(res->start, res->end - res->start + 1); 2227a45c6cb8SMadhusudhan Chikkature return ret; 2228a45c6cb8SMadhusudhan Chikkature } 2229a45c6cb8SMadhusudhan Chikkature 223070a3341aSDenis Karpov static int omap_hsmmc_remove(struct platform_device *pdev) 2231a45c6cb8SMadhusudhan Chikkature { 223270a3341aSDenis Karpov struct omap_hsmmc_host *host = platform_get_drvdata(pdev); 2233a45c6cb8SMadhusudhan Chikkature struct resource *res; 2234a45c6cb8SMadhusudhan Chikkature 2235a45c6cb8SMadhusudhan Chikkature if (host) { 22365e2ea617SAdrian Hunter mmc_host_enable(host->mmc); 2237a45c6cb8SMadhusudhan Chikkature mmc_remove_host(host->mmc); 2238db0fefc5SAdrian Hunter if (host->use_reg) 2239db0fefc5SAdrian Hunter omap_hsmmc_reg_put(host); 2240a45c6cb8SMadhusudhan Chikkature if (host->pdata->cleanup) 2241a45c6cb8SMadhusudhan Chikkature host->pdata->cleanup(&pdev->dev); 2242a45c6cb8SMadhusudhan Chikkature free_irq(host->irq, host); 2243a45c6cb8SMadhusudhan Chikkature if (mmc_slot(host).card_detect_irq) 2244a45c6cb8SMadhusudhan Chikkature free_irq(mmc_slot(host).card_detect_irq, host); 2245a45c6cb8SMadhusudhan Chikkature flush_scheduled_work(); 2246a45c6cb8SMadhusudhan Chikkature 22475e2ea617SAdrian Hunter mmc_host_disable(host->mmc); 2248a45c6cb8SMadhusudhan Chikkature clk_disable(host->iclk); 2249a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 2250a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 22512bec0893SAdrian Hunter if (host->got_dbclk) { 2252a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 2253a45c6cb8SMadhusudhan Chikkature clk_put(host->dbclk); 2254a45c6cb8SMadhusudhan Chikkature } 2255a45c6cb8SMadhusudhan Chikkature 2256a45c6cb8SMadhusudhan Chikkature mmc_free_host(host->mmc); 2257a45c6cb8SMadhusudhan Chikkature iounmap(host->base); 2258db0fefc5SAdrian Hunter omap_hsmmc_gpio_free(pdev->dev.platform_data); 2259a45c6cb8SMadhusudhan Chikkature } 2260a45c6cb8SMadhusudhan Chikkature 2261a45c6cb8SMadhusudhan Chikkature res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2262a45c6cb8SMadhusudhan Chikkature if (res) 2263a45c6cb8SMadhusudhan Chikkature release_mem_region(res->start, res->end - res->start + 1); 2264a45c6cb8SMadhusudhan Chikkature platform_set_drvdata(pdev, NULL); 2265a45c6cb8SMadhusudhan Chikkature 2266a45c6cb8SMadhusudhan Chikkature return 0; 2267a45c6cb8SMadhusudhan Chikkature } 2268a45c6cb8SMadhusudhan Chikkature 2269a45c6cb8SMadhusudhan Chikkature #ifdef CONFIG_PM 227070a3341aSDenis Karpov static int omap_hsmmc_suspend(struct platform_device *pdev, pm_message_t state) 2271a45c6cb8SMadhusudhan Chikkature { 2272a45c6cb8SMadhusudhan Chikkature int ret = 0; 227370a3341aSDenis Karpov struct omap_hsmmc_host *host = platform_get_drvdata(pdev); 2274a45c6cb8SMadhusudhan Chikkature 2275a45c6cb8SMadhusudhan Chikkature if (host && host->suspended) 2276a45c6cb8SMadhusudhan Chikkature return 0; 2277a45c6cb8SMadhusudhan Chikkature 2278a45c6cb8SMadhusudhan Chikkature if (host) { 2279a45c6cb8SMadhusudhan Chikkature host->suspended = 1; 2280a45c6cb8SMadhusudhan Chikkature if (host->pdata->suspend) { 2281a45c6cb8SMadhusudhan Chikkature ret = host->pdata->suspend(&pdev->dev, 2282a45c6cb8SMadhusudhan Chikkature host->slot_id); 2283a6b2240dSAdrian Hunter if (ret) { 2284a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 2285a45c6cb8SMadhusudhan Chikkature "Unable to handle MMC board" 2286a45c6cb8SMadhusudhan Chikkature " level suspend\n"); 2287a6b2240dSAdrian Hunter host->suspended = 0; 2288a6b2240dSAdrian Hunter return ret; 2289a45c6cb8SMadhusudhan Chikkature } 2290a6b2240dSAdrian Hunter } 2291a6b2240dSAdrian Hunter cancel_work_sync(&host->mmc_carddetect_work); 2292a6b2240dSAdrian Hunter mmc_host_enable(host->mmc); 2293a6b2240dSAdrian Hunter ret = mmc_suspend_host(host->mmc, state); 2294a6b2240dSAdrian Hunter if (ret == 0) { 2295b417577dSAdrian Hunter omap_hsmmc_disable_irq(host); 2296a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 22970683af48SJarkko Lavinen OMAP_HSMMC_READ(host->base, HCTL) & ~SDBP); 22985e2ea617SAdrian Hunter mmc_host_disable(host->mmc); 2299a45c6cb8SMadhusudhan Chikkature clk_disable(host->iclk); 23002bec0893SAdrian Hunter if (host->got_dbclk) 2301a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 2302a6b2240dSAdrian Hunter } else { 2303a6b2240dSAdrian Hunter host->suspended = 0; 2304a6b2240dSAdrian Hunter if (host->pdata->resume) { 2305a6b2240dSAdrian Hunter ret = host->pdata->resume(&pdev->dev, 2306a6b2240dSAdrian Hunter host->slot_id); 2307a6b2240dSAdrian Hunter if (ret) 2308a6b2240dSAdrian Hunter dev_dbg(mmc_dev(host->mmc), 2309a6b2240dSAdrian Hunter "Unmask interrupt failed\n"); 2310a6b2240dSAdrian Hunter } 23115e2ea617SAdrian Hunter mmc_host_disable(host->mmc); 2312a6b2240dSAdrian Hunter } 2313a45c6cb8SMadhusudhan Chikkature 2314a45c6cb8SMadhusudhan Chikkature } 2315a45c6cb8SMadhusudhan Chikkature return ret; 2316a45c6cb8SMadhusudhan Chikkature } 2317a45c6cb8SMadhusudhan Chikkature 2318a45c6cb8SMadhusudhan Chikkature /* Routine to resume the MMC device */ 231970a3341aSDenis Karpov static int omap_hsmmc_resume(struct platform_device *pdev) 2320a45c6cb8SMadhusudhan Chikkature { 2321a45c6cb8SMadhusudhan Chikkature int ret = 0; 232270a3341aSDenis Karpov struct omap_hsmmc_host *host = platform_get_drvdata(pdev); 2323a45c6cb8SMadhusudhan Chikkature 2324a45c6cb8SMadhusudhan Chikkature if (host && !host->suspended) 2325a45c6cb8SMadhusudhan Chikkature return 0; 2326a45c6cb8SMadhusudhan Chikkature 2327a45c6cb8SMadhusudhan Chikkature if (host) { 2328a45c6cb8SMadhusudhan Chikkature ret = clk_enable(host->iclk); 232911dd62a7SDenis Karpov if (ret) 2330a45c6cb8SMadhusudhan Chikkature goto clk_en_err; 2331a45c6cb8SMadhusudhan Chikkature 233211dd62a7SDenis Karpov if (mmc_host_enable(host->mmc) != 0) { 233311dd62a7SDenis Karpov clk_disable(host->iclk); 233411dd62a7SDenis Karpov goto clk_en_err; 233511dd62a7SDenis Karpov } 233611dd62a7SDenis Karpov 23372bec0893SAdrian Hunter if (host->got_dbclk) 23382bec0893SAdrian Hunter clk_enable(host->dbclk); 23392bec0893SAdrian Hunter 234070a3341aSDenis Karpov omap_hsmmc_conf_bus_power(host); 23411b331e69SKim Kyuwon 2342a45c6cb8SMadhusudhan Chikkature if (host->pdata->resume) { 2343a45c6cb8SMadhusudhan Chikkature ret = host->pdata->resume(&pdev->dev, host->slot_id); 2344a45c6cb8SMadhusudhan Chikkature if (ret) 2345a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 2346a45c6cb8SMadhusudhan Chikkature "Unmask interrupt failed\n"); 2347a45c6cb8SMadhusudhan Chikkature } 2348a45c6cb8SMadhusudhan Chikkature 2349b62f6228SAdrian Hunter omap_hsmmc_protect_card(host); 2350b62f6228SAdrian Hunter 2351a45c6cb8SMadhusudhan Chikkature /* Notify the core to resume the host */ 2352a45c6cb8SMadhusudhan Chikkature ret = mmc_resume_host(host->mmc); 2353a45c6cb8SMadhusudhan Chikkature if (ret == 0) 2354a45c6cb8SMadhusudhan Chikkature host->suspended = 0; 235570a3341aSDenis Karpov 23565e2ea617SAdrian Hunter mmc_host_lazy_disable(host->mmc); 2357a45c6cb8SMadhusudhan Chikkature } 2358a45c6cb8SMadhusudhan Chikkature 2359a45c6cb8SMadhusudhan Chikkature return ret; 2360a45c6cb8SMadhusudhan Chikkature 2361a45c6cb8SMadhusudhan Chikkature clk_en_err: 2362a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 2363a45c6cb8SMadhusudhan Chikkature "Failed to enable MMC clocks during resume\n"); 2364a45c6cb8SMadhusudhan Chikkature return ret; 2365a45c6cb8SMadhusudhan Chikkature } 2366a45c6cb8SMadhusudhan Chikkature 2367a45c6cb8SMadhusudhan Chikkature #else 236870a3341aSDenis Karpov #define omap_hsmmc_suspend NULL 236970a3341aSDenis Karpov #define omap_hsmmc_resume NULL 2370a45c6cb8SMadhusudhan Chikkature #endif 2371a45c6cb8SMadhusudhan Chikkature 237270a3341aSDenis Karpov static struct platform_driver omap_hsmmc_driver = { 237370a3341aSDenis Karpov .remove = omap_hsmmc_remove, 237470a3341aSDenis Karpov .suspend = omap_hsmmc_suspend, 237570a3341aSDenis Karpov .resume = omap_hsmmc_resume, 2376a45c6cb8SMadhusudhan Chikkature .driver = { 2377a45c6cb8SMadhusudhan Chikkature .name = DRIVER_NAME, 2378a45c6cb8SMadhusudhan Chikkature .owner = THIS_MODULE, 2379a45c6cb8SMadhusudhan Chikkature }, 2380a45c6cb8SMadhusudhan Chikkature }; 2381a45c6cb8SMadhusudhan Chikkature 238270a3341aSDenis Karpov static int __init omap_hsmmc_init(void) 2383a45c6cb8SMadhusudhan Chikkature { 2384a45c6cb8SMadhusudhan Chikkature /* Register the MMC driver */ 23858753298aSRoger Quadros return platform_driver_probe(&omap_hsmmc_driver, omap_hsmmc_probe); 2386a45c6cb8SMadhusudhan Chikkature } 2387a45c6cb8SMadhusudhan Chikkature 238870a3341aSDenis Karpov static void __exit omap_hsmmc_cleanup(void) 2389a45c6cb8SMadhusudhan Chikkature { 2390a45c6cb8SMadhusudhan Chikkature /* Unregister MMC driver */ 239170a3341aSDenis Karpov platform_driver_unregister(&omap_hsmmc_driver); 2392a45c6cb8SMadhusudhan Chikkature } 2393a45c6cb8SMadhusudhan Chikkature 239470a3341aSDenis Karpov module_init(omap_hsmmc_init); 239570a3341aSDenis Karpov module_exit(omap_hsmmc_cleanup); 2396a45c6cb8SMadhusudhan Chikkature 2397a45c6cb8SMadhusudhan Chikkature MODULE_DESCRIPTION("OMAP High Speed Multimedia Card driver"); 2398a45c6cb8SMadhusudhan Chikkature MODULE_LICENSE("GPL"); 2399a45c6cb8SMadhusudhan Chikkature MODULE_ALIAS("platform:" DRIVER_NAME); 2400a45c6cb8SMadhusudhan Chikkature MODULE_AUTHOR("Texas Instruments Inc"); 2401