1a45c6cb8SMadhusudhan Chikkature /* 2a45c6cb8SMadhusudhan Chikkature * drivers/mmc/host/omap_hsmmc.c 3a45c6cb8SMadhusudhan Chikkature * 4a45c6cb8SMadhusudhan Chikkature * Driver for OMAP2430/3430 MMC controller. 5a45c6cb8SMadhusudhan Chikkature * 6a45c6cb8SMadhusudhan Chikkature * Copyright (C) 2007 Texas Instruments. 7a45c6cb8SMadhusudhan Chikkature * 8a45c6cb8SMadhusudhan Chikkature * Authors: 9a45c6cb8SMadhusudhan Chikkature * Syed Mohammed Khasim <x0khasim@ti.com> 10a45c6cb8SMadhusudhan Chikkature * Madhusudhan <madhu.cr@ti.com> 11a45c6cb8SMadhusudhan Chikkature * Mohit Jalori <mjalori@ti.com> 12a45c6cb8SMadhusudhan Chikkature * 13a45c6cb8SMadhusudhan Chikkature * This file is licensed under the terms of the GNU General Public License 14a45c6cb8SMadhusudhan Chikkature * version 2. This program is licensed "as is" without any warranty of any 15a45c6cb8SMadhusudhan Chikkature * kind, whether express or implied. 16a45c6cb8SMadhusudhan Chikkature */ 17a45c6cb8SMadhusudhan Chikkature 18a45c6cb8SMadhusudhan Chikkature #include <linux/module.h> 19a45c6cb8SMadhusudhan Chikkature #include <linux/init.h> 20d900f712SDenis Karpov #include <linux/debugfs.h> 21d900f712SDenis Karpov #include <linux/seq_file.h> 22a45c6cb8SMadhusudhan Chikkature #include <linux/interrupt.h> 23a45c6cb8SMadhusudhan Chikkature #include <linux/delay.h> 24a45c6cb8SMadhusudhan Chikkature #include <linux/dma-mapping.h> 25a45c6cb8SMadhusudhan Chikkature #include <linux/platform_device.h> 26a45c6cb8SMadhusudhan Chikkature #include <linux/workqueue.h> 27a45c6cb8SMadhusudhan Chikkature #include <linux/timer.h> 28a45c6cb8SMadhusudhan Chikkature #include <linux/clk.h> 29a45c6cb8SMadhusudhan Chikkature #include <linux/mmc/host.h> 3013189e78SJarkko Lavinen #include <linux/mmc/core.h> 3193caf8e6SAdrian Hunter #include <linux/mmc/mmc.h> 32a45c6cb8SMadhusudhan Chikkature #include <linux/io.h> 33a45c6cb8SMadhusudhan Chikkature #include <linux/semaphore.h> 34db0fefc5SAdrian Hunter #include <linux/gpio.h> 35db0fefc5SAdrian Hunter #include <linux/regulator/consumer.h> 36ce491cf8STony Lindgren #include <plat/dma.h> 37a45c6cb8SMadhusudhan Chikkature #include <mach/hardware.h> 38ce491cf8STony Lindgren #include <plat/board.h> 39ce491cf8STony Lindgren #include <plat/mmc.h> 40ce491cf8STony Lindgren #include <plat/cpu.h> 41a45c6cb8SMadhusudhan Chikkature 42a45c6cb8SMadhusudhan Chikkature /* OMAP HSMMC Host Controller Registers */ 43a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_SYSCONFIG 0x0010 4411dd62a7SDenis Karpov #define OMAP_HSMMC_SYSSTATUS 0x0014 45a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_CON 0x002C 46a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_BLK 0x0104 47a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_ARG 0x0108 48a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_CMD 0x010C 49a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP10 0x0110 50a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP32 0x0114 51a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP54 0x0118 52a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP76 0x011C 53a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_DATA 0x0120 54a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_HCTL 0x0128 55a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_SYSCTL 0x012C 56a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_STAT 0x0130 57a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_IE 0x0134 58a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_ISE 0x0138 59a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_CAPA 0x0140 60a45c6cb8SMadhusudhan Chikkature 61a45c6cb8SMadhusudhan Chikkature #define VS18 (1 << 26) 62a45c6cb8SMadhusudhan Chikkature #define VS30 (1 << 25) 63a45c6cb8SMadhusudhan Chikkature #define SDVS18 (0x5 << 9) 64a45c6cb8SMadhusudhan Chikkature #define SDVS30 (0x6 << 9) 65eb250826SDavid Brownell #define SDVS33 (0x7 << 9) 661b331e69SKim Kyuwon #define SDVS_MASK 0x00000E00 67a45c6cb8SMadhusudhan Chikkature #define SDVSCLR 0xFFFFF1FF 68a45c6cb8SMadhusudhan Chikkature #define SDVSDET 0x00000400 69a45c6cb8SMadhusudhan Chikkature #define AUTOIDLE 0x1 70a45c6cb8SMadhusudhan Chikkature #define SDBP (1 << 8) 71a45c6cb8SMadhusudhan Chikkature #define DTO 0xe 72a45c6cb8SMadhusudhan Chikkature #define ICE 0x1 73a45c6cb8SMadhusudhan Chikkature #define ICS 0x2 74a45c6cb8SMadhusudhan Chikkature #define CEN (1 << 2) 75a45c6cb8SMadhusudhan Chikkature #define CLKD_MASK 0x0000FFC0 76a45c6cb8SMadhusudhan Chikkature #define CLKD_SHIFT 6 77a45c6cb8SMadhusudhan Chikkature #define DTO_MASK 0x000F0000 78a45c6cb8SMadhusudhan Chikkature #define DTO_SHIFT 16 79a45c6cb8SMadhusudhan Chikkature #define INT_EN_MASK 0x307F0033 80ccdfe3a6SAnand Gadiyar #define BWR_ENABLE (1 << 4) 81ccdfe3a6SAnand Gadiyar #define BRR_ENABLE (1 << 5) 8293caf8e6SAdrian Hunter #define DTO_ENABLE (1 << 20) 83a45c6cb8SMadhusudhan Chikkature #define INIT_STREAM (1 << 1) 84a45c6cb8SMadhusudhan Chikkature #define DP_SELECT (1 << 21) 85a45c6cb8SMadhusudhan Chikkature #define DDIR (1 << 4) 86a45c6cb8SMadhusudhan Chikkature #define DMA_EN 0x1 87a45c6cb8SMadhusudhan Chikkature #define MSBS (1 << 5) 88a45c6cb8SMadhusudhan Chikkature #define BCE (1 << 1) 89a45c6cb8SMadhusudhan Chikkature #define FOUR_BIT (1 << 1) 9073153010SJarkko Lavinen #define DW8 (1 << 5) 91a45c6cb8SMadhusudhan Chikkature #define CC 0x1 92a45c6cb8SMadhusudhan Chikkature #define TC 0x02 93a45c6cb8SMadhusudhan Chikkature #define OD 0x1 94a45c6cb8SMadhusudhan Chikkature #define ERR (1 << 15) 95a45c6cb8SMadhusudhan Chikkature #define CMD_TIMEOUT (1 << 16) 96a45c6cb8SMadhusudhan Chikkature #define DATA_TIMEOUT (1 << 20) 97a45c6cb8SMadhusudhan Chikkature #define CMD_CRC (1 << 17) 98a45c6cb8SMadhusudhan Chikkature #define DATA_CRC (1 << 21) 99a45c6cb8SMadhusudhan Chikkature #define CARD_ERR (1 << 28) 100a45c6cb8SMadhusudhan Chikkature #define STAT_CLEAR 0xFFFFFFFF 101a45c6cb8SMadhusudhan Chikkature #define INIT_STREAM_CMD 0x00000000 102a45c6cb8SMadhusudhan Chikkature #define DUAL_VOLT_OCR_BIT 7 103a45c6cb8SMadhusudhan Chikkature #define SRC (1 << 25) 104a45c6cb8SMadhusudhan Chikkature #define SRD (1 << 26) 10511dd62a7SDenis Karpov #define SOFTRESET (1 << 1) 10611dd62a7SDenis Karpov #define RESETDONE (1 << 0) 107a45c6cb8SMadhusudhan Chikkature 108a45c6cb8SMadhusudhan Chikkature /* 109a45c6cb8SMadhusudhan Chikkature * FIXME: Most likely all the data using these _DEVID defines should come 110a45c6cb8SMadhusudhan Chikkature * from the platform_data, or implemented in controller and slot specific 111a45c6cb8SMadhusudhan Chikkature * functions. 112a45c6cb8SMadhusudhan Chikkature */ 113a45c6cb8SMadhusudhan Chikkature #define OMAP_MMC1_DEVID 0 114a45c6cb8SMadhusudhan Chikkature #define OMAP_MMC2_DEVID 1 115f3e2f1ddSGrazvydas Ignotas #define OMAP_MMC3_DEVID 2 11682cf818dSkishore kadiyala #define OMAP_MMC4_DEVID 3 11782cf818dSkishore kadiyala #define OMAP_MMC5_DEVID 4 118a45c6cb8SMadhusudhan Chikkature 119a45c6cb8SMadhusudhan Chikkature #define MMC_TIMEOUT_MS 20 120a45c6cb8SMadhusudhan Chikkature #define OMAP_MMC_MASTER_CLOCK 96000000 1210005ae73SKishore Kadiyala #define DRIVER_NAME "omap_hsmmc" 122a45c6cb8SMadhusudhan Chikkature 123dd498effSDenis Karpov /* Timeouts for entering power saving states on inactivity, msec */ 124dd498effSDenis Karpov #define OMAP_MMC_DISABLED_TIMEOUT 100 12513189e78SJarkko Lavinen #define OMAP_MMC_SLEEP_TIMEOUT 1000 12613189e78SJarkko Lavinen #define OMAP_MMC_OFF_TIMEOUT 8000 127dd498effSDenis Karpov 128a45c6cb8SMadhusudhan Chikkature /* 129a45c6cb8SMadhusudhan Chikkature * One controller can have multiple slots, like on some omap boards using 130a45c6cb8SMadhusudhan Chikkature * omap.c controller driver. Luckily this is not currently done on any known 131a45c6cb8SMadhusudhan Chikkature * omap_hsmmc.c device. 132a45c6cb8SMadhusudhan Chikkature */ 133a45c6cb8SMadhusudhan Chikkature #define mmc_slot(host) (host->pdata->slots[host->slot_id]) 134a45c6cb8SMadhusudhan Chikkature 135a45c6cb8SMadhusudhan Chikkature /* 136a45c6cb8SMadhusudhan Chikkature * MMC Host controller read/write API's 137a45c6cb8SMadhusudhan Chikkature */ 138a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_READ(base, reg) \ 139a45c6cb8SMadhusudhan Chikkature __raw_readl((base) + OMAP_HSMMC_##reg) 140a45c6cb8SMadhusudhan Chikkature 141a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_WRITE(base, reg, val) \ 142a45c6cb8SMadhusudhan Chikkature __raw_writel((val), (base) + OMAP_HSMMC_##reg) 143a45c6cb8SMadhusudhan Chikkature 14470a3341aSDenis Karpov struct omap_hsmmc_host { 145a45c6cb8SMadhusudhan Chikkature struct device *dev; 146a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc; 147a45c6cb8SMadhusudhan Chikkature struct mmc_request *mrq; 148a45c6cb8SMadhusudhan Chikkature struct mmc_command *cmd; 149a45c6cb8SMadhusudhan Chikkature struct mmc_data *data; 150a45c6cb8SMadhusudhan Chikkature struct clk *fclk; 151a45c6cb8SMadhusudhan Chikkature struct clk *iclk; 152a45c6cb8SMadhusudhan Chikkature struct clk *dbclk; 153db0fefc5SAdrian Hunter /* 154db0fefc5SAdrian Hunter * vcc == configured supply 155db0fefc5SAdrian Hunter * vcc_aux == optional 156db0fefc5SAdrian Hunter * - MMC1, supply for DAT4..DAT7 157db0fefc5SAdrian Hunter * - MMC2/MMC2, external level shifter voltage supply, for 158db0fefc5SAdrian Hunter * chip (SDIO, eMMC, etc) or transceiver (MMC2 only) 159db0fefc5SAdrian Hunter */ 160db0fefc5SAdrian Hunter struct regulator *vcc; 161db0fefc5SAdrian Hunter struct regulator *vcc_aux; 162a45c6cb8SMadhusudhan Chikkature struct work_struct mmc_carddetect_work; 163a45c6cb8SMadhusudhan Chikkature void __iomem *base; 164a45c6cb8SMadhusudhan Chikkature resource_size_t mapbase; 1654dffd7a2SAdrian Hunter spinlock_t irq_lock; /* Prevent races with irq handler */ 166a45c6cb8SMadhusudhan Chikkature unsigned int id; 167a45c6cb8SMadhusudhan Chikkature unsigned int dma_len; 1680ccd76d4SJuha Yrjola unsigned int dma_sg_idx; 169a45c6cb8SMadhusudhan Chikkature unsigned char bus_mode; 170a3621465SAdrian Hunter unsigned char power_mode; 171a45c6cb8SMadhusudhan Chikkature u32 *buffer; 172a45c6cb8SMadhusudhan Chikkature u32 bytesleft; 173a45c6cb8SMadhusudhan Chikkature int suspended; 174a45c6cb8SMadhusudhan Chikkature int irq; 175a45c6cb8SMadhusudhan Chikkature int use_dma, dma_ch; 176f3e2f1ddSGrazvydas Ignotas int dma_line_tx, dma_line_rx; 177a45c6cb8SMadhusudhan Chikkature int slot_id; 1782bec0893SAdrian Hunter int got_dbclk; 1794a694dc9SAdrian Hunter int response_busy; 18011dd62a7SDenis Karpov int context_loss; 181dd498effSDenis Karpov int dpm_state; 182623821f7SAdrian Hunter int vdd; 183b62f6228SAdrian Hunter int protect_card; 184b62f6228SAdrian Hunter int reqs_blocked; 185db0fefc5SAdrian Hunter int use_reg; 186b417577dSAdrian Hunter int req_in_progress; 18711dd62a7SDenis Karpov 188a45c6cb8SMadhusudhan Chikkature struct omap_mmc_platform_data *pdata; 189a45c6cb8SMadhusudhan Chikkature }; 190a45c6cb8SMadhusudhan Chikkature 191db0fefc5SAdrian Hunter static int omap_hsmmc_card_detect(struct device *dev, int slot) 192db0fefc5SAdrian Hunter { 193db0fefc5SAdrian Hunter struct omap_mmc_platform_data *mmc = dev->platform_data; 194db0fefc5SAdrian Hunter 195db0fefc5SAdrian Hunter /* NOTE: assumes card detect signal is active-low */ 196db0fefc5SAdrian Hunter return !gpio_get_value_cansleep(mmc->slots[0].switch_pin); 197db0fefc5SAdrian Hunter } 198db0fefc5SAdrian Hunter 199db0fefc5SAdrian Hunter static int omap_hsmmc_get_wp(struct device *dev, int slot) 200db0fefc5SAdrian Hunter { 201db0fefc5SAdrian Hunter struct omap_mmc_platform_data *mmc = dev->platform_data; 202db0fefc5SAdrian Hunter 203db0fefc5SAdrian Hunter /* NOTE: assumes write protect signal is active-high */ 204db0fefc5SAdrian Hunter return gpio_get_value_cansleep(mmc->slots[0].gpio_wp); 205db0fefc5SAdrian Hunter } 206db0fefc5SAdrian Hunter 207db0fefc5SAdrian Hunter static int omap_hsmmc_get_cover_state(struct device *dev, int slot) 208db0fefc5SAdrian Hunter { 209db0fefc5SAdrian Hunter struct omap_mmc_platform_data *mmc = dev->platform_data; 210db0fefc5SAdrian Hunter 211db0fefc5SAdrian Hunter /* NOTE: assumes card detect signal is active-low */ 212db0fefc5SAdrian Hunter return !gpio_get_value_cansleep(mmc->slots[0].switch_pin); 213db0fefc5SAdrian Hunter } 214db0fefc5SAdrian Hunter 215db0fefc5SAdrian Hunter #ifdef CONFIG_PM 216db0fefc5SAdrian Hunter 217db0fefc5SAdrian Hunter static int omap_hsmmc_suspend_cdirq(struct device *dev, int slot) 218db0fefc5SAdrian Hunter { 219db0fefc5SAdrian Hunter struct omap_mmc_platform_data *mmc = dev->platform_data; 220db0fefc5SAdrian Hunter 221db0fefc5SAdrian Hunter disable_irq(mmc->slots[0].card_detect_irq); 222db0fefc5SAdrian Hunter return 0; 223db0fefc5SAdrian Hunter } 224db0fefc5SAdrian Hunter 225db0fefc5SAdrian Hunter static int omap_hsmmc_resume_cdirq(struct device *dev, int slot) 226db0fefc5SAdrian Hunter { 227db0fefc5SAdrian Hunter struct omap_mmc_platform_data *mmc = dev->platform_data; 228db0fefc5SAdrian Hunter 229db0fefc5SAdrian Hunter enable_irq(mmc->slots[0].card_detect_irq); 230db0fefc5SAdrian Hunter return 0; 231db0fefc5SAdrian Hunter } 232db0fefc5SAdrian Hunter 233db0fefc5SAdrian Hunter #else 234db0fefc5SAdrian Hunter 235db0fefc5SAdrian Hunter #define omap_hsmmc_suspend_cdirq NULL 236db0fefc5SAdrian Hunter #define omap_hsmmc_resume_cdirq NULL 237db0fefc5SAdrian Hunter 238db0fefc5SAdrian Hunter #endif 239db0fefc5SAdrian Hunter 240b702b106SAdrian Hunter #ifdef CONFIG_REGULATOR 241b702b106SAdrian Hunter 242db0fefc5SAdrian Hunter static int omap_hsmmc_1_set_power(struct device *dev, int slot, int power_on, 243db0fefc5SAdrian Hunter int vdd) 244db0fefc5SAdrian Hunter { 245db0fefc5SAdrian Hunter struct omap_hsmmc_host *host = 246db0fefc5SAdrian Hunter platform_get_drvdata(to_platform_device(dev)); 247db0fefc5SAdrian Hunter int ret; 248db0fefc5SAdrian Hunter 249db0fefc5SAdrian Hunter if (mmc_slot(host).before_set_reg) 250db0fefc5SAdrian Hunter mmc_slot(host).before_set_reg(dev, slot, power_on, vdd); 251db0fefc5SAdrian Hunter 252db0fefc5SAdrian Hunter if (power_on) 25399fc5131SLinus Walleij ret = mmc_regulator_set_ocr(host->mmc, host->vcc, vdd); 254db0fefc5SAdrian Hunter else 25599fc5131SLinus Walleij ret = mmc_regulator_set_ocr(host->mmc, host->vcc, 0); 256db0fefc5SAdrian Hunter 257db0fefc5SAdrian Hunter if (mmc_slot(host).after_set_reg) 258db0fefc5SAdrian Hunter mmc_slot(host).after_set_reg(dev, slot, power_on, vdd); 259db0fefc5SAdrian Hunter 260db0fefc5SAdrian Hunter return ret; 261db0fefc5SAdrian Hunter } 262db0fefc5SAdrian Hunter 2637715db5aSKishore Kadiyala static int omap_hsmmc_235_set_power(struct device *dev, int slot, int power_on, 264db0fefc5SAdrian Hunter int vdd) 265db0fefc5SAdrian Hunter { 266db0fefc5SAdrian Hunter struct omap_hsmmc_host *host = 267db0fefc5SAdrian Hunter platform_get_drvdata(to_platform_device(dev)); 268db0fefc5SAdrian Hunter int ret = 0; 269db0fefc5SAdrian Hunter 270db0fefc5SAdrian Hunter /* 271db0fefc5SAdrian Hunter * If we don't see a Vcc regulator, assume it's a fixed 272db0fefc5SAdrian Hunter * voltage always-on regulator. 273db0fefc5SAdrian Hunter */ 274db0fefc5SAdrian Hunter if (!host->vcc) 275db0fefc5SAdrian Hunter return 0; 276db0fefc5SAdrian Hunter 277db0fefc5SAdrian Hunter if (mmc_slot(host).before_set_reg) 278db0fefc5SAdrian Hunter mmc_slot(host).before_set_reg(dev, slot, power_on, vdd); 279db0fefc5SAdrian Hunter 280db0fefc5SAdrian Hunter /* 281db0fefc5SAdrian Hunter * Assume Vcc regulator is used only to power the card ... OMAP 282db0fefc5SAdrian Hunter * VDDS is used to power the pins, optionally with a transceiver to 283db0fefc5SAdrian Hunter * support cards using voltages other than VDDS (1.8V nominal). When a 284db0fefc5SAdrian Hunter * transceiver is used, DAT3..7 are muxed as transceiver control pins. 285db0fefc5SAdrian Hunter * 286db0fefc5SAdrian Hunter * In some cases this regulator won't support enable/disable; 287db0fefc5SAdrian Hunter * e.g. it's a fixed rail for a WLAN chip. 288db0fefc5SAdrian Hunter * 289db0fefc5SAdrian Hunter * In other cases vcc_aux switches interface power. Example, for 290db0fefc5SAdrian Hunter * eMMC cards it represents VccQ. Sometimes transceivers or SDIO 291db0fefc5SAdrian Hunter * chips/cards need an interface voltage rail too. 292db0fefc5SAdrian Hunter */ 293db0fefc5SAdrian Hunter if (power_on) { 29499fc5131SLinus Walleij ret = mmc_regulator_set_ocr(host->mmc, host->vcc, vdd); 295db0fefc5SAdrian Hunter /* Enable interface voltage rail, if needed */ 296db0fefc5SAdrian Hunter if (ret == 0 && host->vcc_aux) { 297db0fefc5SAdrian Hunter ret = regulator_enable(host->vcc_aux); 298db0fefc5SAdrian Hunter if (ret < 0) 29999fc5131SLinus Walleij ret = mmc_regulator_set_ocr(host->mmc, 30099fc5131SLinus Walleij host->vcc, 0); 301db0fefc5SAdrian Hunter } 302db0fefc5SAdrian Hunter } else { 30399fc5131SLinus Walleij /* Shut down the rail */ 3046da20c89SAdrian Hunter if (host->vcc_aux) 305db0fefc5SAdrian Hunter ret = regulator_disable(host->vcc_aux); 30699fc5131SLinus Walleij if (!ret) { 30799fc5131SLinus Walleij /* Then proceed to shut down the local regulator */ 30899fc5131SLinus Walleij ret = mmc_regulator_set_ocr(host->mmc, 30999fc5131SLinus Walleij host->vcc, 0); 31099fc5131SLinus Walleij } 311db0fefc5SAdrian Hunter } 312db0fefc5SAdrian Hunter 313db0fefc5SAdrian Hunter if (mmc_slot(host).after_set_reg) 314db0fefc5SAdrian Hunter mmc_slot(host).after_set_reg(dev, slot, power_on, vdd); 315db0fefc5SAdrian Hunter 316db0fefc5SAdrian Hunter return ret; 317db0fefc5SAdrian Hunter } 318db0fefc5SAdrian Hunter 3197715db5aSKishore Kadiyala static int omap_hsmmc_4_set_power(struct device *dev, int slot, int power_on, 3207715db5aSKishore Kadiyala int vdd) 3217715db5aSKishore Kadiyala { 3227715db5aSKishore Kadiyala return 0; 3237715db5aSKishore Kadiyala } 3247715db5aSKishore Kadiyala 325db0fefc5SAdrian Hunter static int omap_hsmmc_1_set_sleep(struct device *dev, int slot, int sleep, 326db0fefc5SAdrian Hunter int vdd, int cardsleep) 327db0fefc5SAdrian Hunter { 328db0fefc5SAdrian Hunter struct omap_hsmmc_host *host = 329db0fefc5SAdrian Hunter platform_get_drvdata(to_platform_device(dev)); 330db0fefc5SAdrian Hunter int mode = sleep ? REGULATOR_MODE_STANDBY : REGULATOR_MODE_NORMAL; 331db0fefc5SAdrian Hunter 332db0fefc5SAdrian Hunter return regulator_set_mode(host->vcc, mode); 333db0fefc5SAdrian Hunter } 334db0fefc5SAdrian Hunter 3357715db5aSKishore Kadiyala static int omap_hsmmc_235_set_sleep(struct device *dev, int slot, int sleep, 336db0fefc5SAdrian Hunter int vdd, int cardsleep) 337db0fefc5SAdrian Hunter { 338db0fefc5SAdrian Hunter struct omap_hsmmc_host *host = 339db0fefc5SAdrian Hunter platform_get_drvdata(to_platform_device(dev)); 340db0fefc5SAdrian Hunter int err, mode; 341db0fefc5SAdrian Hunter 342db0fefc5SAdrian Hunter /* 343db0fefc5SAdrian Hunter * If we don't see a Vcc regulator, assume it's a fixed 344db0fefc5SAdrian Hunter * voltage always-on regulator. 345db0fefc5SAdrian Hunter */ 346db0fefc5SAdrian Hunter if (!host->vcc) 347db0fefc5SAdrian Hunter return 0; 348db0fefc5SAdrian Hunter 349db0fefc5SAdrian Hunter mode = sleep ? REGULATOR_MODE_STANDBY : REGULATOR_MODE_NORMAL; 350db0fefc5SAdrian Hunter 351db0fefc5SAdrian Hunter if (!host->vcc_aux) 352db0fefc5SAdrian Hunter return regulator_set_mode(host->vcc, mode); 353db0fefc5SAdrian Hunter 354db0fefc5SAdrian Hunter if (cardsleep) { 355db0fefc5SAdrian Hunter /* VCC can be turned off if card is asleep */ 356db0fefc5SAdrian Hunter if (sleep) 35799fc5131SLinus Walleij err = mmc_regulator_set_ocr(host->mmc, host->vcc, 0); 358db0fefc5SAdrian Hunter else 35999fc5131SLinus Walleij err = mmc_regulator_set_ocr(host->mmc, host->vcc, vdd); 360db0fefc5SAdrian Hunter } else 361db0fefc5SAdrian Hunter err = regulator_set_mode(host->vcc, mode); 362db0fefc5SAdrian Hunter if (err) 363db0fefc5SAdrian Hunter return err; 364e0eb2424SAdrian Hunter 365e0eb2424SAdrian Hunter if (!mmc_slot(host).vcc_aux_disable_is_sleep) 366db0fefc5SAdrian Hunter return regulator_set_mode(host->vcc_aux, mode); 367e0eb2424SAdrian Hunter 368e0eb2424SAdrian Hunter if (sleep) 369e0eb2424SAdrian Hunter return regulator_disable(host->vcc_aux); 370e0eb2424SAdrian Hunter else 371e0eb2424SAdrian Hunter return regulator_enable(host->vcc_aux); 372db0fefc5SAdrian Hunter } 373db0fefc5SAdrian Hunter 3747715db5aSKishore Kadiyala static int omap_hsmmc_4_set_sleep(struct device *dev, int slot, int sleep, 3757715db5aSKishore Kadiyala int vdd, int cardsleep) 3767715db5aSKishore Kadiyala { 3777715db5aSKishore Kadiyala return 0; 3787715db5aSKishore Kadiyala } 3797715db5aSKishore Kadiyala 380db0fefc5SAdrian Hunter static int omap_hsmmc_reg_get(struct omap_hsmmc_host *host) 381db0fefc5SAdrian Hunter { 382db0fefc5SAdrian Hunter struct regulator *reg; 383db0fefc5SAdrian Hunter int ret = 0; 38464be9782Skishore kadiyala int ocr_value = 0; 385db0fefc5SAdrian Hunter 386db0fefc5SAdrian Hunter switch (host->id) { 387db0fefc5SAdrian Hunter case OMAP_MMC1_DEVID: 388db0fefc5SAdrian Hunter /* On-chip level shifting via PBIAS0/PBIAS1 */ 389db0fefc5SAdrian Hunter mmc_slot(host).set_power = omap_hsmmc_1_set_power; 390db0fefc5SAdrian Hunter mmc_slot(host).set_sleep = omap_hsmmc_1_set_sleep; 391db0fefc5SAdrian Hunter break; 392db0fefc5SAdrian Hunter case OMAP_MMC2_DEVID: 393db0fefc5SAdrian Hunter case OMAP_MMC3_DEVID: 3947715db5aSKishore Kadiyala case OMAP_MMC5_DEVID: 395db0fefc5SAdrian Hunter /* Off-chip level shifting, or none */ 3967715db5aSKishore Kadiyala mmc_slot(host).set_power = omap_hsmmc_235_set_power; 3977715db5aSKishore Kadiyala mmc_slot(host).set_sleep = omap_hsmmc_235_set_sleep; 398db0fefc5SAdrian Hunter break; 3997715db5aSKishore Kadiyala case OMAP_MMC4_DEVID: 4007715db5aSKishore Kadiyala mmc_slot(host).set_power = omap_hsmmc_4_set_power; 4017715db5aSKishore Kadiyala mmc_slot(host).set_sleep = omap_hsmmc_4_set_sleep; 402db0fefc5SAdrian Hunter default: 403db0fefc5SAdrian Hunter pr_err("MMC%d configuration not supported!\n", host->id); 404db0fefc5SAdrian Hunter return -EINVAL; 405db0fefc5SAdrian Hunter } 406db0fefc5SAdrian Hunter 407db0fefc5SAdrian Hunter reg = regulator_get(host->dev, "vmmc"); 408db0fefc5SAdrian Hunter if (IS_ERR(reg)) { 409db0fefc5SAdrian Hunter dev_dbg(host->dev, "vmmc regulator missing\n"); 410db0fefc5SAdrian Hunter /* 411db0fefc5SAdrian Hunter * HACK: until fixed.c regulator is usable, 412db0fefc5SAdrian Hunter * we don't require a main regulator 413db0fefc5SAdrian Hunter * for MMC2 or MMC3 414db0fefc5SAdrian Hunter */ 415db0fefc5SAdrian Hunter if (host->id == OMAP_MMC1_DEVID) { 416db0fefc5SAdrian Hunter ret = PTR_ERR(reg); 417db0fefc5SAdrian Hunter goto err; 418db0fefc5SAdrian Hunter } 419db0fefc5SAdrian Hunter } else { 420db0fefc5SAdrian Hunter host->vcc = reg; 42164be9782Skishore kadiyala ocr_value = mmc_regulator_get_ocrmask(reg); 42264be9782Skishore kadiyala if (!mmc_slot(host).ocr_mask) { 42364be9782Skishore kadiyala mmc_slot(host).ocr_mask = ocr_value; 42464be9782Skishore kadiyala } else { 42564be9782Skishore kadiyala if (!(mmc_slot(host).ocr_mask & ocr_value)) { 42664be9782Skishore kadiyala pr_err("MMC%d ocrmask %x is not supported\n", 42764be9782Skishore kadiyala host->id, mmc_slot(host).ocr_mask); 42864be9782Skishore kadiyala mmc_slot(host).ocr_mask = 0; 42964be9782Skishore kadiyala return -EINVAL; 43064be9782Skishore kadiyala } 43164be9782Skishore kadiyala } 432db0fefc5SAdrian Hunter mmc_slot(host).ocr_mask = mmc_regulator_get_ocrmask(reg); 433db0fefc5SAdrian Hunter 434db0fefc5SAdrian Hunter /* Allow an aux regulator */ 435db0fefc5SAdrian Hunter reg = regulator_get(host->dev, "vmmc_aux"); 436db0fefc5SAdrian Hunter host->vcc_aux = IS_ERR(reg) ? NULL : reg; 437db0fefc5SAdrian Hunter 438b1c1df7aSBalaji T K /* For eMMC do not power off when not in sleep state */ 439b1c1df7aSBalaji T K if (mmc_slot(host).no_regulator_off_init) 440b1c1df7aSBalaji T K return 0; 441db0fefc5SAdrian Hunter /* 442db0fefc5SAdrian Hunter * UGLY HACK: workaround regulator framework bugs. 443db0fefc5SAdrian Hunter * When the bootloader leaves a supply active, it's 444db0fefc5SAdrian Hunter * initialized with zero usecount ... and we can't 445db0fefc5SAdrian Hunter * disable it without first enabling it. Until the 446db0fefc5SAdrian Hunter * framework is fixed, we need a workaround like this 447db0fefc5SAdrian Hunter * (which is safe for MMC, but not in general). 448db0fefc5SAdrian Hunter */ 449db0fefc5SAdrian Hunter if (regulator_is_enabled(host->vcc) > 0) { 450db0fefc5SAdrian Hunter regulator_enable(host->vcc); 451db0fefc5SAdrian Hunter regulator_disable(host->vcc); 452db0fefc5SAdrian Hunter } 453db0fefc5SAdrian Hunter if (host->vcc_aux) { 454db0fefc5SAdrian Hunter if (regulator_is_enabled(reg) > 0) { 455db0fefc5SAdrian Hunter regulator_enable(reg); 456db0fefc5SAdrian Hunter regulator_disable(reg); 457db0fefc5SAdrian Hunter } 458db0fefc5SAdrian Hunter } 459db0fefc5SAdrian Hunter } 460db0fefc5SAdrian Hunter 461db0fefc5SAdrian Hunter return 0; 462db0fefc5SAdrian Hunter 463db0fefc5SAdrian Hunter err: 464db0fefc5SAdrian Hunter mmc_slot(host).set_power = NULL; 465db0fefc5SAdrian Hunter mmc_slot(host).set_sleep = NULL; 466db0fefc5SAdrian Hunter return ret; 467db0fefc5SAdrian Hunter } 468db0fefc5SAdrian Hunter 469db0fefc5SAdrian Hunter static void omap_hsmmc_reg_put(struct omap_hsmmc_host *host) 470db0fefc5SAdrian Hunter { 471db0fefc5SAdrian Hunter regulator_put(host->vcc); 472db0fefc5SAdrian Hunter regulator_put(host->vcc_aux); 473db0fefc5SAdrian Hunter mmc_slot(host).set_power = NULL; 474db0fefc5SAdrian Hunter mmc_slot(host).set_sleep = NULL; 475db0fefc5SAdrian Hunter } 476db0fefc5SAdrian Hunter 477b702b106SAdrian Hunter static inline int omap_hsmmc_have_reg(void) 478b702b106SAdrian Hunter { 479b702b106SAdrian Hunter return 1; 480b702b106SAdrian Hunter } 481b702b106SAdrian Hunter 482b702b106SAdrian Hunter #else 483b702b106SAdrian Hunter 484b702b106SAdrian Hunter static inline int omap_hsmmc_reg_get(struct omap_hsmmc_host *host) 485b702b106SAdrian Hunter { 486b702b106SAdrian Hunter return -EINVAL; 487b702b106SAdrian Hunter } 488b702b106SAdrian Hunter 489b702b106SAdrian Hunter static inline void omap_hsmmc_reg_put(struct omap_hsmmc_host *host) 490b702b106SAdrian Hunter { 491b702b106SAdrian Hunter } 492b702b106SAdrian Hunter 493b702b106SAdrian Hunter static inline int omap_hsmmc_have_reg(void) 494b702b106SAdrian Hunter { 495b702b106SAdrian Hunter return 0; 496b702b106SAdrian Hunter } 497b702b106SAdrian Hunter 498b702b106SAdrian Hunter #endif 499b702b106SAdrian Hunter 500b702b106SAdrian Hunter static int omap_hsmmc_gpio_init(struct omap_mmc_platform_data *pdata) 501b702b106SAdrian Hunter { 502b702b106SAdrian Hunter int ret; 503b702b106SAdrian Hunter 504b702b106SAdrian Hunter if (gpio_is_valid(pdata->slots[0].switch_pin)) { 505b702b106SAdrian Hunter if (pdata->slots[0].cover) 506b702b106SAdrian Hunter pdata->slots[0].get_cover_state = 507b702b106SAdrian Hunter omap_hsmmc_get_cover_state; 508b702b106SAdrian Hunter else 509b702b106SAdrian Hunter pdata->slots[0].card_detect = omap_hsmmc_card_detect; 510b702b106SAdrian Hunter pdata->slots[0].card_detect_irq = 511b702b106SAdrian Hunter gpio_to_irq(pdata->slots[0].switch_pin); 512b702b106SAdrian Hunter ret = gpio_request(pdata->slots[0].switch_pin, "mmc_cd"); 513b702b106SAdrian Hunter if (ret) 514b702b106SAdrian Hunter return ret; 515b702b106SAdrian Hunter ret = gpio_direction_input(pdata->slots[0].switch_pin); 516b702b106SAdrian Hunter if (ret) 517b702b106SAdrian Hunter goto err_free_sp; 518b702b106SAdrian Hunter } else 519b702b106SAdrian Hunter pdata->slots[0].switch_pin = -EINVAL; 520b702b106SAdrian Hunter 521b702b106SAdrian Hunter if (gpio_is_valid(pdata->slots[0].gpio_wp)) { 522b702b106SAdrian Hunter pdata->slots[0].get_ro = omap_hsmmc_get_wp; 523b702b106SAdrian Hunter ret = gpio_request(pdata->slots[0].gpio_wp, "mmc_wp"); 524b702b106SAdrian Hunter if (ret) 525b702b106SAdrian Hunter goto err_free_cd; 526b702b106SAdrian Hunter ret = gpio_direction_input(pdata->slots[0].gpio_wp); 527b702b106SAdrian Hunter if (ret) 528b702b106SAdrian Hunter goto err_free_wp; 529b702b106SAdrian Hunter } else 530b702b106SAdrian Hunter pdata->slots[0].gpio_wp = -EINVAL; 531b702b106SAdrian Hunter 532b702b106SAdrian Hunter return 0; 533b702b106SAdrian Hunter 534b702b106SAdrian Hunter err_free_wp: 535b702b106SAdrian Hunter gpio_free(pdata->slots[0].gpio_wp); 536b702b106SAdrian Hunter err_free_cd: 537b702b106SAdrian Hunter if (gpio_is_valid(pdata->slots[0].switch_pin)) 538b702b106SAdrian Hunter err_free_sp: 539b702b106SAdrian Hunter gpio_free(pdata->slots[0].switch_pin); 540b702b106SAdrian Hunter return ret; 541b702b106SAdrian Hunter } 542b702b106SAdrian Hunter 543b702b106SAdrian Hunter static void omap_hsmmc_gpio_free(struct omap_mmc_platform_data *pdata) 544b702b106SAdrian Hunter { 545b702b106SAdrian Hunter if (gpio_is_valid(pdata->slots[0].gpio_wp)) 546b702b106SAdrian Hunter gpio_free(pdata->slots[0].gpio_wp); 547b702b106SAdrian Hunter if (gpio_is_valid(pdata->slots[0].switch_pin)) 548b702b106SAdrian Hunter gpio_free(pdata->slots[0].switch_pin); 549b702b106SAdrian Hunter } 550b702b106SAdrian Hunter 551a45c6cb8SMadhusudhan Chikkature /* 552a45c6cb8SMadhusudhan Chikkature * Stop clock to the card 553a45c6cb8SMadhusudhan Chikkature */ 55470a3341aSDenis Karpov static void omap_hsmmc_stop_clock(struct omap_hsmmc_host *host) 555a45c6cb8SMadhusudhan Chikkature { 556a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, 557a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, SYSCTL) & ~CEN); 558a45c6cb8SMadhusudhan Chikkature if ((OMAP_HSMMC_READ(host->base, SYSCTL) & CEN) != 0x0) 559a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "MMC Clock is not stoped\n"); 560a45c6cb8SMadhusudhan Chikkature } 561a45c6cb8SMadhusudhan Chikkature 56293caf8e6SAdrian Hunter static void omap_hsmmc_enable_irq(struct omap_hsmmc_host *host, 56393caf8e6SAdrian Hunter struct mmc_command *cmd) 564b417577dSAdrian Hunter { 565b417577dSAdrian Hunter unsigned int irq_mask; 566b417577dSAdrian Hunter 567b417577dSAdrian Hunter if (host->use_dma) 568b417577dSAdrian Hunter irq_mask = INT_EN_MASK & ~(BRR_ENABLE | BWR_ENABLE); 569b417577dSAdrian Hunter else 570b417577dSAdrian Hunter irq_mask = INT_EN_MASK; 571b417577dSAdrian Hunter 57293caf8e6SAdrian Hunter /* Disable timeout for erases */ 57393caf8e6SAdrian Hunter if (cmd->opcode == MMC_ERASE) 57493caf8e6SAdrian Hunter irq_mask &= ~DTO_ENABLE; 57593caf8e6SAdrian Hunter 576b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); 577b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, ISE, irq_mask); 578b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, IE, irq_mask); 579b417577dSAdrian Hunter } 580b417577dSAdrian Hunter 581b417577dSAdrian Hunter static void omap_hsmmc_disable_irq(struct omap_hsmmc_host *host) 582b417577dSAdrian Hunter { 583b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, ISE, 0); 584b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, IE, 0); 585b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); 586b417577dSAdrian Hunter } 587b417577dSAdrian Hunter 58811dd62a7SDenis Karpov #ifdef CONFIG_PM 58911dd62a7SDenis Karpov 59011dd62a7SDenis Karpov /* 59111dd62a7SDenis Karpov * Restore the MMC host context, if it was lost as result of a 59211dd62a7SDenis Karpov * power state change. 59311dd62a7SDenis Karpov */ 59470a3341aSDenis Karpov static int omap_hsmmc_context_restore(struct omap_hsmmc_host *host) 59511dd62a7SDenis Karpov { 59611dd62a7SDenis Karpov struct mmc_ios *ios = &host->mmc->ios; 59711dd62a7SDenis Karpov struct omap_mmc_platform_data *pdata = host->pdata; 59811dd62a7SDenis Karpov int context_loss = 0; 59911dd62a7SDenis Karpov u32 hctl, capa, con; 60011dd62a7SDenis Karpov u16 dsor = 0; 60111dd62a7SDenis Karpov unsigned long timeout; 60211dd62a7SDenis Karpov 60311dd62a7SDenis Karpov if (pdata->get_context_loss_count) { 60411dd62a7SDenis Karpov context_loss = pdata->get_context_loss_count(host->dev); 60511dd62a7SDenis Karpov if (context_loss < 0) 60611dd62a7SDenis Karpov return 1; 60711dd62a7SDenis Karpov } 60811dd62a7SDenis Karpov 60911dd62a7SDenis Karpov dev_dbg(mmc_dev(host->mmc), "context was %slost\n", 61011dd62a7SDenis Karpov context_loss == host->context_loss ? "not " : ""); 61111dd62a7SDenis Karpov if (host->context_loss == context_loss) 61211dd62a7SDenis Karpov return 1; 61311dd62a7SDenis Karpov 61411dd62a7SDenis Karpov /* Wait for hardware reset */ 61511dd62a7SDenis Karpov timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 61611dd62a7SDenis Karpov while ((OMAP_HSMMC_READ(host->base, SYSSTATUS) & RESETDONE) != RESETDONE 61711dd62a7SDenis Karpov && time_before(jiffies, timeout)) 61811dd62a7SDenis Karpov ; 61911dd62a7SDenis Karpov 62011dd62a7SDenis Karpov /* Do software reset */ 62111dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, SYSCONFIG, SOFTRESET); 62211dd62a7SDenis Karpov timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 62311dd62a7SDenis Karpov while ((OMAP_HSMMC_READ(host->base, SYSSTATUS) & RESETDONE) != RESETDONE 62411dd62a7SDenis Karpov && time_before(jiffies, timeout)) 62511dd62a7SDenis Karpov ; 62611dd62a7SDenis Karpov 62711dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, SYSCONFIG, 62811dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCONFIG) | AUTOIDLE); 62911dd62a7SDenis Karpov 63011dd62a7SDenis Karpov if (host->id == OMAP_MMC1_DEVID) { 63111dd62a7SDenis Karpov if (host->power_mode != MMC_POWER_OFF && 63211dd62a7SDenis Karpov (1 << ios->vdd) <= MMC_VDD_23_24) 63311dd62a7SDenis Karpov hctl = SDVS18; 63411dd62a7SDenis Karpov else 63511dd62a7SDenis Karpov hctl = SDVS30; 63611dd62a7SDenis Karpov capa = VS30 | VS18; 63711dd62a7SDenis Karpov } else { 63811dd62a7SDenis Karpov hctl = SDVS18; 63911dd62a7SDenis Karpov capa = VS18; 64011dd62a7SDenis Karpov } 64111dd62a7SDenis Karpov 64211dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, HCTL, 64311dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, HCTL) | hctl); 64411dd62a7SDenis Karpov 64511dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, CAPA, 64611dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, CAPA) | capa); 64711dd62a7SDenis Karpov 64811dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, HCTL, 64911dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, HCTL) | SDBP); 65011dd62a7SDenis Karpov 65111dd62a7SDenis Karpov timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 65211dd62a7SDenis Karpov while ((OMAP_HSMMC_READ(host->base, HCTL) & SDBP) != SDBP 65311dd62a7SDenis Karpov && time_before(jiffies, timeout)) 65411dd62a7SDenis Karpov ; 65511dd62a7SDenis Karpov 656b417577dSAdrian Hunter omap_hsmmc_disable_irq(host); 65711dd62a7SDenis Karpov 65811dd62a7SDenis Karpov /* Do not initialize card-specific things if the power is off */ 65911dd62a7SDenis Karpov if (host->power_mode == MMC_POWER_OFF) 66011dd62a7SDenis Karpov goto out; 66111dd62a7SDenis Karpov 66211dd62a7SDenis Karpov con = OMAP_HSMMC_READ(host->base, CON); 66311dd62a7SDenis Karpov switch (ios->bus_width) { 66411dd62a7SDenis Karpov case MMC_BUS_WIDTH_8: 66511dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, CON, con | DW8); 66611dd62a7SDenis Karpov break; 66711dd62a7SDenis Karpov case MMC_BUS_WIDTH_4: 66811dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, CON, con & ~DW8); 66911dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, HCTL, 67011dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, HCTL) | FOUR_BIT); 67111dd62a7SDenis Karpov break; 67211dd62a7SDenis Karpov case MMC_BUS_WIDTH_1: 67311dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, CON, con & ~DW8); 67411dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, HCTL, 67511dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, HCTL) & ~FOUR_BIT); 67611dd62a7SDenis Karpov break; 67711dd62a7SDenis Karpov } 67811dd62a7SDenis Karpov 67911dd62a7SDenis Karpov if (ios->clock) { 68011dd62a7SDenis Karpov dsor = OMAP_MMC_MASTER_CLOCK / ios->clock; 68111dd62a7SDenis Karpov if (dsor < 1) 68211dd62a7SDenis Karpov dsor = 1; 68311dd62a7SDenis Karpov 68411dd62a7SDenis Karpov if (OMAP_MMC_MASTER_CLOCK / dsor > ios->clock) 68511dd62a7SDenis Karpov dsor++; 68611dd62a7SDenis Karpov 68711dd62a7SDenis Karpov if (dsor > 250) 68811dd62a7SDenis Karpov dsor = 250; 68911dd62a7SDenis Karpov } 69011dd62a7SDenis Karpov 69111dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, SYSCTL, 69211dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCTL) & ~CEN); 69311dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, SYSCTL, (dsor << 6) | (DTO << 16)); 69411dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, SYSCTL, 69511dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCTL) | ICE); 69611dd62a7SDenis Karpov 69711dd62a7SDenis Karpov timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 69811dd62a7SDenis Karpov while ((OMAP_HSMMC_READ(host->base, SYSCTL) & ICS) != ICS 69911dd62a7SDenis Karpov && time_before(jiffies, timeout)) 70011dd62a7SDenis Karpov ; 70111dd62a7SDenis Karpov 70211dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, SYSCTL, 70311dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCTL) | CEN); 70411dd62a7SDenis Karpov 70511dd62a7SDenis Karpov con = OMAP_HSMMC_READ(host->base, CON); 70611dd62a7SDenis Karpov if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN) 70711dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, CON, con | OD); 70811dd62a7SDenis Karpov else 70911dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, CON, con & ~OD); 71011dd62a7SDenis Karpov out: 71111dd62a7SDenis Karpov host->context_loss = context_loss; 71211dd62a7SDenis Karpov 71311dd62a7SDenis Karpov dev_dbg(mmc_dev(host->mmc), "context is restored\n"); 71411dd62a7SDenis Karpov return 0; 71511dd62a7SDenis Karpov } 71611dd62a7SDenis Karpov 71711dd62a7SDenis Karpov /* 71811dd62a7SDenis Karpov * Save the MMC host context (store the number of power state changes so far). 71911dd62a7SDenis Karpov */ 72070a3341aSDenis Karpov static void omap_hsmmc_context_save(struct omap_hsmmc_host *host) 72111dd62a7SDenis Karpov { 72211dd62a7SDenis Karpov struct omap_mmc_platform_data *pdata = host->pdata; 72311dd62a7SDenis Karpov int context_loss; 72411dd62a7SDenis Karpov 72511dd62a7SDenis Karpov if (pdata->get_context_loss_count) { 72611dd62a7SDenis Karpov context_loss = pdata->get_context_loss_count(host->dev); 72711dd62a7SDenis Karpov if (context_loss < 0) 72811dd62a7SDenis Karpov return; 72911dd62a7SDenis Karpov host->context_loss = context_loss; 73011dd62a7SDenis Karpov } 73111dd62a7SDenis Karpov } 73211dd62a7SDenis Karpov 73311dd62a7SDenis Karpov #else 73411dd62a7SDenis Karpov 73570a3341aSDenis Karpov static int omap_hsmmc_context_restore(struct omap_hsmmc_host *host) 73611dd62a7SDenis Karpov { 73711dd62a7SDenis Karpov return 0; 73811dd62a7SDenis Karpov } 73911dd62a7SDenis Karpov 74070a3341aSDenis Karpov static void omap_hsmmc_context_save(struct omap_hsmmc_host *host) 74111dd62a7SDenis Karpov { 74211dd62a7SDenis Karpov } 74311dd62a7SDenis Karpov 74411dd62a7SDenis Karpov #endif 74511dd62a7SDenis Karpov 746a45c6cb8SMadhusudhan Chikkature /* 747a45c6cb8SMadhusudhan Chikkature * Send init stream sequence to card 748a45c6cb8SMadhusudhan Chikkature * before sending IDLE command 749a45c6cb8SMadhusudhan Chikkature */ 75070a3341aSDenis Karpov static void send_init_stream(struct omap_hsmmc_host *host) 751a45c6cb8SMadhusudhan Chikkature { 752a45c6cb8SMadhusudhan Chikkature int reg = 0; 753a45c6cb8SMadhusudhan Chikkature unsigned long timeout; 754a45c6cb8SMadhusudhan Chikkature 755b62f6228SAdrian Hunter if (host->protect_card) 756b62f6228SAdrian Hunter return; 757b62f6228SAdrian Hunter 758a45c6cb8SMadhusudhan Chikkature disable_irq(host->irq); 759b417577dSAdrian Hunter 760b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK); 761a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CON, 762a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, CON) | INIT_STREAM); 763a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CMD, INIT_STREAM_CMD); 764a45c6cb8SMadhusudhan Chikkature 765a45c6cb8SMadhusudhan Chikkature timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 766a45c6cb8SMadhusudhan Chikkature while ((reg != CC) && time_before(jiffies, timeout)) 767a45c6cb8SMadhusudhan Chikkature reg = OMAP_HSMMC_READ(host->base, STAT) & CC; 768a45c6cb8SMadhusudhan Chikkature 769a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CON, 770a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, CON) & ~INIT_STREAM); 771c653a6d4SAdrian Hunter 772c653a6d4SAdrian Hunter OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); 773c653a6d4SAdrian Hunter OMAP_HSMMC_READ(host->base, STAT); 774c653a6d4SAdrian Hunter 775a45c6cb8SMadhusudhan Chikkature enable_irq(host->irq); 776a45c6cb8SMadhusudhan Chikkature } 777a45c6cb8SMadhusudhan Chikkature 778a45c6cb8SMadhusudhan Chikkature static inline 77970a3341aSDenis Karpov int omap_hsmmc_cover_is_closed(struct omap_hsmmc_host *host) 780a45c6cb8SMadhusudhan Chikkature { 781a45c6cb8SMadhusudhan Chikkature int r = 1; 782a45c6cb8SMadhusudhan Chikkature 783191d1f1dSDenis Karpov if (mmc_slot(host).get_cover_state) 784191d1f1dSDenis Karpov r = mmc_slot(host).get_cover_state(host->dev, host->slot_id); 785a45c6cb8SMadhusudhan Chikkature return r; 786a45c6cb8SMadhusudhan Chikkature } 787a45c6cb8SMadhusudhan Chikkature 788a45c6cb8SMadhusudhan Chikkature static ssize_t 78970a3341aSDenis Karpov omap_hsmmc_show_cover_switch(struct device *dev, struct device_attribute *attr, 790a45c6cb8SMadhusudhan Chikkature char *buf) 791a45c6cb8SMadhusudhan Chikkature { 792a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev); 79370a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 794a45c6cb8SMadhusudhan Chikkature 79570a3341aSDenis Karpov return sprintf(buf, "%s\n", 79670a3341aSDenis Karpov omap_hsmmc_cover_is_closed(host) ? "closed" : "open"); 797a45c6cb8SMadhusudhan Chikkature } 798a45c6cb8SMadhusudhan Chikkature 79970a3341aSDenis Karpov static DEVICE_ATTR(cover_switch, S_IRUGO, omap_hsmmc_show_cover_switch, NULL); 800a45c6cb8SMadhusudhan Chikkature 801a45c6cb8SMadhusudhan Chikkature static ssize_t 80270a3341aSDenis Karpov omap_hsmmc_show_slot_name(struct device *dev, struct device_attribute *attr, 803a45c6cb8SMadhusudhan Chikkature char *buf) 804a45c6cb8SMadhusudhan Chikkature { 805a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev); 80670a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 807a45c6cb8SMadhusudhan Chikkature 808191d1f1dSDenis Karpov return sprintf(buf, "%s\n", mmc_slot(host).name); 809a45c6cb8SMadhusudhan Chikkature } 810a45c6cb8SMadhusudhan Chikkature 81170a3341aSDenis Karpov static DEVICE_ATTR(slot_name, S_IRUGO, omap_hsmmc_show_slot_name, NULL); 812a45c6cb8SMadhusudhan Chikkature 813a45c6cb8SMadhusudhan Chikkature /* 814a45c6cb8SMadhusudhan Chikkature * Configure the response type and send the cmd. 815a45c6cb8SMadhusudhan Chikkature */ 816a45c6cb8SMadhusudhan Chikkature static void 81770a3341aSDenis Karpov omap_hsmmc_start_command(struct omap_hsmmc_host *host, struct mmc_command *cmd, 818a45c6cb8SMadhusudhan Chikkature struct mmc_data *data) 819a45c6cb8SMadhusudhan Chikkature { 820a45c6cb8SMadhusudhan Chikkature int cmdreg = 0, resptype = 0, cmdtype = 0; 821a45c6cb8SMadhusudhan Chikkature 822a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "%s: CMD%d, argument 0x%08x\n", 823a45c6cb8SMadhusudhan Chikkature mmc_hostname(host->mmc), cmd->opcode, cmd->arg); 824a45c6cb8SMadhusudhan Chikkature host->cmd = cmd; 825a45c6cb8SMadhusudhan Chikkature 82693caf8e6SAdrian Hunter omap_hsmmc_enable_irq(host, cmd); 827a45c6cb8SMadhusudhan Chikkature 8284a694dc9SAdrian Hunter host->response_busy = 0; 829a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_PRESENT) { 830a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_136) 831a45c6cb8SMadhusudhan Chikkature resptype = 1; 8324a694dc9SAdrian Hunter else if (cmd->flags & MMC_RSP_BUSY) { 8334a694dc9SAdrian Hunter resptype = 3; 8344a694dc9SAdrian Hunter host->response_busy = 1; 8354a694dc9SAdrian Hunter } else 836a45c6cb8SMadhusudhan Chikkature resptype = 2; 837a45c6cb8SMadhusudhan Chikkature } 838a45c6cb8SMadhusudhan Chikkature 839a45c6cb8SMadhusudhan Chikkature /* 840a45c6cb8SMadhusudhan Chikkature * Unlike OMAP1 controller, the cmdtype does not seem to be based on 841a45c6cb8SMadhusudhan Chikkature * ac, bc, adtc, bcr. Only commands ending an open ended transfer need 842a45c6cb8SMadhusudhan Chikkature * a val of 0x3, rest 0x0. 843a45c6cb8SMadhusudhan Chikkature */ 844a45c6cb8SMadhusudhan Chikkature if (cmd == host->mrq->stop) 845a45c6cb8SMadhusudhan Chikkature cmdtype = 0x3; 846a45c6cb8SMadhusudhan Chikkature 847a45c6cb8SMadhusudhan Chikkature cmdreg = (cmd->opcode << 24) | (resptype << 16) | (cmdtype << 22); 848a45c6cb8SMadhusudhan Chikkature 849a45c6cb8SMadhusudhan Chikkature if (data) { 850a45c6cb8SMadhusudhan Chikkature cmdreg |= DP_SELECT | MSBS | BCE; 851a45c6cb8SMadhusudhan Chikkature if (data->flags & MMC_DATA_READ) 852a45c6cb8SMadhusudhan Chikkature cmdreg |= DDIR; 853a45c6cb8SMadhusudhan Chikkature else 854a45c6cb8SMadhusudhan Chikkature cmdreg &= ~(DDIR); 855a45c6cb8SMadhusudhan Chikkature } 856a45c6cb8SMadhusudhan Chikkature 857a45c6cb8SMadhusudhan Chikkature if (host->use_dma) 858a45c6cb8SMadhusudhan Chikkature cmdreg |= DMA_EN; 859a45c6cb8SMadhusudhan Chikkature 860b417577dSAdrian Hunter host->req_in_progress = 1; 8614dffd7a2SAdrian Hunter 862a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, ARG, cmd->arg); 863a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CMD, cmdreg); 864a45c6cb8SMadhusudhan Chikkature } 865a45c6cb8SMadhusudhan Chikkature 8660ccd76d4SJuha Yrjola static int 86770a3341aSDenis Karpov omap_hsmmc_get_dma_dir(struct omap_hsmmc_host *host, struct mmc_data *data) 8680ccd76d4SJuha Yrjola { 8690ccd76d4SJuha Yrjola if (data->flags & MMC_DATA_WRITE) 8700ccd76d4SJuha Yrjola return DMA_TO_DEVICE; 8710ccd76d4SJuha Yrjola else 8720ccd76d4SJuha Yrjola return DMA_FROM_DEVICE; 8730ccd76d4SJuha Yrjola } 8740ccd76d4SJuha Yrjola 875b417577dSAdrian Hunter static void omap_hsmmc_request_done(struct omap_hsmmc_host *host, struct mmc_request *mrq) 876b417577dSAdrian Hunter { 877b417577dSAdrian Hunter int dma_ch; 878b417577dSAdrian Hunter 879b417577dSAdrian Hunter spin_lock(&host->irq_lock); 880b417577dSAdrian Hunter host->req_in_progress = 0; 881b417577dSAdrian Hunter dma_ch = host->dma_ch; 882b417577dSAdrian Hunter spin_unlock(&host->irq_lock); 883b417577dSAdrian Hunter 884b417577dSAdrian Hunter omap_hsmmc_disable_irq(host); 885b417577dSAdrian Hunter /* Do not complete the request if DMA is still in progress */ 886b417577dSAdrian Hunter if (mrq->data && host->use_dma && dma_ch != -1) 887b417577dSAdrian Hunter return; 888b417577dSAdrian Hunter host->mrq = NULL; 889b417577dSAdrian Hunter mmc_request_done(host->mmc, mrq); 890b417577dSAdrian Hunter } 891b417577dSAdrian Hunter 892a45c6cb8SMadhusudhan Chikkature /* 893a45c6cb8SMadhusudhan Chikkature * Notify the transfer complete to MMC core 894a45c6cb8SMadhusudhan Chikkature */ 895a45c6cb8SMadhusudhan Chikkature static void 89670a3341aSDenis Karpov omap_hsmmc_xfer_done(struct omap_hsmmc_host *host, struct mmc_data *data) 897a45c6cb8SMadhusudhan Chikkature { 8984a694dc9SAdrian Hunter if (!data) { 8994a694dc9SAdrian Hunter struct mmc_request *mrq = host->mrq; 9004a694dc9SAdrian Hunter 90123050103SAdrian Hunter /* TC before CC from CMD6 - don't know why, but it happens */ 90223050103SAdrian Hunter if (host->cmd && host->cmd->opcode == 6 && 90323050103SAdrian Hunter host->response_busy) { 90423050103SAdrian Hunter host->response_busy = 0; 90523050103SAdrian Hunter return; 90623050103SAdrian Hunter } 90723050103SAdrian Hunter 908b417577dSAdrian Hunter omap_hsmmc_request_done(host, mrq); 9094a694dc9SAdrian Hunter return; 9104a694dc9SAdrian Hunter } 9114a694dc9SAdrian Hunter 912a45c6cb8SMadhusudhan Chikkature host->data = NULL; 913a45c6cb8SMadhusudhan Chikkature 914a45c6cb8SMadhusudhan Chikkature if (!data->error) 915a45c6cb8SMadhusudhan Chikkature data->bytes_xfered += data->blocks * (data->blksz); 916a45c6cb8SMadhusudhan Chikkature else 917a45c6cb8SMadhusudhan Chikkature data->bytes_xfered = 0; 918a45c6cb8SMadhusudhan Chikkature 919a45c6cb8SMadhusudhan Chikkature if (!data->stop) { 920b417577dSAdrian Hunter omap_hsmmc_request_done(host, data->mrq); 921a45c6cb8SMadhusudhan Chikkature return; 922a45c6cb8SMadhusudhan Chikkature } 92370a3341aSDenis Karpov omap_hsmmc_start_command(host, data->stop, NULL); 924a45c6cb8SMadhusudhan Chikkature } 925a45c6cb8SMadhusudhan Chikkature 926a45c6cb8SMadhusudhan Chikkature /* 927a45c6cb8SMadhusudhan Chikkature * Notify the core about command completion 928a45c6cb8SMadhusudhan Chikkature */ 929a45c6cb8SMadhusudhan Chikkature static void 93070a3341aSDenis Karpov omap_hsmmc_cmd_done(struct omap_hsmmc_host *host, struct mmc_command *cmd) 931a45c6cb8SMadhusudhan Chikkature { 932a45c6cb8SMadhusudhan Chikkature host->cmd = NULL; 933a45c6cb8SMadhusudhan Chikkature 934a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_PRESENT) { 935a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_136) { 936a45c6cb8SMadhusudhan Chikkature /* response type 2 */ 937a45c6cb8SMadhusudhan Chikkature cmd->resp[3] = OMAP_HSMMC_READ(host->base, RSP10); 938a45c6cb8SMadhusudhan Chikkature cmd->resp[2] = OMAP_HSMMC_READ(host->base, RSP32); 939a45c6cb8SMadhusudhan Chikkature cmd->resp[1] = OMAP_HSMMC_READ(host->base, RSP54); 940a45c6cb8SMadhusudhan Chikkature cmd->resp[0] = OMAP_HSMMC_READ(host->base, RSP76); 941a45c6cb8SMadhusudhan Chikkature } else { 942a45c6cb8SMadhusudhan Chikkature /* response types 1, 1b, 3, 4, 5, 6 */ 943a45c6cb8SMadhusudhan Chikkature cmd->resp[0] = OMAP_HSMMC_READ(host->base, RSP10); 944a45c6cb8SMadhusudhan Chikkature } 945a45c6cb8SMadhusudhan Chikkature } 946b417577dSAdrian Hunter if ((host->data == NULL && !host->response_busy) || cmd->error) 947b417577dSAdrian Hunter omap_hsmmc_request_done(host, cmd->mrq); 948a45c6cb8SMadhusudhan Chikkature } 949a45c6cb8SMadhusudhan Chikkature 950a45c6cb8SMadhusudhan Chikkature /* 951a45c6cb8SMadhusudhan Chikkature * DMA clean up for command errors 952a45c6cb8SMadhusudhan Chikkature */ 95370a3341aSDenis Karpov static void omap_hsmmc_dma_cleanup(struct omap_hsmmc_host *host, int errno) 954a45c6cb8SMadhusudhan Chikkature { 955b417577dSAdrian Hunter int dma_ch; 956b417577dSAdrian Hunter 95782788ff5SJarkko Lavinen host->data->error = errno; 958a45c6cb8SMadhusudhan Chikkature 959b417577dSAdrian Hunter spin_lock(&host->irq_lock); 960b417577dSAdrian Hunter dma_ch = host->dma_ch; 961b417577dSAdrian Hunter host->dma_ch = -1; 962b417577dSAdrian Hunter spin_unlock(&host->irq_lock); 963b417577dSAdrian Hunter 964b417577dSAdrian Hunter if (host->use_dma && dma_ch != -1) { 965a45c6cb8SMadhusudhan Chikkature dma_unmap_sg(mmc_dev(host->mmc), host->data->sg, host->dma_len, 96670a3341aSDenis Karpov omap_hsmmc_get_dma_dir(host, host->data)); 967b417577dSAdrian Hunter omap_free_dma(dma_ch); 968a45c6cb8SMadhusudhan Chikkature } 969a45c6cb8SMadhusudhan Chikkature host->data = NULL; 970a45c6cb8SMadhusudhan Chikkature } 971a45c6cb8SMadhusudhan Chikkature 972a45c6cb8SMadhusudhan Chikkature /* 973a45c6cb8SMadhusudhan Chikkature * Readable error output 974a45c6cb8SMadhusudhan Chikkature */ 975a45c6cb8SMadhusudhan Chikkature #ifdef CONFIG_MMC_DEBUG 97670a3341aSDenis Karpov static void omap_hsmmc_report_irq(struct omap_hsmmc_host *host, u32 status) 977a45c6cb8SMadhusudhan Chikkature { 978a45c6cb8SMadhusudhan Chikkature /* --- means reserved bit without definition at documentation */ 97970a3341aSDenis Karpov static const char *omap_hsmmc_status_bits[] = { 980a45c6cb8SMadhusudhan Chikkature "CC", "TC", "BGE", "---", "BWR", "BRR", "---", "---", "CIRQ", 981a45c6cb8SMadhusudhan Chikkature "OBI", "---", "---", "---", "---", "---", "ERRI", "CTO", "CCRC", 982a45c6cb8SMadhusudhan Chikkature "CEB", "CIE", "DTO", "DCRC", "DEB", "---", "ACE", "---", 983a45c6cb8SMadhusudhan Chikkature "---", "---", "---", "CERR", "CERR", "BADA", "---", "---", "---" 984a45c6cb8SMadhusudhan Chikkature }; 985a45c6cb8SMadhusudhan Chikkature char res[256]; 986a45c6cb8SMadhusudhan Chikkature char *buf = res; 987a45c6cb8SMadhusudhan Chikkature int len, i; 988a45c6cb8SMadhusudhan Chikkature 989a45c6cb8SMadhusudhan Chikkature len = sprintf(buf, "MMC IRQ 0x%x :", status); 990a45c6cb8SMadhusudhan Chikkature buf += len; 991a45c6cb8SMadhusudhan Chikkature 99270a3341aSDenis Karpov for (i = 0; i < ARRAY_SIZE(omap_hsmmc_status_bits); i++) 993a45c6cb8SMadhusudhan Chikkature if (status & (1 << i)) { 99470a3341aSDenis Karpov len = sprintf(buf, " %s", omap_hsmmc_status_bits[i]); 995a45c6cb8SMadhusudhan Chikkature buf += len; 996a45c6cb8SMadhusudhan Chikkature } 997a45c6cb8SMadhusudhan Chikkature 998a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "%s\n", res); 999a45c6cb8SMadhusudhan Chikkature } 1000a45c6cb8SMadhusudhan Chikkature #endif /* CONFIG_MMC_DEBUG */ 1001a45c6cb8SMadhusudhan Chikkature 10023ebf74b1SJean Pihet /* 10033ebf74b1SJean Pihet * MMC controller internal state machines reset 10043ebf74b1SJean Pihet * 10053ebf74b1SJean Pihet * Used to reset command or data internal state machines, using respectively 10063ebf74b1SJean Pihet * SRC or SRD bit of SYSCTL register 10073ebf74b1SJean Pihet * Can be called from interrupt context 10083ebf74b1SJean Pihet */ 100970a3341aSDenis Karpov static inline void omap_hsmmc_reset_controller_fsm(struct omap_hsmmc_host *host, 10103ebf74b1SJean Pihet unsigned long bit) 10113ebf74b1SJean Pihet { 10123ebf74b1SJean Pihet unsigned long i = 0; 10133ebf74b1SJean Pihet unsigned long limit = (loops_per_jiffy * 10143ebf74b1SJean Pihet msecs_to_jiffies(MMC_TIMEOUT_MS)); 10153ebf74b1SJean Pihet 10163ebf74b1SJean Pihet OMAP_HSMMC_WRITE(host->base, SYSCTL, 10173ebf74b1SJean Pihet OMAP_HSMMC_READ(host->base, SYSCTL) | bit); 10183ebf74b1SJean Pihet 101907ad64b6SMadhusudhan Chikkature /* 102007ad64b6SMadhusudhan Chikkature * OMAP4 ES2 and greater has an updated reset logic. 102107ad64b6SMadhusudhan Chikkature * Monitor a 0->1 transition first 102207ad64b6SMadhusudhan Chikkature */ 102307ad64b6SMadhusudhan Chikkature if (mmc_slot(host).features & HSMMC_HAS_UPDATED_RESET) { 1024b432b4b3Skishore kadiyala while ((!(OMAP_HSMMC_READ(host->base, SYSCTL) & bit)) 102507ad64b6SMadhusudhan Chikkature && (i++ < limit)) 102607ad64b6SMadhusudhan Chikkature cpu_relax(); 102707ad64b6SMadhusudhan Chikkature } 102807ad64b6SMadhusudhan Chikkature i = 0; 102907ad64b6SMadhusudhan Chikkature 10303ebf74b1SJean Pihet while ((OMAP_HSMMC_READ(host->base, SYSCTL) & bit) && 10313ebf74b1SJean Pihet (i++ < limit)) 10323ebf74b1SJean Pihet cpu_relax(); 10333ebf74b1SJean Pihet 10343ebf74b1SJean Pihet if (OMAP_HSMMC_READ(host->base, SYSCTL) & bit) 10353ebf74b1SJean Pihet dev_err(mmc_dev(host->mmc), 10363ebf74b1SJean Pihet "Timeout waiting on controller reset in %s\n", 10373ebf74b1SJean Pihet __func__); 10383ebf74b1SJean Pihet } 1039a45c6cb8SMadhusudhan Chikkature 1040b417577dSAdrian Hunter static void omap_hsmmc_do_irq(struct omap_hsmmc_host *host, int status) 1041a45c6cb8SMadhusudhan Chikkature { 1042a45c6cb8SMadhusudhan Chikkature struct mmc_data *data; 1043b417577dSAdrian Hunter int end_cmd = 0, end_trans = 0; 1044a45c6cb8SMadhusudhan Chikkature 1045b417577dSAdrian Hunter if (!host->req_in_progress) { 1046b417577dSAdrian Hunter do { 1047b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, STAT, status); 104800adadc1SKevin Hilman /* Flush posted write */ 1049b417577dSAdrian Hunter status = OMAP_HSMMC_READ(host->base, STAT); 1050b417577dSAdrian Hunter } while (status & INT_EN_MASK); 1051b417577dSAdrian Hunter return; 1052a45c6cb8SMadhusudhan Chikkature } 1053a45c6cb8SMadhusudhan Chikkature 1054a45c6cb8SMadhusudhan Chikkature data = host->data; 1055a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "IRQ Status is %x\n", status); 1056a45c6cb8SMadhusudhan Chikkature 1057a45c6cb8SMadhusudhan Chikkature if (status & ERR) { 1058a45c6cb8SMadhusudhan Chikkature #ifdef CONFIG_MMC_DEBUG 105970a3341aSDenis Karpov omap_hsmmc_report_irq(host, status); 1060a45c6cb8SMadhusudhan Chikkature #endif 1061a45c6cb8SMadhusudhan Chikkature if ((status & CMD_TIMEOUT) || 1062a45c6cb8SMadhusudhan Chikkature (status & CMD_CRC)) { 1063a45c6cb8SMadhusudhan Chikkature if (host->cmd) { 1064a45c6cb8SMadhusudhan Chikkature if (status & CMD_TIMEOUT) { 106570a3341aSDenis Karpov omap_hsmmc_reset_controller_fsm(host, 1066191d1f1dSDenis Karpov SRC); 1067a45c6cb8SMadhusudhan Chikkature host->cmd->error = -ETIMEDOUT; 1068a45c6cb8SMadhusudhan Chikkature } else { 1069a45c6cb8SMadhusudhan Chikkature host->cmd->error = -EILSEQ; 1070a45c6cb8SMadhusudhan Chikkature } 1071a45c6cb8SMadhusudhan Chikkature end_cmd = 1; 1072a45c6cb8SMadhusudhan Chikkature } 10734a694dc9SAdrian Hunter if (host->data || host->response_busy) { 10744a694dc9SAdrian Hunter if (host->data) 107570a3341aSDenis Karpov omap_hsmmc_dma_cleanup(host, 107670a3341aSDenis Karpov -ETIMEDOUT); 10774a694dc9SAdrian Hunter host->response_busy = 0; 107870a3341aSDenis Karpov omap_hsmmc_reset_controller_fsm(host, SRD); 1079c232f457SJean Pihet } 1080a45c6cb8SMadhusudhan Chikkature } 1081a45c6cb8SMadhusudhan Chikkature if ((status & DATA_TIMEOUT) || 1082a45c6cb8SMadhusudhan Chikkature (status & DATA_CRC)) { 10834a694dc9SAdrian Hunter if (host->data || host->response_busy) { 10844a694dc9SAdrian Hunter int err = (status & DATA_TIMEOUT) ? 10854a694dc9SAdrian Hunter -ETIMEDOUT : -EILSEQ; 10864a694dc9SAdrian Hunter 10874a694dc9SAdrian Hunter if (host->data) 108870a3341aSDenis Karpov omap_hsmmc_dma_cleanup(host, err); 1089a45c6cb8SMadhusudhan Chikkature else 10904a694dc9SAdrian Hunter host->mrq->cmd->error = err; 10914a694dc9SAdrian Hunter host->response_busy = 0; 109270a3341aSDenis Karpov omap_hsmmc_reset_controller_fsm(host, SRD); 1093a45c6cb8SMadhusudhan Chikkature end_trans = 1; 1094a45c6cb8SMadhusudhan Chikkature } 1095a45c6cb8SMadhusudhan Chikkature } 1096a45c6cb8SMadhusudhan Chikkature if (status & CARD_ERR) { 1097a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1098a45c6cb8SMadhusudhan Chikkature "Ignoring card err CMD%d\n", host->cmd->opcode); 1099a45c6cb8SMadhusudhan Chikkature if (host->cmd) 1100a45c6cb8SMadhusudhan Chikkature end_cmd = 1; 1101a45c6cb8SMadhusudhan Chikkature if (host->data) 1102a45c6cb8SMadhusudhan Chikkature end_trans = 1; 1103a45c6cb8SMadhusudhan Chikkature } 1104a45c6cb8SMadhusudhan Chikkature } 1105a45c6cb8SMadhusudhan Chikkature 1106a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, STAT, status); 1107a45c6cb8SMadhusudhan Chikkature 1108a8fe29d8SJarkko Lavinen if (end_cmd || ((status & CC) && host->cmd)) 110970a3341aSDenis Karpov omap_hsmmc_cmd_done(host, host->cmd); 11100a40e647SJarkko Lavinen if ((end_trans || (status & TC)) && host->mrq) 111170a3341aSDenis Karpov omap_hsmmc_xfer_done(host, data); 1112b417577dSAdrian Hunter } 1113a45c6cb8SMadhusudhan Chikkature 1114b417577dSAdrian Hunter /* 1115b417577dSAdrian Hunter * MMC controller IRQ handler 1116b417577dSAdrian Hunter */ 1117b417577dSAdrian Hunter static irqreturn_t omap_hsmmc_irq(int irq, void *dev_id) 1118b417577dSAdrian Hunter { 1119b417577dSAdrian Hunter struct omap_hsmmc_host *host = dev_id; 1120b417577dSAdrian Hunter int status; 1121b417577dSAdrian Hunter 1122b417577dSAdrian Hunter status = OMAP_HSMMC_READ(host->base, STAT); 1123b417577dSAdrian Hunter do { 1124b417577dSAdrian Hunter omap_hsmmc_do_irq(host, status); 1125b417577dSAdrian Hunter /* Flush posted write */ 1126b417577dSAdrian Hunter status = OMAP_HSMMC_READ(host->base, STAT); 1127b417577dSAdrian Hunter } while (status & INT_EN_MASK); 11284dffd7a2SAdrian Hunter 1129a45c6cb8SMadhusudhan Chikkature return IRQ_HANDLED; 1130a45c6cb8SMadhusudhan Chikkature } 1131a45c6cb8SMadhusudhan Chikkature 113270a3341aSDenis Karpov static void set_sd_bus_power(struct omap_hsmmc_host *host) 1133e13bb300SAdrian Hunter { 1134e13bb300SAdrian Hunter unsigned long i; 1135e13bb300SAdrian Hunter 1136e13bb300SAdrian Hunter OMAP_HSMMC_WRITE(host->base, HCTL, 1137e13bb300SAdrian Hunter OMAP_HSMMC_READ(host->base, HCTL) | SDBP); 1138e13bb300SAdrian Hunter for (i = 0; i < loops_per_jiffy; i++) { 1139e13bb300SAdrian Hunter if (OMAP_HSMMC_READ(host->base, HCTL) & SDBP) 1140e13bb300SAdrian Hunter break; 1141e13bb300SAdrian Hunter cpu_relax(); 1142e13bb300SAdrian Hunter } 1143e13bb300SAdrian Hunter } 1144e13bb300SAdrian Hunter 1145a45c6cb8SMadhusudhan Chikkature /* 1146eb250826SDavid Brownell * Switch MMC interface voltage ... only relevant for MMC1. 1147eb250826SDavid Brownell * 1148eb250826SDavid Brownell * MMC2 and MMC3 use fixed 1.8V levels, and maybe a transceiver. 1149eb250826SDavid Brownell * The MMC2 transceiver controls are used instead of DAT4..DAT7. 1150eb250826SDavid Brownell * Some chips, like eMMC ones, use internal transceivers. 1151a45c6cb8SMadhusudhan Chikkature */ 115270a3341aSDenis Karpov static int omap_hsmmc_switch_opcond(struct omap_hsmmc_host *host, int vdd) 1153a45c6cb8SMadhusudhan Chikkature { 1154a45c6cb8SMadhusudhan Chikkature u32 reg_val = 0; 1155a45c6cb8SMadhusudhan Chikkature int ret; 1156a45c6cb8SMadhusudhan Chikkature 1157a45c6cb8SMadhusudhan Chikkature /* Disable the clocks */ 1158a45c6cb8SMadhusudhan Chikkature clk_disable(host->fclk); 1159a45c6cb8SMadhusudhan Chikkature clk_disable(host->iclk); 11602bec0893SAdrian Hunter if (host->got_dbclk) 1161a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 1162a45c6cb8SMadhusudhan Chikkature 1163a45c6cb8SMadhusudhan Chikkature /* Turn the power off */ 1164a45c6cb8SMadhusudhan Chikkature ret = mmc_slot(host).set_power(host->dev, host->slot_id, 0, 0); 1165a45c6cb8SMadhusudhan Chikkature 1166a45c6cb8SMadhusudhan Chikkature /* Turn the power ON with given VDD 1.8 or 3.0v */ 11672bec0893SAdrian Hunter if (!ret) 11682bec0893SAdrian Hunter ret = mmc_slot(host).set_power(host->dev, host->slot_id, 1, 11692bec0893SAdrian Hunter vdd); 11702bec0893SAdrian Hunter clk_enable(host->iclk); 11712bec0893SAdrian Hunter clk_enable(host->fclk); 11722bec0893SAdrian Hunter if (host->got_dbclk) 11732bec0893SAdrian Hunter clk_enable(host->dbclk); 11742bec0893SAdrian Hunter 1175a45c6cb8SMadhusudhan Chikkature if (ret != 0) 1176a45c6cb8SMadhusudhan Chikkature goto err; 1177a45c6cb8SMadhusudhan Chikkature 1178a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 1179a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) & SDVSCLR); 1180a45c6cb8SMadhusudhan Chikkature reg_val = OMAP_HSMMC_READ(host->base, HCTL); 1181eb250826SDavid Brownell 1182a45c6cb8SMadhusudhan Chikkature /* 1183a45c6cb8SMadhusudhan Chikkature * If a MMC dual voltage card is detected, the set_ios fn calls 1184a45c6cb8SMadhusudhan Chikkature * this fn with VDD bit set for 1.8V. Upon card removal from the 118570a3341aSDenis Karpov * slot, omap_hsmmc_set_ios sets the VDD back to 3V on MMC_POWER_OFF. 1186a45c6cb8SMadhusudhan Chikkature * 1187eb250826SDavid Brownell * Cope with a bit of slop in the range ... per data sheets: 1188eb250826SDavid Brownell * - "1.8V" for vdds_mmc1/vdds_mmc1a can be up to 2.45V max, 1189eb250826SDavid Brownell * but recommended values are 1.71V to 1.89V 1190eb250826SDavid Brownell * - "3.0V" for vdds_mmc1/vdds_mmc1a can be up to 3.5V max, 1191eb250826SDavid Brownell * but recommended values are 2.7V to 3.3V 1192eb250826SDavid Brownell * 1193eb250826SDavid Brownell * Board setup code shouldn't permit anything very out-of-range. 1194eb250826SDavid Brownell * TWL4030-family VMMC1 and VSIM regulators are fine (avoiding the 1195eb250826SDavid Brownell * middle range) but VSIM can't power DAT4..DAT7 at more than 3V. 1196a45c6cb8SMadhusudhan Chikkature */ 1197eb250826SDavid Brownell if ((1 << vdd) <= MMC_VDD_23_24) 1198a45c6cb8SMadhusudhan Chikkature reg_val |= SDVS18; 1199eb250826SDavid Brownell else 1200eb250826SDavid Brownell reg_val |= SDVS30; 1201a45c6cb8SMadhusudhan Chikkature 1202a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, reg_val); 1203e13bb300SAdrian Hunter set_sd_bus_power(host); 1204a45c6cb8SMadhusudhan Chikkature 1205a45c6cb8SMadhusudhan Chikkature return 0; 1206a45c6cb8SMadhusudhan Chikkature err: 1207a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Unable to switch operating voltage\n"); 1208a45c6cb8SMadhusudhan Chikkature return ret; 1209a45c6cb8SMadhusudhan Chikkature } 1210a45c6cb8SMadhusudhan Chikkature 1211b62f6228SAdrian Hunter /* Protect the card while the cover is open */ 1212b62f6228SAdrian Hunter static void omap_hsmmc_protect_card(struct omap_hsmmc_host *host) 1213b62f6228SAdrian Hunter { 1214b62f6228SAdrian Hunter if (!mmc_slot(host).get_cover_state) 1215b62f6228SAdrian Hunter return; 1216b62f6228SAdrian Hunter 1217b62f6228SAdrian Hunter host->reqs_blocked = 0; 1218b62f6228SAdrian Hunter if (mmc_slot(host).get_cover_state(host->dev, host->slot_id)) { 1219b62f6228SAdrian Hunter if (host->protect_card) { 1220b62f6228SAdrian Hunter printk(KERN_INFO "%s: cover is closed, " 1221b62f6228SAdrian Hunter "card is now accessible\n", 1222b62f6228SAdrian Hunter mmc_hostname(host->mmc)); 1223b62f6228SAdrian Hunter host->protect_card = 0; 1224b62f6228SAdrian Hunter } 1225b62f6228SAdrian Hunter } else { 1226b62f6228SAdrian Hunter if (!host->protect_card) { 1227b62f6228SAdrian Hunter printk(KERN_INFO "%s: cover is open, " 1228b62f6228SAdrian Hunter "card is now inaccessible\n", 1229b62f6228SAdrian Hunter mmc_hostname(host->mmc)); 1230b62f6228SAdrian Hunter host->protect_card = 1; 1231b62f6228SAdrian Hunter } 1232b62f6228SAdrian Hunter } 1233b62f6228SAdrian Hunter } 1234b62f6228SAdrian Hunter 1235a45c6cb8SMadhusudhan Chikkature /* 1236a45c6cb8SMadhusudhan Chikkature * Work Item to notify the core about card insertion/removal 1237a45c6cb8SMadhusudhan Chikkature */ 123870a3341aSDenis Karpov static void omap_hsmmc_detect(struct work_struct *work) 1239a45c6cb8SMadhusudhan Chikkature { 124070a3341aSDenis Karpov struct omap_hsmmc_host *host = 124170a3341aSDenis Karpov container_of(work, struct omap_hsmmc_host, mmc_carddetect_work); 1242249d0fa9SDavid Brownell struct omap_mmc_slot_data *slot = &mmc_slot(host); 1243a6b2240dSAdrian Hunter int carddetect; 1244249d0fa9SDavid Brownell 1245a6b2240dSAdrian Hunter if (host->suspended) 1246a6b2240dSAdrian Hunter return; 1247a45c6cb8SMadhusudhan Chikkature 1248a45c6cb8SMadhusudhan Chikkature sysfs_notify(&host->mmc->class_dev.kobj, NULL, "cover_switch"); 1249a6b2240dSAdrian Hunter 1250191d1f1dSDenis Karpov if (slot->card_detect) 1251db0fefc5SAdrian Hunter carddetect = slot->card_detect(host->dev, host->slot_id); 1252b62f6228SAdrian Hunter else { 1253b62f6228SAdrian Hunter omap_hsmmc_protect_card(host); 1254a6b2240dSAdrian Hunter carddetect = -ENOSYS; 1255b62f6228SAdrian Hunter } 1256a6b2240dSAdrian Hunter 1257cdeebaddSMadhusudhan Chikkature if (carddetect) 1258a45c6cb8SMadhusudhan Chikkature mmc_detect_change(host->mmc, (HZ * 200) / 1000); 1259cdeebaddSMadhusudhan Chikkature else 1260a45c6cb8SMadhusudhan Chikkature mmc_detect_change(host->mmc, (HZ * 50) / 1000); 1261a45c6cb8SMadhusudhan Chikkature } 1262a45c6cb8SMadhusudhan Chikkature 1263a45c6cb8SMadhusudhan Chikkature /* 1264a45c6cb8SMadhusudhan Chikkature * ISR for handling card insertion and removal 1265a45c6cb8SMadhusudhan Chikkature */ 126670a3341aSDenis Karpov static irqreturn_t omap_hsmmc_cd_handler(int irq, void *dev_id) 1267a45c6cb8SMadhusudhan Chikkature { 126870a3341aSDenis Karpov struct omap_hsmmc_host *host = (struct omap_hsmmc_host *)dev_id; 1269a45c6cb8SMadhusudhan Chikkature 1270a6b2240dSAdrian Hunter if (host->suspended) 1271a6b2240dSAdrian Hunter return IRQ_HANDLED; 1272a45c6cb8SMadhusudhan Chikkature schedule_work(&host->mmc_carddetect_work); 1273a45c6cb8SMadhusudhan Chikkature 1274a45c6cb8SMadhusudhan Chikkature return IRQ_HANDLED; 1275a45c6cb8SMadhusudhan Chikkature } 1276a45c6cb8SMadhusudhan Chikkature 127770a3341aSDenis Karpov static int omap_hsmmc_get_dma_sync_dev(struct omap_hsmmc_host *host, 12780ccd76d4SJuha Yrjola struct mmc_data *data) 12790ccd76d4SJuha Yrjola { 12800ccd76d4SJuha Yrjola int sync_dev; 12810ccd76d4SJuha Yrjola 1282f3e2f1ddSGrazvydas Ignotas if (data->flags & MMC_DATA_WRITE) 1283f3e2f1ddSGrazvydas Ignotas sync_dev = host->dma_line_tx; 12840ccd76d4SJuha Yrjola else 1285f3e2f1ddSGrazvydas Ignotas sync_dev = host->dma_line_rx; 12860ccd76d4SJuha Yrjola return sync_dev; 12870ccd76d4SJuha Yrjola } 12880ccd76d4SJuha Yrjola 128970a3341aSDenis Karpov static void omap_hsmmc_config_dma_params(struct omap_hsmmc_host *host, 12900ccd76d4SJuha Yrjola struct mmc_data *data, 12910ccd76d4SJuha Yrjola struct scatterlist *sgl) 12920ccd76d4SJuha Yrjola { 12930ccd76d4SJuha Yrjola int blksz, nblk, dma_ch; 12940ccd76d4SJuha Yrjola 12950ccd76d4SJuha Yrjola dma_ch = host->dma_ch; 12960ccd76d4SJuha Yrjola if (data->flags & MMC_DATA_WRITE) { 12970ccd76d4SJuha Yrjola omap_set_dma_dest_params(dma_ch, 0, OMAP_DMA_AMODE_CONSTANT, 12980ccd76d4SJuha Yrjola (host->mapbase + OMAP_HSMMC_DATA), 0, 0); 12990ccd76d4SJuha Yrjola omap_set_dma_src_params(dma_ch, 0, OMAP_DMA_AMODE_POST_INC, 13000ccd76d4SJuha Yrjola sg_dma_address(sgl), 0, 0); 13010ccd76d4SJuha Yrjola } else { 13020ccd76d4SJuha Yrjola omap_set_dma_src_params(dma_ch, 0, OMAP_DMA_AMODE_CONSTANT, 13030ccd76d4SJuha Yrjola (host->mapbase + OMAP_HSMMC_DATA), 0, 0); 13040ccd76d4SJuha Yrjola omap_set_dma_dest_params(dma_ch, 0, OMAP_DMA_AMODE_POST_INC, 13050ccd76d4SJuha Yrjola sg_dma_address(sgl), 0, 0); 13060ccd76d4SJuha Yrjola } 13070ccd76d4SJuha Yrjola 13080ccd76d4SJuha Yrjola blksz = host->data->blksz; 13090ccd76d4SJuha Yrjola nblk = sg_dma_len(sgl) / blksz; 13100ccd76d4SJuha Yrjola 13110ccd76d4SJuha Yrjola omap_set_dma_transfer_params(dma_ch, OMAP_DMA_DATA_TYPE_S32, 13120ccd76d4SJuha Yrjola blksz / 4, nblk, OMAP_DMA_SYNC_FRAME, 131370a3341aSDenis Karpov omap_hsmmc_get_dma_sync_dev(host, data), 13140ccd76d4SJuha Yrjola !(data->flags & MMC_DATA_WRITE)); 13150ccd76d4SJuha Yrjola 13160ccd76d4SJuha Yrjola omap_start_dma(dma_ch); 13170ccd76d4SJuha Yrjola } 13180ccd76d4SJuha Yrjola 1319a45c6cb8SMadhusudhan Chikkature /* 1320a45c6cb8SMadhusudhan Chikkature * DMA call back function 1321a45c6cb8SMadhusudhan Chikkature */ 1322b417577dSAdrian Hunter static void omap_hsmmc_dma_cb(int lch, u16 ch_status, void *cb_data) 1323a45c6cb8SMadhusudhan Chikkature { 1324b417577dSAdrian Hunter struct omap_hsmmc_host *host = cb_data; 1325b417577dSAdrian Hunter struct mmc_data *data = host->mrq->data; 1326b417577dSAdrian Hunter int dma_ch, req_in_progress; 1327a45c6cb8SMadhusudhan Chikkature 1328f3584e5eSVenkatraman S if (!(ch_status & OMAP_DMA_BLOCK_IRQ)) { 1329f3584e5eSVenkatraman S dev_warn(mmc_dev(host->mmc), "unexpected dma status %x\n", 1330f3584e5eSVenkatraman S ch_status); 1331f3584e5eSVenkatraman S return; 1332f3584e5eSVenkatraman S } 1333a45c6cb8SMadhusudhan Chikkature 1334b417577dSAdrian Hunter spin_lock(&host->irq_lock); 1335b417577dSAdrian Hunter if (host->dma_ch < 0) { 1336b417577dSAdrian Hunter spin_unlock(&host->irq_lock); 1337a45c6cb8SMadhusudhan Chikkature return; 1338b417577dSAdrian Hunter } 1339a45c6cb8SMadhusudhan Chikkature 13400ccd76d4SJuha Yrjola host->dma_sg_idx++; 13410ccd76d4SJuha Yrjola if (host->dma_sg_idx < host->dma_len) { 13420ccd76d4SJuha Yrjola /* Fire up the next transfer. */ 1343b417577dSAdrian Hunter omap_hsmmc_config_dma_params(host, data, 1344b417577dSAdrian Hunter data->sg + host->dma_sg_idx); 1345b417577dSAdrian Hunter spin_unlock(&host->irq_lock); 13460ccd76d4SJuha Yrjola return; 13470ccd76d4SJuha Yrjola } 13480ccd76d4SJuha Yrjola 1349b417577dSAdrian Hunter dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->dma_len, 1350b417577dSAdrian Hunter omap_hsmmc_get_dma_dir(host, data)); 1351b417577dSAdrian Hunter 1352b417577dSAdrian Hunter req_in_progress = host->req_in_progress; 1353b417577dSAdrian Hunter dma_ch = host->dma_ch; 1354a45c6cb8SMadhusudhan Chikkature host->dma_ch = -1; 1355b417577dSAdrian Hunter spin_unlock(&host->irq_lock); 1356b417577dSAdrian Hunter 1357b417577dSAdrian Hunter omap_free_dma(dma_ch); 1358b417577dSAdrian Hunter 1359b417577dSAdrian Hunter /* If DMA has finished after TC, complete the request */ 1360b417577dSAdrian Hunter if (!req_in_progress) { 1361b417577dSAdrian Hunter struct mmc_request *mrq = host->mrq; 1362b417577dSAdrian Hunter 1363b417577dSAdrian Hunter host->mrq = NULL; 1364b417577dSAdrian Hunter mmc_request_done(host->mmc, mrq); 1365b417577dSAdrian Hunter } 1366a45c6cb8SMadhusudhan Chikkature } 1367a45c6cb8SMadhusudhan Chikkature 1368a45c6cb8SMadhusudhan Chikkature /* 1369a45c6cb8SMadhusudhan Chikkature * Routine to configure and start DMA for the MMC card 1370a45c6cb8SMadhusudhan Chikkature */ 137170a3341aSDenis Karpov static int omap_hsmmc_start_dma_transfer(struct omap_hsmmc_host *host, 137270a3341aSDenis Karpov struct mmc_request *req) 1373a45c6cb8SMadhusudhan Chikkature { 1374b417577dSAdrian Hunter int dma_ch = 0, ret = 0, i; 1375a45c6cb8SMadhusudhan Chikkature struct mmc_data *data = req->data; 1376a45c6cb8SMadhusudhan Chikkature 13770ccd76d4SJuha Yrjola /* Sanity check: all the SG entries must be aligned by block size. */ 1378a3f406f8SJarkko Lavinen for (i = 0; i < data->sg_len; i++) { 13790ccd76d4SJuha Yrjola struct scatterlist *sgl; 13800ccd76d4SJuha Yrjola 13810ccd76d4SJuha Yrjola sgl = data->sg + i; 13820ccd76d4SJuha Yrjola if (sgl->length % data->blksz) 13830ccd76d4SJuha Yrjola return -EINVAL; 13840ccd76d4SJuha Yrjola } 13850ccd76d4SJuha Yrjola if ((data->blksz % 4) != 0) 13860ccd76d4SJuha Yrjola /* REVISIT: The MMC buffer increments only when MSB is written. 13870ccd76d4SJuha Yrjola * Return error for blksz which is non multiple of four. 13880ccd76d4SJuha Yrjola */ 13890ccd76d4SJuha Yrjola return -EINVAL; 13900ccd76d4SJuha Yrjola 1391b417577dSAdrian Hunter BUG_ON(host->dma_ch != -1); 1392a45c6cb8SMadhusudhan Chikkature 139370a3341aSDenis Karpov ret = omap_request_dma(omap_hsmmc_get_dma_sync_dev(host, data), 139470a3341aSDenis Karpov "MMC/SD", omap_hsmmc_dma_cb, host, &dma_ch); 1395a45c6cb8SMadhusudhan Chikkature if (ret != 0) { 13960ccd76d4SJuha Yrjola dev_err(mmc_dev(host->mmc), 1397a45c6cb8SMadhusudhan Chikkature "%s: omap_request_dma() failed with %d\n", 1398a45c6cb8SMadhusudhan Chikkature mmc_hostname(host->mmc), ret); 1399a45c6cb8SMadhusudhan Chikkature return ret; 1400a45c6cb8SMadhusudhan Chikkature } 1401a45c6cb8SMadhusudhan Chikkature 1402a45c6cb8SMadhusudhan Chikkature host->dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg, 140370a3341aSDenis Karpov data->sg_len, omap_hsmmc_get_dma_dir(host, data)); 1404a45c6cb8SMadhusudhan Chikkature host->dma_ch = dma_ch; 14050ccd76d4SJuha Yrjola host->dma_sg_idx = 0; 1406a45c6cb8SMadhusudhan Chikkature 140770a3341aSDenis Karpov omap_hsmmc_config_dma_params(host, data, data->sg); 1408a45c6cb8SMadhusudhan Chikkature 1409a45c6cb8SMadhusudhan Chikkature return 0; 1410a45c6cb8SMadhusudhan Chikkature } 1411a45c6cb8SMadhusudhan Chikkature 141270a3341aSDenis Karpov static void set_data_timeout(struct omap_hsmmc_host *host, 1413e2bf08d6SAdrian Hunter unsigned int timeout_ns, 1414e2bf08d6SAdrian Hunter unsigned int timeout_clks) 1415a45c6cb8SMadhusudhan Chikkature { 1416a45c6cb8SMadhusudhan Chikkature unsigned int timeout, cycle_ns; 1417a45c6cb8SMadhusudhan Chikkature uint32_t reg, clkd, dto = 0; 1418a45c6cb8SMadhusudhan Chikkature 1419a45c6cb8SMadhusudhan Chikkature reg = OMAP_HSMMC_READ(host->base, SYSCTL); 1420a45c6cb8SMadhusudhan Chikkature clkd = (reg & CLKD_MASK) >> CLKD_SHIFT; 1421a45c6cb8SMadhusudhan Chikkature if (clkd == 0) 1422a45c6cb8SMadhusudhan Chikkature clkd = 1; 1423a45c6cb8SMadhusudhan Chikkature 1424a45c6cb8SMadhusudhan Chikkature cycle_ns = 1000000000 / (clk_get_rate(host->fclk) / clkd); 1425e2bf08d6SAdrian Hunter timeout = timeout_ns / cycle_ns; 1426e2bf08d6SAdrian Hunter timeout += timeout_clks; 1427a45c6cb8SMadhusudhan Chikkature if (timeout) { 1428a45c6cb8SMadhusudhan Chikkature while ((timeout & 0x80000000) == 0) { 1429a45c6cb8SMadhusudhan Chikkature dto += 1; 1430a45c6cb8SMadhusudhan Chikkature timeout <<= 1; 1431a45c6cb8SMadhusudhan Chikkature } 1432a45c6cb8SMadhusudhan Chikkature dto = 31 - dto; 1433a45c6cb8SMadhusudhan Chikkature timeout <<= 1; 1434a45c6cb8SMadhusudhan Chikkature if (timeout && dto) 1435a45c6cb8SMadhusudhan Chikkature dto += 1; 1436a45c6cb8SMadhusudhan Chikkature if (dto >= 13) 1437a45c6cb8SMadhusudhan Chikkature dto -= 13; 1438a45c6cb8SMadhusudhan Chikkature else 1439a45c6cb8SMadhusudhan Chikkature dto = 0; 1440a45c6cb8SMadhusudhan Chikkature if (dto > 14) 1441a45c6cb8SMadhusudhan Chikkature dto = 14; 1442a45c6cb8SMadhusudhan Chikkature } 1443a45c6cb8SMadhusudhan Chikkature 1444a45c6cb8SMadhusudhan Chikkature reg &= ~DTO_MASK; 1445a45c6cb8SMadhusudhan Chikkature reg |= dto << DTO_SHIFT; 1446a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, reg); 1447a45c6cb8SMadhusudhan Chikkature } 1448a45c6cb8SMadhusudhan Chikkature 1449a45c6cb8SMadhusudhan Chikkature /* 1450a45c6cb8SMadhusudhan Chikkature * Configure block length for MMC/SD cards and initiate the transfer. 1451a45c6cb8SMadhusudhan Chikkature */ 1452a45c6cb8SMadhusudhan Chikkature static int 145370a3341aSDenis Karpov omap_hsmmc_prepare_data(struct omap_hsmmc_host *host, struct mmc_request *req) 1454a45c6cb8SMadhusudhan Chikkature { 1455a45c6cb8SMadhusudhan Chikkature int ret; 1456a45c6cb8SMadhusudhan Chikkature host->data = req->data; 1457a45c6cb8SMadhusudhan Chikkature 1458a45c6cb8SMadhusudhan Chikkature if (req->data == NULL) { 1459a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, BLK, 0); 1460e2bf08d6SAdrian Hunter /* 1461e2bf08d6SAdrian Hunter * Set an arbitrary 100ms data timeout for commands with 1462e2bf08d6SAdrian Hunter * busy signal. 1463e2bf08d6SAdrian Hunter */ 1464e2bf08d6SAdrian Hunter if (req->cmd->flags & MMC_RSP_BUSY) 1465e2bf08d6SAdrian Hunter set_data_timeout(host, 100000000U, 0); 1466a45c6cb8SMadhusudhan Chikkature return 0; 1467a45c6cb8SMadhusudhan Chikkature } 1468a45c6cb8SMadhusudhan Chikkature 1469a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, BLK, (req->data->blksz) 1470a45c6cb8SMadhusudhan Chikkature | (req->data->blocks << 16)); 1471e2bf08d6SAdrian Hunter set_data_timeout(host, req->data->timeout_ns, req->data->timeout_clks); 1472a45c6cb8SMadhusudhan Chikkature 1473a45c6cb8SMadhusudhan Chikkature if (host->use_dma) { 147470a3341aSDenis Karpov ret = omap_hsmmc_start_dma_transfer(host, req); 1475a45c6cb8SMadhusudhan Chikkature if (ret != 0) { 1476a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "MMC start dma failure\n"); 1477a45c6cb8SMadhusudhan Chikkature return ret; 1478a45c6cb8SMadhusudhan Chikkature } 1479a45c6cb8SMadhusudhan Chikkature } 1480a45c6cb8SMadhusudhan Chikkature return 0; 1481a45c6cb8SMadhusudhan Chikkature } 1482a45c6cb8SMadhusudhan Chikkature 1483a45c6cb8SMadhusudhan Chikkature /* 1484a45c6cb8SMadhusudhan Chikkature * Request function. for read/write operation 1485a45c6cb8SMadhusudhan Chikkature */ 148670a3341aSDenis Karpov static void omap_hsmmc_request(struct mmc_host *mmc, struct mmc_request *req) 1487a45c6cb8SMadhusudhan Chikkature { 148870a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1489a3f406f8SJarkko Lavinen int err; 1490a45c6cb8SMadhusudhan Chikkature 1491b417577dSAdrian Hunter BUG_ON(host->req_in_progress); 1492b417577dSAdrian Hunter BUG_ON(host->dma_ch != -1); 1493b62f6228SAdrian Hunter if (host->protect_card) { 1494b62f6228SAdrian Hunter if (host->reqs_blocked < 3) { 1495b62f6228SAdrian Hunter /* 1496b62f6228SAdrian Hunter * Ensure the controller is left in a consistent 1497b62f6228SAdrian Hunter * state by resetting the command and data state 1498b62f6228SAdrian Hunter * machines. 1499b62f6228SAdrian Hunter */ 1500b62f6228SAdrian Hunter omap_hsmmc_reset_controller_fsm(host, SRD); 1501b62f6228SAdrian Hunter omap_hsmmc_reset_controller_fsm(host, SRC); 1502b62f6228SAdrian Hunter host->reqs_blocked += 1; 1503b62f6228SAdrian Hunter } 1504b62f6228SAdrian Hunter req->cmd->error = -EBADF; 1505b62f6228SAdrian Hunter if (req->data) 1506b62f6228SAdrian Hunter req->data->error = -EBADF; 1507b417577dSAdrian Hunter req->cmd->retries = 0; 1508b62f6228SAdrian Hunter mmc_request_done(mmc, req); 1509b62f6228SAdrian Hunter return; 1510b62f6228SAdrian Hunter } else if (host->reqs_blocked) 1511b62f6228SAdrian Hunter host->reqs_blocked = 0; 1512a45c6cb8SMadhusudhan Chikkature WARN_ON(host->mrq != NULL); 1513a45c6cb8SMadhusudhan Chikkature host->mrq = req; 151470a3341aSDenis Karpov err = omap_hsmmc_prepare_data(host, req); 1515a3f406f8SJarkko Lavinen if (err) { 1516a3f406f8SJarkko Lavinen req->cmd->error = err; 1517a3f406f8SJarkko Lavinen if (req->data) 1518a3f406f8SJarkko Lavinen req->data->error = err; 1519a3f406f8SJarkko Lavinen host->mrq = NULL; 1520a3f406f8SJarkko Lavinen mmc_request_done(mmc, req); 1521a3f406f8SJarkko Lavinen return; 1522a3f406f8SJarkko Lavinen } 1523a3f406f8SJarkko Lavinen 152470a3341aSDenis Karpov omap_hsmmc_start_command(host, req->cmd, req->data); 1525a45c6cb8SMadhusudhan Chikkature } 1526a45c6cb8SMadhusudhan Chikkature 1527a45c6cb8SMadhusudhan Chikkature /* Routine to configure clock values. Exposed API to core */ 152870a3341aSDenis Karpov static void omap_hsmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 1529a45c6cb8SMadhusudhan Chikkature { 153070a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1531a45c6cb8SMadhusudhan Chikkature u16 dsor = 0; 1532a45c6cb8SMadhusudhan Chikkature unsigned long regval; 1533a45c6cb8SMadhusudhan Chikkature unsigned long timeout; 153473153010SJarkko Lavinen u32 con; 1535a3621465SAdrian Hunter int do_send_init_stream = 0; 1536a45c6cb8SMadhusudhan Chikkature 15375e2ea617SAdrian Hunter mmc_host_enable(host->mmc); 15385e2ea617SAdrian Hunter 1539a3621465SAdrian Hunter if (ios->power_mode != host->power_mode) { 1540a45c6cb8SMadhusudhan Chikkature switch (ios->power_mode) { 1541a45c6cb8SMadhusudhan Chikkature case MMC_POWER_OFF: 1542a3621465SAdrian Hunter mmc_slot(host).set_power(host->dev, host->slot_id, 1543a3621465SAdrian Hunter 0, 0); 1544623821f7SAdrian Hunter host->vdd = 0; 1545a45c6cb8SMadhusudhan Chikkature break; 1546a45c6cb8SMadhusudhan Chikkature case MMC_POWER_UP: 1547a3621465SAdrian Hunter mmc_slot(host).set_power(host->dev, host->slot_id, 1548a3621465SAdrian Hunter 1, ios->vdd); 1549623821f7SAdrian Hunter host->vdd = ios->vdd; 1550a45c6cb8SMadhusudhan Chikkature break; 1551a3621465SAdrian Hunter case MMC_POWER_ON: 1552a3621465SAdrian Hunter do_send_init_stream = 1; 1553a3621465SAdrian Hunter break; 1554a3621465SAdrian Hunter } 1555a3621465SAdrian Hunter host->power_mode = ios->power_mode; 1556a45c6cb8SMadhusudhan Chikkature } 1557a45c6cb8SMadhusudhan Chikkature 1558dd498effSDenis Karpov /* FIXME: set registers based only on changes to ios */ 1559dd498effSDenis Karpov 156073153010SJarkko Lavinen con = OMAP_HSMMC_READ(host->base, CON); 1561a45c6cb8SMadhusudhan Chikkature switch (mmc->ios.bus_width) { 156273153010SJarkko Lavinen case MMC_BUS_WIDTH_8: 156373153010SJarkko Lavinen OMAP_HSMMC_WRITE(host->base, CON, con | DW8); 156473153010SJarkko Lavinen break; 1565a45c6cb8SMadhusudhan Chikkature case MMC_BUS_WIDTH_4: 156673153010SJarkko Lavinen OMAP_HSMMC_WRITE(host->base, CON, con & ~DW8); 1567a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 1568a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) | FOUR_BIT); 1569a45c6cb8SMadhusudhan Chikkature break; 1570a45c6cb8SMadhusudhan Chikkature case MMC_BUS_WIDTH_1: 157173153010SJarkko Lavinen OMAP_HSMMC_WRITE(host->base, CON, con & ~DW8); 1572a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 1573a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) & ~FOUR_BIT); 1574a45c6cb8SMadhusudhan Chikkature break; 1575a45c6cb8SMadhusudhan Chikkature } 1576a45c6cb8SMadhusudhan Chikkature 15774621d5f8SKishore Kadiyala if (host->pdata->controller_flags & OMAP_HSMMC_SUPPORTS_DUAL_VOLT) { 1578eb250826SDavid Brownell /* Only MMC1 can interface at 3V without some flavor 1579eb250826SDavid Brownell * of external transceiver; but they all handle 1.8V. 1580eb250826SDavid Brownell */ 1581a45c6cb8SMadhusudhan Chikkature if ((OMAP_HSMMC_READ(host->base, HCTL) & SDVSDET) && 1582a45c6cb8SMadhusudhan Chikkature (ios->vdd == DUAL_VOLT_OCR_BIT)) { 1583a45c6cb8SMadhusudhan Chikkature /* 1584a45c6cb8SMadhusudhan Chikkature * The mmc_select_voltage fn of the core does 1585a45c6cb8SMadhusudhan Chikkature * not seem to set the power_mode to 1586a45c6cb8SMadhusudhan Chikkature * MMC_POWER_UP upon recalculating the voltage. 1587a45c6cb8SMadhusudhan Chikkature * vdd 1.8v. 1588a45c6cb8SMadhusudhan Chikkature */ 158970a3341aSDenis Karpov if (omap_hsmmc_switch_opcond(host, ios->vdd) != 0) 1590a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1591a45c6cb8SMadhusudhan Chikkature "Switch operation failed\n"); 1592a45c6cb8SMadhusudhan Chikkature } 1593a45c6cb8SMadhusudhan Chikkature } 1594a45c6cb8SMadhusudhan Chikkature 1595a45c6cb8SMadhusudhan Chikkature if (ios->clock) { 1596a45c6cb8SMadhusudhan Chikkature dsor = OMAP_MMC_MASTER_CLOCK / ios->clock; 1597a45c6cb8SMadhusudhan Chikkature if (dsor < 1) 1598a45c6cb8SMadhusudhan Chikkature dsor = 1; 1599a45c6cb8SMadhusudhan Chikkature 1600a45c6cb8SMadhusudhan Chikkature if (OMAP_MMC_MASTER_CLOCK / dsor > ios->clock) 1601a45c6cb8SMadhusudhan Chikkature dsor++; 1602a45c6cb8SMadhusudhan Chikkature 1603a45c6cb8SMadhusudhan Chikkature if (dsor > 250) 1604a45c6cb8SMadhusudhan Chikkature dsor = 250; 1605a45c6cb8SMadhusudhan Chikkature } 160670a3341aSDenis Karpov omap_hsmmc_stop_clock(host); 1607a45c6cb8SMadhusudhan Chikkature regval = OMAP_HSMMC_READ(host->base, SYSCTL); 1608a45c6cb8SMadhusudhan Chikkature regval = regval & ~(CLKD_MASK); 1609a45c6cb8SMadhusudhan Chikkature regval = regval | (dsor << 6) | (DTO << 16); 1610a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, regval); 1611a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, 1612a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, SYSCTL) | ICE); 1613a45c6cb8SMadhusudhan Chikkature 1614a45c6cb8SMadhusudhan Chikkature /* Wait till the ICS bit is set */ 1615a45c6cb8SMadhusudhan Chikkature timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 161611dd62a7SDenis Karpov while ((OMAP_HSMMC_READ(host->base, SYSCTL) & ICS) != ICS 1617a45c6cb8SMadhusudhan Chikkature && time_before(jiffies, timeout)) 1618a45c6cb8SMadhusudhan Chikkature msleep(1); 1619a45c6cb8SMadhusudhan Chikkature 1620a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, 1621a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, SYSCTL) | CEN); 1622a45c6cb8SMadhusudhan Chikkature 1623a3621465SAdrian Hunter if (do_send_init_stream) 1624a45c6cb8SMadhusudhan Chikkature send_init_stream(host); 1625a45c6cb8SMadhusudhan Chikkature 1626abb28e73SDenis Karpov con = OMAP_HSMMC_READ(host->base, CON); 1627a45c6cb8SMadhusudhan Chikkature if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN) 1628abb28e73SDenis Karpov OMAP_HSMMC_WRITE(host->base, CON, con | OD); 1629abb28e73SDenis Karpov else 1630abb28e73SDenis Karpov OMAP_HSMMC_WRITE(host->base, CON, con & ~OD); 16315e2ea617SAdrian Hunter 1632dd498effSDenis Karpov if (host->power_mode == MMC_POWER_OFF) 1633dd498effSDenis Karpov mmc_host_disable(host->mmc); 1634dd498effSDenis Karpov else 16355e2ea617SAdrian Hunter mmc_host_lazy_disable(host->mmc); 1636a45c6cb8SMadhusudhan Chikkature } 1637a45c6cb8SMadhusudhan Chikkature 1638a45c6cb8SMadhusudhan Chikkature static int omap_hsmmc_get_cd(struct mmc_host *mmc) 1639a45c6cb8SMadhusudhan Chikkature { 164070a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1641a45c6cb8SMadhusudhan Chikkature 1642191d1f1dSDenis Karpov if (!mmc_slot(host).card_detect) 1643a45c6cb8SMadhusudhan Chikkature return -ENOSYS; 1644db0fefc5SAdrian Hunter return mmc_slot(host).card_detect(host->dev, host->slot_id); 1645a45c6cb8SMadhusudhan Chikkature } 1646a45c6cb8SMadhusudhan Chikkature 1647a45c6cb8SMadhusudhan Chikkature static int omap_hsmmc_get_ro(struct mmc_host *mmc) 1648a45c6cb8SMadhusudhan Chikkature { 164970a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1650a45c6cb8SMadhusudhan Chikkature 1651191d1f1dSDenis Karpov if (!mmc_slot(host).get_ro) 1652a45c6cb8SMadhusudhan Chikkature return -ENOSYS; 1653191d1f1dSDenis Karpov return mmc_slot(host).get_ro(host->dev, 0); 1654a45c6cb8SMadhusudhan Chikkature } 1655a45c6cb8SMadhusudhan Chikkature 16564816858cSGrazvydas Ignotas static void omap_hsmmc_init_card(struct mmc_host *mmc, struct mmc_card *card) 16574816858cSGrazvydas Ignotas { 16584816858cSGrazvydas Ignotas struct omap_hsmmc_host *host = mmc_priv(mmc); 16594816858cSGrazvydas Ignotas 16604816858cSGrazvydas Ignotas if (mmc_slot(host).init_card) 16614816858cSGrazvydas Ignotas mmc_slot(host).init_card(card); 16624816858cSGrazvydas Ignotas } 16634816858cSGrazvydas Ignotas 166470a3341aSDenis Karpov static void omap_hsmmc_conf_bus_power(struct omap_hsmmc_host *host) 16651b331e69SKim Kyuwon { 16661b331e69SKim Kyuwon u32 hctl, capa, value; 16671b331e69SKim Kyuwon 16681b331e69SKim Kyuwon /* Only MMC1 supports 3.0V */ 16694621d5f8SKishore Kadiyala if (host->pdata->controller_flags & OMAP_HSMMC_SUPPORTS_DUAL_VOLT) { 16701b331e69SKim Kyuwon hctl = SDVS30; 16711b331e69SKim Kyuwon capa = VS30 | VS18; 16721b331e69SKim Kyuwon } else { 16731b331e69SKim Kyuwon hctl = SDVS18; 16741b331e69SKim Kyuwon capa = VS18; 16751b331e69SKim Kyuwon } 16761b331e69SKim Kyuwon 16771b331e69SKim Kyuwon value = OMAP_HSMMC_READ(host->base, HCTL) & ~SDVS_MASK; 16781b331e69SKim Kyuwon OMAP_HSMMC_WRITE(host->base, HCTL, value | hctl); 16791b331e69SKim Kyuwon 16801b331e69SKim Kyuwon value = OMAP_HSMMC_READ(host->base, CAPA); 16811b331e69SKim Kyuwon OMAP_HSMMC_WRITE(host->base, CAPA, value | capa); 16821b331e69SKim Kyuwon 16831b331e69SKim Kyuwon /* Set the controller to AUTO IDLE mode */ 16841b331e69SKim Kyuwon value = OMAP_HSMMC_READ(host->base, SYSCONFIG); 16851b331e69SKim Kyuwon OMAP_HSMMC_WRITE(host->base, SYSCONFIG, value | AUTOIDLE); 16861b331e69SKim Kyuwon 16871b331e69SKim Kyuwon /* Set SD bus power bit */ 1688e13bb300SAdrian Hunter set_sd_bus_power(host); 16891b331e69SKim Kyuwon } 16901b331e69SKim Kyuwon 1691dd498effSDenis Karpov /* 1692dd498effSDenis Karpov * Dynamic power saving handling, FSM: 169313189e78SJarkko Lavinen * ENABLED -> DISABLED -> CARDSLEEP / REGSLEEP -> OFF 169413189e78SJarkko Lavinen * ^___________| | | 169513189e78SJarkko Lavinen * |______________________|______________________| 1696dd498effSDenis Karpov * 1697dd498effSDenis Karpov * ENABLED: mmc host is fully functional 1698dd498effSDenis Karpov * DISABLED: fclk is off 169913189e78SJarkko Lavinen * CARDSLEEP: fclk is off, card is asleep, voltage regulator is asleep 1700623821f7SAdrian Hunter * REGSLEEP: fclk is off, voltage regulator is asleep 170113189e78SJarkko Lavinen * OFF: fclk is off, voltage regulator is off 1702dd498effSDenis Karpov * 1703dd498effSDenis Karpov * Transition handlers return the timeout for the next state transition 1704dd498effSDenis Karpov * or negative error. 1705dd498effSDenis Karpov */ 1706dd498effSDenis Karpov 170713189e78SJarkko Lavinen enum {ENABLED = 0, DISABLED, CARDSLEEP, REGSLEEP, OFF}; 1708dd498effSDenis Karpov 1709dd498effSDenis Karpov /* Handler for [ENABLED -> DISABLED] transition */ 171070a3341aSDenis Karpov static int omap_hsmmc_enabled_to_disabled(struct omap_hsmmc_host *host) 1711dd498effSDenis Karpov { 171270a3341aSDenis Karpov omap_hsmmc_context_save(host); 1713dd498effSDenis Karpov clk_disable(host->fclk); 1714dd498effSDenis Karpov host->dpm_state = DISABLED; 1715dd498effSDenis Karpov 1716dd498effSDenis Karpov dev_dbg(mmc_dev(host->mmc), "ENABLED -> DISABLED\n"); 1717dd498effSDenis Karpov 1718dd498effSDenis Karpov if (host->power_mode == MMC_POWER_OFF) 1719dd498effSDenis Karpov return 0; 1720dd498effSDenis Karpov 17214380eea2SAdrian Hunter return OMAP_MMC_SLEEP_TIMEOUT; 1722dd498effSDenis Karpov } 1723dd498effSDenis Karpov 172413189e78SJarkko Lavinen /* Handler for [DISABLED -> REGSLEEP / CARDSLEEP] transition */ 172570a3341aSDenis Karpov static int omap_hsmmc_disabled_to_sleep(struct omap_hsmmc_host *host) 1726dd498effSDenis Karpov { 172713189e78SJarkko Lavinen int err, new_state; 1728dd498effSDenis Karpov 1729dd498effSDenis Karpov if (!mmc_try_claim_host(host->mmc)) 1730dd498effSDenis Karpov return 0; 1731dd498effSDenis Karpov 1732dd498effSDenis Karpov clk_enable(host->fclk); 173370a3341aSDenis Karpov omap_hsmmc_context_restore(host); 173413189e78SJarkko Lavinen if (mmc_card_can_sleep(host->mmc)) { 173513189e78SJarkko Lavinen err = mmc_card_sleep(host->mmc); 173613189e78SJarkko Lavinen if (err < 0) { 173713189e78SJarkko Lavinen clk_disable(host->fclk); 173813189e78SJarkko Lavinen mmc_release_host(host->mmc); 173913189e78SJarkko Lavinen return err; 174013189e78SJarkko Lavinen } 174113189e78SJarkko Lavinen new_state = CARDSLEEP; 174270a3341aSDenis Karpov } else { 174313189e78SJarkko Lavinen new_state = REGSLEEP; 174470a3341aSDenis Karpov } 174513189e78SJarkko Lavinen if (mmc_slot(host).set_sleep) 174613189e78SJarkko Lavinen mmc_slot(host).set_sleep(host->dev, host->slot_id, 1, 0, 174713189e78SJarkko Lavinen new_state == CARDSLEEP); 174813189e78SJarkko Lavinen /* FIXME: turn off bus power and perhaps interrupts too */ 174913189e78SJarkko Lavinen clk_disable(host->fclk); 175013189e78SJarkko Lavinen host->dpm_state = new_state; 175113189e78SJarkko Lavinen 175213189e78SJarkko Lavinen mmc_release_host(host->mmc); 175313189e78SJarkko Lavinen 175413189e78SJarkko Lavinen dev_dbg(mmc_dev(host->mmc), "DISABLED -> %s\n", 175513189e78SJarkko Lavinen host->dpm_state == CARDSLEEP ? "CARDSLEEP" : "REGSLEEP"); 1756dd498effSDenis Karpov 17571df58db8SAdrian Hunter if (mmc_slot(host).no_off) 17581df58db8SAdrian Hunter return 0; 17591df58db8SAdrian Hunter 1760dd498effSDenis Karpov if ((host->mmc->caps & MMC_CAP_NONREMOVABLE) || 1761dd498effSDenis Karpov mmc_slot(host).card_detect || 1762dd498effSDenis Karpov (mmc_slot(host).get_cover_state && 176313189e78SJarkko Lavinen mmc_slot(host).get_cover_state(host->dev, host->slot_id))) 17644380eea2SAdrian Hunter return OMAP_MMC_OFF_TIMEOUT; 176513189e78SJarkko Lavinen 176613189e78SJarkko Lavinen return 0; 1767623821f7SAdrian Hunter } 1768dd498effSDenis Karpov 176913189e78SJarkko Lavinen /* Handler for [REGSLEEP / CARDSLEEP -> OFF] transition */ 177070a3341aSDenis Karpov static int omap_hsmmc_sleep_to_off(struct omap_hsmmc_host *host) 177113189e78SJarkko Lavinen { 177213189e78SJarkko Lavinen if (!mmc_try_claim_host(host->mmc)) 177313189e78SJarkko Lavinen return 0; 1774dd498effSDenis Karpov 17751df58db8SAdrian Hunter if (mmc_slot(host).no_off) 17761df58db8SAdrian Hunter return 0; 17771df58db8SAdrian Hunter 177813189e78SJarkko Lavinen if (!((host->mmc->caps & MMC_CAP_NONREMOVABLE) || 177913189e78SJarkko Lavinen mmc_slot(host).card_detect || 178013189e78SJarkko Lavinen (mmc_slot(host).get_cover_state && 178113189e78SJarkko Lavinen mmc_slot(host).get_cover_state(host->dev, host->slot_id)))) { 178213189e78SJarkko Lavinen mmc_release_host(host->mmc); 178313189e78SJarkko Lavinen return 0; 178413189e78SJarkko Lavinen } 1785dd498effSDenis Karpov 178613189e78SJarkko Lavinen mmc_slot(host).set_power(host->dev, host->slot_id, 0, 0); 178713189e78SJarkko Lavinen host->vdd = 0; 178813189e78SJarkko Lavinen host->power_mode = MMC_POWER_OFF; 178913189e78SJarkko Lavinen 179013189e78SJarkko Lavinen dev_dbg(mmc_dev(host->mmc), "%s -> OFF\n", 179113189e78SJarkko Lavinen host->dpm_state == CARDSLEEP ? "CARDSLEEP" : "REGSLEEP"); 179213189e78SJarkko Lavinen 179313189e78SJarkko Lavinen host->dpm_state = OFF; 1794dd498effSDenis Karpov 1795dd498effSDenis Karpov mmc_release_host(host->mmc); 1796dd498effSDenis Karpov 1797dd498effSDenis Karpov return 0; 1798dd498effSDenis Karpov } 1799dd498effSDenis Karpov 1800dd498effSDenis Karpov /* Handler for [DISABLED -> ENABLED] transition */ 180170a3341aSDenis Karpov static int omap_hsmmc_disabled_to_enabled(struct omap_hsmmc_host *host) 1802dd498effSDenis Karpov { 1803dd498effSDenis Karpov int err; 1804dd498effSDenis Karpov 1805dd498effSDenis Karpov err = clk_enable(host->fclk); 1806dd498effSDenis Karpov if (err < 0) 1807dd498effSDenis Karpov return err; 1808dd498effSDenis Karpov 180970a3341aSDenis Karpov omap_hsmmc_context_restore(host); 1810dd498effSDenis Karpov host->dpm_state = ENABLED; 1811dd498effSDenis Karpov 1812dd498effSDenis Karpov dev_dbg(mmc_dev(host->mmc), "DISABLED -> ENABLED\n"); 1813dd498effSDenis Karpov 1814dd498effSDenis Karpov return 0; 1815dd498effSDenis Karpov } 1816dd498effSDenis Karpov 181713189e78SJarkko Lavinen /* Handler for [SLEEP -> ENABLED] transition */ 181870a3341aSDenis Karpov static int omap_hsmmc_sleep_to_enabled(struct omap_hsmmc_host *host) 181913189e78SJarkko Lavinen { 182013189e78SJarkko Lavinen if (!mmc_try_claim_host(host->mmc)) 182113189e78SJarkko Lavinen return 0; 182213189e78SJarkko Lavinen 182313189e78SJarkko Lavinen clk_enable(host->fclk); 182470a3341aSDenis Karpov omap_hsmmc_context_restore(host); 182513189e78SJarkko Lavinen if (mmc_slot(host).set_sleep) 182613189e78SJarkko Lavinen mmc_slot(host).set_sleep(host->dev, host->slot_id, 0, 182713189e78SJarkko Lavinen host->vdd, host->dpm_state == CARDSLEEP); 182813189e78SJarkko Lavinen if (mmc_card_can_sleep(host->mmc)) 182913189e78SJarkko Lavinen mmc_card_awake(host->mmc); 183013189e78SJarkko Lavinen 183113189e78SJarkko Lavinen dev_dbg(mmc_dev(host->mmc), "%s -> ENABLED\n", 183213189e78SJarkko Lavinen host->dpm_state == CARDSLEEP ? "CARDSLEEP" : "REGSLEEP"); 183313189e78SJarkko Lavinen 183413189e78SJarkko Lavinen host->dpm_state = ENABLED; 183513189e78SJarkko Lavinen 183613189e78SJarkko Lavinen mmc_release_host(host->mmc); 183713189e78SJarkko Lavinen 183813189e78SJarkko Lavinen return 0; 183913189e78SJarkko Lavinen } 184013189e78SJarkko Lavinen 1841dd498effSDenis Karpov /* Handler for [OFF -> ENABLED] transition */ 184270a3341aSDenis Karpov static int omap_hsmmc_off_to_enabled(struct omap_hsmmc_host *host) 1843dd498effSDenis Karpov { 1844dd498effSDenis Karpov clk_enable(host->fclk); 1845dd498effSDenis Karpov 184670a3341aSDenis Karpov omap_hsmmc_context_restore(host); 184770a3341aSDenis Karpov omap_hsmmc_conf_bus_power(host); 1848dd498effSDenis Karpov mmc_power_restore_host(host->mmc); 1849dd498effSDenis Karpov 1850dd498effSDenis Karpov host->dpm_state = ENABLED; 1851dd498effSDenis Karpov 1852dd498effSDenis Karpov dev_dbg(mmc_dev(host->mmc), "OFF -> ENABLED\n"); 1853dd498effSDenis Karpov 1854dd498effSDenis Karpov return 0; 1855dd498effSDenis Karpov } 1856dd498effSDenis Karpov 1857dd498effSDenis Karpov /* 1858dd498effSDenis Karpov * Bring MMC host to ENABLED from any other PM state. 1859dd498effSDenis Karpov */ 186070a3341aSDenis Karpov static int omap_hsmmc_enable(struct mmc_host *mmc) 1861dd498effSDenis Karpov { 186270a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1863dd498effSDenis Karpov 1864dd498effSDenis Karpov switch (host->dpm_state) { 1865dd498effSDenis Karpov case DISABLED: 186670a3341aSDenis Karpov return omap_hsmmc_disabled_to_enabled(host); 186713189e78SJarkko Lavinen case CARDSLEEP: 1868623821f7SAdrian Hunter case REGSLEEP: 186970a3341aSDenis Karpov return omap_hsmmc_sleep_to_enabled(host); 1870dd498effSDenis Karpov case OFF: 187170a3341aSDenis Karpov return omap_hsmmc_off_to_enabled(host); 1872dd498effSDenis Karpov default: 1873dd498effSDenis Karpov dev_dbg(mmc_dev(host->mmc), "UNKNOWN state\n"); 1874dd498effSDenis Karpov return -EINVAL; 1875dd498effSDenis Karpov } 1876dd498effSDenis Karpov } 1877dd498effSDenis Karpov 1878dd498effSDenis Karpov /* 1879dd498effSDenis Karpov * Bring MMC host in PM state (one level deeper). 1880dd498effSDenis Karpov */ 188170a3341aSDenis Karpov static int omap_hsmmc_disable(struct mmc_host *mmc, int lazy) 1882dd498effSDenis Karpov { 188370a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1884dd498effSDenis Karpov 1885dd498effSDenis Karpov switch (host->dpm_state) { 1886dd498effSDenis Karpov case ENABLED: { 1887dd498effSDenis Karpov int delay; 1888dd498effSDenis Karpov 188970a3341aSDenis Karpov delay = omap_hsmmc_enabled_to_disabled(host); 1890dd498effSDenis Karpov if (lazy || delay < 0) 1891dd498effSDenis Karpov return delay; 1892dd498effSDenis Karpov return 0; 1893dd498effSDenis Karpov } 1894dd498effSDenis Karpov case DISABLED: 189570a3341aSDenis Karpov return omap_hsmmc_disabled_to_sleep(host); 189613189e78SJarkko Lavinen case CARDSLEEP: 189713189e78SJarkko Lavinen case REGSLEEP: 189870a3341aSDenis Karpov return omap_hsmmc_sleep_to_off(host); 1899dd498effSDenis Karpov default: 1900dd498effSDenis Karpov dev_dbg(mmc_dev(host->mmc), "UNKNOWN state\n"); 1901dd498effSDenis Karpov return -EINVAL; 1902dd498effSDenis Karpov } 1903dd498effSDenis Karpov } 1904dd498effSDenis Karpov 190570a3341aSDenis Karpov static int omap_hsmmc_enable_fclk(struct mmc_host *mmc) 1906dd498effSDenis Karpov { 190770a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1908dd498effSDenis Karpov int err; 1909dd498effSDenis Karpov 1910dd498effSDenis Karpov err = clk_enable(host->fclk); 1911dd498effSDenis Karpov if (err) 1912dd498effSDenis Karpov return err; 1913dd498effSDenis Karpov dev_dbg(mmc_dev(host->mmc), "mmc_fclk: enabled\n"); 191470a3341aSDenis Karpov omap_hsmmc_context_restore(host); 1915dd498effSDenis Karpov return 0; 1916dd498effSDenis Karpov } 1917dd498effSDenis Karpov 191870a3341aSDenis Karpov static int omap_hsmmc_disable_fclk(struct mmc_host *mmc, int lazy) 1919dd498effSDenis Karpov { 192070a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1921dd498effSDenis Karpov 192270a3341aSDenis Karpov omap_hsmmc_context_save(host); 1923dd498effSDenis Karpov clk_disable(host->fclk); 1924dd498effSDenis Karpov dev_dbg(mmc_dev(host->mmc), "mmc_fclk: disabled\n"); 1925dd498effSDenis Karpov return 0; 1926dd498effSDenis Karpov } 1927dd498effSDenis Karpov 192870a3341aSDenis Karpov static const struct mmc_host_ops omap_hsmmc_ops = { 192970a3341aSDenis Karpov .enable = omap_hsmmc_enable_fclk, 193070a3341aSDenis Karpov .disable = omap_hsmmc_disable_fclk, 193170a3341aSDenis Karpov .request = omap_hsmmc_request, 193270a3341aSDenis Karpov .set_ios = omap_hsmmc_set_ios, 1933dd498effSDenis Karpov .get_cd = omap_hsmmc_get_cd, 1934dd498effSDenis Karpov .get_ro = omap_hsmmc_get_ro, 19354816858cSGrazvydas Ignotas .init_card = omap_hsmmc_init_card, 1936dd498effSDenis Karpov /* NYET -- enable_sdio_irq */ 1937dd498effSDenis Karpov }; 1938dd498effSDenis Karpov 193970a3341aSDenis Karpov static const struct mmc_host_ops omap_hsmmc_ps_ops = { 194070a3341aSDenis Karpov .enable = omap_hsmmc_enable, 194170a3341aSDenis Karpov .disable = omap_hsmmc_disable, 194270a3341aSDenis Karpov .request = omap_hsmmc_request, 194370a3341aSDenis Karpov .set_ios = omap_hsmmc_set_ios, 1944a45c6cb8SMadhusudhan Chikkature .get_cd = omap_hsmmc_get_cd, 1945a45c6cb8SMadhusudhan Chikkature .get_ro = omap_hsmmc_get_ro, 19464816858cSGrazvydas Ignotas .init_card = omap_hsmmc_init_card, 1947a45c6cb8SMadhusudhan Chikkature /* NYET -- enable_sdio_irq */ 1948a45c6cb8SMadhusudhan Chikkature }; 1949a45c6cb8SMadhusudhan Chikkature 1950d900f712SDenis Karpov #ifdef CONFIG_DEBUG_FS 1951d900f712SDenis Karpov 195270a3341aSDenis Karpov static int omap_hsmmc_regs_show(struct seq_file *s, void *data) 1953d900f712SDenis Karpov { 1954d900f712SDenis Karpov struct mmc_host *mmc = s->private; 195570a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 195611dd62a7SDenis Karpov int context_loss = 0; 195711dd62a7SDenis Karpov 195870a3341aSDenis Karpov if (host->pdata->get_context_loss_count) 195970a3341aSDenis Karpov context_loss = host->pdata->get_context_loss_count(host->dev); 1960d900f712SDenis Karpov 19615e2ea617SAdrian Hunter seq_printf(s, "mmc%d:\n" 19625e2ea617SAdrian Hunter " enabled:\t%d\n" 1963dd498effSDenis Karpov " dpm_state:\t%d\n" 19645e2ea617SAdrian Hunter " nesting_cnt:\t%d\n" 196511dd62a7SDenis Karpov " ctx_loss:\t%d:%d\n" 19665e2ea617SAdrian Hunter "\nregs:\n", 1967dd498effSDenis Karpov mmc->index, mmc->enabled ? 1 : 0, 1968dd498effSDenis Karpov host->dpm_state, mmc->nesting_cnt, 196911dd62a7SDenis Karpov host->context_loss, context_loss); 19705e2ea617SAdrian Hunter 197113189e78SJarkko Lavinen if (host->suspended || host->dpm_state == OFF) { 1972dd498effSDenis Karpov seq_printf(s, "host suspended, can't read registers\n"); 1973dd498effSDenis Karpov return 0; 1974dd498effSDenis Karpov } 1975dd498effSDenis Karpov 19765e2ea617SAdrian Hunter if (clk_enable(host->fclk) != 0) { 19775e2ea617SAdrian Hunter seq_printf(s, "can't read the regs\n"); 1978dd498effSDenis Karpov return 0; 19795e2ea617SAdrian Hunter } 1980d900f712SDenis Karpov 1981d900f712SDenis Karpov seq_printf(s, "SYSCONFIG:\t0x%08x\n", 1982d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCONFIG)); 1983d900f712SDenis Karpov seq_printf(s, "CON:\t\t0x%08x\n", 1984d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, CON)); 1985d900f712SDenis Karpov seq_printf(s, "HCTL:\t\t0x%08x\n", 1986d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, HCTL)); 1987d900f712SDenis Karpov seq_printf(s, "SYSCTL:\t\t0x%08x\n", 1988d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCTL)); 1989d900f712SDenis Karpov seq_printf(s, "IE:\t\t0x%08x\n", 1990d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, IE)); 1991d900f712SDenis Karpov seq_printf(s, "ISE:\t\t0x%08x\n", 1992d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, ISE)); 1993d900f712SDenis Karpov seq_printf(s, "CAPA:\t\t0x%08x\n", 1994d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, CAPA)); 19955e2ea617SAdrian Hunter 19965e2ea617SAdrian Hunter clk_disable(host->fclk); 1997dd498effSDenis Karpov 1998d900f712SDenis Karpov return 0; 1999d900f712SDenis Karpov } 2000d900f712SDenis Karpov 200170a3341aSDenis Karpov static int omap_hsmmc_regs_open(struct inode *inode, struct file *file) 2002d900f712SDenis Karpov { 200370a3341aSDenis Karpov return single_open(file, omap_hsmmc_regs_show, inode->i_private); 2004d900f712SDenis Karpov } 2005d900f712SDenis Karpov 2006d900f712SDenis Karpov static const struct file_operations mmc_regs_fops = { 200770a3341aSDenis Karpov .open = omap_hsmmc_regs_open, 2008d900f712SDenis Karpov .read = seq_read, 2009d900f712SDenis Karpov .llseek = seq_lseek, 2010d900f712SDenis Karpov .release = single_release, 2011d900f712SDenis Karpov }; 2012d900f712SDenis Karpov 201370a3341aSDenis Karpov static void omap_hsmmc_debugfs(struct mmc_host *mmc) 2014d900f712SDenis Karpov { 2015d900f712SDenis Karpov if (mmc->debugfs_root) 2016d900f712SDenis Karpov debugfs_create_file("regs", S_IRUSR, mmc->debugfs_root, 2017d900f712SDenis Karpov mmc, &mmc_regs_fops); 2018d900f712SDenis Karpov } 2019d900f712SDenis Karpov 2020d900f712SDenis Karpov #else 2021d900f712SDenis Karpov 202270a3341aSDenis Karpov static void omap_hsmmc_debugfs(struct mmc_host *mmc) 2023d900f712SDenis Karpov { 2024d900f712SDenis Karpov } 2025d900f712SDenis Karpov 2026d900f712SDenis Karpov #endif 2027d900f712SDenis Karpov 202870a3341aSDenis Karpov static int __init omap_hsmmc_probe(struct platform_device *pdev) 2029a45c6cb8SMadhusudhan Chikkature { 2030a45c6cb8SMadhusudhan Chikkature struct omap_mmc_platform_data *pdata = pdev->dev.platform_data; 2031a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc; 203270a3341aSDenis Karpov struct omap_hsmmc_host *host = NULL; 2033a45c6cb8SMadhusudhan Chikkature struct resource *res; 2034db0fefc5SAdrian Hunter int ret, irq; 2035a45c6cb8SMadhusudhan Chikkature 2036a45c6cb8SMadhusudhan Chikkature if (pdata == NULL) { 2037a45c6cb8SMadhusudhan Chikkature dev_err(&pdev->dev, "Platform Data is missing\n"); 2038a45c6cb8SMadhusudhan Chikkature return -ENXIO; 2039a45c6cb8SMadhusudhan Chikkature } 2040a45c6cb8SMadhusudhan Chikkature 2041a45c6cb8SMadhusudhan Chikkature if (pdata->nr_slots == 0) { 2042a45c6cb8SMadhusudhan Chikkature dev_err(&pdev->dev, "No Slots\n"); 2043a45c6cb8SMadhusudhan Chikkature return -ENXIO; 2044a45c6cb8SMadhusudhan Chikkature } 2045a45c6cb8SMadhusudhan Chikkature 2046a45c6cb8SMadhusudhan Chikkature res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2047a45c6cb8SMadhusudhan Chikkature irq = platform_get_irq(pdev, 0); 2048a45c6cb8SMadhusudhan Chikkature if (res == NULL || irq < 0) 2049a45c6cb8SMadhusudhan Chikkature return -ENXIO; 2050a45c6cb8SMadhusudhan Chikkature 205191a0b089Skishore kadiyala res->start += pdata->reg_offset; 205291a0b089Skishore kadiyala res->end += pdata->reg_offset; 2053984b203aSChris Ball res = request_mem_region(res->start, resource_size(res), pdev->name); 2054a45c6cb8SMadhusudhan Chikkature if (res == NULL) 2055a45c6cb8SMadhusudhan Chikkature return -EBUSY; 2056a45c6cb8SMadhusudhan Chikkature 2057db0fefc5SAdrian Hunter ret = omap_hsmmc_gpio_init(pdata); 2058db0fefc5SAdrian Hunter if (ret) 2059db0fefc5SAdrian Hunter goto err; 2060db0fefc5SAdrian Hunter 206170a3341aSDenis Karpov mmc = mmc_alloc_host(sizeof(struct omap_hsmmc_host), &pdev->dev); 2062a45c6cb8SMadhusudhan Chikkature if (!mmc) { 2063a45c6cb8SMadhusudhan Chikkature ret = -ENOMEM; 2064db0fefc5SAdrian Hunter goto err_alloc; 2065a45c6cb8SMadhusudhan Chikkature } 2066a45c6cb8SMadhusudhan Chikkature 2067a45c6cb8SMadhusudhan Chikkature host = mmc_priv(mmc); 2068a45c6cb8SMadhusudhan Chikkature host->mmc = mmc; 2069a45c6cb8SMadhusudhan Chikkature host->pdata = pdata; 2070a45c6cb8SMadhusudhan Chikkature host->dev = &pdev->dev; 2071a45c6cb8SMadhusudhan Chikkature host->use_dma = 1; 2072a45c6cb8SMadhusudhan Chikkature host->dev->dma_mask = &pdata->dma_mask; 2073a45c6cb8SMadhusudhan Chikkature host->dma_ch = -1; 2074a45c6cb8SMadhusudhan Chikkature host->irq = irq; 2075a45c6cb8SMadhusudhan Chikkature host->id = pdev->id; 2076a45c6cb8SMadhusudhan Chikkature host->slot_id = 0; 2077a45c6cb8SMadhusudhan Chikkature host->mapbase = res->start; 2078a45c6cb8SMadhusudhan Chikkature host->base = ioremap(host->mapbase, SZ_4K); 20796da20c89SAdrian Hunter host->power_mode = MMC_POWER_OFF; 2080a45c6cb8SMadhusudhan Chikkature 2081a45c6cb8SMadhusudhan Chikkature platform_set_drvdata(pdev, host); 208270a3341aSDenis Karpov INIT_WORK(&host->mmc_carddetect_work, omap_hsmmc_detect); 2083a45c6cb8SMadhusudhan Chikkature 2084191d1f1dSDenis Karpov if (mmc_slot(host).power_saving) 208570a3341aSDenis Karpov mmc->ops = &omap_hsmmc_ps_ops; 2086dd498effSDenis Karpov else 208770a3341aSDenis Karpov mmc->ops = &omap_hsmmc_ops; 2088dd498effSDenis Karpov 2089e0eb2424SAdrian Hunter /* 2090e0eb2424SAdrian Hunter * If regulator_disable can only put vcc_aux to sleep then there is 2091e0eb2424SAdrian Hunter * no off state. 2092e0eb2424SAdrian Hunter */ 2093e0eb2424SAdrian Hunter if (mmc_slot(host).vcc_aux_disable_is_sleep) 2094e0eb2424SAdrian Hunter mmc_slot(host).no_off = 1; 2095e0eb2424SAdrian Hunter 2096a45c6cb8SMadhusudhan Chikkature mmc->f_min = 400000; 2097a45c6cb8SMadhusudhan Chikkature mmc->f_max = 52000000; 2098a45c6cb8SMadhusudhan Chikkature 20994dffd7a2SAdrian Hunter spin_lock_init(&host->irq_lock); 2100a45c6cb8SMadhusudhan Chikkature 21016f7607ccSRussell King host->iclk = clk_get(&pdev->dev, "ick"); 2102a45c6cb8SMadhusudhan Chikkature if (IS_ERR(host->iclk)) { 2103a45c6cb8SMadhusudhan Chikkature ret = PTR_ERR(host->iclk); 2104a45c6cb8SMadhusudhan Chikkature host->iclk = NULL; 2105a45c6cb8SMadhusudhan Chikkature goto err1; 2106a45c6cb8SMadhusudhan Chikkature } 21076f7607ccSRussell King host->fclk = clk_get(&pdev->dev, "fck"); 2108a45c6cb8SMadhusudhan Chikkature if (IS_ERR(host->fclk)) { 2109a45c6cb8SMadhusudhan Chikkature ret = PTR_ERR(host->fclk); 2110a45c6cb8SMadhusudhan Chikkature host->fclk = NULL; 2111a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 2112a45c6cb8SMadhusudhan Chikkature goto err1; 2113a45c6cb8SMadhusudhan Chikkature } 2114a45c6cb8SMadhusudhan Chikkature 211570a3341aSDenis Karpov omap_hsmmc_context_save(host); 211611dd62a7SDenis Karpov 21175e2ea617SAdrian Hunter mmc->caps |= MMC_CAP_DISABLE; 2118dd498effSDenis Karpov mmc_set_disable_delay(mmc, OMAP_MMC_DISABLED_TIMEOUT); 2119dd498effSDenis Karpov /* we start off in DISABLED state */ 2120dd498effSDenis Karpov host->dpm_state = DISABLED; 2121dd498effSDenis Karpov 2122a05dcdb9SPaul Walmsley if (clk_enable(host->iclk) != 0) { 2123a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 2124a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 2125a45c6cb8SMadhusudhan Chikkature goto err1; 2126a45c6cb8SMadhusudhan Chikkature } 2127a45c6cb8SMadhusudhan Chikkature 2128a05dcdb9SPaul Walmsley if (mmc_host_enable(host->mmc) != 0) { 2129a05dcdb9SPaul Walmsley clk_disable(host->iclk); 2130a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 2131a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 2132a45c6cb8SMadhusudhan Chikkature goto err1; 2133a45c6cb8SMadhusudhan Chikkature } 2134a45c6cb8SMadhusudhan Chikkature 21352bec0893SAdrian Hunter if (cpu_is_omap2430()) { 2136a45c6cb8SMadhusudhan Chikkature host->dbclk = clk_get(&pdev->dev, "mmchsdb_fck"); 2137a45c6cb8SMadhusudhan Chikkature /* 2138a45c6cb8SMadhusudhan Chikkature * MMC can still work without debounce clock. 2139a45c6cb8SMadhusudhan Chikkature */ 2140a45c6cb8SMadhusudhan Chikkature if (IS_ERR(host->dbclk)) 21412bec0893SAdrian Hunter dev_warn(mmc_dev(host->mmc), 21422bec0893SAdrian Hunter "Failed to get debounce clock\n"); 2143a45c6cb8SMadhusudhan Chikkature else 21442bec0893SAdrian Hunter host->got_dbclk = 1; 21452bec0893SAdrian Hunter 21462bec0893SAdrian Hunter if (host->got_dbclk) 2147a45c6cb8SMadhusudhan Chikkature if (clk_enable(host->dbclk) != 0) 2148a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Enabling debounce" 2149a45c6cb8SMadhusudhan Chikkature " clk failed\n"); 21502bec0893SAdrian Hunter } 2151a45c6cb8SMadhusudhan Chikkature 21520ccd76d4SJuha Yrjola /* Since we do only SG emulation, we can have as many segs 21530ccd76d4SJuha Yrjola * as we want. */ 2154a36274e0SMartin K. Petersen mmc->max_segs = 1024; 21550ccd76d4SJuha Yrjola 2156a45c6cb8SMadhusudhan Chikkature mmc->max_blk_size = 512; /* Block Length at max can be 1024 */ 2157a45c6cb8SMadhusudhan Chikkature mmc->max_blk_count = 0xFFFF; /* No. of Blocks is 16 bits */ 2158a45c6cb8SMadhusudhan Chikkature mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; 2159a45c6cb8SMadhusudhan Chikkature mmc->max_seg_size = mmc->max_req_size; 2160a45c6cb8SMadhusudhan Chikkature 216113189e78SJarkko Lavinen mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED | 216293caf8e6SAdrian Hunter MMC_CAP_WAIT_WHILE_BUSY | MMC_CAP_ERASE; 2163a45c6cb8SMadhusudhan Chikkature 21643a63833eSSukumar Ghorai mmc->caps |= mmc_slot(host).caps; 21653a63833eSSukumar Ghorai if (mmc->caps & MMC_CAP_8_BIT_DATA) 2166a45c6cb8SMadhusudhan Chikkature mmc->caps |= MMC_CAP_4_BIT_DATA; 2167a45c6cb8SMadhusudhan Chikkature 2168191d1f1dSDenis Karpov if (mmc_slot(host).nonremovable) 216923d99bb9SAdrian Hunter mmc->caps |= MMC_CAP_NONREMOVABLE; 217023d99bb9SAdrian Hunter 217170a3341aSDenis Karpov omap_hsmmc_conf_bus_power(host); 2172a45c6cb8SMadhusudhan Chikkature 2173f3e2f1ddSGrazvydas Ignotas /* Select DMA lines */ 2174f3e2f1ddSGrazvydas Ignotas switch (host->id) { 2175f3e2f1ddSGrazvydas Ignotas case OMAP_MMC1_DEVID: 2176f3e2f1ddSGrazvydas Ignotas host->dma_line_tx = OMAP24XX_DMA_MMC1_TX; 2177f3e2f1ddSGrazvydas Ignotas host->dma_line_rx = OMAP24XX_DMA_MMC1_RX; 2178f3e2f1ddSGrazvydas Ignotas break; 2179f3e2f1ddSGrazvydas Ignotas case OMAP_MMC2_DEVID: 2180f3e2f1ddSGrazvydas Ignotas host->dma_line_tx = OMAP24XX_DMA_MMC2_TX; 2181f3e2f1ddSGrazvydas Ignotas host->dma_line_rx = OMAP24XX_DMA_MMC2_RX; 2182f3e2f1ddSGrazvydas Ignotas break; 2183f3e2f1ddSGrazvydas Ignotas case OMAP_MMC3_DEVID: 2184f3e2f1ddSGrazvydas Ignotas host->dma_line_tx = OMAP34XX_DMA_MMC3_TX; 2185f3e2f1ddSGrazvydas Ignotas host->dma_line_rx = OMAP34XX_DMA_MMC3_RX; 2186f3e2f1ddSGrazvydas Ignotas break; 218782cf818dSkishore kadiyala case OMAP_MMC4_DEVID: 218882cf818dSkishore kadiyala host->dma_line_tx = OMAP44XX_DMA_MMC4_TX; 218982cf818dSkishore kadiyala host->dma_line_rx = OMAP44XX_DMA_MMC4_RX; 219082cf818dSkishore kadiyala break; 219182cf818dSkishore kadiyala case OMAP_MMC5_DEVID: 219282cf818dSkishore kadiyala host->dma_line_tx = OMAP44XX_DMA_MMC5_TX; 219382cf818dSkishore kadiyala host->dma_line_rx = OMAP44XX_DMA_MMC5_RX; 219482cf818dSkishore kadiyala break; 2195f3e2f1ddSGrazvydas Ignotas default: 2196f3e2f1ddSGrazvydas Ignotas dev_err(mmc_dev(host->mmc), "Invalid MMC id\n"); 2197f3e2f1ddSGrazvydas Ignotas goto err_irq; 2198a45c6cb8SMadhusudhan Chikkature } 2199a45c6cb8SMadhusudhan Chikkature 2200a45c6cb8SMadhusudhan Chikkature /* Request IRQ for MMC operations */ 220170a3341aSDenis Karpov ret = request_irq(host->irq, omap_hsmmc_irq, IRQF_DISABLED, 2202a45c6cb8SMadhusudhan Chikkature mmc_hostname(mmc), host); 2203a45c6cb8SMadhusudhan Chikkature if (ret) { 2204a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Unable to grab HSMMC IRQ\n"); 2205a45c6cb8SMadhusudhan Chikkature goto err_irq; 2206a45c6cb8SMadhusudhan Chikkature } 2207a45c6cb8SMadhusudhan Chikkature 2208a45c6cb8SMadhusudhan Chikkature if (pdata->init != NULL) { 2209a45c6cb8SMadhusudhan Chikkature if (pdata->init(&pdev->dev) != 0) { 221070a3341aSDenis Karpov dev_dbg(mmc_dev(host->mmc), 221170a3341aSDenis Karpov "Unable to configure MMC IRQs\n"); 2212a45c6cb8SMadhusudhan Chikkature goto err_irq_cd_init; 2213a45c6cb8SMadhusudhan Chikkature } 2214a45c6cb8SMadhusudhan Chikkature } 2215db0fefc5SAdrian Hunter 2216b702b106SAdrian Hunter if (omap_hsmmc_have_reg() && !mmc_slot(host).set_power) { 2217db0fefc5SAdrian Hunter ret = omap_hsmmc_reg_get(host); 2218db0fefc5SAdrian Hunter if (ret) 2219db0fefc5SAdrian Hunter goto err_reg; 2220db0fefc5SAdrian Hunter host->use_reg = 1; 2221db0fefc5SAdrian Hunter } 2222db0fefc5SAdrian Hunter 2223b583f26dSDavid Brownell mmc->ocr_avail = mmc_slot(host).ocr_mask; 2224a45c6cb8SMadhusudhan Chikkature 2225a45c6cb8SMadhusudhan Chikkature /* Request IRQ for card detect */ 2226e1a55f5eSAdrian Hunter if ((mmc_slot(host).card_detect_irq)) { 2227a45c6cb8SMadhusudhan Chikkature ret = request_irq(mmc_slot(host).card_detect_irq, 222870a3341aSDenis Karpov omap_hsmmc_cd_handler, 2229a45c6cb8SMadhusudhan Chikkature IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING 2230a45c6cb8SMadhusudhan Chikkature | IRQF_DISABLED, 2231a45c6cb8SMadhusudhan Chikkature mmc_hostname(mmc), host); 2232a45c6cb8SMadhusudhan Chikkature if (ret) { 2233a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 2234a45c6cb8SMadhusudhan Chikkature "Unable to grab MMC CD IRQ\n"); 2235a45c6cb8SMadhusudhan Chikkature goto err_irq_cd; 2236a45c6cb8SMadhusudhan Chikkature } 223772f2e2c7Skishore kadiyala pdata->suspend = omap_hsmmc_suspend_cdirq; 223872f2e2c7Skishore kadiyala pdata->resume = omap_hsmmc_resume_cdirq; 2239a45c6cb8SMadhusudhan Chikkature } 2240a45c6cb8SMadhusudhan Chikkature 2241b417577dSAdrian Hunter omap_hsmmc_disable_irq(host); 2242a45c6cb8SMadhusudhan Chikkature 22435e2ea617SAdrian Hunter mmc_host_lazy_disable(host->mmc); 22445e2ea617SAdrian Hunter 2245b62f6228SAdrian Hunter omap_hsmmc_protect_card(host); 2246b62f6228SAdrian Hunter 2247a45c6cb8SMadhusudhan Chikkature mmc_add_host(mmc); 2248a45c6cb8SMadhusudhan Chikkature 2249191d1f1dSDenis Karpov if (mmc_slot(host).name != NULL) { 2250a45c6cb8SMadhusudhan Chikkature ret = device_create_file(&mmc->class_dev, &dev_attr_slot_name); 2251a45c6cb8SMadhusudhan Chikkature if (ret < 0) 2252a45c6cb8SMadhusudhan Chikkature goto err_slot_name; 2253a45c6cb8SMadhusudhan Chikkature } 2254191d1f1dSDenis Karpov if (mmc_slot(host).card_detect_irq && mmc_slot(host).get_cover_state) { 2255a45c6cb8SMadhusudhan Chikkature ret = device_create_file(&mmc->class_dev, 2256a45c6cb8SMadhusudhan Chikkature &dev_attr_cover_switch); 2257a45c6cb8SMadhusudhan Chikkature if (ret < 0) 2258db0fefc5SAdrian Hunter goto err_slot_name; 2259a45c6cb8SMadhusudhan Chikkature } 2260a45c6cb8SMadhusudhan Chikkature 226170a3341aSDenis Karpov omap_hsmmc_debugfs(mmc); 2262d900f712SDenis Karpov 2263a45c6cb8SMadhusudhan Chikkature return 0; 2264a45c6cb8SMadhusudhan Chikkature 2265a45c6cb8SMadhusudhan Chikkature err_slot_name: 2266a45c6cb8SMadhusudhan Chikkature mmc_remove_host(mmc); 2267a45c6cb8SMadhusudhan Chikkature free_irq(mmc_slot(host).card_detect_irq, host); 2268db0fefc5SAdrian Hunter err_irq_cd: 2269db0fefc5SAdrian Hunter if (host->use_reg) 2270db0fefc5SAdrian Hunter omap_hsmmc_reg_put(host); 2271db0fefc5SAdrian Hunter err_reg: 2272db0fefc5SAdrian Hunter if (host->pdata->cleanup) 2273db0fefc5SAdrian Hunter host->pdata->cleanup(&pdev->dev); 2274a45c6cb8SMadhusudhan Chikkature err_irq_cd_init: 2275a45c6cb8SMadhusudhan Chikkature free_irq(host->irq, host); 2276a45c6cb8SMadhusudhan Chikkature err_irq: 22775e2ea617SAdrian Hunter mmc_host_disable(host->mmc); 2278a45c6cb8SMadhusudhan Chikkature clk_disable(host->iclk); 2279a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 2280a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 22812bec0893SAdrian Hunter if (host->got_dbclk) { 2282a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 2283a45c6cb8SMadhusudhan Chikkature clk_put(host->dbclk); 2284a45c6cb8SMadhusudhan Chikkature } 2285a45c6cb8SMadhusudhan Chikkature err1: 2286a45c6cb8SMadhusudhan Chikkature iounmap(host->base); 2287db0fefc5SAdrian Hunter platform_set_drvdata(pdev, NULL); 2288a45c6cb8SMadhusudhan Chikkature mmc_free_host(mmc); 2289db0fefc5SAdrian Hunter err_alloc: 2290db0fefc5SAdrian Hunter omap_hsmmc_gpio_free(pdata); 2291db0fefc5SAdrian Hunter err: 2292984b203aSChris Ball release_mem_region(res->start, resource_size(res)); 2293a45c6cb8SMadhusudhan Chikkature return ret; 2294a45c6cb8SMadhusudhan Chikkature } 2295a45c6cb8SMadhusudhan Chikkature 229670a3341aSDenis Karpov static int omap_hsmmc_remove(struct platform_device *pdev) 2297a45c6cb8SMadhusudhan Chikkature { 229870a3341aSDenis Karpov struct omap_hsmmc_host *host = platform_get_drvdata(pdev); 2299a45c6cb8SMadhusudhan Chikkature struct resource *res; 2300a45c6cb8SMadhusudhan Chikkature 2301a45c6cb8SMadhusudhan Chikkature if (host) { 23025e2ea617SAdrian Hunter mmc_host_enable(host->mmc); 2303a45c6cb8SMadhusudhan Chikkature mmc_remove_host(host->mmc); 2304db0fefc5SAdrian Hunter if (host->use_reg) 2305db0fefc5SAdrian Hunter omap_hsmmc_reg_put(host); 2306a45c6cb8SMadhusudhan Chikkature if (host->pdata->cleanup) 2307a45c6cb8SMadhusudhan Chikkature host->pdata->cleanup(&pdev->dev); 2308a45c6cb8SMadhusudhan Chikkature free_irq(host->irq, host); 2309a45c6cb8SMadhusudhan Chikkature if (mmc_slot(host).card_detect_irq) 2310a45c6cb8SMadhusudhan Chikkature free_irq(mmc_slot(host).card_detect_irq, host); 23110d9ee5b2STejun Heo flush_work_sync(&host->mmc_carddetect_work); 2312a45c6cb8SMadhusudhan Chikkature 23135e2ea617SAdrian Hunter mmc_host_disable(host->mmc); 2314a45c6cb8SMadhusudhan Chikkature clk_disable(host->iclk); 2315a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 2316a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 23172bec0893SAdrian Hunter if (host->got_dbclk) { 2318a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 2319a45c6cb8SMadhusudhan Chikkature clk_put(host->dbclk); 2320a45c6cb8SMadhusudhan Chikkature } 2321a45c6cb8SMadhusudhan Chikkature 2322a45c6cb8SMadhusudhan Chikkature mmc_free_host(host->mmc); 2323a45c6cb8SMadhusudhan Chikkature iounmap(host->base); 2324db0fefc5SAdrian Hunter omap_hsmmc_gpio_free(pdev->dev.platform_data); 2325a45c6cb8SMadhusudhan Chikkature } 2326a45c6cb8SMadhusudhan Chikkature 2327a45c6cb8SMadhusudhan Chikkature res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2328a45c6cb8SMadhusudhan Chikkature if (res) 2329984b203aSChris Ball release_mem_region(res->start, resource_size(res)); 2330a45c6cb8SMadhusudhan Chikkature platform_set_drvdata(pdev, NULL); 2331a45c6cb8SMadhusudhan Chikkature 2332a45c6cb8SMadhusudhan Chikkature return 0; 2333a45c6cb8SMadhusudhan Chikkature } 2334a45c6cb8SMadhusudhan Chikkature 2335a45c6cb8SMadhusudhan Chikkature #ifdef CONFIG_PM 2336a791daa1SKevin Hilman static int omap_hsmmc_suspend(struct device *dev) 2337a45c6cb8SMadhusudhan Chikkature { 2338a45c6cb8SMadhusudhan Chikkature int ret = 0; 2339a791daa1SKevin Hilman struct platform_device *pdev = to_platform_device(dev); 234070a3341aSDenis Karpov struct omap_hsmmc_host *host = platform_get_drvdata(pdev); 2341a45c6cb8SMadhusudhan Chikkature 2342a45c6cb8SMadhusudhan Chikkature if (host && host->suspended) 2343a45c6cb8SMadhusudhan Chikkature return 0; 2344a45c6cb8SMadhusudhan Chikkature 2345a45c6cb8SMadhusudhan Chikkature if (host) { 2346a45c6cb8SMadhusudhan Chikkature host->suspended = 1; 2347a45c6cb8SMadhusudhan Chikkature if (host->pdata->suspend) { 2348a45c6cb8SMadhusudhan Chikkature ret = host->pdata->suspend(&pdev->dev, 2349a45c6cb8SMadhusudhan Chikkature host->slot_id); 2350a6b2240dSAdrian Hunter if (ret) { 2351a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 2352a45c6cb8SMadhusudhan Chikkature "Unable to handle MMC board" 2353a45c6cb8SMadhusudhan Chikkature " level suspend\n"); 2354a6b2240dSAdrian Hunter host->suspended = 0; 2355a6b2240dSAdrian Hunter return ret; 2356a45c6cb8SMadhusudhan Chikkature } 2357a6b2240dSAdrian Hunter } 2358a6b2240dSAdrian Hunter cancel_work_sync(&host->mmc_carddetect_work); 23591a13f8faSMatt Fleming ret = mmc_suspend_host(host->mmc); 2360e7cb756fSEthan Du mmc_host_enable(host->mmc); 2361a6b2240dSAdrian Hunter if (ret == 0) { 2362b417577dSAdrian Hunter omap_hsmmc_disable_irq(host); 2363a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 23640683af48SJarkko Lavinen OMAP_HSMMC_READ(host->base, HCTL) & ~SDBP); 23655e2ea617SAdrian Hunter mmc_host_disable(host->mmc); 2366a45c6cb8SMadhusudhan Chikkature clk_disable(host->iclk); 23672bec0893SAdrian Hunter if (host->got_dbclk) 2368a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 2369a6b2240dSAdrian Hunter } else { 2370a6b2240dSAdrian Hunter host->suspended = 0; 2371a6b2240dSAdrian Hunter if (host->pdata->resume) { 2372a6b2240dSAdrian Hunter ret = host->pdata->resume(&pdev->dev, 2373a6b2240dSAdrian Hunter host->slot_id); 2374a6b2240dSAdrian Hunter if (ret) 2375a6b2240dSAdrian Hunter dev_dbg(mmc_dev(host->mmc), 2376a6b2240dSAdrian Hunter "Unmask interrupt failed\n"); 2377a6b2240dSAdrian Hunter } 23785e2ea617SAdrian Hunter mmc_host_disable(host->mmc); 2379a6b2240dSAdrian Hunter } 2380a45c6cb8SMadhusudhan Chikkature 2381a45c6cb8SMadhusudhan Chikkature } 2382a45c6cb8SMadhusudhan Chikkature return ret; 2383a45c6cb8SMadhusudhan Chikkature } 2384a45c6cb8SMadhusudhan Chikkature 2385a45c6cb8SMadhusudhan Chikkature /* Routine to resume the MMC device */ 2386a791daa1SKevin Hilman static int omap_hsmmc_resume(struct device *dev) 2387a45c6cb8SMadhusudhan Chikkature { 2388a45c6cb8SMadhusudhan Chikkature int ret = 0; 2389a791daa1SKevin Hilman struct platform_device *pdev = to_platform_device(dev); 239070a3341aSDenis Karpov struct omap_hsmmc_host *host = platform_get_drvdata(pdev); 2391a45c6cb8SMadhusudhan Chikkature 2392a45c6cb8SMadhusudhan Chikkature if (host && !host->suspended) 2393a45c6cb8SMadhusudhan Chikkature return 0; 2394a45c6cb8SMadhusudhan Chikkature 2395a45c6cb8SMadhusudhan Chikkature if (host) { 2396a45c6cb8SMadhusudhan Chikkature ret = clk_enable(host->iclk); 239711dd62a7SDenis Karpov if (ret) 2398a45c6cb8SMadhusudhan Chikkature goto clk_en_err; 2399a45c6cb8SMadhusudhan Chikkature 240011dd62a7SDenis Karpov if (mmc_host_enable(host->mmc) != 0) { 240111dd62a7SDenis Karpov clk_disable(host->iclk); 240211dd62a7SDenis Karpov goto clk_en_err; 240311dd62a7SDenis Karpov } 240411dd62a7SDenis Karpov 24052bec0893SAdrian Hunter if (host->got_dbclk) 24062bec0893SAdrian Hunter clk_enable(host->dbclk); 24072bec0893SAdrian Hunter 240870a3341aSDenis Karpov omap_hsmmc_conf_bus_power(host); 24091b331e69SKim Kyuwon 2410a45c6cb8SMadhusudhan Chikkature if (host->pdata->resume) { 2411a45c6cb8SMadhusudhan Chikkature ret = host->pdata->resume(&pdev->dev, host->slot_id); 2412a45c6cb8SMadhusudhan Chikkature if (ret) 2413a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 2414a45c6cb8SMadhusudhan Chikkature "Unmask interrupt failed\n"); 2415a45c6cb8SMadhusudhan Chikkature } 2416a45c6cb8SMadhusudhan Chikkature 2417b62f6228SAdrian Hunter omap_hsmmc_protect_card(host); 2418b62f6228SAdrian Hunter 2419a45c6cb8SMadhusudhan Chikkature /* Notify the core to resume the host */ 2420a45c6cb8SMadhusudhan Chikkature ret = mmc_resume_host(host->mmc); 2421a45c6cb8SMadhusudhan Chikkature if (ret == 0) 2422a45c6cb8SMadhusudhan Chikkature host->suspended = 0; 242370a3341aSDenis Karpov 24245e2ea617SAdrian Hunter mmc_host_lazy_disable(host->mmc); 2425a45c6cb8SMadhusudhan Chikkature } 2426a45c6cb8SMadhusudhan Chikkature 2427a45c6cb8SMadhusudhan Chikkature return ret; 2428a45c6cb8SMadhusudhan Chikkature 2429a45c6cb8SMadhusudhan Chikkature clk_en_err: 2430a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 2431a45c6cb8SMadhusudhan Chikkature "Failed to enable MMC clocks during resume\n"); 2432a45c6cb8SMadhusudhan Chikkature return ret; 2433a45c6cb8SMadhusudhan Chikkature } 2434a45c6cb8SMadhusudhan Chikkature 2435a45c6cb8SMadhusudhan Chikkature #else 243670a3341aSDenis Karpov #define omap_hsmmc_suspend NULL 243770a3341aSDenis Karpov #define omap_hsmmc_resume NULL 2438a45c6cb8SMadhusudhan Chikkature #endif 2439a45c6cb8SMadhusudhan Chikkature 2440a791daa1SKevin Hilman static struct dev_pm_ops omap_hsmmc_dev_pm_ops = { 244170a3341aSDenis Karpov .suspend = omap_hsmmc_suspend, 244270a3341aSDenis Karpov .resume = omap_hsmmc_resume, 2443a791daa1SKevin Hilman }; 2444a791daa1SKevin Hilman 2445a791daa1SKevin Hilman static struct platform_driver omap_hsmmc_driver = { 2446a791daa1SKevin Hilman .remove = omap_hsmmc_remove, 2447a45c6cb8SMadhusudhan Chikkature .driver = { 2448a45c6cb8SMadhusudhan Chikkature .name = DRIVER_NAME, 2449a45c6cb8SMadhusudhan Chikkature .owner = THIS_MODULE, 2450a791daa1SKevin Hilman .pm = &omap_hsmmc_dev_pm_ops, 2451a45c6cb8SMadhusudhan Chikkature }, 2452a45c6cb8SMadhusudhan Chikkature }; 2453a45c6cb8SMadhusudhan Chikkature 245470a3341aSDenis Karpov static int __init omap_hsmmc_init(void) 2455a45c6cb8SMadhusudhan Chikkature { 2456a45c6cb8SMadhusudhan Chikkature /* Register the MMC driver */ 24578753298aSRoger Quadros return platform_driver_probe(&omap_hsmmc_driver, omap_hsmmc_probe); 2458a45c6cb8SMadhusudhan Chikkature } 2459a45c6cb8SMadhusudhan Chikkature 246070a3341aSDenis Karpov static void __exit omap_hsmmc_cleanup(void) 2461a45c6cb8SMadhusudhan Chikkature { 2462a45c6cb8SMadhusudhan Chikkature /* Unregister MMC driver */ 246370a3341aSDenis Karpov platform_driver_unregister(&omap_hsmmc_driver); 2464a45c6cb8SMadhusudhan Chikkature } 2465a45c6cb8SMadhusudhan Chikkature 246670a3341aSDenis Karpov module_init(omap_hsmmc_init); 246770a3341aSDenis Karpov module_exit(omap_hsmmc_cleanup); 2468a45c6cb8SMadhusudhan Chikkature 2469a45c6cb8SMadhusudhan Chikkature MODULE_DESCRIPTION("OMAP High Speed Multimedia Card driver"); 2470a45c6cb8SMadhusudhan Chikkature MODULE_LICENSE("GPL"); 2471a45c6cb8SMadhusudhan Chikkature MODULE_ALIAS("platform:" DRIVER_NAME); 2472a45c6cb8SMadhusudhan Chikkature MODULE_AUTHOR("Texas Instruments Inc"); 2473