1a45c6cb8SMadhusudhan Chikkature /* 2a45c6cb8SMadhusudhan Chikkature * drivers/mmc/host/omap_hsmmc.c 3a45c6cb8SMadhusudhan Chikkature * 4a45c6cb8SMadhusudhan Chikkature * Driver for OMAP2430/3430 MMC controller. 5a45c6cb8SMadhusudhan Chikkature * 6a45c6cb8SMadhusudhan Chikkature * Copyright (C) 2007 Texas Instruments. 7a45c6cb8SMadhusudhan Chikkature * 8a45c6cb8SMadhusudhan Chikkature * Authors: 9a45c6cb8SMadhusudhan Chikkature * Syed Mohammed Khasim <x0khasim@ti.com> 10a45c6cb8SMadhusudhan Chikkature * Madhusudhan <madhu.cr@ti.com> 11a45c6cb8SMadhusudhan Chikkature * Mohit Jalori <mjalori@ti.com> 12a45c6cb8SMadhusudhan Chikkature * 13a45c6cb8SMadhusudhan Chikkature * This file is licensed under the terms of the GNU General Public License 14a45c6cb8SMadhusudhan Chikkature * version 2. This program is licensed "as is" without any warranty of any 15a45c6cb8SMadhusudhan Chikkature * kind, whether express or implied. 16a45c6cb8SMadhusudhan Chikkature */ 17a45c6cb8SMadhusudhan Chikkature 18a45c6cb8SMadhusudhan Chikkature #include <linux/module.h> 19a45c6cb8SMadhusudhan Chikkature #include <linux/init.h> 20a45c6cb8SMadhusudhan Chikkature #include <linux/interrupt.h> 21a45c6cb8SMadhusudhan Chikkature #include <linux/delay.h> 22a45c6cb8SMadhusudhan Chikkature #include <linux/dma-mapping.h> 23a45c6cb8SMadhusudhan Chikkature #include <linux/platform_device.h> 24a45c6cb8SMadhusudhan Chikkature #include <linux/workqueue.h> 25a45c6cb8SMadhusudhan Chikkature #include <linux/timer.h> 26a45c6cb8SMadhusudhan Chikkature #include <linux/clk.h> 27a45c6cb8SMadhusudhan Chikkature #include <linux/mmc/host.h> 28a45c6cb8SMadhusudhan Chikkature #include <linux/io.h> 29a45c6cb8SMadhusudhan Chikkature #include <linux/semaphore.h> 30a45c6cb8SMadhusudhan Chikkature #include <mach/dma.h> 31a45c6cb8SMadhusudhan Chikkature #include <mach/hardware.h> 32a45c6cb8SMadhusudhan Chikkature #include <mach/board.h> 33a45c6cb8SMadhusudhan Chikkature #include <mach/mmc.h> 34a45c6cb8SMadhusudhan Chikkature #include <mach/cpu.h> 35a45c6cb8SMadhusudhan Chikkature 36a45c6cb8SMadhusudhan Chikkature /* OMAP HSMMC Host Controller Registers */ 37a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_SYSCONFIG 0x0010 38a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_CON 0x002C 39a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_BLK 0x0104 40a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_ARG 0x0108 41a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_CMD 0x010C 42a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP10 0x0110 43a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP32 0x0114 44a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP54 0x0118 45a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP76 0x011C 46a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_DATA 0x0120 47a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_HCTL 0x0128 48a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_SYSCTL 0x012C 49a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_STAT 0x0130 50a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_IE 0x0134 51a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_ISE 0x0138 52a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_CAPA 0x0140 53a45c6cb8SMadhusudhan Chikkature 54a45c6cb8SMadhusudhan Chikkature #define VS18 (1 << 26) 55a45c6cb8SMadhusudhan Chikkature #define VS30 (1 << 25) 56a45c6cb8SMadhusudhan Chikkature #define SDVS18 (0x5 << 9) 57a45c6cb8SMadhusudhan Chikkature #define SDVS30 (0x6 << 9) 58a45c6cb8SMadhusudhan Chikkature #define SDVSCLR 0xFFFFF1FF 59a45c6cb8SMadhusudhan Chikkature #define SDVSDET 0x00000400 60a45c6cb8SMadhusudhan Chikkature #define AUTOIDLE 0x1 61a45c6cb8SMadhusudhan Chikkature #define SDBP (1 << 8) 62a45c6cb8SMadhusudhan Chikkature #define DTO 0xe 63a45c6cb8SMadhusudhan Chikkature #define ICE 0x1 64a45c6cb8SMadhusudhan Chikkature #define ICS 0x2 65a45c6cb8SMadhusudhan Chikkature #define CEN (1 << 2) 66a45c6cb8SMadhusudhan Chikkature #define CLKD_MASK 0x0000FFC0 67a45c6cb8SMadhusudhan Chikkature #define CLKD_SHIFT 6 68a45c6cb8SMadhusudhan Chikkature #define DTO_MASK 0x000F0000 69a45c6cb8SMadhusudhan Chikkature #define DTO_SHIFT 16 70a45c6cb8SMadhusudhan Chikkature #define INT_EN_MASK 0x307F0033 71a45c6cb8SMadhusudhan Chikkature #define INIT_STREAM (1 << 1) 72a45c6cb8SMadhusudhan Chikkature #define DP_SELECT (1 << 21) 73a45c6cb8SMadhusudhan Chikkature #define DDIR (1 << 4) 74a45c6cb8SMadhusudhan Chikkature #define DMA_EN 0x1 75a45c6cb8SMadhusudhan Chikkature #define MSBS (1 << 5) 76a45c6cb8SMadhusudhan Chikkature #define BCE (1 << 1) 77a45c6cb8SMadhusudhan Chikkature #define FOUR_BIT (1 << 1) 78a45c6cb8SMadhusudhan Chikkature #define CC 0x1 79a45c6cb8SMadhusudhan Chikkature #define TC 0x02 80a45c6cb8SMadhusudhan Chikkature #define OD 0x1 81a45c6cb8SMadhusudhan Chikkature #define ERR (1 << 15) 82a45c6cb8SMadhusudhan Chikkature #define CMD_TIMEOUT (1 << 16) 83a45c6cb8SMadhusudhan Chikkature #define DATA_TIMEOUT (1 << 20) 84a45c6cb8SMadhusudhan Chikkature #define CMD_CRC (1 << 17) 85a45c6cb8SMadhusudhan Chikkature #define DATA_CRC (1 << 21) 86a45c6cb8SMadhusudhan Chikkature #define CARD_ERR (1 << 28) 87a45c6cb8SMadhusudhan Chikkature #define STAT_CLEAR 0xFFFFFFFF 88a45c6cb8SMadhusudhan Chikkature #define INIT_STREAM_CMD 0x00000000 89a45c6cb8SMadhusudhan Chikkature #define DUAL_VOLT_OCR_BIT 7 90a45c6cb8SMadhusudhan Chikkature #define SRC (1 << 25) 91a45c6cb8SMadhusudhan Chikkature #define SRD (1 << 26) 92a45c6cb8SMadhusudhan Chikkature 93a45c6cb8SMadhusudhan Chikkature /* 94a45c6cb8SMadhusudhan Chikkature * FIXME: Most likely all the data using these _DEVID defines should come 95a45c6cb8SMadhusudhan Chikkature * from the platform_data, or implemented in controller and slot specific 96a45c6cb8SMadhusudhan Chikkature * functions. 97a45c6cb8SMadhusudhan Chikkature */ 98a45c6cb8SMadhusudhan Chikkature #define OMAP_MMC1_DEVID 0 99a45c6cb8SMadhusudhan Chikkature #define OMAP_MMC2_DEVID 1 100a45c6cb8SMadhusudhan Chikkature 101a45c6cb8SMadhusudhan Chikkature #define OMAP_MMC_DATADIR_NONE 0 102a45c6cb8SMadhusudhan Chikkature #define OMAP_MMC_DATADIR_READ 1 103a45c6cb8SMadhusudhan Chikkature #define OMAP_MMC_DATADIR_WRITE 2 104a45c6cb8SMadhusudhan Chikkature #define MMC_TIMEOUT_MS 20 105a45c6cb8SMadhusudhan Chikkature #define OMAP_MMC_MASTER_CLOCK 96000000 106a45c6cb8SMadhusudhan Chikkature #define DRIVER_NAME "mmci-omap-hs" 107a45c6cb8SMadhusudhan Chikkature 108a45c6cb8SMadhusudhan Chikkature /* 109a45c6cb8SMadhusudhan Chikkature * One controller can have multiple slots, like on some omap boards using 110a45c6cb8SMadhusudhan Chikkature * omap.c controller driver. Luckily this is not currently done on any known 111a45c6cb8SMadhusudhan Chikkature * omap_hsmmc.c device. 112a45c6cb8SMadhusudhan Chikkature */ 113a45c6cb8SMadhusudhan Chikkature #define mmc_slot(host) (host->pdata->slots[host->slot_id]) 114a45c6cb8SMadhusudhan Chikkature 115a45c6cb8SMadhusudhan Chikkature /* 116a45c6cb8SMadhusudhan Chikkature * MMC Host controller read/write API's 117a45c6cb8SMadhusudhan Chikkature */ 118a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_READ(base, reg) \ 119a45c6cb8SMadhusudhan Chikkature __raw_readl((base) + OMAP_HSMMC_##reg) 120a45c6cb8SMadhusudhan Chikkature 121a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_WRITE(base, reg, val) \ 122a45c6cb8SMadhusudhan Chikkature __raw_writel((val), (base) + OMAP_HSMMC_##reg) 123a45c6cb8SMadhusudhan Chikkature 124a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host { 125a45c6cb8SMadhusudhan Chikkature struct device *dev; 126a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc; 127a45c6cb8SMadhusudhan Chikkature struct mmc_request *mrq; 128a45c6cb8SMadhusudhan Chikkature struct mmc_command *cmd; 129a45c6cb8SMadhusudhan Chikkature struct mmc_data *data; 130a45c6cb8SMadhusudhan Chikkature struct clk *fclk; 131a45c6cb8SMadhusudhan Chikkature struct clk *iclk; 132a45c6cb8SMadhusudhan Chikkature struct clk *dbclk; 133a45c6cb8SMadhusudhan Chikkature struct semaphore sem; 134a45c6cb8SMadhusudhan Chikkature struct work_struct mmc_carddetect_work; 135a45c6cb8SMadhusudhan Chikkature void __iomem *base; 136a45c6cb8SMadhusudhan Chikkature resource_size_t mapbase; 137a45c6cb8SMadhusudhan Chikkature unsigned int id; 138a45c6cb8SMadhusudhan Chikkature unsigned int dma_len; 139a45c6cb8SMadhusudhan Chikkature unsigned int dma_dir; 140a45c6cb8SMadhusudhan Chikkature unsigned char bus_mode; 141a45c6cb8SMadhusudhan Chikkature unsigned char datadir; 142a45c6cb8SMadhusudhan Chikkature u32 *buffer; 143a45c6cb8SMadhusudhan Chikkature u32 bytesleft; 144a45c6cb8SMadhusudhan Chikkature int suspended; 145a45c6cb8SMadhusudhan Chikkature int irq; 146a45c6cb8SMadhusudhan Chikkature int carddetect; 147a45c6cb8SMadhusudhan Chikkature int use_dma, dma_ch; 148a45c6cb8SMadhusudhan Chikkature int initstr; 149a45c6cb8SMadhusudhan Chikkature int slot_id; 150a45c6cb8SMadhusudhan Chikkature int dbclk_enabled; 151a45c6cb8SMadhusudhan Chikkature struct omap_mmc_platform_data *pdata; 152a45c6cb8SMadhusudhan Chikkature }; 153a45c6cb8SMadhusudhan Chikkature 154a45c6cb8SMadhusudhan Chikkature /* 155a45c6cb8SMadhusudhan Chikkature * Stop clock to the card 156a45c6cb8SMadhusudhan Chikkature */ 157a45c6cb8SMadhusudhan Chikkature static void omap_mmc_stop_clock(struct mmc_omap_host *host) 158a45c6cb8SMadhusudhan Chikkature { 159a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, 160a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, SYSCTL) & ~CEN); 161a45c6cb8SMadhusudhan Chikkature if ((OMAP_HSMMC_READ(host->base, SYSCTL) & CEN) != 0x0) 162a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "MMC Clock is not stoped\n"); 163a45c6cb8SMadhusudhan Chikkature } 164a45c6cb8SMadhusudhan Chikkature 165a45c6cb8SMadhusudhan Chikkature /* 166a45c6cb8SMadhusudhan Chikkature * Send init stream sequence to card 167a45c6cb8SMadhusudhan Chikkature * before sending IDLE command 168a45c6cb8SMadhusudhan Chikkature */ 169a45c6cb8SMadhusudhan Chikkature static void send_init_stream(struct mmc_omap_host *host) 170a45c6cb8SMadhusudhan Chikkature { 171a45c6cb8SMadhusudhan Chikkature int reg = 0; 172a45c6cb8SMadhusudhan Chikkature unsigned long timeout; 173a45c6cb8SMadhusudhan Chikkature 174a45c6cb8SMadhusudhan Chikkature disable_irq(host->irq); 175a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CON, 176a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, CON) | INIT_STREAM); 177a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CMD, INIT_STREAM_CMD); 178a45c6cb8SMadhusudhan Chikkature 179a45c6cb8SMadhusudhan Chikkature timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 180a45c6cb8SMadhusudhan Chikkature while ((reg != CC) && time_before(jiffies, timeout)) 181a45c6cb8SMadhusudhan Chikkature reg = OMAP_HSMMC_READ(host->base, STAT) & CC; 182a45c6cb8SMadhusudhan Chikkature 183a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CON, 184a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, CON) & ~INIT_STREAM); 185a45c6cb8SMadhusudhan Chikkature enable_irq(host->irq); 186a45c6cb8SMadhusudhan Chikkature } 187a45c6cb8SMadhusudhan Chikkature 188a45c6cb8SMadhusudhan Chikkature static inline 189a45c6cb8SMadhusudhan Chikkature int mmc_omap_cover_is_closed(struct mmc_omap_host *host) 190a45c6cb8SMadhusudhan Chikkature { 191a45c6cb8SMadhusudhan Chikkature int r = 1; 192a45c6cb8SMadhusudhan Chikkature 193a45c6cb8SMadhusudhan Chikkature if (host->pdata->slots[host->slot_id].get_cover_state) 194a45c6cb8SMadhusudhan Chikkature r = host->pdata->slots[host->slot_id].get_cover_state(host->dev, 195a45c6cb8SMadhusudhan Chikkature host->slot_id); 196a45c6cb8SMadhusudhan Chikkature return r; 197a45c6cb8SMadhusudhan Chikkature } 198a45c6cb8SMadhusudhan Chikkature 199a45c6cb8SMadhusudhan Chikkature static ssize_t 200a45c6cb8SMadhusudhan Chikkature mmc_omap_show_cover_switch(struct device *dev, struct device_attribute *attr, 201a45c6cb8SMadhusudhan Chikkature char *buf) 202a45c6cb8SMadhusudhan Chikkature { 203a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev); 204a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = mmc_priv(mmc); 205a45c6cb8SMadhusudhan Chikkature 206a45c6cb8SMadhusudhan Chikkature return sprintf(buf, "%s\n", mmc_omap_cover_is_closed(host) ? "closed" : 207a45c6cb8SMadhusudhan Chikkature "open"); 208a45c6cb8SMadhusudhan Chikkature } 209a45c6cb8SMadhusudhan Chikkature 210a45c6cb8SMadhusudhan Chikkature static DEVICE_ATTR(cover_switch, S_IRUGO, mmc_omap_show_cover_switch, NULL); 211a45c6cb8SMadhusudhan Chikkature 212a45c6cb8SMadhusudhan Chikkature static ssize_t 213a45c6cb8SMadhusudhan Chikkature mmc_omap_show_slot_name(struct device *dev, struct device_attribute *attr, 214a45c6cb8SMadhusudhan Chikkature char *buf) 215a45c6cb8SMadhusudhan Chikkature { 216a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev); 217a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = mmc_priv(mmc); 218a45c6cb8SMadhusudhan Chikkature struct omap_mmc_slot_data slot = host->pdata->slots[host->slot_id]; 219a45c6cb8SMadhusudhan Chikkature 220a45c6cb8SMadhusudhan Chikkature return sprintf(buf, "slot:%s\n", slot.name); 221a45c6cb8SMadhusudhan Chikkature } 222a45c6cb8SMadhusudhan Chikkature 223a45c6cb8SMadhusudhan Chikkature static DEVICE_ATTR(slot_name, S_IRUGO, mmc_omap_show_slot_name, NULL); 224a45c6cb8SMadhusudhan Chikkature 225a45c6cb8SMadhusudhan Chikkature /* 226a45c6cb8SMadhusudhan Chikkature * Configure the response type and send the cmd. 227a45c6cb8SMadhusudhan Chikkature */ 228a45c6cb8SMadhusudhan Chikkature static void 229a45c6cb8SMadhusudhan Chikkature mmc_omap_start_command(struct mmc_omap_host *host, struct mmc_command *cmd, 230a45c6cb8SMadhusudhan Chikkature struct mmc_data *data) 231a45c6cb8SMadhusudhan Chikkature { 232a45c6cb8SMadhusudhan Chikkature int cmdreg = 0, resptype = 0, cmdtype = 0; 233a45c6cb8SMadhusudhan Chikkature 234a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "%s: CMD%d, argument 0x%08x\n", 235a45c6cb8SMadhusudhan Chikkature mmc_hostname(host->mmc), cmd->opcode, cmd->arg); 236a45c6cb8SMadhusudhan Chikkature host->cmd = cmd; 237a45c6cb8SMadhusudhan Chikkature 238a45c6cb8SMadhusudhan Chikkature /* 239a45c6cb8SMadhusudhan Chikkature * Clear status bits and enable interrupts 240a45c6cb8SMadhusudhan Chikkature */ 241a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); 242a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK); 243a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK); 244a45c6cb8SMadhusudhan Chikkature 245a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_PRESENT) { 246a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_136) 247a45c6cb8SMadhusudhan Chikkature resptype = 1; 248a45c6cb8SMadhusudhan Chikkature else 249a45c6cb8SMadhusudhan Chikkature resptype = 2; 250a45c6cb8SMadhusudhan Chikkature } 251a45c6cb8SMadhusudhan Chikkature 252a45c6cb8SMadhusudhan Chikkature /* 253a45c6cb8SMadhusudhan Chikkature * Unlike OMAP1 controller, the cmdtype does not seem to be based on 254a45c6cb8SMadhusudhan Chikkature * ac, bc, adtc, bcr. Only commands ending an open ended transfer need 255a45c6cb8SMadhusudhan Chikkature * a val of 0x3, rest 0x0. 256a45c6cb8SMadhusudhan Chikkature */ 257a45c6cb8SMadhusudhan Chikkature if (cmd == host->mrq->stop) 258a45c6cb8SMadhusudhan Chikkature cmdtype = 0x3; 259a45c6cb8SMadhusudhan Chikkature 260a45c6cb8SMadhusudhan Chikkature cmdreg = (cmd->opcode << 24) | (resptype << 16) | (cmdtype << 22); 261a45c6cb8SMadhusudhan Chikkature 262a45c6cb8SMadhusudhan Chikkature if (data) { 263a45c6cb8SMadhusudhan Chikkature cmdreg |= DP_SELECT | MSBS | BCE; 264a45c6cb8SMadhusudhan Chikkature if (data->flags & MMC_DATA_READ) 265a45c6cb8SMadhusudhan Chikkature cmdreg |= DDIR; 266a45c6cb8SMadhusudhan Chikkature else 267a45c6cb8SMadhusudhan Chikkature cmdreg &= ~(DDIR); 268a45c6cb8SMadhusudhan Chikkature } 269a45c6cb8SMadhusudhan Chikkature 270a45c6cb8SMadhusudhan Chikkature if (host->use_dma) 271a45c6cb8SMadhusudhan Chikkature cmdreg |= DMA_EN; 272a45c6cb8SMadhusudhan Chikkature 273a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, ARG, cmd->arg); 274a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CMD, cmdreg); 275a45c6cb8SMadhusudhan Chikkature } 276a45c6cb8SMadhusudhan Chikkature 277a45c6cb8SMadhusudhan Chikkature /* 278a45c6cb8SMadhusudhan Chikkature * Notify the transfer complete to MMC core 279a45c6cb8SMadhusudhan Chikkature */ 280a45c6cb8SMadhusudhan Chikkature static void 281a45c6cb8SMadhusudhan Chikkature mmc_omap_xfer_done(struct mmc_omap_host *host, struct mmc_data *data) 282a45c6cb8SMadhusudhan Chikkature { 283a45c6cb8SMadhusudhan Chikkature host->data = NULL; 284a45c6cb8SMadhusudhan Chikkature 285a45c6cb8SMadhusudhan Chikkature if (host->use_dma && host->dma_ch != -1) 286a45c6cb8SMadhusudhan Chikkature dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->dma_len, 287a45c6cb8SMadhusudhan Chikkature host->dma_dir); 288a45c6cb8SMadhusudhan Chikkature 289a45c6cb8SMadhusudhan Chikkature host->datadir = OMAP_MMC_DATADIR_NONE; 290a45c6cb8SMadhusudhan Chikkature 291a45c6cb8SMadhusudhan Chikkature if (!data->error) 292a45c6cb8SMadhusudhan Chikkature data->bytes_xfered += data->blocks * (data->blksz); 293a45c6cb8SMadhusudhan Chikkature else 294a45c6cb8SMadhusudhan Chikkature data->bytes_xfered = 0; 295a45c6cb8SMadhusudhan Chikkature 296a45c6cb8SMadhusudhan Chikkature if (!data->stop) { 297a45c6cb8SMadhusudhan Chikkature host->mrq = NULL; 298a45c6cb8SMadhusudhan Chikkature mmc_request_done(host->mmc, data->mrq); 299a45c6cb8SMadhusudhan Chikkature return; 300a45c6cb8SMadhusudhan Chikkature } 301a45c6cb8SMadhusudhan Chikkature mmc_omap_start_command(host, data->stop, NULL); 302a45c6cb8SMadhusudhan Chikkature } 303a45c6cb8SMadhusudhan Chikkature 304a45c6cb8SMadhusudhan Chikkature /* 305a45c6cb8SMadhusudhan Chikkature * Notify the core about command completion 306a45c6cb8SMadhusudhan Chikkature */ 307a45c6cb8SMadhusudhan Chikkature static void 308a45c6cb8SMadhusudhan Chikkature mmc_omap_cmd_done(struct mmc_omap_host *host, struct mmc_command *cmd) 309a45c6cb8SMadhusudhan Chikkature { 310a45c6cb8SMadhusudhan Chikkature host->cmd = NULL; 311a45c6cb8SMadhusudhan Chikkature 312a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_PRESENT) { 313a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_136) { 314a45c6cb8SMadhusudhan Chikkature /* response type 2 */ 315a45c6cb8SMadhusudhan Chikkature cmd->resp[3] = OMAP_HSMMC_READ(host->base, RSP10); 316a45c6cb8SMadhusudhan Chikkature cmd->resp[2] = OMAP_HSMMC_READ(host->base, RSP32); 317a45c6cb8SMadhusudhan Chikkature cmd->resp[1] = OMAP_HSMMC_READ(host->base, RSP54); 318a45c6cb8SMadhusudhan Chikkature cmd->resp[0] = OMAP_HSMMC_READ(host->base, RSP76); 319a45c6cb8SMadhusudhan Chikkature } else { 320a45c6cb8SMadhusudhan Chikkature /* response types 1, 1b, 3, 4, 5, 6 */ 321a45c6cb8SMadhusudhan Chikkature cmd->resp[0] = OMAP_HSMMC_READ(host->base, RSP10); 322a45c6cb8SMadhusudhan Chikkature } 323a45c6cb8SMadhusudhan Chikkature } 324a45c6cb8SMadhusudhan Chikkature if (host->data == NULL || cmd->error) { 325a45c6cb8SMadhusudhan Chikkature host->mrq = NULL; 326a45c6cb8SMadhusudhan Chikkature mmc_request_done(host->mmc, cmd->mrq); 327a45c6cb8SMadhusudhan Chikkature } 328a45c6cb8SMadhusudhan Chikkature } 329a45c6cb8SMadhusudhan Chikkature 330a45c6cb8SMadhusudhan Chikkature /* 331a45c6cb8SMadhusudhan Chikkature * DMA clean up for command errors 332a45c6cb8SMadhusudhan Chikkature */ 333a45c6cb8SMadhusudhan Chikkature static void mmc_dma_cleanup(struct mmc_omap_host *host) 334a45c6cb8SMadhusudhan Chikkature { 335a45c6cb8SMadhusudhan Chikkature host->data->error = -ETIMEDOUT; 336a45c6cb8SMadhusudhan Chikkature 337a45c6cb8SMadhusudhan Chikkature if (host->use_dma && host->dma_ch != -1) { 338a45c6cb8SMadhusudhan Chikkature dma_unmap_sg(mmc_dev(host->mmc), host->data->sg, host->dma_len, 339a45c6cb8SMadhusudhan Chikkature host->dma_dir); 340a45c6cb8SMadhusudhan Chikkature omap_free_dma(host->dma_ch); 341a45c6cb8SMadhusudhan Chikkature host->dma_ch = -1; 342a45c6cb8SMadhusudhan Chikkature up(&host->sem); 343a45c6cb8SMadhusudhan Chikkature } 344a45c6cb8SMadhusudhan Chikkature host->data = NULL; 345a45c6cb8SMadhusudhan Chikkature host->datadir = OMAP_MMC_DATADIR_NONE; 346a45c6cb8SMadhusudhan Chikkature } 347a45c6cb8SMadhusudhan Chikkature 348a45c6cb8SMadhusudhan Chikkature /* 349a45c6cb8SMadhusudhan Chikkature * Readable error output 350a45c6cb8SMadhusudhan Chikkature */ 351a45c6cb8SMadhusudhan Chikkature #ifdef CONFIG_MMC_DEBUG 352a45c6cb8SMadhusudhan Chikkature static void mmc_omap_report_irq(struct mmc_omap_host *host, u32 status) 353a45c6cb8SMadhusudhan Chikkature { 354a45c6cb8SMadhusudhan Chikkature /* --- means reserved bit without definition at documentation */ 355a45c6cb8SMadhusudhan Chikkature static const char *mmc_omap_status_bits[] = { 356a45c6cb8SMadhusudhan Chikkature "CC", "TC", "BGE", "---", "BWR", "BRR", "---", "---", "CIRQ", 357a45c6cb8SMadhusudhan Chikkature "OBI", "---", "---", "---", "---", "---", "ERRI", "CTO", "CCRC", 358a45c6cb8SMadhusudhan Chikkature "CEB", "CIE", "DTO", "DCRC", "DEB", "---", "ACE", "---", 359a45c6cb8SMadhusudhan Chikkature "---", "---", "---", "CERR", "CERR", "BADA", "---", "---", "---" 360a45c6cb8SMadhusudhan Chikkature }; 361a45c6cb8SMadhusudhan Chikkature char res[256]; 362a45c6cb8SMadhusudhan Chikkature char *buf = res; 363a45c6cb8SMadhusudhan Chikkature int len, i; 364a45c6cb8SMadhusudhan Chikkature 365a45c6cb8SMadhusudhan Chikkature len = sprintf(buf, "MMC IRQ 0x%x :", status); 366a45c6cb8SMadhusudhan Chikkature buf += len; 367a45c6cb8SMadhusudhan Chikkature 368a45c6cb8SMadhusudhan Chikkature for (i = 0; i < ARRAY_SIZE(mmc_omap_status_bits); i++) 369a45c6cb8SMadhusudhan Chikkature if (status & (1 << i)) { 370a45c6cb8SMadhusudhan Chikkature len = sprintf(buf, " %s", mmc_omap_status_bits[i]); 371a45c6cb8SMadhusudhan Chikkature buf += len; 372a45c6cb8SMadhusudhan Chikkature } 373a45c6cb8SMadhusudhan Chikkature 374a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "%s\n", res); 375a45c6cb8SMadhusudhan Chikkature } 376a45c6cb8SMadhusudhan Chikkature #endif /* CONFIG_MMC_DEBUG */ 377a45c6cb8SMadhusudhan Chikkature 378a45c6cb8SMadhusudhan Chikkature 379a45c6cb8SMadhusudhan Chikkature /* 380a45c6cb8SMadhusudhan Chikkature * MMC controller IRQ handler 381a45c6cb8SMadhusudhan Chikkature */ 382a45c6cb8SMadhusudhan Chikkature static irqreturn_t mmc_omap_irq(int irq, void *dev_id) 383a45c6cb8SMadhusudhan Chikkature { 384a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = dev_id; 385a45c6cb8SMadhusudhan Chikkature struct mmc_data *data; 386a45c6cb8SMadhusudhan Chikkature int end_cmd = 0, end_trans = 0, status; 387a45c6cb8SMadhusudhan Chikkature 388a45c6cb8SMadhusudhan Chikkature if (host->cmd == NULL && host->data == NULL) { 389a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, STAT, 390a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, STAT)); 391a45c6cb8SMadhusudhan Chikkature return IRQ_HANDLED; 392a45c6cb8SMadhusudhan Chikkature } 393a45c6cb8SMadhusudhan Chikkature 394a45c6cb8SMadhusudhan Chikkature data = host->data; 395a45c6cb8SMadhusudhan Chikkature status = OMAP_HSMMC_READ(host->base, STAT); 396a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "IRQ Status is %x\n", status); 397a45c6cb8SMadhusudhan Chikkature 398a45c6cb8SMadhusudhan Chikkature if (status & ERR) { 399a45c6cb8SMadhusudhan Chikkature #ifdef CONFIG_MMC_DEBUG 400a45c6cb8SMadhusudhan Chikkature mmc_omap_report_irq(host, status); 401a45c6cb8SMadhusudhan Chikkature #endif 402a45c6cb8SMadhusudhan Chikkature if ((status & CMD_TIMEOUT) || 403a45c6cb8SMadhusudhan Chikkature (status & CMD_CRC)) { 404a45c6cb8SMadhusudhan Chikkature if (host->cmd) { 405a45c6cb8SMadhusudhan Chikkature if (status & CMD_TIMEOUT) { 406a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, 407a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, 408a45c6cb8SMadhusudhan Chikkature SYSCTL) | SRC); 409a45c6cb8SMadhusudhan Chikkature while (OMAP_HSMMC_READ(host->base, 410a45c6cb8SMadhusudhan Chikkature SYSCTL) & SRC) 411a45c6cb8SMadhusudhan Chikkature ; 412a45c6cb8SMadhusudhan Chikkature 413a45c6cb8SMadhusudhan Chikkature host->cmd->error = -ETIMEDOUT; 414a45c6cb8SMadhusudhan Chikkature } else { 415a45c6cb8SMadhusudhan Chikkature host->cmd->error = -EILSEQ; 416a45c6cb8SMadhusudhan Chikkature } 417a45c6cb8SMadhusudhan Chikkature end_cmd = 1; 418a45c6cb8SMadhusudhan Chikkature } 419a45c6cb8SMadhusudhan Chikkature if (host->data) 420a45c6cb8SMadhusudhan Chikkature mmc_dma_cleanup(host); 421a45c6cb8SMadhusudhan Chikkature } 422a45c6cb8SMadhusudhan Chikkature if ((status & DATA_TIMEOUT) || 423a45c6cb8SMadhusudhan Chikkature (status & DATA_CRC)) { 424a45c6cb8SMadhusudhan Chikkature if (host->data) { 425a45c6cb8SMadhusudhan Chikkature if (status & DATA_TIMEOUT) 426a45c6cb8SMadhusudhan Chikkature mmc_dma_cleanup(host); 427a45c6cb8SMadhusudhan Chikkature else 428a45c6cb8SMadhusudhan Chikkature host->data->error = -EILSEQ; 429a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, 430a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, 431a45c6cb8SMadhusudhan Chikkature SYSCTL) | SRD); 432a45c6cb8SMadhusudhan Chikkature while (OMAP_HSMMC_READ(host->base, 433a45c6cb8SMadhusudhan Chikkature SYSCTL) & SRD) 434a45c6cb8SMadhusudhan Chikkature ; 435a45c6cb8SMadhusudhan Chikkature end_trans = 1; 436a45c6cb8SMadhusudhan Chikkature } 437a45c6cb8SMadhusudhan Chikkature } 438a45c6cb8SMadhusudhan Chikkature if (status & CARD_ERR) { 439a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 440a45c6cb8SMadhusudhan Chikkature "Ignoring card err CMD%d\n", host->cmd->opcode); 441a45c6cb8SMadhusudhan Chikkature if (host->cmd) 442a45c6cb8SMadhusudhan Chikkature end_cmd = 1; 443a45c6cb8SMadhusudhan Chikkature if (host->data) 444a45c6cb8SMadhusudhan Chikkature end_trans = 1; 445a45c6cb8SMadhusudhan Chikkature } 446a45c6cb8SMadhusudhan Chikkature } 447a45c6cb8SMadhusudhan Chikkature 448a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, STAT, status); 449a45c6cb8SMadhusudhan Chikkature 450a45c6cb8SMadhusudhan Chikkature if (end_cmd || (status & CC)) 451a45c6cb8SMadhusudhan Chikkature mmc_omap_cmd_done(host, host->cmd); 452a45c6cb8SMadhusudhan Chikkature if (end_trans || (status & TC)) 453a45c6cb8SMadhusudhan Chikkature mmc_omap_xfer_done(host, data); 454a45c6cb8SMadhusudhan Chikkature 455a45c6cb8SMadhusudhan Chikkature return IRQ_HANDLED; 456a45c6cb8SMadhusudhan Chikkature } 457a45c6cb8SMadhusudhan Chikkature 458a45c6cb8SMadhusudhan Chikkature /* 459a45c6cb8SMadhusudhan Chikkature * Switch MMC operating voltage 460a45c6cb8SMadhusudhan Chikkature */ 461a45c6cb8SMadhusudhan Chikkature static int omap_mmc_switch_opcond(struct mmc_omap_host *host, int vdd) 462a45c6cb8SMadhusudhan Chikkature { 463a45c6cb8SMadhusudhan Chikkature u32 reg_val = 0; 464a45c6cb8SMadhusudhan Chikkature int ret; 465a45c6cb8SMadhusudhan Chikkature 466a45c6cb8SMadhusudhan Chikkature /* Disable the clocks */ 467a45c6cb8SMadhusudhan Chikkature clk_disable(host->fclk); 468a45c6cb8SMadhusudhan Chikkature clk_disable(host->iclk); 469a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 470a45c6cb8SMadhusudhan Chikkature 471a45c6cb8SMadhusudhan Chikkature /* Turn the power off */ 472a45c6cb8SMadhusudhan Chikkature ret = mmc_slot(host).set_power(host->dev, host->slot_id, 0, 0); 473a45c6cb8SMadhusudhan Chikkature if (ret != 0) 474a45c6cb8SMadhusudhan Chikkature goto err; 475a45c6cb8SMadhusudhan Chikkature 476a45c6cb8SMadhusudhan Chikkature /* Turn the power ON with given VDD 1.8 or 3.0v */ 477a45c6cb8SMadhusudhan Chikkature ret = mmc_slot(host).set_power(host->dev, host->slot_id, 1, vdd); 478a45c6cb8SMadhusudhan Chikkature if (ret != 0) 479a45c6cb8SMadhusudhan Chikkature goto err; 480a45c6cb8SMadhusudhan Chikkature 481a45c6cb8SMadhusudhan Chikkature clk_enable(host->fclk); 482a45c6cb8SMadhusudhan Chikkature clk_enable(host->iclk); 483a45c6cb8SMadhusudhan Chikkature clk_enable(host->dbclk); 484a45c6cb8SMadhusudhan Chikkature 485a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 486a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) & SDVSCLR); 487a45c6cb8SMadhusudhan Chikkature reg_val = OMAP_HSMMC_READ(host->base, HCTL); 488a45c6cb8SMadhusudhan Chikkature /* 489a45c6cb8SMadhusudhan Chikkature * If a MMC dual voltage card is detected, the set_ios fn calls 490a45c6cb8SMadhusudhan Chikkature * this fn with VDD bit set for 1.8V. Upon card removal from the 491a45c6cb8SMadhusudhan Chikkature * slot, omap_mmc_set_ios sets the VDD back to 3V on MMC_POWER_OFF. 492a45c6cb8SMadhusudhan Chikkature * 493a45c6cb8SMadhusudhan Chikkature * Only MMC1 supports 3.0V. MMC2 will not function if SDVS30 is 494a45c6cb8SMadhusudhan Chikkature * set in HCTL. 495a45c6cb8SMadhusudhan Chikkature */ 496a45c6cb8SMadhusudhan Chikkature if (host->id == OMAP_MMC1_DEVID && (((1 << vdd) == MMC_VDD_32_33) || 497a45c6cb8SMadhusudhan Chikkature ((1 << vdd) == MMC_VDD_33_34))) 498a45c6cb8SMadhusudhan Chikkature reg_val |= SDVS30; 499a45c6cb8SMadhusudhan Chikkature if ((1 << vdd) == MMC_VDD_165_195) 500a45c6cb8SMadhusudhan Chikkature reg_val |= SDVS18; 501a45c6cb8SMadhusudhan Chikkature 502a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, reg_val); 503a45c6cb8SMadhusudhan Chikkature 504a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 505a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) | SDBP); 506a45c6cb8SMadhusudhan Chikkature 507a45c6cb8SMadhusudhan Chikkature return 0; 508a45c6cb8SMadhusudhan Chikkature err: 509a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Unable to switch operating voltage\n"); 510a45c6cb8SMadhusudhan Chikkature return ret; 511a45c6cb8SMadhusudhan Chikkature } 512a45c6cb8SMadhusudhan Chikkature 513a45c6cb8SMadhusudhan Chikkature /* 514a45c6cb8SMadhusudhan Chikkature * Work Item to notify the core about card insertion/removal 515a45c6cb8SMadhusudhan Chikkature */ 516a45c6cb8SMadhusudhan Chikkature static void mmc_omap_detect(struct work_struct *work) 517a45c6cb8SMadhusudhan Chikkature { 518a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = container_of(work, struct mmc_omap_host, 519a45c6cb8SMadhusudhan Chikkature mmc_carddetect_work); 520a45c6cb8SMadhusudhan Chikkature 521a45c6cb8SMadhusudhan Chikkature sysfs_notify(&host->mmc->class_dev.kobj, NULL, "cover_switch"); 522a45c6cb8SMadhusudhan Chikkature if (host->carddetect) { 523a45c6cb8SMadhusudhan Chikkature mmc_detect_change(host->mmc, (HZ * 200) / 1000); 524a45c6cb8SMadhusudhan Chikkature } else { 525a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, 526a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, SYSCTL) | SRD); 527a45c6cb8SMadhusudhan Chikkature while (OMAP_HSMMC_READ(host->base, SYSCTL) & SRD) 528a45c6cb8SMadhusudhan Chikkature ; 529a45c6cb8SMadhusudhan Chikkature 530a45c6cb8SMadhusudhan Chikkature mmc_detect_change(host->mmc, (HZ * 50) / 1000); 531a45c6cb8SMadhusudhan Chikkature } 532a45c6cb8SMadhusudhan Chikkature } 533a45c6cb8SMadhusudhan Chikkature 534a45c6cb8SMadhusudhan Chikkature /* 535a45c6cb8SMadhusudhan Chikkature * ISR for handling card insertion and removal 536a45c6cb8SMadhusudhan Chikkature */ 537a45c6cb8SMadhusudhan Chikkature static irqreturn_t omap_mmc_cd_handler(int irq, void *dev_id) 538a45c6cb8SMadhusudhan Chikkature { 539a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = (struct mmc_omap_host *)dev_id; 540a45c6cb8SMadhusudhan Chikkature 541a45c6cb8SMadhusudhan Chikkature host->carddetect = mmc_slot(host).card_detect(irq); 542a45c6cb8SMadhusudhan Chikkature schedule_work(&host->mmc_carddetect_work); 543a45c6cb8SMadhusudhan Chikkature 544a45c6cb8SMadhusudhan Chikkature return IRQ_HANDLED; 545a45c6cb8SMadhusudhan Chikkature } 546a45c6cb8SMadhusudhan Chikkature 547a45c6cb8SMadhusudhan Chikkature /* 548a45c6cb8SMadhusudhan Chikkature * DMA call back function 549a45c6cb8SMadhusudhan Chikkature */ 550a45c6cb8SMadhusudhan Chikkature static void mmc_omap_dma_cb(int lch, u16 ch_status, void *data) 551a45c6cb8SMadhusudhan Chikkature { 552a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = data; 553a45c6cb8SMadhusudhan Chikkature 554a45c6cb8SMadhusudhan Chikkature if (ch_status & OMAP2_DMA_MISALIGNED_ERR_IRQ) 555a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "MISALIGNED_ADRS_ERR\n"); 556a45c6cb8SMadhusudhan Chikkature 557a45c6cb8SMadhusudhan Chikkature if (host->dma_ch < 0) 558a45c6cb8SMadhusudhan Chikkature return; 559a45c6cb8SMadhusudhan Chikkature 560a45c6cb8SMadhusudhan Chikkature omap_free_dma(host->dma_ch); 561a45c6cb8SMadhusudhan Chikkature host->dma_ch = -1; 562a45c6cb8SMadhusudhan Chikkature /* 563a45c6cb8SMadhusudhan Chikkature * DMA Callback: run in interrupt context. 564a45c6cb8SMadhusudhan Chikkature * mutex_unlock will through a kernel warning if used. 565a45c6cb8SMadhusudhan Chikkature */ 566a45c6cb8SMadhusudhan Chikkature up(&host->sem); 567a45c6cb8SMadhusudhan Chikkature } 568a45c6cb8SMadhusudhan Chikkature 569a45c6cb8SMadhusudhan Chikkature /* 570a45c6cb8SMadhusudhan Chikkature * Configure dma src and destination parameters 571a45c6cb8SMadhusudhan Chikkature */ 572a45c6cb8SMadhusudhan Chikkature static int mmc_omap_config_dma_param(int sync_dir, struct mmc_omap_host *host, 573a45c6cb8SMadhusudhan Chikkature struct mmc_data *data) 574a45c6cb8SMadhusudhan Chikkature { 575a45c6cb8SMadhusudhan Chikkature if (sync_dir == 0) { 576a45c6cb8SMadhusudhan Chikkature omap_set_dma_dest_params(host->dma_ch, 0, 577a45c6cb8SMadhusudhan Chikkature OMAP_DMA_AMODE_CONSTANT, 578a45c6cb8SMadhusudhan Chikkature (host->mapbase + OMAP_HSMMC_DATA), 0, 0); 579a45c6cb8SMadhusudhan Chikkature omap_set_dma_src_params(host->dma_ch, 0, 580a45c6cb8SMadhusudhan Chikkature OMAP_DMA_AMODE_POST_INC, 581a45c6cb8SMadhusudhan Chikkature sg_dma_address(&data->sg[0]), 0, 0); 582a45c6cb8SMadhusudhan Chikkature } else { 583a45c6cb8SMadhusudhan Chikkature omap_set_dma_src_params(host->dma_ch, 0, 584a45c6cb8SMadhusudhan Chikkature OMAP_DMA_AMODE_CONSTANT, 585a45c6cb8SMadhusudhan Chikkature (host->mapbase + OMAP_HSMMC_DATA), 0, 0); 586a45c6cb8SMadhusudhan Chikkature omap_set_dma_dest_params(host->dma_ch, 0, 587a45c6cb8SMadhusudhan Chikkature OMAP_DMA_AMODE_POST_INC, 588a45c6cb8SMadhusudhan Chikkature sg_dma_address(&data->sg[0]), 0, 0); 589a45c6cb8SMadhusudhan Chikkature } 590a45c6cb8SMadhusudhan Chikkature return 0; 591a45c6cb8SMadhusudhan Chikkature } 592a45c6cb8SMadhusudhan Chikkature /* 593a45c6cb8SMadhusudhan Chikkature * Routine to configure and start DMA for the MMC card 594a45c6cb8SMadhusudhan Chikkature */ 595a45c6cb8SMadhusudhan Chikkature static int 596a45c6cb8SMadhusudhan Chikkature mmc_omap_start_dma_transfer(struct mmc_omap_host *host, struct mmc_request *req) 597a45c6cb8SMadhusudhan Chikkature { 598a45c6cb8SMadhusudhan Chikkature int sync_dev, sync_dir = 0; 599a45c6cb8SMadhusudhan Chikkature int dma_ch = 0, ret = 0, err = 1; 600a45c6cb8SMadhusudhan Chikkature struct mmc_data *data = req->data; 601a45c6cb8SMadhusudhan Chikkature 602a45c6cb8SMadhusudhan Chikkature /* 603a45c6cb8SMadhusudhan Chikkature * If for some reason the DMA transfer is still active, 604a45c6cb8SMadhusudhan Chikkature * we wait for timeout period and free the dma 605a45c6cb8SMadhusudhan Chikkature */ 606a45c6cb8SMadhusudhan Chikkature if (host->dma_ch != -1) { 607a45c6cb8SMadhusudhan Chikkature set_current_state(TASK_UNINTERRUPTIBLE); 608a45c6cb8SMadhusudhan Chikkature schedule_timeout(100); 609a45c6cb8SMadhusudhan Chikkature if (down_trylock(&host->sem)) { 610a45c6cb8SMadhusudhan Chikkature omap_free_dma(host->dma_ch); 611a45c6cb8SMadhusudhan Chikkature host->dma_ch = -1; 612a45c6cb8SMadhusudhan Chikkature up(&host->sem); 613a45c6cb8SMadhusudhan Chikkature return err; 614a45c6cb8SMadhusudhan Chikkature } 615a45c6cb8SMadhusudhan Chikkature } else { 616a45c6cb8SMadhusudhan Chikkature if (down_trylock(&host->sem)) 617a45c6cb8SMadhusudhan Chikkature return err; 618a45c6cb8SMadhusudhan Chikkature } 619a45c6cb8SMadhusudhan Chikkature 620a45c6cb8SMadhusudhan Chikkature if (!(data->flags & MMC_DATA_WRITE)) { 621a45c6cb8SMadhusudhan Chikkature host->dma_dir = DMA_FROM_DEVICE; 622a45c6cb8SMadhusudhan Chikkature if (host->id == OMAP_MMC1_DEVID) 623a45c6cb8SMadhusudhan Chikkature sync_dev = OMAP24XX_DMA_MMC1_RX; 624a45c6cb8SMadhusudhan Chikkature else 625a45c6cb8SMadhusudhan Chikkature sync_dev = OMAP24XX_DMA_MMC2_RX; 626a45c6cb8SMadhusudhan Chikkature } else { 627a45c6cb8SMadhusudhan Chikkature host->dma_dir = DMA_TO_DEVICE; 628a45c6cb8SMadhusudhan Chikkature if (host->id == OMAP_MMC1_DEVID) 629a45c6cb8SMadhusudhan Chikkature sync_dev = OMAP24XX_DMA_MMC1_TX; 630a45c6cb8SMadhusudhan Chikkature else 631a45c6cb8SMadhusudhan Chikkature sync_dev = OMAP24XX_DMA_MMC2_TX; 632a45c6cb8SMadhusudhan Chikkature } 633a45c6cb8SMadhusudhan Chikkature 634a45c6cb8SMadhusudhan Chikkature ret = omap_request_dma(sync_dev, "MMC/SD", mmc_omap_dma_cb, 635a45c6cb8SMadhusudhan Chikkature host, &dma_ch); 636a45c6cb8SMadhusudhan Chikkature if (ret != 0) { 637a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 638a45c6cb8SMadhusudhan Chikkature "%s: omap_request_dma() failed with %d\n", 639a45c6cb8SMadhusudhan Chikkature mmc_hostname(host->mmc), ret); 640a45c6cb8SMadhusudhan Chikkature return ret; 641a45c6cb8SMadhusudhan Chikkature } 642a45c6cb8SMadhusudhan Chikkature 643a45c6cb8SMadhusudhan Chikkature host->dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg, 644a45c6cb8SMadhusudhan Chikkature data->sg_len, host->dma_dir); 645a45c6cb8SMadhusudhan Chikkature host->dma_ch = dma_ch; 646a45c6cb8SMadhusudhan Chikkature 647a45c6cb8SMadhusudhan Chikkature if (!(data->flags & MMC_DATA_WRITE)) 648a45c6cb8SMadhusudhan Chikkature mmc_omap_config_dma_param(1, host, data); 649a45c6cb8SMadhusudhan Chikkature else 650a45c6cb8SMadhusudhan Chikkature mmc_omap_config_dma_param(0, host, data); 651a45c6cb8SMadhusudhan Chikkature 652a45c6cb8SMadhusudhan Chikkature if ((data->blksz % 4) == 0) 653a45c6cb8SMadhusudhan Chikkature omap_set_dma_transfer_params(dma_ch, OMAP_DMA_DATA_TYPE_S32, 654a45c6cb8SMadhusudhan Chikkature (data->blksz / 4), data->blocks, OMAP_DMA_SYNC_FRAME, 655a45c6cb8SMadhusudhan Chikkature sync_dev, sync_dir); 656a45c6cb8SMadhusudhan Chikkature else 657a45c6cb8SMadhusudhan Chikkature /* REVISIT: The MMC buffer increments only when MSB is written. 658a45c6cb8SMadhusudhan Chikkature * Return error for blksz which is non multiple of four. 659a45c6cb8SMadhusudhan Chikkature */ 660a45c6cb8SMadhusudhan Chikkature return -EINVAL; 661a45c6cb8SMadhusudhan Chikkature 662a45c6cb8SMadhusudhan Chikkature omap_start_dma(dma_ch); 663a45c6cb8SMadhusudhan Chikkature return 0; 664a45c6cb8SMadhusudhan Chikkature } 665a45c6cb8SMadhusudhan Chikkature 666a45c6cb8SMadhusudhan Chikkature static void set_data_timeout(struct mmc_omap_host *host, 667a45c6cb8SMadhusudhan Chikkature struct mmc_request *req) 668a45c6cb8SMadhusudhan Chikkature { 669a45c6cb8SMadhusudhan Chikkature unsigned int timeout, cycle_ns; 670a45c6cb8SMadhusudhan Chikkature uint32_t reg, clkd, dto = 0; 671a45c6cb8SMadhusudhan Chikkature 672a45c6cb8SMadhusudhan Chikkature reg = OMAP_HSMMC_READ(host->base, SYSCTL); 673a45c6cb8SMadhusudhan Chikkature clkd = (reg & CLKD_MASK) >> CLKD_SHIFT; 674a45c6cb8SMadhusudhan Chikkature if (clkd == 0) 675a45c6cb8SMadhusudhan Chikkature clkd = 1; 676a45c6cb8SMadhusudhan Chikkature 677a45c6cb8SMadhusudhan Chikkature cycle_ns = 1000000000 / (clk_get_rate(host->fclk) / clkd); 678a45c6cb8SMadhusudhan Chikkature timeout = req->data->timeout_ns / cycle_ns; 679a45c6cb8SMadhusudhan Chikkature timeout += req->data->timeout_clks; 680a45c6cb8SMadhusudhan Chikkature if (timeout) { 681a45c6cb8SMadhusudhan Chikkature while ((timeout & 0x80000000) == 0) { 682a45c6cb8SMadhusudhan Chikkature dto += 1; 683a45c6cb8SMadhusudhan Chikkature timeout <<= 1; 684a45c6cb8SMadhusudhan Chikkature } 685a45c6cb8SMadhusudhan Chikkature dto = 31 - dto; 686a45c6cb8SMadhusudhan Chikkature timeout <<= 1; 687a45c6cb8SMadhusudhan Chikkature if (timeout && dto) 688a45c6cb8SMadhusudhan Chikkature dto += 1; 689a45c6cb8SMadhusudhan Chikkature if (dto >= 13) 690a45c6cb8SMadhusudhan Chikkature dto -= 13; 691a45c6cb8SMadhusudhan Chikkature else 692a45c6cb8SMadhusudhan Chikkature dto = 0; 693a45c6cb8SMadhusudhan Chikkature if (dto > 14) 694a45c6cb8SMadhusudhan Chikkature dto = 14; 695a45c6cb8SMadhusudhan Chikkature } 696a45c6cb8SMadhusudhan Chikkature 697a45c6cb8SMadhusudhan Chikkature reg &= ~DTO_MASK; 698a45c6cb8SMadhusudhan Chikkature reg |= dto << DTO_SHIFT; 699a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, reg); 700a45c6cb8SMadhusudhan Chikkature } 701a45c6cb8SMadhusudhan Chikkature 702a45c6cb8SMadhusudhan Chikkature /* 703a45c6cb8SMadhusudhan Chikkature * Configure block length for MMC/SD cards and initiate the transfer. 704a45c6cb8SMadhusudhan Chikkature */ 705a45c6cb8SMadhusudhan Chikkature static int 706a45c6cb8SMadhusudhan Chikkature mmc_omap_prepare_data(struct mmc_omap_host *host, struct mmc_request *req) 707a45c6cb8SMadhusudhan Chikkature { 708a45c6cb8SMadhusudhan Chikkature int ret; 709a45c6cb8SMadhusudhan Chikkature host->data = req->data; 710a45c6cb8SMadhusudhan Chikkature 711a45c6cb8SMadhusudhan Chikkature if (req->data == NULL) { 712a45c6cb8SMadhusudhan Chikkature host->datadir = OMAP_MMC_DATADIR_NONE; 713a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, BLK, 0); 714a45c6cb8SMadhusudhan Chikkature return 0; 715a45c6cb8SMadhusudhan Chikkature } 716a45c6cb8SMadhusudhan Chikkature 717a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, BLK, (req->data->blksz) 718a45c6cb8SMadhusudhan Chikkature | (req->data->blocks << 16)); 719a45c6cb8SMadhusudhan Chikkature set_data_timeout(host, req); 720a45c6cb8SMadhusudhan Chikkature 721a45c6cb8SMadhusudhan Chikkature host->datadir = (req->data->flags & MMC_DATA_WRITE) ? 722a45c6cb8SMadhusudhan Chikkature OMAP_MMC_DATADIR_WRITE : OMAP_MMC_DATADIR_READ; 723a45c6cb8SMadhusudhan Chikkature 724a45c6cb8SMadhusudhan Chikkature if (host->use_dma) { 725a45c6cb8SMadhusudhan Chikkature ret = mmc_omap_start_dma_transfer(host, req); 726a45c6cb8SMadhusudhan Chikkature if (ret != 0) { 727a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "MMC start dma failure\n"); 728a45c6cb8SMadhusudhan Chikkature return ret; 729a45c6cb8SMadhusudhan Chikkature } 730a45c6cb8SMadhusudhan Chikkature } 731a45c6cb8SMadhusudhan Chikkature return 0; 732a45c6cb8SMadhusudhan Chikkature } 733a45c6cb8SMadhusudhan Chikkature 734a45c6cb8SMadhusudhan Chikkature /* 735a45c6cb8SMadhusudhan Chikkature * Request function. for read/write operation 736a45c6cb8SMadhusudhan Chikkature */ 737a45c6cb8SMadhusudhan Chikkature static void omap_mmc_request(struct mmc_host *mmc, struct mmc_request *req) 738a45c6cb8SMadhusudhan Chikkature { 739a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = mmc_priv(mmc); 740a45c6cb8SMadhusudhan Chikkature 741a45c6cb8SMadhusudhan Chikkature WARN_ON(host->mrq != NULL); 742a45c6cb8SMadhusudhan Chikkature host->mrq = req; 743a45c6cb8SMadhusudhan Chikkature mmc_omap_prepare_data(host, req); 744a45c6cb8SMadhusudhan Chikkature mmc_omap_start_command(host, req->cmd, req->data); 745a45c6cb8SMadhusudhan Chikkature } 746a45c6cb8SMadhusudhan Chikkature 747a45c6cb8SMadhusudhan Chikkature 748a45c6cb8SMadhusudhan Chikkature /* Routine to configure clock values. Exposed API to core */ 749a45c6cb8SMadhusudhan Chikkature static void omap_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 750a45c6cb8SMadhusudhan Chikkature { 751a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = mmc_priv(mmc); 752a45c6cb8SMadhusudhan Chikkature u16 dsor = 0; 753a45c6cb8SMadhusudhan Chikkature unsigned long regval; 754a45c6cb8SMadhusudhan Chikkature unsigned long timeout; 755a45c6cb8SMadhusudhan Chikkature 756a45c6cb8SMadhusudhan Chikkature switch (ios->power_mode) { 757a45c6cb8SMadhusudhan Chikkature case MMC_POWER_OFF: 758a45c6cb8SMadhusudhan Chikkature mmc_slot(host).set_power(host->dev, host->slot_id, 0, 0); 759a45c6cb8SMadhusudhan Chikkature /* 760a45c6cb8SMadhusudhan Chikkature * Reset bus voltage to 3V if it got set to 1.8V earlier. 761a45c6cb8SMadhusudhan Chikkature * REVISIT: If we are able to detect cards after unplugging 762a45c6cb8SMadhusudhan Chikkature * a 1.8V card, this code should not be needed. 763a45c6cb8SMadhusudhan Chikkature */ 764a45c6cb8SMadhusudhan Chikkature if (!(OMAP_HSMMC_READ(host->base, HCTL) & SDVSDET)) { 765a45c6cb8SMadhusudhan Chikkature int vdd = fls(host->mmc->ocr_avail) - 1; 766a45c6cb8SMadhusudhan Chikkature if (omap_mmc_switch_opcond(host, vdd) != 0) 767a45c6cb8SMadhusudhan Chikkature host->mmc->ios.vdd = vdd; 768a45c6cb8SMadhusudhan Chikkature } 769a45c6cb8SMadhusudhan Chikkature break; 770a45c6cb8SMadhusudhan Chikkature case MMC_POWER_UP: 771a45c6cb8SMadhusudhan Chikkature mmc_slot(host).set_power(host->dev, host->slot_id, 1, ios->vdd); 772a45c6cb8SMadhusudhan Chikkature break; 773a45c6cb8SMadhusudhan Chikkature } 774a45c6cb8SMadhusudhan Chikkature 775a45c6cb8SMadhusudhan Chikkature switch (mmc->ios.bus_width) { 776a45c6cb8SMadhusudhan Chikkature case MMC_BUS_WIDTH_4: 777a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 778a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) | FOUR_BIT); 779a45c6cb8SMadhusudhan Chikkature break; 780a45c6cb8SMadhusudhan Chikkature case MMC_BUS_WIDTH_1: 781a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 782a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) & ~FOUR_BIT); 783a45c6cb8SMadhusudhan Chikkature break; 784a45c6cb8SMadhusudhan Chikkature } 785a45c6cb8SMadhusudhan Chikkature 786a45c6cb8SMadhusudhan Chikkature if (host->id == OMAP_MMC1_DEVID) { 787a45c6cb8SMadhusudhan Chikkature /* Only MMC1 can operate at 3V/1.8V */ 788a45c6cb8SMadhusudhan Chikkature if ((OMAP_HSMMC_READ(host->base, HCTL) & SDVSDET) && 789a45c6cb8SMadhusudhan Chikkature (ios->vdd == DUAL_VOLT_OCR_BIT)) { 790a45c6cb8SMadhusudhan Chikkature /* 791a45c6cb8SMadhusudhan Chikkature * The mmc_select_voltage fn of the core does 792a45c6cb8SMadhusudhan Chikkature * not seem to set the power_mode to 793a45c6cb8SMadhusudhan Chikkature * MMC_POWER_UP upon recalculating the voltage. 794a45c6cb8SMadhusudhan Chikkature * vdd 1.8v. 795a45c6cb8SMadhusudhan Chikkature */ 796a45c6cb8SMadhusudhan Chikkature if (omap_mmc_switch_opcond(host, ios->vdd) != 0) 797a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 798a45c6cb8SMadhusudhan Chikkature "Switch operation failed\n"); 799a45c6cb8SMadhusudhan Chikkature } 800a45c6cb8SMadhusudhan Chikkature } 801a45c6cb8SMadhusudhan Chikkature 802a45c6cb8SMadhusudhan Chikkature if (ios->clock) { 803a45c6cb8SMadhusudhan Chikkature dsor = OMAP_MMC_MASTER_CLOCK / ios->clock; 804a45c6cb8SMadhusudhan Chikkature if (dsor < 1) 805a45c6cb8SMadhusudhan Chikkature dsor = 1; 806a45c6cb8SMadhusudhan Chikkature 807a45c6cb8SMadhusudhan Chikkature if (OMAP_MMC_MASTER_CLOCK / dsor > ios->clock) 808a45c6cb8SMadhusudhan Chikkature dsor++; 809a45c6cb8SMadhusudhan Chikkature 810a45c6cb8SMadhusudhan Chikkature if (dsor > 250) 811a45c6cb8SMadhusudhan Chikkature dsor = 250; 812a45c6cb8SMadhusudhan Chikkature } 813a45c6cb8SMadhusudhan Chikkature omap_mmc_stop_clock(host); 814a45c6cb8SMadhusudhan Chikkature regval = OMAP_HSMMC_READ(host->base, SYSCTL); 815a45c6cb8SMadhusudhan Chikkature regval = regval & ~(CLKD_MASK); 816a45c6cb8SMadhusudhan Chikkature regval = regval | (dsor << 6) | (DTO << 16); 817a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, regval); 818a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, 819a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, SYSCTL) | ICE); 820a45c6cb8SMadhusudhan Chikkature 821a45c6cb8SMadhusudhan Chikkature /* Wait till the ICS bit is set */ 822a45c6cb8SMadhusudhan Chikkature timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 823a45c6cb8SMadhusudhan Chikkature while ((OMAP_HSMMC_READ(host->base, SYSCTL) & ICS) != 0x2 824a45c6cb8SMadhusudhan Chikkature && time_before(jiffies, timeout)) 825a45c6cb8SMadhusudhan Chikkature msleep(1); 826a45c6cb8SMadhusudhan Chikkature 827a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, 828a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, SYSCTL) | CEN); 829a45c6cb8SMadhusudhan Chikkature 830a45c6cb8SMadhusudhan Chikkature if (ios->power_mode == MMC_POWER_ON) 831a45c6cb8SMadhusudhan Chikkature send_init_stream(host); 832a45c6cb8SMadhusudhan Chikkature 833a45c6cb8SMadhusudhan Chikkature if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN) 834a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CON, 835a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, CON) | OD); 836a45c6cb8SMadhusudhan Chikkature } 837a45c6cb8SMadhusudhan Chikkature 838a45c6cb8SMadhusudhan Chikkature static int omap_hsmmc_get_cd(struct mmc_host *mmc) 839a45c6cb8SMadhusudhan Chikkature { 840a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = mmc_priv(mmc); 841a45c6cb8SMadhusudhan Chikkature struct omap_mmc_platform_data *pdata = host->pdata; 842a45c6cb8SMadhusudhan Chikkature 843a45c6cb8SMadhusudhan Chikkature if (!pdata->slots[0].card_detect) 844a45c6cb8SMadhusudhan Chikkature return -ENOSYS; 845a45c6cb8SMadhusudhan Chikkature return pdata->slots[0].card_detect(pdata->slots[0].card_detect_irq); 846a45c6cb8SMadhusudhan Chikkature } 847a45c6cb8SMadhusudhan Chikkature 848a45c6cb8SMadhusudhan Chikkature static int omap_hsmmc_get_ro(struct mmc_host *mmc) 849a45c6cb8SMadhusudhan Chikkature { 850a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = mmc_priv(mmc); 851a45c6cb8SMadhusudhan Chikkature struct omap_mmc_platform_data *pdata = host->pdata; 852a45c6cb8SMadhusudhan Chikkature 853a45c6cb8SMadhusudhan Chikkature if (!pdata->slots[0].get_ro) 854a45c6cb8SMadhusudhan Chikkature return -ENOSYS; 855a45c6cb8SMadhusudhan Chikkature return pdata->slots[0].get_ro(host->dev, 0); 856a45c6cb8SMadhusudhan Chikkature } 857a45c6cb8SMadhusudhan Chikkature 858a45c6cb8SMadhusudhan Chikkature static struct mmc_host_ops mmc_omap_ops = { 859a45c6cb8SMadhusudhan Chikkature .request = omap_mmc_request, 860a45c6cb8SMadhusudhan Chikkature .set_ios = omap_mmc_set_ios, 861a45c6cb8SMadhusudhan Chikkature .get_cd = omap_hsmmc_get_cd, 862a45c6cb8SMadhusudhan Chikkature .get_ro = omap_hsmmc_get_ro, 863a45c6cb8SMadhusudhan Chikkature /* NYET -- enable_sdio_irq */ 864a45c6cb8SMadhusudhan Chikkature }; 865a45c6cb8SMadhusudhan Chikkature 866a45c6cb8SMadhusudhan Chikkature static int __init omap_mmc_probe(struct platform_device *pdev) 867a45c6cb8SMadhusudhan Chikkature { 868a45c6cb8SMadhusudhan Chikkature struct omap_mmc_platform_data *pdata = pdev->dev.platform_data; 869a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc; 870a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = NULL; 871a45c6cb8SMadhusudhan Chikkature struct resource *res; 872a45c6cb8SMadhusudhan Chikkature int ret = 0, irq; 873a45c6cb8SMadhusudhan Chikkature u32 hctl, capa; 874a45c6cb8SMadhusudhan Chikkature 875a45c6cb8SMadhusudhan Chikkature if (pdata == NULL) { 876a45c6cb8SMadhusudhan Chikkature dev_err(&pdev->dev, "Platform Data is missing\n"); 877a45c6cb8SMadhusudhan Chikkature return -ENXIO; 878a45c6cb8SMadhusudhan Chikkature } 879a45c6cb8SMadhusudhan Chikkature 880a45c6cb8SMadhusudhan Chikkature if (pdata->nr_slots == 0) { 881a45c6cb8SMadhusudhan Chikkature dev_err(&pdev->dev, "No Slots\n"); 882a45c6cb8SMadhusudhan Chikkature return -ENXIO; 883a45c6cb8SMadhusudhan Chikkature } 884a45c6cb8SMadhusudhan Chikkature 885a45c6cb8SMadhusudhan Chikkature res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 886a45c6cb8SMadhusudhan Chikkature irq = platform_get_irq(pdev, 0); 887a45c6cb8SMadhusudhan Chikkature if (res == NULL || irq < 0) 888a45c6cb8SMadhusudhan Chikkature return -ENXIO; 889a45c6cb8SMadhusudhan Chikkature 890a45c6cb8SMadhusudhan Chikkature res = request_mem_region(res->start, res->end - res->start + 1, 891a45c6cb8SMadhusudhan Chikkature pdev->name); 892a45c6cb8SMadhusudhan Chikkature if (res == NULL) 893a45c6cb8SMadhusudhan Chikkature return -EBUSY; 894a45c6cb8SMadhusudhan Chikkature 895a45c6cb8SMadhusudhan Chikkature mmc = mmc_alloc_host(sizeof(struct mmc_omap_host), &pdev->dev); 896a45c6cb8SMadhusudhan Chikkature if (!mmc) { 897a45c6cb8SMadhusudhan Chikkature ret = -ENOMEM; 898a45c6cb8SMadhusudhan Chikkature goto err; 899a45c6cb8SMadhusudhan Chikkature } 900a45c6cb8SMadhusudhan Chikkature 901a45c6cb8SMadhusudhan Chikkature host = mmc_priv(mmc); 902a45c6cb8SMadhusudhan Chikkature host->mmc = mmc; 903a45c6cb8SMadhusudhan Chikkature host->pdata = pdata; 904a45c6cb8SMadhusudhan Chikkature host->dev = &pdev->dev; 905a45c6cb8SMadhusudhan Chikkature host->use_dma = 1; 906a45c6cb8SMadhusudhan Chikkature host->dev->dma_mask = &pdata->dma_mask; 907a45c6cb8SMadhusudhan Chikkature host->dma_ch = -1; 908a45c6cb8SMadhusudhan Chikkature host->irq = irq; 909a45c6cb8SMadhusudhan Chikkature host->id = pdev->id; 910a45c6cb8SMadhusudhan Chikkature host->slot_id = 0; 911a45c6cb8SMadhusudhan Chikkature host->mapbase = res->start; 912a45c6cb8SMadhusudhan Chikkature host->base = ioremap(host->mapbase, SZ_4K); 913a45c6cb8SMadhusudhan Chikkature 914a45c6cb8SMadhusudhan Chikkature platform_set_drvdata(pdev, host); 915a45c6cb8SMadhusudhan Chikkature INIT_WORK(&host->mmc_carddetect_work, mmc_omap_detect); 916a45c6cb8SMadhusudhan Chikkature 917a45c6cb8SMadhusudhan Chikkature mmc->ops = &mmc_omap_ops; 918a45c6cb8SMadhusudhan Chikkature mmc->f_min = 400000; 919a45c6cb8SMadhusudhan Chikkature mmc->f_max = 52000000; 920a45c6cb8SMadhusudhan Chikkature 921a45c6cb8SMadhusudhan Chikkature sema_init(&host->sem, 1); 922a45c6cb8SMadhusudhan Chikkature 923a45c6cb8SMadhusudhan Chikkature host->iclk = clk_get(&pdev->dev, "mmchs_ick"); 924a45c6cb8SMadhusudhan Chikkature if (IS_ERR(host->iclk)) { 925a45c6cb8SMadhusudhan Chikkature ret = PTR_ERR(host->iclk); 926a45c6cb8SMadhusudhan Chikkature host->iclk = NULL; 927a45c6cb8SMadhusudhan Chikkature goto err1; 928a45c6cb8SMadhusudhan Chikkature } 929a45c6cb8SMadhusudhan Chikkature host->fclk = clk_get(&pdev->dev, "mmchs_fck"); 930a45c6cb8SMadhusudhan Chikkature if (IS_ERR(host->fclk)) { 931a45c6cb8SMadhusudhan Chikkature ret = PTR_ERR(host->fclk); 932a45c6cb8SMadhusudhan Chikkature host->fclk = NULL; 933a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 934a45c6cb8SMadhusudhan Chikkature goto err1; 935a45c6cb8SMadhusudhan Chikkature } 936a45c6cb8SMadhusudhan Chikkature 937a45c6cb8SMadhusudhan Chikkature if (clk_enable(host->fclk) != 0) { 938a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 939a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 940a45c6cb8SMadhusudhan Chikkature goto err1; 941a45c6cb8SMadhusudhan Chikkature } 942a45c6cb8SMadhusudhan Chikkature 943a45c6cb8SMadhusudhan Chikkature if (clk_enable(host->iclk) != 0) { 944a45c6cb8SMadhusudhan Chikkature clk_disable(host->fclk); 945a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 946a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 947a45c6cb8SMadhusudhan Chikkature goto err1; 948a45c6cb8SMadhusudhan Chikkature } 949a45c6cb8SMadhusudhan Chikkature 950a45c6cb8SMadhusudhan Chikkature host->dbclk = clk_get(&pdev->dev, "mmchsdb_fck"); 951a45c6cb8SMadhusudhan Chikkature /* 952a45c6cb8SMadhusudhan Chikkature * MMC can still work without debounce clock. 953a45c6cb8SMadhusudhan Chikkature */ 954a45c6cb8SMadhusudhan Chikkature if (IS_ERR(host->dbclk)) 955a45c6cb8SMadhusudhan Chikkature dev_warn(mmc_dev(host->mmc), "Failed to get debounce clock\n"); 956a45c6cb8SMadhusudhan Chikkature else 957a45c6cb8SMadhusudhan Chikkature if (clk_enable(host->dbclk) != 0) 958a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Enabling debounce" 959a45c6cb8SMadhusudhan Chikkature " clk failed\n"); 960a45c6cb8SMadhusudhan Chikkature else 961a45c6cb8SMadhusudhan Chikkature host->dbclk_enabled = 1; 962a45c6cb8SMadhusudhan Chikkature 963a45c6cb8SMadhusudhan Chikkature #ifdef CONFIG_MMC_BLOCK_BOUNCE 964a45c6cb8SMadhusudhan Chikkature mmc->max_phys_segs = 1; 965a45c6cb8SMadhusudhan Chikkature mmc->max_hw_segs = 1; 966a45c6cb8SMadhusudhan Chikkature #endif 967a45c6cb8SMadhusudhan Chikkature mmc->max_blk_size = 512; /* Block Length at max can be 1024 */ 968a45c6cb8SMadhusudhan Chikkature mmc->max_blk_count = 0xFFFF; /* No. of Blocks is 16 bits */ 969a45c6cb8SMadhusudhan Chikkature mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; 970a45c6cb8SMadhusudhan Chikkature mmc->max_seg_size = mmc->max_req_size; 971a45c6cb8SMadhusudhan Chikkature 972a45c6cb8SMadhusudhan Chikkature mmc->ocr_avail = mmc_slot(host).ocr_mask; 973a45c6cb8SMadhusudhan Chikkature mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED; 974a45c6cb8SMadhusudhan Chikkature 975a45c6cb8SMadhusudhan Chikkature if (pdata->slots[host->slot_id].wires >= 4) 976a45c6cb8SMadhusudhan Chikkature mmc->caps |= MMC_CAP_4_BIT_DATA; 977a45c6cb8SMadhusudhan Chikkature 978a45c6cb8SMadhusudhan Chikkature /* Only MMC1 supports 3.0V */ 979a45c6cb8SMadhusudhan Chikkature if (host->id == OMAP_MMC1_DEVID) { 980a45c6cb8SMadhusudhan Chikkature hctl = SDVS30; 981a45c6cb8SMadhusudhan Chikkature capa = VS30 | VS18; 982a45c6cb8SMadhusudhan Chikkature } else { 983a45c6cb8SMadhusudhan Chikkature hctl = SDVS18; 984a45c6cb8SMadhusudhan Chikkature capa = VS18; 985a45c6cb8SMadhusudhan Chikkature } 986a45c6cb8SMadhusudhan Chikkature 987a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 988a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) | hctl); 989a45c6cb8SMadhusudhan Chikkature 990a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CAPA, 991a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, CAPA) | capa); 992a45c6cb8SMadhusudhan Chikkature 993a45c6cb8SMadhusudhan Chikkature /* Set the controller to AUTO IDLE mode */ 994a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCONFIG, 995a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, SYSCONFIG) | AUTOIDLE); 996a45c6cb8SMadhusudhan Chikkature 997a45c6cb8SMadhusudhan Chikkature /* Set SD bus power bit */ 998a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 999a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) | SDBP); 1000a45c6cb8SMadhusudhan Chikkature 1001a45c6cb8SMadhusudhan Chikkature /* Request IRQ for MMC operations */ 1002a45c6cb8SMadhusudhan Chikkature ret = request_irq(host->irq, mmc_omap_irq, IRQF_DISABLED, 1003a45c6cb8SMadhusudhan Chikkature mmc_hostname(mmc), host); 1004a45c6cb8SMadhusudhan Chikkature if (ret) { 1005a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Unable to grab HSMMC IRQ\n"); 1006a45c6cb8SMadhusudhan Chikkature goto err_irq; 1007a45c6cb8SMadhusudhan Chikkature } 1008a45c6cb8SMadhusudhan Chikkature 1009a45c6cb8SMadhusudhan Chikkature if (pdata->init != NULL) { 1010a45c6cb8SMadhusudhan Chikkature if (pdata->init(&pdev->dev) != 0) { 1011a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1012a45c6cb8SMadhusudhan Chikkature "Unable to configure MMC IRQs\n"); 1013a45c6cb8SMadhusudhan Chikkature goto err_irq_cd_init; 1014a45c6cb8SMadhusudhan Chikkature } 1015a45c6cb8SMadhusudhan Chikkature } 1016a45c6cb8SMadhusudhan Chikkature 1017a45c6cb8SMadhusudhan Chikkature /* Request IRQ for card detect */ 1018a45c6cb8SMadhusudhan Chikkature if ((mmc_slot(host).card_detect_irq) && (mmc_slot(host).card_detect)) { 1019a45c6cb8SMadhusudhan Chikkature ret = request_irq(mmc_slot(host).card_detect_irq, 1020a45c6cb8SMadhusudhan Chikkature omap_mmc_cd_handler, 1021a45c6cb8SMadhusudhan Chikkature IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING 1022a45c6cb8SMadhusudhan Chikkature | IRQF_DISABLED, 1023a45c6cb8SMadhusudhan Chikkature mmc_hostname(mmc), host); 1024a45c6cb8SMadhusudhan Chikkature if (ret) { 1025a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1026a45c6cb8SMadhusudhan Chikkature "Unable to grab MMC CD IRQ\n"); 1027a45c6cb8SMadhusudhan Chikkature goto err_irq_cd; 1028a45c6cb8SMadhusudhan Chikkature } 1029a45c6cb8SMadhusudhan Chikkature } 1030a45c6cb8SMadhusudhan Chikkature 1031a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK); 1032a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK); 1033a45c6cb8SMadhusudhan Chikkature 1034a45c6cb8SMadhusudhan Chikkature mmc_add_host(mmc); 1035a45c6cb8SMadhusudhan Chikkature 1036a45c6cb8SMadhusudhan Chikkature if (host->pdata->slots[host->slot_id].name != NULL) { 1037a45c6cb8SMadhusudhan Chikkature ret = device_create_file(&mmc->class_dev, &dev_attr_slot_name); 1038a45c6cb8SMadhusudhan Chikkature if (ret < 0) 1039a45c6cb8SMadhusudhan Chikkature goto err_slot_name; 1040a45c6cb8SMadhusudhan Chikkature } 1041a45c6cb8SMadhusudhan Chikkature if (mmc_slot(host).card_detect_irq && mmc_slot(host).card_detect && 1042a45c6cb8SMadhusudhan Chikkature host->pdata->slots[host->slot_id].get_cover_state) { 1043a45c6cb8SMadhusudhan Chikkature ret = device_create_file(&mmc->class_dev, 1044a45c6cb8SMadhusudhan Chikkature &dev_attr_cover_switch); 1045a45c6cb8SMadhusudhan Chikkature if (ret < 0) 1046a45c6cb8SMadhusudhan Chikkature goto err_cover_switch; 1047a45c6cb8SMadhusudhan Chikkature } 1048a45c6cb8SMadhusudhan Chikkature 1049a45c6cb8SMadhusudhan Chikkature return 0; 1050a45c6cb8SMadhusudhan Chikkature 1051a45c6cb8SMadhusudhan Chikkature err_cover_switch: 1052a45c6cb8SMadhusudhan Chikkature device_remove_file(&mmc->class_dev, &dev_attr_cover_switch); 1053a45c6cb8SMadhusudhan Chikkature err_slot_name: 1054a45c6cb8SMadhusudhan Chikkature mmc_remove_host(mmc); 1055a45c6cb8SMadhusudhan Chikkature err_irq_cd: 1056a45c6cb8SMadhusudhan Chikkature free_irq(mmc_slot(host).card_detect_irq, host); 1057a45c6cb8SMadhusudhan Chikkature err_irq_cd_init: 1058a45c6cb8SMadhusudhan Chikkature free_irq(host->irq, host); 1059a45c6cb8SMadhusudhan Chikkature err_irq: 1060a45c6cb8SMadhusudhan Chikkature clk_disable(host->fclk); 1061a45c6cb8SMadhusudhan Chikkature clk_disable(host->iclk); 1062a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 1063a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 1064a45c6cb8SMadhusudhan Chikkature if (host->dbclk_enabled) { 1065a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 1066a45c6cb8SMadhusudhan Chikkature clk_put(host->dbclk); 1067a45c6cb8SMadhusudhan Chikkature } 1068a45c6cb8SMadhusudhan Chikkature 1069a45c6cb8SMadhusudhan Chikkature err1: 1070a45c6cb8SMadhusudhan Chikkature iounmap(host->base); 1071a45c6cb8SMadhusudhan Chikkature err: 1072a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Probe Failed\n"); 1073a45c6cb8SMadhusudhan Chikkature release_mem_region(res->start, res->end - res->start + 1); 1074a45c6cb8SMadhusudhan Chikkature if (host) 1075a45c6cb8SMadhusudhan Chikkature mmc_free_host(mmc); 1076a45c6cb8SMadhusudhan Chikkature return ret; 1077a45c6cb8SMadhusudhan Chikkature } 1078a45c6cb8SMadhusudhan Chikkature 1079a45c6cb8SMadhusudhan Chikkature static int omap_mmc_remove(struct platform_device *pdev) 1080a45c6cb8SMadhusudhan Chikkature { 1081a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = platform_get_drvdata(pdev); 1082a45c6cb8SMadhusudhan Chikkature struct resource *res; 1083a45c6cb8SMadhusudhan Chikkature 1084a45c6cb8SMadhusudhan Chikkature if (host) { 1085a45c6cb8SMadhusudhan Chikkature mmc_remove_host(host->mmc); 1086a45c6cb8SMadhusudhan Chikkature if (host->pdata->cleanup) 1087a45c6cb8SMadhusudhan Chikkature host->pdata->cleanup(&pdev->dev); 1088a45c6cb8SMadhusudhan Chikkature free_irq(host->irq, host); 1089a45c6cb8SMadhusudhan Chikkature if (mmc_slot(host).card_detect_irq) 1090a45c6cb8SMadhusudhan Chikkature free_irq(mmc_slot(host).card_detect_irq, host); 1091a45c6cb8SMadhusudhan Chikkature flush_scheduled_work(); 1092a45c6cb8SMadhusudhan Chikkature 1093a45c6cb8SMadhusudhan Chikkature clk_disable(host->fclk); 1094a45c6cb8SMadhusudhan Chikkature clk_disable(host->iclk); 1095a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 1096a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 1097a45c6cb8SMadhusudhan Chikkature if (host->dbclk_enabled) { 1098a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 1099a45c6cb8SMadhusudhan Chikkature clk_put(host->dbclk); 1100a45c6cb8SMadhusudhan Chikkature } 1101a45c6cb8SMadhusudhan Chikkature 1102a45c6cb8SMadhusudhan Chikkature mmc_free_host(host->mmc); 1103a45c6cb8SMadhusudhan Chikkature iounmap(host->base); 1104a45c6cb8SMadhusudhan Chikkature } 1105a45c6cb8SMadhusudhan Chikkature 1106a45c6cb8SMadhusudhan Chikkature res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1107a45c6cb8SMadhusudhan Chikkature if (res) 1108a45c6cb8SMadhusudhan Chikkature release_mem_region(res->start, res->end - res->start + 1); 1109a45c6cb8SMadhusudhan Chikkature platform_set_drvdata(pdev, NULL); 1110a45c6cb8SMadhusudhan Chikkature 1111a45c6cb8SMadhusudhan Chikkature return 0; 1112a45c6cb8SMadhusudhan Chikkature } 1113a45c6cb8SMadhusudhan Chikkature 1114a45c6cb8SMadhusudhan Chikkature #ifdef CONFIG_PM 1115a45c6cb8SMadhusudhan Chikkature static int omap_mmc_suspend(struct platform_device *pdev, pm_message_t state) 1116a45c6cb8SMadhusudhan Chikkature { 1117a45c6cb8SMadhusudhan Chikkature int ret = 0; 1118a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = platform_get_drvdata(pdev); 1119a45c6cb8SMadhusudhan Chikkature 1120a45c6cb8SMadhusudhan Chikkature if (host && host->suspended) 1121a45c6cb8SMadhusudhan Chikkature return 0; 1122a45c6cb8SMadhusudhan Chikkature 1123a45c6cb8SMadhusudhan Chikkature if (host) { 1124a45c6cb8SMadhusudhan Chikkature ret = mmc_suspend_host(host->mmc, state); 1125a45c6cb8SMadhusudhan Chikkature if (ret == 0) { 1126a45c6cb8SMadhusudhan Chikkature host->suspended = 1; 1127a45c6cb8SMadhusudhan Chikkature 1128a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, ISE, 0); 1129a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, IE, 0); 1130a45c6cb8SMadhusudhan Chikkature 1131a45c6cb8SMadhusudhan Chikkature if (host->pdata->suspend) { 1132a45c6cb8SMadhusudhan Chikkature ret = host->pdata->suspend(&pdev->dev, 1133a45c6cb8SMadhusudhan Chikkature host->slot_id); 1134a45c6cb8SMadhusudhan Chikkature if (ret) 1135a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1136a45c6cb8SMadhusudhan Chikkature "Unable to handle MMC board" 1137a45c6cb8SMadhusudhan Chikkature " level suspend\n"); 1138a45c6cb8SMadhusudhan Chikkature } 1139a45c6cb8SMadhusudhan Chikkature 1140a45c6cb8SMadhusudhan Chikkature if (!(OMAP_HSMMC_READ(host->base, HCTL) & SDVSDET)) { 1141a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 1142a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) 1143a45c6cb8SMadhusudhan Chikkature & SDVSCLR); 1144a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 1145a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) 1146a45c6cb8SMadhusudhan Chikkature | SDVS30); 1147a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 1148a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) 1149a45c6cb8SMadhusudhan Chikkature | SDBP); 1150a45c6cb8SMadhusudhan Chikkature } 1151a45c6cb8SMadhusudhan Chikkature 1152a45c6cb8SMadhusudhan Chikkature clk_disable(host->fclk); 1153a45c6cb8SMadhusudhan Chikkature clk_disable(host->iclk); 1154a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 1155a45c6cb8SMadhusudhan Chikkature } 1156a45c6cb8SMadhusudhan Chikkature 1157a45c6cb8SMadhusudhan Chikkature } 1158a45c6cb8SMadhusudhan Chikkature return ret; 1159a45c6cb8SMadhusudhan Chikkature } 1160a45c6cb8SMadhusudhan Chikkature 1161a45c6cb8SMadhusudhan Chikkature /* Routine to resume the MMC device */ 1162a45c6cb8SMadhusudhan Chikkature static int omap_mmc_resume(struct platform_device *pdev) 1163a45c6cb8SMadhusudhan Chikkature { 1164a45c6cb8SMadhusudhan Chikkature int ret = 0; 1165a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = platform_get_drvdata(pdev); 1166a45c6cb8SMadhusudhan Chikkature 1167a45c6cb8SMadhusudhan Chikkature if (host && !host->suspended) 1168a45c6cb8SMadhusudhan Chikkature return 0; 1169a45c6cb8SMadhusudhan Chikkature 1170a45c6cb8SMadhusudhan Chikkature if (host) { 1171a45c6cb8SMadhusudhan Chikkature 1172a45c6cb8SMadhusudhan Chikkature ret = clk_enable(host->fclk); 1173a45c6cb8SMadhusudhan Chikkature if (ret) 1174a45c6cb8SMadhusudhan Chikkature goto clk_en_err; 1175a45c6cb8SMadhusudhan Chikkature 1176a45c6cb8SMadhusudhan Chikkature ret = clk_enable(host->iclk); 1177a45c6cb8SMadhusudhan Chikkature if (ret) { 1178a45c6cb8SMadhusudhan Chikkature clk_disable(host->fclk); 1179a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 1180a45c6cb8SMadhusudhan Chikkature goto clk_en_err; 1181a45c6cb8SMadhusudhan Chikkature } 1182a45c6cb8SMadhusudhan Chikkature 1183a45c6cb8SMadhusudhan Chikkature if (clk_enable(host->dbclk) != 0) 1184a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1185a45c6cb8SMadhusudhan Chikkature "Enabling debounce clk failed\n"); 1186a45c6cb8SMadhusudhan Chikkature 1187a45c6cb8SMadhusudhan Chikkature if (host->pdata->resume) { 1188a45c6cb8SMadhusudhan Chikkature ret = host->pdata->resume(&pdev->dev, host->slot_id); 1189a45c6cb8SMadhusudhan Chikkature if (ret) 1190a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1191a45c6cb8SMadhusudhan Chikkature "Unmask interrupt failed\n"); 1192a45c6cb8SMadhusudhan Chikkature } 1193a45c6cb8SMadhusudhan Chikkature 1194a45c6cb8SMadhusudhan Chikkature /* Notify the core to resume the host */ 1195a45c6cb8SMadhusudhan Chikkature ret = mmc_resume_host(host->mmc); 1196a45c6cb8SMadhusudhan Chikkature if (ret == 0) 1197a45c6cb8SMadhusudhan Chikkature host->suspended = 0; 1198a45c6cb8SMadhusudhan Chikkature } 1199a45c6cb8SMadhusudhan Chikkature 1200a45c6cb8SMadhusudhan Chikkature return ret; 1201a45c6cb8SMadhusudhan Chikkature 1202a45c6cb8SMadhusudhan Chikkature clk_en_err: 1203a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1204a45c6cb8SMadhusudhan Chikkature "Failed to enable MMC clocks during resume\n"); 1205a45c6cb8SMadhusudhan Chikkature return ret; 1206a45c6cb8SMadhusudhan Chikkature } 1207a45c6cb8SMadhusudhan Chikkature 1208a45c6cb8SMadhusudhan Chikkature #else 1209a45c6cb8SMadhusudhan Chikkature #define omap_mmc_suspend NULL 1210a45c6cb8SMadhusudhan Chikkature #define omap_mmc_resume NULL 1211a45c6cb8SMadhusudhan Chikkature #endif 1212a45c6cb8SMadhusudhan Chikkature 1213a45c6cb8SMadhusudhan Chikkature static struct platform_driver omap_mmc_driver = { 1214a45c6cb8SMadhusudhan Chikkature .probe = omap_mmc_probe, 1215a45c6cb8SMadhusudhan Chikkature .remove = omap_mmc_remove, 1216a45c6cb8SMadhusudhan Chikkature .suspend = omap_mmc_suspend, 1217a45c6cb8SMadhusudhan Chikkature .resume = omap_mmc_resume, 1218a45c6cb8SMadhusudhan Chikkature .driver = { 1219a45c6cb8SMadhusudhan Chikkature .name = DRIVER_NAME, 1220a45c6cb8SMadhusudhan Chikkature .owner = THIS_MODULE, 1221a45c6cb8SMadhusudhan Chikkature }, 1222a45c6cb8SMadhusudhan Chikkature }; 1223a45c6cb8SMadhusudhan Chikkature 1224a45c6cb8SMadhusudhan Chikkature static int __init omap_mmc_init(void) 1225a45c6cb8SMadhusudhan Chikkature { 1226a45c6cb8SMadhusudhan Chikkature /* Register the MMC driver */ 1227a45c6cb8SMadhusudhan Chikkature return platform_driver_register(&omap_mmc_driver); 1228a45c6cb8SMadhusudhan Chikkature } 1229a45c6cb8SMadhusudhan Chikkature 1230a45c6cb8SMadhusudhan Chikkature static void __exit omap_mmc_cleanup(void) 1231a45c6cb8SMadhusudhan Chikkature { 1232a45c6cb8SMadhusudhan Chikkature /* Unregister MMC driver */ 1233a45c6cb8SMadhusudhan Chikkature platform_driver_unregister(&omap_mmc_driver); 1234a45c6cb8SMadhusudhan Chikkature } 1235a45c6cb8SMadhusudhan Chikkature 1236a45c6cb8SMadhusudhan Chikkature module_init(omap_mmc_init); 1237a45c6cb8SMadhusudhan Chikkature module_exit(omap_mmc_cleanup); 1238a45c6cb8SMadhusudhan Chikkature 1239a45c6cb8SMadhusudhan Chikkature MODULE_DESCRIPTION("OMAP High Speed Multimedia Card driver"); 1240a45c6cb8SMadhusudhan Chikkature MODULE_LICENSE("GPL"); 1241a45c6cb8SMadhusudhan Chikkature MODULE_ALIAS("platform:" DRIVER_NAME); 1242a45c6cb8SMadhusudhan Chikkature MODULE_AUTHOR("Texas Instruments Inc"); 1243