1a45c6cb8SMadhusudhan Chikkature /* 2a45c6cb8SMadhusudhan Chikkature * drivers/mmc/host/omap_hsmmc.c 3a45c6cb8SMadhusudhan Chikkature * 4a45c6cb8SMadhusudhan Chikkature * Driver for OMAP2430/3430 MMC controller. 5a45c6cb8SMadhusudhan Chikkature * 6a45c6cb8SMadhusudhan Chikkature * Copyright (C) 2007 Texas Instruments. 7a45c6cb8SMadhusudhan Chikkature * 8a45c6cb8SMadhusudhan Chikkature * Authors: 9a45c6cb8SMadhusudhan Chikkature * Syed Mohammed Khasim <x0khasim@ti.com> 10a45c6cb8SMadhusudhan Chikkature * Madhusudhan <madhu.cr@ti.com> 11a45c6cb8SMadhusudhan Chikkature * Mohit Jalori <mjalori@ti.com> 12a45c6cb8SMadhusudhan Chikkature * 13a45c6cb8SMadhusudhan Chikkature * This file is licensed under the terms of the GNU General Public License 14a45c6cb8SMadhusudhan Chikkature * version 2. This program is licensed "as is" without any warranty of any 15a45c6cb8SMadhusudhan Chikkature * kind, whether express or implied. 16a45c6cb8SMadhusudhan Chikkature */ 17a45c6cb8SMadhusudhan Chikkature 18a45c6cb8SMadhusudhan Chikkature #include <linux/module.h> 19a45c6cb8SMadhusudhan Chikkature #include <linux/init.h> 20ac330f44SAndy Shevchenko #include <linux/kernel.h> 21d900f712SDenis Karpov #include <linux/debugfs.h> 22d900f712SDenis Karpov #include <linux/seq_file.h> 23a45c6cb8SMadhusudhan Chikkature #include <linux/interrupt.h> 24a45c6cb8SMadhusudhan Chikkature #include <linux/delay.h> 25a45c6cb8SMadhusudhan Chikkature #include <linux/dma-mapping.h> 26a45c6cb8SMadhusudhan Chikkature #include <linux/platform_device.h> 27a45c6cb8SMadhusudhan Chikkature #include <linux/timer.h> 28a45c6cb8SMadhusudhan Chikkature #include <linux/clk.h> 2946856a68SRajendra Nayak #include <linux/of.h> 3046856a68SRajendra Nayak #include <linux/of_gpio.h> 3146856a68SRajendra Nayak #include <linux/of_device.h> 32a45c6cb8SMadhusudhan Chikkature #include <linux/mmc/host.h> 3313189e78SJarkko Lavinen #include <linux/mmc/core.h> 3493caf8e6SAdrian Hunter #include <linux/mmc/mmc.h> 35a45c6cb8SMadhusudhan Chikkature #include <linux/io.h> 36a45c6cb8SMadhusudhan Chikkature #include <linux/semaphore.h> 37db0fefc5SAdrian Hunter #include <linux/gpio.h> 38db0fefc5SAdrian Hunter #include <linux/regulator/consumer.h> 39fa4aa2d4SBalaji T K #include <linux/pm_runtime.h> 40ce491cf8STony Lindgren #include <plat/dma.h> 41a45c6cb8SMadhusudhan Chikkature #include <mach/hardware.h> 42ce491cf8STony Lindgren #include <plat/board.h> 43ce491cf8STony Lindgren #include <plat/mmc.h> 44ce491cf8STony Lindgren #include <plat/cpu.h> 45a45c6cb8SMadhusudhan Chikkature 46a45c6cb8SMadhusudhan Chikkature /* OMAP HSMMC Host Controller Registers */ 47a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_SYSCONFIG 0x0010 4811dd62a7SDenis Karpov #define OMAP_HSMMC_SYSSTATUS 0x0014 49a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_CON 0x002C 50a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_BLK 0x0104 51a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_ARG 0x0108 52a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_CMD 0x010C 53a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP10 0x0110 54a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP32 0x0114 55a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP54 0x0118 56a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP76 0x011C 57a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_DATA 0x0120 58a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_HCTL 0x0128 59a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_SYSCTL 0x012C 60a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_STAT 0x0130 61a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_IE 0x0134 62a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_ISE 0x0138 63a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_CAPA 0x0140 64a45c6cb8SMadhusudhan Chikkature 65a45c6cb8SMadhusudhan Chikkature #define VS18 (1 << 26) 66a45c6cb8SMadhusudhan Chikkature #define VS30 (1 << 25) 67a45c6cb8SMadhusudhan Chikkature #define SDVS18 (0x5 << 9) 68a45c6cb8SMadhusudhan Chikkature #define SDVS30 (0x6 << 9) 69eb250826SDavid Brownell #define SDVS33 (0x7 << 9) 701b331e69SKim Kyuwon #define SDVS_MASK 0x00000E00 71a45c6cb8SMadhusudhan Chikkature #define SDVSCLR 0xFFFFF1FF 72a45c6cb8SMadhusudhan Chikkature #define SDVSDET 0x00000400 73a45c6cb8SMadhusudhan Chikkature #define AUTOIDLE 0x1 74a45c6cb8SMadhusudhan Chikkature #define SDBP (1 << 8) 75a45c6cb8SMadhusudhan Chikkature #define DTO 0xe 76a45c6cb8SMadhusudhan Chikkature #define ICE 0x1 77a45c6cb8SMadhusudhan Chikkature #define ICS 0x2 78a45c6cb8SMadhusudhan Chikkature #define CEN (1 << 2) 79a45c6cb8SMadhusudhan Chikkature #define CLKD_MASK 0x0000FFC0 80a45c6cb8SMadhusudhan Chikkature #define CLKD_SHIFT 6 81a45c6cb8SMadhusudhan Chikkature #define DTO_MASK 0x000F0000 82a45c6cb8SMadhusudhan Chikkature #define DTO_SHIFT 16 83a45c6cb8SMadhusudhan Chikkature #define INT_EN_MASK 0x307F0033 84ccdfe3a6SAnand Gadiyar #define BWR_ENABLE (1 << 4) 85ccdfe3a6SAnand Gadiyar #define BRR_ENABLE (1 << 5) 8693caf8e6SAdrian Hunter #define DTO_ENABLE (1 << 20) 87a45c6cb8SMadhusudhan Chikkature #define INIT_STREAM (1 << 1) 88a45c6cb8SMadhusudhan Chikkature #define DP_SELECT (1 << 21) 89a45c6cb8SMadhusudhan Chikkature #define DDIR (1 << 4) 90a45c6cb8SMadhusudhan Chikkature #define DMA_EN 0x1 91a45c6cb8SMadhusudhan Chikkature #define MSBS (1 << 5) 92a45c6cb8SMadhusudhan Chikkature #define BCE (1 << 1) 93a45c6cb8SMadhusudhan Chikkature #define FOUR_BIT (1 << 1) 9403b5d924SBalaji T K #define DDR (1 << 19) 9573153010SJarkko Lavinen #define DW8 (1 << 5) 96a45c6cb8SMadhusudhan Chikkature #define CC 0x1 97a45c6cb8SMadhusudhan Chikkature #define TC 0x02 98a45c6cb8SMadhusudhan Chikkature #define OD 0x1 99a45c6cb8SMadhusudhan Chikkature #define ERR (1 << 15) 100a45c6cb8SMadhusudhan Chikkature #define CMD_TIMEOUT (1 << 16) 101a45c6cb8SMadhusudhan Chikkature #define DATA_TIMEOUT (1 << 20) 102a45c6cb8SMadhusudhan Chikkature #define CMD_CRC (1 << 17) 103a45c6cb8SMadhusudhan Chikkature #define DATA_CRC (1 << 21) 104a45c6cb8SMadhusudhan Chikkature #define CARD_ERR (1 << 28) 105a45c6cb8SMadhusudhan Chikkature #define STAT_CLEAR 0xFFFFFFFF 106a45c6cb8SMadhusudhan Chikkature #define INIT_STREAM_CMD 0x00000000 107a45c6cb8SMadhusudhan Chikkature #define DUAL_VOLT_OCR_BIT 7 108a45c6cb8SMadhusudhan Chikkature #define SRC (1 << 25) 109a45c6cb8SMadhusudhan Chikkature #define SRD (1 << 26) 11011dd62a7SDenis Karpov #define SOFTRESET (1 << 1) 11111dd62a7SDenis Karpov #define RESETDONE (1 << 0) 112a45c6cb8SMadhusudhan Chikkature 113fa4aa2d4SBalaji T K #define MMC_AUTOSUSPEND_DELAY 100 114a45c6cb8SMadhusudhan Chikkature #define MMC_TIMEOUT_MS 20 1156b206efeSAndy Shevchenko #define OMAP_MMC_MIN_CLOCK 400000 1166b206efeSAndy Shevchenko #define OMAP_MMC_MAX_CLOCK 52000000 1170005ae73SKishore Kadiyala #define DRIVER_NAME "omap_hsmmc" 118a45c6cb8SMadhusudhan Chikkature 119a45c6cb8SMadhusudhan Chikkature /* 120a45c6cb8SMadhusudhan Chikkature * One controller can have multiple slots, like on some omap boards using 121a45c6cb8SMadhusudhan Chikkature * omap.c controller driver. Luckily this is not currently done on any known 122a45c6cb8SMadhusudhan Chikkature * omap_hsmmc.c device. 123a45c6cb8SMadhusudhan Chikkature */ 124a45c6cb8SMadhusudhan Chikkature #define mmc_slot(host) (host->pdata->slots[host->slot_id]) 125a45c6cb8SMadhusudhan Chikkature 126a45c6cb8SMadhusudhan Chikkature /* 127a45c6cb8SMadhusudhan Chikkature * MMC Host controller read/write API's 128a45c6cb8SMadhusudhan Chikkature */ 129a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_READ(base, reg) \ 130a45c6cb8SMadhusudhan Chikkature __raw_readl((base) + OMAP_HSMMC_##reg) 131a45c6cb8SMadhusudhan Chikkature 132a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_WRITE(base, reg, val) \ 133a45c6cb8SMadhusudhan Chikkature __raw_writel((val), (base) + OMAP_HSMMC_##reg) 134a45c6cb8SMadhusudhan Chikkature 1359782aff8SPer Forlin struct omap_hsmmc_next { 1369782aff8SPer Forlin unsigned int dma_len; 1379782aff8SPer Forlin s32 cookie; 1389782aff8SPer Forlin }; 1399782aff8SPer Forlin 14070a3341aSDenis Karpov struct omap_hsmmc_host { 141a45c6cb8SMadhusudhan Chikkature struct device *dev; 142a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc; 143a45c6cb8SMadhusudhan Chikkature struct mmc_request *mrq; 144a45c6cb8SMadhusudhan Chikkature struct mmc_command *cmd; 145a45c6cb8SMadhusudhan Chikkature struct mmc_data *data; 146a45c6cb8SMadhusudhan Chikkature struct clk *fclk; 147a45c6cb8SMadhusudhan Chikkature struct clk *dbclk; 148db0fefc5SAdrian Hunter /* 149db0fefc5SAdrian Hunter * vcc == configured supply 150db0fefc5SAdrian Hunter * vcc_aux == optional 151db0fefc5SAdrian Hunter * - MMC1, supply for DAT4..DAT7 152db0fefc5SAdrian Hunter * - MMC2/MMC2, external level shifter voltage supply, for 153db0fefc5SAdrian Hunter * chip (SDIO, eMMC, etc) or transceiver (MMC2 only) 154db0fefc5SAdrian Hunter */ 155db0fefc5SAdrian Hunter struct regulator *vcc; 156db0fefc5SAdrian Hunter struct regulator *vcc_aux; 157a45c6cb8SMadhusudhan Chikkature void __iomem *base; 158a45c6cb8SMadhusudhan Chikkature resource_size_t mapbase; 1594dffd7a2SAdrian Hunter spinlock_t irq_lock; /* Prevent races with irq handler */ 160a45c6cb8SMadhusudhan Chikkature unsigned int dma_len; 1610ccd76d4SJuha Yrjola unsigned int dma_sg_idx; 162a45c6cb8SMadhusudhan Chikkature unsigned char bus_mode; 163a3621465SAdrian Hunter unsigned char power_mode; 164a45c6cb8SMadhusudhan Chikkature u32 *buffer; 165a45c6cb8SMadhusudhan Chikkature u32 bytesleft; 166a45c6cb8SMadhusudhan Chikkature int suspended; 167a45c6cb8SMadhusudhan Chikkature int irq; 168a45c6cb8SMadhusudhan Chikkature int use_dma, dma_ch; 169f3e2f1ddSGrazvydas Ignotas int dma_line_tx, dma_line_rx; 170a45c6cb8SMadhusudhan Chikkature int slot_id; 1714a694dc9SAdrian Hunter int response_busy; 17211dd62a7SDenis Karpov int context_loss; 173623821f7SAdrian Hunter int vdd; 174b62f6228SAdrian Hunter int protect_card; 175b62f6228SAdrian Hunter int reqs_blocked; 176db0fefc5SAdrian Hunter int use_reg; 177b417577dSAdrian Hunter int req_in_progress; 1789782aff8SPer Forlin struct omap_hsmmc_next next_data; 17911dd62a7SDenis Karpov 180a45c6cb8SMadhusudhan Chikkature struct omap_mmc_platform_data *pdata; 181a45c6cb8SMadhusudhan Chikkature }; 182a45c6cb8SMadhusudhan Chikkature 183db0fefc5SAdrian Hunter static int omap_hsmmc_card_detect(struct device *dev, int slot) 184db0fefc5SAdrian Hunter { 185db0fefc5SAdrian Hunter struct omap_mmc_platform_data *mmc = dev->platform_data; 186db0fefc5SAdrian Hunter 187db0fefc5SAdrian Hunter /* NOTE: assumes card detect signal is active-low */ 188db0fefc5SAdrian Hunter return !gpio_get_value_cansleep(mmc->slots[0].switch_pin); 189db0fefc5SAdrian Hunter } 190db0fefc5SAdrian Hunter 191db0fefc5SAdrian Hunter static int omap_hsmmc_get_wp(struct device *dev, int slot) 192db0fefc5SAdrian Hunter { 193db0fefc5SAdrian Hunter struct omap_mmc_platform_data *mmc = dev->platform_data; 194db0fefc5SAdrian Hunter 195db0fefc5SAdrian Hunter /* NOTE: assumes write protect signal is active-high */ 196db0fefc5SAdrian Hunter return gpio_get_value_cansleep(mmc->slots[0].gpio_wp); 197db0fefc5SAdrian Hunter } 198db0fefc5SAdrian Hunter 199db0fefc5SAdrian Hunter static int omap_hsmmc_get_cover_state(struct device *dev, int slot) 200db0fefc5SAdrian Hunter { 201db0fefc5SAdrian Hunter struct omap_mmc_platform_data *mmc = dev->platform_data; 202db0fefc5SAdrian Hunter 203db0fefc5SAdrian Hunter /* NOTE: assumes card detect signal is active-low */ 204db0fefc5SAdrian Hunter return !gpio_get_value_cansleep(mmc->slots[0].switch_pin); 205db0fefc5SAdrian Hunter } 206db0fefc5SAdrian Hunter 207db0fefc5SAdrian Hunter #ifdef CONFIG_PM 208db0fefc5SAdrian Hunter 209db0fefc5SAdrian Hunter static int omap_hsmmc_suspend_cdirq(struct device *dev, int slot) 210db0fefc5SAdrian Hunter { 211db0fefc5SAdrian Hunter struct omap_mmc_platform_data *mmc = dev->platform_data; 212db0fefc5SAdrian Hunter 213db0fefc5SAdrian Hunter disable_irq(mmc->slots[0].card_detect_irq); 214db0fefc5SAdrian Hunter return 0; 215db0fefc5SAdrian Hunter } 216db0fefc5SAdrian Hunter 217db0fefc5SAdrian Hunter static int omap_hsmmc_resume_cdirq(struct device *dev, int slot) 218db0fefc5SAdrian Hunter { 219db0fefc5SAdrian Hunter struct omap_mmc_platform_data *mmc = dev->platform_data; 220db0fefc5SAdrian Hunter 221db0fefc5SAdrian Hunter enable_irq(mmc->slots[0].card_detect_irq); 222db0fefc5SAdrian Hunter return 0; 223db0fefc5SAdrian Hunter } 224db0fefc5SAdrian Hunter 225db0fefc5SAdrian Hunter #else 226db0fefc5SAdrian Hunter 227db0fefc5SAdrian Hunter #define omap_hsmmc_suspend_cdirq NULL 228db0fefc5SAdrian Hunter #define omap_hsmmc_resume_cdirq NULL 229db0fefc5SAdrian Hunter 230db0fefc5SAdrian Hunter #endif 231db0fefc5SAdrian Hunter 232b702b106SAdrian Hunter #ifdef CONFIG_REGULATOR 233b702b106SAdrian Hunter 23469b07eceSRajendra Nayak static int omap_hsmmc_set_power(struct device *dev, int slot, int power_on, 235db0fefc5SAdrian Hunter int vdd) 236db0fefc5SAdrian Hunter { 237db0fefc5SAdrian Hunter struct omap_hsmmc_host *host = 238db0fefc5SAdrian Hunter platform_get_drvdata(to_platform_device(dev)); 239db0fefc5SAdrian Hunter int ret = 0; 240db0fefc5SAdrian Hunter 241db0fefc5SAdrian Hunter /* 242db0fefc5SAdrian Hunter * If we don't see a Vcc regulator, assume it's a fixed 243db0fefc5SAdrian Hunter * voltage always-on regulator. 244db0fefc5SAdrian Hunter */ 245db0fefc5SAdrian Hunter if (!host->vcc) 246db0fefc5SAdrian Hunter return 0; 2471f84b71bSRajendra Nayak /* 2481f84b71bSRajendra Nayak * With DT, never turn OFF the regulator. This is because 2491f84b71bSRajendra Nayak * the pbias cell programming support is still missing when 2501f84b71bSRajendra Nayak * booting with Device tree 2511f84b71bSRajendra Nayak */ 2524d048f91SRajendra Nayak if (dev->of_node && !vdd) 2531f84b71bSRajendra Nayak return 0; 254db0fefc5SAdrian Hunter 255db0fefc5SAdrian Hunter if (mmc_slot(host).before_set_reg) 256db0fefc5SAdrian Hunter mmc_slot(host).before_set_reg(dev, slot, power_on, vdd); 257db0fefc5SAdrian Hunter 258db0fefc5SAdrian Hunter /* 259db0fefc5SAdrian Hunter * Assume Vcc regulator is used only to power the card ... OMAP 260db0fefc5SAdrian Hunter * VDDS is used to power the pins, optionally with a transceiver to 261db0fefc5SAdrian Hunter * support cards using voltages other than VDDS (1.8V nominal). When a 262db0fefc5SAdrian Hunter * transceiver is used, DAT3..7 are muxed as transceiver control pins. 263db0fefc5SAdrian Hunter * 264db0fefc5SAdrian Hunter * In some cases this regulator won't support enable/disable; 265db0fefc5SAdrian Hunter * e.g. it's a fixed rail for a WLAN chip. 266db0fefc5SAdrian Hunter * 267db0fefc5SAdrian Hunter * In other cases vcc_aux switches interface power. Example, for 268db0fefc5SAdrian Hunter * eMMC cards it represents VccQ. Sometimes transceivers or SDIO 269db0fefc5SAdrian Hunter * chips/cards need an interface voltage rail too. 270db0fefc5SAdrian Hunter */ 271db0fefc5SAdrian Hunter if (power_on) { 27299fc5131SLinus Walleij ret = mmc_regulator_set_ocr(host->mmc, host->vcc, vdd); 273db0fefc5SAdrian Hunter /* Enable interface voltage rail, if needed */ 274db0fefc5SAdrian Hunter if (ret == 0 && host->vcc_aux) { 275db0fefc5SAdrian Hunter ret = regulator_enable(host->vcc_aux); 276db0fefc5SAdrian Hunter if (ret < 0) 27799fc5131SLinus Walleij ret = mmc_regulator_set_ocr(host->mmc, 27899fc5131SLinus Walleij host->vcc, 0); 279db0fefc5SAdrian Hunter } 280db0fefc5SAdrian Hunter } else { 28199fc5131SLinus Walleij /* Shut down the rail */ 2826da20c89SAdrian Hunter if (host->vcc_aux) 283db0fefc5SAdrian Hunter ret = regulator_disable(host->vcc_aux); 28499fc5131SLinus Walleij if (!ret) { 28599fc5131SLinus Walleij /* Then proceed to shut down the local regulator */ 28699fc5131SLinus Walleij ret = mmc_regulator_set_ocr(host->mmc, 28799fc5131SLinus Walleij host->vcc, 0); 28899fc5131SLinus Walleij } 289db0fefc5SAdrian Hunter } 290db0fefc5SAdrian Hunter 291db0fefc5SAdrian Hunter if (mmc_slot(host).after_set_reg) 292db0fefc5SAdrian Hunter mmc_slot(host).after_set_reg(dev, slot, power_on, vdd); 293db0fefc5SAdrian Hunter 294db0fefc5SAdrian Hunter return ret; 295db0fefc5SAdrian Hunter } 296db0fefc5SAdrian Hunter 297db0fefc5SAdrian Hunter static int omap_hsmmc_reg_get(struct omap_hsmmc_host *host) 298db0fefc5SAdrian Hunter { 299db0fefc5SAdrian Hunter struct regulator *reg; 30064be9782Skishore kadiyala int ocr_value = 0; 301db0fefc5SAdrian Hunter 30269b07eceSRajendra Nayak mmc_slot(host).set_power = omap_hsmmc_set_power; 303db0fefc5SAdrian Hunter 304db0fefc5SAdrian Hunter reg = regulator_get(host->dev, "vmmc"); 305db0fefc5SAdrian Hunter if (IS_ERR(reg)) { 306db0fefc5SAdrian Hunter dev_dbg(host->dev, "vmmc regulator missing\n"); 307db0fefc5SAdrian Hunter } else { 308db0fefc5SAdrian Hunter host->vcc = reg; 30964be9782Skishore kadiyala ocr_value = mmc_regulator_get_ocrmask(reg); 31064be9782Skishore kadiyala if (!mmc_slot(host).ocr_mask) { 31164be9782Skishore kadiyala mmc_slot(host).ocr_mask = ocr_value; 31264be9782Skishore kadiyala } else { 31364be9782Skishore kadiyala if (!(mmc_slot(host).ocr_mask & ocr_value)) { 3142cecdf00SRajendra Nayak dev_err(host->dev, "ocrmask %x is not supported\n", 315e3f1adb6SRajendra Nayak mmc_slot(host).ocr_mask); 31664be9782Skishore kadiyala mmc_slot(host).ocr_mask = 0; 31764be9782Skishore kadiyala return -EINVAL; 31864be9782Skishore kadiyala } 31964be9782Skishore kadiyala } 320db0fefc5SAdrian Hunter 321db0fefc5SAdrian Hunter /* Allow an aux regulator */ 322db0fefc5SAdrian Hunter reg = regulator_get(host->dev, "vmmc_aux"); 323db0fefc5SAdrian Hunter host->vcc_aux = IS_ERR(reg) ? NULL : reg; 324db0fefc5SAdrian Hunter 325b1c1df7aSBalaji T K /* For eMMC do not power off when not in sleep state */ 326b1c1df7aSBalaji T K if (mmc_slot(host).no_regulator_off_init) 327b1c1df7aSBalaji T K return 0; 328db0fefc5SAdrian Hunter /* 329db0fefc5SAdrian Hunter * UGLY HACK: workaround regulator framework bugs. 330db0fefc5SAdrian Hunter * When the bootloader leaves a supply active, it's 331db0fefc5SAdrian Hunter * initialized with zero usecount ... and we can't 332db0fefc5SAdrian Hunter * disable it without first enabling it. Until the 333db0fefc5SAdrian Hunter * framework is fixed, we need a workaround like this 334db0fefc5SAdrian Hunter * (which is safe for MMC, but not in general). 335db0fefc5SAdrian Hunter */ 336e840ce13SAdrian Hunter if (regulator_is_enabled(host->vcc) > 0 || 337e840ce13SAdrian Hunter (host->vcc_aux && regulator_is_enabled(host->vcc_aux))) { 338e840ce13SAdrian Hunter int vdd = ffs(mmc_slot(host).ocr_mask) - 1; 339e840ce13SAdrian Hunter 340e840ce13SAdrian Hunter mmc_slot(host).set_power(host->dev, host->slot_id, 341e840ce13SAdrian Hunter 1, vdd); 342e840ce13SAdrian Hunter mmc_slot(host).set_power(host->dev, host->slot_id, 343e840ce13SAdrian Hunter 0, 0); 344db0fefc5SAdrian Hunter } 345db0fefc5SAdrian Hunter } 346db0fefc5SAdrian Hunter 347db0fefc5SAdrian Hunter return 0; 348db0fefc5SAdrian Hunter } 349db0fefc5SAdrian Hunter 350db0fefc5SAdrian Hunter static void omap_hsmmc_reg_put(struct omap_hsmmc_host *host) 351db0fefc5SAdrian Hunter { 352db0fefc5SAdrian Hunter regulator_put(host->vcc); 353db0fefc5SAdrian Hunter regulator_put(host->vcc_aux); 354db0fefc5SAdrian Hunter mmc_slot(host).set_power = NULL; 355db0fefc5SAdrian Hunter } 356db0fefc5SAdrian Hunter 357b702b106SAdrian Hunter static inline int omap_hsmmc_have_reg(void) 358b702b106SAdrian Hunter { 359b702b106SAdrian Hunter return 1; 360b702b106SAdrian Hunter } 361b702b106SAdrian Hunter 362b702b106SAdrian Hunter #else 363b702b106SAdrian Hunter 364b702b106SAdrian Hunter static inline int omap_hsmmc_reg_get(struct omap_hsmmc_host *host) 365b702b106SAdrian Hunter { 366b702b106SAdrian Hunter return -EINVAL; 367b702b106SAdrian Hunter } 368b702b106SAdrian Hunter 369b702b106SAdrian Hunter static inline void omap_hsmmc_reg_put(struct omap_hsmmc_host *host) 370b702b106SAdrian Hunter { 371b702b106SAdrian Hunter } 372b702b106SAdrian Hunter 373b702b106SAdrian Hunter static inline int omap_hsmmc_have_reg(void) 374b702b106SAdrian Hunter { 375b702b106SAdrian Hunter return 0; 376b702b106SAdrian Hunter } 377b702b106SAdrian Hunter 378b702b106SAdrian Hunter #endif 379b702b106SAdrian Hunter 380b702b106SAdrian Hunter static int omap_hsmmc_gpio_init(struct omap_mmc_platform_data *pdata) 381b702b106SAdrian Hunter { 382b702b106SAdrian Hunter int ret; 383b702b106SAdrian Hunter 384b702b106SAdrian Hunter if (gpio_is_valid(pdata->slots[0].switch_pin)) { 385b702b106SAdrian Hunter if (pdata->slots[0].cover) 386b702b106SAdrian Hunter pdata->slots[0].get_cover_state = 387b702b106SAdrian Hunter omap_hsmmc_get_cover_state; 388b702b106SAdrian Hunter else 389b702b106SAdrian Hunter pdata->slots[0].card_detect = omap_hsmmc_card_detect; 390b702b106SAdrian Hunter pdata->slots[0].card_detect_irq = 391b702b106SAdrian Hunter gpio_to_irq(pdata->slots[0].switch_pin); 392b702b106SAdrian Hunter ret = gpio_request(pdata->slots[0].switch_pin, "mmc_cd"); 393b702b106SAdrian Hunter if (ret) 394b702b106SAdrian Hunter return ret; 395b702b106SAdrian Hunter ret = gpio_direction_input(pdata->slots[0].switch_pin); 396b702b106SAdrian Hunter if (ret) 397b702b106SAdrian Hunter goto err_free_sp; 398b702b106SAdrian Hunter } else 399b702b106SAdrian Hunter pdata->slots[0].switch_pin = -EINVAL; 400b702b106SAdrian Hunter 401b702b106SAdrian Hunter if (gpio_is_valid(pdata->slots[0].gpio_wp)) { 402b702b106SAdrian Hunter pdata->slots[0].get_ro = omap_hsmmc_get_wp; 403b702b106SAdrian Hunter ret = gpio_request(pdata->slots[0].gpio_wp, "mmc_wp"); 404b702b106SAdrian Hunter if (ret) 405b702b106SAdrian Hunter goto err_free_cd; 406b702b106SAdrian Hunter ret = gpio_direction_input(pdata->slots[0].gpio_wp); 407b702b106SAdrian Hunter if (ret) 408b702b106SAdrian Hunter goto err_free_wp; 409b702b106SAdrian Hunter } else 410b702b106SAdrian Hunter pdata->slots[0].gpio_wp = -EINVAL; 411b702b106SAdrian Hunter 412b702b106SAdrian Hunter return 0; 413b702b106SAdrian Hunter 414b702b106SAdrian Hunter err_free_wp: 415b702b106SAdrian Hunter gpio_free(pdata->slots[0].gpio_wp); 416b702b106SAdrian Hunter err_free_cd: 417b702b106SAdrian Hunter if (gpio_is_valid(pdata->slots[0].switch_pin)) 418b702b106SAdrian Hunter err_free_sp: 419b702b106SAdrian Hunter gpio_free(pdata->slots[0].switch_pin); 420b702b106SAdrian Hunter return ret; 421b702b106SAdrian Hunter } 422b702b106SAdrian Hunter 423b702b106SAdrian Hunter static void omap_hsmmc_gpio_free(struct omap_mmc_platform_data *pdata) 424b702b106SAdrian Hunter { 425b702b106SAdrian Hunter if (gpio_is_valid(pdata->slots[0].gpio_wp)) 426b702b106SAdrian Hunter gpio_free(pdata->slots[0].gpio_wp); 427b702b106SAdrian Hunter if (gpio_is_valid(pdata->slots[0].switch_pin)) 428b702b106SAdrian Hunter gpio_free(pdata->slots[0].switch_pin); 429b702b106SAdrian Hunter } 430b702b106SAdrian Hunter 431a45c6cb8SMadhusudhan Chikkature /* 432e0c7f99bSAndy Shevchenko * Start clock to the card 433e0c7f99bSAndy Shevchenko */ 434e0c7f99bSAndy Shevchenko static void omap_hsmmc_start_clock(struct omap_hsmmc_host *host) 435e0c7f99bSAndy Shevchenko { 436e0c7f99bSAndy Shevchenko OMAP_HSMMC_WRITE(host->base, SYSCTL, 437e0c7f99bSAndy Shevchenko OMAP_HSMMC_READ(host->base, SYSCTL) | CEN); 438e0c7f99bSAndy Shevchenko } 439e0c7f99bSAndy Shevchenko 440e0c7f99bSAndy Shevchenko /* 441a45c6cb8SMadhusudhan Chikkature * Stop clock to the card 442a45c6cb8SMadhusudhan Chikkature */ 44370a3341aSDenis Karpov static void omap_hsmmc_stop_clock(struct omap_hsmmc_host *host) 444a45c6cb8SMadhusudhan Chikkature { 445a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, 446a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, SYSCTL) & ~CEN); 447a45c6cb8SMadhusudhan Chikkature if ((OMAP_HSMMC_READ(host->base, SYSCTL) & CEN) != 0x0) 448a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "MMC Clock is not stoped\n"); 449a45c6cb8SMadhusudhan Chikkature } 450a45c6cb8SMadhusudhan Chikkature 45193caf8e6SAdrian Hunter static void omap_hsmmc_enable_irq(struct omap_hsmmc_host *host, 45293caf8e6SAdrian Hunter struct mmc_command *cmd) 453b417577dSAdrian Hunter { 454b417577dSAdrian Hunter unsigned int irq_mask; 455b417577dSAdrian Hunter 456b417577dSAdrian Hunter if (host->use_dma) 457b417577dSAdrian Hunter irq_mask = INT_EN_MASK & ~(BRR_ENABLE | BWR_ENABLE); 458b417577dSAdrian Hunter else 459b417577dSAdrian Hunter irq_mask = INT_EN_MASK; 460b417577dSAdrian Hunter 46193caf8e6SAdrian Hunter /* Disable timeout for erases */ 46293caf8e6SAdrian Hunter if (cmd->opcode == MMC_ERASE) 46393caf8e6SAdrian Hunter irq_mask &= ~DTO_ENABLE; 46493caf8e6SAdrian Hunter 465b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); 466b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, ISE, irq_mask); 467b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, IE, irq_mask); 468b417577dSAdrian Hunter } 469b417577dSAdrian Hunter 470b417577dSAdrian Hunter static void omap_hsmmc_disable_irq(struct omap_hsmmc_host *host) 471b417577dSAdrian Hunter { 472b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, ISE, 0); 473b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, IE, 0); 474b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); 475b417577dSAdrian Hunter } 476b417577dSAdrian Hunter 477ac330f44SAndy Shevchenko /* Calculate divisor for the given clock frequency */ 478d83b6e03SBalaji TK static u16 calc_divisor(struct omap_hsmmc_host *host, struct mmc_ios *ios) 479ac330f44SAndy Shevchenko { 480ac330f44SAndy Shevchenko u16 dsor = 0; 481ac330f44SAndy Shevchenko 482ac330f44SAndy Shevchenko if (ios->clock) { 483d83b6e03SBalaji TK dsor = DIV_ROUND_UP(clk_get_rate(host->fclk), ios->clock); 484ac330f44SAndy Shevchenko if (dsor > 250) 485ac330f44SAndy Shevchenko dsor = 250; 486ac330f44SAndy Shevchenko } 487ac330f44SAndy Shevchenko 488ac330f44SAndy Shevchenko return dsor; 489ac330f44SAndy Shevchenko } 490ac330f44SAndy Shevchenko 4915934df2fSAndy Shevchenko static void omap_hsmmc_set_clock(struct omap_hsmmc_host *host) 4925934df2fSAndy Shevchenko { 4935934df2fSAndy Shevchenko struct mmc_ios *ios = &host->mmc->ios; 4945934df2fSAndy Shevchenko unsigned long regval; 4955934df2fSAndy Shevchenko unsigned long timeout; 4965934df2fSAndy Shevchenko 4975934df2fSAndy Shevchenko dev_dbg(mmc_dev(host->mmc), "Set clock to %uHz\n", ios->clock); 4985934df2fSAndy Shevchenko 4995934df2fSAndy Shevchenko omap_hsmmc_stop_clock(host); 5005934df2fSAndy Shevchenko 5015934df2fSAndy Shevchenko regval = OMAP_HSMMC_READ(host->base, SYSCTL); 5025934df2fSAndy Shevchenko regval = regval & ~(CLKD_MASK | DTO_MASK); 503d83b6e03SBalaji TK regval = regval | (calc_divisor(host, ios) << 6) | (DTO << 16); 5045934df2fSAndy Shevchenko OMAP_HSMMC_WRITE(host->base, SYSCTL, regval); 5055934df2fSAndy Shevchenko OMAP_HSMMC_WRITE(host->base, SYSCTL, 5065934df2fSAndy Shevchenko OMAP_HSMMC_READ(host->base, SYSCTL) | ICE); 5075934df2fSAndy Shevchenko 5085934df2fSAndy Shevchenko /* Wait till the ICS bit is set */ 5095934df2fSAndy Shevchenko timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 5105934df2fSAndy Shevchenko while ((OMAP_HSMMC_READ(host->base, SYSCTL) & ICS) != ICS 5115934df2fSAndy Shevchenko && time_before(jiffies, timeout)) 5125934df2fSAndy Shevchenko cpu_relax(); 5135934df2fSAndy Shevchenko 5145934df2fSAndy Shevchenko omap_hsmmc_start_clock(host); 5155934df2fSAndy Shevchenko } 5165934df2fSAndy Shevchenko 5173796fb8aSAndy Shevchenko static void omap_hsmmc_set_bus_width(struct omap_hsmmc_host *host) 5183796fb8aSAndy Shevchenko { 5193796fb8aSAndy Shevchenko struct mmc_ios *ios = &host->mmc->ios; 5203796fb8aSAndy Shevchenko u32 con; 5213796fb8aSAndy Shevchenko 5223796fb8aSAndy Shevchenko con = OMAP_HSMMC_READ(host->base, CON); 52303b5d924SBalaji T K if (ios->timing == MMC_TIMING_UHS_DDR50) 52403b5d924SBalaji T K con |= DDR; /* configure in DDR mode */ 52503b5d924SBalaji T K else 52603b5d924SBalaji T K con &= ~DDR; 5273796fb8aSAndy Shevchenko switch (ios->bus_width) { 5283796fb8aSAndy Shevchenko case MMC_BUS_WIDTH_8: 5293796fb8aSAndy Shevchenko OMAP_HSMMC_WRITE(host->base, CON, con | DW8); 5303796fb8aSAndy Shevchenko break; 5313796fb8aSAndy Shevchenko case MMC_BUS_WIDTH_4: 5323796fb8aSAndy Shevchenko OMAP_HSMMC_WRITE(host->base, CON, con & ~DW8); 5333796fb8aSAndy Shevchenko OMAP_HSMMC_WRITE(host->base, HCTL, 5343796fb8aSAndy Shevchenko OMAP_HSMMC_READ(host->base, HCTL) | FOUR_BIT); 5353796fb8aSAndy Shevchenko break; 5363796fb8aSAndy Shevchenko case MMC_BUS_WIDTH_1: 5373796fb8aSAndy Shevchenko OMAP_HSMMC_WRITE(host->base, CON, con & ~DW8); 5383796fb8aSAndy Shevchenko OMAP_HSMMC_WRITE(host->base, HCTL, 5393796fb8aSAndy Shevchenko OMAP_HSMMC_READ(host->base, HCTL) & ~FOUR_BIT); 5403796fb8aSAndy Shevchenko break; 5413796fb8aSAndy Shevchenko } 5423796fb8aSAndy Shevchenko } 5433796fb8aSAndy Shevchenko 5443796fb8aSAndy Shevchenko static void omap_hsmmc_set_bus_mode(struct omap_hsmmc_host *host) 5453796fb8aSAndy Shevchenko { 5463796fb8aSAndy Shevchenko struct mmc_ios *ios = &host->mmc->ios; 5473796fb8aSAndy Shevchenko u32 con; 5483796fb8aSAndy Shevchenko 5493796fb8aSAndy Shevchenko con = OMAP_HSMMC_READ(host->base, CON); 5503796fb8aSAndy Shevchenko if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN) 5513796fb8aSAndy Shevchenko OMAP_HSMMC_WRITE(host->base, CON, con | OD); 5523796fb8aSAndy Shevchenko else 5533796fb8aSAndy Shevchenko OMAP_HSMMC_WRITE(host->base, CON, con & ~OD); 5543796fb8aSAndy Shevchenko } 5553796fb8aSAndy Shevchenko 55611dd62a7SDenis Karpov #ifdef CONFIG_PM 55711dd62a7SDenis Karpov 55811dd62a7SDenis Karpov /* 55911dd62a7SDenis Karpov * Restore the MMC host context, if it was lost as result of a 56011dd62a7SDenis Karpov * power state change. 56111dd62a7SDenis Karpov */ 56270a3341aSDenis Karpov static int omap_hsmmc_context_restore(struct omap_hsmmc_host *host) 56311dd62a7SDenis Karpov { 56411dd62a7SDenis Karpov struct mmc_ios *ios = &host->mmc->ios; 56511dd62a7SDenis Karpov struct omap_mmc_platform_data *pdata = host->pdata; 56611dd62a7SDenis Karpov int context_loss = 0; 5673796fb8aSAndy Shevchenko u32 hctl, capa; 56811dd62a7SDenis Karpov unsigned long timeout; 56911dd62a7SDenis Karpov 57011dd62a7SDenis Karpov if (pdata->get_context_loss_count) { 57111dd62a7SDenis Karpov context_loss = pdata->get_context_loss_count(host->dev); 57211dd62a7SDenis Karpov if (context_loss < 0) 57311dd62a7SDenis Karpov return 1; 57411dd62a7SDenis Karpov } 57511dd62a7SDenis Karpov 57611dd62a7SDenis Karpov dev_dbg(mmc_dev(host->mmc), "context was %slost\n", 57711dd62a7SDenis Karpov context_loss == host->context_loss ? "not " : ""); 57811dd62a7SDenis Karpov if (host->context_loss == context_loss) 57911dd62a7SDenis Karpov return 1; 58011dd62a7SDenis Karpov 58111dd62a7SDenis Karpov /* Wait for hardware reset */ 58211dd62a7SDenis Karpov timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 58311dd62a7SDenis Karpov while ((OMAP_HSMMC_READ(host->base, SYSSTATUS) & RESETDONE) != RESETDONE 58411dd62a7SDenis Karpov && time_before(jiffies, timeout)) 58511dd62a7SDenis Karpov ; 58611dd62a7SDenis Karpov 58711dd62a7SDenis Karpov /* Do software reset */ 58811dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, SYSCONFIG, SOFTRESET); 58911dd62a7SDenis Karpov timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 59011dd62a7SDenis Karpov while ((OMAP_HSMMC_READ(host->base, SYSSTATUS) & RESETDONE) != RESETDONE 59111dd62a7SDenis Karpov && time_before(jiffies, timeout)) 59211dd62a7SDenis Karpov ; 59311dd62a7SDenis Karpov 59411dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, SYSCONFIG, 59511dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCONFIG) | AUTOIDLE); 59611dd62a7SDenis Karpov 597c2200efbSBalaji T K if (host->pdata->controller_flags & OMAP_HSMMC_SUPPORTS_DUAL_VOLT) { 59811dd62a7SDenis Karpov if (host->power_mode != MMC_POWER_OFF && 59911dd62a7SDenis Karpov (1 << ios->vdd) <= MMC_VDD_23_24) 60011dd62a7SDenis Karpov hctl = SDVS18; 60111dd62a7SDenis Karpov else 60211dd62a7SDenis Karpov hctl = SDVS30; 60311dd62a7SDenis Karpov capa = VS30 | VS18; 60411dd62a7SDenis Karpov } else { 60511dd62a7SDenis Karpov hctl = SDVS18; 60611dd62a7SDenis Karpov capa = VS18; 60711dd62a7SDenis Karpov } 60811dd62a7SDenis Karpov 60911dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, HCTL, 61011dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, HCTL) | hctl); 61111dd62a7SDenis Karpov 61211dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, CAPA, 61311dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, CAPA) | capa); 61411dd62a7SDenis Karpov 61511dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, HCTL, 61611dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, HCTL) | SDBP); 61711dd62a7SDenis Karpov 61811dd62a7SDenis Karpov timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 61911dd62a7SDenis Karpov while ((OMAP_HSMMC_READ(host->base, HCTL) & SDBP) != SDBP 62011dd62a7SDenis Karpov && time_before(jiffies, timeout)) 62111dd62a7SDenis Karpov ; 62211dd62a7SDenis Karpov 623b417577dSAdrian Hunter omap_hsmmc_disable_irq(host); 62411dd62a7SDenis Karpov 62511dd62a7SDenis Karpov /* Do not initialize card-specific things if the power is off */ 62611dd62a7SDenis Karpov if (host->power_mode == MMC_POWER_OFF) 62711dd62a7SDenis Karpov goto out; 62811dd62a7SDenis Karpov 6293796fb8aSAndy Shevchenko omap_hsmmc_set_bus_width(host); 63011dd62a7SDenis Karpov 6315934df2fSAndy Shevchenko omap_hsmmc_set_clock(host); 63211dd62a7SDenis Karpov 6333796fb8aSAndy Shevchenko omap_hsmmc_set_bus_mode(host); 6343796fb8aSAndy Shevchenko 63511dd62a7SDenis Karpov out: 63611dd62a7SDenis Karpov host->context_loss = context_loss; 63711dd62a7SDenis Karpov 63811dd62a7SDenis Karpov dev_dbg(mmc_dev(host->mmc), "context is restored\n"); 63911dd62a7SDenis Karpov return 0; 64011dd62a7SDenis Karpov } 64111dd62a7SDenis Karpov 64211dd62a7SDenis Karpov /* 64311dd62a7SDenis Karpov * Save the MMC host context (store the number of power state changes so far). 64411dd62a7SDenis Karpov */ 64570a3341aSDenis Karpov static void omap_hsmmc_context_save(struct omap_hsmmc_host *host) 64611dd62a7SDenis Karpov { 64711dd62a7SDenis Karpov struct omap_mmc_platform_data *pdata = host->pdata; 64811dd62a7SDenis Karpov int context_loss; 64911dd62a7SDenis Karpov 65011dd62a7SDenis Karpov if (pdata->get_context_loss_count) { 65111dd62a7SDenis Karpov context_loss = pdata->get_context_loss_count(host->dev); 65211dd62a7SDenis Karpov if (context_loss < 0) 65311dd62a7SDenis Karpov return; 65411dd62a7SDenis Karpov host->context_loss = context_loss; 65511dd62a7SDenis Karpov } 65611dd62a7SDenis Karpov } 65711dd62a7SDenis Karpov 65811dd62a7SDenis Karpov #else 65911dd62a7SDenis Karpov 66070a3341aSDenis Karpov static int omap_hsmmc_context_restore(struct omap_hsmmc_host *host) 66111dd62a7SDenis Karpov { 66211dd62a7SDenis Karpov return 0; 66311dd62a7SDenis Karpov } 66411dd62a7SDenis Karpov 66570a3341aSDenis Karpov static void omap_hsmmc_context_save(struct omap_hsmmc_host *host) 66611dd62a7SDenis Karpov { 66711dd62a7SDenis Karpov } 66811dd62a7SDenis Karpov 66911dd62a7SDenis Karpov #endif 67011dd62a7SDenis Karpov 671a45c6cb8SMadhusudhan Chikkature /* 672a45c6cb8SMadhusudhan Chikkature * Send init stream sequence to card 673a45c6cb8SMadhusudhan Chikkature * before sending IDLE command 674a45c6cb8SMadhusudhan Chikkature */ 67570a3341aSDenis Karpov static void send_init_stream(struct omap_hsmmc_host *host) 676a45c6cb8SMadhusudhan Chikkature { 677a45c6cb8SMadhusudhan Chikkature int reg = 0; 678a45c6cb8SMadhusudhan Chikkature unsigned long timeout; 679a45c6cb8SMadhusudhan Chikkature 680b62f6228SAdrian Hunter if (host->protect_card) 681b62f6228SAdrian Hunter return; 682b62f6228SAdrian Hunter 683a45c6cb8SMadhusudhan Chikkature disable_irq(host->irq); 684b417577dSAdrian Hunter 685b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK); 686a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CON, 687a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, CON) | INIT_STREAM); 688a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CMD, INIT_STREAM_CMD); 689a45c6cb8SMadhusudhan Chikkature 690a45c6cb8SMadhusudhan Chikkature timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 691a45c6cb8SMadhusudhan Chikkature while ((reg != CC) && time_before(jiffies, timeout)) 692a45c6cb8SMadhusudhan Chikkature reg = OMAP_HSMMC_READ(host->base, STAT) & CC; 693a45c6cb8SMadhusudhan Chikkature 694a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CON, 695a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, CON) & ~INIT_STREAM); 696c653a6d4SAdrian Hunter 697c653a6d4SAdrian Hunter OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); 698c653a6d4SAdrian Hunter OMAP_HSMMC_READ(host->base, STAT); 699c653a6d4SAdrian Hunter 700a45c6cb8SMadhusudhan Chikkature enable_irq(host->irq); 701a45c6cb8SMadhusudhan Chikkature } 702a45c6cb8SMadhusudhan Chikkature 703a45c6cb8SMadhusudhan Chikkature static inline 70470a3341aSDenis Karpov int omap_hsmmc_cover_is_closed(struct omap_hsmmc_host *host) 705a45c6cb8SMadhusudhan Chikkature { 706a45c6cb8SMadhusudhan Chikkature int r = 1; 707a45c6cb8SMadhusudhan Chikkature 708191d1f1dSDenis Karpov if (mmc_slot(host).get_cover_state) 709191d1f1dSDenis Karpov r = mmc_slot(host).get_cover_state(host->dev, host->slot_id); 710a45c6cb8SMadhusudhan Chikkature return r; 711a45c6cb8SMadhusudhan Chikkature } 712a45c6cb8SMadhusudhan Chikkature 713a45c6cb8SMadhusudhan Chikkature static ssize_t 71470a3341aSDenis Karpov omap_hsmmc_show_cover_switch(struct device *dev, struct device_attribute *attr, 715a45c6cb8SMadhusudhan Chikkature char *buf) 716a45c6cb8SMadhusudhan Chikkature { 717a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev); 71870a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 719a45c6cb8SMadhusudhan Chikkature 72070a3341aSDenis Karpov return sprintf(buf, "%s\n", 72170a3341aSDenis Karpov omap_hsmmc_cover_is_closed(host) ? "closed" : "open"); 722a45c6cb8SMadhusudhan Chikkature } 723a45c6cb8SMadhusudhan Chikkature 72470a3341aSDenis Karpov static DEVICE_ATTR(cover_switch, S_IRUGO, omap_hsmmc_show_cover_switch, NULL); 725a45c6cb8SMadhusudhan Chikkature 726a45c6cb8SMadhusudhan Chikkature static ssize_t 72770a3341aSDenis Karpov omap_hsmmc_show_slot_name(struct device *dev, struct device_attribute *attr, 728a45c6cb8SMadhusudhan Chikkature char *buf) 729a45c6cb8SMadhusudhan Chikkature { 730a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev); 73170a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 732a45c6cb8SMadhusudhan Chikkature 733191d1f1dSDenis Karpov return sprintf(buf, "%s\n", mmc_slot(host).name); 734a45c6cb8SMadhusudhan Chikkature } 735a45c6cb8SMadhusudhan Chikkature 73670a3341aSDenis Karpov static DEVICE_ATTR(slot_name, S_IRUGO, omap_hsmmc_show_slot_name, NULL); 737a45c6cb8SMadhusudhan Chikkature 738a45c6cb8SMadhusudhan Chikkature /* 739a45c6cb8SMadhusudhan Chikkature * Configure the response type and send the cmd. 740a45c6cb8SMadhusudhan Chikkature */ 741a45c6cb8SMadhusudhan Chikkature static void 74270a3341aSDenis Karpov omap_hsmmc_start_command(struct omap_hsmmc_host *host, struct mmc_command *cmd, 743a45c6cb8SMadhusudhan Chikkature struct mmc_data *data) 744a45c6cb8SMadhusudhan Chikkature { 745a45c6cb8SMadhusudhan Chikkature int cmdreg = 0, resptype = 0, cmdtype = 0; 746a45c6cb8SMadhusudhan Chikkature 747a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "%s: CMD%d, argument 0x%08x\n", 748a45c6cb8SMadhusudhan Chikkature mmc_hostname(host->mmc), cmd->opcode, cmd->arg); 749a45c6cb8SMadhusudhan Chikkature host->cmd = cmd; 750a45c6cb8SMadhusudhan Chikkature 75193caf8e6SAdrian Hunter omap_hsmmc_enable_irq(host, cmd); 752a45c6cb8SMadhusudhan Chikkature 7534a694dc9SAdrian Hunter host->response_busy = 0; 754a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_PRESENT) { 755a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_136) 756a45c6cb8SMadhusudhan Chikkature resptype = 1; 7574a694dc9SAdrian Hunter else if (cmd->flags & MMC_RSP_BUSY) { 7584a694dc9SAdrian Hunter resptype = 3; 7594a694dc9SAdrian Hunter host->response_busy = 1; 7604a694dc9SAdrian Hunter } else 761a45c6cb8SMadhusudhan Chikkature resptype = 2; 762a45c6cb8SMadhusudhan Chikkature } 763a45c6cb8SMadhusudhan Chikkature 764a45c6cb8SMadhusudhan Chikkature /* 765a45c6cb8SMadhusudhan Chikkature * Unlike OMAP1 controller, the cmdtype does not seem to be based on 766a45c6cb8SMadhusudhan Chikkature * ac, bc, adtc, bcr. Only commands ending an open ended transfer need 767a45c6cb8SMadhusudhan Chikkature * a val of 0x3, rest 0x0. 768a45c6cb8SMadhusudhan Chikkature */ 769a45c6cb8SMadhusudhan Chikkature if (cmd == host->mrq->stop) 770a45c6cb8SMadhusudhan Chikkature cmdtype = 0x3; 771a45c6cb8SMadhusudhan Chikkature 772a45c6cb8SMadhusudhan Chikkature cmdreg = (cmd->opcode << 24) | (resptype << 16) | (cmdtype << 22); 773a45c6cb8SMadhusudhan Chikkature 774a45c6cb8SMadhusudhan Chikkature if (data) { 775a45c6cb8SMadhusudhan Chikkature cmdreg |= DP_SELECT | MSBS | BCE; 776a45c6cb8SMadhusudhan Chikkature if (data->flags & MMC_DATA_READ) 777a45c6cb8SMadhusudhan Chikkature cmdreg |= DDIR; 778a45c6cb8SMadhusudhan Chikkature else 779a45c6cb8SMadhusudhan Chikkature cmdreg &= ~(DDIR); 780a45c6cb8SMadhusudhan Chikkature } 781a45c6cb8SMadhusudhan Chikkature 782a45c6cb8SMadhusudhan Chikkature if (host->use_dma) 783a45c6cb8SMadhusudhan Chikkature cmdreg |= DMA_EN; 784a45c6cb8SMadhusudhan Chikkature 785b417577dSAdrian Hunter host->req_in_progress = 1; 7864dffd7a2SAdrian Hunter 787a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, ARG, cmd->arg); 788a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CMD, cmdreg); 789a45c6cb8SMadhusudhan Chikkature } 790a45c6cb8SMadhusudhan Chikkature 7910ccd76d4SJuha Yrjola static int 79270a3341aSDenis Karpov omap_hsmmc_get_dma_dir(struct omap_hsmmc_host *host, struct mmc_data *data) 7930ccd76d4SJuha Yrjola { 7940ccd76d4SJuha Yrjola if (data->flags & MMC_DATA_WRITE) 7950ccd76d4SJuha Yrjola return DMA_TO_DEVICE; 7960ccd76d4SJuha Yrjola else 7970ccd76d4SJuha Yrjola return DMA_FROM_DEVICE; 7980ccd76d4SJuha Yrjola } 7990ccd76d4SJuha Yrjola 800b417577dSAdrian Hunter static void omap_hsmmc_request_done(struct omap_hsmmc_host *host, struct mmc_request *mrq) 801b417577dSAdrian Hunter { 802b417577dSAdrian Hunter int dma_ch; 80331463b14SVenkatraman S unsigned long flags; 804b417577dSAdrian Hunter 80531463b14SVenkatraman S spin_lock_irqsave(&host->irq_lock, flags); 806b417577dSAdrian Hunter host->req_in_progress = 0; 807b417577dSAdrian Hunter dma_ch = host->dma_ch; 80831463b14SVenkatraman S spin_unlock_irqrestore(&host->irq_lock, flags); 809b417577dSAdrian Hunter 810b417577dSAdrian Hunter omap_hsmmc_disable_irq(host); 811b417577dSAdrian Hunter /* Do not complete the request if DMA is still in progress */ 812b417577dSAdrian Hunter if (mrq->data && host->use_dma && dma_ch != -1) 813b417577dSAdrian Hunter return; 814b417577dSAdrian Hunter host->mrq = NULL; 815b417577dSAdrian Hunter mmc_request_done(host->mmc, mrq); 816b417577dSAdrian Hunter } 817b417577dSAdrian Hunter 818a45c6cb8SMadhusudhan Chikkature /* 819a45c6cb8SMadhusudhan Chikkature * Notify the transfer complete to MMC core 820a45c6cb8SMadhusudhan Chikkature */ 821a45c6cb8SMadhusudhan Chikkature static void 82270a3341aSDenis Karpov omap_hsmmc_xfer_done(struct omap_hsmmc_host *host, struct mmc_data *data) 823a45c6cb8SMadhusudhan Chikkature { 8244a694dc9SAdrian Hunter if (!data) { 8254a694dc9SAdrian Hunter struct mmc_request *mrq = host->mrq; 8264a694dc9SAdrian Hunter 82723050103SAdrian Hunter /* TC before CC from CMD6 - don't know why, but it happens */ 82823050103SAdrian Hunter if (host->cmd && host->cmd->opcode == 6 && 82923050103SAdrian Hunter host->response_busy) { 83023050103SAdrian Hunter host->response_busy = 0; 83123050103SAdrian Hunter return; 83223050103SAdrian Hunter } 83323050103SAdrian Hunter 834b417577dSAdrian Hunter omap_hsmmc_request_done(host, mrq); 8354a694dc9SAdrian Hunter return; 8364a694dc9SAdrian Hunter } 8374a694dc9SAdrian Hunter 838a45c6cb8SMadhusudhan Chikkature host->data = NULL; 839a45c6cb8SMadhusudhan Chikkature 840a45c6cb8SMadhusudhan Chikkature if (!data->error) 841a45c6cb8SMadhusudhan Chikkature data->bytes_xfered += data->blocks * (data->blksz); 842a45c6cb8SMadhusudhan Chikkature else 843a45c6cb8SMadhusudhan Chikkature data->bytes_xfered = 0; 844a45c6cb8SMadhusudhan Chikkature 845fe852273SMing Lei if (!data->stop) { 846dba3c29eSBalaji T K omap_hsmmc_request_done(host, data->mrq); 847fe852273SMing Lei return; 848dba3c29eSBalaji T K } 849fe852273SMing Lei omap_hsmmc_start_command(host, data->stop, NULL); 850a45c6cb8SMadhusudhan Chikkature } 851a45c6cb8SMadhusudhan Chikkature 852a45c6cb8SMadhusudhan Chikkature /* 853a45c6cb8SMadhusudhan Chikkature * Notify the core about command completion 854a45c6cb8SMadhusudhan Chikkature */ 855a45c6cb8SMadhusudhan Chikkature static void 85670a3341aSDenis Karpov omap_hsmmc_cmd_done(struct omap_hsmmc_host *host, struct mmc_command *cmd) 857a45c6cb8SMadhusudhan Chikkature { 858a45c6cb8SMadhusudhan Chikkature host->cmd = NULL; 859a45c6cb8SMadhusudhan Chikkature 860a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_PRESENT) { 861a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_136) { 862a45c6cb8SMadhusudhan Chikkature /* response type 2 */ 863a45c6cb8SMadhusudhan Chikkature cmd->resp[3] = OMAP_HSMMC_READ(host->base, RSP10); 864a45c6cb8SMadhusudhan Chikkature cmd->resp[2] = OMAP_HSMMC_READ(host->base, RSP32); 865a45c6cb8SMadhusudhan Chikkature cmd->resp[1] = OMAP_HSMMC_READ(host->base, RSP54); 866a45c6cb8SMadhusudhan Chikkature cmd->resp[0] = OMAP_HSMMC_READ(host->base, RSP76); 867a45c6cb8SMadhusudhan Chikkature } else { 868a45c6cb8SMadhusudhan Chikkature /* response types 1, 1b, 3, 4, 5, 6 */ 869a45c6cb8SMadhusudhan Chikkature cmd->resp[0] = OMAP_HSMMC_READ(host->base, RSP10); 870a45c6cb8SMadhusudhan Chikkature } 871a45c6cb8SMadhusudhan Chikkature } 872b417577dSAdrian Hunter if ((host->data == NULL && !host->response_busy) || cmd->error) 873b417577dSAdrian Hunter omap_hsmmc_request_done(host, cmd->mrq); 874a45c6cb8SMadhusudhan Chikkature } 875a45c6cb8SMadhusudhan Chikkature 876a45c6cb8SMadhusudhan Chikkature /* 877a45c6cb8SMadhusudhan Chikkature * DMA clean up for command errors 878a45c6cb8SMadhusudhan Chikkature */ 87970a3341aSDenis Karpov static void omap_hsmmc_dma_cleanup(struct omap_hsmmc_host *host, int errno) 880a45c6cb8SMadhusudhan Chikkature { 881b417577dSAdrian Hunter int dma_ch; 88231463b14SVenkatraman S unsigned long flags; 883b417577dSAdrian Hunter 88482788ff5SJarkko Lavinen host->data->error = errno; 885a45c6cb8SMadhusudhan Chikkature 88631463b14SVenkatraman S spin_lock_irqsave(&host->irq_lock, flags); 887b417577dSAdrian Hunter dma_ch = host->dma_ch; 888b417577dSAdrian Hunter host->dma_ch = -1; 88931463b14SVenkatraman S spin_unlock_irqrestore(&host->irq_lock, flags); 890b417577dSAdrian Hunter 891b417577dSAdrian Hunter if (host->use_dma && dma_ch != -1) { 892a9120c33SPer Forlin dma_unmap_sg(mmc_dev(host->mmc), host->data->sg, 893a9120c33SPer Forlin host->data->sg_len, 89470a3341aSDenis Karpov omap_hsmmc_get_dma_dir(host, host->data)); 895b417577dSAdrian Hunter omap_free_dma(dma_ch); 896053bf34fSPer Forlin host->data->host_cookie = 0; 897a45c6cb8SMadhusudhan Chikkature } 898a45c6cb8SMadhusudhan Chikkature host->data = NULL; 899a45c6cb8SMadhusudhan Chikkature } 900a45c6cb8SMadhusudhan Chikkature 901a45c6cb8SMadhusudhan Chikkature /* 902a45c6cb8SMadhusudhan Chikkature * Readable error output 903a45c6cb8SMadhusudhan Chikkature */ 904a45c6cb8SMadhusudhan Chikkature #ifdef CONFIG_MMC_DEBUG 905699b958bSAdrian Hunter static void omap_hsmmc_dbg_report_irq(struct omap_hsmmc_host *host, u32 status) 906a45c6cb8SMadhusudhan Chikkature { 907a45c6cb8SMadhusudhan Chikkature /* --- means reserved bit without definition at documentation */ 90870a3341aSDenis Karpov static const char *omap_hsmmc_status_bits[] = { 909699b958bSAdrian Hunter "CC" , "TC" , "BGE", "---", "BWR" , "BRR" , "---" , "---" , 910699b958bSAdrian Hunter "CIRQ", "OBI" , "---", "---", "---" , "---" , "---" , "ERRI", 911699b958bSAdrian Hunter "CTO" , "CCRC", "CEB", "CIE", "DTO" , "DCRC", "DEB" , "---" , 912699b958bSAdrian Hunter "ACE" , "---" , "---", "---", "CERR", "BADA", "---" , "---" 913a45c6cb8SMadhusudhan Chikkature }; 914a45c6cb8SMadhusudhan Chikkature char res[256]; 915a45c6cb8SMadhusudhan Chikkature char *buf = res; 916a45c6cb8SMadhusudhan Chikkature int len, i; 917a45c6cb8SMadhusudhan Chikkature 918a45c6cb8SMadhusudhan Chikkature len = sprintf(buf, "MMC IRQ 0x%x :", status); 919a45c6cb8SMadhusudhan Chikkature buf += len; 920a45c6cb8SMadhusudhan Chikkature 92170a3341aSDenis Karpov for (i = 0; i < ARRAY_SIZE(omap_hsmmc_status_bits); i++) 922a45c6cb8SMadhusudhan Chikkature if (status & (1 << i)) { 92370a3341aSDenis Karpov len = sprintf(buf, " %s", omap_hsmmc_status_bits[i]); 924a45c6cb8SMadhusudhan Chikkature buf += len; 925a45c6cb8SMadhusudhan Chikkature } 926a45c6cb8SMadhusudhan Chikkature 927a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "%s\n", res); 928a45c6cb8SMadhusudhan Chikkature } 929699b958bSAdrian Hunter #else 930699b958bSAdrian Hunter static inline void omap_hsmmc_dbg_report_irq(struct omap_hsmmc_host *host, 931699b958bSAdrian Hunter u32 status) 932699b958bSAdrian Hunter { 933699b958bSAdrian Hunter } 934a45c6cb8SMadhusudhan Chikkature #endif /* CONFIG_MMC_DEBUG */ 935a45c6cb8SMadhusudhan Chikkature 9363ebf74b1SJean Pihet /* 9373ebf74b1SJean Pihet * MMC controller internal state machines reset 9383ebf74b1SJean Pihet * 9393ebf74b1SJean Pihet * Used to reset command or data internal state machines, using respectively 9403ebf74b1SJean Pihet * SRC or SRD bit of SYSCTL register 9413ebf74b1SJean Pihet * Can be called from interrupt context 9423ebf74b1SJean Pihet */ 94370a3341aSDenis Karpov static inline void omap_hsmmc_reset_controller_fsm(struct omap_hsmmc_host *host, 9443ebf74b1SJean Pihet unsigned long bit) 9453ebf74b1SJean Pihet { 9463ebf74b1SJean Pihet unsigned long i = 0; 9473ebf74b1SJean Pihet unsigned long limit = (loops_per_jiffy * 9483ebf74b1SJean Pihet msecs_to_jiffies(MMC_TIMEOUT_MS)); 9493ebf74b1SJean Pihet 9503ebf74b1SJean Pihet OMAP_HSMMC_WRITE(host->base, SYSCTL, 9513ebf74b1SJean Pihet OMAP_HSMMC_READ(host->base, SYSCTL) | bit); 9523ebf74b1SJean Pihet 95307ad64b6SMadhusudhan Chikkature /* 95407ad64b6SMadhusudhan Chikkature * OMAP4 ES2 and greater has an updated reset logic. 95507ad64b6SMadhusudhan Chikkature * Monitor a 0->1 transition first 95607ad64b6SMadhusudhan Chikkature */ 95707ad64b6SMadhusudhan Chikkature if (mmc_slot(host).features & HSMMC_HAS_UPDATED_RESET) { 958b432b4b3Skishore kadiyala while ((!(OMAP_HSMMC_READ(host->base, SYSCTL) & bit)) 95907ad64b6SMadhusudhan Chikkature && (i++ < limit)) 96007ad64b6SMadhusudhan Chikkature cpu_relax(); 96107ad64b6SMadhusudhan Chikkature } 96207ad64b6SMadhusudhan Chikkature i = 0; 96307ad64b6SMadhusudhan Chikkature 9643ebf74b1SJean Pihet while ((OMAP_HSMMC_READ(host->base, SYSCTL) & bit) && 9653ebf74b1SJean Pihet (i++ < limit)) 9663ebf74b1SJean Pihet cpu_relax(); 9673ebf74b1SJean Pihet 9683ebf74b1SJean Pihet if (OMAP_HSMMC_READ(host->base, SYSCTL) & bit) 9693ebf74b1SJean Pihet dev_err(mmc_dev(host->mmc), 9703ebf74b1SJean Pihet "Timeout waiting on controller reset in %s\n", 9713ebf74b1SJean Pihet __func__); 9723ebf74b1SJean Pihet } 973a45c6cb8SMadhusudhan Chikkature 974b417577dSAdrian Hunter static void omap_hsmmc_do_irq(struct omap_hsmmc_host *host, int status) 975a45c6cb8SMadhusudhan Chikkature { 976a45c6cb8SMadhusudhan Chikkature struct mmc_data *data; 977b417577dSAdrian Hunter int end_cmd = 0, end_trans = 0; 978a45c6cb8SMadhusudhan Chikkature 979b417577dSAdrian Hunter if (!host->req_in_progress) { 980b417577dSAdrian Hunter do { 981b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, STAT, status); 98200adadc1SKevin Hilman /* Flush posted write */ 983b417577dSAdrian Hunter status = OMAP_HSMMC_READ(host->base, STAT); 984b417577dSAdrian Hunter } while (status & INT_EN_MASK); 985b417577dSAdrian Hunter return; 986a45c6cb8SMadhusudhan Chikkature } 987a45c6cb8SMadhusudhan Chikkature 988a45c6cb8SMadhusudhan Chikkature data = host->data; 989a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "IRQ Status is %x\n", status); 990a45c6cb8SMadhusudhan Chikkature 991a45c6cb8SMadhusudhan Chikkature if (status & ERR) { 992699b958bSAdrian Hunter omap_hsmmc_dbg_report_irq(host, status); 993a45c6cb8SMadhusudhan Chikkature if ((status & CMD_TIMEOUT) || 994a45c6cb8SMadhusudhan Chikkature (status & CMD_CRC)) { 995a45c6cb8SMadhusudhan Chikkature if (host->cmd) { 996a45c6cb8SMadhusudhan Chikkature if (status & CMD_TIMEOUT) { 99770a3341aSDenis Karpov omap_hsmmc_reset_controller_fsm(host, 998191d1f1dSDenis Karpov SRC); 999a45c6cb8SMadhusudhan Chikkature host->cmd->error = -ETIMEDOUT; 1000a45c6cb8SMadhusudhan Chikkature } else { 1001a45c6cb8SMadhusudhan Chikkature host->cmd->error = -EILSEQ; 1002a45c6cb8SMadhusudhan Chikkature } 1003a45c6cb8SMadhusudhan Chikkature end_cmd = 1; 1004a45c6cb8SMadhusudhan Chikkature } 10054a694dc9SAdrian Hunter if (host->data || host->response_busy) { 10064a694dc9SAdrian Hunter if (host->data) 100770a3341aSDenis Karpov omap_hsmmc_dma_cleanup(host, 100870a3341aSDenis Karpov -ETIMEDOUT); 10094a694dc9SAdrian Hunter host->response_busy = 0; 101070a3341aSDenis Karpov omap_hsmmc_reset_controller_fsm(host, SRD); 1011c232f457SJean Pihet } 1012a45c6cb8SMadhusudhan Chikkature } 1013a45c6cb8SMadhusudhan Chikkature if ((status & DATA_TIMEOUT) || 1014a45c6cb8SMadhusudhan Chikkature (status & DATA_CRC)) { 10154a694dc9SAdrian Hunter if (host->data || host->response_busy) { 10164a694dc9SAdrian Hunter int err = (status & DATA_TIMEOUT) ? 10174a694dc9SAdrian Hunter -ETIMEDOUT : -EILSEQ; 10184a694dc9SAdrian Hunter 10194a694dc9SAdrian Hunter if (host->data) 102070a3341aSDenis Karpov omap_hsmmc_dma_cleanup(host, err); 1021a45c6cb8SMadhusudhan Chikkature else 10224a694dc9SAdrian Hunter host->mrq->cmd->error = err; 10234a694dc9SAdrian Hunter host->response_busy = 0; 102470a3341aSDenis Karpov omap_hsmmc_reset_controller_fsm(host, SRD); 1025a45c6cb8SMadhusudhan Chikkature end_trans = 1; 1026a45c6cb8SMadhusudhan Chikkature } 1027a45c6cb8SMadhusudhan Chikkature } 1028a45c6cb8SMadhusudhan Chikkature if (status & CARD_ERR) { 1029a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1030a45c6cb8SMadhusudhan Chikkature "Ignoring card err CMD%d\n", host->cmd->opcode); 1031a45c6cb8SMadhusudhan Chikkature if (host->cmd) 1032a45c6cb8SMadhusudhan Chikkature end_cmd = 1; 1033a45c6cb8SMadhusudhan Chikkature if (host->data) 1034a45c6cb8SMadhusudhan Chikkature end_trans = 1; 1035a45c6cb8SMadhusudhan Chikkature } 1036a45c6cb8SMadhusudhan Chikkature } 1037a45c6cb8SMadhusudhan Chikkature 1038a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, STAT, status); 1039a45c6cb8SMadhusudhan Chikkature 1040a8fe29d8SJarkko Lavinen if (end_cmd || ((status & CC) && host->cmd)) 104170a3341aSDenis Karpov omap_hsmmc_cmd_done(host, host->cmd); 10420a40e647SJarkko Lavinen if ((end_trans || (status & TC)) && host->mrq) 104370a3341aSDenis Karpov omap_hsmmc_xfer_done(host, data); 1044b417577dSAdrian Hunter } 1045a45c6cb8SMadhusudhan Chikkature 1046b417577dSAdrian Hunter /* 1047b417577dSAdrian Hunter * MMC controller IRQ handler 1048b417577dSAdrian Hunter */ 1049b417577dSAdrian Hunter static irqreturn_t omap_hsmmc_irq(int irq, void *dev_id) 1050b417577dSAdrian Hunter { 1051b417577dSAdrian Hunter struct omap_hsmmc_host *host = dev_id; 1052b417577dSAdrian Hunter int status; 1053b417577dSAdrian Hunter 1054b417577dSAdrian Hunter status = OMAP_HSMMC_READ(host->base, STAT); 1055b417577dSAdrian Hunter do { 1056b417577dSAdrian Hunter omap_hsmmc_do_irq(host, status); 1057b417577dSAdrian Hunter /* Flush posted write */ 1058b417577dSAdrian Hunter status = OMAP_HSMMC_READ(host->base, STAT); 1059b417577dSAdrian Hunter } while (status & INT_EN_MASK); 10604dffd7a2SAdrian Hunter 1061a45c6cb8SMadhusudhan Chikkature return IRQ_HANDLED; 1062a45c6cb8SMadhusudhan Chikkature } 1063a45c6cb8SMadhusudhan Chikkature 106470a3341aSDenis Karpov static void set_sd_bus_power(struct omap_hsmmc_host *host) 1065e13bb300SAdrian Hunter { 1066e13bb300SAdrian Hunter unsigned long i; 1067e13bb300SAdrian Hunter 1068e13bb300SAdrian Hunter OMAP_HSMMC_WRITE(host->base, HCTL, 1069e13bb300SAdrian Hunter OMAP_HSMMC_READ(host->base, HCTL) | SDBP); 1070e13bb300SAdrian Hunter for (i = 0; i < loops_per_jiffy; i++) { 1071e13bb300SAdrian Hunter if (OMAP_HSMMC_READ(host->base, HCTL) & SDBP) 1072e13bb300SAdrian Hunter break; 1073e13bb300SAdrian Hunter cpu_relax(); 1074e13bb300SAdrian Hunter } 1075e13bb300SAdrian Hunter } 1076e13bb300SAdrian Hunter 1077a45c6cb8SMadhusudhan Chikkature /* 1078eb250826SDavid Brownell * Switch MMC interface voltage ... only relevant for MMC1. 1079eb250826SDavid Brownell * 1080eb250826SDavid Brownell * MMC2 and MMC3 use fixed 1.8V levels, and maybe a transceiver. 1081eb250826SDavid Brownell * The MMC2 transceiver controls are used instead of DAT4..DAT7. 1082eb250826SDavid Brownell * Some chips, like eMMC ones, use internal transceivers. 1083a45c6cb8SMadhusudhan Chikkature */ 108470a3341aSDenis Karpov static int omap_hsmmc_switch_opcond(struct omap_hsmmc_host *host, int vdd) 1085a45c6cb8SMadhusudhan Chikkature { 1086a45c6cb8SMadhusudhan Chikkature u32 reg_val = 0; 1087a45c6cb8SMadhusudhan Chikkature int ret; 1088a45c6cb8SMadhusudhan Chikkature 1089a45c6cb8SMadhusudhan Chikkature /* Disable the clocks */ 1090fa4aa2d4SBalaji T K pm_runtime_put_sync(host->dev); 1091cd03d9a8SRajendra Nayak if (host->dbclk) 109294c18149SRajendra Nayak clk_disable_unprepare(host->dbclk); 1093a45c6cb8SMadhusudhan Chikkature 1094a45c6cb8SMadhusudhan Chikkature /* Turn the power off */ 1095a45c6cb8SMadhusudhan Chikkature ret = mmc_slot(host).set_power(host->dev, host->slot_id, 0, 0); 1096a45c6cb8SMadhusudhan Chikkature 1097a45c6cb8SMadhusudhan Chikkature /* Turn the power ON with given VDD 1.8 or 3.0v */ 10982bec0893SAdrian Hunter if (!ret) 10992bec0893SAdrian Hunter ret = mmc_slot(host).set_power(host->dev, host->slot_id, 1, 11002bec0893SAdrian Hunter vdd); 1101fa4aa2d4SBalaji T K pm_runtime_get_sync(host->dev); 1102cd03d9a8SRajendra Nayak if (host->dbclk) 110394c18149SRajendra Nayak clk_prepare_enable(host->dbclk); 11042bec0893SAdrian Hunter 1105a45c6cb8SMadhusudhan Chikkature if (ret != 0) 1106a45c6cb8SMadhusudhan Chikkature goto err; 1107a45c6cb8SMadhusudhan Chikkature 1108a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 1109a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) & SDVSCLR); 1110a45c6cb8SMadhusudhan Chikkature reg_val = OMAP_HSMMC_READ(host->base, HCTL); 1111eb250826SDavid Brownell 1112a45c6cb8SMadhusudhan Chikkature /* 1113a45c6cb8SMadhusudhan Chikkature * If a MMC dual voltage card is detected, the set_ios fn calls 1114a45c6cb8SMadhusudhan Chikkature * this fn with VDD bit set for 1.8V. Upon card removal from the 111570a3341aSDenis Karpov * slot, omap_hsmmc_set_ios sets the VDD back to 3V on MMC_POWER_OFF. 1116a45c6cb8SMadhusudhan Chikkature * 1117eb250826SDavid Brownell * Cope with a bit of slop in the range ... per data sheets: 1118eb250826SDavid Brownell * - "1.8V" for vdds_mmc1/vdds_mmc1a can be up to 2.45V max, 1119eb250826SDavid Brownell * but recommended values are 1.71V to 1.89V 1120eb250826SDavid Brownell * - "3.0V" for vdds_mmc1/vdds_mmc1a can be up to 3.5V max, 1121eb250826SDavid Brownell * but recommended values are 2.7V to 3.3V 1122eb250826SDavid Brownell * 1123eb250826SDavid Brownell * Board setup code shouldn't permit anything very out-of-range. 1124eb250826SDavid Brownell * TWL4030-family VMMC1 and VSIM regulators are fine (avoiding the 1125eb250826SDavid Brownell * middle range) but VSIM can't power DAT4..DAT7 at more than 3V. 1126a45c6cb8SMadhusudhan Chikkature */ 1127eb250826SDavid Brownell if ((1 << vdd) <= MMC_VDD_23_24) 1128a45c6cb8SMadhusudhan Chikkature reg_val |= SDVS18; 1129eb250826SDavid Brownell else 1130eb250826SDavid Brownell reg_val |= SDVS30; 1131a45c6cb8SMadhusudhan Chikkature 1132a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, reg_val); 1133e13bb300SAdrian Hunter set_sd_bus_power(host); 1134a45c6cb8SMadhusudhan Chikkature 1135a45c6cb8SMadhusudhan Chikkature return 0; 1136a45c6cb8SMadhusudhan Chikkature err: 1137a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Unable to switch operating voltage\n"); 1138a45c6cb8SMadhusudhan Chikkature return ret; 1139a45c6cb8SMadhusudhan Chikkature } 1140a45c6cb8SMadhusudhan Chikkature 1141b62f6228SAdrian Hunter /* Protect the card while the cover is open */ 1142b62f6228SAdrian Hunter static void omap_hsmmc_protect_card(struct omap_hsmmc_host *host) 1143b62f6228SAdrian Hunter { 1144b62f6228SAdrian Hunter if (!mmc_slot(host).get_cover_state) 1145b62f6228SAdrian Hunter return; 1146b62f6228SAdrian Hunter 1147b62f6228SAdrian Hunter host->reqs_blocked = 0; 1148b62f6228SAdrian Hunter if (mmc_slot(host).get_cover_state(host->dev, host->slot_id)) { 1149b62f6228SAdrian Hunter if (host->protect_card) { 11502cecdf00SRajendra Nayak dev_info(host->dev, "%s: cover is closed, " 1151b62f6228SAdrian Hunter "card is now accessible\n", 1152b62f6228SAdrian Hunter mmc_hostname(host->mmc)); 1153b62f6228SAdrian Hunter host->protect_card = 0; 1154b62f6228SAdrian Hunter } 1155b62f6228SAdrian Hunter } else { 1156b62f6228SAdrian Hunter if (!host->protect_card) { 11572cecdf00SRajendra Nayak dev_info(host->dev, "%s: cover is open, " 1158b62f6228SAdrian Hunter "card is now inaccessible\n", 1159b62f6228SAdrian Hunter mmc_hostname(host->mmc)); 1160b62f6228SAdrian Hunter host->protect_card = 1; 1161b62f6228SAdrian Hunter } 1162b62f6228SAdrian Hunter } 1163b62f6228SAdrian Hunter } 1164b62f6228SAdrian Hunter 1165a45c6cb8SMadhusudhan Chikkature /* 11667efab4f3SNeilBrown * irq handler to notify the core about card insertion/removal 1167a45c6cb8SMadhusudhan Chikkature */ 11687efab4f3SNeilBrown static irqreturn_t omap_hsmmc_detect(int irq, void *dev_id) 1169a45c6cb8SMadhusudhan Chikkature { 11707efab4f3SNeilBrown struct omap_hsmmc_host *host = dev_id; 1171249d0fa9SDavid Brownell struct omap_mmc_slot_data *slot = &mmc_slot(host); 1172a6b2240dSAdrian Hunter int carddetect; 1173249d0fa9SDavid Brownell 1174a6b2240dSAdrian Hunter if (host->suspended) 11757efab4f3SNeilBrown return IRQ_HANDLED; 1176a45c6cb8SMadhusudhan Chikkature 1177a45c6cb8SMadhusudhan Chikkature sysfs_notify(&host->mmc->class_dev.kobj, NULL, "cover_switch"); 1178a6b2240dSAdrian Hunter 1179191d1f1dSDenis Karpov if (slot->card_detect) 1180db0fefc5SAdrian Hunter carddetect = slot->card_detect(host->dev, host->slot_id); 1181b62f6228SAdrian Hunter else { 1182b62f6228SAdrian Hunter omap_hsmmc_protect_card(host); 1183a6b2240dSAdrian Hunter carddetect = -ENOSYS; 1184b62f6228SAdrian Hunter } 1185a6b2240dSAdrian Hunter 1186cdeebaddSMadhusudhan Chikkature if (carddetect) 1187a45c6cb8SMadhusudhan Chikkature mmc_detect_change(host->mmc, (HZ * 200) / 1000); 1188cdeebaddSMadhusudhan Chikkature else 1189a45c6cb8SMadhusudhan Chikkature mmc_detect_change(host->mmc, (HZ * 50) / 1000); 1190a45c6cb8SMadhusudhan Chikkature return IRQ_HANDLED; 1191a45c6cb8SMadhusudhan Chikkature } 1192a45c6cb8SMadhusudhan Chikkature 119370a3341aSDenis Karpov static int omap_hsmmc_get_dma_sync_dev(struct omap_hsmmc_host *host, 11940ccd76d4SJuha Yrjola struct mmc_data *data) 11950ccd76d4SJuha Yrjola { 11960ccd76d4SJuha Yrjola int sync_dev; 11970ccd76d4SJuha Yrjola 1198f3e2f1ddSGrazvydas Ignotas if (data->flags & MMC_DATA_WRITE) 1199f3e2f1ddSGrazvydas Ignotas sync_dev = host->dma_line_tx; 12000ccd76d4SJuha Yrjola else 1201f3e2f1ddSGrazvydas Ignotas sync_dev = host->dma_line_rx; 12020ccd76d4SJuha Yrjola return sync_dev; 12030ccd76d4SJuha Yrjola } 12040ccd76d4SJuha Yrjola 120570a3341aSDenis Karpov static void omap_hsmmc_config_dma_params(struct omap_hsmmc_host *host, 12060ccd76d4SJuha Yrjola struct mmc_data *data, 12070ccd76d4SJuha Yrjola struct scatterlist *sgl) 12080ccd76d4SJuha Yrjola { 12090ccd76d4SJuha Yrjola int blksz, nblk, dma_ch; 12100ccd76d4SJuha Yrjola 12110ccd76d4SJuha Yrjola dma_ch = host->dma_ch; 12120ccd76d4SJuha Yrjola if (data->flags & MMC_DATA_WRITE) { 12130ccd76d4SJuha Yrjola omap_set_dma_dest_params(dma_ch, 0, OMAP_DMA_AMODE_CONSTANT, 12140ccd76d4SJuha Yrjola (host->mapbase + OMAP_HSMMC_DATA), 0, 0); 12150ccd76d4SJuha Yrjola omap_set_dma_src_params(dma_ch, 0, OMAP_DMA_AMODE_POST_INC, 12160ccd76d4SJuha Yrjola sg_dma_address(sgl), 0, 0); 12170ccd76d4SJuha Yrjola } else { 12180ccd76d4SJuha Yrjola omap_set_dma_src_params(dma_ch, 0, OMAP_DMA_AMODE_CONSTANT, 12190ccd76d4SJuha Yrjola (host->mapbase + OMAP_HSMMC_DATA), 0, 0); 12200ccd76d4SJuha Yrjola omap_set_dma_dest_params(dma_ch, 0, OMAP_DMA_AMODE_POST_INC, 12210ccd76d4SJuha Yrjola sg_dma_address(sgl), 0, 0); 12220ccd76d4SJuha Yrjola } 12230ccd76d4SJuha Yrjola 12240ccd76d4SJuha Yrjola blksz = host->data->blksz; 12250ccd76d4SJuha Yrjola nblk = sg_dma_len(sgl) / blksz; 12260ccd76d4SJuha Yrjola 12270ccd76d4SJuha Yrjola omap_set_dma_transfer_params(dma_ch, OMAP_DMA_DATA_TYPE_S32, 12280ccd76d4SJuha Yrjola blksz / 4, nblk, OMAP_DMA_SYNC_FRAME, 122970a3341aSDenis Karpov omap_hsmmc_get_dma_sync_dev(host, data), 12300ccd76d4SJuha Yrjola !(data->flags & MMC_DATA_WRITE)); 12310ccd76d4SJuha Yrjola 12320ccd76d4SJuha Yrjola omap_start_dma(dma_ch); 12330ccd76d4SJuha Yrjola } 12340ccd76d4SJuha Yrjola 1235a45c6cb8SMadhusudhan Chikkature /* 1236a45c6cb8SMadhusudhan Chikkature * DMA call back function 1237a45c6cb8SMadhusudhan Chikkature */ 1238b417577dSAdrian Hunter static void omap_hsmmc_dma_cb(int lch, u16 ch_status, void *cb_data) 1239a45c6cb8SMadhusudhan Chikkature { 1240b417577dSAdrian Hunter struct omap_hsmmc_host *host = cb_data; 1241770d7432SAdrian Hunter struct mmc_data *data; 1242b417577dSAdrian Hunter int dma_ch, req_in_progress; 124331463b14SVenkatraman S unsigned long flags; 1244a45c6cb8SMadhusudhan Chikkature 1245f3584e5eSVenkatraman S if (!(ch_status & OMAP_DMA_BLOCK_IRQ)) { 1246f3584e5eSVenkatraman S dev_warn(mmc_dev(host->mmc), "unexpected dma status %x\n", 1247f3584e5eSVenkatraman S ch_status); 1248f3584e5eSVenkatraman S return; 1249f3584e5eSVenkatraman S } 1250a45c6cb8SMadhusudhan Chikkature 125131463b14SVenkatraman S spin_lock_irqsave(&host->irq_lock, flags); 1252b417577dSAdrian Hunter if (host->dma_ch < 0) { 125331463b14SVenkatraman S spin_unlock_irqrestore(&host->irq_lock, flags); 1254a45c6cb8SMadhusudhan Chikkature return; 1255b417577dSAdrian Hunter } 1256a45c6cb8SMadhusudhan Chikkature 1257770d7432SAdrian Hunter data = host->mrq->data; 12580ccd76d4SJuha Yrjola host->dma_sg_idx++; 12590ccd76d4SJuha Yrjola if (host->dma_sg_idx < host->dma_len) { 12600ccd76d4SJuha Yrjola /* Fire up the next transfer. */ 1261b417577dSAdrian Hunter omap_hsmmc_config_dma_params(host, data, 1262b417577dSAdrian Hunter data->sg + host->dma_sg_idx); 126331463b14SVenkatraman S spin_unlock_irqrestore(&host->irq_lock, flags); 12640ccd76d4SJuha Yrjola return; 12650ccd76d4SJuha Yrjola } 12660ccd76d4SJuha Yrjola 12679782aff8SPer Forlin if (!data->host_cookie) 1268a9120c33SPer Forlin dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len, 1269b417577dSAdrian Hunter omap_hsmmc_get_dma_dir(host, data)); 1270b417577dSAdrian Hunter 1271b417577dSAdrian Hunter req_in_progress = host->req_in_progress; 1272b417577dSAdrian Hunter dma_ch = host->dma_ch; 1273a45c6cb8SMadhusudhan Chikkature host->dma_ch = -1; 127431463b14SVenkatraman S spin_unlock_irqrestore(&host->irq_lock, flags); 1275b417577dSAdrian Hunter 1276b417577dSAdrian Hunter omap_free_dma(dma_ch); 1277b417577dSAdrian Hunter 1278b417577dSAdrian Hunter /* If DMA has finished after TC, complete the request */ 1279b417577dSAdrian Hunter if (!req_in_progress) { 1280b417577dSAdrian Hunter struct mmc_request *mrq = host->mrq; 1281b417577dSAdrian Hunter 1282b417577dSAdrian Hunter host->mrq = NULL; 1283b417577dSAdrian Hunter mmc_request_done(host->mmc, mrq); 1284b417577dSAdrian Hunter } 1285a45c6cb8SMadhusudhan Chikkature } 1286a45c6cb8SMadhusudhan Chikkature 12879782aff8SPer Forlin static int omap_hsmmc_pre_dma_transfer(struct omap_hsmmc_host *host, 12889782aff8SPer Forlin struct mmc_data *data, 12899782aff8SPer Forlin struct omap_hsmmc_next *next) 12909782aff8SPer Forlin { 12919782aff8SPer Forlin int dma_len; 12929782aff8SPer Forlin 12939782aff8SPer Forlin if (!next && data->host_cookie && 12949782aff8SPer Forlin data->host_cookie != host->next_data.cookie) { 12952cecdf00SRajendra Nayak dev_warn(host->dev, "[%s] invalid cookie: data->host_cookie %d" 12969782aff8SPer Forlin " host->next_data.cookie %d\n", 12979782aff8SPer Forlin __func__, data->host_cookie, host->next_data.cookie); 12989782aff8SPer Forlin data->host_cookie = 0; 12999782aff8SPer Forlin } 13009782aff8SPer Forlin 13019782aff8SPer Forlin /* Check if next job is already prepared */ 13029782aff8SPer Forlin if (next || 13039782aff8SPer Forlin (!next && data->host_cookie != host->next_data.cookie)) { 13049782aff8SPer Forlin dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg, 13059782aff8SPer Forlin data->sg_len, 13069782aff8SPer Forlin omap_hsmmc_get_dma_dir(host, data)); 13079782aff8SPer Forlin 13089782aff8SPer Forlin } else { 13099782aff8SPer Forlin dma_len = host->next_data.dma_len; 13109782aff8SPer Forlin host->next_data.dma_len = 0; 13119782aff8SPer Forlin } 13129782aff8SPer Forlin 13139782aff8SPer Forlin 13149782aff8SPer Forlin if (dma_len == 0) 13159782aff8SPer Forlin return -EINVAL; 13169782aff8SPer Forlin 13179782aff8SPer Forlin if (next) { 13189782aff8SPer Forlin next->dma_len = dma_len; 13199782aff8SPer Forlin data->host_cookie = ++next->cookie < 0 ? 1 : next->cookie; 13209782aff8SPer Forlin } else 13219782aff8SPer Forlin host->dma_len = dma_len; 13229782aff8SPer Forlin 13239782aff8SPer Forlin return 0; 13249782aff8SPer Forlin } 13259782aff8SPer Forlin 1326a45c6cb8SMadhusudhan Chikkature /* 1327a45c6cb8SMadhusudhan Chikkature * Routine to configure and start DMA for the MMC card 1328a45c6cb8SMadhusudhan Chikkature */ 132970a3341aSDenis Karpov static int omap_hsmmc_start_dma_transfer(struct omap_hsmmc_host *host, 133070a3341aSDenis Karpov struct mmc_request *req) 1331a45c6cb8SMadhusudhan Chikkature { 1332b417577dSAdrian Hunter int dma_ch = 0, ret = 0, i; 1333a45c6cb8SMadhusudhan Chikkature struct mmc_data *data = req->data; 1334a45c6cb8SMadhusudhan Chikkature 13350ccd76d4SJuha Yrjola /* Sanity check: all the SG entries must be aligned by block size. */ 1336a3f406f8SJarkko Lavinen for (i = 0; i < data->sg_len; i++) { 13370ccd76d4SJuha Yrjola struct scatterlist *sgl; 13380ccd76d4SJuha Yrjola 13390ccd76d4SJuha Yrjola sgl = data->sg + i; 13400ccd76d4SJuha Yrjola if (sgl->length % data->blksz) 13410ccd76d4SJuha Yrjola return -EINVAL; 13420ccd76d4SJuha Yrjola } 13430ccd76d4SJuha Yrjola if ((data->blksz % 4) != 0) 13440ccd76d4SJuha Yrjola /* REVISIT: The MMC buffer increments only when MSB is written. 13450ccd76d4SJuha Yrjola * Return error for blksz which is non multiple of four. 13460ccd76d4SJuha Yrjola */ 13470ccd76d4SJuha Yrjola return -EINVAL; 13480ccd76d4SJuha Yrjola 1349b417577dSAdrian Hunter BUG_ON(host->dma_ch != -1); 1350a45c6cb8SMadhusudhan Chikkature 135170a3341aSDenis Karpov ret = omap_request_dma(omap_hsmmc_get_dma_sync_dev(host, data), 135270a3341aSDenis Karpov "MMC/SD", omap_hsmmc_dma_cb, host, &dma_ch); 1353a45c6cb8SMadhusudhan Chikkature if (ret != 0) { 13540ccd76d4SJuha Yrjola dev_err(mmc_dev(host->mmc), 1355a45c6cb8SMadhusudhan Chikkature "%s: omap_request_dma() failed with %d\n", 1356a45c6cb8SMadhusudhan Chikkature mmc_hostname(host->mmc), ret); 1357a45c6cb8SMadhusudhan Chikkature return ret; 1358a45c6cb8SMadhusudhan Chikkature } 13599782aff8SPer Forlin ret = omap_hsmmc_pre_dma_transfer(host, data, NULL); 13609782aff8SPer Forlin if (ret) 13619782aff8SPer Forlin return ret; 1362a45c6cb8SMadhusudhan Chikkature 1363a45c6cb8SMadhusudhan Chikkature host->dma_ch = dma_ch; 13640ccd76d4SJuha Yrjola host->dma_sg_idx = 0; 1365a45c6cb8SMadhusudhan Chikkature 136670a3341aSDenis Karpov omap_hsmmc_config_dma_params(host, data, data->sg); 1367a45c6cb8SMadhusudhan Chikkature 1368a45c6cb8SMadhusudhan Chikkature return 0; 1369a45c6cb8SMadhusudhan Chikkature } 1370a45c6cb8SMadhusudhan Chikkature 137170a3341aSDenis Karpov static void set_data_timeout(struct omap_hsmmc_host *host, 1372e2bf08d6SAdrian Hunter unsigned int timeout_ns, 1373e2bf08d6SAdrian Hunter unsigned int timeout_clks) 1374a45c6cb8SMadhusudhan Chikkature { 1375a45c6cb8SMadhusudhan Chikkature unsigned int timeout, cycle_ns; 1376a45c6cb8SMadhusudhan Chikkature uint32_t reg, clkd, dto = 0; 1377a45c6cb8SMadhusudhan Chikkature 1378a45c6cb8SMadhusudhan Chikkature reg = OMAP_HSMMC_READ(host->base, SYSCTL); 1379a45c6cb8SMadhusudhan Chikkature clkd = (reg & CLKD_MASK) >> CLKD_SHIFT; 1380a45c6cb8SMadhusudhan Chikkature if (clkd == 0) 1381a45c6cb8SMadhusudhan Chikkature clkd = 1; 1382a45c6cb8SMadhusudhan Chikkature 1383a45c6cb8SMadhusudhan Chikkature cycle_ns = 1000000000 / (clk_get_rate(host->fclk) / clkd); 1384e2bf08d6SAdrian Hunter timeout = timeout_ns / cycle_ns; 1385e2bf08d6SAdrian Hunter timeout += timeout_clks; 1386a45c6cb8SMadhusudhan Chikkature if (timeout) { 1387a45c6cb8SMadhusudhan Chikkature while ((timeout & 0x80000000) == 0) { 1388a45c6cb8SMadhusudhan Chikkature dto += 1; 1389a45c6cb8SMadhusudhan Chikkature timeout <<= 1; 1390a45c6cb8SMadhusudhan Chikkature } 1391a45c6cb8SMadhusudhan Chikkature dto = 31 - dto; 1392a45c6cb8SMadhusudhan Chikkature timeout <<= 1; 1393a45c6cb8SMadhusudhan Chikkature if (timeout && dto) 1394a45c6cb8SMadhusudhan Chikkature dto += 1; 1395a45c6cb8SMadhusudhan Chikkature if (dto >= 13) 1396a45c6cb8SMadhusudhan Chikkature dto -= 13; 1397a45c6cb8SMadhusudhan Chikkature else 1398a45c6cb8SMadhusudhan Chikkature dto = 0; 1399a45c6cb8SMadhusudhan Chikkature if (dto > 14) 1400a45c6cb8SMadhusudhan Chikkature dto = 14; 1401a45c6cb8SMadhusudhan Chikkature } 1402a45c6cb8SMadhusudhan Chikkature 1403a45c6cb8SMadhusudhan Chikkature reg &= ~DTO_MASK; 1404a45c6cb8SMadhusudhan Chikkature reg |= dto << DTO_SHIFT; 1405a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, reg); 1406a45c6cb8SMadhusudhan Chikkature } 1407a45c6cb8SMadhusudhan Chikkature 1408a45c6cb8SMadhusudhan Chikkature /* 1409a45c6cb8SMadhusudhan Chikkature * Configure block length for MMC/SD cards and initiate the transfer. 1410a45c6cb8SMadhusudhan Chikkature */ 1411a45c6cb8SMadhusudhan Chikkature static int 141270a3341aSDenis Karpov omap_hsmmc_prepare_data(struct omap_hsmmc_host *host, struct mmc_request *req) 1413a45c6cb8SMadhusudhan Chikkature { 1414a45c6cb8SMadhusudhan Chikkature int ret; 1415a45c6cb8SMadhusudhan Chikkature host->data = req->data; 1416a45c6cb8SMadhusudhan Chikkature 1417a45c6cb8SMadhusudhan Chikkature if (req->data == NULL) { 1418a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, BLK, 0); 1419e2bf08d6SAdrian Hunter /* 1420e2bf08d6SAdrian Hunter * Set an arbitrary 100ms data timeout for commands with 1421e2bf08d6SAdrian Hunter * busy signal. 1422e2bf08d6SAdrian Hunter */ 1423e2bf08d6SAdrian Hunter if (req->cmd->flags & MMC_RSP_BUSY) 1424e2bf08d6SAdrian Hunter set_data_timeout(host, 100000000U, 0); 1425a45c6cb8SMadhusudhan Chikkature return 0; 1426a45c6cb8SMadhusudhan Chikkature } 1427a45c6cb8SMadhusudhan Chikkature 1428a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, BLK, (req->data->blksz) 1429a45c6cb8SMadhusudhan Chikkature | (req->data->blocks << 16)); 1430e2bf08d6SAdrian Hunter set_data_timeout(host, req->data->timeout_ns, req->data->timeout_clks); 1431a45c6cb8SMadhusudhan Chikkature 1432a45c6cb8SMadhusudhan Chikkature if (host->use_dma) { 143370a3341aSDenis Karpov ret = omap_hsmmc_start_dma_transfer(host, req); 1434a45c6cb8SMadhusudhan Chikkature if (ret != 0) { 1435a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "MMC start dma failure\n"); 1436a45c6cb8SMadhusudhan Chikkature return ret; 1437a45c6cb8SMadhusudhan Chikkature } 1438a45c6cb8SMadhusudhan Chikkature } 1439a45c6cb8SMadhusudhan Chikkature return 0; 1440a45c6cb8SMadhusudhan Chikkature } 1441a45c6cb8SMadhusudhan Chikkature 14429782aff8SPer Forlin static void omap_hsmmc_post_req(struct mmc_host *mmc, struct mmc_request *mrq, 14439782aff8SPer Forlin int err) 14449782aff8SPer Forlin { 14459782aff8SPer Forlin struct omap_hsmmc_host *host = mmc_priv(mmc); 14469782aff8SPer Forlin struct mmc_data *data = mrq->data; 14479782aff8SPer Forlin 14489782aff8SPer Forlin if (host->use_dma) { 1449053bf34fSPer Forlin if (data->host_cookie) 1450053bf34fSPer Forlin dma_unmap_sg(mmc_dev(host->mmc), data->sg, 1451053bf34fSPer Forlin data->sg_len, 14529782aff8SPer Forlin omap_hsmmc_get_dma_dir(host, data)); 14539782aff8SPer Forlin data->host_cookie = 0; 14549782aff8SPer Forlin } 14559782aff8SPer Forlin } 14569782aff8SPer Forlin 14579782aff8SPer Forlin static void omap_hsmmc_pre_req(struct mmc_host *mmc, struct mmc_request *mrq, 14589782aff8SPer Forlin bool is_first_req) 14599782aff8SPer Forlin { 14609782aff8SPer Forlin struct omap_hsmmc_host *host = mmc_priv(mmc); 14619782aff8SPer Forlin 14629782aff8SPer Forlin if (mrq->data->host_cookie) { 14639782aff8SPer Forlin mrq->data->host_cookie = 0; 14649782aff8SPer Forlin return ; 14659782aff8SPer Forlin } 14669782aff8SPer Forlin 14679782aff8SPer Forlin if (host->use_dma) 14689782aff8SPer Forlin if (omap_hsmmc_pre_dma_transfer(host, mrq->data, 14699782aff8SPer Forlin &host->next_data)) 14709782aff8SPer Forlin mrq->data->host_cookie = 0; 14719782aff8SPer Forlin } 14729782aff8SPer Forlin 1473a45c6cb8SMadhusudhan Chikkature /* 1474a45c6cb8SMadhusudhan Chikkature * Request function. for read/write operation 1475a45c6cb8SMadhusudhan Chikkature */ 147670a3341aSDenis Karpov static void omap_hsmmc_request(struct mmc_host *mmc, struct mmc_request *req) 1477a45c6cb8SMadhusudhan Chikkature { 147870a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1479a3f406f8SJarkko Lavinen int err; 1480a45c6cb8SMadhusudhan Chikkature 1481b417577dSAdrian Hunter BUG_ON(host->req_in_progress); 1482b417577dSAdrian Hunter BUG_ON(host->dma_ch != -1); 1483b62f6228SAdrian Hunter if (host->protect_card) { 1484b62f6228SAdrian Hunter if (host->reqs_blocked < 3) { 1485b62f6228SAdrian Hunter /* 1486b62f6228SAdrian Hunter * Ensure the controller is left in a consistent 1487b62f6228SAdrian Hunter * state by resetting the command and data state 1488b62f6228SAdrian Hunter * machines. 1489b62f6228SAdrian Hunter */ 1490b62f6228SAdrian Hunter omap_hsmmc_reset_controller_fsm(host, SRD); 1491b62f6228SAdrian Hunter omap_hsmmc_reset_controller_fsm(host, SRC); 1492b62f6228SAdrian Hunter host->reqs_blocked += 1; 1493b62f6228SAdrian Hunter } 1494b62f6228SAdrian Hunter req->cmd->error = -EBADF; 1495b62f6228SAdrian Hunter if (req->data) 1496b62f6228SAdrian Hunter req->data->error = -EBADF; 1497b417577dSAdrian Hunter req->cmd->retries = 0; 1498b62f6228SAdrian Hunter mmc_request_done(mmc, req); 1499b62f6228SAdrian Hunter return; 1500b62f6228SAdrian Hunter } else if (host->reqs_blocked) 1501b62f6228SAdrian Hunter host->reqs_blocked = 0; 1502a45c6cb8SMadhusudhan Chikkature WARN_ON(host->mrq != NULL); 1503a45c6cb8SMadhusudhan Chikkature host->mrq = req; 150470a3341aSDenis Karpov err = omap_hsmmc_prepare_data(host, req); 1505a3f406f8SJarkko Lavinen if (err) { 1506a3f406f8SJarkko Lavinen req->cmd->error = err; 1507a3f406f8SJarkko Lavinen if (req->data) 1508a3f406f8SJarkko Lavinen req->data->error = err; 1509a3f406f8SJarkko Lavinen host->mrq = NULL; 1510a3f406f8SJarkko Lavinen mmc_request_done(mmc, req); 1511a3f406f8SJarkko Lavinen return; 1512a3f406f8SJarkko Lavinen } 1513a3f406f8SJarkko Lavinen 151470a3341aSDenis Karpov omap_hsmmc_start_command(host, req->cmd, req->data); 1515a45c6cb8SMadhusudhan Chikkature } 1516a45c6cb8SMadhusudhan Chikkature 1517a45c6cb8SMadhusudhan Chikkature /* Routine to configure clock values. Exposed API to core */ 151870a3341aSDenis Karpov static void omap_hsmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 1519a45c6cb8SMadhusudhan Chikkature { 152070a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1521a3621465SAdrian Hunter int do_send_init_stream = 0; 1522a45c6cb8SMadhusudhan Chikkature 1523fa4aa2d4SBalaji T K pm_runtime_get_sync(host->dev); 15245e2ea617SAdrian Hunter 1525a3621465SAdrian Hunter if (ios->power_mode != host->power_mode) { 1526a45c6cb8SMadhusudhan Chikkature switch (ios->power_mode) { 1527a45c6cb8SMadhusudhan Chikkature case MMC_POWER_OFF: 1528a3621465SAdrian Hunter mmc_slot(host).set_power(host->dev, host->slot_id, 1529a3621465SAdrian Hunter 0, 0); 1530623821f7SAdrian Hunter host->vdd = 0; 1531a45c6cb8SMadhusudhan Chikkature break; 1532a45c6cb8SMadhusudhan Chikkature case MMC_POWER_UP: 1533a3621465SAdrian Hunter mmc_slot(host).set_power(host->dev, host->slot_id, 1534a3621465SAdrian Hunter 1, ios->vdd); 1535623821f7SAdrian Hunter host->vdd = ios->vdd; 1536a45c6cb8SMadhusudhan Chikkature break; 1537a3621465SAdrian Hunter case MMC_POWER_ON: 1538a3621465SAdrian Hunter do_send_init_stream = 1; 1539a3621465SAdrian Hunter break; 1540a3621465SAdrian Hunter } 1541a3621465SAdrian Hunter host->power_mode = ios->power_mode; 1542a45c6cb8SMadhusudhan Chikkature } 1543a45c6cb8SMadhusudhan Chikkature 1544dd498effSDenis Karpov /* FIXME: set registers based only on changes to ios */ 1545dd498effSDenis Karpov 15463796fb8aSAndy Shevchenko omap_hsmmc_set_bus_width(host); 1547a45c6cb8SMadhusudhan Chikkature 15484621d5f8SKishore Kadiyala if (host->pdata->controller_flags & OMAP_HSMMC_SUPPORTS_DUAL_VOLT) { 1549eb250826SDavid Brownell /* Only MMC1 can interface at 3V without some flavor 1550eb250826SDavid Brownell * of external transceiver; but they all handle 1.8V. 1551eb250826SDavid Brownell */ 1552a45c6cb8SMadhusudhan Chikkature if ((OMAP_HSMMC_READ(host->base, HCTL) & SDVSDET) && 15531f84b71bSRajendra Nayak (ios->vdd == DUAL_VOLT_OCR_BIT) && 15541f84b71bSRajendra Nayak /* 15551f84b71bSRajendra Nayak * With pbias cell programming missing, this 15561f84b71bSRajendra Nayak * can't be allowed when booting with device 15571f84b71bSRajendra Nayak * tree. 15581f84b71bSRajendra Nayak */ 15594d048f91SRajendra Nayak !host->dev->of_node) { 1560a45c6cb8SMadhusudhan Chikkature /* 1561a45c6cb8SMadhusudhan Chikkature * The mmc_select_voltage fn of the core does 1562a45c6cb8SMadhusudhan Chikkature * not seem to set the power_mode to 1563a45c6cb8SMadhusudhan Chikkature * MMC_POWER_UP upon recalculating the voltage. 1564a45c6cb8SMadhusudhan Chikkature * vdd 1.8v. 1565a45c6cb8SMadhusudhan Chikkature */ 156670a3341aSDenis Karpov if (omap_hsmmc_switch_opcond(host, ios->vdd) != 0) 1567a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1568a45c6cb8SMadhusudhan Chikkature "Switch operation failed\n"); 1569a45c6cb8SMadhusudhan Chikkature } 1570a45c6cb8SMadhusudhan Chikkature } 1571a45c6cb8SMadhusudhan Chikkature 15725934df2fSAndy Shevchenko omap_hsmmc_set_clock(host); 1573a45c6cb8SMadhusudhan Chikkature 1574a3621465SAdrian Hunter if (do_send_init_stream) 1575a45c6cb8SMadhusudhan Chikkature send_init_stream(host); 1576a45c6cb8SMadhusudhan Chikkature 15773796fb8aSAndy Shevchenko omap_hsmmc_set_bus_mode(host); 15785e2ea617SAdrian Hunter 1579fa4aa2d4SBalaji T K pm_runtime_put_autosuspend(host->dev); 1580a45c6cb8SMadhusudhan Chikkature } 1581a45c6cb8SMadhusudhan Chikkature 1582a45c6cb8SMadhusudhan Chikkature static int omap_hsmmc_get_cd(struct mmc_host *mmc) 1583a45c6cb8SMadhusudhan Chikkature { 158470a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1585a45c6cb8SMadhusudhan Chikkature 1586191d1f1dSDenis Karpov if (!mmc_slot(host).card_detect) 1587a45c6cb8SMadhusudhan Chikkature return -ENOSYS; 1588db0fefc5SAdrian Hunter return mmc_slot(host).card_detect(host->dev, host->slot_id); 1589a45c6cb8SMadhusudhan Chikkature } 1590a45c6cb8SMadhusudhan Chikkature 1591a45c6cb8SMadhusudhan Chikkature static int omap_hsmmc_get_ro(struct mmc_host *mmc) 1592a45c6cb8SMadhusudhan Chikkature { 159370a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1594a45c6cb8SMadhusudhan Chikkature 1595191d1f1dSDenis Karpov if (!mmc_slot(host).get_ro) 1596a45c6cb8SMadhusudhan Chikkature return -ENOSYS; 1597191d1f1dSDenis Karpov return mmc_slot(host).get_ro(host->dev, 0); 1598a45c6cb8SMadhusudhan Chikkature } 1599a45c6cb8SMadhusudhan Chikkature 16004816858cSGrazvydas Ignotas static void omap_hsmmc_init_card(struct mmc_host *mmc, struct mmc_card *card) 16014816858cSGrazvydas Ignotas { 16024816858cSGrazvydas Ignotas struct omap_hsmmc_host *host = mmc_priv(mmc); 16034816858cSGrazvydas Ignotas 16044816858cSGrazvydas Ignotas if (mmc_slot(host).init_card) 16054816858cSGrazvydas Ignotas mmc_slot(host).init_card(card); 16064816858cSGrazvydas Ignotas } 16074816858cSGrazvydas Ignotas 160870a3341aSDenis Karpov static void omap_hsmmc_conf_bus_power(struct omap_hsmmc_host *host) 16091b331e69SKim Kyuwon { 16101b331e69SKim Kyuwon u32 hctl, capa, value; 16111b331e69SKim Kyuwon 16121b331e69SKim Kyuwon /* Only MMC1 supports 3.0V */ 16134621d5f8SKishore Kadiyala if (host->pdata->controller_flags & OMAP_HSMMC_SUPPORTS_DUAL_VOLT) { 16141b331e69SKim Kyuwon hctl = SDVS30; 16151b331e69SKim Kyuwon capa = VS30 | VS18; 16161b331e69SKim Kyuwon } else { 16171b331e69SKim Kyuwon hctl = SDVS18; 16181b331e69SKim Kyuwon capa = VS18; 16191b331e69SKim Kyuwon } 16201b331e69SKim Kyuwon 16211b331e69SKim Kyuwon value = OMAP_HSMMC_READ(host->base, HCTL) & ~SDVS_MASK; 16221b331e69SKim Kyuwon OMAP_HSMMC_WRITE(host->base, HCTL, value | hctl); 16231b331e69SKim Kyuwon 16241b331e69SKim Kyuwon value = OMAP_HSMMC_READ(host->base, CAPA); 16251b331e69SKim Kyuwon OMAP_HSMMC_WRITE(host->base, CAPA, value | capa); 16261b331e69SKim Kyuwon 16271b331e69SKim Kyuwon /* Set the controller to AUTO IDLE mode */ 16281b331e69SKim Kyuwon value = OMAP_HSMMC_READ(host->base, SYSCONFIG); 16291b331e69SKim Kyuwon OMAP_HSMMC_WRITE(host->base, SYSCONFIG, value | AUTOIDLE); 16301b331e69SKim Kyuwon 16311b331e69SKim Kyuwon /* Set SD bus power bit */ 1632e13bb300SAdrian Hunter set_sd_bus_power(host); 16331b331e69SKim Kyuwon } 16341b331e69SKim Kyuwon 163570a3341aSDenis Karpov static int omap_hsmmc_enable_fclk(struct mmc_host *mmc) 1636dd498effSDenis Karpov { 163770a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1638dd498effSDenis Karpov 1639fa4aa2d4SBalaji T K pm_runtime_get_sync(host->dev); 1640fa4aa2d4SBalaji T K 1641dd498effSDenis Karpov return 0; 1642dd498effSDenis Karpov } 1643dd498effSDenis Karpov 1644907d2e7cSAdrian Hunter static int omap_hsmmc_disable_fclk(struct mmc_host *mmc) 1645dd498effSDenis Karpov { 164670a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1647dd498effSDenis Karpov 1648fa4aa2d4SBalaji T K pm_runtime_mark_last_busy(host->dev); 1649fa4aa2d4SBalaji T K pm_runtime_put_autosuspend(host->dev); 1650fa4aa2d4SBalaji T K 1651dd498effSDenis Karpov return 0; 1652dd498effSDenis Karpov } 1653dd498effSDenis Karpov 165470a3341aSDenis Karpov static const struct mmc_host_ops omap_hsmmc_ops = { 165570a3341aSDenis Karpov .enable = omap_hsmmc_enable_fclk, 165670a3341aSDenis Karpov .disable = omap_hsmmc_disable_fclk, 16579782aff8SPer Forlin .post_req = omap_hsmmc_post_req, 16589782aff8SPer Forlin .pre_req = omap_hsmmc_pre_req, 165970a3341aSDenis Karpov .request = omap_hsmmc_request, 166070a3341aSDenis Karpov .set_ios = omap_hsmmc_set_ios, 1661dd498effSDenis Karpov .get_cd = omap_hsmmc_get_cd, 1662dd498effSDenis Karpov .get_ro = omap_hsmmc_get_ro, 16634816858cSGrazvydas Ignotas .init_card = omap_hsmmc_init_card, 1664dd498effSDenis Karpov /* NYET -- enable_sdio_irq */ 1665dd498effSDenis Karpov }; 1666dd498effSDenis Karpov 1667d900f712SDenis Karpov #ifdef CONFIG_DEBUG_FS 1668d900f712SDenis Karpov 166970a3341aSDenis Karpov static int omap_hsmmc_regs_show(struct seq_file *s, void *data) 1670d900f712SDenis Karpov { 1671d900f712SDenis Karpov struct mmc_host *mmc = s->private; 167270a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 167311dd62a7SDenis Karpov int context_loss = 0; 167411dd62a7SDenis Karpov 167570a3341aSDenis Karpov if (host->pdata->get_context_loss_count) 167670a3341aSDenis Karpov context_loss = host->pdata->get_context_loss_count(host->dev); 1677d900f712SDenis Karpov 1678907d2e7cSAdrian Hunter seq_printf(s, "mmc%d:\n ctx_loss:\t%d:%d\n\nregs:\n", 1679907d2e7cSAdrian Hunter mmc->index, host->context_loss, context_loss); 16805e2ea617SAdrian Hunter 16817a8c2cefSBalaji T K if (host->suspended) { 1682dd498effSDenis Karpov seq_printf(s, "host suspended, can't read registers\n"); 1683dd498effSDenis Karpov return 0; 1684dd498effSDenis Karpov } 1685dd498effSDenis Karpov 1686fa4aa2d4SBalaji T K pm_runtime_get_sync(host->dev); 1687d900f712SDenis Karpov 1688d900f712SDenis Karpov seq_printf(s, "SYSCONFIG:\t0x%08x\n", 1689d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCONFIG)); 1690d900f712SDenis Karpov seq_printf(s, "CON:\t\t0x%08x\n", 1691d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, CON)); 1692d900f712SDenis Karpov seq_printf(s, "HCTL:\t\t0x%08x\n", 1693d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, HCTL)); 1694d900f712SDenis Karpov seq_printf(s, "SYSCTL:\t\t0x%08x\n", 1695d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCTL)); 1696d900f712SDenis Karpov seq_printf(s, "IE:\t\t0x%08x\n", 1697d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, IE)); 1698d900f712SDenis Karpov seq_printf(s, "ISE:\t\t0x%08x\n", 1699d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, ISE)); 1700d900f712SDenis Karpov seq_printf(s, "CAPA:\t\t0x%08x\n", 1701d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, CAPA)); 17025e2ea617SAdrian Hunter 1703fa4aa2d4SBalaji T K pm_runtime_mark_last_busy(host->dev); 1704fa4aa2d4SBalaji T K pm_runtime_put_autosuspend(host->dev); 1705dd498effSDenis Karpov 1706d900f712SDenis Karpov return 0; 1707d900f712SDenis Karpov } 1708d900f712SDenis Karpov 170970a3341aSDenis Karpov static int omap_hsmmc_regs_open(struct inode *inode, struct file *file) 1710d900f712SDenis Karpov { 171170a3341aSDenis Karpov return single_open(file, omap_hsmmc_regs_show, inode->i_private); 1712d900f712SDenis Karpov } 1713d900f712SDenis Karpov 1714d900f712SDenis Karpov static const struct file_operations mmc_regs_fops = { 171570a3341aSDenis Karpov .open = omap_hsmmc_regs_open, 1716d900f712SDenis Karpov .read = seq_read, 1717d900f712SDenis Karpov .llseek = seq_lseek, 1718d900f712SDenis Karpov .release = single_release, 1719d900f712SDenis Karpov }; 1720d900f712SDenis Karpov 172170a3341aSDenis Karpov static void omap_hsmmc_debugfs(struct mmc_host *mmc) 1722d900f712SDenis Karpov { 1723d900f712SDenis Karpov if (mmc->debugfs_root) 1724d900f712SDenis Karpov debugfs_create_file("regs", S_IRUSR, mmc->debugfs_root, 1725d900f712SDenis Karpov mmc, &mmc_regs_fops); 1726d900f712SDenis Karpov } 1727d900f712SDenis Karpov 1728d900f712SDenis Karpov #else 1729d900f712SDenis Karpov 173070a3341aSDenis Karpov static void omap_hsmmc_debugfs(struct mmc_host *mmc) 1731d900f712SDenis Karpov { 1732d900f712SDenis Karpov } 1733d900f712SDenis Karpov 1734d900f712SDenis Karpov #endif 1735d900f712SDenis Karpov 173646856a68SRajendra Nayak #ifdef CONFIG_OF 173746856a68SRajendra Nayak static u16 omap4_reg_offset = 0x100; 173846856a68SRajendra Nayak 173946856a68SRajendra Nayak static const struct of_device_id omap_mmc_of_match[] = { 174046856a68SRajendra Nayak { 174146856a68SRajendra Nayak .compatible = "ti,omap2-hsmmc", 174246856a68SRajendra Nayak }, 174346856a68SRajendra Nayak { 174446856a68SRajendra Nayak .compatible = "ti,omap3-hsmmc", 174546856a68SRajendra Nayak }, 174646856a68SRajendra Nayak { 174746856a68SRajendra Nayak .compatible = "ti,omap4-hsmmc", 174846856a68SRajendra Nayak .data = &omap4_reg_offset, 174946856a68SRajendra Nayak }, 175046856a68SRajendra Nayak {}, 1751b6d085f6SChris Ball }; 175246856a68SRajendra Nayak MODULE_DEVICE_TABLE(of, omap_mmc_of_match); 175346856a68SRajendra Nayak 175446856a68SRajendra Nayak static struct omap_mmc_platform_data *of_get_hsmmc_pdata(struct device *dev) 175546856a68SRajendra Nayak { 175646856a68SRajendra Nayak struct omap_mmc_platform_data *pdata; 175746856a68SRajendra Nayak struct device_node *np = dev->of_node; 175846856a68SRajendra Nayak u32 bus_width; 175946856a68SRajendra Nayak 176046856a68SRajendra Nayak pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); 176146856a68SRajendra Nayak if (!pdata) 176246856a68SRajendra Nayak return NULL; /* out of memory */ 176346856a68SRajendra Nayak 176446856a68SRajendra Nayak if (of_find_property(np, "ti,dual-volt", NULL)) 176546856a68SRajendra Nayak pdata->controller_flags |= OMAP_HSMMC_SUPPORTS_DUAL_VOLT; 176646856a68SRajendra Nayak 176746856a68SRajendra Nayak /* This driver only supports 1 slot */ 176846856a68SRajendra Nayak pdata->nr_slots = 1; 176946856a68SRajendra Nayak pdata->slots[0].switch_pin = of_get_named_gpio(np, "cd-gpios", 0); 177046856a68SRajendra Nayak pdata->slots[0].gpio_wp = of_get_named_gpio(np, "wp-gpios", 0); 177146856a68SRajendra Nayak 177246856a68SRajendra Nayak if (of_find_property(np, "ti,non-removable", NULL)) { 177346856a68SRajendra Nayak pdata->slots[0].nonremovable = true; 177446856a68SRajendra Nayak pdata->slots[0].no_regulator_off_init = true; 177546856a68SRajendra Nayak } 17767f217794SArnd Bergmann of_property_read_u32(np, "bus-width", &bus_width); 177746856a68SRajendra Nayak if (bus_width == 4) 177846856a68SRajendra Nayak pdata->slots[0].caps |= MMC_CAP_4_BIT_DATA; 177946856a68SRajendra Nayak else if (bus_width == 8) 178046856a68SRajendra Nayak pdata->slots[0].caps |= MMC_CAP_8_BIT_DATA; 178146856a68SRajendra Nayak 178246856a68SRajendra Nayak if (of_find_property(np, "ti,needs-special-reset", NULL)) 178346856a68SRajendra Nayak pdata->slots[0].features |= HSMMC_HAS_UPDATED_RESET; 178446856a68SRajendra Nayak 178546856a68SRajendra Nayak return pdata; 178646856a68SRajendra Nayak } 178746856a68SRajendra Nayak #else 178846856a68SRajendra Nayak static inline struct omap_mmc_platform_data 178946856a68SRajendra Nayak *of_get_hsmmc_pdata(struct device *dev) 179046856a68SRajendra Nayak { 179146856a68SRajendra Nayak return NULL; 179246856a68SRajendra Nayak } 179346856a68SRajendra Nayak #endif 179446856a68SRajendra Nayak 1795efa25fd3SFelipe Balbi static int __devinit omap_hsmmc_probe(struct platform_device *pdev) 1796a45c6cb8SMadhusudhan Chikkature { 1797a45c6cb8SMadhusudhan Chikkature struct omap_mmc_platform_data *pdata = pdev->dev.platform_data; 1798a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc; 179970a3341aSDenis Karpov struct omap_hsmmc_host *host = NULL; 1800a45c6cb8SMadhusudhan Chikkature struct resource *res; 1801db0fefc5SAdrian Hunter int ret, irq; 180246856a68SRajendra Nayak const struct of_device_id *match; 180346856a68SRajendra Nayak 180446856a68SRajendra Nayak match = of_match_device(of_match_ptr(omap_mmc_of_match), &pdev->dev); 180546856a68SRajendra Nayak if (match) { 180646856a68SRajendra Nayak pdata = of_get_hsmmc_pdata(&pdev->dev); 180746856a68SRajendra Nayak if (match->data) { 180846856a68SRajendra Nayak u16 *offsetp = match->data; 180946856a68SRajendra Nayak pdata->reg_offset = *offsetp; 181046856a68SRajendra Nayak } 181146856a68SRajendra Nayak } 1812a45c6cb8SMadhusudhan Chikkature 1813a45c6cb8SMadhusudhan Chikkature if (pdata == NULL) { 1814a45c6cb8SMadhusudhan Chikkature dev_err(&pdev->dev, "Platform Data is missing\n"); 1815a45c6cb8SMadhusudhan Chikkature return -ENXIO; 1816a45c6cb8SMadhusudhan Chikkature } 1817a45c6cb8SMadhusudhan Chikkature 1818a45c6cb8SMadhusudhan Chikkature if (pdata->nr_slots == 0) { 1819a45c6cb8SMadhusudhan Chikkature dev_err(&pdev->dev, "No Slots\n"); 1820a45c6cb8SMadhusudhan Chikkature return -ENXIO; 1821a45c6cb8SMadhusudhan Chikkature } 1822a45c6cb8SMadhusudhan Chikkature 1823a45c6cb8SMadhusudhan Chikkature res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1824a45c6cb8SMadhusudhan Chikkature irq = platform_get_irq(pdev, 0); 1825a45c6cb8SMadhusudhan Chikkature if (res == NULL || irq < 0) 1826a45c6cb8SMadhusudhan Chikkature return -ENXIO; 1827a45c6cb8SMadhusudhan Chikkature 1828984b203aSChris Ball res = request_mem_region(res->start, resource_size(res), pdev->name); 1829a45c6cb8SMadhusudhan Chikkature if (res == NULL) 1830a45c6cb8SMadhusudhan Chikkature return -EBUSY; 1831a45c6cb8SMadhusudhan Chikkature 1832db0fefc5SAdrian Hunter ret = omap_hsmmc_gpio_init(pdata); 1833db0fefc5SAdrian Hunter if (ret) 1834db0fefc5SAdrian Hunter goto err; 1835db0fefc5SAdrian Hunter 183670a3341aSDenis Karpov mmc = mmc_alloc_host(sizeof(struct omap_hsmmc_host), &pdev->dev); 1837a45c6cb8SMadhusudhan Chikkature if (!mmc) { 1838a45c6cb8SMadhusudhan Chikkature ret = -ENOMEM; 1839db0fefc5SAdrian Hunter goto err_alloc; 1840a45c6cb8SMadhusudhan Chikkature } 1841a45c6cb8SMadhusudhan Chikkature 1842a45c6cb8SMadhusudhan Chikkature host = mmc_priv(mmc); 1843a45c6cb8SMadhusudhan Chikkature host->mmc = mmc; 1844a45c6cb8SMadhusudhan Chikkature host->pdata = pdata; 1845a45c6cb8SMadhusudhan Chikkature host->dev = &pdev->dev; 1846a45c6cb8SMadhusudhan Chikkature host->use_dma = 1; 1847a45c6cb8SMadhusudhan Chikkature host->dev->dma_mask = &pdata->dma_mask; 1848a45c6cb8SMadhusudhan Chikkature host->dma_ch = -1; 1849a45c6cb8SMadhusudhan Chikkature host->irq = irq; 1850a45c6cb8SMadhusudhan Chikkature host->slot_id = 0; 1851fc307df8SBalaji T K host->mapbase = res->start + pdata->reg_offset; 1852a45c6cb8SMadhusudhan Chikkature host->base = ioremap(host->mapbase, SZ_4K); 18536da20c89SAdrian Hunter host->power_mode = MMC_POWER_OFF; 18549782aff8SPer Forlin host->next_data.cookie = 1; 1855a45c6cb8SMadhusudhan Chikkature 1856a45c6cb8SMadhusudhan Chikkature platform_set_drvdata(pdev, host); 1857a45c6cb8SMadhusudhan Chikkature 185870a3341aSDenis Karpov mmc->ops = &omap_hsmmc_ops; 1859dd498effSDenis Karpov 1860e0eb2424SAdrian Hunter /* 1861e0eb2424SAdrian Hunter * If regulator_disable can only put vcc_aux to sleep then there is 1862e0eb2424SAdrian Hunter * no off state. 1863e0eb2424SAdrian Hunter */ 1864e0eb2424SAdrian Hunter if (mmc_slot(host).vcc_aux_disable_is_sleep) 1865e0eb2424SAdrian Hunter mmc_slot(host).no_off = 1; 1866e0eb2424SAdrian Hunter 18676b206efeSAndy Shevchenko mmc->f_min = OMAP_MMC_MIN_CLOCK; 1868d418ed87SDaniel Mack 1869d418ed87SDaniel Mack if (pdata->max_freq > 0) 1870d418ed87SDaniel Mack mmc->f_max = pdata->max_freq; 1871d418ed87SDaniel Mack else 18726b206efeSAndy Shevchenko mmc->f_max = OMAP_MMC_MAX_CLOCK; 1873a45c6cb8SMadhusudhan Chikkature 18744dffd7a2SAdrian Hunter spin_lock_init(&host->irq_lock); 1875a45c6cb8SMadhusudhan Chikkature 18766f7607ccSRussell King host->fclk = clk_get(&pdev->dev, "fck"); 1877a45c6cb8SMadhusudhan Chikkature if (IS_ERR(host->fclk)) { 1878a45c6cb8SMadhusudhan Chikkature ret = PTR_ERR(host->fclk); 1879a45c6cb8SMadhusudhan Chikkature host->fclk = NULL; 1880a45c6cb8SMadhusudhan Chikkature goto err1; 1881a45c6cb8SMadhusudhan Chikkature } 1882a45c6cb8SMadhusudhan Chikkature 18839b68256cSPaul Walmsley if (host->pdata->controller_flags & OMAP_HSMMC_BROKEN_MULTIBLOCK_READ) { 18849b68256cSPaul Walmsley dev_info(&pdev->dev, "multiblock reads disabled due to 35xx erratum 2.1.1.128; MMC read performance may suffer\n"); 18859b68256cSPaul Walmsley mmc->caps2 |= MMC_CAP2_NO_MULTI_READ; 18869b68256cSPaul Walmsley } 1887dd498effSDenis Karpov 1888fa4aa2d4SBalaji T K pm_runtime_enable(host->dev); 1889fa4aa2d4SBalaji T K pm_runtime_get_sync(host->dev); 1890fa4aa2d4SBalaji T K pm_runtime_set_autosuspend_delay(host->dev, MMC_AUTOSUSPEND_DELAY); 1891fa4aa2d4SBalaji T K pm_runtime_use_autosuspend(host->dev); 1892a45c6cb8SMadhusudhan Chikkature 189392a3aebfSBalaji T K omap_hsmmc_context_save(host); 189492a3aebfSBalaji T K 1895a45c6cb8SMadhusudhan Chikkature host->dbclk = clk_get(&pdev->dev, "mmchsdb_fck"); 1896a45c6cb8SMadhusudhan Chikkature /* 1897a45c6cb8SMadhusudhan Chikkature * MMC can still work without debounce clock. 1898a45c6cb8SMadhusudhan Chikkature */ 1899cd03d9a8SRajendra Nayak if (IS_ERR(host->dbclk)) { 1900cd03d9a8SRajendra Nayak dev_warn(mmc_dev(host->mmc), "Failed to get debounce clk\n"); 1901cd03d9a8SRajendra Nayak host->dbclk = NULL; 190294c18149SRajendra Nayak } else if (clk_prepare_enable(host->dbclk) != 0) { 1903cd03d9a8SRajendra Nayak dev_warn(mmc_dev(host->mmc), "Failed to enable debounce clk\n"); 1904cd03d9a8SRajendra Nayak clk_put(host->dbclk); 1905cd03d9a8SRajendra Nayak host->dbclk = NULL; 19062bec0893SAdrian Hunter } 1907a45c6cb8SMadhusudhan Chikkature 19080ccd76d4SJuha Yrjola /* Since we do only SG emulation, we can have as many segs 19090ccd76d4SJuha Yrjola * as we want. */ 1910a36274e0SMartin K. Petersen mmc->max_segs = 1024; 19110ccd76d4SJuha Yrjola 1912a45c6cb8SMadhusudhan Chikkature mmc->max_blk_size = 512; /* Block Length at max can be 1024 */ 1913a45c6cb8SMadhusudhan Chikkature mmc->max_blk_count = 0xFFFF; /* No. of Blocks is 16 bits */ 1914a45c6cb8SMadhusudhan Chikkature mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; 1915a45c6cb8SMadhusudhan Chikkature mmc->max_seg_size = mmc->max_req_size; 1916a45c6cb8SMadhusudhan Chikkature 191713189e78SJarkko Lavinen mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED | 191893caf8e6SAdrian Hunter MMC_CAP_WAIT_WHILE_BUSY | MMC_CAP_ERASE; 1919a45c6cb8SMadhusudhan Chikkature 19203a63833eSSukumar Ghorai mmc->caps |= mmc_slot(host).caps; 19213a63833eSSukumar Ghorai if (mmc->caps & MMC_CAP_8_BIT_DATA) 1922a45c6cb8SMadhusudhan Chikkature mmc->caps |= MMC_CAP_4_BIT_DATA; 1923a45c6cb8SMadhusudhan Chikkature 1924191d1f1dSDenis Karpov if (mmc_slot(host).nonremovable) 192523d99bb9SAdrian Hunter mmc->caps |= MMC_CAP_NONREMOVABLE; 192623d99bb9SAdrian Hunter 19276fdc75deSEliad Peller mmc->pm_caps = mmc_slot(host).pm_caps; 19286fdc75deSEliad Peller 192970a3341aSDenis Karpov omap_hsmmc_conf_bus_power(host); 1930a45c6cb8SMadhusudhan Chikkature 1931b7bf773bSBalaji T K res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "tx"); 1932b7bf773bSBalaji T K if (!res) { 1933b7bf773bSBalaji T K dev_err(mmc_dev(host->mmc), "cannot get DMA TX channel\n"); 1934f3e2f1ddSGrazvydas Ignotas goto err_irq; 1935a45c6cb8SMadhusudhan Chikkature } 1936b7bf773bSBalaji T K host->dma_line_tx = res->start; 1937b7bf773bSBalaji T K 1938b7bf773bSBalaji T K res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "rx"); 1939b7bf773bSBalaji T K if (!res) { 1940b7bf773bSBalaji T K dev_err(mmc_dev(host->mmc), "cannot get DMA RX channel\n"); 1941b7bf773bSBalaji T K goto err_irq; 1942b7bf773bSBalaji T K } 1943b7bf773bSBalaji T K host->dma_line_rx = res->start; 1944a45c6cb8SMadhusudhan Chikkature 1945a45c6cb8SMadhusudhan Chikkature /* Request IRQ for MMC operations */ 1946d9618e9fSYong Zhang ret = request_irq(host->irq, omap_hsmmc_irq, 0, 1947a45c6cb8SMadhusudhan Chikkature mmc_hostname(mmc), host); 1948a45c6cb8SMadhusudhan Chikkature if (ret) { 1949a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Unable to grab HSMMC IRQ\n"); 1950a45c6cb8SMadhusudhan Chikkature goto err_irq; 1951a45c6cb8SMadhusudhan Chikkature } 1952a45c6cb8SMadhusudhan Chikkature 1953a45c6cb8SMadhusudhan Chikkature if (pdata->init != NULL) { 1954a45c6cb8SMadhusudhan Chikkature if (pdata->init(&pdev->dev) != 0) { 195570a3341aSDenis Karpov dev_dbg(mmc_dev(host->mmc), 195670a3341aSDenis Karpov "Unable to configure MMC IRQs\n"); 1957a45c6cb8SMadhusudhan Chikkature goto err_irq_cd_init; 1958a45c6cb8SMadhusudhan Chikkature } 1959a45c6cb8SMadhusudhan Chikkature } 1960db0fefc5SAdrian Hunter 1961b702b106SAdrian Hunter if (omap_hsmmc_have_reg() && !mmc_slot(host).set_power) { 1962db0fefc5SAdrian Hunter ret = omap_hsmmc_reg_get(host); 1963db0fefc5SAdrian Hunter if (ret) 1964db0fefc5SAdrian Hunter goto err_reg; 1965db0fefc5SAdrian Hunter host->use_reg = 1; 1966db0fefc5SAdrian Hunter } 1967db0fefc5SAdrian Hunter 1968b583f26dSDavid Brownell mmc->ocr_avail = mmc_slot(host).ocr_mask; 1969a45c6cb8SMadhusudhan Chikkature 1970a45c6cb8SMadhusudhan Chikkature /* Request IRQ for card detect */ 1971e1a55f5eSAdrian Hunter if ((mmc_slot(host).card_detect_irq)) { 19727efab4f3SNeilBrown ret = request_threaded_irq(mmc_slot(host).card_detect_irq, 19737efab4f3SNeilBrown NULL, 19747efab4f3SNeilBrown omap_hsmmc_detect, 1975db35f83eSMing Lei IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING | IRQF_ONESHOT, 1976a45c6cb8SMadhusudhan Chikkature mmc_hostname(mmc), host); 1977a45c6cb8SMadhusudhan Chikkature if (ret) { 1978a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1979a45c6cb8SMadhusudhan Chikkature "Unable to grab MMC CD IRQ\n"); 1980a45c6cb8SMadhusudhan Chikkature goto err_irq_cd; 1981a45c6cb8SMadhusudhan Chikkature } 198272f2e2c7Skishore kadiyala pdata->suspend = omap_hsmmc_suspend_cdirq; 198372f2e2c7Skishore kadiyala pdata->resume = omap_hsmmc_resume_cdirq; 1984a45c6cb8SMadhusudhan Chikkature } 1985a45c6cb8SMadhusudhan Chikkature 1986b417577dSAdrian Hunter omap_hsmmc_disable_irq(host); 1987a45c6cb8SMadhusudhan Chikkature 1988b62f6228SAdrian Hunter omap_hsmmc_protect_card(host); 1989b62f6228SAdrian Hunter 1990a45c6cb8SMadhusudhan Chikkature mmc_add_host(mmc); 1991a45c6cb8SMadhusudhan Chikkature 1992191d1f1dSDenis Karpov if (mmc_slot(host).name != NULL) { 1993a45c6cb8SMadhusudhan Chikkature ret = device_create_file(&mmc->class_dev, &dev_attr_slot_name); 1994a45c6cb8SMadhusudhan Chikkature if (ret < 0) 1995a45c6cb8SMadhusudhan Chikkature goto err_slot_name; 1996a45c6cb8SMadhusudhan Chikkature } 1997191d1f1dSDenis Karpov if (mmc_slot(host).card_detect_irq && mmc_slot(host).get_cover_state) { 1998a45c6cb8SMadhusudhan Chikkature ret = device_create_file(&mmc->class_dev, 1999a45c6cb8SMadhusudhan Chikkature &dev_attr_cover_switch); 2000a45c6cb8SMadhusudhan Chikkature if (ret < 0) 2001db0fefc5SAdrian Hunter goto err_slot_name; 2002a45c6cb8SMadhusudhan Chikkature } 2003a45c6cb8SMadhusudhan Chikkature 200470a3341aSDenis Karpov omap_hsmmc_debugfs(mmc); 2005fa4aa2d4SBalaji T K pm_runtime_mark_last_busy(host->dev); 2006fa4aa2d4SBalaji T K pm_runtime_put_autosuspend(host->dev); 2007d900f712SDenis Karpov 2008a45c6cb8SMadhusudhan Chikkature return 0; 2009a45c6cb8SMadhusudhan Chikkature 2010a45c6cb8SMadhusudhan Chikkature err_slot_name: 2011a45c6cb8SMadhusudhan Chikkature mmc_remove_host(mmc); 2012a45c6cb8SMadhusudhan Chikkature free_irq(mmc_slot(host).card_detect_irq, host); 2013db0fefc5SAdrian Hunter err_irq_cd: 2014db0fefc5SAdrian Hunter if (host->use_reg) 2015db0fefc5SAdrian Hunter omap_hsmmc_reg_put(host); 2016db0fefc5SAdrian Hunter err_reg: 2017db0fefc5SAdrian Hunter if (host->pdata->cleanup) 2018db0fefc5SAdrian Hunter host->pdata->cleanup(&pdev->dev); 2019a45c6cb8SMadhusudhan Chikkature err_irq_cd_init: 2020a45c6cb8SMadhusudhan Chikkature free_irq(host->irq, host); 2021a45c6cb8SMadhusudhan Chikkature err_irq: 2022d59d77edSBalaji T K pm_runtime_put_sync(host->dev); 202337f6190dSTony Lindgren pm_runtime_disable(host->dev); 2024a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 2025cd03d9a8SRajendra Nayak if (host->dbclk) { 202694c18149SRajendra Nayak clk_disable_unprepare(host->dbclk); 2027a45c6cb8SMadhusudhan Chikkature clk_put(host->dbclk); 2028a45c6cb8SMadhusudhan Chikkature } 2029a45c6cb8SMadhusudhan Chikkature err1: 2030a45c6cb8SMadhusudhan Chikkature iounmap(host->base); 2031db0fefc5SAdrian Hunter platform_set_drvdata(pdev, NULL); 2032a45c6cb8SMadhusudhan Chikkature mmc_free_host(mmc); 2033db0fefc5SAdrian Hunter err_alloc: 2034db0fefc5SAdrian Hunter omap_hsmmc_gpio_free(pdata); 2035db0fefc5SAdrian Hunter err: 203648b332f9SRussell King res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 203748b332f9SRussell King if (res) 2038984b203aSChris Ball release_mem_region(res->start, resource_size(res)); 2039a45c6cb8SMadhusudhan Chikkature return ret; 2040a45c6cb8SMadhusudhan Chikkature } 2041a45c6cb8SMadhusudhan Chikkature 2042efa25fd3SFelipe Balbi static int __devexit omap_hsmmc_remove(struct platform_device *pdev) 2043a45c6cb8SMadhusudhan Chikkature { 204470a3341aSDenis Karpov struct omap_hsmmc_host *host = platform_get_drvdata(pdev); 2045a45c6cb8SMadhusudhan Chikkature struct resource *res; 2046a45c6cb8SMadhusudhan Chikkature 2047fa4aa2d4SBalaji T K pm_runtime_get_sync(host->dev); 2048a45c6cb8SMadhusudhan Chikkature mmc_remove_host(host->mmc); 2049db0fefc5SAdrian Hunter if (host->use_reg) 2050db0fefc5SAdrian Hunter omap_hsmmc_reg_put(host); 2051a45c6cb8SMadhusudhan Chikkature if (host->pdata->cleanup) 2052a45c6cb8SMadhusudhan Chikkature host->pdata->cleanup(&pdev->dev); 2053a45c6cb8SMadhusudhan Chikkature free_irq(host->irq, host); 2054a45c6cb8SMadhusudhan Chikkature if (mmc_slot(host).card_detect_irq) 2055a45c6cb8SMadhusudhan Chikkature free_irq(mmc_slot(host).card_detect_irq, host); 2056a45c6cb8SMadhusudhan Chikkature 2057fa4aa2d4SBalaji T K pm_runtime_put_sync(host->dev); 2058fa4aa2d4SBalaji T K pm_runtime_disable(host->dev); 2059a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 2060cd03d9a8SRajendra Nayak if (host->dbclk) { 206194c18149SRajendra Nayak clk_disable_unprepare(host->dbclk); 2062a45c6cb8SMadhusudhan Chikkature clk_put(host->dbclk); 2063a45c6cb8SMadhusudhan Chikkature } 2064a45c6cb8SMadhusudhan Chikkature 2065a45c6cb8SMadhusudhan Chikkature mmc_free_host(host->mmc); 2066a45c6cb8SMadhusudhan Chikkature iounmap(host->base); 2067db0fefc5SAdrian Hunter omap_hsmmc_gpio_free(pdev->dev.platform_data); 2068a45c6cb8SMadhusudhan Chikkature 2069a45c6cb8SMadhusudhan Chikkature res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2070a45c6cb8SMadhusudhan Chikkature if (res) 2071984b203aSChris Ball release_mem_region(res->start, resource_size(res)); 2072a45c6cb8SMadhusudhan Chikkature platform_set_drvdata(pdev, NULL); 2073a45c6cb8SMadhusudhan Chikkature 2074a45c6cb8SMadhusudhan Chikkature return 0; 2075a45c6cb8SMadhusudhan Chikkature } 2076a45c6cb8SMadhusudhan Chikkature 2077a45c6cb8SMadhusudhan Chikkature #ifdef CONFIG_PM 2078a791daa1SKevin Hilman static int omap_hsmmc_suspend(struct device *dev) 2079a45c6cb8SMadhusudhan Chikkature { 2080a45c6cb8SMadhusudhan Chikkature int ret = 0; 2081927ce944SFelipe Balbi struct omap_hsmmc_host *host = dev_get_drvdata(dev); 2082927ce944SFelipe Balbi 2083927ce944SFelipe Balbi if (!host) 2084927ce944SFelipe Balbi return 0; 2085a45c6cb8SMadhusudhan Chikkature 2086a45c6cb8SMadhusudhan Chikkature if (host && host->suspended) 2087a45c6cb8SMadhusudhan Chikkature return 0; 2088a45c6cb8SMadhusudhan Chikkature 2089fa4aa2d4SBalaji T K pm_runtime_get_sync(host->dev); 2090a45c6cb8SMadhusudhan Chikkature host->suspended = 1; 2091a45c6cb8SMadhusudhan Chikkature if (host->pdata->suspend) { 2092927ce944SFelipe Balbi ret = host->pdata->suspend(dev, host->slot_id); 2093a6b2240dSAdrian Hunter if (ret) { 2094927ce944SFelipe Balbi dev_dbg(dev, "Unable to handle MMC board" 2095a45c6cb8SMadhusudhan Chikkature " level suspend\n"); 2096a6b2240dSAdrian Hunter host->suspended = 0; 2097a6b2240dSAdrian Hunter return ret; 2098a45c6cb8SMadhusudhan Chikkature } 2099a6b2240dSAdrian Hunter } 21001a13f8faSMatt Fleming ret = mmc_suspend_host(host->mmc); 2101fa4aa2d4SBalaji T K 210231f9d463SEliad Peller if (ret) { 2103a6b2240dSAdrian Hunter host->suspended = 0; 2104a6b2240dSAdrian Hunter if (host->pdata->resume) { 2105927ce944SFelipe Balbi ret = host->pdata->resume(dev, host->slot_id); 2106a6b2240dSAdrian Hunter if (ret) 2107927ce944SFelipe Balbi dev_dbg(dev, "Unmask interrupt failed\n"); 2108a6b2240dSAdrian Hunter } 210931f9d463SEliad Peller goto err; 2110a6b2240dSAdrian Hunter } 211131f9d463SEliad Peller 211231f9d463SEliad Peller if (!(host->mmc->pm_flags & MMC_PM_KEEP_POWER)) { 211331f9d463SEliad Peller omap_hsmmc_disable_irq(host); 211431f9d463SEliad Peller OMAP_HSMMC_WRITE(host->base, HCTL, 211531f9d463SEliad Peller OMAP_HSMMC_READ(host->base, HCTL) & ~SDBP); 211631f9d463SEliad Peller } 2117927ce944SFelipe Balbi 2118cd03d9a8SRajendra Nayak if (host->dbclk) 211994c18149SRajendra Nayak clk_disable_unprepare(host->dbclk); 212031f9d463SEliad Peller err: 2121fa4aa2d4SBalaji T K pm_runtime_put_sync(host->dev); 2122a45c6cb8SMadhusudhan Chikkature return ret; 2123a45c6cb8SMadhusudhan Chikkature } 2124a45c6cb8SMadhusudhan Chikkature 2125a45c6cb8SMadhusudhan Chikkature /* Routine to resume the MMC device */ 2126a791daa1SKevin Hilman static int omap_hsmmc_resume(struct device *dev) 2127a45c6cb8SMadhusudhan Chikkature { 2128a45c6cb8SMadhusudhan Chikkature int ret = 0; 2129927ce944SFelipe Balbi struct omap_hsmmc_host *host = dev_get_drvdata(dev); 2130927ce944SFelipe Balbi 2131927ce944SFelipe Balbi if (!host) 2132927ce944SFelipe Balbi return 0; 2133a45c6cb8SMadhusudhan Chikkature 2134a45c6cb8SMadhusudhan Chikkature if (host && !host->suspended) 2135a45c6cb8SMadhusudhan Chikkature return 0; 2136a45c6cb8SMadhusudhan Chikkature 2137fa4aa2d4SBalaji T K pm_runtime_get_sync(host->dev); 213811dd62a7SDenis Karpov 2139cd03d9a8SRajendra Nayak if (host->dbclk) 214094c18149SRajendra Nayak clk_prepare_enable(host->dbclk); 21412bec0893SAdrian Hunter 214231f9d463SEliad Peller if (!(host->mmc->pm_flags & MMC_PM_KEEP_POWER)) 214370a3341aSDenis Karpov omap_hsmmc_conf_bus_power(host); 21441b331e69SKim Kyuwon 2145a45c6cb8SMadhusudhan Chikkature if (host->pdata->resume) { 2146927ce944SFelipe Balbi ret = host->pdata->resume(dev, host->slot_id); 2147a45c6cb8SMadhusudhan Chikkature if (ret) 2148927ce944SFelipe Balbi dev_dbg(dev, "Unmask interrupt failed\n"); 2149a45c6cb8SMadhusudhan Chikkature } 2150a45c6cb8SMadhusudhan Chikkature 2151b62f6228SAdrian Hunter omap_hsmmc_protect_card(host); 2152b62f6228SAdrian Hunter 2153a45c6cb8SMadhusudhan Chikkature /* Notify the core to resume the host */ 2154a45c6cb8SMadhusudhan Chikkature ret = mmc_resume_host(host->mmc); 2155a45c6cb8SMadhusudhan Chikkature if (ret == 0) 2156a45c6cb8SMadhusudhan Chikkature host->suspended = 0; 2157fa4aa2d4SBalaji T K 2158fa4aa2d4SBalaji T K pm_runtime_mark_last_busy(host->dev); 2159fa4aa2d4SBalaji T K pm_runtime_put_autosuspend(host->dev); 2160a45c6cb8SMadhusudhan Chikkature 2161a45c6cb8SMadhusudhan Chikkature return ret; 2162a45c6cb8SMadhusudhan Chikkature 2163a45c6cb8SMadhusudhan Chikkature } 2164a45c6cb8SMadhusudhan Chikkature 2165a45c6cb8SMadhusudhan Chikkature #else 216670a3341aSDenis Karpov #define omap_hsmmc_suspend NULL 216770a3341aSDenis Karpov #define omap_hsmmc_resume NULL 2168a45c6cb8SMadhusudhan Chikkature #endif 2169a45c6cb8SMadhusudhan Chikkature 2170fa4aa2d4SBalaji T K static int omap_hsmmc_runtime_suspend(struct device *dev) 2171fa4aa2d4SBalaji T K { 2172fa4aa2d4SBalaji T K struct omap_hsmmc_host *host; 2173fa4aa2d4SBalaji T K 2174fa4aa2d4SBalaji T K host = platform_get_drvdata(to_platform_device(dev)); 2175fa4aa2d4SBalaji T K omap_hsmmc_context_save(host); 2176927ce944SFelipe Balbi dev_dbg(dev, "disabled\n"); 2177fa4aa2d4SBalaji T K 2178fa4aa2d4SBalaji T K return 0; 2179fa4aa2d4SBalaji T K } 2180fa4aa2d4SBalaji T K 2181fa4aa2d4SBalaji T K static int omap_hsmmc_runtime_resume(struct device *dev) 2182fa4aa2d4SBalaji T K { 2183fa4aa2d4SBalaji T K struct omap_hsmmc_host *host; 2184fa4aa2d4SBalaji T K 2185fa4aa2d4SBalaji T K host = platform_get_drvdata(to_platform_device(dev)); 2186fa4aa2d4SBalaji T K omap_hsmmc_context_restore(host); 2187927ce944SFelipe Balbi dev_dbg(dev, "enabled\n"); 2188fa4aa2d4SBalaji T K 2189fa4aa2d4SBalaji T K return 0; 2190fa4aa2d4SBalaji T K } 2191fa4aa2d4SBalaji T K 2192a791daa1SKevin Hilman static struct dev_pm_ops omap_hsmmc_dev_pm_ops = { 219370a3341aSDenis Karpov .suspend = omap_hsmmc_suspend, 219470a3341aSDenis Karpov .resume = omap_hsmmc_resume, 2195fa4aa2d4SBalaji T K .runtime_suspend = omap_hsmmc_runtime_suspend, 2196fa4aa2d4SBalaji T K .runtime_resume = omap_hsmmc_runtime_resume, 2197a791daa1SKevin Hilman }; 2198a791daa1SKevin Hilman 2199a791daa1SKevin Hilman static struct platform_driver omap_hsmmc_driver = { 2200efa25fd3SFelipe Balbi .probe = omap_hsmmc_probe, 2201efa25fd3SFelipe Balbi .remove = __devexit_p(omap_hsmmc_remove), 2202a45c6cb8SMadhusudhan Chikkature .driver = { 2203a45c6cb8SMadhusudhan Chikkature .name = DRIVER_NAME, 2204a45c6cb8SMadhusudhan Chikkature .owner = THIS_MODULE, 2205a791daa1SKevin Hilman .pm = &omap_hsmmc_dev_pm_ops, 220646856a68SRajendra Nayak .of_match_table = of_match_ptr(omap_mmc_of_match), 2207a45c6cb8SMadhusudhan Chikkature }, 2208a45c6cb8SMadhusudhan Chikkature }; 2209a45c6cb8SMadhusudhan Chikkature 2210b796450bSFelipe Balbi module_platform_driver(omap_hsmmc_driver); 2211a45c6cb8SMadhusudhan Chikkature MODULE_DESCRIPTION("OMAP High Speed Multimedia Card driver"); 2212a45c6cb8SMadhusudhan Chikkature MODULE_LICENSE("GPL"); 2213a45c6cb8SMadhusudhan Chikkature MODULE_ALIAS("platform:" DRIVER_NAME); 2214a45c6cb8SMadhusudhan Chikkature MODULE_AUTHOR("Texas Instruments Inc"); 2215