1a45c6cb8SMadhusudhan Chikkature /* 2a45c6cb8SMadhusudhan Chikkature * drivers/mmc/host/omap_hsmmc.c 3a45c6cb8SMadhusudhan Chikkature * 4a45c6cb8SMadhusudhan Chikkature * Driver for OMAP2430/3430 MMC controller. 5a45c6cb8SMadhusudhan Chikkature * 6a45c6cb8SMadhusudhan Chikkature * Copyright (C) 2007 Texas Instruments. 7a45c6cb8SMadhusudhan Chikkature * 8a45c6cb8SMadhusudhan Chikkature * Authors: 9a45c6cb8SMadhusudhan Chikkature * Syed Mohammed Khasim <x0khasim@ti.com> 10a45c6cb8SMadhusudhan Chikkature * Madhusudhan <madhu.cr@ti.com> 11a45c6cb8SMadhusudhan Chikkature * Mohit Jalori <mjalori@ti.com> 12a45c6cb8SMadhusudhan Chikkature * 13a45c6cb8SMadhusudhan Chikkature * This file is licensed under the terms of the GNU General Public License 14a45c6cb8SMadhusudhan Chikkature * version 2. This program is licensed "as is" without any warranty of any 15a45c6cb8SMadhusudhan Chikkature * kind, whether express or implied. 16a45c6cb8SMadhusudhan Chikkature */ 17a45c6cb8SMadhusudhan Chikkature 18a45c6cb8SMadhusudhan Chikkature #include <linux/module.h> 19a45c6cb8SMadhusudhan Chikkature #include <linux/init.h> 20d900f712SDenis Karpov #include <linux/debugfs.h> 21d900f712SDenis Karpov #include <linux/seq_file.h> 22a45c6cb8SMadhusudhan Chikkature #include <linux/interrupt.h> 23a45c6cb8SMadhusudhan Chikkature #include <linux/delay.h> 24a45c6cb8SMadhusudhan Chikkature #include <linux/dma-mapping.h> 25a45c6cb8SMadhusudhan Chikkature #include <linux/platform_device.h> 26a45c6cb8SMadhusudhan Chikkature #include <linux/workqueue.h> 27a45c6cb8SMadhusudhan Chikkature #include <linux/timer.h> 28a45c6cb8SMadhusudhan Chikkature #include <linux/clk.h> 29a45c6cb8SMadhusudhan Chikkature #include <linux/mmc/host.h> 3013189e78SJarkko Lavinen #include <linux/mmc/core.h> 31a45c6cb8SMadhusudhan Chikkature #include <linux/io.h> 32a45c6cb8SMadhusudhan Chikkature #include <linux/semaphore.h> 33a45c6cb8SMadhusudhan Chikkature #include <mach/dma.h> 34a45c6cb8SMadhusudhan Chikkature #include <mach/hardware.h> 35a45c6cb8SMadhusudhan Chikkature #include <mach/board.h> 36a45c6cb8SMadhusudhan Chikkature #include <mach/mmc.h> 37a45c6cb8SMadhusudhan Chikkature #include <mach/cpu.h> 38a45c6cb8SMadhusudhan Chikkature 39a45c6cb8SMadhusudhan Chikkature /* OMAP HSMMC Host Controller Registers */ 40a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_SYSCONFIG 0x0010 4111dd62a7SDenis Karpov #define OMAP_HSMMC_SYSSTATUS 0x0014 42a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_CON 0x002C 43a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_BLK 0x0104 44a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_ARG 0x0108 45a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_CMD 0x010C 46a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP10 0x0110 47a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP32 0x0114 48a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP54 0x0118 49a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP76 0x011C 50a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_DATA 0x0120 51a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_HCTL 0x0128 52a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_SYSCTL 0x012C 53a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_STAT 0x0130 54a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_IE 0x0134 55a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_ISE 0x0138 56a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_CAPA 0x0140 57a45c6cb8SMadhusudhan Chikkature 58a45c6cb8SMadhusudhan Chikkature #define VS18 (1 << 26) 59a45c6cb8SMadhusudhan Chikkature #define VS30 (1 << 25) 60a45c6cb8SMadhusudhan Chikkature #define SDVS18 (0x5 << 9) 61a45c6cb8SMadhusudhan Chikkature #define SDVS30 (0x6 << 9) 62eb250826SDavid Brownell #define SDVS33 (0x7 << 9) 631b331e69SKim Kyuwon #define SDVS_MASK 0x00000E00 64a45c6cb8SMadhusudhan Chikkature #define SDVSCLR 0xFFFFF1FF 65a45c6cb8SMadhusudhan Chikkature #define SDVSDET 0x00000400 66a45c6cb8SMadhusudhan Chikkature #define AUTOIDLE 0x1 67a45c6cb8SMadhusudhan Chikkature #define SDBP (1 << 8) 68a45c6cb8SMadhusudhan Chikkature #define DTO 0xe 69a45c6cb8SMadhusudhan Chikkature #define ICE 0x1 70a45c6cb8SMadhusudhan Chikkature #define ICS 0x2 71a45c6cb8SMadhusudhan Chikkature #define CEN (1 << 2) 72a45c6cb8SMadhusudhan Chikkature #define CLKD_MASK 0x0000FFC0 73a45c6cb8SMadhusudhan Chikkature #define CLKD_SHIFT 6 74a45c6cb8SMadhusudhan Chikkature #define DTO_MASK 0x000F0000 75a45c6cb8SMadhusudhan Chikkature #define DTO_SHIFT 16 76a45c6cb8SMadhusudhan Chikkature #define INT_EN_MASK 0x307F0033 77ccdfe3a6SAnand Gadiyar #define BWR_ENABLE (1 << 4) 78ccdfe3a6SAnand Gadiyar #define BRR_ENABLE (1 << 5) 79a45c6cb8SMadhusudhan Chikkature #define INIT_STREAM (1 << 1) 80a45c6cb8SMadhusudhan Chikkature #define DP_SELECT (1 << 21) 81a45c6cb8SMadhusudhan Chikkature #define DDIR (1 << 4) 82a45c6cb8SMadhusudhan Chikkature #define DMA_EN 0x1 83a45c6cb8SMadhusudhan Chikkature #define MSBS (1 << 5) 84a45c6cb8SMadhusudhan Chikkature #define BCE (1 << 1) 85a45c6cb8SMadhusudhan Chikkature #define FOUR_BIT (1 << 1) 8673153010SJarkko Lavinen #define DW8 (1 << 5) 87a45c6cb8SMadhusudhan Chikkature #define CC 0x1 88a45c6cb8SMadhusudhan Chikkature #define TC 0x02 89a45c6cb8SMadhusudhan Chikkature #define OD 0x1 90a45c6cb8SMadhusudhan Chikkature #define ERR (1 << 15) 91a45c6cb8SMadhusudhan Chikkature #define CMD_TIMEOUT (1 << 16) 92a45c6cb8SMadhusudhan Chikkature #define DATA_TIMEOUT (1 << 20) 93a45c6cb8SMadhusudhan Chikkature #define CMD_CRC (1 << 17) 94a45c6cb8SMadhusudhan Chikkature #define DATA_CRC (1 << 21) 95a45c6cb8SMadhusudhan Chikkature #define CARD_ERR (1 << 28) 96a45c6cb8SMadhusudhan Chikkature #define STAT_CLEAR 0xFFFFFFFF 97a45c6cb8SMadhusudhan Chikkature #define INIT_STREAM_CMD 0x00000000 98a45c6cb8SMadhusudhan Chikkature #define DUAL_VOLT_OCR_BIT 7 99a45c6cb8SMadhusudhan Chikkature #define SRC (1 << 25) 100a45c6cb8SMadhusudhan Chikkature #define SRD (1 << 26) 10111dd62a7SDenis Karpov #define SOFTRESET (1 << 1) 10211dd62a7SDenis Karpov #define RESETDONE (1 << 0) 103a45c6cb8SMadhusudhan Chikkature 104a45c6cb8SMadhusudhan Chikkature /* 105a45c6cb8SMadhusudhan Chikkature * FIXME: Most likely all the data using these _DEVID defines should come 106a45c6cb8SMadhusudhan Chikkature * from the platform_data, or implemented in controller and slot specific 107a45c6cb8SMadhusudhan Chikkature * functions. 108a45c6cb8SMadhusudhan Chikkature */ 109a45c6cb8SMadhusudhan Chikkature #define OMAP_MMC1_DEVID 0 110a45c6cb8SMadhusudhan Chikkature #define OMAP_MMC2_DEVID 1 111f3e2f1ddSGrazvydas Ignotas #define OMAP_MMC3_DEVID 2 11282cf818dSkishore kadiyala #define OMAP_MMC4_DEVID 3 11382cf818dSkishore kadiyala #define OMAP_MMC5_DEVID 4 114a45c6cb8SMadhusudhan Chikkature 115a45c6cb8SMadhusudhan Chikkature #define MMC_TIMEOUT_MS 20 116a45c6cb8SMadhusudhan Chikkature #define OMAP_MMC_MASTER_CLOCK 96000000 117a45c6cb8SMadhusudhan Chikkature #define DRIVER_NAME "mmci-omap-hs" 118a45c6cb8SMadhusudhan Chikkature 119dd498effSDenis Karpov /* Timeouts for entering power saving states on inactivity, msec */ 120dd498effSDenis Karpov #define OMAP_MMC_DISABLED_TIMEOUT 100 12113189e78SJarkko Lavinen #define OMAP_MMC_SLEEP_TIMEOUT 1000 12213189e78SJarkko Lavinen #define OMAP_MMC_OFF_TIMEOUT 8000 123dd498effSDenis Karpov 124a45c6cb8SMadhusudhan Chikkature /* 125a45c6cb8SMadhusudhan Chikkature * One controller can have multiple slots, like on some omap boards using 126a45c6cb8SMadhusudhan Chikkature * omap.c controller driver. Luckily this is not currently done on any known 127a45c6cb8SMadhusudhan Chikkature * omap_hsmmc.c device. 128a45c6cb8SMadhusudhan Chikkature */ 129a45c6cb8SMadhusudhan Chikkature #define mmc_slot(host) (host->pdata->slots[host->slot_id]) 130a45c6cb8SMadhusudhan Chikkature 131a45c6cb8SMadhusudhan Chikkature /* 132a45c6cb8SMadhusudhan Chikkature * MMC Host controller read/write API's 133a45c6cb8SMadhusudhan Chikkature */ 134a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_READ(base, reg) \ 135a45c6cb8SMadhusudhan Chikkature __raw_readl((base) + OMAP_HSMMC_##reg) 136a45c6cb8SMadhusudhan Chikkature 137a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_WRITE(base, reg, val) \ 138a45c6cb8SMadhusudhan Chikkature __raw_writel((val), (base) + OMAP_HSMMC_##reg) 139a45c6cb8SMadhusudhan Chikkature 14070a3341aSDenis Karpov struct omap_hsmmc_host { 141a45c6cb8SMadhusudhan Chikkature struct device *dev; 142a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc; 143a45c6cb8SMadhusudhan Chikkature struct mmc_request *mrq; 144a45c6cb8SMadhusudhan Chikkature struct mmc_command *cmd; 145a45c6cb8SMadhusudhan Chikkature struct mmc_data *data; 146a45c6cb8SMadhusudhan Chikkature struct clk *fclk; 147a45c6cb8SMadhusudhan Chikkature struct clk *iclk; 148a45c6cb8SMadhusudhan Chikkature struct clk *dbclk; 149a45c6cb8SMadhusudhan Chikkature struct semaphore sem; 150a45c6cb8SMadhusudhan Chikkature struct work_struct mmc_carddetect_work; 151a45c6cb8SMadhusudhan Chikkature void __iomem *base; 152a45c6cb8SMadhusudhan Chikkature resource_size_t mapbase; 1534dffd7a2SAdrian Hunter spinlock_t irq_lock; /* Prevent races with irq handler */ 1544dffd7a2SAdrian Hunter unsigned long flags; 155a45c6cb8SMadhusudhan Chikkature unsigned int id; 156a45c6cb8SMadhusudhan Chikkature unsigned int dma_len; 1570ccd76d4SJuha Yrjola unsigned int dma_sg_idx; 158a45c6cb8SMadhusudhan Chikkature unsigned char bus_mode; 159a3621465SAdrian Hunter unsigned char power_mode; 160a45c6cb8SMadhusudhan Chikkature u32 *buffer; 161a45c6cb8SMadhusudhan Chikkature u32 bytesleft; 162a45c6cb8SMadhusudhan Chikkature int suspended; 163a45c6cb8SMadhusudhan Chikkature int irq; 164a45c6cb8SMadhusudhan Chikkature int use_dma, dma_ch; 165f3e2f1ddSGrazvydas Ignotas int dma_line_tx, dma_line_rx; 166a45c6cb8SMadhusudhan Chikkature int slot_id; 1672bec0893SAdrian Hunter int got_dbclk; 1684a694dc9SAdrian Hunter int response_busy; 16911dd62a7SDenis Karpov int context_loss; 170dd498effSDenis Karpov int dpm_state; 171623821f7SAdrian Hunter int vdd; 172b62f6228SAdrian Hunter int protect_card; 173b62f6228SAdrian Hunter int reqs_blocked; 17411dd62a7SDenis Karpov 175a45c6cb8SMadhusudhan Chikkature struct omap_mmc_platform_data *pdata; 176a45c6cb8SMadhusudhan Chikkature }; 177a45c6cb8SMadhusudhan Chikkature 178a45c6cb8SMadhusudhan Chikkature /* 179a45c6cb8SMadhusudhan Chikkature * Stop clock to the card 180a45c6cb8SMadhusudhan Chikkature */ 18170a3341aSDenis Karpov static void omap_hsmmc_stop_clock(struct omap_hsmmc_host *host) 182a45c6cb8SMadhusudhan Chikkature { 183a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, 184a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, SYSCTL) & ~CEN); 185a45c6cb8SMadhusudhan Chikkature if ((OMAP_HSMMC_READ(host->base, SYSCTL) & CEN) != 0x0) 186a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "MMC Clock is not stoped\n"); 187a45c6cb8SMadhusudhan Chikkature } 188a45c6cb8SMadhusudhan Chikkature 18911dd62a7SDenis Karpov #ifdef CONFIG_PM 19011dd62a7SDenis Karpov 19111dd62a7SDenis Karpov /* 19211dd62a7SDenis Karpov * Restore the MMC host context, if it was lost as result of a 19311dd62a7SDenis Karpov * power state change. 19411dd62a7SDenis Karpov */ 19570a3341aSDenis Karpov static int omap_hsmmc_context_restore(struct omap_hsmmc_host *host) 19611dd62a7SDenis Karpov { 19711dd62a7SDenis Karpov struct mmc_ios *ios = &host->mmc->ios; 19811dd62a7SDenis Karpov struct omap_mmc_platform_data *pdata = host->pdata; 19911dd62a7SDenis Karpov int context_loss = 0; 20011dd62a7SDenis Karpov u32 hctl, capa, con; 20111dd62a7SDenis Karpov u16 dsor = 0; 20211dd62a7SDenis Karpov unsigned long timeout; 20311dd62a7SDenis Karpov 20411dd62a7SDenis Karpov if (pdata->get_context_loss_count) { 20511dd62a7SDenis Karpov context_loss = pdata->get_context_loss_count(host->dev); 20611dd62a7SDenis Karpov if (context_loss < 0) 20711dd62a7SDenis Karpov return 1; 20811dd62a7SDenis Karpov } 20911dd62a7SDenis Karpov 21011dd62a7SDenis Karpov dev_dbg(mmc_dev(host->mmc), "context was %slost\n", 21111dd62a7SDenis Karpov context_loss == host->context_loss ? "not " : ""); 21211dd62a7SDenis Karpov if (host->context_loss == context_loss) 21311dd62a7SDenis Karpov return 1; 21411dd62a7SDenis Karpov 21511dd62a7SDenis Karpov /* Wait for hardware reset */ 21611dd62a7SDenis Karpov timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 21711dd62a7SDenis Karpov while ((OMAP_HSMMC_READ(host->base, SYSSTATUS) & RESETDONE) != RESETDONE 21811dd62a7SDenis Karpov && time_before(jiffies, timeout)) 21911dd62a7SDenis Karpov ; 22011dd62a7SDenis Karpov 22111dd62a7SDenis Karpov /* Do software reset */ 22211dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, SYSCONFIG, SOFTRESET); 22311dd62a7SDenis Karpov timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 22411dd62a7SDenis Karpov while ((OMAP_HSMMC_READ(host->base, SYSSTATUS) & RESETDONE) != RESETDONE 22511dd62a7SDenis Karpov && time_before(jiffies, timeout)) 22611dd62a7SDenis Karpov ; 22711dd62a7SDenis Karpov 22811dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, SYSCONFIG, 22911dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCONFIG) | AUTOIDLE); 23011dd62a7SDenis Karpov 23111dd62a7SDenis Karpov if (host->id == OMAP_MMC1_DEVID) { 23211dd62a7SDenis Karpov if (host->power_mode != MMC_POWER_OFF && 23311dd62a7SDenis Karpov (1 << ios->vdd) <= MMC_VDD_23_24) 23411dd62a7SDenis Karpov hctl = SDVS18; 23511dd62a7SDenis Karpov else 23611dd62a7SDenis Karpov hctl = SDVS30; 23711dd62a7SDenis Karpov capa = VS30 | VS18; 23811dd62a7SDenis Karpov } else { 23911dd62a7SDenis Karpov hctl = SDVS18; 24011dd62a7SDenis Karpov capa = VS18; 24111dd62a7SDenis Karpov } 24211dd62a7SDenis Karpov 24311dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, HCTL, 24411dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, HCTL) | hctl); 24511dd62a7SDenis Karpov 24611dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, CAPA, 24711dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, CAPA) | capa); 24811dd62a7SDenis Karpov 24911dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, HCTL, 25011dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, HCTL) | SDBP); 25111dd62a7SDenis Karpov 25211dd62a7SDenis Karpov timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 25311dd62a7SDenis Karpov while ((OMAP_HSMMC_READ(host->base, HCTL) & SDBP) != SDBP 25411dd62a7SDenis Karpov && time_before(jiffies, timeout)) 25511dd62a7SDenis Karpov ; 25611dd62a7SDenis Karpov 25711dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); 25811dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK); 25911dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK); 26011dd62a7SDenis Karpov 26111dd62a7SDenis Karpov /* Do not initialize card-specific things if the power is off */ 26211dd62a7SDenis Karpov if (host->power_mode == MMC_POWER_OFF) 26311dd62a7SDenis Karpov goto out; 26411dd62a7SDenis Karpov 26511dd62a7SDenis Karpov con = OMAP_HSMMC_READ(host->base, CON); 26611dd62a7SDenis Karpov switch (ios->bus_width) { 26711dd62a7SDenis Karpov case MMC_BUS_WIDTH_8: 26811dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, CON, con | DW8); 26911dd62a7SDenis Karpov break; 27011dd62a7SDenis Karpov case MMC_BUS_WIDTH_4: 27111dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, CON, con & ~DW8); 27211dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, HCTL, 27311dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, HCTL) | FOUR_BIT); 27411dd62a7SDenis Karpov break; 27511dd62a7SDenis Karpov case MMC_BUS_WIDTH_1: 27611dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, CON, con & ~DW8); 27711dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, HCTL, 27811dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, HCTL) & ~FOUR_BIT); 27911dd62a7SDenis Karpov break; 28011dd62a7SDenis Karpov } 28111dd62a7SDenis Karpov 28211dd62a7SDenis Karpov if (ios->clock) { 28311dd62a7SDenis Karpov dsor = OMAP_MMC_MASTER_CLOCK / ios->clock; 28411dd62a7SDenis Karpov if (dsor < 1) 28511dd62a7SDenis Karpov dsor = 1; 28611dd62a7SDenis Karpov 28711dd62a7SDenis Karpov if (OMAP_MMC_MASTER_CLOCK / dsor > ios->clock) 28811dd62a7SDenis Karpov dsor++; 28911dd62a7SDenis Karpov 29011dd62a7SDenis Karpov if (dsor > 250) 29111dd62a7SDenis Karpov dsor = 250; 29211dd62a7SDenis Karpov } 29311dd62a7SDenis Karpov 29411dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, SYSCTL, 29511dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCTL) & ~CEN); 29611dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, SYSCTL, (dsor << 6) | (DTO << 16)); 29711dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, SYSCTL, 29811dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCTL) | ICE); 29911dd62a7SDenis Karpov 30011dd62a7SDenis Karpov timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 30111dd62a7SDenis Karpov while ((OMAP_HSMMC_READ(host->base, SYSCTL) & ICS) != ICS 30211dd62a7SDenis Karpov && time_before(jiffies, timeout)) 30311dd62a7SDenis Karpov ; 30411dd62a7SDenis Karpov 30511dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, SYSCTL, 30611dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCTL) | CEN); 30711dd62a7SDenis Karpov 30811dd62a7SDenis Karpov con = OMAP_HSMMC_READ(host->base, CON); 30911dd62a7SDenis Karpov if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN) 31011dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, CON, con | OD); 31111dd62a7SDenis Karpov else 31211dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, CON, con & ~OD); 31311dd62a7SDenis Karpov out: 31411dd62a7SDenis Karpov host->context_loss = context_loss; 31511dd62a7SDenis Karpov 31611dd62a7SDenis Karpov dev_dbg(mmc_dev(host->mmc), "context is restored\n"); 31711dd62a7SDenis Karpov return 0; 31811dd62a7SDenis Karpov } 31911dd62a7SDenis Karpov 32011dd62a7SDenis Karpov /* 32111dd62a7SDenis Karpov * Save the MMC host context (store the number of power state changes so far). 32211dd62a7SDenis Karpov */ 32370a3341aSDenis Karpov static void omap_hsmmc_context_save(struct omap_hsmmc_host *host) 32411dd62a7SDenis Karpov { 32511dd62a7SDenis Karpov struct omap_mmc_platform_data *pdata = host->pdata; 32611dd62a7SDenis Karpov int context_loss; 32711dd62a7SDenis Karpov 32811dd62a7SDenis Karpov if (pdata->get_context_loss_count) { 32911dd62a7SDenis Karpov context_loss = pdata->get_context_loss_count(host->dev); 33011dd62a7SDenis Karpov if (context_loss < 0) 33111dd62a7SDenis Karpov return; 33211dd62a7SDenis Karpov host->context_loss = context_loss; 33311dd62a7SDenis Karpov } 33411dd62a7SDenis Karpov } 33511dd62a7SDenis Karpov 33611dd62a7SDenis Karpov #else 33711dd62a7SDenis Karpov 33870a3341aSDenis Karpov static int omap_hsmmc_context_restore(struct omap_hsmmc_host *host) 33911dd62a7SDenis Karpov { 34011dd62a7SDenis Karpov return 0; 34111dd62a7SDenis Karpov } 34211dd62a7SDenis Karpov 34370a3341aSDenis Karpov static void omap_hsmmc_context_save(struct omap_hsmmc_host *host) 34411dd62a7SDenis Karpov { 34511dd62a7SDenis Karpov } 34611dd62a7SDenis Karpov 34711dd62a7SDenis Karpov #endif 34811dd62a7SDenis Karpov 349a45c6cb8SMadhusudhan Chikkature /* 350a45c6cb8SMadhusudhan Chikkature * Send init stream sequence to card 351a45c6cb8SMadhusudhan Chikkature * before sending IDLE command 352a45c6cb8SMadhusudhan Chikkature */ 35370a3341aSDenis Karpov static void send_init_stream(struct omap_hsmmc_host *host) 354a45c6cb8SMadhusudhan Chikkature { 355a45c6cb8SMadhusudhan Chikkature int reg = 0; 356a45c6cb8SMadhusudhan Chikkature unsigned long timeout; 357a45c6cb8SMadhusudhan Chikkature 358b62f6228SAdrian Hunter if (host->protect_card) 359b62f6228SAdrian Hunter return; 360b62f6228SAdrian Hunter 361a45c6cb8SMadhusudhan Chikkature disable_irq(host->irq); 362a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CON, 363a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, CON) | INIT_STREAM); 364a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CMD, INIT_STREAM_CMD); 365a45c6cb8SMadhusudhan Chikkature 366a45c6cb8SMadhusudhan Chikkature timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 367a45c6cb8SMadhusudhan Chikkature while ((reg != CC) && time_before(jiffies, timeout)) 368a45c6cb8SMadhusudhan Chikkature reg = OMAP_HSMMC_READ(host->base, STAT) & CC; 369a45c6cb8SMadhusudhan Chikkature 370a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CON, 371a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, CON) & ~INIT_STREAM); 372c653a6d4SAdrian Hunter 373c653a6d4SAdrian Hunter OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); 374c653a6d4SAdrian Hunter OMAP_HSMMC_READ(host->base, STAT); 375c653a6d4SAdrian Hunter 376a45c6cb8SMadhusudhan Chikkature enable_irq(host->irq); 377a45c6cb8SMadhusudhan Chikkature } 378a45c6cb8SMadhusudhan Chikkature 379a45c6cb8SMadhusudhan Chikkature static inline 38070a3341aSDenis Karpov int omap_hsmmc_cover_is_closed(struct omap_hsmmc_host *host) 381a45c6cb8SMadhusudhan Chikkature { 382a45c6cb8SMadhusudhan Chikkature int r = 1; 383a45c6cb8SMadhusudhan Chikkature 384191d1f1dSDenis Karpov if (mmc_slot(host).get_cover_state) 385191d1f1dSDenis Karpov r = mmc_slot(host).get_cover_state(host->dev, host->slot_id); 386a45c6cb8SMadhusudhan Chikkature return r; 387a45c6cb8SMadhusudhan Chikkature } 388a45c6cb8SMadhusudhan Chikkature 389a45c6cb8SMadhusudhan Chikkature static ssize_t 39070a3341aSDenis Karpov omap_hsmmc_show_cover_switch(struct device *dev, struct device_attribute *attr, 391a45c6cb8SMadhusudhan Chikkature char *buf) 392a45c6cb8SMadhusudhan Chikkature { 393a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev); 39470a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 395a45c6cb8SMadhusudhan Chikkature 39670a3341aSDenis Karpov return sprintf(buf, "%s\n", 39770a3341aSDenis Karpov omap_hsmmc_cover_is_closed(host) ? "closed" : "open"); 398a45c6cb8SMadhusudhan Chikkature } 399a45c6cb8SMadhusudhan Chikkature 40070a3341aSDenis Karpov static DEVICE_ATTR(cover_switch, S_IRUGO, omap_hsmmc_show_cover_switch, NULL); 401a45c6cb8SMadhusudhan Chikkature 402a45c6cb8SMadhusudhan Chikkature static ssize_t 40370a3341aSDenis Karpov omap_hsmmc_show_slot_name(struct device *dev, struct device_attribute *attr, 404a45c6cb8SMadhusudhan Chikkature char *buf) 405a45c6cb8SMadhusudhan Chikkature { 406a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev); 40770a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 408a45c6cb8SMadhusudhan Chikkature 409191d1f1dSDenis Karpov return sprintf(buf, "%s\n", mmc_slot(host).name); 410a45c6cb8SMadhusudhan Chikkature } 411a45c6cb8SMadhusudhan Chikkature 41270a3341aSDenis Karpov static DEVICE_ATTR(slot_name, S_IRUGO, omap_hsmmc_show_slot_name, NULL); 413a45c6cb8SMadhusudhan Chikkature 414a45c6cb8SMadhusudhan Chikkature /* 415a45c6cb8SMadhusudhan Chikkature * Configure the response type and send the cmd. 416a45c6cb8SMadhusudhan Chikkature */ 417a45c6cb8SMadhusudhan Chikkature static void 41870a3341aSDenis Karpov omap_hsmmc_start_command(struct omap_hsmmc_host *host, struct mmc_command *cmd, 419a45c6cb8SMadhusudhan Chikkature struct mmc_data *data) 420a45c6cb8SMadhusudhan Chikkature { 421a45c6cb8SMadhusudhan Chikkature int cmdreg = 0, resptype = 0, cmdtype = 0; 422a45c6cb8SMadhusudhan Chikkature 423a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "%s: CMD%d, argument 0x%08x\n", 424a45c6cb8SMadhusudhan Chikkature mmc_hostname(host->mmc), cmd->opcode, cmd->arg); 425a45c6cb8SMadhusudhan Chikkature host->cmd = cmd; 426a45c6cb8SMadhusudhan Chikkature 427a45c6cb8SMadhusudhan Chikkature /* 428a45c6cb8SMadhusudhan Chikkature * Clear status bits and enable interrupts 429a45c6cb8SMadhusudhan Chikkature */ 430a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); 431a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK); 432ccdfe3a6SAnand Gadiyar 433ccdfe3a6SAnand Gadiyar if (host->use_dma) 434ccdfe3a6SAnand Gadiyar OMAP_HSMMC_WRITE(host->base, IE, 435ccdfe3a6SAnand Gadiyar INT_EN_MASK & ~(BRR_ENABLE | BWR_ENABLE)); 436ccdfe3a6SAnand Gadiyar else 437a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK); 438a45c6cb8SMadhusudhan Chikkature 4394a694dc9SAdrian Hunter host->response_busy = 0; 440a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_PRESENT) { 441a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_136) 442a45c6cb8SMadhusudhan Chikkature resptype = 1; 4434a694dc9SAdrian Hunter else if (cmd->flags & MMC_RSP_BUSY) { 4444a694dc9SAdrian Hunter resptype = 3; 4454a694dc9SAdrian Hunter host->response_busy = 1; 4464a694dc9SAdrian Hunter } else 447a45c6cb8SMadhusudhan Chikkature resptype = 2; 448a45c6cb8SMadhusudhan Chikkature } 449a45c6cb8SMadhusudhan Chikkature 450a45c6cb8SMadhusudhan Chikkature /* 451a45c6cb8SMadhusudhan Chikkature * Unlike OMAP1 controller, the cmdtype does not seem to be based on 452a45c6cb8SMadhusudhan Chikkature * ac, bc, adtc, bcr. Only commands ending an open ended transfer need 453a45c6cb8SMadhusudhan Chikkature * a val of 0x3, rest 0x0. 454a45c6cb8SMadhusudhan Chikkature */ 455a45c6cb8SMadhusudhan Chikkature if (cmd == host->mrq->stop) 456a45c6cb8SMadhusudhan Chikkature cmdtype = 0x3; 457a45c6cb8SMadhusudhan Chikkature 458a45c6cb8SMadhusudhan Chikkature cmdreg = (cmd->opcode << 24) | (resptype << 16) | (cmdtype << 22); 459a45c6cb8SMadhusudhan Chikkature 460a45c6cb8SMadhusudhan Chikkature if (data) { 461a45c6cb8SMadhusudhan Chikkature cmdreg |= DP_SELECT | MSBS | BCE; 462a45c6cb8SMadhusudhan Chikkature if (data->flags & MMC_DATA_READ) 463a45c6cb8SMadhusudhan Chikkature cmdreg |= DDIR; 464a45c6cb8SMadhusudhan Chikkature else 465a45c6cb8SMadhusudhan Chikkature cmdreg &= ~(DDIR); 466a45c6cb8SMadhusudhan Chikkature } 467a45c6cb8SMadhusudhan Chikkature 468a45c6cb8SMadhusudhan Chikkature if (host->use_dma) 469a45c6cb8SMadhusudhan Chikkature cmdreg |= DMA_EN; 470a45c6cb8SMadhusudhan Chikkature 4714dffd7a2SAdrian Hunter /* 4724dffd7a2SAdrian Hunter * In an interrupt context (i.e. STOP command), the spinlock is unlocked 4734dffd7a2SAdrian Hunter * by the interrupt handler, otherwise (i.e. for a new request) it is 4744dffd7a2SAdrian Hunter * unlocked here. 4754dffd7a2SAdrian Hunter */ 4764dffd7a2SAdrian Hunter if (!in_interrupt()) 4774dffd7a2SAdrian Hunter spin_unlock_irqrestore(&host->irq_lock, host->flags); 4784dffd7a2SAdrian Hunter 479a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, ARG, cmd->arg); 480a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CMD, cmdreg); 481a45c6cb8SMadhusudhan Chikkature } 482a45c6cb8SMadhusudhan Chikkature 4830ccd76d4SJuha Yrjola static int 48470a3341aSDenis Karpov omap_hsmmc_get_dma_dir(struct omap_hsmmc_host *host, struct mmc_data *data) 4850ccd76d4SJuha Yrjola { 4860ccd76d4SJuha Yrjola if (data->flags & MMC_DATA_WRITE) 4870ccd76d4SJuha Yrjola return DMA_TO_DEVICE; 4880ccd76d4SJuha Yrjola else 4890ccd76d4SJuha Yrjola return DMA_FROM_DEVICE; 4900ccd76d4SJuha Yrjola } 4910ccd76d4SJuha Yrjola 492a45c6cb8SMadhusudhan Chikkature /* 493a45c6cb8SMadhusudhan Chikkature * Notify the transfer complete to MMC core 494a45c6cb8SMadhusudhan Chikkature */ 495a45c6cb8SMadhusudhan Chikkature static void 49670a3341aSDenis Karpov omap_hsmmc_xfer_done(struct omap_hsmmc_host *host, struct mmc_data *data) 497a45c6cb8SMadhusudhan Chikkature { 4984a694dc9SAdrian Hunter if (!data) { 4994a694dc9SAdrian Hunter struct mmc_request *mrq = host->mrq; 5004a694dc9SAdrian Hunter 50123050103SAdrian Hunter /* TC before CC from CMD6 - don't know why, but it happens */ 50223050103SAdrian Hunter if (host->cmd && host->cmd->opcode == 6 && 50323050103SAdrian Hunter host->response_busy) { 50423050103SAdrian Hunter host->response_busy = 0; 50523050103SAdrian Hunter return; 50623050103SAdrian Hunter } 50723050103SAdrian Hunter 5084a694dc9SAdrian Hunter host->mrq = NULL; 5094a694dc9SAdrian Hunter mmc_request_done(host->mmc, mrq); 5104a694dc9SAdrian Hunter return; 5114a694dc9SAdrian Hunter } 5124a694dc9SAdrian Hunter 513a45c6cb8SMadhusudhan Chikkature host->data = NULL; 514a45c6cb8SMadhusudhan Chikkature 515a45c6cb8SMadhusudhan Chikkature if (host->use_dma && host->dma_ch != -1) 516a45c6cb8SMadhusudhan Chikkature dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->dma_len, 51770a3341aSDenis Karpov omap_hsmmc_get_dma_dir(host, data)); 518a45c6cb8SMadhusudhan Chikkature 519a45c6cb8SMadhusudhan Chikkature if (!data->error) 520a45c6cb8SMadhusudhan Chikkature data->bytes_xfered += data->blocks * (data->blksz); 521a45c6cb8SMadhusudhan Chikkature else 522a45c6cb8SMadhusudhan Chikkature data->bytes_xfered = 0; 523a45c6cb8SMadhusudhan Chikkature 524a45c6cb8SMadhusudhan Chikkature if (!data->stop) { 525a45c6cb8SMadhusudhan Chikkature host->mrq = NULL; 526a45c6cb8SMadhusudhan Chikkature mmc_request_done(host->mmc, data->mrq); 527a45c6cb8SMadhusudhan Chikkature return; 528a45c6cb8SMadhusudhan Chikkature } 52970a3341aSDenis Karpov omap_hsmmc_start_command(host, data->stop, NULL); 530a45c6cb8SMadhusudhan Chikkature } 531a45c6cb8SMadhusudhan Chikkature 532a45c6cb8SMadhusudhan Chikkature /* 533a45c6cb8SMadhusudhan Chikkature * Notify the core about command completion 534a45c6cb8SMadhusudhan Chikkature */ 535a45c6cb8SMadhusudhan Chikkature static void 53670a3341aSDenis Karpov omap_hsmmc_cmd_done(struct omap_hsmmc_host *host, struct mmc_command *cmd) 537a45c6cb8SMadhusudhan Chikkature { 538a45c6cb8SMadhusudhan Chikkature host->cmd = NULL; 539a45c6cb8SMadhusudhan Chikkature 540a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_PRESENT) { 541a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_136) { 542a45c6cb8SMadhusudhan Chikkature /* response type 2 */ 543a45c6cb8SMadhusudhan Chikkature cmd->resp[3] = OMAP_HSMMC_READ(host->base, RSP10); 544a45c6cb8SMadhusudhan Chikkature cmd->resp[2] = OMAP_HSMMC_READ(host->base, RSP32); 545a45c6cb8SMadhusudhan Chikkature cmd->resp[1] = OMAP_HSMMC_READ(host->base, RSP54); 546a45c6cb8SMadhusudhan Chikkature cmd->resp[0] = OMAP_HSMMC_READ(host->base, RSP76); 547a45c6cb8SMadhusudhan Chikkature } else { 548a45c6cb8SMadhusudhan Chikkature /* response types 1, 1b, 3, 4, 5, 6 */ 549a45c6cb8SMadhusudhan Chikkature cmd->resp[0] = OMAP_HSMMC_READ(host->base, RSP10); 550a45c6cb8SMadhusudhan Chikkature } 551a45c6cb8SMadhusudhan Chikkature } 5524a694dc9SAdrian Hunter if ((host->data == NULL && !host->response_busy) || cmd->error) { 553a45c6cb8SMadhusudhan Chikkature host->mrq = NULL; 554a45c6cb8SMadhusudhan Chikkature mmc_request_done(host->mmc, cmd->mrq); 555a45c6cb8SMadhusudhan Chikkature } 556a45c6cb8SMadhusudhan Chikkature } 557a45c6cb8SMadhusudhan Chikkature 558a45c6cb8SMadhusudhan Chikkature /* 559a45c6cb8SMadhusudhan Chikkature * DMA clean up for command errors 560a45c6cb8SMadhusudhan Chikkature */ 56170a3341aSDenis Karpov static void omap_hsmmc_dma_cleanup(struct omap_hsmmc_host *host, int errno) 562a45c6cb8SMadhusudhan Chikkature { 56382788ff5SJarkko Lavinen host->data->error = errno; 564a45c6cb8SMadhusudhan Chikkature 565a45c6cb8SMadhusudhan Chikkature if (host->use_dma && host->dma_ch != -1) { 566a45c6cb8SMadhusudhan Chikkature dma_unmap_sg(mmc_dev(host->mmc), host->data->sg, host->dma_len, 56770a3341aSDenis Karpov omap_hsmmc_get_dma_dir(host, host->data)); 568a45c6cb8SMadhusudhan Chikkature omap_free_dma(host->dma_ch); 569a45c6cb8SMadhusudhan Chikkature host->dma_ch = -1; 570a45c6cb8SMadhusudhan Chikkature up(&host->sem); 571a45c6cb8SMadhusudhan Chikkature } 572a45c6cb8SMadhusudhan Chikkature host->data = NULL; 573a45c6cb8SMadhusudhan Chikkature } 574a45c6cb8SMadhusudhan Chikkature 575a45c6cb8SMadhusudhan Chikkature /* 576a45c6cb8SMadhusudhan Chikkature * Readable error output 577a45c6cb8SMadhusudhan Chikkature */ 578a45c6cb8SMadhusudhan Chikkature #ifdef CONFIG_MMC_DEBUG 57970a3341aSDenis Karpov static void omap_hsmmc_report_irq(struct omap_hsmmc_host *host, u32 status) 580a45c6cb8SMadhusudhan Chikkature { 581a45c6cb8SMadhusudhan Chikkature /* --- means reserved bit without definition at documentation */ 58270a3341aSDenis Karpov static const char *omap_hsmmc_status_bits[] = { 583a45c6cb8SMadhusudhan Chikkature "CC", "TC", "BGE", "---", "BWR", "BRR", "---", "---", "CIRQ", 584a45c6cb8SMadhusudhan Chikkature "OBI", "---", "---", "---", "---", "---", "ERRI", "CTO", "CCRC", 585a45c6cb8SMadhusudhan Chikkature "CEB", "CIE", "DTO", "DCRC", "DEB", "---", "ACE", "---", 586a45c6cb8SMadhusudhan Chikkature "---", "---", "---", "CERR", "CERR", "BADA", "---", "---", "---" 587a45c6cb8SMadhusudhan Chikkature }; 588a45c6cb8SMadhusudhan Chikkature char res[256]; 589a45c6cb8SMadhusudhan Chikkature char *buf = res; 590a45c6cb8SMadhusudhan Chikkature int len, i; 591a45c6cb8SMadhusudhan Chikkature 592a45c6cb8SMadhusudhan Chikkature len = sprintf(buf, "MMC IRQ 0x%x :", status); 593a45c6cb8SMadhusudhan Chikkature buf += len; 594a45c6cb8SMadhusudhan Chikkature 59570a3341aSDenis Karpov for (i = 0; i < ARRAY_SIZE(omap_hsmmc_status_bits); i++) 596a45c6cb8SMadhusudhan Chikkature if (status & (1 << i)) { 59770a3341aSDenis Karpov len = sprintf(buf, " %s", omap_hsmmc_status_bits[i]); 598a45c6cb8SMadhusudhan Chikkature buf += len; 599a45c6cb8SMadhusudhan Chikkature } 600a45c6cb8SMadhusudhan Chikkature 601a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "%s\n", res); 602a45c6cb8SMadhusudhan Chikkature } 603a45c6cb8SMadhusudhan Chikkature #endif /* CONFIG_MMC_DEBUG */ 604a45c6cb8SMadhusudhan Chikkature 6053ebf74b1SJean Pihet /* 6063ebf74b1SJean Pihet * MMC controller internal state machines reset 6073ebf74b1SJean Pihet * 6083ebf74b1SJean Pihet * Used to reset command or data internal state machines, using respectively 6093ebf74b1SJean Pihet * SRC or SRD bit of SYSCTL register 6103ebf74b1SJean Pihet * Can be called from interrupt context 6113ebf74b1SJean Pihet */ 61270a3341aSDenis Karpov static inline void omap_hsmmc_reset_controller_fsm(struct omap_hsmmc_host *host, 6133ebf74b1SJean Pihet unsigned long bit) 6143ebf74b1SJean Pihet { 6153ebf74b1SJean Pihet unsigned long i = 0; 6163ebf74b1SJean Pihet unsigned long limit = (loops_per_jiffy * 6173ebf74b1SJean Pihet msecs_to_jiffies(MMC_TIMEOUT_MS)); 6183ebf74b1SJean Pihet 6193ebf74b1SJean Pihet OMAP_HSMMC_WRITE(host->base, SYSCTL, 6203ebf74b1SJean Pihet OMAP_HSMMC_READ(host->base, SYSCTL) | bit); 6213ebf74b1SJean Pihet 6223ebf74b1SJean Pihet while ((OMAP_HSMMC_READ(host->base, SYSCTL) & bit) && 6233ebf74b1SJean Pihet (i++ < limit)) 6243ebf74b1SJean Pihet cpu_relax(); 6253ebf74b1SJean Pihet 6263ebf74b1SJean Pihet if (OMAP_HSMMC_READ(host->base, SYSCTL) & bit) 6273ebf74b1SJean Pihet dev_err(mmc_dev(host->mmc), 6283ebf74b1SJean Pihet "Timeout waiting on controller reset in %s\n", 6293ebf74b1SJean Pihet __func__); 6303ebf74b1SJean Pihet } 631a45c6cb8SMadhusudhan Chikkature 632a45c6cb8SMadhusudhan Chikkature /* 633a45c6cb8SMadhusudhan Chikkature * MMC controller IRQ handler 634a45c6cb8SMadhusudhan Chikkature */ 63570a3341aSDenis Karpov static irqreturn_t omap_hsmmc_irq(int irq, void *dev_id) 636a45c6cb8SMadhusudhan Chikkature { 63770a3341aSDenis Karpov struct omap_hsmmc_host *host = dev_id; 638a45c6cb8SMadhusudhan Chikkature struct mmc_data *data; 639a45c6cb8SMadhusudhan Chikkature int end_cmd = 0, end_trans = 0, status; 640a45c6cb8SMadhusudhan Chikkature 6414dffd7a2SAdrian Hunter spin_lock(&host->irq_lock); 6424dffd7a2SAdrian Hunter 6434a694dc9SAdrian Hunter if (host->mrq == NULL) { 644a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, STAT, 645a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, STAT)); 64600adadc1SKevin Hilman /* Flush posted write */ 64700adadc1SKevin Hilman OMAP_HSMMC_READ(host->base, STAT); 6484dffd7a2SAdrian Hunter spin_unlock(&host->irq_lock); 649a45c6cb8SMadhusudhan Chikkature return IRQ_HANDLED; 650a45c6cb8SMadhusudhan Chikkature } 651a45c6cb8SMadhusudhan Chikkature 652a45c6cb8SMadhusudhan Chikkature data = host->data; 653a45c6cb8SMadhusudhan Chikkature status = OMAP_HSMMC_READ(host->base, STAT); 654a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "IRQ Status is %x\n", status); 655a45c6cb8SMadhusudhan Chikkature 656a45c6cb8SMadhusudhan Chikkature if (status & ERR) { 657a45c6cb8SMadhusudhan Chikkature #ifdef CONFIG_MMC_DEBUG 65870a3341aSDenis Karpov omap_hsmmc_report_irq(host, status); 659a45c6cb8SMadhusudhan Chikkature #endif 660a45c6cb8SMadhusudhan Chikkature if ((status & CMD_TIMEOUT) || 661a45c6cb8SMadhusudhan Chikkature (status & CMD_CRC)) { 662a45c6cb8SMadhusudhan Chikkature if (host->cmd) { 663a45c6cb8SMadhusudhan Chikkature if (status & CMD_TIMEOUT) { 66470a3341aSDenis Karpov omap_hsmmc_reset_controller_fsm(host, 665191d1f1dSDenis Karpov SRC); 666a45c6cb8SMadhusudhan Chikkature host->cmd->error = -ETIMEDOUT; 667a45c6cb8SMadhusudhan Chikkature } else { 668a45c6cb8SMadhusudhan Chikkature host->cmd->error = -EILSEQ; 669a45c6cb8SMadhusudhan Chikkature } 670a45c6cb8SMadhusudhan Chikkature end_cmd = 1; 671a45c6cb8SMadhusudhan Chikkature } 6724a694dc9SAdrian Hunter if (host->data || host->response_busy) { 6734a694dc9SAdrian Hunter if (host->data) 67470a3341aSDenis Karpov omap_hsmmc_dma_cleanup(host, 67570a3341aSDenis Karpov -ETIMEDOUT); 6764a694dc9SAdrian Hunter host->response_busy = 0; 67770a3341aSDenis Karpov omap_hsmmc_reset_controller_fsm(host, SRD); 678c232f457SJean Pihet } 679a45c6cb8SMadhusudhan Chikkature } 680a45c6cb8SMadhusudhan Chikkature if ((status & DATA_TIMEOUT) || 681a45c6cb8SMadhusudhan Chikkature (status & DATA_CRC)) { 6824a694dc9SAdrian Hunter if (host->data || host->response_busy) { 6834a694dc9SAdrian Hunter int err = (status & DATA_TIMEOUT) ? 6844a694dc9SAdrian Hunter -ETIMEDOUT : -EILSEQ; 6854a694dc9SAdrian Hunter 6864a694dc9SAdrian Hunter if (host->data) 68770a3341aSDenis Karpov omap_hsmmc_dma_cleanup(host, err); 688a45c6cb8SMadhusudhan Chikkature else 6894a694dc9SAdrian Hunter host->mrq->cmd->error = err; 6904a694dc9SAdrian Hunter host->response_busy = 0; 69170a3341aSDenis Karpov omap_hsmmc_reset_controller_fsm(host, SRD); 692a45c6cb8SMadhusudhan Chikkature end_trans = 1; 693a45c6cb8SMadhusudhan Chikkature } 694a45c6cb8SMadhusudhan Chikkature } 695a45c6cb8SMadhusudhan Chikkature if (status & CARD_ERR) { 696a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 697a45c6cb8SMadhusudhan Chikkature "Ignoring card err CMD%d\n", host->cmd->opcode); 698a45c6cb8SMadhusudhan Chikkature if (host->cmd) 699a45c6cb8SMadhusudhan Chikkature end_cmd = 1; 700a45c6cb8SMadhusudhan Chikkature if (host->data) 701a45c6cb8SMadhusudhan Chikkature end_trans = 1; 702a45c6cb8SMadhusudhan Chikkature } 703a45c6cb8SMadhusudhan Chikkature } 704a45c6cb8SMadhusudhan Chikkature 705a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, STAT, status); 70600adadc1SKevin Hilman /* Flush posted write */ 70700adadc1SKevin Hilman OMAP_HSMMC_READ(host->base, STAT); 708a45c6cb8SMadhusudhan Chikkature 709a8fe29d8SJarkko Lavinen if (end_cmd || ((status & CC) && host->cmd)) 71070a3341aSDenis Karpov omap_hsmmc_cmd_done(host, host->cmd); 7110a40e647SJarkko Lavinen if ((end_trans || (status & TC)) && host->mrq) 71270a3341aSDenis Karpov omap_hsmmc_xfer_done(host, data); 713a45c6cb8SMadhusudhan Chikkature 7144dffd7a2SAdrian Hunter spin_unlock(&host->irq_lock); 7154dffd7a2SAdrian Hunter 716a45c6cb8SMadhusudhan Chikkature return IRQ_HANDLED; 717a45c6cb8SMadhusudhan Chikkature } 718a45c6cb8SMadhusudhan Chikkature 71970a3341aSDenis Karpov static void set_sd_bus_power(struct omap_hsmmc_host *host) 720e13bb300SAdrian Hunter { 721e13bb300SAdrian Hunter unsigned long i; 722e13bb300SAdrian Hunter 723e13bb300SAdrian Hunter OMAP_HSMMC_WRITE(host->base, HCTL, 724e13bb300SAdrian Hunter OMAP_HSMMC_READ(host->base, HCTL) | SDBP); 725e13bb300SAdrian Hunter for (i = 0; i < loops_per_jiffy; i++) { 726e13bb300SAdrian Hunter if (OMAP_HSMMC_READ(host->base, HCTL) & SDBP) 727e13bb300SAdrian Hunter break; 728e13bb300SAdrian Hunter cpu_relax(); 729e13bb300SAdrian Hunter } 730e13bb300SAdrian Hunter } 731e13bb300SAdrian Hunter 732a45c6cb8SMadhusudhan Chikkature /* 733eb250826SDavid Brownell * Switch MMC interface voltage ... only relevant for MMC1. 734eb250826SDavid Brownell * 735eb250826SDavid Brownell * MMC2 and MMC3 use fixed 1.8V levels, and maybe a transceiver. 736eb250826SDavid Brownell * The MMC2 transceiver controls are used instead of DAT4..DAT7. 737eb250826SDavid Brownell * Some chips, like eMMC ones, use internal transceivers. 738a45c6cb8SMadhusudhan Chikkature */ 73970a3341aSDenis Karpov static int omap_hsmmc_switch_opcond(struct omap_hsmmc_host *host, int vdd) 740a45c6cb8SMadhusudhan Chikkature { 741a45c6cb8SMadhusudhan Chikkature u32 reg_val = 0; 742a45c6cb8SMadhusudhan Chikkature int ret; 743a45c6cb8SMadhusudhan Chikkature 744a45c6cb8SMadhusudhan Chikkature /* Disable the clocks */ 745a45c6cb8SMadhusudhan Chikkature clk_disable(host->fclk); 746a45c6cb8SMadhusudhan Chikkature clk_disable(host->iclk); 7472bec0893SAdrian Hunter if (host->got_dbclk) 748a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 749a45c6cb8SMadhusudhan Chikkature 750a45c6cb8SMadhusudhan Chikkature /* Turn the power off */ 751a45c6cb8SMadhusudhan Chikkature ret = mmc_slot(host).set_power(host->dev, host->slot_id, 0, 0); 752a45c6cb8SMadhusudhan Chikkature 753a45c6cb8SMadhusudhan Chikkature /* Turn the power ON with given VDD 1.8 or 3.0v */ 7542bec0893SAdrian Hunter if (!ret) 7552bec0893SAdrian Hunter ret = mmc_slot(host).set_power(host->dev, host->slot_id, 1, 7562bec0893SAdrian Hunter vdd); 7572bec0893SAdrian Hunter clk_enable(host->iclk); 7582bec0893SAdrian Hunter clk_enable(host->fclk); 7592bec0893SAdrian Hunter if (host->got_dbclk) 7602bec0893SAdrian Hunter clk_enable(host->dbclk); 7612bec0893SAdrian Hunter 762a45c6cb8SMadhusudhan Chikkature if (ret != 0) 763a45c6cb8SMadhusudhan Chikkature goto err; 764a45c6cb8SMadhusudhan Chikkature 765a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 766a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) & SDVSCLR); 767a45c6cb8SMadhusudhan Chikkature reg_val = OMAP_HSMMC_READ(host->base, HCTL); 768eb250826SDavid Brownell 769a45c6cb8SMadhusudhan Chikkature /* 770a45c6cb8SMadhusudhan Chikkature * If a MMC dual voltage card is detected, the set_ios fn calls 771a45c6cb8SMadhusudhan Chikkature * this fn with VDD bit set for 1.8V. Upon card removal from the 77270a3341aSDenis Karpov * slot, omap_hsmmc_set_ios sets the VDD back to 3V on MMC_POWER_OFF. 773a45c6cb8SMadhusudhan Chikkature * 774eb250826SDavid Brownell * Cope with a bit of slop in the range ... per data sheets: 775eb250826SDavid Brownell * - "1.8V" for vdds_mmc1/vdds_mmc1a can be up to 2.45V max, 776eb250826SDavid Brownell * but recommended values are 1.71V to 1.89V 777eb250826SDavid Brownell * - "3.0V" for vdds_mmc1/vdds_mmc1a can be up to 3.5V max, 778eb250826SDavid Brownell * but recommended values are 2.7V to 3.3V 779eb250826SDavid Brownell * 780eb250826SDavid Brownell * Board setup code shouldn't permit anything very out-of-range. 781eb250826SDavid Brownell * TWL4030-family VMMC1 and VSIM regulators are fine (avoiding the 782eb250826SDavid Brownell * middle range) but VSIM can't power DAT4..DAT7 at more than 3V. 783a45c6cb8SMadhusudhan Chikkature */ 784eb250826SDavid Brownell if ((1 << vdd) <= MMC_VDD_23_24) 785a45c6cb8SMadhusudhan Chikkature reg_val |= SDVS18; 786eb250826SDavid Brownell else 787eb250826SDavid Brownell reg_val |= SDVS30; 788a45c6cb8SMadhusudhan Chikkature 789a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, reg_val); 790e13bb300SAdrian Hunter set_sd_bus_power(host); 791a45c6cb8SMadhusudhan Chikkature 792a45c6cb8SMadhusudhan Chikkature return 0; 793a45c6cb8SMadhusudhan Chikkature err: 794a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Unable to switch operating voltage\n"); 795a45c6cb8SMadhusudhan Chikkature return ret; 796a45c6cb8SMadhusudhan Chikkature } 797a45c6cb8SMadhusudhan Chikkature 798b62f6228SAdrian Hunter /* Protect the card while the cover is open */ 799b62f6228SAdrian Hunter static void omap_hsmmc_protect_card(struct omap_hsmmc_host *host) 800b62f6228SAdrian Hunter { 801b62f6228SAdrian Hunter if (!mmc_slot(host).get_cover_state) 802b62f6228SAdrian Hunter return; 803b62f6228SAdrian Hunter 804b62f6228SAdrian Hunter host->reqs_blocked = 0; 805b62f6228SAdrian Hunter if (mmc_slot(host).get_cover_state(host->dev, host->slot_id)) { 806b62f6228SAdrian Hunter if (host->protect_card) { 807b62f6228SAdrian Hunter printk(KERN_INFO "%s: cover is closed, " 808b62f6228SAdrian Hunter "card is now accessible\n", 809b62f6228SAdrian Hunter mmc_hostname(host->mmc)); 810b62f6228SAdrian Hunter host->protect_card = 0; 811b62f6228SAdrian Hunter } 812b62f6228SAdrian Hunter } else { 813b62f6228SAdrian Hunter if (!host->protect_card) { 814b62f6228SAdrian Hunter printk(KERN_INFO "%s: cover is open, " 815b62f6228SAdrian Hunter "card is now inaccessible\n", 816b62f6228SAdrian Hunter mmc_hostname(host->mmc)); 817b62f6228SAdrian Hunter host->protect_card = 1; 818b62f6228SAdrian Hunter } 819b62f6228SAdrian Hunter } 820b62f6228SAdrian Hunter } 821b62f6228SAdrian Hunter 822a45c6cb8SMadhusudhan Chikkature /* 823a45c6cb8SMadhusudhan Chikkature * Work Item to notify the core about card insertion/removal 824a45c6cb8SMadhusudhan Chikkature */ 82570a3341aSDenis Karpov static void omap_hsmmc_detect(struct work_struct *work) 826a45c6cb8SMadhusudhan Chikkature { 82770a3341aSDenis Karpov struct omap_hsmmc_host *host = 82870a3341aSDenis Karpov container_of(work, struct omap_hsmmc_host, mmc_carddetect_work); 829249d0fa9SDavid Brownell struct omap_mmc_slot_data *slot = &mmc_slot(host); 830a6b2240dSAdrian Hunter int carddetect; 831249d0fa9SDavid Brownell 832a6b2240dSAdrian Hunter if (host->suspended) 833a6b2240dSAdrian Hunter return; 834a45c6cb8SMadhusudhan Chikkature 835a45c6cb8SMadhusudhan Chikkature sysfs_notify(&host->mmc->class_dev.kobj, NULL, "cover_switch"); 836a6b2240dSAdrian Hunter 837191d1f1dSDenis Karpov if (slot->card_detect) 838a6b2240dSAdrian Hunter carddetect = slot->card_detect(slot->card_detect_irq); 839b62f6228SAdrian Hunter else { 840b62f6228SAdrian Hunter omap_hsmmc_protect_card(host); 841a6b2240dSAdrian Hunter carddetect = -ENOSYS; 842b62f6228SAdrian Hunter } 843a6b2240dSAdrian Hunter 844a6b2240dSAdrian Hunter if (carddetect) { 845a45c6cb8SMadhusudhan Chikkature mmc_detect_change(host->mmc, (HZ * 200) / 1000); 846a45c6cb8SMadhusudhan Chikkature } else { 8475e2ea617SAdrian Hunter mmc_host_enable(host->mmc); 84870a3341aSDenis Karpov omap_hsmmc_reset_controller_fsm(host, SRD); 8495e2ea617SAdrian Hunter mmc_host_lazy_disable(host->mmc); 85070a3341aSDenis Karpov 851a45c6cb8SMadhusudhan Chikkature mmc_detect_change(host->mmc, (HZ * 50) / 1000); 852a45c6cb8SMadhusudhan Chikkature } 853a45c6cb8SMadhusudhan Chikkature } 854a45c6cb8SMadhusudhan Chikkature 855a45c6cb8SMadhusudhan Chikkature /* 856a45c6cb8SMadhusudhan Chikkature * ISR for handling card insertion and removal 857a45c6cb8SMadhusudhan Chikkature */ 85870a3341aSDenis Karpov static irqreturn_t omap_hsmmc_cd_handler(int irq, void *dev_id) 859a45c6cb8SMadhusudhan Chikkature { 86070a3341aSDenis Karpov struct omap_hsmmc_host *host = (struct omap_hsmmc_host *)dev_id; 861a45c6cb8SMadhusudhan Chikkature 862a6b2240dSAdrian Hunter if (host->suspended) 863a6b2240dSAdrian Hunter return IRQ_HANDLED; 864a45c6cb8SMadhusudhan Chikkature schedule_work(&host->mmc_carddetect_work); 865a45c6cb8SMadhusudhan Chikkature 866a45c6cb8SMadhusudhan Chikkature return IRQ_HANDLED; 867a45c6cb8SMadhusudhan Chikkature } 868a45c6cb8SMadhusudhan Chikkature 86970a3341aSDenis Karpov static int omap_hsmmc_get_dma_sync_dev(struct omap_hsmmc_host *host, 8700ccd76d4SJuha Yrjola struct mmc_data *data) 8710ccd76d4SJuha Yrjola { 8720ccd76d4SJuha Yrjola int sync_dev; 8730ccd76d4SJuha Yrjola 874f3e2f1ddSGrazvydas Ignotas if (data->flags & MMC_DATA_WRITE) 875f3e2f1ddSGrazvydas Ignotas sync_dev = host->dma_line_tx; 8760ccd76d4SJuha Yrjola else 877f3e2f1ddSGrazvydas Ignotas sync_dev = host->dma_line_rx; 8780ccd76d4SJuha Yrjola return sync_dev; 8790ccd76d4SJuha Yrjola } 8800ccd76d4SJuha Yrjola 88170a3341aSDenis Karpov static void omap_hsmmc_config_dma_params(struct omap_hsmmc_host *host, 8820ccd76d4SJuha Yrjola struct mmc_data *data, 8830ccd76d4SJuha Yrjola struct scatterlist *sgl) 8840ccd76d4SJuha Yrjola { 8850ccd76d4SJuha Yrjola int blksz, nblk, dma_ch; 8860ccd76d4SJuha Yrjola 8870ccd76d4SJuha Yrjola dma_ch = host->dma_ch; 8880ccd76d4SJuha Yrjola if (data->flags & MMC_DATA_WRITE) { 8890ccd76d4SJuha Yrjola omap_set_dma_dest_params(dma_ch, 0, OMAP_DMA_AMODE_CONSTANT, 8900ccd76d4SJuha Yrjola (host->mapbase + OMAP_HSMMC_DATA), 0, 0); 8910ccd76d4SJuha Yrjola omap_set_dma_src_params(dma_ch, 0, OMAP_DMA_AMODE_POST_INC, 8920ccd76d4SJuha Yrjola sg_dma_address(sgl), 0, 0); 8930ccd76d4SJuha Yrjola } else { 8940ccd76d4SJuha Yrjola omap_set_dma_src_params(dma_ch, 0, OMAP_DMA_AMODE_CONSTANT, 8950ccd76d4SJuha Yrjola (host->mapbase + OMAP_HSMMC_DATA), 0, 0); 8960ccd76d4SJuha Yrjola omap_set_dma_dest_params(dma_ch, 0, OMAP_DMA_AMODE_POST_INC, 8970ccd76d4SJuha Yrjola sg_dma_address(sgl), 0, 0); 8980ccd76d4SJuha Yrjola } 8990ccd76d4SJuha Yrjola 9000ccd76d4SJuha Yrjola blksz = host->data->blksz; 9010ccd76d4SJuha Yrjola nblk = sg_dma_len(sgl) / blksz; 9020ccd76d4SJuha Yrjola 9030ccd76d4SJuha Yrjola omap_set_dma_transfer_params(dma_ch, OMAP_DMA_DATA_TYPE_S32, 9040ccd76d4SJuha Yrjola blksz / 4, nblk, OMAP_DMA_SYNC_FRAME, 90570a3341aSDenis Karpov omap_hsmmc_get_dma_sync_dev(host, data), 9060ccd76d4SJuha Yrjola !(data->flags & MMC_DATA_WRITE)); 9070ccd76d4SJuha Yrjola 9080ccd76d4SJuha Yrjola omap_start_dma(dma_ch); 9090ccd76d4SJuha Yrjola } 9100ccd76d4SJuha Yrjola 911a45c6cb8SMadhusudhan Chikkature /* 912a45c6cb8SMadhusudhan Chikkature * DMA call back function 913a45c6cb8SMadhusudhan Chikkature */ 91470a3341aSDenis Karpov static void omap_hsmmc_dma_cb(int lch, u16 ch_status, void *data) 915a45c6cb8SMadhusudhan Chikkature { 91670a3341aSDenis Karpov struct omap_hsmmc_host *host = data; 917a45c6cb8SMadhusudhan Chikkature 918a45c6cb8SMadhusudhan Chikkature if (ch_status & OMAP2_DMA_MISALIGNED_ERR_IRQ) 919a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "MISALIGNED_ADRS_ERR\n"); 920a45c6cb8SMadhusudhan Chikkature 921a45c6cb8SMadhusudhan Chikkature if (host->dma_ch < 0) 922a45c6cb8SMadhusudhan Chikkature return; 923a45c6cb8SMadhusudhan Chikkature 9240ccd76d4SJuha Yrjola host->dma_sg_idx++; 9250ccd76d4SJuha Yrjola if (host->dma_sg_idx < host->dma_len) { 9260ccd76d4SJuha Yrjola /* Fire up the next transfer. */ 92770a3341aSDenis Karpov omap_hsmmc_config_dma_params(host, host->data, 9280ccd76d4SJuha Yrjola host->data->sg + host->dma_sg_idx); 9290ccd76d4SJuha Yrjola return; 9300ccd76d4SJuha Yrjola } 9310ccd76d4SJuha Yrjola 932a45c6cb8SMadhusudhan Chikkature omap_free_dma(host->dma_ch); 933a45c6cb8SMadhusudhan Chikkature host->dma_ch = -1; 934a45c6cb8SMadhusudhan Chikkature /* 935a45c6cb8SMadhusudhan Chikkature * DMA Callback: run in interrupt context. 93685b84322SAnand Gadiyar * mutex_unlock will throw a kernel warning if used. 937a45c6cb8SMadhusudhan Chikkature */ 938a45c6cb8SMadhusudhan Chikkature up(&host->sem); 939a45c6cb8SMadhusudhan Chikkature } 940a45c6cb8SMadhusudhan Chikkature 941a45c6cb8SMadhusudhan Chikkature /* 942a45c6cb8SMadhusudhan Chikkature * Routine to configure and start DMA for the MMC card 943a45c6cb8SMadhusudhan Chikkature */ 94470a3341aSDenis Karpov static int omap_hsmmc_start_dma_transfer(struct omap_hsmmc_host *host, 94570a3341aSDenis Karpov struct mmc_request *req) 946a45c6cb8SMadhusudhan Chikkature { 9470ccd76d4SJuha Yrjola int dma_ch = 0, ret = 0, err = 1, i; 948a45c6cb8SMadhusudhan Chikkature struct mmc_data *data = req->data; 949a45c6cb8SMadhusudhan Chikkature 9500ccd76d4SJuha Yrjola /* Sanity check: all the SG entries must be aligned by block size. */ 951a3f406f8SJarkko Lavinen for (i = 0; i < data->sg_len; i++) { 9520ccd76d4SJuha Yrjola struct scatterlist *sgl; 9530ccd76d4SJuha Yrjola 9540ccd76d4SJuha Yrjola sgl = data->sg + i; 9550ccd76d4SJuha Yrjola if (sgl->length % data->blksz) 9560ccd76d4SJuha Yrjola return -EINVAL; 9570ccd76d4SJuha Yrjola } 9580ccd76d4SJuha Yrjola if ((data->blksz % 4) != 0) 9590ccd76d4SJuha Yrjola /* REVISIT: The MMC buffer increments only when MSB is written. 9600ccd76d4SJuha Yrjola * Return error for blksz which is non multiple of four. 9610ccd76d4SJuha Yrjola */ 9620ccd76d4SJuha Yrjola return -EINVAL; 9630ccd76d4SJuha Yrjola 964a45c6cb8SMadhusudhan Chikkature /* 965a45c6cb8SMadhusudhan Chikkature * If for some reason the DMA transfer is still active, 966a45c6cb8SMadhusudhan Chikkature * we wait for timeout period and free the dma 967a45c6cb8SMadhusudhan Chikkature */ 968a45c6cb8SMadhusudhan Chikkature if (host->dma_ch != -1) { 969a45c6cb8SMadhusudhan Chikkature set_current_state(TASK_UNINTERRUPTIBLE); 970a45c6cb8SMadhusudhan Chikkature schedule_timeout(100); 971a45c6cb8SMadhusudhan Chikkature if (down_trylock(&host->sem)) { 972a45c6cb8SMadhusudhan Chikkature omap_free_dma(host->dma_ch); 973a45c6cb8SMadhusudhan Chikkature host->dma_ch = -1; 974a45c6cb8SMadhusudhan Chikkature up(&host->sem); 975a45c6cb8SMadhusudhan Chikkature return err; 976a45c6cb8SMadhusudhan Chikkature } 977a45c6cb8SMadhusudhan Chikkature } else { 978a45c6cb8SMadhusudhan Chikkature if (down_trylock(&host->sem)) 979a45c6cb8SMadhusudhan Chikkature return err; 980a45c6cb8SMadhusudhan Chikkature } 981a45c6cb8SMadhusudhan Chikkature 98270a3341aSDenis Karpov ret = omap_request_dma(omap_hsmmc_get_dma_sync_dev(host, data), 98370a3341aSDenis Karpov "MMC/SD", omap_hsmmc_dma_cb, host, &dma_ch); 984a45c6cb8SMadhusudhan Chikkature if (ret != 0) { 9850ccd76d4SJuha Yrjola dev_err(mmc_dev(host->mmc), 986a45c6cb8SMadhusudhan Chikkature "%s: omap_request_dma() failed with %d\n", 987a45c6cb8SMadhusudhan Chikkature mmc_hostname(host->mmc), ret); 988a45c6cb8SMadhusudhan Chikkature return ret; 989a45c6cb8SMadhusudhan Chikkature } 990a45c6cb8SMadhusudhan Chikkature 991a45c6cb8SMadhusudhan Chikkature host->dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg, 99270a3341aSDenis Karpov data->sg_len, omap_hsmmc_get_dma_dir(host, data)); 993a45c6cb8SMadhusudhan Chikkature host->dma_ch = dma_ch; 9940ccd76d4SJuha Yrjola host->dma_sg_idx = 0; 995a45c6cb8SMadhusudhan Chikkature 99670a3341aSDenis Karpov omap_hsmmc_config_dma_params(host, data, data->sg); 997a45c6cb8SMadhusudhan Chikkature 998a45c6cb8SMadhusudhan Chikkature return 0; 999a45c6cb8SMadhusudhan Chikkature } 1000a45c6cb8SMadhusudhan Chikkature 100170a3341aSDenis Karpov static void set_data_timeout(struct omap_hsmmc_host *host, 1002e2bf08d6SAdrian Hunter unsigned int timeout_ns, 1003e2bf08d6SAdrian Hunter unsigned int timeout_clks) 1004a45c6cb8SMadhusudhan Chikkature { 1005a45c6cb8SMadhusudhan Chikkature unsigned int timeout, cycle_ns; 1006a45c6cb8SMadhusudhan Chikkature uint32_t reg, clkd, dto = 0; 1007a45c6cb8SMadhusudhan Chikkature 1008a45c6cb8SMadhusudhan Chikkature reg = OMAP_HSMMC_READ(host->base, SYSCTL); 1009a45c6cb8SMadhusudhan Chikkature clkd = (reg & CLKD_MASK) >> CLKD_SHIFT; 1010a45c6cb8SMadhusudhan Chikkature if (clkd == 0) 1011a45c6cb8SMadhusudhan Chikkature clkd = 1; 1012a45c6cb8SMadhusudhan Chikkature 1013a45c6cb8SMadhusudhan Chikkature cycle_ns = 1000000000 / (clk_get_rate(host->fclk) / clkd); 1014e2bf08d6SAdrian Hunter timeout = timeout_ns / cycle_ns; 1015e2bf08d6SAdrian Hunter timeout += timeout_clks; 1016a45c6cb8SMadhusudhan Chikkature if (timeout) { 1017a45c6cb8SMadhusudhan Chikkature while ((timeout & 0x80000000) == 0) { 1018a45c6cb8SMadhusudhan Chikkature dto += 1; 1019a45c6cb8SMadhusudhan Chikkature timeout <<= 1; 1020a45c6cb8SMadhusudhan Chikkature } 1021a45c6cb8SMadhusudhan Chikkature dto = 31 - dto; 1022a45c6cb8SMadhusudhan Chikkature timeout <<= 1; 1023a45c6cb8SMadhusudhan Chikkature if (timeout && dto) 1024a45c6cb8SMadhusudhan Chikkature dto += 1; 1025a45c6cb8SMadhusudhan Chikkature if (dto >= 13) 1026a45c6cb8SMadhusudhan Chikkature dto -= 13; 1027a45c6cb8SMadhusudhan Chikkature else 1028a45c6cb8SMadhusudhan Chikkature dto = 0; 1029a45c6cb8SMadhusudhan Chikkature if (dto > 14) 1030a45c6cb8SMadhusudhan Chikkature dto = 14; 1031a45c6cb8SMadhusudhan Chikkature } 1032a45c6cb8SMadhusudhan Chikkature 1033a45c6cb8SMadhusudhan Chikkature reg &= ~DTO_MASK; 1034a45c6cb8SMadhusudhan Chikkature reg |= dto << DTO_SHIFT; 1035a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, reg); 1036a45c6cb8SMadhusudhan Chikkature } 1037a45c6cb8SMadhusudhan Chikkature 1038a45c6cb8SMadhusudhan Chikkature /* 1039a45c6cb8SMadhusudhan Chikkature * Configure block length for MMC/SD cards and initiate the transfer. 1040a45c6cb8SMadhusudhan Chikkature */ 1041a45c6cb8SMadhusudhan Chikkature static int 104270a3341aSDenis Karpov omap_hsmmc_prepare_data(struct omap_hsmmc_host *host, struct mmc_request *req) 1043a45c6cb8SMadhusudhan Chikkature { 1044a45c6cb8SMadhusudhan Chikkature int ret; 1045a45c6cb8SMadhusudhan Chikkature host->data = req->data; 1046a45c6cb8SMadhusudhan Chikkature 1047a45c6cb8SMadhusudhan Chikkature if (req->data == NULL) { 1048a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, BLK, 0); 1049e2bf08d6SAdrian Hunter /* 1050e2bf08d6SAdrian Hunter * Set an arbitrary 100ms data timeout for commands with 1051e2bf08d6SAdrian Hunter * busy signal. 1052e2bf08d6SAdrian Hunter */ 1053e2bf08d6SAdrian Hunter if (req->cmd->flags & MMC_RSP_BUSY) 1054e2bf08d6SAdrian Hunter set_data_timeout(host, 100000000U, 0); 1055a45c6cb8SMadhusudhan Chikkature return 0; 1056a45c6cb8SMadhusudhan Chikkature } 1057a45c6cb8SMadhusudhan Chikkature 1058a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, BLK, (req->data->blksz) 1059a45c6cb8SMadhusudhan Chikkature | (req->data->blocks << 16)); 1060e2bf08d6SAdrian Hunter set_data_timeout(host, req->data->timeout_ns, req->data->timeout_clks); 1061a45c6cb8SMadhusudhan Chikkature 1062a45c6cb8SMadhusudhan Chikkature if (host->use_dma) { 106370a3341aSDenis Karpov ret = omap_hsmmc_start_dma_transfer(host, req); 1064a45c6cb8SMadhusudhan Chikkature if (ret != 0) { 1065a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "MMC start dma failure\n"); 1066a45c6cb8SMadhusudhan Chikkature return ret; 1067a45c6cb8SMadhusudhan Chikkature } 1068a45c6cb8SMadhusudhan Chikkature } 1069a45c6cb8SMadhusudhan Chikkature return 0; 1070a45c6cb8SMadhusudhan Chikkature } 1071a45c6cb8SMadhusudhan Chikkature 1072a45c6cb8SMadhusudhan Chikkature /* 1073a45c6cb8SMadhusudhan Chikkature * Request function. for read/write operation 1074a45c6cb8SMadhusudhan Chikkature */ 107570a3341aSDenis Karpov static void omap_hsmmc_request(struct mmc_host *mmc, struct mmc_request *req) 1076a45c6cb8SMadhusudhan Chikkature { 107770a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1078a3f406f8SJarkko Lavinen int err; 1079a45c6cb8SMadhusudhan Chikkature 10804dffd7a2SAdrian Hunter /* 10814dffd7a2SAdrian Hunter * Prevent races with the interrupt handler because of unexpected 10824dffd7a2SAdrian Hunter * interrupts, but not if we are already in interrupt context i.e. 10834dffd7a2SAdrian Hunter * retries. 10844dffd7a2SAdrian Hunter */ 1085b62f6228SAdrian Hunter if (!in_interrupt()) { 10864dffd7a2SAdrian Hunter spin_lock_irqsave(&host->irq_lock, host->flags); 1087b62f6228SAdrian Hunter /* 1088b62f6228SAdrian Hunter * Protect the card from I/O if there is a possibility 1089b62f6228SAdrian Hunter * it can be removed. 1090b62f6228SAdrian Hunter */ 1091b62f6228SAdrian Hunter if (host->protect_card) { 1092b62f6228SAdrian Hunter if (host->reqs_blocked < 3) { 1093b62f6228SAdrian Hunter /* 1094b62f6228SAdrian Hunter * Ensure the controller is left in a consistent 1095b62f6228SAdrian Hunter * state by resetting the command and data state 1096b62f6228SAdrian Hunter * machines. 1097b62f6228SAdrian Hunter */ 1098b62f6228SAdrian Hunter omap_hsmmc_reset_controller_fsm(host, SRD); 1099b62f6228SAdrian Hunter omap_hsmmc_reset_controller_fsm(host, SRC); 1100b62f6228SAdrian Hunter host->reqs_blocked += 1; 1101b62f6228SAdrian Hunter } 1102b62f6228SAdrian Hunter req->cmd->error = -EBADF; 1103b62f6228SAdrian Hunter if (req->data) 1104b62f6228SAdrian Hunter req->data->error = -EBADF; 1105b62f6228SAdrian Hunter spin_unlock_irqrestore(&host->irq_lock, host->flags); 1106b62f6228SAdrian Hunter mmc_request_done(mmc, req); 1107b62f6228SAdrian Hunter return; 1108b62f6228SAdrian Hunter } else if (host->reqs_blocked) 1109b62f6228SAdrian Hunter host->reqs_blocked = 0; 1110b62f6228SAdrian Hunter } 1111a45c6cb8SMadhusudhan Chikkature WARN_ON(host->mrq != NULL); 1112a45c6cb8SMadhusudhan Chikkature host->mrq = req; 111370a3341aSDenis Karpov err = omap_hsmmc_prepare_data(host, req); 1114a3f406f8SJarkko Lavinen if (err) { 1115a3f406f8SJarkko Lavinen req->cmd->error = err; 1116a3f406f8SJarkko Lavinen if (req->data) 1117a3f406f8SJarkko Lavinen req->data->error = err; 1118a3f406f8SJarkko Lavinen host->mrq = NULL; 11194dffd7a2SAdrian Hunter if (!in_interrupt()) 11204dffd7a2SAdrian Hunter spin_unlock_irqrestore(&host->irq_lock, host->flags); 1121a3f406f8SJarkko Lavinen mmc_request_done(mmc, req); 1122a3f406f8SJarkko Lavinen return; 1123a3f406f8SJarkko Lavinen } 1124a3f406f8SJarkko Lavinen 112570a3341aSDenis Karpov omap_hsmmc_start_command(host, req->cmd, req->data); 1126a45c6cb8SMadhusudhan Chikkature } 1127a45c6cb8SMadhusudhan Chikkature 1128a45c6cb8SMadhusudhan Chikkature /* Routine to configure clock values. Exposed API to core */ 112970a3341aSDenis Karpov static void omap_hsmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 1130a45c6cb8SMadhusudhan Chikkature { 113170a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1132a45c6cb8SMadhusudhan Chikkature u16 dsor = 0; 1133a45c6cb8SMadhusudhan Chikkature unsigned long regval; 1134a45c6cb8SMadhusudhan Chikkature unsigned long timeout; 113573153010SJarkko Lavinen u32 con; 1136a3621465SAdrian Hunter int do_send_init_stream = 0; 1137a45c6cb8SMadhusudhan Chikkature 11385e2ea617SAdrian Hunter mmc_host_enable(host->mmc); 11395e2ea617SAdrian Hunter 1140a3621465SAdrian Hunter if (ios->power_mode != host->power_mode) { 1141a45c6cb8SMadhusudhan Chikkature switch (ios->power_mode) { 1142a45c6cb8SMadhusudhan Chikkature case MMC_POWER_OFF: 1143a3621465SAdrian Hunter mmc_slot(host).set_power(host->dev, host->slot_id, 1144a3621465SAdrian Hunter 0, 0); 1145623821f7SAdrian Hunter host->vdd = 0; 1146a45c6cb8SMadhusudhan Chikkature break; 1147a45c6cb8SMadhusudhan Chikkature case MMC_POWER_UP: 1148a3621465SAdrian Hunter mmc_slot(host).set_power(host->dev, host->slot_id, 1149a3621465SAdrian Hunter 1, ios->vdd); 1150623821f7SAdrian Hunter host->vdd = ios->vdd; 1151a45c6cb8SMadhusudhan Chikkature break; 1152a3621465SAdrian Hunter case MMC_POWER_ON: 1153a3621465SAdrian Hunter do_send_init_stream = 1; 1154a3621465SAdrian Hunter break; 1155a3621465SAdrian Hunter } 1156a3621465SAdrian Hunter host->power_mode = ios->power_mode; 1157a45c6cb8SMadhusudhan Chikkature } 1158a45c6cb8SMadhusudhan Chikkature 1159dd498effSDenis Karpov /* FIXME: set registers based only on changes to ios */ 1160dd498effSDenis Karpov 116173153010SJarkko Lavinen con = OMAP_HSMMC_READ(host->base, CON); 1162a45c6cb8SMadhusudhan Chikkature switch (mmc->ios.bus_width) { 116373153010SJarkko Lavinen case MMC_BUS_WIDTH_8: 116473153010SJarkko Lavinen OMAP_HSMMC_WRITE(host->base, CON, con | DW8); 116573153010SJarkko Lavinen break; 1166a45c6cb8SMadhusudhan Chikkature case MMC_BUS_WIDTH_4: 116773153010SJarkko Lavinen OMAP_HSMMC_WRITE(host->base, CON, con & ~DW8); 1168a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 1169a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) | FOUR_BIT); 1170a45c6cb8SMadhusudhan Chikkature break; 1171a45c6cb8SMadhusudhan Chikkature case MMC_BUS_WIDTH_1: 117273153010SJarkko Lavinen OMAP_HSMMC_WRITE(host->base, CON, con & ~DW8); 1173a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 1174a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) & ~FOUR_BIT); 1175a45c6cb8SMadhusudhan Chikkature break; 1176a45c6cb8SMadhusudhan Chikkature } 1177a45c6cb8SMadhusudhan Chikkature 1178a45c6cb8SMadhusudhan Chikkature if (host->id == OMAP_MMC1_DEVID) { 1179eb250826SDavid Brownell /* Only MMC1 can interface at 3V without some flavor 1180eb250826SDavid Brownell * of external transceiver; but they all handle 1.8V. 1181eb250826SDavid Brownell */ 1182a45c6cb8SMadhusudhan Chikkature if ((OMAP_HSMMC_READ(host->base, HCTL) & SDVSDET) && 1183a45c6cb8SMadhusudhan Chikkature (ios->vdd == DUAL_VOLT_OCR_BIT)) { 1184a45c6cb8SMadhusudhan Chikkature /* 1185a45c6cb8SMadhusudhan Chikkature * The mmc_select_voltage fn of the core does 1186a45c6cb8SMadhusudhan Chikkature * not seem to set the power_mode to 1187a45c6cb8SMadhusudhan Chikkature * MMC_POWER_UP upon recalculating the voltage. 1188a45c6cb8SMadhusudhan Chikkature * vdd 1.8v. 1189a45c6cb8SMadhusudhan Chikkature */ 119070a3341aSDenis Karpov if (omap_hsmmc_switch_opcond(host, ios->vdd) != 0) 1191a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1192a45c6cb8SMadhusudhan Chikkature "Switch operation failed\n"); 1193a45c6cb8SMadhusudhan Chikkature } 1194a45c6cb8SMadhusudhan Chikkature } 1195a45c6cb8SMadhusudhan Chikkature 1196a45c6cb8SMadhusudhan Chikkature if (ios->clock) { 1197a45c6cb8SMadhusudhan Chikkature dsor = OMAP_MMC_MASTER_CLOCK / ios->clock; 1198a45c6cb8SMadhusudhan Chikkature if (dsor < 1) 1199a45c6cb8SMadhusudhan Chikkature dsor = 1; 1200a45c6cb8SMadhusudhan Chikkature 1201a45c6cb8SMadhusudhan Chikkature if (OMAP_MMC_MASTER_CLOCK / dsor > ios->clock) 1202a45c6cb8SMadhusudhan Chikkature dsor++; 1203a45c6cb8SMadhusudhan Chikkature 1204a45c6cb8SMadhusudhan Chikkature if (dsor > 250) 1205a45c6cb8SMadhusudhan Chikkature dsor = 250; 1206a45c6cb8SMadhusudhan Chikkature } 120770a3341aSDenis Karpov omap_hsmmc_stop_clock(host); 1208a45c6cb8SMadhusudhan Chikkature regval = OMAP_HSMMC_READ(host->base, SYSCTL); 1209a45c6cb8SMadhusudhan Chikkature regval = regval & ~(CLKD_MASK); 1210a45c6cb8SMadhusudhan Chikkature regval = regval | (dsor << 6) | (DTO << 16); 1211a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, regval); 1212a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, 1213a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, SYSCTL) | ICE); 1214a45c6cb8SMadhusudhan Chikkature 1215a45c6cb8SMadhusudhan Chikkature /* Wait till the ICS bit is set */ 1216a45c6cb8SMadhusudhan Chikkature timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 121711dd62a7SDenis Karpov while ((OMAP_HSMMC_READ(host->base, SYSCTL) & ICS) != ICS 1218a45c6cb8SMadhusudhan Chikkature && time_before(jiffies, timeout)) 1219a45c6cb8SMadhusudhan Chikkature msleep(1); 1220a45c6cb8SMadhusudhan Chikkature 1221a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, 1222a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, SYSCTL) | CEN); 1223a45c6cb8SMadhusudhan Chikkature 1224a3621465SAdrian Hunter if (do_send_init_stream) 1225a45c6cb8SMadhusudhan Chikkature send_init_stream(host); 1226a45c6cb8SMadhusudhan Chikkature 1227abb28e73SDenis Karpov con = OMAP_HSMMC_READ(host->base, CON); 1228a45c6cb8SMadhusudhan Chikkature if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN) 1229abb28e73SDenis Karpov OMAP_HSMMC_WRITE(host->base, CON, con | OD); 1230abb28e73SDenis Karpov else 1231abb28e73SDenis Karpov OMAP_HSMMC_WRITE(host->base, CON, con & ~OD); 12325e2ea617SAdrian Hunter 1233dd498effSDenis Karpov if (host->power_mode == MMC_POWER_OFF) 1234dd498effSDenis Karpov mmc_host_disable(host->mmc); 1235dd498effSDenis Karpov else 12365e2ea617SAdrian Hunter mmc_host_lazy_disable(host->mmc); 1237a45c6cb8SMadhusudhan Chikkature } 1238a45c6cb8SMadhusudhan Chikkature 1239a45c6cb8SMadhusudhan Chikkature static int omap_hsmmc_get_cd(struct mmc_host *mmc) 1240a45c6cb8SMadhusudhan Chikkature { 124170a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1242a45c6cb8SMadhusudhan Chikkature 1243191d1f1dSDenis Karpov if (!mmc_slot(host).card_detect) 1244a45c6cb8SMadhusudhan Chikkature return -ENOSYS; 1245191d1f1dSDenis Karpov return mmc_slot(host).card_detect(mmc_slot(host).card_detect_irq); 1246a45c6cb8SMadhusudhan Chikkature } 1247a45c6cb8SMadhusudhan Chikkature 1248a45c6cb8SMadhusudhan Chikkature static int omap_hsmmc_get_ro(struct mmc_host *mmc) 1249a45c6cb8SMadhusudhan Chikkature { 125070a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1251a45c6cb8SMadhusudhan Chikkature 1252191d1f1dSDenis Karpov if (!mmc_slot(host).get_ro) 1253a45c6cb8SMadhusudhan Chikkature return -ENOSYS; 1254191d1f1dSDenis Karpov return mmc_slot(host).get_ro(host->dev, 0); 1255a45c6cb8SMadhusudhan Chikkature } 1256a45c6cb8SMadhusudhan Chikkature 125770a3341aSDenis Karpov static void omap_hsmmc_conf_bus_power(struct omap_hsmmc_host *host) 12581b331e69SKim Kyuwon { 12591b331e69SKim Kyuwon u32 hctl, capa, value; 12601b331e69SKim Kyuwon 12611b331e69SKim Kyuwon /* Only MMC1 supports 3.0V */ 12621b331e69SKim Kyuwon if (host->id == OMAP_MMC1_DEVID) { 12631b331e69SKim Kyuwon hctl = SDVS30; 12641b331e69SKim Kyuwon capa = VS30 | VS18; 12651b331e69SKim Kyuwon } else { 12661b331e69SKim Kyuwon hctl = SDVS18; 12671b331e69SKim Kyuwon capa = VS18; 12681b331e69SKim Kyuwon } 12691b331e69SKim Kyuwon 12701b331e69SKim Kyuwon value = OMAP_HSMMC_READ(host->base, HCTL) & ~SDVS_MASK; 12711b331e69SKim Kyuwon OMAP_HSMMC_WRITE(host->base, HCTL, value | hctl); 12721b331e69SKim Kyuwon 12731b331e69SKim Kyuwon value = OMAP_HSMMC_READ(host->base, CAPA); 12741b331e69SKim Kyuwon OMAP_HSMMC_WRITE(host->base, CAPA, value | capa); 12751b331e69SKim Kyuwon 12761b331e69SKim Kyuwon /* Set the controller to AUTO IDLE mode */ 12771b331e69SKim Kyuwon value = OMAP_HSMMC_READ(host->base, SYSCONFIG); 12781b331e69SKim Kyuwon OMAP_HSMMC_WRITE(host->base, SYSCONFIG, value | AUTOIDLE); 12791b331e69SKim Kyuwon 12801b331e69SKim Kyuwon /* Set SD bus power bit */ 1281e13bb300SAdrian Hunter set_sd_bus_power(host); 12821b331e69SKim Kyuwon } 12831b331e69SKim Kyuwon 1284dd498effSDenis Karpov /* 1285dd498effSDenis Karpov * Dynamic power saving handling, FSM: 128613189e78SJarkko Lavinen * ENABLED -> DISABLED -> CARDSLEEP / REGSLEEP -> OFF 128713189e78SJarkko Lavinen * ^___________| | | 128813189e78SJarkko Lavinen * |______________________|______________________| 1289dd498effSDenis Karpov * 1290dd498effSDenis Karpov * ENABLED: mmc host is fully functional 1291dd498effSDenis Karpov * DISABLED: fclk is off 129213189e78SJarkko Lavinen * CARDSLEEP: fclk is off, card is asleep, voltage regulator is asleep 1293623821f7SAdrian Hunter * REGSLEEP: fclk is off, voltage regulator is asleep 129413189e78SJarkko Lavinen * OFF: fclk is off, voltage regulator is off 1295dd498effSDenis Karpov * 1296dd498effSDenis Karpov * Transition handlers return the timeout for the next state transition 1297dd498effSDenis Karpov * or negative error. 1298dd498effSDenis Karpov */ 1299dd498effSDenis Karpov 130013189e78SJarkko Lavinen enum {ENABLED = 0, DISABLED, CARDSLEEP, REGSLEEP, OFF}; 1301dd498effSDenis Karpov 1302dd498effSDenis Karpov /* Handler for [ENABLED -> DISABLED] transition */ 130370a3341aSDenis Karpov static int omap_hsmmc_enabled_to_disabled(struct omap_hsmmc_host *host) 1304dd498effSDenis Karpov { 130570a3341aSDenis Karpov omap_hsmmc_context_save(host); 1306dd498effSDenis Karpov clk_disable(host->fclk); 1307dd498effSDenis Karpov host->dpm_state = DISABLED; 1308dd498effSDenis Karpov 1309dd498effSDenis Karpov dev_dbg(mmc_dev(host->mmc), "ENABLED -> DISABLED\n"); 1310dd498effSDenis Karpov 1311dd498effSDenis Karpov if (host->power_mode == MMC_POWER_OFF) 1312dd498effSDenis Karpov return 0; 1313dd498effSDenis Karpov 131413189e78SJarkko Lavinen return msecs_to_jiffies(OMAP_MMC_SLEEP_TIMEOUT); 1315dd498effSDenis Karpov } 1316dd498effSDenis Karpov 131713189e78SJarkko Lavinen /* Handler for [DISABLED -> REGSLEEP / CARDSLEEP] transition */ 131870a3341aSDenis Karpov static int omap_hsmmc_disabled_to_sleep(struct omap_hsmmc_host *host) 1319dd498effSDenis Karpov { 132013189e78SJarkko Lavinen int err, new_state; 1321dd498effSDenis Karpov 1322dd498effSDenis Karpov if (!mmc_try_claim_host(host->mmc)) 1323dd498effSDenis Karpov return 0; 1324dd498effSDenis Karpov 1325dd498effSDenis Karpov clk_enable(host->fclk); 132670a3341aSDenis Karpov omap_hsmmc_context_restore(host); 132713189e78SJarkko Lavinen if (mmc_card_can_sleep(host->mmc)) { 132813189e78SJarkko Lavinen err = mmc_card_sleep(host->mmc); 132913189e78SJarkko Lavinen if (err < 0) { 133013189e78SJarkko Lavinen clk_disable(host->fclk); 133113189e78SJarkko Lavinen mmc_release_host(host->mmc); 133213189e78SJarkko Lavinen return err; 133313189e78SJarkko Lavinen } 133413189e78SJarkko Lavinen new_state = CARDSLEEP; 133570a3341aSDenis Karpov } else { 133613189e78SJarkko Lavinen new_state = REGSLEEP; 133770a3341aSDenis Karpov } 133813189e78SJarkko Lavinen if (mmc_slot(host).set_sleep) 133913189e78SJarkko Lavinen mmc_slot(host).set_sleep(host->dev, host->slot_id, 1, 0, 134013189e78SJarkko Lavinen new_state == CARDSLEEP); 134113189e78SJarkko Lavinen /* FIXME: turn off bus power and perhaps interrupts too */ 134213189e78SJarkko Lavinen clk_disable(host->fclk); 134313189e78SJarkko Lavinen host->dpm_state = new_state; 134413189e78SJarkko Lavinen 134513189e78SJarkko Lavinen mmc_release_host(host->mmc); 134613189e78SJarkko Lavinen 134713189e78SJarkko Lavinen dev_dbg(mmc_dev(host->mmc), "DISABLED -> %s\n", 134813189e78SJarkko Lavinen host->dpm_state == CARDSLEEP ? "CARDSLEEP" : "REGSLEEP"); 1349dd498effSDenis Karpov 1350dd498effSDenis Karpov if ((host->mmc->caps & MMC_CAP_NONREMOVABLE) || 1351dd498effSDenis Karpov mmc_slot(host).card_detect || 1352dd498effSDenis Karpov (mmc_slot(host).get_cover_state && 135313189e78SJarkko Lavinen mmc_slot(host).get_cover_state(host->dev, host->slot_id))) 135413189e78SJarkko Lavinen return msecs_to_jiffies(OMAP_MMC_OFF_TIMEOUT); 135513189e78SJarkko Lavinen 135613189e78SJarkko Lavinen return 0; 1357623821f7SAdrian Hunter } 1358dd498effSDenis Karpov 135913189e78SJarkko Lavinen /* Handler for [REGSLEEP / CARDSLEEP -> OFF] transition */ 136070a3341aSDenis Karpov static int omap_hsmmc_sleep_to_off(struct omap_hsmmc_host *host) 136113189e78SJarkko Lavinen { 136213189e78SJarkko Lavinen if (!mmc_try_claim_host(host->mmc)) 136313189e78SJarkko Lavinen return 0; 1364dd498effSDenis Karpov 136513189e78SJarkko Lavinen if (!((host->mmc->caps & MMC_CAP_NONREMOVABLE) || 136613189e78SJarkko Lavinen mmc_slot(host).card_detect || 136713189e78SJarkko Lavinen (mmc_slot(host).get_cover_state && 136813189e78SJarkko Lavinen mmc_slot(host).get_cover_state(host->dev, host->slot_id)))) { 136913189e78SJarkko Lavinen mmc_release_host(host->mmc); 137013189e78SJarkko Lavinen return 0; 137113189e78SJarkko Lavinen } 1372dd498effSDenis Karpov 137313189e78SJarkko Lavinen mmc_slot(host).set_power(host->dev, host->slot_id, 0, 0); 137413189e78SJarkko Lavinen host->vdd = 0; 137513189e78SJarkko Lavinen host->power_mode = MMC_POWER_OFF; 137613189e78SJarkko Lavinen 137713189e78SJarkko Lavinen dev_dbg(mmc_dev(host->mmc), "%s -> OFF\n", 137813189e78SJarkko Lavinen host->dpm_state == CARDSLEEP ? "CARDSLEEP" : "REGSLEEP"); 137913189e78SJarkko Lavinen 138013189e78SJarkko Lavinen host->dpm_state = OFF; 1381dd498effSDenis Karpov 1382dd498effSDenis Karpov mmc_release_host(host->mmc); 1383dd498effSDenis Karpov 1384dd498effSDenis Karpov return 0; 1385dd498effSDenis Karpov } 1386dd498effSDenis Karpov 1387dd498effSDenis Karpov /* Handler for [DISABLED -> ENABLED] transition */ 138870a3341aSDenis Karpov static int omap_hsmmc_disabled_to_enabled(struct omap_hsmmc_host *host) 1389dd498effSDenis Karpov { 1390dd498effSDenis Karpov int err; 1391dd498effSDenis Karpov 1392dd498effSDenis Karpov err = clk_enable(host->fclk); 1393dd498effSDenis Karpov if (err < 0) 1394dd498effSDenis Karpov return err; 1395dd498effSDenis Karpov 139670a3341aSDenis Karpov omap_hsmmc_context_restore(host); 1397dd498effSDenis Karpov host->dpm_state = ENABLED; 1398dd498effSDenis Karpov 1399dd498effSDenis Karpov dev_dbg(mmc_dev(host->mmc), "DISABLED -> ENABLED\n"); 1400dd498effSDenis Karpov 1401dd498effSDenis Karpov return 0; 1402dd498effSDenis Karpov } 1403dd498effSDenis Karpov 140413189e78SJarkko Lavinen /* Handler for [SLEEP -> ENABLED] transition */ 140570a3341aSDenis Karpov static int omap_hsmmc_sleep_to_enabled(struct omap_hsmmc_host *host) 140613189e78SJarkko Lavinen { 140713189e78SJarkko Lavinen if (!mmc_try_claim_host(host->mmc)) 140813189e78SJarkko Lavinen return 0; 140913189e78SJarkko Lavinen 141013189e78SJarkko Lavinen clk_enable(host->fclk); 141170a3341aSDenis Karpov omap_hsmmc_context_restore(host); 141213189e78SJarkko Lavinen if (mmc_slot(host).set_sleep) 141313189e78SJarkko Lavinen mmc_slot(host).set_sleep(host->dev, host->slot_id, 0, 141413189e78SJarkko Lavinen host->vdd, host->dpm_state == CARDSLEEP); 141513189e78SJarkko Lavinen if (mmc_card_can_sleep(host->mmc)) 141613189e78SJarkko Lavinen mmc_card_awake(host->mmc); 141713189e78SJarkko Lavinen 141813189e78SJarkko Lavinen dev_dbg(mmc_dev(host->mmc), "%s -> ENABLED\n", 141913189e78SJarkko Lavinen host->dpm_state == CARDSLEEP ? "CARDSLEEP" : "REGSLEEP"); 142013189e78SJarkko Lavinen 142113189e78SJarkko Lavinen host->dpm_state = ENABLED; 142213189e78SJarkko Lavinen 142313189e78SJarkko Lavinen mmc_release_host(host->mmc); 142413189e78SJarkko Lavinen 142513189e78SJarkko Lavinen return 0; 142613189e78SJarkko Lavinen } 142713189e78SJarkko Lavinen 1428dd498effSDenis Karpov /* Handler for [OFF -> ENABLED] transition */ 142970a3341aSDenis Karpov static int omap_hsmmc_off_to_enabled(struct omap_hsmmc_host *host) 1430dd498effSDenis Karpov { 1431dd498effSDenis Karpov clk_enable(host->fclk); 1432dd498effSDenis Karpov 143370a3341aSDenis Karpov omap_hsmmc_context_restore(host); 143470a3341aSDenis Karpov omap_hsmmc_conf_bus_power(host); 1435dd498effSDenis Karpov mmc_power_restore_host(host->mmc); 1436dd498effSDenis Karpov 1437dd498effSDenis Karpov host->dpm_state = ENABLED; 1438dd498effSDenis Karpov 1439dd498effSDenis Karpov dev_dbg(mmc_dev(host->mmc), "OFF -> ENABLED\n"); 1440dd498effSDenis Karpov 1441dd498effSDenis Karpov return 0; 1442dd498effSDenis Karpov } 1443dd498effSDenis Karpov 1444dd498effSDenis Karpov /* 1445dd498effSDenis Karpov * Bring MMC host to ENABLED from any other PM state. 1446dd498effSDenis Karpov */ 144770a3341aSDenis Karpov static int omap_hsmmc_enable(struct mmc_host *mmc) 1448dd498effSDenis Karpov { 144970a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1450dd498effSDenis Karpov 1451dd498effSDenis Karpov switch (host->dpm_state) { 1452dd498effSDenis Karpov case DISABLED: 145370a3341aSDenis Karpov return omap_hsmmc_disabled_to_enabled(host); 145413189e78SJarkko Lavinen case CARDSLEEP: 1455623821f7SAdrian Hunter case REGSLEEP: 145670a3341aSDenis Karpov return omap_hsmmc_sleep_to_enabled(host); 1457dd498effSDenis Karpov case OFF: 145870a3341aSDenis Karpov return omap_hsmmc_off_to_enabled(host); 1459dd498effSDenis Karpov default: 1460dd498effSDenis Karpov dev_dbg(mmc_dev(host->mmc), "UNKNOWN state\n"); 1461dd498effSDenis Karpov return -EINVAL; 1462dd498effSDenis Karpov } 1463dd498effSDenis Karpov } 1464dd498effSDenis Karpov 1465dd498effSDenis Karpov /* 1466dd498effSDenis Karpov * Bring MMC host in PM state (one level deeper). 1467dd498effSDenis Karpov */ 146870a3341aSDenis Karpov static int omap_hsmmc_disable(struct mmc_host *mmc, int lazy) 1469dd498effSDenis Karpov { 147070a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1471dd498effSDenis Karpov 1472dd498effSDenis Karpov switch (host->dpm_state) { 1473dd498effSDenis Karpov case ENABLED: { 1474dd498effSDenis Karpov int delay; 1475dd498effSDenis Karpov 147670a3341aSDenis Karpov delay = omap_hsmmc_enabled_to_disabled(host); 1477dd498effSDenis Karpov if (lazy || delay < 0) 1478dd498effSDenis Karpov return delay; 1479dd498effSDenis Karpov return 0; 1480dd498effSDenis Karpov } 1481dd498effSDenis Karpov case DISABLED: 148270a3341aSDenis Karpov return omap_hsmmc_disabled_to_sleep(host); 148313189e78SJarkko Lavinen case CARDSLEEP: 148413189e78SJarkko Lavinen case REGSLEEP: 148570a3341aSDenis Karpov return omap_hsmmc_sleep_to_off(host); 1486dd498effSDenis Karpov default: 1487dd498effSDenis Karpov dev_dbg(mmc_dev(host->mmc), "UNKNOWN state\n"); 1488dd498effSDenis Karpov return -EINVAL; 1489dd498effSDenis Karpov } 1490dd498effSDenis Karpov } 1491dd498effSDenis Karpov 149270a3341aSDenis Karpov static int omap_hsmmc_enable_fclk(struct mmc_host *mmc) 1493dd498effSDenis Karpov { 149470a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1495dd498effSDenis Karpov int err; 1496dd498effSDenis Karpov 1497dd498effSDenis Karpov err = clk_enable(host->fclk); 1498dd498effSDenis Karpov if (err) 1499dd498effSDenis Karpov return err; 1500dd498effSDenis Karpov dev_dbg(mmc_dev(host->mmc), "mmc_fclk: enabled\n"); 150170a3341aSDenis Karpov omap_hsmmc_context_restore(host); 1502dd498effSDenis Karpov return 0; 1503dd498effSDenis Karpov } 1504dd498effSDenis Karpov 150570a3341aSDenis Karpov static int omap_hsmmc_disable_fclk(struct mmc_host *mmc, int lazy) 1506dd498effSDenis Karpov { 150770a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1508dd498effSDenis Karpov 150970a3341aSDenis Karpov omap_hsmmc_context_save(host); 1510dd498effSDenis Karpov clk_disable(host->fclk); 1511dd498effSDenis Karpov dev_dbg(mmc_dev(host->mmc), "mmc_fclk: disabled\n"); 1512dd498effSDenis Karpov return 0; 1513dd498effSDenis Karpov } 1514dd498effSDenis Karpov 151570a3341aSDenis Karpov static const struct mmc_host_ops omap_hsmmc_ops = { 151670a3341aSDenis Karpov .enable = omap_hsmmc_enable_fclk, 151770a3341aSDenis Karpov .disable = omap_hsmmc_disable_fclk, 151870a3341aSDenis Karpov .request = omap_hsmmc_request, 151970a3341aSDenis Karpov .set_ios = omap_hsmmc_set_ios, 1520dd498effSDenis Karpov .get_cd = omap_hsmmc_get_cd, 1521dd498effSDenis Karpov .get_ro = omap_hsmmc_get_ro, 1522dd498effSDenis Karpov /* NYET -- enable_sdio_irq */ 1523dd498effSDenis Karpov }; 1524dd498effSDenis Karpov 152570a3341aSDenis Karpov static const struct mmc_host_ops omap_hsmmc_ps_ops = { 152670a3341aSDenis Karpov .enable = omap_hsmmc_enable, 152770a3341aSDenis Karpov .disable = omap_hsmmc_disable, 152870a3341aSDenis Karpov .request = omap_hsmmc_request, 152970a3341aSDenis Karpov .set_ios = omap_hsmmc_set_ios, 1530a45c6cb8SMadhusudhan Chikkature .get_cd = omap_hsmmc_get_cd, 1531a45c6cb8SMadhusudhan Chikkature .get_ro = omap_hsmmc_get_ro, 1532a45c6cb8SMadhusudhan Chikkature /* NYET -- enable_sdio_irq */ 1533a45c6cb8SMadhusudhan Chikkature }; 1534a45c6cb8SMadhusudhan Chikkature 1535d900f712SDenis Karpov #ifdef CONFIG_DEBUG_FS 1536d900f712SDenis Karpov 153770a3341aSDenis Karpov static int omap_hsmmc_regs_show(struct seq_file *s, void *data) 1538d900f712SDenis Karpov { 1539d900f712SDenis Karpov struct mmc_host *mmc = s->private; 154070a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 154111dd62a7SDenis Karpov int context_loss = 0; 154211dd62a7SDenis Karpov 154370a3341aSDenis Karpov if (host->pdata->get_context_loss_count) 154470a3341aSDenis Karpov context_loss = host->pdata->get_context_loss_count(host->dev); 1545d900f712SDenis Karpov 15465e2ea617SAdrian Hunter seq_printf(s, "mmc%d:\n" 15475e2ea617SAdrian Hunter " enabled:\t%d\n" 1548dd498effSDenis Karpov " dpm_state:\t%d\n" 15495e2ea617SAdrian Hunter " nesting_cnt:\t%d\n" 155011dd62a7SDenis Karpov " ctx_loss:\t%d:%d\n" 15515e2ea617SAdrian Hunter "\nregs:\n", 1552dd498effSDenis Karpov mmc->index, mmc->enabled ? 1 : 0, 1553dd498effSDenis Karpov host->dpm_state, mmc->nesting_cnt, 155411dd62a7SDenis Karpov host->context_loss, context_loss); 15555e2ea617SAdrian Hunter 155613189e78SJarkko Lavinen if (host->suspended || host->dpm_state == OFF) { 1557dd498effSDenis Karpov seq_printf(s, "host suspended, can't read registers\n"); 1558dd498effSDenis Karpov return 0; 1559dd498effSDenis Karpov } 1560dd498effSDenis Karpov 15615e2ea617SAdrian Hunter if (clk_enable(host->fclk) != 0) { 15625e2ea617SAdrian Hunter seq_printf(s, "can't read the regs\n"); 1563dd498effSDenis Karpov return 0; 15645e2ea617SAdrian Hunter } 1565d900f712SDenis Karpov 1566d900f712SDenis Karpov seq_printf(s, "SYSCONFIG:\t0x%08x\n", 1567d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCONFIG)); 1568d900f712SDenis Karpov seq_printf(s, "CON:\t\t0x%08x\n", 1569d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, CON)); 1570d900f712SDenis Karpov seq_printf(s, "HCTL:\t\t0x%08x\n", 1571d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, HCTL)); 1572d900f712SDenis Karpov seq_printf(s, "SYSCTL:\t\t0x%08x\n", 1573d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCTL)); 1574d900f712SDenis Karpov seq_printf(s, "IE:\t\t0x%08x\n", 1575d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, IE)); 1576d900f712SDenis Karpov seq_printf(s, "ISE:\t\t0x%08x\n", 1577d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, ISE)); 1578d900f712SDenis Karpov seq_printf(s, "CAPA:\t\t0x%08x\n", 1579d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, CAPA)); 15805e2ea617SAdrian Hunter 15815e2ea617SAdrian Hunter clk_disable(host->fclk); 1582dd498effSDenis Karpov 1583d900f712SDenis Karpov return 0; 1584d900f712SDenis Karpov } 1585d900f712SDenis Karpov 158670a3341aSDenis Karpov static int omap_hsmmc_regs_open(struct inode *inode, struct file *file) 1587d900f712SDenis Karpov { 158870a3341aSDenis Karpov return single_open(file, omap_hsmmc_regs_show, inode->i_private); 1589d900f712SDenis Karpov } 1590d900f712SDenis Karpov 1591d900f712SDenis Karpov static const struct file_operations mmc_regs_fops = { 159270a3341aSDenis Karpov .open = omap_hsmmc_regs_open, 1593d900f712SDenis Karpov .read = seq_read, 1594d900f712SDenis Karpov .llseek = seq_lseek, 1595d900f712SDenis Karpov .release = single_release, 1596d900f712SDenis Karpov }; 1597d900f712SDenis Karpov 159870a3341aSDenis Karpov static void omap_hsmmc_debugfs(struct mmc_host *mmc) 1599d900f712SDenis Karpov { 1600d900f712SDenis Karpov if (mmc->debugfs_root) 1601d900f712SDenis Karpov debugfs_create_file("regs", S_IRUSR, mmc->debugfs_root, 1602d900f712SDenis Karpov mmc, &mmc_regs_fops); 1603d900f712SDenis Karpov } 1604d900f712SDenis Karpov 1605d900f712SDenis Karpov #else 1606d900f712SDenis Karpov 160770a3341aSDenis Karpov static void omap_hsmmc_debugfs(struct mmc_host *mmc) 1608d900f712SDenis Karpov { 1609d900f712SDenis Karpov } 1610d900f712SDenis Karpov 1611d900f712SDenis Karpov #endif 1612d900f712SDenis Karpov 161370a3341aSDenis Karpov static int __init omap_hsmmc_probe(struct platform_device *pdev) 1614a45c6cb8SMadhusudhan Chikkature { 1615a45c6cb8SMadhusudhan Chikkature struct omap_mmc_platform_data *pdata = pdev->dev.platform_data; 1616a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc; 161770a3341aSDenis Karpov struct omap_hsmmc_host *host = NULL; 1618a45c6cb8SMadhusudhan Chikkature struct resource *res; 1619a45c6cb8SMadhusudhan Chikkature int ret = 0, irq; 1620a45c6cb8SMadhusudhan Chikkature 1621a45c6cb8SMadhusudhan Chikkature if (pdata == NULL) { 1622a45c6cb8SMadhusudhan Chikkature dev_err(&pdev->dev, "Platform Data is missing\n"); 1623a45c6cb8SMadhusudhan Chikkature return -ENXIO; 1624a45c6cb8SMadhusudhan Chikkature } 1625a45c6cb8SMadhusudhan Chikkature 1626a45c6cb8SMadhusudhan Chikkature if (pdata->nr_slots == 0) { 1627a45c6cb8SMadhusudhan Chikkature dev_err(&pdev->dev, "No Slots\n"); 1628a45c6cb8SMadhusudhan Chikkature return -ENXIO; 1629a45c6cb8SMadhusudhan Chikkature } 1630a45c6cb8SMadhusudhan Chikkature 1631a45c6cb8SMadhusudhan Chikkature res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1632a45c6cb8SMadhusudhan Chikkature irq = platform_get_irq(pdev, 0); 1633a45c6cb8SMadhusudhan Chikkature if (res == NULL || irq < 0) 1634a45c6cb8SMadhusudhan Chikkature return -ENXIO; 1635a45c6cb8SMadhusudhan Chikkature 1636a45c6cb8SMadhusudhan Chikkature res = request_mem_region(res->start, res->end - res->start + 1, 1637a45c6cb8SMadhusudhan Chikkature pdev->name); 1638a45c6cb8SMadhusudhan Chikkature if (res == NULL) 1639a45c6cb8SMadhusudhan Chikkature return -EBUSY; 1640a45c6cb8SMadhusudhan Chikkature 164170a3341aSDenis Karpov mmc = mmc_alloc_host(sizeof(struct omap_hsmmc_host), &pdev->dev); 1642a45c6cb8SMadhusudhan Chikkature if (!mmc) { 1643a45c6cb8SMadhusudhan Chikkature ret = -ENOMEM; 1644a45c6cb8SMadhusudhan Chikkature goto err; 1645a45c6cb8SMadhusudhan Chikkature } 1646a45c6cb8SMadhusudhan Chikkature 1647a45c6cb8SMadhusudhan Chikkature host = mmc_priv(mmc); 1648a45c6cb8SMadhusudhan Chikkature host->mmc = mmc; 1649a45c6cb8SMadhusudhan Chikkature host->pdata = pdata; 1650a45c6cb8SMadhusudhan Chikkature host->dev = &pdev->dev; 1651a45c6cb8SMadhusudhan Chikkature host->use_dma = 1; 1652a45c6cb8SMadhusudhan Chikkature host->dev->dma_mask = &pdata->dma_mask; 1653a45c6cb8SMadhusudhan Chikkature host->dma_ch = -1; 1654a45c6cb8SMadhusudhan Chikkature host->irq = irq; 1655a45c6cb8SMadhusudhan Chikkature host->id = pdev->id; 1656a45c6cb8SMadhusudhan Chikkature host->slot_id = 0; 1657a45c6cb8SMadhusudhan Chikkature host->mapbase = res->start; 1658a45c6cb8SMadhusudhan Chikkature host->base = ioremap(host->mapbase, SZ_4K); 1659a3621465SAdrian Hunter host->power_mode = -1; 1660a45c6cb8SMadhusudhan Chikkature 1661a45c6cb8SMadhusudhan Chikkature platform_set_drvdata(pdev, host); 166270a3341aSDenis Karpov INIT_WORK(&host->mmc_carddetect_work, omap_hsmmc_detect); 1663a45c6cb8SMadhusudhan Chikkature 1664191d1f1dSDenis Karpov if (mmc_slot(host).power_saving) 166570a3341aSDenis Karpov mmc->ops = &omap_hsmmc_ps_ops; 1666dd498effSDenis Karpov else 166770a3341aSDenis Karpov mmc->ops = &omap_hsmmc_ops; 1668dd498effSDenis Karpov 1669a45c6cb8SMadhusudhan Chikkature mmc->f_min = 400000; 1670a45c6cb8SMadhusudhan Chikkature mmc->f_max = 52000000; 1671a45c6cb8SMadhusudhan Chikkature 1672a45c6cb8SMadhusudhan Chikkature sema_init(&host->sem, 1); 16734dffd7a2SAdrian Hunter spin_lock_init(&host->irq_lock); 1674a45c6cb8SMadhusudhan Chikkature 16756f7607ccSRussell King host->iclk = clk_get(&pdev->dev, "ick"); 1676a45c6cb8SMadhusudhan Chikkature if (IS_ERR(host->iclk)) { 1677a45c6cb8SMadhusudhan Chikkature ret = PTR_ERR(host->iclk); 1678a45c6cb8SMadhusudhan Chikkature host->iclk = NULL; 1679a45c6cb8SMadhusudhan Chikkature goto err1; 1680a45c6cb8SMadhusudhan Chikkature } 16816f7607ccSRussell King host->fclk = clk_get(&pdev->dev, "fck"); 1682a45c6cb8SMadhusudhan Chikkature if (IS_ERR(host->fclk)) { 1683a45c6cb8SMadhusudhan Chikkature ret = PTR_ERR(host->fclk); 1684a45c6cb8SMadhusudhan Chikkature host->fclk = NULL; 1685a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 1686a45c6cb8SMadhusudhan Chikkature goto err1; 1687a45c6cb8SMadhusudhan Chikkature } 1688a45c6cb8SMadhusudhan Chikkature 168970a3341aSDenis Karpov omap_hsmmc_context_save(host); 169011dd62a7SDenis Karpov 16915e2ea617SAdrian Hunter mmc->caps |= MMC_CAP_DISABLE; 1692dd498effSDenis Karpov mmc_set_disable_delay(mmc, OMAP_MMC_DISABLED_TIMEOUT); 1693dd498effSDenis Karpov /* we start off in DISABLED state */ 1694dd498effSDenis Karpov host->dpm_state = DISABLED; 1695dd498effSDenis Karpov 16965e2ea617SAdrian Hunter if (mmc_host_enable(host->mmc) != 0) { 1697a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 1698a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 1699a45c6cb8SMadhusudhan Chikkature goto err1; 1700a45c6cb8SMadhusudhan Chikkature } 1701a45c6cb8SMadhusudhan Chikkature 1702a45c6cb8SMadhusudhan Chikkature if (clk_enable(host->iclk) != 0) { 17035e2ea617SAdrian Hunter mmc_host_disable(host->mmc); 1704a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 1705a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 1706a45c6cb8SMadhusudhan Chikkature goto err1; 1707a45c6cb8SMadhusudhan Chikkature } 1708a45c6cb8SMadhusudhan Chikkature 17092bec0893SAdrian Hunter if (cpu_is_omap2430()) { 1710a45c6cb8SMadhusudhan Chikkature host->dbclk = clk_get(&pdev->dev, "mmchsdb_fck"); 1711a45c6cb8SMadhusudhan Chikkature /* 1712a45c6cb8SMadhusudhan Chikkature * MMC can still work without debounce clock. 1713a45c6cb8SMadhusudhan Chikkature */ 1714a45c6cb8SMadhusudhan Chikkature if (IS_ERR(host->dbclk)) 17152bec0893SAdrian Hunter dev_warn(mmc_dev(host->mmc), 17162bec0893SAdrian Hunter "Failed to get debounce clock\n"); 1717a45c6cb8SMadhusudhan Chikkature else 17182bec0893SAdrian Hunter host->got_dbclk = 1; 17192bec0893SAdrian Hunter 17202bec0893SAdrian Hunter if (host->got_dbclk) 1721a45c6cb8SMadhusudhan Chikkature if (clk_enable(host->dbclk) != 0) 1722a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Enabling debounce" 1723a45c6cb8SMadhusudhan Chikkature " clk failed\n"); 17242bec0893SAdrian Hunter } 1725a45c6cb8SMadhusudhan Chikkature 17260ccd76d4SJuha Yrjola /* Since we do only SG emulation, we can have as many segs 17270ccd76d4SJuha Yrjola * as we want. */ 17280ccd76d4SJuha Yrjola mmc->max_phys_segs = 1024; 17290ccd76d4SJuha Yrjola mmc->max_hw_segs = 1024; 17300ccd76d4SJuha Yrjola 1731a45c6cb8SMadhusudhan Chikkature mmc->max_blk_size = 512; /* Block Length at max can be 1024 */ 1732a45c6cb8SMadhusudhan Chikkature mmc->max_blk_count = 0xFFFF; /* No. of Blocks is 16 bits */ 1733a45c6cb8SMadhusudhan Chikkature mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; 1734a45c6cb8SMadhusudhan Chikkature mmc->max_seg_size = mmc->max_req_size; 1735a45c6cb8SMadhusudhan Chikkature 173613189e78SJarkko Lavinen mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED | 173713189e78SJarkko Lavinen MMC_CAP_WAIT_WHILE_BUSY; 1738a45c6cb8SMadhusudhan Chikkature 1739191d1f1dSDenis Karpov if (mmc_slot(host).wires >= 8) 174073153010SJarkko Lavinen mmc->caps |= MMC_CAP_8_BIT_DATA; 1741191d1f1dSDenis Karpov else if (mmc_slot(host).wires >= 4) 1742a45c6cb8SMadhusudhan Chikkature mmc->caps |= MMC_CAP_4_BIT_DATA; 1743a45c6cb8SMadhusudhan Chikkature 1744191d1f1dSDenis Karpov if (mmc_slot(host).nonremovable) 174523d99bb9SAdrian Hunter mmc->caps |= MMC_CAP_NONREMOVABLE; 174623d99bb9SAdrian Hunter 174770a3341aSDenis Karpov omap_hsmmc_conf_bus_power(host); 1748a45c6cb8SMadhusudhan Chikkature 1749f3e2f1ddSGrazvydas Ignotas /* Select DMA lines */ 1750f3e2f1ddSGrazvydas Ignotas switch (host->id) { 1751f3e2f1ddSGrazvydas Ignotas case OMAP_MMC1_DEVID: 1752f3e2f1ddSGrazvydas Ignotas host->dma_line_tx = OMAP24XX_DMA_MMC1_TX; 1753f3e2f1ddSGrazvydas Ignotas host->dma_line_rx = OMAP24XX_DMA_MMC1_RX; 1754f3e2f1ddSGrazvydas Ignotas break; 1755f3e2f1ddSGrazvydas Ignotas case OMAP_MMC2_DEVID: 1756f3e2f1ddSGrazvydas Ignotas host->dma_line_tx = OMAP24XX_DMA_MMC2_TX; 1757f3e2f1ddSGrazvydas Ignotas host->dma_line_rx = OMAP24XX_DMA_MMC2_RX; 1758f3e2f1ddSGrazvydas Ignotas break; 1759f3e2f1ddSGrazvydas Ignotas case OMAP_MMC3_DEVID: 1760f3e2f1ddSGrazvydas Ignotas host->dma_line_tx = OMAP34XX_DMA_MMC3_TX; 1761f3e2f1ddSGrazvydas Ignotas host->dma_line_rx = OMAP34XX_DMA_MMC3_RX; 1762f3e2f1ddSGrazvydas Ignotas break; 176382cf818dSkishore kadiyala case OMAP_MMC4_DEVID: 176482cf818dSkishore kadiyala host->dma_line_tx = OMAP44XX_DMA_MMC4_TX; 176582cf818dSkishore kadiyala host->dma_line_rx = OMAP44XX_DMA_MMC4_RX; 176682cf818dSkishore kadiyala break; 176782cf818dSkishore kadiyala case OMAP_MMC5_DEVID: 176882cf818dSkishore kadiyala host->dma_line_tx = OMAP44XX_DMA_MMC5_TX; 176982cf818dSkishore kadiyala host->dma_line_rx = OMAP44XX_DMA_MMC5_RX; 177082cf818dSkishore kadiyala break; 1771f3e2f1ddSGrazvydas Ignotas default: 1772f3e2f1ddSGrazvydas Ignotas dev_err(mmc_dev(host->mmc), "Invalid MMC id\n"); 1773f3e2f1ddSGrazvydas Ignotas goto err_irq; 1774a45c6cb8SMadhusudhan Chikkature } 1775a45c6cb8SMadhusudhan Chikkature 1776a45c6cb8SMadhusudhan Chikkature /* Request IRQ for MMC operations */ 177770a3341aSDenis Karpov ret = request_irq(host->irq, omap_hsmmc_irq, IRQF_DISABLED, 1778a45c6cb8SMadhusudhan Chikkature mmc_hostname(mmc), host); 1779a45c6cb8SMadhusudhan Chikkature if (ret) { 1780a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Unable to grab HSMMC IRQ\n"); 1781a45c6cb8SMadhusudhan Chikkature goto err_irq; 1782a45c6cb8SMadhusudhan Chikkature } 1783a45c6cb8SMadhusudhan Chikkature 1784b583f26dSDavid Brownell /* initialize power supplies, gpios, etc */ 1785a45c6cb8SMadhusudhan Chikkature if (pdata->init != NULL) { 1786a45c6cb8SMadhusudhan Chikkature if (pdata->init(&pdev->dev) != 0) { 178770a3341aSDenis Karpov dev_dbg(mmc_dev(host->mmc), 178870a3341aSDenis Karpov "Unable to configure MMC IRQs\n"); 1789a45c6cb8SMadhusudhan Chikkature goto err_irq_cd_init; 1790a45c6cb8SMadhusudhan Chikkature } 1791a45c6cb8SMadhusudhan Chikkature } 1792b583f26dSDavid Brownell mmc->ocr_avail = mmc_slot(host).ocr_mask; 1793a45c6cb8SMadhusudhan Chikkature 1794a45c6cb8SMadhusudhan Chikkature /* Request IRQ for card detect */ 1795e1a55f5eSAdrian Hunter if ((mmc_slot(host).card_detect_irq)) { 1796a45c6cb8SMadhusudhan Chikkature ret = request_irq(mmc_slot(host).card_detect_irq, 179770a3341aSDenis Karpov omap_hsmmc_cd_handler, 1798a45c6cb8SMadhusudhan Chikkature IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING 1799a45c6cb8SMadhusudhan Chikkature | IRQF_DISABLED, 1800a45c6cb8SMadhusudhan Chikkature mmc_hostname(mmc), host); 1801a45c6cb8SMadhusudhan Chikkature if (ret) { 1802a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1803a45c6cb8SMadhusudhan Chikkature "Unable to grab MMC CD IRQ\n"); 1804a45c6cb8SMadhusudhan Chikkature goto err_irq_cd; 1805a45c6cb8SMadhusudhan Chikkature } 1806a45c6cb8SMadhusudhan Chikkature } 1807a45c6cb8SMadhusudhan Chikkature 1808a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK); 1809a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK); 1810a45c6cb8SMadhusudhan Chikkature 18115e2ea617SAdrian Hunter mmc_host_lazy_disable(host->mmc); 18125e2ea617SAdrian Hunter 1813b62f6228SAdrian Hunter omap_hsmmc_protect_card(host); 1814b62f6228SAdrian Hunter 1815a45c6cb8SMadhusudhan Chikkature mmc_add_host(mmc); 1816a45c6cb8SMadhusudhan Chikkature 1817191d1f1dSDenis Karpov if (mmc_slot(host).name != NULL) { 1818a45c6cb8SMadhusudhan Chikkature ret = device_create_file(&mmc->class_dev, &dev_attr_slot_name); 1819a45c6cb8SMadhusudhan Chikkature if (ret < 0) 1820a45c6cb8SMadhusudhan Chikkature goto err_slot_name; 1821a45c6cb8SMadhusudhan Chikkature } 1822191d1f1dSDenis Karpov if (mmc_slot(host).card_detect_irq && mmc_slot(host).get_cover_state) { 1823a45c6cb8SMadhusudhan Chikkature ret = device_create_file(&mmc->class_dev, 1824a45c6cb8SMadhusudhan Chikkature &dev_attr_cover_switch); 1825a45c6cb8SMadhusudhan Chikkature if (ret < 0) 1826a45c6cb8SMadhusudhan Chikkature goto err_cover_switch; 1827a45c6cb8SMadhusudhan Chikkature } 1828a45c6cb8SMadhusudhan Chikkature 182970a3341aSDenis Karpov omap_hsmmc_debugfs(mmc); 1830d900f712SDenis Karpov 1831a45c6cb8SMadhusudhan Chikkature return 0; 1832a45c6cb8SMadhusudhan Chikkature 1833a45c6cb8SMadhusudhan Chikkature err_cover_switch: 1834a45c6cb8SMadhusudhan Chikkature device_remove_file(&mmc->class_dev, &dev_attr_cover_switch); 1835a45c6cb8SMadhusudhan Chikkature err_slot_name: 1836a45c6cb8SMadhusudhan Chikkature mmc_remove_host(mmc); 1837a45c6cb8SMadhusudhan Chikkature err_irq_cd: 1838a45c6cb8SMadhusudhan Chikkature free_irq(mmc_slot(host).card_detect_irq, host); 1839a45c6cb8SMadhusudhan Chikkature err_irq_cd_init: 1840a45c6cb8SMadhusudhan Chikkature free_irq(host->irq, host); 1841a45c6cb8SMadhusudhan Chikkature err_irq: 18425e2ea617SAdrian Hunter mmc_host_disable(host->mmc); 1843a45c6cb8SMadhusudhan Chikkature clk_disable(host->iclk); 1844a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 1845a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 18462bec0893SAdrian Hunter if (host->got_dbclk) { 1847a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 1848a45c6cb8SMadhusudhan Chikkature clk_put(host->dbclk); 1849a45c6cb8SMadhusudhan Chikkature } 1850a45c6cb8SMadhusudhan Chikkature 1851a45c6cb8SMadhusudhan Chikkature err1: 1852a45c6cb8SMadhusudhan Chikkature iounmap(host->base); 1853a45c6cb8SMadhusudhan Chikkature err: 1854a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Probe Failed\n"); 1855a45c6cb8SMadhusudhan Chikkature release_mem_region(res->start, res->end - res->start + 1); 1856a45c6cb8SMadhusudhan Chikkature if (host) 1857a45c6cb8SMadhusudhan Chikkature mmc_free_host(mmc); 1858a45c6cb8SMadhusudhan Chikkature return ret; 1859a45c6cb8SMadhusudhan Chikkature } 1860a45c6cb8SMadhusudhan Chikkature 186170a3341aSDenis Karpov static int omap_hsmmc_remove(struct platform_device *pdev) 1862a45c6cb8SMadhusudhan Chikkature { 186370a3341aSDenis Karpov struct omap_hsmmc_host *host = platform_get_drvdata(pdev); 1864a45c6cb8SMadhusudhan Chikkature struct resource *res; 1865a45c6cb8SMadhusudhan Chikkature 1866a45c6cb8SMadhusudhan Chikkature if (host) { 18675e2ea617SAdrian Hunter mmc_host_enable(host->mmc); 1868a45c6cb8SMadhusudhan Chikkature mmc_remove_host(host->mmc); 1869a45c6cb8SMadhusudhan Chikkature if (host->pdata->cleanup) 1870a45c6cb8SMadhusudhan Chikkature host->pdata->cleanup(&pdev->dev); 1871a45c6cb8SMadhusudhan Chikkature free_irq(host->irq, host); 1872a45c6cb8SMadhusudhan Chikkature if (mmc_slot(host).card_detect_irq) 1873a45c6cb8SMadhusudhan Chikkature free_irq(mmc_slot(host).card_detect_irq, host); 1874a45c6cb8SMadhusudhan Chikkature flush_scheduled_work(); 1875a45c6cb8SMadhusudhan Chikkature 18765e2ea617SAdrian Hunter mmc_host_disable(host->mmc); 1877a45c6cb8SMadhusudhan Chikkature clk_disable(host->iclk); 1878a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 1879a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 18802bec0893SAdrian Hunter if (host->got_dbclk) { 1881a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 1882a45c6cb8SMadhusudhan Chikkature clk_put(host->dbclk); 1883a45c6cb8SMadhusudhan Chikkature } 1884a45c6cb8SMadhusudhan Chikkature 1885a45c6cb8SMadhusudhan Chikkature mmc_free_host(host->mmc); 1886a45c6cb8SMadhusudhan Chikkature iounmap(host->base); 1887a45c6cb8SMadhusudhan Chikkature } 1888a45c6cb8SMadhusudhan Chikkature 1889a45c6cb8SMadhusudhan Chikkature res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1890a45c6cb8SMadhusudhan Chikkature if (res) 1891a45c6cb8SMadhusudhan Chikkature release_mem_region(res->start, res->end - res->start + 1); 1892a45c6cb8SMadhusudhan Chikkature platform_set_drvdata(pdev, NULL); 1893a45c6cb8SMadhusudhan Chikkature 1894a45c6cb8SMadhusudhan Chikkature return 0; 1895a45c6cb8SMadhusudhan Chikkature } 1896a45c6cb8SMadhusudhan Chikkature 1897a45c6cb8SMadhusudhan Chikkature #ifdef CONFIG_PM 189870a3341aSDenis Karpov static int omap_hsmmc_suspend(struct platform_device *pdev, pm_message_t state) 1899a45c6cb8SMadhusudhan Chikkature { 1900a45c6cb8SMadhusudhan Chikkature int ret = 0; 190170a3341aSDenis Karpov struct omap_hsmmc_host *host = platform_get_drvdata(pdev); 1902a45c6cb8SMadhusudhan Chikkature 1903a45c6cb8SMadhusudhan Chikkature if (host && host->suspended) 1904a45c6cb8SMadhusudhan Chikkature return 0; 1905a45c6cb8SMadhusudhan Chikkature 1906a45c6cb8SMadhusudhan Chikkature if (host) { 1907a45c6cb8SMadhusudhan Chikkature host->suspended = 1; 1908a45c6cb8SMadhusudhan Chikkature if (host->pdata->suspend) { 1909a45c6cb8SMadhusudhan Chikkature ret = host->pdata->suspend(&pdev->dev, 1910a45c6cb8SMadhusudhan Chikkature host->slot_id); 1911a6b2240dSAdrian Hunter if (ret) { 1912a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1913a45c6cb8SMadhusudhan Chikkature "Unable to handle MMC board" 1914a45c6cb8SMadhusudhan Chikkature " level suspend\n"); 1915a6b2240dSAdrian Hunter host->suspended = 0; 1916a6b2240dSAdrian Hunter return ret; 1917a45c6cb8SMadhusudhan Chikkature } 1918a6b2240dSAdrian Hunter } 1919a6b2240dSAdrian Hunter cancel_work_sync(&host->mmc_carddetect_work); 1920a6b2240dSAdrian Hunter mmc_host_enable(host->mmc); 1921a6b2240dSAdrian Hunter ret = mmc_suspend_host(host->mmc, state); 1922a6b2240dSAdrian Hunter if (ret == 0) { 1923a6b2240dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, ISE, 0); 1924a6b2240dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, IE, 0); 1925a6b2240dSAdrian Hunter 1926a45c6cb8SMadhusudhan Chikkature 1927a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 19280683af48SJarkko Lavinen OMAP_HSMMC_READ(host->base, HCTL) & ~SDBP); 19295e2ea617SAdrian Hunter mmc_host_disable(host->mmc); 1930a45c6cb8SMadhusudhan Chikkature clk_disable(host->iclk); 19312bec0893SAdrian Hunter if (host->got_dbclk) 1932a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 1933a6b2240dSAdrian Hunter } else { 1934a6b2240dSAdrian Hunter host->suspended = 0; 1935a6b2240dSAdrian Hunter if (host->pdata->resume) { 1936a6b2240dSAdrian Hunter ret = host->pdata->resume(&pdev->dev, 1937a6b2240dSAdrian Hunter host->slot_id); 1938a6b2240dSAdrian Hunter if (ret) 1939a6b2240dSAdrian Hunter dev_dbg(mmc_dev(host->mmc), 1940a6b2240dSAdrian Hunter "Unmask interrupt failed\n"); 1941a6b2240dSAdrian Hunter } 19425e2ea617SAdrian Hunter mmc_host_disable(host->mmc); 1943a6b2240dSAdrian Hunter } 1944a45c6cb8SMadhusudhan Chikkature 1945a45c6cb8SMadhusudhan Chikkature } 1946a45c6cb8SMadhusudhan Chikkature return ret; 1947a45c6cb8SMadhusudhan Chikkature } 1948a45c6cb8SMadhusudhan Chikkature 1949a45c6cb8SMadhusudhan Chikkature /* Routine to resume the MMC device */ 195070a3341aSDenis Karpov static int omap_hsmmc_resume(struct platform_device *pdev) 1951a45c6cb8SMadhusudhan Chikkature { 1952a45c6cb8SMadhusudhan Chikkature int ret = 0; 195370a3341aSDenis Karpov struct omap_hsmmc_host *host = platform_get_drvdata(pdev); 1954a45c6cb8SMadhusudhan Chikkature 1955a45c6cb8SMadhusudhan Chikkature if (host && !host->suspended) 1956a45c6cb8SMadhusudhan Chikkature return 0; 1957a45c6cb8SMadhusudhan Chikkature 1958a45c6cb8SMadhusudhan Chikkature if (host) { 1959a45c6cb8SMadhusudhan Chikkature ret = clk_enable(host->iclk); 196011dd62a7SDenis Karpov if (ret) 1961a45c6cb8SMadhusudhan Chikkature goto clk_en_err; 1962a45c6cb8SMadhusudhan Chikkature 196311dd62a7SDenis Karpov if (mmc_host_enable(host->mmc) != 0) { 196411dd62a7SDenis Karpov clk_disable(host->iclk); 196511dd62a7SDenis Karpov goto clk_en_err; 196611dd62a7SDenis Karpov } 196711dd62a7SDenis Karpov 19682bec0893SAdrian Hunter if (host->got_dbclk) 19692bec0893SAdrian Hunter clk_enable(host->dbclk); 19702bec0893SAdrian Hunter 197170a3341aSDenis Karpov omap_hsmmc_conf_bus_power(host); 19721b331e69SKim Kyuwon 1973a45c6cb8SMadhusudhan Chikkature if (host->pdata->resume) { 1974a45c6cb8SMadhusudhan Chikkature ret = host->pdata->resume(&pdev->dev, host->slot_id); 1975a45c6cb8SMadhusudhan Chikkature if (ret) 1976a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1977a45c6cb8SMadhusudhan Chikkature "Unmask interrupt failed\n"); 1978a45c6cb8SMadhusudhan Chikkature } 1979a45c6cb8SMadhusudhan Chikkature 1980b62f6228SAdrian Hunter omap_hsmmc_protect_card(host); 1981b62f6228SAdrian Hunter 1982a45c6cb8SMadhusudhan Chikkature /* Notify the core to resume the host */ 1983a45c6cb8SMadhusudhan Chikkature ret = mmc_resume_host(host->mmc); 1984a45c6cb8SMadhusudhan Chikkature if (ret == 0) 1985a45c6cb8SMadhusudhan Chikkature host->suspended = 0; 198670a3341aSDenis Karpov 19875e2ea617SAdrian Hunter mmc_host_lazy_disable(host->mmc); 1988a45c6cb8SMadhusudhan Chikkature } 1989a45c6cb8SMadhusudhan Chikkature 1990a45c6cb8SMadhusudhan Chikkature return ret; 1991a45c6cb8SMadhusudhan Chikkature 1992a45c6cb8SMadhusudhan Chikkature clk_en_err: 1993a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1994a45c6cb8SMadhusudhan Chikkature "Failed to enable MMC clocks during resume\n"); 1995a45c6cb8SMadhusudhan Chikkature return ret; 1996a45c6cb8SMadhusudhan Chikkature } 1997a45c6cb8SMadhusudhan Chikkature 1998a45c6cb8SMadhusudhan Chikkature #else 199970a3341aSDenis Karpov #define omap_hsmmc_suspend NULL 200070a3341aSDenis Karpov #define omap_hsmmc_resume NULL 2001a45c6cb8SMadhusudhan Chikkature #endif 2002a45c6cb8SMadhusudhan Chikkature 200370a3341aSDenis Karpov static struct platform_driver omap_hsmmc_driver = { 200470a3341aSDenis Karpov .remove = omap_hsmmc_remove, 200570a3341aSDenis Karpov .suspend = omap_hsmmc_suspend, 200670a3341aSDenis Karpov .resume = omap_hsmmc_resume, 2007a45c6cb8SMadhusudhan Chikkature .driver = { 2008a45c6cb8SMadhusudhan Chikkature .name = DRIVER_NAME, 2009a45c6cb8SMadhusudhan Chikkature .owner = THIS_MODULE, 2010a45c6cb8SMadhusudhan Chikkature }, 2011a45c6cb8SMadhusudhan Chikkature }; 2012a45c6cb8SMadhusudhan Chikkature 201370a3341aSDenis Karpov static int __init omap_hsmmc_init(void) 2014a45c6cb8SMadhusudhan Chikkature { 2015a45c6cb8SMadhusudhan Chikkature /* Register the MMC driver */ 20168753298aSRoger Quadros return platform_driver_probe(&omap_hsmmc_driver, omap_hsmmc_probe); 2017a45c6cb8SMadhusudhan Chikkature } 2018a45c6cb8SMadhusudhan Chikkature 201970a3341aSDenis Karpov static void __exit omap_hsmmc_cleanup(void) 2020a45c6cb8SMadhusudhan Chikkature { 2021a45c6cb8SMadhusudhan Chikkature /* Unregister MMC driver */ 202270a3341aSDenis Karpov platform_driver_unregister(&omap_hsmmc_driver); 2023a45c6cb8SMadhusudhan Chikkature } 2024a45c6cb8SMadhusudhan Chikkature 202570a3341aSDenis Karpov module_init(omap_hsmmc_init); 202670a3341aSDenis Karpov module_exit(omap_hsmmc_cleanup); 2027a45c6cb8SMadhusudhan Chikkature 2028a45c6cb8SMadhusudhan Chikkature MODULE_DESCRIPTION("OMAP High Speed Multimedia Card driver"); 2029a45c6cb8SMadhusudhan Chikkature MODULE_LICENSE("GPL"); 2030a45c6cb8SMadhusudhan Chikkature MODULE_ALIAS("platform:" DRIVER_NAME); 2031a45c6cb8SMadhusudhan Chikkature MODULE_AUTHOR("Texas Instruments Inc"); 2032