1a45c6cb8SMadhusudhan Chikkature /* 2a45c6cb8SMadhusudhan Chikkature * drivers/mmc/host/omap_hsmmc.c 3a45c6cb8SMadhusudhan Chikkature * 4a45c6cb8SMadhusudhan Chikkature * Driver for OMAP2430/3430 MMC controller. 5a45c6cb8SMadhusudhan Chikkature * 6a45c6cb8SMadhusudhan Chikkature * Copyright (C) 2007 Texas Instruments. 7a45c6cb8SMadhusudhan Chikkature * 8a45c6cb8SMadhusudhan Chikkature * Authors: 9a45c6cb8SMadhusudhan Chikkature * Syed Mohammed Khasim <x0khasim@ti.com> 10a45c6cb8SMadhusudhan Chikkature * Madhusudhan <madhu.cr@ti.com> 11a45c6cb8SMadhusudhan Chikkature * Mohit Jalori <mjalori@ti.com> 12a45c6cb8SMadhusudhan Chikkature * 13a45c6cb8SMadhusudhan Chikkature * This file is licensed under the terms of the GNU General Public License 14a45c6cb8SMadhusudhan Chikkature * version 2. This program is licensed "as is" without any warranty of any 15a45c6cb8SMadhusudhan Chikkature * kind, whether express or implied. 16a45c6cb8SMadhusudhan Chikkature */ 17a45c6cb8SMadhusudhan Chikkature 18a45c6cb8SMadhusudhan Chikkature #include <linux/module.h> 19a45c6cb8SMadhusudhan Chikkature #include <linux/init.h> 20ac330f44SAndy Shevchenko #include <linux/kernel.h> 21d900f712SDenis Karpov #include <linux/debugfs.h> 22d900f712SDenis Karpov #include <linux/seq_file.h> 23a45c6cb8SMadhusudhan Chikkature #include <linux/interrupt.h> 24a45c6cb8SMadhusudhan Chikkature #include <linux/delay.h> 25a45c6cb8SMadhusudhan Chikkature #include <linux/dma-mapping.h> 26a45c6cb8SMadhusudhan Chikkature #include <linux/platform_device.h> 27a45c6cb8SMadhusudhan Chikkature #include <linux/timer.h> 28a45c6cb8SMadhusudhan Chikkature #include <linux/clk.h> 2946856a68SRajendra Nayak #include <linux/of.h> 3046856a68SRajendra Nayak #include <linux/of_gpio.h> 3146856a68SRajendra Nayak #include <linux/of_device.h> 32a45c6cb8SMadhusudhan Chikkature #include <linux/mmc/host.h> 3313189e78SJarkko Lavinen #include <linux/mmc/core.h> 3493caf8e6SAdrian Hunter #include <linux/mmc/mmc.h> 35a45c6cb8SMadhusudhan Chikkature #include <linux/io.h> 36a45c6cb8SMadhusudhan Chikkature #include <linux/semaphore.h> 37db0fefc5SAdrian Hunter #include <linux/gpio.h> 38db0fefc5SAdrian Hunter #include <linux/regulator/consumer.h> 39fa4aa2d4SBalaji T K #include <linux/pm_runtime.h> 40ce491cf8STony Lindgren #include <plat/dma.h> 41a45c6cb8SMadhusudhan Chikkature #include <mach/hardware.h> 42ce491cf8STony Lindgren #include <plat/board.h> 43ce491cf8STony Lindgren #include <plat/mmc.h> 44ce491cf8STony Lindgren #include <plat/cpu.h> 45a45c6cb8SMadhusudhan Chikkature 46a45c6cb8SMadhusudhan Chikkature /* OMAP HSMMC Host Controller Registers */ 47a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_SYSCONFIG 0x0010 4811dd62a7SDenis Karpov #define OMAP_HSMMC_SYSSTATUS 0x0014 49a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_CON 0x002C 50a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_BLK 0x0104 51a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_ARG 0x0108 52a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_CMD 0x010C 53a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP10 0x0110 54a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP32 0x0114 55a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP54 0x0118 56a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP76 0x011C 57a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_DATA 0x0120 58a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_HCTL 0x0128 59a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_SYSCTL 0x012C 60a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_STAT 0x0130 61a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_IE 0x0134 62a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_ISE 0x0138 63a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_CAPA 0x0140 64a45c6cb8SMadhusudhan Chikkature 65a45c6cb8SMadhusudhan Chikkature #define VS18 (1 << 26) 66a45c6cb8SMadhusudhan Chikkature #define VS30 (1 << 25) 67a45c6cb8SMadhusudhan Chikkature #define SDVS18 (0x5 << 9) 68a45c6cb8SMadhusudhan Chikkature #define SDVS30 (0x6 << 9) 69eb250826SDavid Brownell #define SDVS33 (0x7 << 9) 701b331e69SKim Kyuwon #define SDVS_MASK 0x00000E00 71a45c6cb8SMadhusudhan Chikkature #define SDVSCLR 0xFFFFF1FF 72a45c6cb8SMadhusudhan Chikkature #define SDVSDET 0x00000400 73a45c6cb8SMadhusudhan Chikkature #define AUTOIDLE 0x1 74a45c6cb8SMadhusudhan Chikkature #define SDBP (1 << 8) 75a45c6cb8SMadhusudhan Chikkature #define DTO 0xe 76a45c6cb8SMadhusudhan Chikkature #define ICE 0x1 77a45c6cb8SMadhusudhan Chikkature #define ICS 0x2 78a45c6cb8SMadhusudhan Chikkature #define CEN (1 << 2) 79a45c6cb8SMadhusudhan Chikkature #define CLKD_MASK 0x0000FFC0 80a45c6cb8SMadhusudhan Chikkature #define CLKD_SHIFT 6 81a45c6cb8SMadhusudhan Chikkature #define DTO_MASK 0x000F0000 82a45c6cb8SMadhusudhan Chikkature #define DTO_SHIFT 16 83a45c6cb8SMadhusudhan Chikkature #define INT_EN_MASK 0x307F0033 84ccdfe3a6SAnand Gadiyar #define BWR_ENABLE (1 << 4) 85ccdfe3a6SAnand Gadiyar #define BRR_ENABLE (1 << 5) 8693caf8e6SAdrian Hunter #define DTO_ENABLE (1 << 20) 87a45c6cb8SMadhusudhan Chikkature #define INIT_STREAM (1 << 1) 88a45c6cb8SMadhusudhan Chikkature #define DP_SELECT (1 << 21) 89a45c6cb8SMadhusudhan Chikkature #define DDIR (1 << 4) 90a45c6cb8SMadhusudhan Chikkature #define DMA_EN 0x1 91a45c6cb8SMadhusudhan Chikkature #define MSBS (1 << 5) 92a45c6cb8SMadhusudhan Chikkature #define BCE (1 << 1) 93a45c6cb8SMadhusudhan Chikkature #define FOUR_BIT (1 << 1) 9473153010SJarkko Lavinen #define DW8 (1 << 5) 95a45c6cb8SMadhusudhan Chikkature #define CC 0x1 96a45c6cb8SMadhusudhan Chikkature #define TC 0x02 97a45c6cb8SMadhusudhan Chikkature #define OD 0x1 98a45c6cb8SMadhusudhan Chikkature #define ERR (1 << 15) 99a45c6cb8SMadhusudhan Chikkature #define CMD_TIMEOUT (1 << 16) 100a45c6cb8SMadhusudhan Chikkature #define DATA_TIMEOUT (1 << 20) 101a45c6cb8SMadhusudhan Chikkature #define CMD_CRC (1 << 17) 102a45c6cb8SMadhusudhan Chikkature #define DATA_CRC (1 << 21) 103a45c6cb8SMadhusudhan Chikkature #define CARD_ERR (1 << 28) 104a45c6cb8SMadhusudhan Chikkature #define STAT_CLEAR 0xFFFFFFFF 105a45c6cb8SMadhusudhan Chikkature #define INIT_STREAM_CMD 0x00000000 106a45c6cb8SMadhusudhan Chikkature #define DUAL_VOLT_OCR_BIT 7 107a45c6cb8SMadhusudhan Chikkature #define SRC (1 << 25) 108a45c6cb8SMadhusudhan Chikkature #define SRD (1 << 26) 10911dd62a7SDenis Karpov #define SOFTRESET (1 << 1) 11011dd62a7SDenis Karpov #define RESETDONE (1 << 0) 111a45c6cb8SMadhusudhan Chikkature 112fa4aa2d4SBalaji T K #define MMC_AUTOSUSPEND_DELAY 100 113a45c6cb8SMadhusudhan Chikkature #define MMC_TIMEOUT_MS 20 1146b206efeSAndy Shevchenko #define OMAP_MMC_MIN_CLOCK 400000 1156b206efeSAndy Shevchenko #define OMAP_MMC_MAX_CLOCK 52000000 1160005ae73SKishore Kadiyala #define DRIVER_NAME "omap_hsmmc" 117a45c6cb8SMadhusudhan Chikkature 118a45c6cb8SMadhusudhan Chikkature /* 119a45c6cb8SMadhusudhan Chikkature * One controller can have multiple slots, like on some omap boards using 120a45c6cb8SMadhusudhan Chikkature * omap.c controller driver. Luckily this is not currently done on any known 121a45c6cb8SMadhusudhan Chikkature * omap_hsmmc.c device. 122a45c6cb8SMadhusudhan Chikkature */ 123a45c6cb8SMadhusudhan Chikkature #define mmc_slot(host) (host->pdata->slots[host->slot_id]) 124a45c6cb8SMadhusudhan Chikkature 125a45c6cb8SMadhusudhan Chikkature /* 126a45c6cb8SMadhusudhan Chikkature * MMC Host controller read/write API's 127a45c6cb8SMadhusudhan Chikkature */ 128a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_READ(base, reg) \ 129a45c6cb8SMadhusudhan Chikkature __raw_readl((base) + OMAP_HSMMC_##reg) 130a45c6cb8SMadhusudhan Chikkature 131a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_WRITE(base, reg, val) \ 132a45c6cb8SMadhusudhan Chikkature __raw_writel((val), (base) + OMAP_HSMMC_##reg) 133a45c6cb8SMadhusudhan Chikkature 1349782aff8SPer Forlin struct omap_hsmmc_next { 1359782aff8SPer Forlin unsigned int dma_len; 1369782aff8SPer Forlin s32 cookie; 1379782aff8SPer Forlin }; 1389782aff8SPer Forlin 13970a3341aSDenis Karpov struct omap_hsmmc_host { 140a45c6cb8SMadhusudhan Chikkature struct device *dev; 141a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc; 142a45c6cb8SMadhusudhan Chikkature struct mmc_request *mrq; 143a45c6cb8SMadhusudhan Chikkature struct mmc_command *cmd; 144a45c6cb8SMadhusudhan Chikkature struct mmc_data *data; 145a45c6cb8SMadhusudhan Chikkature struct clk *fclk; 146a45c6cb8SMadhusudhan Chikkature struct clk *dbclk; 147db0fefc5SAdrian Hunter /* 148db0fefc5SAdrian Hunter * vcc == configured supply 149db0fefc5SAdrian Hunter * vcc_aux == optional 150db0fefc5SAdrian Hunter * - MMC1, supply for DAT4..DAT7 151db0fefc5SAdrian Hunter * - MMC2/MMC2, external level shifter voltage supply, for 152db0fefc5SAdrian Hunter * chip (SDIO, eMMC, etc) or transceiver (MMC2 only) 153db0fefc5SAdrian Hunter */ 154db0fefc5SAdrian Hunter struct regulator *vcc; 155db0fefc5SAdrian Hunter struct regulator *vcc_aux; 156a45c6cb8SMadhusudhan Chikkature void __iomem *base; 157a45c6cb8SMadhusudhan Chikkature resource_size_t mapbase; 1584dffd7a2SAdrian Hunter spinlock_t irq_lock; /* Prevent races with irq handler */ 159a45c6cb8SMadhusudhan Chikkature unsigned int dma_len; 1600ccd76d4SJuha Yrjola unsigned int dma_sg_idx; 161a45c6cb8SMadhusudhan Chikkature unsigned char bus_mode; 162a3621465SAdrian Hunter unsigned char power_mode; 163a45c6cb8SMadhusudhan Chikkature u32 *buffer; 164a45c6cb8SMadhusudhan Chikkature u32 bytesleft; 165a45c6cb8SMadhusudhan Chikkature int suspended; 166a45c6cb8SMadhusudhan Chikkature int irq; 167a45c6cb8SMadhusudhan Chikkature int use_dma, dma_ch; 168f3e2f1ddSGrazvydas Ignotas int dma_line_tx, dma_line_rx; 169a45c6cb8SMadhusudhan Chikkature int slot_id; 1702bec0893SAdrian Hunter int got_dbclk; 1714a694dc9SAdrian Hunter int response_busy; 17211dd62a7SDenis Karpov int context_loss; 173623821f7SAdrian Hunter int vdd; 174b62f6228SAdrian Hunter int protect_card; 175b62f6228SAdrian Hunter int reqs_blocked; 176db0fefc5SAdrian Hunter int use_reg; 177b417577dSAdrian Hunter int req_in_progress; 1789782aff8SPer Forlin struct omap_hsmmc_next next_data; 17911dd62a7SDenis Karpov 180a45c6cb8SMadhusudhan Chikkature struct omap_mmc_platform_data *pdata; 181a45c6cb8SMadhusudhan Chikkature }; 182a45c6cb8SMadhusudhan Chikkature 183db0fefc5SAdrian Hunter static int omap_hsmmc_card_detect(struct device *dev, int slot) 184db0fefc5SAdrian Hunter { 185db0fefc5SAdrian Hunter struct omap_mmc_platform_data *mmc = dev->platform_data; 186db0fefc5SAdrian Hunter 187db0fefc5SAdrian Hunter /* NOTE: assumes card detect signal is active-low */ 188db0fefc5SAdrian Hunter return !gpio_get_value_cansleep(mmc->slots[0].switch_pin); 189db0fefc5SAdrian Hunter } 190db0fefc5SAdrian Hunter 191db0fefc5SAdrian Hunter static int omap_hsmmc_get_wp(struct device *dev, int slot) 192db0fefc5SAdrian Hunter { 193db0fefc5SAdrian Hunter struct omap_mmc_platform_data *mmc = dev->platform_data; 194db0fefc5SAdrian Hunter 195db0fefc5SAdrian Hunter /* NOTE: assumes write protect signal is active-high */ 196db0fefc5SAdrian Hunter return gpio_get_value_cansleep(mmc->slots[0].gpio_wp); 197db0fefc5SAdrian Hunter } 198db0fefc5SAdrian Hunter 199db0fefc5SAdrian Hunter static int omap_hsmmc_get_cover_state(struct device *dev, int slot) 200db0fefc5SAdrian Hunter { 201db0fefc5SAdrian Hunter struct omap_mmc_platform_data *mmc = dev->platform_data; 202db0fefc5SAdrian Hunter 203db0fefc5SAdrian Hunter /* NOTE: assumes card detect signal is active-low */ 204db0fefc5SAdrian Hunter return !gpio_get_value_cansleep(mmc->slots[0].switch_pin); 205db0fefc5SAdrian Hunter } 206db0fefc5SAdrian Hunter 207db0fefc5SAdrian Hunter #ifdef CONFIG_PM 208db0fefc5SAdrian Hunter 209db0fefc5SAdrian Hunter static int omap_hsmmc_suspend_cdirq(struct device *dev, int slot) 210db0fefc5SAdrian Hunter { 211db0fefc5SAdrian Hunter struct omap_mmc_platform_data *mmc = dev->platform_data; 212db0fefc5SAdrian Hunter 213db0fefc5SAdrian Hunter disable_irq(mmc->slots[0].card_detect_irq); 214db0fefc5SAdrian Hunter return 0; 215db0fefc5SAdrian Hunter } 216db0fefc5SAdrian Hunter 217db0fefc5SAdrian Hunter static int omap_hsmmc_resume_cdirq(struct device *dev, int slot) 218db0fefc5SAdrian Hunter { 219db0fefc5SAdrian Hunter struct omap_mmc_platform_data *mmc = dev->platform_data; 220db0fefc5SAdrian Hunter 221db0fefc5SAdrian Hunter enable_irq(mmc->slots[0].card_detect_irq); 222db0fefc5SAdrian Hunter return 0; 223db0fefc5SAdrian Hunter } 224db0fefc5SAdrian Hunter 225db0fefc5SAdrian Hunter #else 226db0fefc5SAdrian Hunter 227db0fefc5SAdrian Hunter #define omap_hsmmc_suspend_cdirq NULL 228db0fefc5SAdrian Hunter #define omap_hsmmc_resume_cdirq NULL 229db0fefc5SAdrian Hunter 230db0fefc5SAdrian Hunter #endif 231db0fefc5SAdrian Hunter 232b702b106SAdrian Hunter #ifdef CONFIG_REGULATOR 233b702b106SAdrian Hunter 23469b07eceSRajendra Nayak static int omap_hsmmc_set_power(struct device *dev, int slot, int power_on, 235db0fefc5SAdrian Hunter int vdd) 236db0fefc5SAdrian Hunter { 237db0fefc5SAdrian Hunter struct omap_hsmmc_host *host = 238db0fefc5SAdrian Hunter platform_get_drvdata(to_platform_device(dev)); 239db0fefc5SAdrian Hunter int ret = 0; 240db0fefc5SAdrian Hunter 241db0fefc5SAdrian Hunter /* 242db0fefc5SAdrian Hunter * If we don't see a Vcc regulator, assume it's a fixed 243db0fefc5SAdrian Hunter * voltage always-on regulator. 244db0fefc5SAdrian Hunter */ 245db0fefc5SAdrian Hunter if (!host->vcc) 246db0fefc5SAdrian Hunter return 0; 2471f84b71bSRajendra Nayak /* 2481f84b71bSRajendra Nayak * With DT, never turn OFF the regulator. This is because 2491f84b71bSRajendra Nayak * the pbias cell programming support is still missing when 2501f84b71bSRajendra Nayak * booting with Device tree 2511f84b71bSRajendra Nayak */ 2524d048f91SRajendra Nayak if (dev->of_node && !vdd) 2531f84b71bSRajendra Nayak return 0; 254db0fefc5SAdrian Hunter 255db0fefc5SAdrian Hunter if (mmc_slot(host).before_set_reg) 256db0fefc5SAdrian Hunter mmc_slot(host).before_set_reg(dev, slot, power_on, vdd); 257db0fefc5SAdrian Hunter 258db0fefc5SAdrian Hunter /* 259db0fefc5SAdrian Hunter * Assume Vcc regulator is used only to power the card ... OMAP 260db0fefc5SAdrian Hunter * VDDS is used to power the pins, optionally with a transceiver to 261db0fefc5SAdrian Hunter * support cards using voltages other than VDDS (1.8V nominal). When a 262db0fefc5SAdrian Hunter * transceiver is used, DAT3..7 are muxed as transceiver control pins. 263db0fefc5SAdrian Hunter * 264db0fefc5SAdrian Hunter * In some cases this regulator won't support enable/disable; 265db0fefc5SAdrian Hunter * e.g. it's a fixed rail for a WLAN chip. 266db0fefc5SAdrian Hunter * 267db0fefc5SAdrian Hunter * In other cases vcc_aux switches interface power. Example, for 268db0fefc5SAdrian Hunter * eMMC cards it represents VccQ. Sometimes transceivers or SDIO 269db0fefc5SAdrian Hunter * chips/cards need an interface voltage rail too. 270db0fefc5SAdrian Hunter */ 271db0fefc5SAdrian Hunter if (power_on) { 27299fc5131SLinus Walleij ret = mmc_regulator_set_ocr(host->mmc, host->vcc, vdd); 273db0fefc5SAdrian Hunter /* Enable interface voltage rail, if needed */ 274db0fefc5SAdrian Hunter if (ret == 0 && host->vcc_aux) { 275db0fefc5SAdrian Hunter ret = regulator_enable(host->vcc_aux); 276db0fefc5SAdrian Hunter if (ret < 0) 27799fc5131SLinus Walleij ret = mmc_regulator_set_ocr(host->mmc, 27899fc5131SLinus Walleij host->vcc, 0); 279db0fefc5SAdrian Hunter } 280db0fefc5SAdrian Hunter } else { 28199fc5131SLinus Walleij /* Shut down the rail */ 2826da20c89SAdrian Hunter if (host->vcc_aux) 283db0fefc5SAdrian Hunter ret = regulator_disable(host->vcc_aux); 28499fc5131SLinus Walleij if (!ret) { 28599fc5131SLinus Walleij /* Then proceed to shut down the local regulator */ 28699fc5131SLinus Walleij ret = mmc_regulator_set_ocr(host->mmc, 28799fc5131SLinus Walleij host->vcc, 0); 28899fc5131SLinus Walleij } 289db0fefc5SAdrian Hunter } 290db0fefc5SAdrian Hunter 291db0fefc5SAdrian Hunter if (mmc_slot(host).after_set_reg) 292db0fefc5SAdrian Hunter mmc_slot(host).after_set_reg(dev, slot, power_on, vdd); 293db0fefc5SAdrian Hunter 294db0fefc5SAdrian Hunter return ret; 295db0fefc5SAdrian Hunter } 296db0fefc5SAdrian Hunter 297db0fefc5SAdrian Hunter static int omap_hsmmc_reg_get(struct omap_hsmmc_host *host) 298db0fefc5SAdrian Hunter { 299db0fefc5SAdrian Hunter struct regulator *reg; 30064be9782Skishore kadiyala int ocr_value = 0; 301db0fefc5SAdrian Hunter 30269b07eceSRajendra Nayak mmc_slot(host).set_power = omap_hsmmc_set_power; 303db0fefc5SAdrian Hunter 304db0fefc5SAdrian Hunter reg = regulator_get(host->dev, "vmmc"); 305db0fefc5SAdrian Hunter if (IS_ERR(reg)) { 306db0fefc5SAdrian Hunter dev_dbg(host->dev, "vmmc regulator missing\n"); 307db0fefc5SAdrian Hunter } else { 308db0fefc5SAdrian Hunter host->vcc = reg; 30964be9782Skishore kadiyala ocr_value = mmc_regulator_get_ocrmask(reg); 31064be9782Skishore kadiyala if (!mmc_slot(host).ocr_mask) { 31164be9782Skishore kadiyala mmc_slot(host).ocr_mask = ocr_value; 31264be9782Skishore kadiyala } else { 31364be9782Skishore kadiyala if (!(mmc_slot(host).ocr_mask & ocr_value)) { 3142cecdf00SRajendra Nayak dev_err(host->dev, "ocrmask %x is not supported\n", 315e3f1adb6SRajendra Nayak mmc_slot(host).ocr_mask); 31664be9782Skishore kadiyala mmc_slot(host).ocr_mask = 0; 31764be9782Skishore kadiyala return -EINVAL; 31864be9782Skishore kadiyala } 31964be9782Skishore kadiyala } 320db0fefc5SAdrian Hunter 321db0fefc5SAdrian Hunter /* Allow an aux regulator */ 322db0fefc5SAdrian Hunter reg = regulator_get(host->dev, "vmmc_aux"); 323db0fefc5SAdrian Hunter host->vcc_aux = IS_ERR(reg) ? NULL : reg; 324db0fefc5SAdrian Hunter 325b1c1df7aSBalaji T K /* For eMMC do not power off when not in sleep state */ 326b1c1df7aSBalaji T K if (mmc_slot(host).no_regulator_off_init) 327b1c1df7aSBalaji T K return 0; 328db0fefc5SAdrian Hunter /* 329db0fefc5SAdrian Hunter * UGLY HACK: workaround regulator framework bugs. 330db0fefc5SAdrian Hunter * When the bootloader leaves a supply active, it's 331db0fefc5SAdrian Hunter * initialized with zero usecount ... and we can't 332db0fefc5SAdrian Hunter * disable it without first enabling it. Until the 333db0fefc5SAdrian Hunter * framework is fixed, we need a workaround like this 334db0fefc5SAdrian Hunter * (which is safe for MMC, but not in general). 335db0fefc5SAdrian Hunter */ 336e840ce13SAdrian Hunter if (regulator_is_enabled(host->vcc) > 0 || 337e840ce13SAdrian Hunter (host->vcc_aux && regulator_is_enabled(host->vcc_aux))) { 338e840ce13SAdrian Hunter int vdd = ffs(mmc_slot(host).ocr_mask) - 1; 339e840ce13SAdrian Hunter 340e840ce13SAdrian Hunter mmc_slot(host).set_power(host->dev, host->slot_id, 341e840ce13SAdrian Hunter 1, vdd); 342e840ce13SAdrian Hunter mmc_slot(host).set_power(host->dev, host->slot_id, 343e840ce13SAdrian Hunter 0, 0); 344db0fefc5SAdrian Hunter } 345db0fefc5SAdrian Hunter } 346db0fefc5SAdrian Hunter 347db0fefc5SAdrian Hunter return 0; 348db0fefc5SAdrian Hunter } 349db0fefc5SAdrian Hunter 350db0fefc5SAdrian Hunter static void omap_hsmmc_reg_put(struct omap_hsmmc_host *host) 351db0fefc5SAdrian Hunter { 352db0fefc5SAdrian Hunter regulator_put(host->vcc); 353db0fefc5SAdrian Hunter regulator_put(host->vcc_aux); 354db0fefc5SAdrian Hunter mmc_slot(host).set_power = NULL; 355db0fefc5SAdrian Hunter } 356db0fefc5SAdrian Hunter 357b702b106SAdrian Hunter static inline int omap_hsmmc_have_reg(void) 358b702b106SAdrian Hunter { 359b702b106SAdrian Hunter return 1; 360b702b106SAdrian Hunter } 361b702b106SAdrian Hunter 362b702b106SAdrian Hunter #else 363b702b106SAdrian Hunter 364b702b106SAdrian Hunter static inline int omap_hsmmc_reg_get(struct omap_hsmmc_host *host) 365b702b106SAdrian Hunter { 366b702b106SAdrian Hunter return -EINVAL; 367b702b106SAdrian Hunter } 368b702b106SAdrian Hunter 369b702b106SAdrian Hunter static inline void omap_hsmmc_reg_put(struct omap_hsmmc_host *host) 370b702b106SAdrian Hunter { 371b702b106SAdrian Hunter } 372b702b106SAdrian Hunter 373b702b106SAdrian Hunter static inline int omap_hsmmc_have_reg(void) 374b702b106SAdrian Hunter { 375b702b106SAdrian Hunter return 0; 376b702b106SAdrian Hunter } 377b702b106SAdrian Hunter 378b702b106SAdrian Hunter #endif 379b702b106SAdrian Hunter 380b702b106SAdrian Hunter static int omap_hsmmc_gpio_init(struct omap_mmc_platform_data *pdata) 381b702b106SAdrian Hunter { 382b702b106SAdrian Hunter int ret; 383b702b106SAdrian Hunter 384b702b106SAdrian Hunter if (gpio_is_valid(pdata->slots[0].switch_pin)) { 385b702b106SAdrian Hunter if (pdata->slots[0].cover) 386b702b106SAdrian Hunter pdata->slots[0].get_cover_state = 387b702b106SAdrian Hunter omap_hsmmc_get_cover_state; 388b702b106SAdrian Hunter else 389b702b106SAdrian Hunter pdata->slots[0].card_detect = omap_hsmmc_card_detect; 390b702b106SAdrian Hunter pdata->slots[0].card_detect_irq = 391b702b106SAdrian Hunter gpio_to_irq(pdata->slots[0].switch_pin); 392b702b106SAdrian Hunter ret = gpio_request(pdata->slots[0].switch_pin, "mmc_cd"); 393b702b106SAdrian Hunter if (ret) 394b702b106SAdrian Hunter return ret; 395b702b106SAdrian Hunter ret = gpio_direction_input(pdata->slots[0].switch_pin); 396b702b106SAdrian Hunter if (ret) 397b702b106SAdrian Hunter goto err_free_sp; 398b702b106SAdrian Hunter } else 399b702b106SAdrian Hunter pdata->slots[0].switch_pin = -EINVAL; 400b702b106SAdrian Hunter 401b702b106SAdrian Hunter if (gpio_is_valid(pdata->slots[0].gpio_wp)) { 402b702b106SAdrian Hunter pdata->slots[0].get_ro = omap_hsmmc_get_wp; 403b702b106SAdrian Hunter ret = gpio_request(pdata->slots[0].gpio_wp, "mmc_wp"); 404b702b106SAdrian Hunter if (ret) 405b702b106SAdrian Hunter goto err_free_cd; 406b702b106SAdrian Hunter ret = gpio_direction_input(pdata->slots[0].gpio_wp); 407b702b106SAdrian Hunter if (ret) 408b702b106SAdrian Hunter goto err_free_wp; 409b702b106SAdrian Hunter } else 410b702b106SAdrian Hunter pdata->slots[0].gpio_wp = -EINVAL; 411b702b106SAdrian Hunter 412b702b106SAdrian Hunter return 0; 413b702b106SAdrian Hunter 414b702b106SAdrian Hunter err_free_wp: 415b702b106SAdrian Hunter gpio_free(pdata->slots[0].gpio_wp); 416b702b106SAdrian Hunter err_free_cd: 417b702b106SAdrian Hunter if (gpio_is_valid(pdata->slots[0].switch_pin)) 418b702b106SAdrian Hunter err_free_sp: 419b702b106SAdrian Hunter gpio_free(pdata->slots[0].switch_pin); 420b702b106SAdrian Hunter return ret; 421b702b106SAdrian Hunter } 422b702b106SAdrian Hunter 423b702b106SAdrian Hunter static void omap_hsmmc_gpio_free(struct omap_mmc_platform_data *pdata) 424b702b106SAdrian Hunter { 425b702b106SAdrian Hunter if (gpio_is_valid(pdata->slots[0].gpio_wp)) 426b702b106SAdrian Hunter gpio_free(pdata->slots[0].gpio_wp); 427b702b106SAdrian Hunter if (gpio_is_valid(pdata->slots[0].switch_pin)) 428b702b106SAdrian Hunter gpio_free(pdata->slots[0].switch_pin); 429b702b106SAdrian Hunter } 430b702b106SAdrian Hunter 431a45c6cb8SMadhusudhan Chikkature /* 432e0c7f99bSAndy Shevchenko * Start clock to the card 433e0c7f99bSAndy Shevchenko */ 434e0c7f99bSAndy Shevchenko static void omap_hsmmc_start_clock(struct omap_hsmmc_host *host) 435e0c7f99bSAndy Shevchenko { 436e0c7f99bSAndy Shevchenko OMAP_HSMMC_WRITE(host->base, SYSCTL, 437e0c7f99bSAndy Shevchenko OMAP_HSMMC_READ(host->base, SYSCTL) | CEN); 438e0c7f99bSAndy Shevchenko } 439e0c7f99bSAndy Shevchenko 440e0c7f99bSAndy Shevchenko /* 441a45c6cb8SMadhusudhan Chikkature * Stop clock to the card 442a45c6cb8SMadhusudhan Chikkature */ 44370a3341aSDenis Karpov static void omap_hsmmc_stop_clock(struct omap_hsmmc_host *host) 444a45c6cb8SMadhusudhan Chikkature { 445a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, 446a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, SYSCTL) & ~CEN); 447a45c6cb8SMadhusudhan Chikkature if ((OMAP_HSMMC_READ(host->base, SYSCTL) & CEN) != 0x0) 448a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "MMC Clock is not stoped\n"); 449a45c6cb8SMadhusudhan Chikkature } 450a45c6cb8SMadhusudhan Chikkature 45193caf8e6SAdrian Hunter static void omap_hsmmc_enable_irq(struct omap_hsmmc_host *host, 45293caf8e6SAdrian Hunter struct mmc_command *cmd) 453b417577dSAdrian Hunter { 454b417577dSAdrian Hunter unsigned int irq_mask; 455b417577dSAdrian Hunter 456b417577dSAdrian Hunter if (host->use_dma) 457b417577dSAdrian Hunter irq_mask = INT_EN_MASK & ~(BRR_ENABLE | BWR_ENABLE); 458b417577dSAdrian Hunter else 459b417577dSAdrian Hunter irq_mask = INT_EN_MASK; 460b417577dSAdrian Hunter 46193caf8e6SAdrian Hunter /* Disable timeout for erases */ 46293caf8e6SAdrian Hunter if (cmd->opcode == MMC_ERASE) 46393caf8e6SAdrian Hunter irq_mask &= ~DTO_ENABLE; 46493caf8e6SAdrian Hunter 465b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); 466b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, ISE, irq_mask); 467b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, IE, irq_mask); 468b417577dSAdrian Hunter } 469b417577dSAdrian Hunter 470b417577dSAdrian Hunter static void omap_hsmmc_disable_irq(struct omap_hsmmc_host *host) 471b417577dSAdrian Hunter { 472b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, ISE, 0); 473b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, IE, 0); 474b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); 475b417577dSAdrian Hunter } 476b417577dSAdrian Hunter 477ac330f44SAndy Shevchenko /* Calculate divisor for the given clock frequency */ 478d83b6e03SBalaji TK static u16 calc_divisor(struct omap_hsmmc_host *host, struct mmc_ios *ios) 479ac330f44SAndy Shevchenko { 480ac330f44SAndy Shevchenko u16 dsor = 0; 481ac330f44SAndy Shevchenko 482ac330f44SAndy Shevchenko if (ios->clock) { 483d83b6e03SBalaji TK dsor = DIV_ROUND_UP(clk_get_rate(host->fclk), ios->clock); 484ac330f44SAndy Shevchenko if (dsor > 250) 485ac330f44SAndy Shevchenko dsor = 250; 486ac330f44SAndy Shevchenko } 487ac330f44SAndy Shevchenko 488ac330f44SAndy Shevchenko return dsor; 489ac330f44SAndy Shevchenko } 490ac330f44SAndy Shevchenko 4915934df2fSAndy Shevchenko static void omap_hsmmc_set_clock(struct omap_hsmmc_host *host) 4925934df2fSAndy Shevchenko { 4935934df2fSAndy Shevchenko struct mmc_ios *ios = &host->mmc->ios; 4945934df2fSAndy Shevchenko unsigned long regval; 4955934df2fSAndy Shevchenko unsigned long timeout; 4965934df2fSAndy Shevchenko 4975934df2fSAndy Shevchenko dev_dbg(mmc_dev(host->mmc), "Set clock to %uHz\n", ios->clock); 4985934df2fSAndy Shevchenko 4995934df2fSAndy Shevchenko omap_hsmmc_stop_clock(host); 5005934df2fSAndy Shevchenko 5015934df2fSAndy Shevchenko regval = OMAP_HSMMC_READ(host->base, SYSCTL); 5025934df2fSAndy Shevchenko regval = regval & ~(CLKD_MASK | DTO_MASK); 503d83b6e03SBalaji TK regval = regval | (calc_divisor(host, ios) << 6) | (DTO << 16); 5045934df2fSAndy Shevchenko OMAP_HSMMC_WRITE(host->base, SYSCTL, regval); 5055934df2fSAndy Shevchenko OMAP_HSMMC_WRITE(host->base, SYSCTL, 5065934df2fSAndy Shevchenko OMAP_HSMMC_READ(host->base, SYSCTL) | ICE); 5075934df2fSAndy Shevchenko 5085934df2fSAndy Shevchenko /* Wait till the ICS bit is set */ 5095934df2fSAndy Shevchenko timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 5105934df2fSAndy Shevchenko while ((OMAP_HSMMC_READ(host->base, SYSCTL) & ICS) != ICS 5115934df2fSAndy Shevchenko && time_before(jiffies, timeout)) 5125934df2fSAndy Shevchenko cpu_relax(); 5135934df2fSAndy Shevchenko 5145934df2fSAndy Shevchenko omap_hsmmc_start_clock(host); 5155934df2fSAndy Shevchenko } 5165934df2fSAndy Shevchenko 5173796fb8aSAndy Shevchenko static void omap_hsmmc_set_bus_width(struct omap_hsmmc_host *host) 5183796fb8aSAndy Shevchenko { 5193796fb8aSAndy Shevchenko struct mmc_ios *ios = &host->mmc->ios; 5203796fb8aSAndy Shevchenko u32 con; 5213796fb8aSAndy Shevchenko 5223796fb8aSAndy Shevchenko con = OMAP_HSMMC_READ(host->base, CON); 5233796fb8aSAndy Shevchenko switch (ios->bus_width) { 5243796fb8aSAndy Shevchenko case MMC_BUS_WIDTH_8: 5253796fb8aSAndy Shevchenko OMAP_HSMMC_WRITE(host->base, CON, con | DW8); 5263796fb8aSAndy Shevchenko break; 5273796fb8aSAndy Shevchenko case MMC_BUS_WIDTH_4: 5283796fb8aSAndy Shevchenko OMAP_HSMMC_WRITE(host->base, CON, con & ~DW8); 5293796fb8aSAndy Shevchenko OMAP_HSMMC_WRITE(host->base, HCTL, 5303796fb8aSAndy Shevchenko OMAP_HSMMC_READ(host->base, HCTL) | FOUR_BIT); 5313796fb8aSAndy Shevchenko break; 5323796fb8aSAndy Shevchenko case MMC_BUS_WIDTH_1: 5333796fb8aSAndy Shevchenko OMAP_HSMMC_WRITE(host->base, CON, con & ~DW8); 5343796fb8aSAndy Shevchenko OMAP_HSMMC_WRITE(host->base, HCTL, 5353796fb8aSAndy Shevchenko OMAP_HSMMC_READ(host->base, HCTL) & ~FOUR_BIT); 5363796fb8aSAndy Shevchenko break; 5373796fb8aSAndy Shevchenko } 5383796fb8aSAndy Shevchenko } 5393796fb8aSAndy Shevchenko 5403796fb8aSAndy Shevchenko static void omap_hsmmc_set_bus_mode(struct omap_hsmmc_host *host) 5413796fb8aSAndy Shevchenko { 5423796fb8aSAndy Shevchenko struct mmc_ios *ios = &host->mmc->ios; 5433796fb8aSAndy Shevchenko u32 con; 5443796fb8aSAndy Shevchenko 5453796fb8aSAndy Shevchenko con = OMAP_HSMMC_READ(host->base, CON); 5463796fb8aSAndy Shevchenko if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN) 5473796fb8aSAndy Shevchenko OMAP_HSMMC_WRITE(host->base, CON, con | OD); 5483796fb8aSAndy Shevchenko else 5493796fb8aSAndy Shevchenko OMAP_HSMMC_WRITE(host->base, CON, con & ~OD); 5503796fb8aSAndy Shevchenko } 5513796fb8aSAndy Shevchenko 55211dd62a7SDenis Karpov #ifdef CONFIG_PM 55311dd62a7SDenis Karpov 55411dd62a7SDenis Karpov /* 55511dd62a7SDenis Karpov * Restore the MMC host context, if it was lost as result of a 55611dd62a7SDenis Karpov * power state change. 55711dd62a7SDenis Karpov */ 55870a3341aSDenis Karpov static int omap_hsmmc_context_restore(struct omap_hsmmc_host *host) 55911dd62a7SDenis Karpov { 56011dd62a7SDenis Karpov struct mmc_ios *ios = &host->mmc->ios; 56111dd62a7SDenis Karpov struct omap_mmc_platform_data *pdata = host->pdata; 56211dd62a7SDenis Karpov int context_loss = 0; 5633796fb8aSAndy Shevchenko u32 hctl, capa; 56411dd62a7SDenis Karpov unsigned long timeout; 56511dd62a7SDenis Karpov 56611dd62a7SDenis Karpov if (pdata->get_context_loss_count) { 56711dd62a7SDenis Karpov context_loss = pdata->get_context_loss_count(host->dev); 56811dd62a7SDenis Karpov if (context_loss < 0) 56911dd62a7SDenis Karpov return 1; 57011dd62a7SDenis Karpov } 57111dd62a7SDenis Karpov 57211dd62a7SDenis Karpov dev_dbg(mmc_dev(host->mmc), "context was %slost\n", 57311dd62a7SDenis Karpov context_loss == host->context_loss ? "not " : ""); 57411dd62a7SDenis Karpov if (host->context_loss == context_loss) 57511dd62a7SDenis Karpov return 1; 57611dd62a7SDenis Karpov 57711dd62a7SDenis Karpov /* Wait for hardware reset */ 57811dd62a7SDenis Karpov timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 57911dd62a7SDenis Karpov while ((OMAP_HSMMC_READ(host->base, SYSSTATUS) & RESETDONE) != RESETDONE 58011dd62a7SDenis Karpov && time_before(jiffies, timeout)) 58111dd62a7SDenis Karpov ; 58211dd62a7SDenis Karpov 58311dd62a7SDenis Karpov /* Do software reset */ 58411dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, SYSCONFIG, SOFTRESET); 58511dd62a7SDenis Karpov timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 58611dd62a7SDenis Karpov while ((OMAP_HSMMC_READ(host->base, SYSSTATUS) & RESETDONE) != RESETDONE 58711dd62a7SDenis Karpov && time_before(jiffies, timeout)) 58811dd62a7SDenis Karpov ; 58911dd62a7SDenis Karpov 59011dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, SYSCONFIG, 59111dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCONFIG) | AUTOIDLE); 59211dd62a7SDenis Karpov 593c2200efbSBalaji T K if (host->pdata->controller_flags & OMAP_HSMMC_SUPPORTS_DUAL_VOLT) { 59411dd62a7SDenis Karpov if (host->power_mode != MMC_POWER_OFF && 59511dd62a7SDenis Karpov (1 << ios->vdd) <= MMC_VDD_23_24) 59611dd62a7SDenis Karpov hctl = SDVS18; 59711dd62a7SDenis Karpov else 59811dd62a7SDenis Karpov hctl = SDVS30; 59911dd62a7SDenis Karpov capa = VS30 | VS18; 60011dd62a7SDenis Karpov } else { 60111dd62a7SDenis Karpov hctl = SDVS18; 60211dd62a7SDenis Karpov capa = VS18; 60311dd62a7SDenis Karpov } 60411dd62a7SDenis Karpov 60511dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, HCTL, 60611dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, HCTL) | hctl); 60711dd62a7SDenis Karpov 60811dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, CAPA, 60911dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, CAPA) | capa); 61011dd62a7SDenis Karpov 61111dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, HCTL, 61211dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, HCTL) | SDBP); 61311dd62a7SDenis Karpov 61411dd62a7SDenis Karpov timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 61511dd62a7SDenis Karpov while ((OMAP_HSMMC_READ(host->base, HCTL) & SDBP) != SDBP 61611dd62a7SDenis Karpov && time_before(jiffies, timeout)) 61711dd62a7SDenis Karpov ; 61811dd62a7SDenis Karpov 619b417577dSAdrian Hunter omap_hsmmc_disable_irq(host); 62011dd62a7SDenis Karpov 62111dd62a7SDenis Karpov /* Do not initialize card-specific things if the power is off */ 62211dd62a7SDenis Karpov if (host->power_mode == MMC_POWER_OFF) 62311dd62a7SDenis Karpov goto out; 62411dd62a7SDenis Karpov 6253796fb8aSAndy Shevchenko omap_hsmmc_set_bus_width(host); 62611dd62a7SDenis Karpov 6275934df2fSAndy Shevchenko omap_hsmmc_set_clock(host); 62811dd62a7SDenis Karpov 6293796fb8aSAndy Shevchenko omap_hsmmc_set_bus_mode(host); 6303796fb8aSAndy Shevchenko 63111dd62a7SDenis Karpov out: 63211dd62a7SDenis Karpov host->context_loss = context_loss; 63311dd62a7SDenis Karpov 63411dd62a7SDenis Karpov dev_dbg(mmc_dev(host->mmc), "context is restored\n"); 63511dd62a7SDenis Karpov return 0; 63611dd62a7SDenis Karpov } 63711dd62a7SDenis Karpov 63811dd62a7SDenis Karpov /* 63911dd62a7SDenis Karpov * Save the MMC host context (store the number of power state changes so far). 64011dd62a7SDenis Karpov */ 64170a3341aSDenis Karpov static void omap_hsmmc_context_save(struct omap_hsmmc_host *host) 64211dd62a7SDenis Karpov { 64311dd62a7SDenis Karpov struct omap_mmc_platform_data *pdata = host->pdata; 64411dd62a7SDenis Karpov int context_loss; 64511dd62a7SDenis Karpov 64611dd62a7SDenis Karpov if (pdata->get_context_loss_count) { 64711dd62a7SDenis Karpov context_loss = pdata->get_context_loss_count(host->dev); 64811dd62a7SDenis Karpov if (context_loss < 0) 64911dd62a7SDenis Karpov return; 65011dd62a7SDenis Karpov host->context_loss = context_loss; 65111dd62a7SDenis Karpov } 65211dd62a7SDenis Karpov } 65311dd62a7SDenis Karpov 65411dd62a7SDenis Karpov #else 65511dd62a7SDenis Karpov 65670a3341aSDenis Karpov static int omap_hsmmc_context_restore(struct omap_hsmmc_host *host) 65711dd62a7SDenis Karpov { 65811dd62a7SDenis Karpov return 0; 65911dd62a7SDenis Karpov } 66011dd62a7SDenis Karpov 66170a3341aSDenis Karpov static void omap_hsmmc_context_save(struct omap_hsmmc_host *host) 66211dd62a7SDenis Karpov { 66311dd62a7SDenis Karpov } 66411dd62a7SDenis Karpov 66511dd62a7SDenis Karpov #endif 66611dd62a7SDenis Karpov 667a45c6cb8SMadhusudhan Chikkature /* 668a45c6cb8SMadhusudhan Chikkature * Send init stream sequence to card 669a45c6cb8SMadhusudhan Chikkature * before sending IDLE command 670a45c6cb8SMadhusudhan Chikkature */ 67170a3341aSDenis Karpov static void send_init_stream(struct omap_hsmmc_host *host) 672a45c6cb8SMadhusudhan Chikkature { 673a45c6cb8SMadhusudhan Chikkature int reg = 0; 674a45c6cb8SMadhusudhan Chikkature unsigned long timeout; 675a45c6cb8SMadhusudhan Chikkature 676b62f6228SAdrian Hunter if (host->protect_card) 677b62f6228SAdrian Hunter return; 678b62f6228SAdrian Hunter 679a45c6cb8SMadhusudhan Chikkature disable_irq(host->irq); 680b417577dSAdrian Hunter 681b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK); 682a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CON, 683a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, CON) | INIT_STREAM); 684a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CMD, INIT_STREAM_CMD); 685a45c6cb8SMadhusudhan Chikkature 686a45c6cb8SMadhusudhan Chikkature timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 687a45c6cb8SMadhusudhan Chikkature while ((reg != CC) && time_before(jiffies, timeout)) 688a45c6cb8SMadhusudhan Chikkature reg = OMAP_HSMMC_READ(host->base, STAT) & CC; 689a45c6cb8SMadhusudhan Chikkature 690a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CON, 691a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, CON) & ~INIT_STREAM); 692c653a6d4SAdrian Hunter 693c653a6d4SAdrian Hunter OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); 694c653a6d4SAdrian Hunter OMAP_HSMMC_READ(host->base, STAT); 695c653a6d4SAdrian Hunter 696a45c6cb8SMadhusudhan Chikkature enable_irq(host->irq); 697a45c6cb8SMadhusudhan Chikkature } 698a45c6cb8SMadhusudhan Chikkature 699a45c6cb8SMadhusudhan Chikkature static inline 70070a3341aSDenis Karpov int omap_hsmmc_cover_is_closed(struct omap_hsmmc_host *host) 701a45c6cb8SMadhusudhan Chikkature { 702a45c6cb8SMadhusudhan Chikkature int r = 1; 703a45c6cb8SMadhusudhan Chikkature 704191d1f1dSDenis Karpov if (mmc_slot(host).get_cover_state) 705191d1f1dSDenis Karpov r = mmc_slot(host).get_cover_state(host->dev, host->slot_id); 706a45c6cb8SMadhusudhan Chikkature return r; 707a45c6cb8SMadhusudhan Chikkature } 708a45c6cb8SMadhusudhan Chikkature 709a45c6cb8SMadhusudhan Chikkature static ssize_t 71070a3341aSDenis Karpov omap_hsmmc_show_cover_switch(struct device *dev, struct device_attribute *attr, 711a45c6cb8SMadhusudhan Chikkature char *buf) 712a45c6cb8SMadhusudhan Chikkature { 713a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev); 71470a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 715a45c6cb8SMadhusudhan Chikkature 71670a3341aSDenis Karpov return sprintf(buf, "%s\n", 71770a3341aSDenis Karpov omap_hsmmc_cover_is_closed(host) ? "closed" : "open"); 718a45c6cb8SMadhusudhan Chikkature } 719a45c6cb8SMadhusudhan Chikkature 72070a3341aSDenis Karpov static DEVICE_ATTR(cover_switch, S_IRUGO, omap_hsmmc_show_cover_switch, NULL); 721a45c6cb8SMadhusudhan Chikkature 722a45c6cb8SMadhusudhan Chikkature static ssize_t 72370a3341aSDenis Karpov omap_hsmmc_show_slot_name(struct device *dev, struct device_attribute *attr, 724a45c6cb8SMadhusudhan Chikkature char *buf) 725a45c6cb8SMadhusudhan Chikkature { 726a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev); 72770a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 728a45c6cb8SMadhusudhan Chikkature 729191d1f1dSDenis Karpov return sprintf(buf, "%s\n", mmc_slot(host).name); 730a45c6cb8SMadhusudhan Chikkature } 731a45c6cb8SMadhusudhan Chikkature 73270a3341aSDenis Karpov static DEVICE_ATTR(slot_name, S_IRUGO, omap_hsmmc_show_slot_name, NULL); 733a45c6cb8SMadhusudhan Chikkature 734a45c6cb8SMadhusudhan Chikkature /* 735a45c6cb8SMadhusudhan Chikkature * Configure the response type and send the cmd. 736a45c6cb8SMadhusudhan Chikkature */ 737a45c6cb8SMadhusudhan Chikkature static void 73870a3341aSDenis Karpov omap_hsmmc_start_command(struct omap_hsmmc_host *host, struct mmc_command *cmd, 739a45c6cb8SMadhusudhan Chikkature struct mmc_data *data) 740a45c6cb8SMadhusudhan Chikkature { 741a45c6cb8SMadhusudhan Chikkature int cmdreg = 0, resptype = 0, cmdtype = 0; 742a45c6cb8SMadhusudhan Chikkature 743a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "%s: CMD%d, argument 0x%08x\n", 744a45c6cb8SMadhusudhan Chikkature mmc_hostname(host->mmc), cmd->opcode, cmd->arg); 745a45c6cb8SMadhusudhan Chikkature host->cmd = cmd; 746a45c6cb8SMadhusudhan Chikkature 74793caf8e6SAdrian Hunter omap_hsmmc_enable_irq(host, cmd); 748a45c6cb8SMadhusudhan Chikkature 7494a694dc9SAdrian Hunter host->response_busy = 0; 750a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_PRESENT) { 751a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_136) 752a45c6cb8SMadhusudhan Chikkature resptype = 1; 7534a694dc9SAdrian Hunter else if (cmd->flags & MMC_RSP_BUSY) { 7544a694dc9SAdrian Hunter resptype = 3; 7554a694dc9SAdrian Hunter host->response_busy = 1; 7564a694dc9SAdrian Hunter } else 757a45c6cb8SMadhusudhan Chikkature resptype = 2; 758a45c6cb8SMadhusudhan Chikkature } 759a45c6cb8SMadhusudhan Chikkature 760a45c6cb8SMadhusudhan Chikkature /* 761a45c6cb8SMadhusudhan Chikkature * Unlike OMAP1 controller, the cmdtype does not seem to be based on 762a45c6cb8SMadhusudhan Chikkature * ac, bc, adtc, bcr. Only commands ending an open ended transfer need 763a45c6cb8SMadhusudhan Chikkature * a val of 0x3, rest 0x0. 764a45c6cb8SMadhusudhan Chikkature */ 765a45c6cb8SMadhusudhan Chikkature if (cmd == host->mrq->stop) 766a45c6cb8SMadhusudhan Chikkature cmdtype = 0x3; 767a45c6cb8SMadhusudhan Chikkature 768a45c6cb8SMadhusudhan Chikkature cmdreg = (cmd->opcode << 24) | (resptype << 16) | (cmdtype << 22); 769a45c6cb8SMadhusudhan Chikkature 770a45c6cb8SMadhusudhan Chikkature if (data) { 771a45c6cb8SMadhusudhan Chikkature cmdreg |= DP_SELECT | MSBS | BCE; 772a45c6cb8SMadhusudhan Chikkature if (data->flags & MMC_DATA_READ) 773a45c6cb8SMadhusudhan Chikkature cmdreg |= DDIR; 774a45c6cb8SMadhusudhan Chikkature else 775a45c6cb8SMadhusudhan Chikkature cmdreg &= ~(DDIR); 776a45c6cb8SMadhusudhan Chikkature } 777a45c6cb8SMadhusudhan Chikkature 778a45c6cb8SMadhusudhan Chikkature if (host->use_dma) 779a45c6cb8SMadhusudhan Chikkature cmdreg |= DMA_EN; 780a45c6cb8SMadhusudhan Chikkature 781b417577dSAdrian Hunter host->req_in_progress = 1; 7824dffd7a2SAdrian Hunter 783a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, ARG, cmd->arg); 784a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CMD, cmdreg); 785a45c6cb8SMadhusudhan Chikkature } 786a45c6cb8SMadhusudhan Chikkature 7870ccd76d4SJuha Yrjola static int 78870a3341aSDenis Karpov omap_hsmmc_get_dma_dir(struct omap_hsmmc_host *host, struct mmc_data *data) 7890ccd76d4SJuha Yrjola { 7900ccd76d4SJuha Yrjola if (data->flags & MMC_DATA_WRITE) 7910ccd76d4SJuha Yrjola return DMA_TO_DEVICE; 7920ccd76d4SJuha Yrjola else 7930ccd76d4SJuha Yrjola return DMA_FROM_DEVICE; 7940ccd76d4SJuha Yrjola } 7950ccd76d4SJuha Yrjola 796b417577dSAdrian Hunter static void omap_hsmmc_request_done(struct omap_hsmmc_host *host, struct mmc_request *mrq) 797b417577dSAdrian Hunter { 798b417577dSAdrian Hunter int dma_ch; 799b417577dSAdrian Hunter 800b417577dSAdrian Hunter spin_lock(&host->irq_lock); 801b417577dSAdrian Hunter host->req_in_progress = 0; 802b417577dSAdrian Hunter dma_ch = host->dma_ch; 803b417577dSAdrian Hunter spin_unlock(&host->irq_lock); 804b417577dSAdrian Hunter 805b417577dSAdrian Hunter omap_hsmmc_disable_irq(host); 806b417577dSAdrian Hunter /* Do not complete the request if DMA is still in progress */ 807b417577dSAdrian Hunter if (mrq->data && host->use_dma && dma_ch != -1) 808b417577dSAdrian Hunter return; 809b417577dSAdrian Hunter host->mrq = NULL; 810b417577dSAdrian Hunter mmc_request_done(host->mmc, mrq); 811b417577dSAdrian Hunter } 812b417577dSAdrian Hunter 813a45c6cb8SMadhusudhan Chikkature /* 814a45c6cb8SMadhusudhan Chikkature * Notify the transfer complete to MMC core 815a45c6cb8SMadhusudhan Chikkature */ 816a45c6cb8SMadhusudhan Chikkature static void 81770a3341aSDenis Karpov omap_hsmmc_xfer_done(struct omap_hsmmc_host *host, struct mmc_data *data) 818a45c6cb8SMadhusudhan Chikkature { 8194a694dc9SAdrian Hunter if (!data) { 8204a694dc9SAdrian Hunter struct mmc_request *mrq = host->mrq; 8214a694dc9SAdrian Hunter 82223050103SAdrian Hunter /* TC before CC from CMD6 - don't know why, but it happens */ 82323050103SAdrian Hunter if (host->cmd && host->cmd->opcode == 6 && 82423050103SAdrian Hunter host->response_busy) { 82523050103SAdrian Hunter host->response_busy = 0; 82623050103SAdrian Hunter return; 82723050103SAdrian Hunter } 82823050103SAdrian Hunter 829b417577dSAdrian Hunter omap_hsmmc_request_done(host, mrq); 8304a694dc9SAdrian Hunter return; 8314a694dc9SAdrian Hunter } 8324a694dc9SAdrian Hunter 833a45c6cb8SMadhusudhan Chikkature host->data = NULL; 834a45c6cb8SMadhusudhan Chikkature 835a45c6cb8SMadhusudhan Chikkature if (!data->error) 836a45c6cb8SMadhusudhan Chikkature data->bytes_xfered += data->blocks * (data->blksz); 837a45c6cb8SMadhusudhan Chikkature else 838a45c6cb8SMadhusudhan Chikkature data->bytes_xfered = 0; 839a45c6cb8SMadhusudhan Chikkature 840a45c6cb8SMadhusudhan Chikkature if (!data->stop) { 841b417577dSAdrian Hunter omap_hsmmc_request_done(host, data->mrq); 842a45c6cb8SMadhusudhan Chikkature return; 843a45c6cb8SMadhusudhan Chikkature } 84470a3341aSDenis Karpov omap_hsmmc_start_command(host, data->stop, NULL); 845a45c6cb8SMadhusudhan Chikkature } 846a45c6cb8SMadhusudhan Chikkature 847a45c6cb8SMadhusudhan Chikkature /* 848a45c6cb8SMadhusudhan Chikkature * Notify the core about command completion 849a45c6cb8SMadhusudhan Chikkature */ 850a45c6cb8SMadhusudhan Chikkature static void 85170a3341aSDenis Karpov omap_hsmmc_cmd_done(struct omap_hsmmc_host *host, struct mmc_command *cmd) 852a45c6cb8SMadhusudhan Chikkature { 853a45c6cb8SMadhusudhan Chikkature host->cmd = NULL; 854a45c6cb8SMadhusudhan Chikkature 855a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_PRESENT) { 856a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_136) { 857a45c6cb8SMadhusudhan Chikkature /* response type 2 */ 858a45c6cb8SMadhusudhan Chikkature cmd->resp[3] = OMAP_HSMMC_READ(host->base, RSP10); 859a45c6cb8SMadhusudhan Chikkature cmd->resp[2] = OMAP_HSMMC_READ(host->base, RSP32); 860a45c6cb8SMadhusudhan Chikkature cmd->resp[1] = OMAP_HSMMC_READ(host->base, RSP54); 861a45c6cb8SMadhusudhan Chikkature cmd->resp[0] = OMAP_HSMMC_READ(host->base, RSP76); 862a45c6cb8SMadhusudhan Chikkature } else { 863a45c6cb8SMadhusudhan Chikkature /* response types 1, 1b, 3, 4, 5, 6 */ 864a45c6cb8SMadhusudhan Chikkature cmd->resp[0] = OMAP_HSMMC_READ(host->base, RSP10); 865a45c6cb8SMadhusudhan Chikkature } 866a45c6cb8SMadhusudhan Chikkature } 867b417577dSAdrian Hunter if ((host->data == NULL && !host->response_busy) || cmd->error) 868b417577dSAdrian Hunter omap_hsmmc_request_done(host, cmd->mrq); 869a45c6cb8SMadhusudhan Chikkature } 870a45c6cb8SMadhusudhan Chikkature 871a45c6cb8SMadhusudhan Chikkature /* 872a45c6cb8SMadhusudhan Chikkature * DMA clean up for command errors 873a45c6cb8SMadhusudhan Chikkature */ 87470a3341aSDenis Karpov static void omap_hsmmc_dma_cleanup(struct omap_hsmmc_host *host, int errno) 875a45c6cb8SMadhusudhan Chikkature { 876b417577dSAdrian Hunter int dma_ch; 877b417577dSAdrian Hunter 87882788ff5SJarkko Lavinen host->data->error = errno; 879a45c6cb8SMadhusudhan Chikkature 880b417577dSAdrian Hunter spin_lock(&host->irq_lock); 881b417577dSAdrian Hunter dma_ch = host->dma_ch; 882b417577dSAdrian Hunter host->dma_ch = -1; 883b417577dSAdrian Hunter spin_unlock(&host->irq_lock); 884b417577dSAdrian Hunter 885b417577dSAdrian Hunter if (host->use_dma && dma_ch != -1) { 886a9120c33SPer Forlin dma_unmap_sg(mmc_dev(host->mmc), host->data->sg, 887a9120c33SPer Forlin host->data->sg_len, 88870a3341aSDenis Karpov omap_hsmmc_get_dma_dir(host, host->data)); 889b417577dSAdrian Hunter omap_free_dma(dma_ch); 890053bf34fSPer Forlin host->data->host_cookie = 0; 891a45c6cb8SMadhusudhan Chikkature } 892a45c6cb8SMadhusudhan Chikkature host->data = NULL; 893a45c6cb8SMadhusudhan Chikkature } 894a45c6cb8SMadhusudhan Chikkature 895a45c6cb8SMadhusudhan Chikkature /* 896a45c6cb8SMadhusudhan Chikkature * Readable error output 897a45c6cb8SMadhusudhan Chikkature */ 898a45c6cb8SMadhusudhan Chikkature #ifdef CONFIG_MMC_DEBUG 899699b958bSAdrian Hunter static void omap_hsmmc_dbg_report_irq(struct omap_hsmmc_host *host, u32 status) 900a45c6cb8SMadhusudhan Chikkature { 901a45c6cb8SMadhusudhan Chikkature /* --- means reserved bit without definition at documentation */ 90270a3341aSDenis Karpov static const char *omap_hsmmc_status_bits[] = { 903699b958bSAdrian Hunter "CC" , "TC" , "BGE", "---", "BWR" , "BRR" , "---" , "---" , 904699b958bSAdrian Hunter "CIRQ", "OBI" , "---", "---", "---" , "---" , "---" , "ERRI", 905699b958bSAdrian Hunter "CTO" , "CCRC", "CEB", "CIE", "DTO" , "DCRC", "DEB" , "---" , 906699b958bSAdrian Hunter "ACE" , "---" , "---", "---", "CERR", "BADA", "---" , "---" 907a45c6cb8SMadhusudhan Chikkature }; 908a45c6cb8SMadhusudhan Chikkature char res[256]; 909a45c6cb8SMadhusudhan Chikkature char *buf = res; 910a45c6cb8SMadhusudhan Chikkature int len, i; 911a45c6cb8SMadhusudhan Chikkature 912a45c6cb8SMadhusudhan Chikkature len = sprintf(buf, "MMC IRQ 0x%x :", status); 913a45c6cb8SMadhusudhan Chikkature buf += len; 914a45c6cb8SMadhusudhan Chikkature 91570a3341aSDenis Karpov for (i = 0; i < ARRAY_SIZE(omap_hsmmc_status_bits); i++) 916a45c6cb8SMadhusudhan Chikkature if (status & (1 << i)) { 91770a3341aSDenis Karpov len = sprintf(buf, " %s", omap_hsmmc_status_bits[i]); 918a45c6cb8SMadhusudhan Chikkature buf += len; 919a45c6cb8SMadhusudhan Chikkature } 920a45c6cb8SMadhusudhan Chikkature 921a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "%s\n", res); 922a45c6cb8SMadhusudhan Chikkature } 923699b958bSAdrian Hunter #else 924699b958bSAdrian Hunter static inline void omap_hsmmc_dbg_report_irq(struct omap_hsmmc_host *host, 925699b958bSAdrian Hunter u32 status) 926699b958bSAdrian Hunter { 927699b958bSAdrian Hunter } 928a45c6cb8SMadhusudhan Chikkature #endif /* CONFIG_MMC_DEBUG */ 929a45c6cb8SMadhusudhan Chikkature 9303ebf74b1SJean Pihet /* 9313ebf74b1SJean Pihet * MMC controller internal state machines reset 9323ebf74b1SJean Pihet * 9333ebf74b1SJean Pihet * Used to reset command or data internal state machines, using respectively 9343ebf74b1SJean Pihet * SRC or SRD bit of SYSCTL register 9353ebf74b1SJean Pihet * Can be called from interrupt context 9363ebf74b1SJean Pihet */ 93770a3341aSDenis Karpov static inline void omap_hsmmc_reset_controller_fsm(struct omap_hsmmc_host *host, 9383ebf74b1SJean Pihet unsigned long bit) 9393ebf74b1SJean Pihet { 9403ebf74b1SJean Pihet unsigned long i = 0; 9413ebf74b1SJean Pihet unsigned long limit = (loops_per_jiffy * 9423ebf74b1SJean Pihet msecs_to_jiffies(MMC_TIMEOUT_MS)); 9433ebf74b1SJean Pihet 9443ebf74b1SJean Pihet OMAP_HSMMC_WRITE(host->base, SYSCTL, 9453ebf74b1SJean Pihet OMAP_HSMMC_READ(host->base, SYSCTL) | bit); 9463ebf74b1SJean Pihet 94707ad64b6SMadhusudhan Chikkature /* 94807ad64b6SMadhusudhan Chikkature * OMAP4 ES2 and greater has an updated reset logic. 94907ad64b6SMadhusudhan Chikkature * Monitor a 0->1 transition first 95007ad64b6SMadhusudhan Chikkature */ 95107ad64b6SMadhusudhan Chikkature if (mmc_slot(host).features & HSMMC_HAS_UPDATED_RESET) { 952b432b4b3Skishore kadiyala while ((!(OMAP_HSMMC_READ(host->base, SYSCTL) & bit)) 95307ad64b6SMadhusudhan Chikkature && (i++ < limit)) 95407ad64b6SMadhusudhan Chikkature cpu_relax(); 95507ad64b6SMadhusudhan Chikkature } 95607ad64b6SMadhusudhan Chikkature i = 0; 95707ad64b6SMadhusudhan Chikkature 9583ebf74b1SJean Pihet while ((OMAP_HSMMC_READ(host->base, SYSCTL) & bit) && 9593ebf74b1SJean Pihet (i++ < limit)) 9603ebf74b1SJean Pihet cpu_relax(); 9613ebf74b1SJean Pihet 9623ebf74b1SJean Pihet if (OMAP_HSMMC_READ(host->base, SYSCTL) & bit) 9633ebf74b1SJean Pihet dev_err(mmc_dev(host->mmc), 9643ebf74b1SJean Pihet "Timeout waiting on controller reset in %s\n", 9653ebf74b1SJean Pihet __func__); 9663ebf74b1SJean Pihet } 967a45c6cb8SMadhusudhan Chikkature 968b417577dSAdrian Hunter static void omap_hsmmc_do_irq(struct omap_hsmmc_host *host, int status) 969a45c6cb8SMadhusudhan Chikkature { 970a45c6cb8SMadhusudhan Chikkature struct mmc_data *data; 971b417577dSAdrian Hunter int end_cmd = 0, end_trans = 0; 972a45c6cb8SMadhusudhan Chikkature 973b417577dSAdrian Hunter if (!host->req_in_progress) { 974b417577dSAdrian Hunter do { 975b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, STAT, status); 97600adadc1SKevin Hilman /* Flush posted write */ 977b417577dSAdrian Hunter status = OMAP_HSMMC_READ(host->base, STAT); 978b417577dSAdrian Hunter } while (status & INT_EN_MASK); 979b417577dSAdrian Hunter return; 980a45c6cb8SMadhusudhan Chikkature } 981a45c6cb8SMadhusudhan Chikkature 982a45c6cb8SMadhusudhan Chikkature data = host->data; 983a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "IRQ Status is %x\n", status); 984a45c6cb8SMadhusudhan Chikkature 985a45c6cb8SMadhusudhan Chikkature if (status & ERR) { 986699b958bSAdrian Hunter omap_hsmmc_dbg_report_irq(host, status); 987a45c6cb8SMadhusudhan Chikkature if ((status & CMD_TIMEOUT) || 988a45c6cb8SMadhusudhan Chikkature (status & CMD_CRC)) { 989a45c6cb8SMadhusudhan Chikkature if (host->cmd) { 990a45c6cb8SMadhusudhan Chikkature if (status & CMD_TIMEOUT) { 99170a3341aSDenis Karpov omap_hsmmc_reset_controller_fsm(host, 992191d1f1dSDenis Karpov SRC); 993a45c6cb8SMadhusudhan Chikkature host->cmd->error = -ETIMEDOUT; 994a45c6cb8SMadhusudhan Chikkature } else { 995a45c6cb8SMadhusudhan Chikkature host->cmd->error = -EILSEQ; 996a45c6cb8SMadhusudhan Chikkature } 997a45c6cb8SMadhusudhan Chikkature end_cmd = 1; 998a45c6cb8SMadhusudhan Chikkature } 9994a694dc9SAdrian Hunter if (host->data || host->response_busy) { 10004a694dc9SAdrian Hunter if (host->data) 100170a3341aSDenis Karpov omap_hsmmc_dma_cleanup(host, 100270a3341aSDenis Karpov -ETIMEDOUT); 10034a694dc9SAdrian Hunter host->response_busy = 0; 100470a3341aSDenis Karpov omap_hsmmc_reset_controller_fsm(host, SRD); 1005c232f457SJean Pihet } 1006a45c6cb8SMadhusudhan Chikkature } 1007a45c6cb8SMadhusudhan Chikkature if ((status & DATA_TIMEOUT) || 1008a45c6cb8SMadhusudhan Chikkature (status & DATA_CRC)) { 10094a694dc9SAdrian Hunter if (host->data || host->response_busy) { 10104a694dc9SAdrian Hunter int err = (status & DATA_TIMEOUT) ? 10114a694dc9SAdrian Hunter -ETIMEDOUT : -EILSEQ; 10124a694dc9SAdrian Hunter 10134a694dc9SAdrian Hunter if (host->data) 101470a3341aSDenis Karpov omap_hsmmc_dma_cleanup(host, err); 1015a45c6cb8SMadhusudhan Chikkature else 10164a694dc9SAdrian Hunter host->mrq->cmd->error = err; 10174a694dc9SAdrian Hunter host->response_busy = 0; 101870a3341aSDenis Karpov omap_hsmmc_reset_controller_fsm(host, SRD); 1019a45c6cb8SMadhusudhan Chikkature end_trans = 1; 1020a45c6cb8SMadhusudhan Chikkature } 1021a45c6cb8SMadhusudhan Chikkature } 1022a45c6cb8SMadhusudhan Chikkature if (status & CARD_ERR) { 1023a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1024a45c6cb8SMadhusudhan Chikkature "Ignoring card err CMD%d\n", host->cmd->opcode); 1025a45c6cb8SMadhusudhan Chikkature if (host->cmd) 1026a45c6cb8SMadhusudhan Chikkature end_cmd = 1; 1027a45c6cb8SMadhusudhan Chikkature if (host->data) 1028a45c6cb8SMadhusudhan Chikkature end_trans = 1; 1029a45c6cb8SMadhusudhan Chikkature } 1030a45c6cb8SMadhusudhan Chikkature } 1031a45c6cb8SMadhusudhan Chikkature 1032a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, STAT, status); 1033a45c6cb8SMadhusudhan Chikkature 1034a8fe29d8SJarkko Lavinen if (end_cmd || ((status & CC) && host->cmd)) 103570a3341aSDenis Karpov omap_hsmmc_cmd_done(host, host->cmd); 10360a40e647SJarkko Lavinen if ((end_trans || (status & TC)) && host->mrq) 103770a3341aSDenis Karpov omap_hsmmc_xfer_done(host, data); 1038b417577dSAdrian Hunter } 1039a45c6cb8SMadhusudhan Chikkature 1040b417577dSAdrian Hunter /* 1041b417577dSAdrian Hunter * MMC controller IRQ handler 1042b417577dSAdrian Hunter */ 1043b417577dSAdrian Hunter static irqreturn_t omap_hsmmc_irq(int irq, void *dev_id) 1044b417577dSAdrian Hunter { 1045b417577dSAdrian Hunter struct omap_hsmmc_host *host = dev_id; 1046b417577dSAdrian Hunter int status; 1047b417577dSAdrian Hunter 1048b417577dSAdrian Hunter status = OMAP_HSMMC_READ(host->base, STAT); 1049b417577dSAdrian Hunter do { 1050b417577dSAdrian Hunter omap_hsmmc_do_irq(host, status); 1051b417577dSAdrian Hunter /* Flush posted write */ 1052b417577dSAdrian Hunter status = OMAP_HSMMC_READ(host->base, STAT); 1053b417577dSAdrian Hunter } while (status & INT_EN_MASK); 10544dffd7a2SAdrian Hunter 1055a45c6cb8SMadhusudhan Chikkature return IRQ_HANDLED; 1056a45c6cb8SMadhusudhan Chikkature } 1057a45c6cb8SMadhusudhan Chikkature 105870a3341aSDenis Karpov static void set_sd_bus_power(struct omap_hsmmc_host *host) 1059e13bb300SAdrian Hunter { 1060e13bb300SAdrian Hunter unsigned long i; 1061e13bb300SAdrian Hunter 1062e13bb300SAdrian Hunter OMAP_HSMMC_WRITE(host->base, HCTL, 1063e13bb300SAdrian Hunter OMAP_HSMMC_READ(host->base, HCTL) | SDBP); 1064e13bb300SAdrian Hunter for (i = 0; i < loops_per_jiffy; i++) { 1065e13bb300SAdrian Hunter if (OMAP_HSMMC_READ(host->base, HCTL) & SDBP) 1066e13bb300SAdrian Hunter break; 1067e13bb300SAdrian Hunter cpu_relax(); 1068e13bb300SAdrian Hunter } 1069e13bb300SAdrian Hunter } 1070e13bb300SAdrian Hunter 1071a45c6cb8SMadhusudhan Chikkature /* 1072eb250826SDavid Brownell * Switch MMC interface voltage ... only relevant for MMC1. 1073eb250826SDavid Brownell * 1074eb250826SDavid Brownell * MMC2 and MMC3 use fixed 1.8V levels, and maybe a transceiver. 1075eb250826SDavid Brownell * The MMC2 transceiver controls are used instead of DAT4..DAT7. 1076eb250826SDavid Brownell * Some chips, like eMMC ones, use internal transceivers. 1077a45c6cb8SMadhusudhan Chikkature */ 107870a3341aSDenis Karpov static int omap_hsmmc_switch_opcond(struct omap_hsmmc_host *host, int vdd) 1079a45c6cb8SMadhusudhan Chikkature { 1080a45c6cb8SMadhusudhan Chikkature u32 reg_val = 0; 1081a45c6cb8SMadhusudhan Chikkature int ret; 1082a45c6cb8SMadhusudhan Chikkature 1083a45c6cb8SMadhusudhan Chikkature /* Disable the clocks */ 1084fa4aa2d4SBalaji T K pm_runtime_put_sync(host->dev); 10852bec0893SAdrian Hunter if (host->got_dbclk) 1086a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 1087a45c6cb8SMadhusudhan Chikkature 1088a45c6cb8SMadhusudhan Chikkature /* Turn the power off */ 1089a45c6cb8SMadhusudhan Chikkature ret = mmc_slot(host).set_power(host->dev, host->slot_id, 0, 0); 1090a45c6cb8SMadhusudhan Chikkature 1091a45c6cb8SMadhusudhan Chikkature /* Turn the power ON with given VDD 1.8 or 3.0v */ 10922bec0893SAdrian Hunter if (!ret) 10932bec0893SAdrian Hunter ret = mmc_slot(host).set_power(host->dev, host->slot_id, 1, 10942bec0893SAdrian Hunter vdd); 1095fa4aa2d4SBalaji T K pm_runtime_get_sync(host->dev); 10962bec0893SAdrian Hunter if (host->got_dbclk) 10972bec0893SAdrian Hunter clk_enable(host->dbclk); 10982bec0893SAdrian Hunter 1099a45c6cb8SMadhusudhan Chikkature if (ret != 0) 1100a45c6cb8SMadhusudhan Chikkature goto err; 1101a45c6cb8SMadhusudhan Chikkature 1102a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 1103a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) & SDVSCLR); 1104a45c6cb8SMadhusudhan Chikkature reg_val = OMAP_HSMMC_READ(host->base, HCTL); 1105eb250826SDavid Brownell 1106a45c6cb8SMadhusudhan Chikkature /* 1107a45c6cb8SMadhusudhan Chikkature * If a MMC dual voltage card is detected, the set_ios fn calls 1108a45c6cb8SMadhusudhan Chikkature * this fn with VDD bit set for 1.8V. Upon card removal from the 110970a3341aSDenis Karpov * slot, omap_hsmmc_set_ios sets the VDD back to 3V on MMC_POWER_OFF. 1110a45c6cb8SMadhusudhan Chikkature * 1111eb250826SDavid Brownell * Cope with a bit of slop in the range ... per data sheets: 1112eb250826SDavid Brownell * - "1.8V" for vdds_mmc1/vdds_mmc1a can be up to 2.45V max, 1113eb250826SDavid Brownell * but recommended values are 1.71V to 1.89V 1114eb250826SDavid Brownell * - "3.0V" for vdds_mmc1/vdds_mmc1a can be up to 3.5V max, 1115eb250826SDavid Brownell * but recommended values are 2.7V to 3.3V 1116eb250826SDavid Brownell * 1117eb250826SDavid Brownell * Board setup code shouldn't permit anything very out-of-range. 1118eb250826SDavid Brownell * TWL4030-family VMMC1 and VSIM regulators are fine (avoiding the 1119eb250826SDavid Brownell * middle range) but VSIM can't power DAT4..DAT7 at more than 3V. 1120a45c6cb8SMadhusudhan Chikkature */ 1121eb250826SDavid Brownell if ((1 << vdd) <= MMC_VDD_23_24) 1122a45c6cb8SMadhusudhan Chikkature reg_val |= SDVS18; 1123eb250826SDavid Brownell else 1124eb250826SDavid Brownell reg_val |= SDVS30; 1125a45c6cb8SMadhusudhan Chikkature 1126a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, reg_val); 1127e13bb300SAdrian Hunter set_sd_bus_power(host); 1128a45c6cb8SMadhusudhan Chikkature 1129a45c6cb8SMadhusudhan Chikkature return 0; 1130a45c6cb8SMadhusudhan Chikkature err: 1131a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Unable to switch operating voltage\n"); 1132a45c6cb8SMadhusudhan Chikkature return ret; 1133a45c6cb8SMadhusudhan Chikkature } 1134a45c6cb8SMadhusudhan Chikkature 1135b62f6228SAdrian Hunter /* Protect the card while the cover is open */ 1136b62f6228SAdrian Hunter static void omap_hsmmc_protect_card(struct omap_hsmmc_host *host) 1137b62f6228SAdrian Hunter { 1138b62f6228SAdrian Hunter if (!mmc_slot(host).get_cover_state) 1139b62f6228SAdrian Hunter return; 1140b62f6228SAdrian Hunter 1141b62f6228SAdrian Hunter host->reqs_blocked = 0; 1142b62f6228SAdrian Hunter if (mmc_slot(host).get_cover_state(host->dev, host->slot_id)) { 1143b62f6228SAdrian Hunter if (host->protect_card) { 11442cecdf00SRajendra Nayak dev_info(host->dev, "%s: cover is closed, " 1145b62f6228SAdrian Hunter "card is now accessible\n", 1146b62f6228SAdrian Hunter mmc_hostname(host->mmc)); 1147b62f6228SAdrian Hunter host->protect_card = 0; 1148b62f6228SAdrian Hunter } 1149b62f6228SAdrian Hunter } else { 1150b62f6228SAdrian Hunter if (!host->protect_card) { 11512cecdf00SRajendra Nayak dev_info(host->dev, "%s: cover is open, " 1152b62f6228SAdrian Hunter "card is now inaccessible\n", 1153b62f6228SAdrian Hunter mmc_hostname(host->mmc)); 1154b62f6228SAdrian Hunter host->protect_card = 1; 1155b62f6228SAdrian Hunter } 1156b62f6228SAdrian Hunter } 1157b62f6228SAdrian Hunter } 1158b62f6228SAdrian Hunter 1159a45c6cb8SMadhusudhan Chikkature /* 11607efab4f3SNeilBrown * irq handler to notify the core about card insertion/removal 1161a45c6cb8SMadhusudhan Chikkature */ 11627efab4f3SNeilBrown static irqreturn_t omap_hsmmc_detect(int irq, void *dev_id) 1163a45c6cb8SMadhusudhan Chikkature { 11647efab4f3SNeilBrown struct omap_hsmmc_host *host = dev_id; 1165249d0fa9SDavid Brownell struct omap_mmc_slot_data *slot = &mmc_slot(host); 1166a6b2240dSAdrian Hunter int carddetect; 1167249d0fa9SDavid Brownell 1168a6b2240dSAdrian Hunter if (host->suspended) 11697efab4f3SNeilBrown return IRQ_HANDLED; 1170a45c6cb8SMadhusudhan Chikkature 1171a45c6cb8SMadhusudhan Chikkature sysfs_notify(&host->mmc->class_dev.kobj, NULL, "cover_switch"); 1172a6b2240dSAdrian Hunter 1173191d1f1dSDenis Karpov if (slot->card_detect) 1174db0fefc5SAdrian Hunter carddetect = slot->card_detect(host->dev, host->slot_id); 1175b62f6228SAdrian Hunter else { 1176b62f6228SAdrian Hunter omap_hsmmc_protect_card(host); 1177a6b2240dSAdrian Hunter carddetect = -ENOSYS; 1178b62f6228SAdrian Hunter } 1179a6b2240dSAdrian Hunter 1180cdeebaddSMadhusudhan Chikkature if (carddetect) 1181a45c6cb8SMadhusudhan Chikkature mmc_detect_change(host->mmc, (HZ * 200) / 1000); 1182cdeebaddSMadhusudhan Chikkature else 1183a45c6cb8SMadhusudhan Chikkature mmc_detect_change(host->mmc, (HZ * 50) / 1000); 1184a45c6cb8SMadhusudhan Chikkature return IRQ_HANDLED; 1185a45c6cb8SMadhusudhan Chikkature } 1186a45c6cb8SMadhusudhan Chikkature 118770a3341aSDenis Karpov static int omap_hsmmc_get_dma_sync_dev(struct omap_hsmmc_host *host, 11880ccd76d4SJuha Yrjola struct mmc_data *data) 11890ccd76d4SJuha Yrjola { 11900ccd76d4SJuha Yrjola int sync_dev; 11910ccd76d4SJuha Yrjola 1192f3e2f1ddSGrazvydas Ignotas if (data->flags & MMC_DATA_WRITE) 1193f3e2f1ddSGrazvydas Ignotas sync_dev = host->dma_line_tx; 11940ccd76d4SJuha Yrjola else 1195f3e2f1ddSGrazvydas Ignotas sync_dev = host->dma_line_rx; 11960ccd76d4SJuha Yrjola return sync_dev; 11970ccd76d4SJuha Yrjola } 11980ccd76d4SJuha Yrjola 119970a3341aSDenis Karpov static void omap_hsmmc_config_dma_params(struct omap_hsmmc_host *host, 12000ccd76d4SJuha Yrjola struct mmc_data *data, 12010ccd76d4SJuha Yrjola struct scatterlist *sgl) 12020ccd76d4SJuha Yrjola { 12030ccd76d4SJuha Yrjola int blksz, nblk, dma_ch; 12040ccd76d4SJuha Yrjola 12050ccd76d4SJuha Yrjola dma_ch = host->dma_ch; 12060ccd76d4SJuha Yrjola if (data->flags & MMC_DATA_WRITE) { 12070ccd76d4SJuha Yrjola omap_set_dma_dest_params(dma_ch, 0, OMAP_DMA_AMODE_CONSTANT, 12080ccd76d4SJuha Yrjola (host->mapbase + OMAP_HSMMC_DATA), 0, 0); 12090ccd76d4SJuha Yrjola omap_set_dma_src_params(dma_ch, 0, OMAP_DMA_AMODE_POST_INC, 12100ccd76d4SJuha Yrjola sg_dma_address(sgl), 0, 0); 12110ccd76d4SJuha Yrjola } else { 12120ccd76d4SJuha Yrjola omap_set_dma_src_params(dma_ch, 0, OMAP_DMA_AMODE_CONSTANT, 12130ccd76d4SJuha Yrjola (host->mapbase + OMAP_HSMMC_DATA), 0, 0); 12140ccd76d4SJuha Yrjola omap_set_dma_dest_params(dma_ch, 0, OMAP_DMA_AMODE_POST_INC, 12150ccd76d4SJuha Yrjola sg_dma_address(sgl), 0, 0); 12160ccd76d4SJuha Yrjola } 12170ccd76d4SJuha Yrjola 12180ccd76d4SJuha Yrjola blksz = host->data->blksz; 12190ccd76d4SJuha Yrjola nblk = sg_dma_len(sgl) / blksz; 12200ccd76d4SJuha Yrjola 12210ccd76d4SJuha Yrjola omap_set_dma_transfer_params(dma_ch, OMAP_DMA_DATA_TYPE_S32, 12220ccd76d4SJuha Yrjola blksz / 4, nblk, OMAP_DMA_SYNC_FRAME, 122370a3341aSDenis Karpov omap_hsmmc_get_dma_sync_dev(host, data), 12240ccd76d4SJuha Yrjola !(data->flags & MMC_DATA_WRITE)); 12250ccd76d4SJuha Yrjola 12260ccd76d4SJuha Yrjola omap_start_dma(dma_ch); 12270ccd76d4SJuha Yrjola } 12280ccd76d4SJuha Yrjola 1229a45c6cb8SMadhusudhan Chikkature /* 1230a45c6cb8SMadhusudhan Chikkature * DMA call back function 1231a45c6cb8SMadhusudhan Chikkature */ 1232b417577dSAdrian Hunter static void omap_hsmmc_dma_cb(int lch, u16 ch_status, void *cb_data) 1233a45c6cb8SMadhusudhan Chikkature { 1234b417577dSAdrian Hunter struct omap_hsmmc_host *host = cb_data; 1235770d7432SAdrian Hunter struct mmc_data *data; 1236b417577dSAdrian Hunter int dma_ch, req_in_progress; 1237a45c6cb8SMadhusudhan Chikkature 1238f3584e5eSVenkatraman S if (!(ch_status & OMAP_DMA_BLOCK_IRQ)) { 1239f3584e5eSVenkatraman S dev_warn(mmc_dev(host->mmc), "unexpected dma status %x\n", 1240f3584e5eSVenkatraman S ch_status); 1241f3584e5eSVenkatraman S return; 1242f3584e5eSVenkatraman S } 1243a45c6cb8SMadhusudhan Chikkature 1244b417577dSAdrian Hunter spin_lock(&host->irq_lock); 1245b417577dSAdrian Hunter if (host->dma_ch < 0) { 1246b417577dSAdrian Hunter spin_unlock(&host->irq_lock); 1247a45c6cb8SMadhusudhan Chikkature return; 1248b417577dSAdrian Hunter } 1249a45c6cb8SMadhusudhan Chikkature 1250770d7432SAdrian Hunter data = host->mrq->data; 12510ccd76d4SJuha Yrjola host->dma_sg_idx++; 12520ccd76d4SJuha Yrjola if (host->dma_sg_idx < host->dma_len) { 12530ccd76d4SJuha Yrjola /* Fire up the next transfer. */ 1254b417577dSAdrian Hunter omap_hsmmc_config_dma_params(host, data, 1255b417577dSAdrian Hunter data->sg + host->dma_sg_idx); 1256b417577dSAdrian Hunter spin_unlock(&host->irq_lock); 12570ccd76d4SJuha Yrjola return; 12580ccd76d4SJuha Yrjola } 12590ccd76d4SJuha Yrjola 12609782aff8SPer Forlin if (!data->host_cookie) 1261a9120c33SPer Forlin dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len, 1262b417577dSAdrian Hunter omap_hsmmc_get_dma_dir(host, data)); 1263b417577dSAdrian Hunter 1264b417577dSAdrian Hunter req_in_progress = host->req_in_progress; 1265b417577dSAdrian Hunter dma_ch = host->dma_ch; 1266a45c6cb8SMadhusudhan Chikkature host->dma_ch = -1; 1267b417577dSAdrian Hunter spin_unlock(&host->irq_lock); 1268b417577dSAdrian Hunter 1269b417577dSAdrian Hunter omap_free_dma(dma_ch); 1270b417577dSAdrian Hunter 1271b417577dSAdrian Hunter /* If DMA has finished after TC, complete the request */ 1272b417577dSAdrian Hunter if (!req_in_progress) { 1273b417577dSAdrian Hunter struct mmc_request *mrq = host->mrq; 1274b417577dSAdrian Hunter 1275b417577dSAdrian Hunter host->mrq = NULL; 1276b417577dSAdrian Hunter mmc_request_done(host->mmc, mrq); 1277b417577dSAdrian Hunter } 1278a45c6cb8SMadhusudhan Chikkature } 1279a45c6cb8SMadhusudhan Chikkature 12809782aff8SPer Forlin static int omap_hsmmc_pre_dma_transfer(struct omap_hsmmc_host *host, 12819782aff8SPer Forlin struct mmc_data *data, 12829782aff8SPer Forlin struct omap_hsmmc_next *next) 12839782aff8SPer Forlin { 12849782aff8SPer Forlin int dma_len; 12859782aff8SPer Forlin 12869782aff8SPer Forlin if (!next && data->host_cookie && 12879782aff8SPer Forlin data->host_cookie != host->next_data.cookie) { 12882cecdf00SRajendra Nayak dev_warn(host->dev, "[%s] invalid cookie: data->host_cookie %d" 12899782aff8SPer Forlin " host->next_data.cookie %d\n", 12909782aff8SPer Forlin __func__, data->host_cookie, host->next_data.cookie); 12919782aff8SPer Forlin data->host_cookie = 0; 12929782aff8SPer Forlin } 12939782aff8SPer Forlin 12949782aff8SPer Forlin /* Check if next job is already prepared */ 12959782aff8SPer Forlin if (next || 12969782aff8SPer Forlin (!next && data->host_cookie != host->next_data.cookie)) { 12979782aff8SPer Forlin dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg, 12989782aff8SPer Forlin data->sg_len, 12999782aff8SPer Forlin omap_hsmmc_get_dma_dir(host, data)); 13009782aff8SPer Forlin 13019782aff8SPer Forlin } else { 13029782aff8SPer Forlin dma_len = host->next_data.dma_len; 13039782aff8SPer Forlin host->next_data.dma_len = 0; 13049782aff8SPer Forlin } 13059782aff8SPer Forlin 13069782aff8SPer Forlin 13079782aff8SPer Forlin if (dma_len == 0) 13089782aff8SPer Forlin return -EINVAL; 13099782aff8SPer Forlin 13109782aff8SPer Forlin if (next) { 13119782aff8SPer Forlin next->dma_len = dma_len; 13129782aff8SPer Forlin data->host_cookie = ++next->cookie < 0 ? 1 : next->cookie; 13139782aff8SPer Forlin } else 13149782aff8SPer Forlin host->dma_len = dma_len; 13159782aff8SPer Forlin 13169782aff8SPer Forlin return 0; 13179782aff8SPer Forlin } 13189782aff8SPer Forlin 1319a45c6cb8SMadhusudhan Chikkature /* 1320a45c6cb8SMadhusudhan Chikkature * Routine to configure and start DMA for the MMC card 1321a45c6cb8SMadhusudhan Chikkature */ 132270a3341aSDenis Karpov static int omap_hsmmc_start_dma_transfer(struct omap_hsmmc_host *host, 132370a3341aSDenis Karpov struct mmc_request *req) 1324a45c6cb8SMadhusudhan Chikkature { 1325b417577dSAdrian Hunter int dma_ch = 0, ret = 0, i; 1326a45c6cb8SMadhusudhan Chikkature struct mmc_data *data = req->data; 1327a45c6cb8SMadhusudhan Chikkature 13280ccd76d4SJuha Yrjola /* Sanity check: all the SG entries must be aligned by block size. */ 1329a3f406f8SJarkko Lavinen for (i = 0; i < data->sg_len; i++) { 13300ccd76d4SJuha Yrjola struct scatterlist *sgl; 13310ccd76d4SJuha Yrjola 13320ccd76d4SJuha Yrjola sgl = data->sg + i; 13330ccd76d4SJuha Yrjola if (sgl->length % data->blksz) 13340ccd76d4SJuha Yrjola return -EINVAL; 13350ccd76d4SJuha Yrjola } 13360ccd76d4SJuha Yrjola if ((data->blksz % 4) != 0) 13370ccd76d4SJuha Yrjola /* REVISIT: The MMC buffer increments only when MSB is written. 13380ccd76d4SJuha Yrjola * Return error for blksz which is non multiple of four. 13390ccd76d4SJuha Yrjola */ 13400ccd76d4SJuha Yrjola return -EINVAL; 13410ccd76d4SJuha Yrjola 1342b417577dSAdrian Hunter BUG_ON(host->dma_ch != -1); 1343a45c6cb8SMadhusudhan Chikkature 134470a3341aSDenis Karpov ret = omap_request_dma(omap_hsmmc_get_dma_sync_dev(host, data), 134570a3341aSDenis Karpov "MMC/SD", omap_hsmmc_dma_cb, host, &dma_ch); 1346a45c6cb8SMadhusudhan Chikkature if (ret != 0) { 13470ccd76d4SJuha Yrjola dev_err(mmc_dev(host->mmc), 1348a45c6cb8SMadhusudhan Chikkature "%s: omap_request_dma() failed with %d\n", 1349a45c6cb8SMadhusudhan Chikkature mmc_hostname(host->mmc), ret); 1350a45c6cb8SMadhusudhan Chikkature return ret; 1351a45c6cb8SMadhusudhan Chikkature } 13529782aff8SPer Forlin ret = omap_hsmmc_pre_dma_transfer(host, data, NULL); 13539782aff8SPer Forlin if (ret) 13549782aff8SPer Forlin return ret; 1355a45c6cb8SMadhusudhan Chikkature 1356a45c6cb8SMadhusudhan Chikkature host->dma_ch = dma_ch; 13570ccd76d4SJuha Yrjola host->dma_sg_idx = 0; 1358a45c6cb8SMadhusudhan Chikkature 135970a3341aSDenis Karpov omap_hsmmc_config_dma_params(host, data, data->sg); 1360a45c6cb8SMadhusudhan Chikkature 1361a45c6cb8SMadhusudhan Chikkature return 0; 1362a45c6cb8SMadhusudhan Chikkature } 1363a45c6cb8SMadhusudhan Chikkature 136470a3341aSDenis Karpov static void set_data_timeout(struct omap_hsmmc_host *host, 1365e2bf08d6SAdrian Hunter unsigned int timeout_ns, 1366e2bf08d6SAdrian Hunter unsigned int timeout_clks) 1367a45c6cb8SMadhusudhan Chikkature { 1368a45c6cb8SMadhusudhan Chikkature unsigned int timeout, cycle_ns; 1369a45c6cb8SMadhusudhan Chikkature uint32_t reg, clkd, dto = 0; 1370a45c6cb8SMadhusudhan Chikkature 1371a45c6cb8SMadhusudhan Chikkature reg = OMAP_HSMMC_READ(host->base, SYSCTL); 1372a45c6cb8SMadhusudhan Chikkature clkd = (reg & CLKD_MASK) >> CLKD_SHIFT; 1373a45c6cb8SMadhusudhan Chikkature if (clkd == 0) 1374a45c6cb8SMadhusudhan Chikkature clkd = 1; 1375a45c6cb8SMadhusudhan Chikkature 1376a45c6cb8SMadhusudhan Chikkature cycle_ns = 1000000000 / (clk_get_rate(host->fclk) / clkd); 1377e2bf08d6SAdrian Hunter timeout = timeout_ns / cycle_ns; 1378e2bf08d6SAdrian Hunter timeout += timeout_clks; 1379a45c6cb8SMadhusudhan Chikkature if (timeout) { 1380a45c6cb8SMadhusudhan Chikkature while ((timeout & 0x80000000) == 0) { 1381a45c6cb8SMadhusudhan Chikkature dto += 1; 1382a45c6cb8SMadhusudhan Chikkature timeout <<= 1; 1383a45c6cb8SMadhusudhan Chikkature } 1384a45c6cb8SMadhusudhan Chikkature dto = 31 - dto; 1385a45c6cb8SMadhusudhan Chikkature timeout <<= 1; 1386a45c6cb8SMadhusudhan Chikkature if (timeout && dto) 1387a45c6cb8SMadhusudhan Chikkature dto += 1; 1388a45c6cb8SMadhusudhan Chikkature if (dto >= 13) 1389a45c6cb8SMadhusudhan Chikkature dto -= 13; 1390a45c6cb8SMadhusudhan Chikkature else 1391a45c6cb8SMadhusudhan Chikkature dto = 0; 1392a45c6cb8SMadhusudhan Chikkature if (dto > 14) 1393a45c6cb8SMadhusudhan Chikkature dto = 14; 1394a45c6cb8SMadhusudhan Chikkature } 1395a45c6cb8SMadhusudhan Chikkature 1396a45c6cb8SMadhusudhan Chikkature reg &= ~DTO_MASK; 1397a45c6cb8SMadhusudhan Chikkature reg |= dto << DTO_SHIFT; 1398a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, reg); 1399a45c6cb8SMadhusudhan Chikkature } 1400a45c6cb8SMadhusudhan Chikkature 1401a45c6cb8SMadhusudhan Chikkature /* 1402a45c6cb8SMadhusudhan Chikkature * Configure block length for MMC/SD cards and initiate the transfer. 1403a45c6cb8SMadhusudhan Chikkature */ 1404a45c6cb8SMadhusudhan Chikkature static int 140570a3341aSDenis Karpov omap_hsmmc_prepare_data(struct omap_hsmmc_host *host, struct mmc_request *req) 1406a45c6cb8SMadhusudhan Chikkature { 1407a45c6cb8SMadhusudhan Chikkature int ret; 1408a45c6cb8SMadhusudhan Chikkature host->data = req->data; 1409a45c6cb8SMadhusudhan Chikkature 1410a45c6cb8SMadhusudhan Chikkature if (req->data == NULL) { 1411a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, BLK, 0); 1412e2bf08d6SAdrian Hunter /* 1413e2bf08d6SAdrian Hunter * Set an arbitrary 100ms data timeout for commands with 1414e2bf08d6SAdrian Hunter * busy signal. 1415e2bf08d6SAdrian Hunter */ 1416e2bf08d6SAdrian Hunter if (req->cmd->flags & MMC_RSP_BUSY) 1417e2bf08d6SAdrian Hunter set_data_timeout(host, 100000000U, 0); 1418a45c6cb8SMadhusudhan Chikkature return 0; 1419a45c6cb8SMadhusudhan Chikkature } 1420a45c6cb8SMadhusudhan Chikkature 1421a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, BLK, (req->data->blksz) 1422a45c6cb8SMadhusudhan Chikkature | (req->data->blocks << 16)); 1423e2bf08d6SAdrian Hunter set_data_timeout(host, req->data->timeout_ns, req->data->timeout_clks); 1424a45c6cb8SMadhusudhan Chikkature 1425a45c6cb8SMadhusudhan Chikkature if (host->use_dma) { 142670a3341aSDenis Karpov ret = omap_hsmmc_start_dma_transfer(host, req); 1427a45c6cb8SMadhusudhan Chikkature if (ret != 0) { 1428a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "MMC start dma failure\n"); 1429a45c6cb8SMadhusudhan Chikkature return ret; 1430a45c6cb8SMadhusudhan Chikkature } 1431a45c6cb8SMadhusudhan Chikkature } 1432a45c6cb8SMadhusudhan Chikkature return 0; 1433a45c6cb8SMadhusudhan Chikkature } 1434a45c6cb8SMadhusudhan Chikkature 14359782aff8SPer Forlin static void omap_hsmmc_post_req(struct mmc_host *mmc, struct mmc_request *mrq, 14369782aff8SPer Forlin int err) 14379782aff8SPer Forlin { 14389782aff8SPer Forlin struct omap_hsmmc_host *host = mmc_priv(mmc); 14399782aff8SPer Forlin struct mmc_data *data = mrq->data; 14409782aff8SPer Forlin 14419782aff8SPer Forlin if (host->use_dma) { 1442053bf34fSPer Forlin if (data->host_cookie) 1443053bf34fSPer Forlin dma_unmap_sg(mmc_dev(host->mmc), data->sg, 1444053bf34fSPer Forlin data->sg_len, 14459782aff8SPer Forlin omap_hsmmc_get_dma_dir(host, data)); 14469782aff8SPer Forlin data->host_cookie = 0; 14479782aff8SPer Forlin } 14489782aff8SPer Forlin } 14499782aff8SPer Forlin 14509782aff8SPer Forlin static void omap_hsmmc_pre_req(struct mmc_host *mmc, struct mmc_request *mrq, 14519782aff8SPer Forlin bool is_first_req) 14529782aff8SPer Forlin { 14539782aff8SPer Forlin struct omap_hsmmc_host *host = mmc_priv(mmc); 14549782aff8SPer Forlin 14559782aff8SPer Forlin if (mrq->data->host_cookie) { 14569782aff8SPer Forlin mrq->data->host_cookie = 0; 14579782aff8SPer Forlin return ; 14589782aff8SPer Forlin } 14599782aff8SPer Forlin 14609782aff8SPer Forlin if (host->use_dma) 14619782aff8SPer Forlin if (omap_hsmmc_pre_dma_transfer(host, mrq->data, 14629782aff8SPer Forlin &host->next_data)) 14639782aff8SPer Forlin mrq->data->host_cookie = 0; 14649782aff8SPer Forlin } 14659782aff8SPer Forlin 1466a45c6cb8SMadhusudhan Chikkature /* 1467a45c6cb8SMadhusudhan Chikkature * Request function. for read/write operation 1468a45c6cb8SMadhusudhan Chikkature */ 146970a3341aSDenis Karpov static void omap_hsmmc_request(struct mmc_host *mmc, struct mmc_request *req) 1470a45c6cb8SMadhusudhan Chikkature { 147170a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1472a3f406f8SJarkko Lavinen int err; 1473a45c6cb8SMadhusudhan Chikkature 1474b417577dSAdrian Hunter BUG_ON(host->req_in_progress); 1475b417577dSAdrian Hunter BUG_ON(host->dma_ch != -1); 1476b62f6228SAdrian Hunter if (host->protect_card) { 1477b62f6228SAdrian Hunter if (host->reqs_blocked < 3) { 1478b62f6228SAdrian Hunter /* 1479b62f6228SAdrian Hunter * Ensure the controller is left in a consistent 1480b62f6228SAdrian Hunter * state by resetting the command and data state 1481b62f6228SAdrian Hunter * machines. 1482b62f6228SAdrian Hunter */ 1483b62f6228SAdrian Hunter omap_hsmmc_reset_controller_fsm(host, SRD); 1484b62f6228SAdrian Hunter omap_hsmmc_reset_controller_fsm(host, SRC); 1485b62f6228SAdrian Hunter host->reqs_blocked += 1; 1486b62f6228SAdrian Hunter } 1487b62f6228SAdrian Hunter req->cmd->error = -EBADF; 1488b62f6228SAdrian Hunter if (req->data) 1489b62f6228SAdrian Hunter req->data->error = -EBADF; 1490b417577dSAdrian Hunter req->cmd->retries = 0; 1491b62f6228SAdrian Hunter mmc_request_done(mmc, req); 1492b62f6228SAdrian Hunter return; 1493b62f6228SAdrian Hunter } else if (host->reqs_blocked) 1494b62f6228SAdrian Hunter host->reqs_blocked = 0; 1495a45c6cb8SMadhusudhan Chikkature WARN_ON(host->mrq != NULL); 1496a45c6cb8SMadhusudhan Chikkature host->mrq = req; 149770a3341aSDenis Karpov err = omap_hsmmc_prepare_data(host, req); 1498a3f406f8SJarkko Lavinen if (err) { 1499a3f406f8SJarkko Lavinen req->cmd->error = err; 1500a3f406f8SJarkko Lavinen if (req->data) 1501a3f406f8SJarkko Lavinen req->data->error = err; 1502a3f406f8SJarkko Lavinen host->mrq = NULL; 1503a3f406f8SJarkko Lavinen mmc_request_done(mmc, req); 1504a3f406f8SJarkko Lavinen return; 1505a3f406f8SJarkko Lavinen } 1506a3f406f8SJarkko Lavinen 150770a3341aSDenis Karpov omap_hsmmc_start_command(host, req->cmd, req->data); 1508a45c6cb8SMadhusudhan Chikkature } 1509a45c6cb8SMadhusudhan Chikkature 1510a45c6cb8SMadhusudhan Chikkature /* Routine to configure clock values. Exposed API to core */ 151170a3341aSDenis Karpov static void omap_hsmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 1512a45c6cb8SMadhusudhan Chikkature { 151370a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1514a3621465SAdrian Hunter int do_send_init_stream = 0; 1515a45c6cb8SMadhusudhan Chikkature 1516fa4aa2d4SBalaji T K pm_runtime_get_sync(host->dev); 15175e2ea617SAdrian Hunter 1518a3621465SAdrian Hunter if (ios->power_mode != host->power_mode) { 1519a45c6cb8SMadhusudhan Chikkature switch (ios->power_mode) { 1520a45c6cb8SMadhusudhan Chikkature case MMC_POWER_OFF: 1521a3621465SAdrian Hunter mmc_slot(host).set_power(host->dev, host->slot_id, 1522a3621465SAdrian Hunter 0, 0); 1523623821f7SAdrian Hunter host->vdd = 0; 1524a45c6cb8SMadhusudhan Chikkature break; 1525a45c6cb8SMadhusudhan Chikkature case MMC_POWER_UP: 1526a3621465SAdrian Hunter mmc_slot(host).set_power(host->dev, host->slot_id, 1527a3621465SAdrian Hunter 1, ios->vdd); 1528623821f7SAdrian Hunter host->vdd = ios->vdd; 1529a45c6cb8SMadhusudhan Chikkature break; 1530a3621465SAdrian Hunter case MMC_POWER_ON: 1531a3621465SAdrian Hunter do_send_init_stream = 1; 1532a3621465SAdrian Hunter break; 1533a3621465SAdrian Hunter } 1534a3621465SAdrian Hunter host->power_mode = ios->power_mode; 1535a45c6cb8SMadhusudhan Chikkature } 1536a45c6cb8SMadhusudhan Chikkature 1537dd498effSDenis Karpov /* FIXME: set registers based only on changes to ios */ 1538dd498effSDenis Karpov 15393796fb8aSAndy Shevchenko omap_hsmmc_set_bus_width(host); 1540a45c6cb8SMadhusudhan Chikkature 15414621d5f8SKishore Kadiyala if (host->pdata->controller_flags & OMAP_HSMMC_SUPPORTS_DUAL_VOLT) { 1542eb250826SDavid Brownell /* Only MMC1 can interface at 3V without some flavor 1543eb250826SDavid Brownell * of external transceiver; but they all handle 1.8V. 1544eb250826SDavid Brownell */ 1545a45c6cb8SMadhusudhan Chikkature if ((OMAP_HSMMC_READ(host->base, HCTL) & SDVSDET) && 15461f84b71bSRajendra Nayak (ios->vdd == DUAL_VOLT_OCR_BIT) && 15471f84b71bSRajendra Nayak /* 15481f84b71bSRajendra Nayak * With pbias cell programming missing, this 15491f84b71bSRajendra Nayak * can't be allowed when booting with device 15501f84b71bSRajendra Nayak * tree. 15511f84b71bSRajendra Nayak */ 15524d048f91SRajendra Nayak !host->dev->of_node) { 1553a45c6cb8SMadhusudhan Chikkature /* 1554a45c6cb8SMadhusudhan Chikkature * The mmc_select_voltage fn of the core does 1555a45c6cb8SMadhusudhan Chikkature * not seem to set the power_mode to 1556a45c6cb8SMadhusudhan Chikkature * MMC_POWER_UP upon recalculating the voltage. 1557a45c6cb8SMadhusudhan Chikkature * vdd 1.8v. 1558a45c6cb8SMadhusudhan Chikkature */ 155970a3341aSDenis Karpov if (omap_hsmmc_switch_opcond(host, ios->vdd) != 0) 1560a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1561a45c6cb8SMadhusudhan Chikkature "Switch operation failed\n"); 1562a45c6cb8SMadhusudhan Chikkature } 1563a45c6cb8SMadhusudhan Chikkature } 1564a45c6cb8SMadhusudhan Chikkature 15655934df2fSAndy Shevchenko omap_hsmmc_set_clock(host); 1566a45c6cb8SMadhusudhan Chikkature 1567a3621465SAdrian Hunter if (do_send_init_stream) 1568a45c6cb8SMadhusudhan Chikkature send_init_stream(host); 1569a45c6cb8SMadhusudhan Chikkature 15703796fb8aSAndy Shevchenko omap_hsmmc_set_bus_mode(host); 15715e2ea617SAdrian Hunter 1572fa4aa2d4SBalaji T K pm_runtime_put_autosuspend(host->dev); 1573a45c6cb8SMadhusudhan Chikkature } 1574a45c6cb8SMadhusudhan Chikkature 1575a45c6cb8SMadhusudhan Chikkature static int omap_hsmmc_get_cd(struct mmc_host *mmc) 1576a45c6cb8SMadhusudhan Chikkature { 157770a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1578a45c6cb8SMadhusudhan Chikkature 1579191d1f1dSDenis Karpov if (!mmc_slot(host).card_detect) 1580a45c6cb8SMadhusudhan Chikkature return -ENOSYS; 1581db0fefc5SAdrian Hunter return mmc_slot(host).card_detect(host->dev, host->slot_id); 1582a45c6cb8SMadhusudhan Chikkature } 1583a45c6cb8SMadhusudhan Chikkature 1584a45c6cb8SMadhusudhan Chikkature static int omap_hsmmc_get_ro(struct mmc_host *mmc) 1585a45c6cb8SMadhusudhan Chikkature { 158670a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1587a45c6cb8SMadhusudhan Chikkature 1588191d1f1dSDenis Karpov if (!mmc_slot(host).get_ro) 1589a45c6cb8SMadhusudhan Chikkature return -ENOSYS; 1590191d1f1dSDenis Karpov return mmc_slot(host).get_ro(host->dev, 0); 1591a45c6cb8SMadhusudhan Chikkature } 1592a45c6cb8SMadhusudhan Chikkature 15934816858cSGrazvydas Ignotas static void omap_hsmmc_init_card(struct mmc_host *mmc, struct mmc_card *card) 15944816858cSGrazvydas Ignotas { 15954816858cSGrazvydas Ignotas struct omap_hsmmc_host *host = mmc_priv(mmc); 15964816858cSGrazvydas Ignotas 15974816858cSGrazvydas Ignotas if (mmc_slot(host).init_card) 15984816858cSGrazvydas Ignotas mmc_slot(host).init_card(card); 15994816858cSGrazvydas Ignotas } 16004816858cSGrazvydas Ignotas 160170a3341aSDenis Karpov static void omap_hsmmc_conf_bus_power(struct omap_hsmmc_host *host) 16021b331e69SKim Kyuwon { 16031b331e69SKim Kyuwon u32 hctl, capa, value; 16041b331e69SKim Kyuwon 16051b331e69SKim Kyuwon /* Only MMC1 supports 3.0V */ 16064621d5f8SKishore Kadiyala if (host->pdata->controller_flags & OMAP_HSMMC_SUPPORTS_DUAL_VOLT) { 16071b331e69SKim Kyuwon hctl = SDVS30; 16081b331e69SKim Kyuwon capa = VS30 | VS18; 16091b331e69SKim Kyuwon } else { 16101b331e69SKim Kyuwon hctl = SDVS18; 16111b331e69SKim Kyuwon capa = VS18; 16121b331e69SKim Kyuwon } 16131b331e69SKim Kyuwon 16141b331e69SKim Kyuwon value = OMAP_HSMMC_READ(host->base, HCTL) & ~SDVS_MASK; 16151b331e69SKim Kyuwon OMAP_HSMMC_WRITE(host->base, HCTL, value | hctl); 16161b331e69SKim Kyuwon 16171b331e69SKim Kyuwon value = OMAP_HSMMC_READ(host->base, CAPA); 16181b331e69SKim Kyuwon OMAP_HSMMC_WRITE(host->base, CAPA, value | capa); 16191b331e69SKim Kyuwon 16201b331e69SKim Kyuwon /* Set the controller to AUTO IDLE mode */ 16211b331e69SKim Kyuwon value = OMAP_HSMMC_READ(host->base, SYSCONFIG); 16221b331e69SKim Kyuwon OMAP_HSMMC_WRITE(host->base, SYSCONFIG, value | AUTOIDLE); 16231b331e69SKim Kyuwon 16241b331e69SKim Kyuwon /* Set SD bus power bit */ 1625e13bb300SAdrian Hunter set_sd_bus_power(host); 16261b331e69SKim Kyuwon } 16271b331e69SKim Kyuwon 162870a3341aSDenis Karpov static int omap_hsmmc_enable_fclk(struct mmc_host *mmc) 1629dd498effSDenis Karpov { 163070a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1631dd498effSDenis Karpov 1632fa4aa2d4SBalaji T K pm_runtime_get_sync(host->dev); 1633fa4aa2d4SBalaji T K 1634dd498effSDenis Karpov return 0; 1635dd498effSDenis Karpov } 1636dd498effSDenis Karpov 1637907d2e7cSAdrian Hunter static int omap_hsmmc_disable_fclk(struct mmc_host *mmc) 1638dd498effSDenis Karpov { 163970a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1640dd498effSDenis Karpov 1641fa4aa2d4SBalaji T K pm_runtime_mark_last_busy(host->dev); 1642fa4aa2d4SBalaji T K pm_runtime_put_autosuspend(host->dev); 1643fa4aa2d4SBalaji T K 1644dd498effSDenis Karpov return 0; 1645dd498effSDenis Karpov } 1646dd498effSDenis Karpov 164770a3341aSDenis Karpov static const struct mmc_host_ops omap_hsmmc_ops = { 164870a3341aSDenis Karpov .enable = omap_hsmmc_enable_fclk, 164970a3341aSDenis Karpov .disable = omap_hsmmc_disable_fclk, 16509782aff8SPer Forlin .post_req = omap_hsmmc_post_req, 16519782aff8SPer Forlin .pre_req = omap_hsmmc_pre_req, 165270a3341aSDenis Karpov .request = omap_hsmmc_request, 165370a3341aSDenis Karpov .set_ios = omap_hsmmc_set_ios, 1654dd498effSDenis Karpov .get_cd = omap_hsmmc_get_cd, 1655dd498effSDenis Karpov .get_ro = omap_hsmmc_get_ro, 16564816858cSGrazvydas Ignotas .init_card = omap_hsmmc_init_card, 1657dd498effSDenis Karpov /* NYET -- enable_sdio_irq */ 1658dd498effSDenis Karpov }; 1659dd498effSDenis Karpov 1660d900f712SDenis Karpov #ifdef CONFIG_DEBUG_FS 1661d900f712SDenis Karpov 166270a3341aSDenis Karpov static int omap_hsmmc_regs_show(struct seq_file *s, void *data) 1663d900f712SDenis Karpov { 1664d900f712SDenis Karpov struct mmc_host *mmc = s->private; 166570a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 166611dd62a7SDenis Karpov int context_loss = 0; 166711dd62a7SDenis Karpov 166870a3341aSDenis Karpov if (host->pdata->get_context_loss_count) 166970a3341aSDenis Karpov context_loss = host->pdata->get_context_loss_count(host->dev); 1670d900f712SDenis Karpov 1671907d2e7cSAdrian Hunter seq_printf(s, "mmc%d:\n ctx_loss:\t%d:%d\n\nregs:\n", 1672907d2e7cSAdrian Hunter mmc->index, host->context_loss, context_loss); 16735e2ea617SAdrian Hunter 16747a8c2cefSBalaji T K if (host->suspended) { 1675dd498effSDenis Karpov seq_printf(s, "host suspended, can't read registers\n"); 1676dd498effSDenis Karpov return 0; 1677dd498effSDenis Karpov } 1678dd498effSDenis Karpov 1679fa4aa2d4SBalaji T K pm_runtime_get_sync(host->dev); 1680d900f712SDenis Karpov 1681d900f712SDenis Karpov seq_printf(s, "SYSCONFIG:\t0x%08x\n", 1682d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCONFIG)); 1683d900f712SDenis Karpov seq_printf(s, "CON:\t\t0x%08x\n", 1684d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, CON)); 1685d900f712SDenis Karpov seq_printf(s, "HCTL:\t\t0x%08x\n", 1686d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, HCTL)); 1687d900f712SDenis Karpov seq_printf(s, "SYSCTL:\t\t0x%08x\n", 1688d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCTL)); 1689d900f712SDenis Karpov seq_printf(s, "IE:\t\t0x%08x\n", 1690d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, IE)); 1691d900f712SDenis Karpov seq_printf(s, "ISE:\t\t0x%08x\n", 1692d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, ISE)); 1693d900f712SDenis Karpov seq_printf(s, "CAPA:\t\t0x%08x\n", 1694d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, CAPA)); 16955e2ea617SAdrian Hunter 1696fa4aa2d4SBalaji T K pm_runtime_mark_last_busy(host->dev); 1697fa4aa2d4SBalaji T K pm_runtime_put_autosuspend(host->dev); 1698dd498effSDenis Karpov 1699d900f712SDenis Karpov return 0; 1700d900f712SDenis Karpov } 1701d900f712SDenis Karpov 170270a3341aSDenis Karpov static int omap_hsmmc_regs_open(struct inode *inode, struct file *file) 1703d900f712SDenis Karpov { 170470a3341aSDenis Karpov return single_open(file, omap_hsmmc_regs_show, inode->i_private); 1705d900f712SDenis Karpov } 1706d900f712SDenis Karpov 1707d900f712SDenis Karpov static const struct file_operations mmc_regs_fops = { 170870a3341aSDenis Karpov .open = omap_hsmmc_regs_open, 1709d900f712SDenis Karpov .read = seq_read, 1710d900f712SDenis Karpov .llseek = seq_lseek, 1711d900f712SDenis Karpov .release = single_release, 1712d900f712SDenis Karpov }; 1713d900f712SDenis Karpov 171470a3341aSDenis Karpov static void omap_hsmmc_debugfs(struct mmc_host *mmc) 1715d900f712SDenis Karpov { 1716d900f712SDenis Karpov if (mmc->debugfs_root) 1717d900f712SDenis Karpov debugfs_create_file("regs", S_IRUSR, mmc->debugfs_root, 1718d900f712SDenis Karpov mmc, &mmc_regs_fops); 1719d900f712SDenis Karpov } 1720d900f712SDenis Karpov 1721d900f712SDenis Karpov #else 1722d900f712SDenis Karpov 172370a3341aSDenis Karpov static void omap_hsmmc_debugfs(struct mmc_host *mmc) 1724d900f712SDenis Karpov { 1725d900f712SDenis Karpov } 1726d900f712SDenis Karpov 1727d900f712SDenis Karpov #endif 1728d900f712SDenis Karpov 172946856a68SRajendra Nayak #ifdef CONFIG_OF 173046856a68SRajendra Nayak static u16 omap4_reg_offset = 0x100; 173146856a68SRajendra Nayak 173246856a68SRajendra Nayak static const struct of_device_id omap_mmc_of_match[] = { 173346856a68SRajendra Nayak { 173446856a68SRajendra Nayak .compatible = "ti,omap2-hsmmc", 173546856a68SRajendra Nayak }, 173646856a68SRajendra Nayak { 173746856a68SRajendra Nayak .compatible = "ti,omap3-hsmmc", 173846856a68SRajendra Nayak }, 173946856a68SRajendra Nayak { 174046856a68SRajendra Nayak .compatible = "ti,omap4-hsmmc", 174146856a68SRajendra Nayak .data = &omap4_reg_offset, 174246856a68SRajendra Nayak }, 174346856a68SRajendra Nayak {}, 1744b6d085f6SChris Ball }; 174546856a68SRajendra Nayak MODULE_DEVICE_TABLE(of, omap_mmc_of_match); 174646856a68SRajendra Nayak 174746856a68SRajendra Nayak static struct omap_mmc_platform_data *of_get_hsmmc_pdata(struct device *dev) 174846856a68SRajendra Nayak { 174946856a68SRajendra Nayak struct omap_mmc_platform_data *pdata; 175046856a68SRajendra Nayak struct device_node *np = dev->of_node; 175146856a68SRajendra Nayak u32 bus_width; 175246856a68SRajendra Nayak 175346856a68SRajendra Nayak pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL); 175446856a68SRajendra Nayak if (!pdata) 175546856a68SRajendra Nayak return NULL; /* out of memory */ 175646856a68SRajendra Nayak 175746856a68SRajendra Nayak if (of_find_property(np, "ti,dual-volt", NULL)) 175846856a68SRajendra Nayak pdata->controller_flags |= OMAP_HSMMC_SUPPORTS_DUAL_VOLT; 175946856a68SRajendra Nayak 176046856a68SRajendra Nayak /* This driver only supports 1 slot */ 176146856a68SRajendra Nayak pdata->nr_slots = 1; 176246856a68SRajendra Nayak pdata->slots[0].switch_pin = of_get_named_gpio(np, "cd-gpios", 0); 176346856a68SRajendra Nayak pdata->slots[0].gpio_wp = of_get_named_gpio(np, "wp-gpios", 0); 176446856a68SRajendra Nayak 176546856a68SRajendra Nayak if (of_find_property(np, "ti,non-removable", NULL)) { 176646856a68SRajendra Nayak pdata->slots[0].nonremovable = true; 176746856a68SRajendra Nayak pdata->slots[0].no_regulator_off_init = true; 176846856a68SRajendra Nayak } 17697f217794SArnd Bergmann of_property_read_u32(np, "bus-width", &bus_width); 177046856a68SRajendra Nayak if (bus_width == 4) 177146856a68SRajendra Nayak pdata->slots[0].caps |= MMC_CAP_4_BIT_DATA; 177246856a68SRajendra Nayak else if (bus_width == 8) 177346856a68SRajendra Nayak pdata->slots[0].caps |= MMC_CAP_8_BIT_DATA; 177446856a68SRajendra Nayak 177546856a68SRajendra Nayak if (of_find_property(np, "ti,needs-special-reset", NULL)) 177646856a68SRajendra Nayak pdata->slots[0].features |= HSMMC_HAS_UPDATED_RESET; 177746856a68SRajendra Nayak 177846856a68SRajendra Nayak return pdata; 177946856a68SRajendra Nayak } 178046856a68SRajendra Nayak #else 178146856a68SRajendra Nayak static inline struct omap_mmc_platform_data 178246856a68SRajendra Nayak *of_get_hsmmc_pdata(struct device *dev) 178346856a68SRajendra Nayak { 178446856a68SRajendra Nayak return NULL; 178546856a68SRajendra Nayak } 178646856a68SRajendra Nayak #endif 178746856a68SRajendra Nayak 1788efa25fd3SFelipe Balbi static int __devinit omap_hsmmc_probe(struct platform_device *pdev) 1789a45c6cb8SMadhusudhan Chikkature { 1790a45c6cb8SMadhusudhan Chikkature struct omap_mmc_platform_data *pdata = pdev->dev.platform_data; 1791a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc; 179270a3341aSDenis Karpov struct omap_hsmmc_host *host = NULL; 1793a45c6cb8SMadhusudhan Chikkature struct resource *res; 1794db0fefc5SAdrian Hunter int ret, irq; 179546856a68SRajendra Nayak const struct of_device_id *match; 179646856a68SRajendra Nayak 179746856a68SRajendra Nayak match = of_match_device(of_match_ptr(omap_mmc_of_match), &pdev->dev); 179846856a68SRajendra Nayak if (match) { 179946856a68SRajendra Nayak pdata = of_get_hsmmc_pdata(&pdev->dev); 180046856a68SRajendra Nayak if (match->data) { 180146856a68SRajendra Nayak u16 *offsetp = match->data; 180246856a68SRajendra Nayak pdata->reg_offset = *offsetp; 180346856a68SRajendra Nayak } 180446856a68SRajendra Nayak } 1805a45c6cb8SMadhusudhan Chikkature 1806a45c6cb8SMadhusudhan Chikkature if (pdata == NULL) { 1807a45c6cb8SMadhusudhan Chikkature dev_err(&pdev->dev, "Platform Data is missing\n"); 1808a45c6cb8SMadhusudhan Chikkature return -ENXIO; 1809a45c6cb8SMadhusudhan Chikkature } 1810a45c6cb8SMadhusudhan Chikkature 1811a45c6cb8SMadhusudhan Chikkature if (pdata->nr_slots == 0) { 1812a45c6cb8SMadhusudhan Chikkature dev_err(&pdev->dev, "No Slots\n"); 1813a45c6cb8SMadhusudhan Chikkature return -ENXIO; 1814a45c6cb8SMadhusudhan Chikkature } 1815a45c6cb8SMadhusudhan Chikkature 1816a45c6cb8SMadhusudhan Chikkature res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1817a45c6cb8SMadhusudhan Chikkature irq = platform_get_irq(pdev, 0); 1818a45c6cb8SMadhusudhan Chikkature if (res == NULL || irq < 0) 1819a45c6cb8SMadhusudhan Chikkature return -ENXIO; 1820a45c6cb8SMadhusudhan Chikkature 1821984b203aSChris Ball res = request_mem_region(res->start, resource_size(res), pdev->name); 1822a45c6cb8SMadhusudhan Chikkature if (res == NULL) 1823a45c6cb8SMadhusudhan Chikkature return -EBUSY; 1824a45c6cb8SMadhusudhan Chikkature 1825db0fefc5SAdrian Hunter ret = omap_hsmmc_gpio_init(pdata); 1826db0fefc5SAdrian Hunter if (ret) 1827db0fefc5SAdrian Hunter goto err; 1828db0fefc5SAdrian Hunter 182970a3341aSDenis Karpov mmc = mmc_alloc_host(sizeof(struct omap_hsmmc_host), &pdev->dev); 1830a45c6cb8SMadhusudhan Chikkature if (!mmc) { 1831a45c6cb8SMadhusudhan Chikkature ret = -ENOMEM; 1832db0fefc5SAdrian Hunter goto err_alloc; 1833a45c6cb8SMadhusudhan Chikkature } 1834a45c6cb8SMadhusudhan Chikkature 1835a45c6cb8SMadhusudhan Chikkature host = mmc_priv(mmc); 1836a45c6cb8SMadhusudhan Chikkature host->mmc = mmc; 1837a45c6cb8SMadhusudhan Chikkature host->pdata = pdata; 1838a45c6cb8SMadhusudhan Chikkature host->dev = &pdev->dev; 1839a45c6cb8SMadhusudhan Chikkature host->use_dma = 1; 1840a45c6cb8SMadhusudhan Chikkature host->dev->dma_mask = &pdata->dma_mask; 1841a45c6cb8SMadhusudhan Chikkature host->dma_ch = -1; 1842a45c6cb8SMadhusudhan Chikkature host->irq = irq; 1843a45c6cb8SMadhusudhan Chikkature host->slot_id = 0; 1844fc307df8SBalaji T K host->mapbase = res->start + pdata->reg_offset; 1845a45c6cb8SMadhusudhan Chikkature host->base = ioremap(host->mapbase, SZ_4K); 18466da20c89SAdrian Hunter host->power_mode = MMC_POWER_OFF; 18479782aff8SPer Forlin host->next_data.cookie = 1; 1848a45c6cb8SMadhusudhan Chikkature 1849a45c6cb8SMadhusudhan Chikkature platform_set_drvdata(pdev, host); 1850a45c6cb8SMadhusudhan Chikkature 185170a3341aSDenis Karpov mmc->ops = &omap_hsmmc_ops; 1852dd498effSDenis Karpov 1853e0eb2424SAdrian Hunter /* 1854e0eb2424SAdrian Hunter * If regulator_disable can only put vcc_aux to sleep then there is 1855e0eb2424SAdrian Hunter * no off state. 1856e0eb2424SAdrian Hunter */ 1857e0eb2424SAdrian Hunter if (mmc_slot(host).vcc_aux_disable_is_sleep) 1858e0eb2424SAdrian Hunter mmc_slot(host).no_off = 1; 1859e0eb2424SAdrian Hunter 18606b206efeSAndy Shevchenko mmc->f_min = OMAP_MMC_MIN_CLOCK; 1861d418ed87SDaniel Mack 1862d418ed87SDaniel Mack if (pdata->max_freq > 0) 1863d418ed87SDaniel Mack mmc->f_max = pdata->max_freq; 1864d418ed87SDaniel Mack else 18656b206efeSAndy Shevchenko mmc->f_max = OMAP_MMC_MAX_CLOCK; 1866a45c6cb8SMadhusudhan Chikkature 18674dffd7a2SAdrian Hunter spin_lock_init(&host->irq_lock); 1868a45c6cb8SMadhusudhan Chikkature 18696f7607ccSRussell King host->fclk = clk_get(&pdev->dev, "fck"); 1870a45c6cb8SMadhusudhan Chikkature if (IS_ERR(host->fclk)) { 1871a45c6cb8SMadhusudhan Chikkature ret = PTR_ERR(host->fclk); 1872a45c6cb8SMadhusudhan Chikkature host->fclk = NULL; 1873a45c6cb8SMadhusudhan Chikkature goto err1; 1874a45c6cb8SMadhusudhan Chikkature } 1875a45c6cb8SMadhusudhan Chikkature 18769b68256cSPaul Walmsley if (host->pdata->controller_flags & OMAP_HSMMC_BROKEN_MULTIBLOCK_READ) { 18779b68256cSPaul Walmsley dev_info(&pdev->dev, "multiblock reads disabled due to 35xx erratum 2.1.1.128; MMC read performance may suffer\n"); 18789b68256cSPaul Walmsley mmc->caps2 |= MMC_CAP2_NO_MULTI_READ; 18799b68256cSPaul Walmsley } 1880dd498effSDenis Karpov 1881fa4aa2d4SBalaji T K pm_runtime_enable(host->dev); 1882fa4aa2d4SBalaji T K pm_runtime_get_sync(host->dev); 1883fa4aa2d4SBalaji T K pm_runtime_set_autosuspend_delay(host->dev, MMC_AUTOSUSPEND_DELAY); 1884fa4aa2d4SBalaji T K pm_runtime_use_autosuspend(host->dev); 1885a45c6cb8SMadhusudhan Chikkature 188692a3aebfSBalaji T K omap_hsmmc_context_save(host); 188792a3aebfSBalaji T K 18882bec0893SAdrian Hunter if (cpu_is_omap2430()) { 1889a45c6cb8SMadhusudhan Chikkature host->dbclk = clk_get(&pdev->dev, "mmchsdb_fck"); 1890a45c6cb8SMadhusudhan Chikkature /* 1891a45c6cb8SMadhusudhan Chikkature * MMC can still work without debounce clock. 1892a45c6cb8SMadhusudhan Chikkature */ 1893a45c6cb8SMadhusudhan Chikkature if (IS_ERR(host->dbclk)) 18942bec0893SAdrian Hunter dev_warn(mmc_dev(host->mmc), 18952bec0893SAdrian Hunter "Failed to get debounce clock\n"); 1896a45c6cb8SMadhusudhan Chikkature else 18972bec0893SAdrian Hunter host->got_dbclk = 1; 18982bec0893SAdrian Hunter 18992bec0893SAdrian Hunter if (host->got_dbclk) 1900a45c6cb8SMadhusudhan Chikkature if (clk_enable(host->dbclk) != 0) 1901a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Enabling debounce" 1902a45c6cb8SMadhusudhan Chikkature " clk failed\n"); 19032bec0893SAdrian Hunter } 1904a45c6cb8SMadhusudhan Chikkature 19050ccd76d4SJuha Yrjola /* Since we do only SG emulation, we can have as many segs 19060ccd76d4SJuha Yrjola * as we want. */ 1907a36274e0SMartin K. Petersen mmc->max_segs = 1024; 19080ccd76d4SJuha Yrjola 1909a45c6cb8SMadhusudhan Chikkature mmc->max_blk_size = 512; /* Block Length at max can be 1024 */ 1910a45c6cb8SMadhusudhan Chikkature mmc->max_blk_count = 0xFFFF; /* No. of Blocks is 16 bits */ 1911a45c6cb8SMadhusudhan Chikkature mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; 1912a45c6cb8SMadhusudhan Chikkature mmc->max_seg_size = mmc->max_req_size; 1913a45c6cb8SMadhusudhan Chikkature 191413189e78SJarkko Lavinen mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED | 191593caf8e6SAdrian Hunter MMC_CAP_WAIT_WHILE_BUSY | MMC_CAP_ERASE; 1916a45c6cb8SMadhusudhan Chikkature 19173a63833eSSukumar Ghorai mmc->caps |= mmc_slot(host).caps; 19183a63833eSSukumar Ghorai if (mmc->caps & MMC_CAP_8_BIT_DATA) 1919a45c6cb8SMadhusudhan Chikkature mmc->caps |= MMC_CAP_4_BIT_DATA; 1920a45c6cb8SMadhusudhan Chikkature 1921191d1f1dSDenis Karpov if (mmc_slot(host).nonremovable) 192223d99bb9SAdrian Hunter mmc->caps |= MMC_CAP_NONREMOVABLE; 192323d99bb9SAdrian Hunter 19246fdc75deSEliad Peller mmc->pm_caps = mmc_slot(host).pm_caps; 19256fdc75deSEliad Peller 192670a3341aSDenis Karpov omap_hsmmc_conf_bus_power(host); 1927a45c6cb8SMadhusudhan Chikkature 1928b7bf773bSBalaji T K res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "tx"); 1929b7bf773bSBalaji T K if (!res) { 1930b7bf773bSBalaji T K dev_err(mmc_dev(host->mmc), "cannot get DMA TX channel\n"); 1931f3e2f1ddSGrazvydas Ignotas goto err_irq; 1932a45c6cb8SMadhusudhan Chikkature } 1933b7bf773bSBalaji T K host->dma_line_tx = res->start; 1934b7bf773bSBalaji T K 1935b7bf773bSBalaji T K res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "rx"); 1936b7bf773bSBalaji T K if (!res) { 1937b7bf773bSBalaji T K dev_err(mmc_dev(host->mmc), "cannot get DMA RX channel\n"); 1938b7bf773bSBalaji T K goto err_irq; 1939b7bf773bSBalaji T K } 1940b7bf773bSBalaji T K host->dma_line_rx = res->start; 1941a45c6cb8SMadhusudhan Chikkature 1942a45c6cb8SMadhusudhan Chikkature /* Request IRQ for MMC operations */ 1943d9618e9fSYong Zhang ret = request_irq(host->irq, omap_hsmmc_irq, 0, 1944a45c6cb8SMadhusudhan Chikkature mmc_hostname(mmc), host); 1945a45c6cb8SMadhusudhan Chikkature if (ret) { 1946a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Unable to grab HSMMC IRQ\n"); 1947a45c6cb8SMadhusudhan Chikkature goto err_irq; 1948a45c6cb8SMadhusudhan Chikkature } 1949a45c6cb8SMadhusudhan Chikkature 1950a45c6cb8SMadhusudhan Chikkature if (pdata->init != NULL) { 1951a45c6cb8SMadhusudhan Chikkature if (pdata->init(&pdev->dev) != 0) { 195270a3341aSDenis Karpov dev_dbg(mmc_dev(host->mmc), 195370a3341aSDenis Karpov "Unable to configure MMC IRQs\n"); 1954a45c6cb8SMadhusudhan Chikkature goto err_irq_cd_init; 1955a45c6cb8SMadhusudhan Chikkature } 1956a45c6cb8SMadhusudhan Chikkature } 1957db0fefc5SAdrian Hunter 1958b702b106SAdrian Hunter if (omap_hsmmc_have_reg() && !mmc_slot(host).set_power) { 1959db0fefc5SAdrian Hunter ret = omap_hsmmc_reg_get(host); 1960db0fefc5SAdrian Hunter if (ret) 1961db0fefc5SAdrian Hunter goto err_reg; 1962db0fefc5SAdrian Hunter host->use_reg = 1; 1963db0fefc5SAdrian Hunter } 1964db0fefc5SAdrian Hunter 1965b583f26dSDavid Brownell mmc->ocr_avail = mmc_slot(host).ocr_mask; 1966a45c6cb8SMadhusudhan Chikkature 1967a45c6cb8SMadhusudhan Chikkature /* Request IRQ for card detect */ 1968e1a55f5eSAdrian Hunter if ((mmc_slot(host).card_detect_irq)) { 19697efab4f3SNeilBrown ret = request_threaded_irq(mmc_slot(host).card_detect_irq, 19707efab4f3SNeilBrown NULL, 19717efab4f3SNeilBrown omap_hsmmc_detect, 1972d9618e9fSYong Zhang IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, 1973a45c6cb8SMadhusudhan Chikkature mmc_hostname(mmc), host); 1974a45c6cb8SMadhusudhan Chikkature if (ret) { 1975a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1976a45c6cb8SMadhusudhan Chikkature "Unable to grab MMC CD IRQ\n"); 1977a45c6cb8SMadhusudhan Chikkature goto err_irq_cd; 1978a45c6cb8SMadhusudhan Chikkature } 197972f2e2c7Skishore kadiyala pdata->suspend = omap_hsmmc_suspend_cdirq; 198072f2e2c7Skishore kadiyala pdata->resume = omap_hsmmc_resume_cdirq; 1981a45c6cb8SMadhusudhan Chikkature } 1982a45c6cb8SMadhusudhan Chikkature 1983b417577dSAdrian Hunter omap_hsmmc_disable_irq(host); 1984a45c6cb8SMadhusudhan Chikkature 1985b62f6228SAdrian Hunter omap_hsmmc_protect_card(host); 1986b62f6228SAdrian Hunter 1987a45c6cb8SMadhusudhan Chikkature mmc_add_host(mmc); 1988a45c6cb8SMadhusudhan Chikkature 1989191d1f1dSDenis Karpov if (mmc_slot(host).name != NULL) { 1990a45c6cb8SMadhusudhan Chikkature ret = device_create_file(&mmc->class_dev, &dev_attr_slot_name); 1991a45c6cb8SMadhusudhan Chikkature if (ret < 0) 1992a45c6cb8SMadhusudhan Chikkature goto err_slot_name; 1993a45c6cb8SMadhusudhan Chikkature } 1994191d1f1dSDenis Karpov if (mmc_slot(host).card_detect_irq && mmc_slot(host).get_cover_state) { 1995a45c6cb8SMadhusudhan Chikkature ret = device_create_file(&mmc->class_dev, 1996a45c6cb8SMadhusudhan Chikkature &dev_attr_cover_switch); 1997a45c6cb8SMadhusudhan Chikkature if (ret < 0) 1998db0fefc5SAdrian Hunter goto err_slot_name; 1999a45c6cb8SMadhusudhan Chikkature } 2000a45c6cb8SMadhusudhan Chikkature 200170a3341aSDenis Karpov omap_hsmmc_debugfs(mmc); 2002fa4aa2d4SBalaji T K pm_runtime_mark_last_busy(host->dev); 2003fa4aa2d4SBalaji T K pm_runtime_put_autosuspend(host->dev); 2004d900f712SDenis Karpov 2005a45c6cb8SMadhusudhan Chikkature return 0; 2006a45c6cb8SMadhusudhan Chikkature 2007a45c6cb8SMadhusudhan Chikkature err_slot_name: 2008a45c6cb8SMadhusudhan Chikkature mmc_remove_host(mmc); 2009a45c6cb8SMadhusudhan Chikkature free_irq(mmc_slot(host).card_detect_irq, host); 2010db0fefc5SAdrian Hunter err_irq_cd: 2011db0fefc5SAdrian Hunter if (host->use_reg) 2012db0fefc5SAdrian Hunter omap_hsmmc_reg_put(host); 2013db0fefc5SAdrian Hunter err_reg: 2014db0fefc5SAdrian Hunter if (host->pdata->cleanup) 2015db0fefc5SAdrian Hunter host->pdata->cleanup(&pdev->dev); 2016a45c6cb8SMadhusudhan Chikkature err_irq_cd_init: 2017a45c6cb8SMadhusudhan Chikkature free_irq(host->irq, host); 2018a45c6cb8SMadhusudhan Chikkature err_irq: 2019d59d77edSBalaji T K pm_runtime_put_sync(host->dev); 202037f6190dSTony Lindgren pm_runtime_disable(host->dev); 2021a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 20222bec0893SAdrian Hunter if (host->got_dbclk) { 2023a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 2024a45c6cb8SMadhusudhan Chikkature clk_put(host->dbclk); 2025a45c6cb8SMadhusudhan Chikkature } 2026a45c6cb8SMadhusudhan Chikkature err1: 2027a45c6cb8SMadhusudhan Chikkature iounmap(host->base); 2028db0fefc5SAdrian Hunter platform_set_drvdata(pdev, NULL); 2029a45c6cb8SMadhusudhan Chikkature mmc_free_host(mmc); 2030db0fefc5SAdrian Hunter err_alloc: 2031db0fefc5SAdrian Hunter omap_hsmmc_gpio_free(pdata); 2032db0fefc5SAdrian Hunter err: 2033984b203aSChris Ball release_mem_region(res->start, resource_size(res)); 2034a45c6cb8SMadhusudhan Chikkature return ret; 2035a45c6cb8SMadhusudhan Chikkature } 2036a45c6cb8SMadhusudhan Chikkature 2037efa25fd3SFelipe Balbi static int __devexit omap_hsmmc_remove(struct platform_device *pdev) 2038a45c6cb8SMadhusudhan Chikkature { 203970a3341aSDenis Karpov struct omap_hsmmc_host *host = platform_get_drvdata(pdev); 2040a45c6cb8SMadhusudhan Chikkature struct resource *res; 2041a45c6cb8SMadhusudhan Chikkature 2042fa4aa2d4SBalaji T K pm_runtime_get_sync(host->dev); 2043a45c6cb8SMadhusudhan Chikkature mmc_remove_host(host->mmc); 2044db0fefc5SAdrian Hunter if (host->use_reg) 2045db0fefc5SAdrian Hunter omap_hsmmc_reg_put(host); 2046a45c6cb8SMadhusudhan Chikkature if (host->pdata->cleanup) 2047a45c6cb8SMadhusudhan Chikkature host->pdata->cleanup(&pdev->dev); 2048a45c6cb8SMadhusudhan Chikkature free_irq(host->irq, host); 2049a45c6cb8SMadhusudhan Chikkature if (mmc_slot(host).card_detect_irq) 2050a45c6cb8SMadhusudhan Chikkature free_irq(mmc_slot(host).card_detect_irq, host); 2051a45c6cb8SMadhusudhan Chikkature 2052fa4aa2d4SBalaji T K pm_runtime_put_sync(host->dev); 2053fa4aa2d4SBalaji T K pm_runtime_disable(host->dev); 2054a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 20552bec0893SAdrian Hunter if (host->got_dbclk) { 2056a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 2057a45c6cb8SMadhusudhan Chikkature clk_put(host->dbclk); 2058a45c6cb8SMadhusudhan Chikkature } 2059a45c6cb8SMadhusudhan Chikkature 2060a45c6cb8SMadhusudhan Chikkature mmc_free_host(host->mmc); 2061a45c6cb8SMadhusudhan Chikkature iounmap(host->base); 2062db0fefc5SAdrian Hunter omap_hsmmc_gpio_free(pdev->dev.platform_data); 2063a45c6cb8SMadhusudhan Chikkature 2064a45c6cb8SMadhusudhan Chikkature res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2065a45c6cb8SMadhusudhan Chikkature if (res) 2066984b203aSChris Ball release_mem_region(res->start, resource_size(res)); 2067a45c6cb8SMadhusudhan Chikkature platform_set_drvdata(pdev, NULL); 2068a45c6cb8SMadhusudhan Chikkature 2069a45c6cb8SMadhusudhan Chikkature return 0; 2070a45c6cb8SMadhusudhan Chikkature } 2071a45c6cb8SMadhusudhan Chikkature 2072a45c6cb8SMadhusudhan Chikkature #ifdef CONFIG_PM 2073a791daa1SKevin Hilman static int omap_hsmmc_suspend(struct device *dev) 2074a45c6cb8SMadhusudhan Chikkature { 2075a45c6cb8SMadhusudhan Chikkature int ret = 0; 2076927ce944SFelipe Balbi struct omap_hsmmc_host *host = dev_get_drvdata(dev); 2077927ce944SFelipe Balbi 2078927ce944SFelipe Balbi if (!host) 2079927ce944SFelipe Balbi return 0; 2080a45c6cb8SMadhusudhan Chikkature 2081a45c6cb8SMadhusudhan Chikkature if (host && host->suspended) 2082a45c6cb8SMadhusudhan Chikkature return 0; 2083a45c6cb8SMadhusudhan Chikkature 2084fa4aa2d4SBalaji T K pm_runtime_get_sync(host->dev); 2085a45c6cb8SMadhusudhan Chikkature host->suspended = 1; 2086a45c6cb8SMadhusudhan Chikkature if (host->pdata->suspend) { 2087927ce944SFelipe Balbi ret = host->pdata->suspend(dev, host->slot_id); 2088a6b2240dSAdrian Hunter if (ret) { 2089927ce944SFelipe Balbi dev_dbg(dev, "Unable to handle MMC board" 2090a45c6cb8SMadhusudhan Chikkature " level suspend\n"); 2091a6b2240dSAdrian Hunter host->suspended = 0; 2092a6b2240dSAdrian Hunter return ret; 2093a45c6cb8SMadhusudhan Chikkature } 2094a6b2240dSAdrian Hunter } 20951a13f8faSMatt Fleming ret = mmc_suspend_host(host->mmc); 2096fa4aa2d4SBalaji T K 209731f9d463SEliad Peller if (ret) { 2098a6b2240dSAdrian Hunter host->suspended = 0; 2099a6b2240dSAdrian Hunter if (host->pdata->resume) { 2100927ce944SFelipe Balbi ret = host->pdata->resume(dev, host->slot_id); 2101a6b2240dSAdrian Hunter if (ret) 2102927ce944SFelipe Balbi dev_dbg(dev, "Unmask interrupt failed\n"); 2103a6b2240dSAdrian Hunter } 210431f9d463SEliad Peller goto err; 2105a6b2240dSAdrian Hunter } 210631f9d463SEliad Peller 210731f9d463SEliad Peller if (!(host->mmc->pm_flags & MMC_PM_KEEP_POWER)) { 210831f9d463SEliad Peller omap_hsmmc_disable_irq(host); 210931f9d463SEliad Peller OMAP_HSMMC_WRITE(host->base, HCTL, 211031f9d463SEliad Peller OMAP_HSMMC_READ(host->base, HCTL) & ~SDBP); 211131f9d463SEliad Peller } 2112927ce944SFelipe Balbi 211331f9d463SEliad Peller if (host->got_dbclk) 211431f9d463SEliad Peller clk_disable(host->dbclk); 211531f9d463SEliad Peller err: 2116fa4aa2d4SBalaji T K pm_runtime_put_sync(host->dev); 2117a45c6cb8SMadhusudhan Chikkature return ret; 2118a45c6cb8SMadhusudhan Chikkature } 2119a45c6cb8SMadhusudhan Chikkature 2120a45c6cb8SMadhusudhan Chikkature /* Routine to resume the MMC device */ 2121a791daa1SKevin Hilman static int omap_hsmmc_resume(struct device *dev) 2122a45c6cb8SMadhusudhan Chikkature { 2123a45c6cb8SMadhusudhan Chikkature int ret = 0; 2124927ce944SFelipe Balbi struct omap_hsmmc_host *host = dev_get_drvdata(dev); 2125927ce944SFelipe Balbi 2126927ce944SFelipe Balbi if (!host) 2127927ce944SFelipe Balbi return 0; 2128a45c6cb8SMadhusudhan Chikkature 2129a45c6cb8SMadhusudhan Chikkature if (host && !host->suspended) 2130a45c6cb8SMadhusudhan Chikkature return 0; 2131a45c6cb8SMadhusudhan Chikkature 2132fa4aa2d4SBalaji T K pm_runtime_get_sync(host->dev); 213311dd62a7SDenis Karpov 21342bec0893SAdrian Hunter if (host->got_dbclk) 21352bec0893SAdrian Hunter clk_enable(host->dbclk); 21362bec0893SAdrian Hunter 213731f9d463SEliad Peller if (!(host->mmc->pm_flags & MMC_PM_KEEP_POWER)) 213870a3341aSDenis Karpov omap_hsmmc_conf_bus_power(host); 21391b331e69SKim Kyuwon 2140a45c6cb8SMadhusudhan Chikkature if (host->pdata->resume) { 2141927ce944SFelipe Balbi ret = host->pdata->resume(dev, host->slot_id); 2142a45c6cb8SMadhusudhan Chikkature if (ret) 2143927ce944SFelipe Balbi dev_dbg(dev, "Unmask interrupt failed\n"); 2144a45c6cb8SMadhusudhan Chikkature } 2145a45c6cb8SMadhusudhan Chikkature 2146b62f6228SAdrian Hunter omap_hsmmc_protect_card(host); 2147b62f6228SAdrian Hunter 2148a45c6cb8SMadhusudhan Chikkature /* Notify the core to resume the host */ 2149a45c6cb8SMadhusudhan Chikkature ret = mmc_resume_host(host->mmc); 2150a45c6cb8SMadhusudhan Chikkature if (ret == 0) 2151a45c6cb8SMadhusudhan Chikkature host->suspended = 0; 2152fa4aa2d4SBalaji T K 2153fa4aa2d4SBalaji T K pm_runtime_mark_last_busy(host->dev); 2154fa4aa2d4SBalaji T K pm_runtime_put_autosuspend(host->dev); 2155a45c6cb8SMadhusudhan Chikkature 2156a45c6cb8SMadhusudhan Chikkature return ret; 2157a45c6cb8SMadhusudhan Chikkature 2158a45c6cb8SMadhusudhan Chikkature } 2159a45c6cb8SMadhusudhan Chikkature 2160a45c6cb8SMadhusudhan Chikkature #else 216170a3341aSDenis Karpov #define omap_hsmmc_suspend NULL 216270a3341aSDenis Karpov #define omap_hsmmc_resume NULL 2163a45c6cb8SMadhusudhan Chikkature #endif 2164a45c6cb8SMadhusudhan Chikkature 2165fa4aa2d4SBalaji T K static int omap_hsmmc_runtime_suspend(struct device *dev) 2166fa4aa2d4SBalaji T K { 2167fa4aa2d4SBalaji T K struct omap_hsmmc_host *host; 2168fa4aa2d4SBalaji T K 2169fa4aa2d4SBalaji T K host = platform_get_drvdata(to_platform_device(dev)); 2170fa4aa2d4SBalaji T K omap_hsmmc_context_save(host); 2171927ce944SFelipe Balbi dev_dbg(dev, "disabled\n"); 2172fa4aa2d4SBalaji T K 2173fa4aa2d4SBalaji T K return 0; 2174fa4aa2d4SBalaji T K } 2175fa4aa2d4SBalaji T K 2176fa4aa2d4SBalaji T K static int omap_hsmmc_runtime_resume(struct device *dev) 2177fa4aa2d4SBalaji T K { 2178fa4aa2d4SBalaji T K struct omap_hsmmc_host *host; 2179fa4aa2d4SBalaji T K 2180fa4aa2d4SBalaji T K host = platform_get_drvdata(to_platform_device(dev)); 2181fa4aa2d4SBalaji T K omap_hsmmc_context_restore(host); 2182927ce944SFelipe Balbi dev_dbg(dev, "enabled\n"); 2183fa4aa2d4SBalaji T K 2184fa4aa2d4SBalaji T K return 0; 2185fa4aa2d4SBalaji T K } 2186fa4aa2d4SBalaji T K 2187a791daa1SKevin Hilman static struct dev_pm_ops omap_hsmmc_dev_pm_ops = { 218870a3341aSDenis Karpov .suspend = omap_hsmmc_suspend, 218970a3341aSDenis Karpov .resume = omap_hsmmc_resume, 2190fa4aa2d4SBalaji T K .runtime_suspend = omap_hsmmc_runtime_suspend, 2191fa4aa2d4SBalaji T K .runtime_resume = omap_hsmmc_runtime_resume, 2192a791daa1SKevin Hilman }; 2193a791daa1SKevin Hilman 2194a791daa1SKevin Hilman static struct platform_driver omap_hsmmc_driver = { 2195efa25fd3SFelipe Balbi .probe = omap_hsmmc_probe, 2196efa25fd3SFelipe Balbi .remove = __devexit_p(omap_hsmmc_remove), 2197a45c6cb8SMadhusudhan Chikkature .driver = { 2198a45c6cb8SMadhusudhan Chikkature .name = DRIVER_NAME, 2199a45c6cb8SMadhusudhan Chikkature .owner = THIS_MODULE, 2200a791daa1SKevin Hilman .pm = &omap_hsmmc_dev_pm_ops, 220146856a68SRajendra Nayak .of_match_table = of_match_ptr(omap_mmc_of_match), 2202a45c6cb8SMadhusudhan Chikkature }, 2203a45c6cb8SMadhusudhan Chikkature }; 2204a45c6cb8SMadhusudhan Chikkature 2205b796450bSFelipe Balbi module_platform_driver(omap_hsmmc_driver); 2206a45c6cb8SMadhusudhan Chikkature MODULE_DESCRIPTION("OMAP High Speed Multimedia Card driver"); 2207a45c6cb8SMadhusudhan Chikkature MODULE_LICENSE("GPL"); 2208a45c6cb8SMadhusudhan Chikkature MODULE_ALIAS("platform:" DRIVER_NAME); 2209a45c6cb8SMadhusudhan Chikkature MODULE_AUTHOR("Texas Instruments Inc"); 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