1a45c6cb8SMadhusudhan Chikkature /* 2a45c6cb8SMadhusudhan Chikkature * drivers/mmc/host/omap_hsmmc.c 3a45c6cb8SMadhusudhan Chikkature * 4a45c6cb8SMadhusudhan Chikkature * Driver for OMAP2430/3430 MMC controller. 5a45c6cb8SMadhusudhan Chikkature * 6a45c6cb8SMadhusudhan Chikkature * Copyright (C) 2007 Texas Instruments. 7a45c6cb8SMadhusudhan Chikkature * 8a45c6cb8SMadhusudhan Chikkature * Authors: 9a45c6cb8SMadhusudhan Chikkature * Syed Mohammed Khasim <x0khasim@ti.com> 10a45c6cb8SMadhusudhan Chikkature * Madhusudhan <madhu.cr@ti.com> 11a45c6cb8SMadhusudhan Chikkature * Mohit Jalori <mjalori@ti.com> 12a45c6cb8SMadhusudhan Chikkature * 13a45c6cb8SMadhusudhan Chikkature * This file is licensed under the terms of the GNU General Public License 14a45c6cb8SMadhusudhan Chikkature * version 2. This program is licensed "as is" without any warranty of any 15a45c6cb8SMadhusudhan Chikkature * kind, whether express or implied. 16a45c6cb8SMadhusudhan Chikkature */ 17a45c6cb8SMadhusudhan Chikkature 18a45c6cb8SMadhusudhan Chikkature #include <linux/module.h> 19a45c6cb8SMadhusudhan Chikkature #include <linux/init.h> 20d900f712SDenis Karpov #include <linux/debugfs.h> 21d900f712SDenis Karpov #include <linux/seq_file.h> 22a45c6cb8SMadhusudhan Chikkature #include <linux/interrupt.h> 23a45c6cb8SMadhusudhan Chikkature #include <linux/delay.h> 24a45c6cb8SMadhusudhan Chikkature #include <linux/dma-mapping.h> 25a45c6cb8SMadhusudhan Chikkature #include <linux/platform_device.h> 26a45c6cb8SMadhusudhan Chikkature #include <linux/workqueue.h> 27a45c6cb8SMadhusudhan Chikkature #include <linux/timer.h> 28a45c6cb8SMadhusudhan Chikkature #include <linux/clk.h> 29a45c6cb8SMadhusudhan Chikkature #include <linux/mmc/host.h> 3013189e78SJarkko Lavinen #include <linux/mmc/core.h> 3193caf8e6SAdrian Hunter #include <linux/mmc/mmc.h> 32a45c6cb8SMadhusudhan Chikkature #include <linux/io.h> 33a45c6cb8SMadhusudhan Chikkature #include <linux/semaphore.h> 34db0fefc5SAdrian Hunter #include <linux/gpio.h> 35db0fefc5SAdrian Hunter #include <linux/regulator/consumer.h> 36fa4aa2d4SBalaji T K #include <linux/pm_runtime.h> 37ce491cf8STony Lindgren #include <plat/dma.h> 38a45c6cb8SMadhusudhan Chikkature #include <mach/hardware.h> 39ce491cf8STony Lindgren #include <plat/board.h> 40ce491cf8STony Lindgren #include <plat/mmc.h> 41ce491cf8STony Lindgren #include <plat/cpu.h> 42a45c6cb8SMadhusudhan Chikkature 43a45c6cb8SMadhusudhan Chikkature /* OMAP HSMMC Host Controller Registers */ 44a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_SYSCONFIG 0x0010 4511dd62a7SDenis Karpov #define OMAP_HSMMC_SYSSTATUS 0x0014 46a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_CON 0x002C 47a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_BLK 0x0104 48a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_ARG 0x0108 49a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_CMD 0x010C 50a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP10 0x0110 51a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP32 0x0114 52a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP54 0x0118 53a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP76 0x011C 54a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_DATA 0x0120 55a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_HCTL 0x0128 56a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_SYSCTL 0x012C 57a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_STAT 0x0130 58a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_IE 0x0134 59a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_ISE 0x0138 60a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_CAPA 0x0140 61a45c6cb8SMadhusudhan Chikkature 62a45c6cb8SMadhusudhan Chikkature #define VS18 (1 << 26) 63a45c6cb8SMadhusudhan Chikkature #define VS30 (1 << 25) 64a45c6cb8SMadhusudhan Chikkature #define SDVS18 (0x5 << 9) 65a45c6cb8SMadhusudhan Chikkature #define SDVS30 (0x6 << 9) 66eb250826SDavid Brownell #define SDVS33 (0x7 << 9) 671b331e69SKim Kyuwon #define SDVS_MASK 0x00000E00 68a45c6cb8SMadhusudhan Chikkature #define SDVSCLR 0xFFFFF1FF 69a45c6cb8SMadhusudhan Chikkature #define SDVSDET 0x00000400 70a45c6cb8SMadhusudhan Chikkature #define AUTOIDLE 0x1 71a45c6cb8SMadhusudhan Chikkature #define SDBP (1 << 8) 72a45c6cb8SMadhusudhan Chikkature #define DTO 0xe 73a45c6cb8SMadhusudhan Chikkature #define ICE 0x1 74a45c6cb8SMadhusudhan Chikkature #define ICS 0x2 75a45c6cb8SMadhusudhan Chikkature #define CEN (1 << 2) 76a45c6cb8SMadhusudhan Chikkature #define CLKD_MASK 0x0000FFC0 77a45c6cb8SMadhusudhan Chikkature #define CLKD_SHIFT 6 78a45c6cb8SMadhusudhan Chikkature #define DTO_MASK 0x000F0000 79a45c6cb8SMadhusudhan Chikkature #define DTO_SHIFT 16 80a45c6cb8SMadhusudhan Chikkature #define INT_EN_MASK 0x307F0033 81ccdfe3a6SAnand Gadiyar #define BWR_ENABLE (1 << 4) 82ccdfe3a6SAnand Gadiyar #define BRR_ENABLE (1 << 5) 8393caf8e6SAdrian Hunter #define DTO_ENABLE (1 << 20) 84a45c6cb8SMadhusudhan Chikkature #define INIT_STREAM (1 << 1) 85a45c6cb8SMadhusudhan Chikkature #define DP_SELECT (1 << 21) 86a45c6cb8SMadhusudhan Chikkature #define DDIR (1 << 4) 87a45c6cb8SMadhusudhan Chikkature #define DMA_EN 0x1 88a45c6cb8SMadhusudhan Chikkature #define MSBS (1 << 5) 89a45c6cb8SMadhusudhan Chikkature #define BCE (1 << 1) 90a45c6cb8SMadhusudhan Chikkature #define FOUR_BIT (1 << 1) 9173153010SJarkko Lavinen #define DW8 (1 << 5) 92a45c6cb8SMadhusudhan Chikkature #define CC 0x1 93a45c6cb8SMadhusudhan Chikkature #define TC 0x02 94a45c6cb8SMadhusudhan Chikkature #define OD 0x1 95a45c6cb8SMadhusudhan Chikkature #define ERR (1 << 15) 96a45c6cb8SMadhusudhan Chikkature #define CMD_TIMEOUT (1 << 16) 97a45c6cb8SMadhusudhan Chikkature #define DATA_TIMEOUT (1 << 20) 98a45c6cb8SMadhusudhan Chikkature #define CMD_CRC (1 << 17) 99a45c6cb8SMadhusudhan Chikkature #define DATA_CRC (1 << 21) 100a45c6cb8SMadhusudhan Chikkature #define CARD_ERR (1 << 28) 101a45c6cb8SMadhusudhan Chikkature #define STAT_CLEAR 0xFFFFFFFF 102a45c6cb8SMadhusudhan Chikkature #define INIT_STREAM_CMD 0x00000000 103a45c6cb8SMadhusudhan Chikkature #define DUAL_VOLT_OCR_BIT 7 104a45c6cb8SMadhusudhan Chikkature #define SRC (1 << 25) 105a45c6cb8SMadhusudhan Chikkature #define SRD (1 << 26) 10611dd62a7SDenis Karpov #define SOFTRESET (1 << 1) 10711dd62a7SDenis Karpov #define RESETDONE (1 << 0) 108a45c6cb8SMadhusudhan Chikkature 109a45c6cb8SMadhusudhan Chikkature /* 110a45c6cb8SMadhusudhan Chikkature * FIXME: Most likely all the data using these _DEVID defines should come 111a45c6cb8SMadhusudhan Chikkature * from the platform_data, or implemented in controller and slot specific 112a45c6cb8SMadhusudhan Chikkature * functions. 113a45c6cb8SMadhusudhan Chikkature */ 114a45c6cb8SMadhusudhan Chikkature #define OMAP_MMC1_DEVID 0 115a45c6cb8SMadhusudhan Chikkature #define OMAP_MMC2_DEVID 1 116f3e2f1ddSGrazvydas Ignotas #define OMAP_MMC3_DEVID 2 11782cf818dSkishore kadiyala #define OMAP_MMC4_DEVID 3 11882cf818dSkishore kadiyala #define OMAP_MMC5_DEVID 4 119a45c6cb8SMadhusudhan Chikkature 120fa4aa2d4SBalaji T K #define MMC_AUTOSUSPEND_DELAY 100 121a45c6cb8SMadhusudhan Chikkature #define MMC_TIMEOUT_MS 20 122a45c6cb8SMadhusudhan Chikkature #define OMAP_MMC_MASTER_CLOCK 96000000 1236b206efeSAndy Shevchenko #define OMAP_MMC_MIN_CLOCK 400000 1246b206efeSAndy Shevchenko #define OMAP_MMC_MAX_CLOCK 52000000 1250005ae73SKishore Kadiyala #define DRIVER_NAME "omap_hsmmc" 126a45c6cb8SMadhusudhan Chikkature 127a45c6cb8SMadhusudhan Chikkature /* 128a45c6cb8SMadhusudhan Chikkature * One controller can have multiple slots, like on some omap boards using 129a45c6cb8SMadhusudhan Chikkature * omap.c controller driver. Luckily this is not currently done on any known 130a45c6cb8SMadhusudhan Chikkature * omap_hsmmc.c device. 131a45c6cb8SMadhusudhan Chikkature */ 132a45c6cb8SMadhusudhan Chikkature #define mmc_slot(host) (host->pdata->slots[host->slot_id]) 133a45c6cb8SMadhusudhan Chikkature 134a45c6cb8SMadhusudhan Chikkature /* 135a45c6cb8SMadhusudhan Chikkature * MMC Host controller read/write API's 136a45c6cb8SMadhusudhan Chikkature */ 137a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_READ(base, reg) \ 138a45c6cb8SMadhusudhan Chikkature __raw_readl((base) + OMAP_HSMMC_##reg) 139a45c6cb8SMadhusudhan Chikkature 140a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_WRITE(base, reg, val) \ 141a45c6cb8SMadhusudhan Chikkature __raw_writel((val), (base) + OMAP_HSMMC_##reg) 142a45c6cb8SMadhusudhan Chikkature 1439782aff8SPer Forlin struct omap_hsmmc_next { 1449782aff8SPer Forlin unsigned int dma_len; 1459782aff8SPer Forlin s32 cookie; 1469782aff8SPer Forlin }; 1479782aff8SPer Forlin 14870a3341aSDenis Karpov struct omap_hsmmc_host { 149a45c6cb8SMadhusudhan Chikkature struct device *dev; 150a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc; 151a45c6cb8SMadhusudhan Chikkature struct mmc_request *mrq; 152a45c6cb8SMadhusudhan Chikkature struct mmc_command *cmd; 153a45c6cb8SMadhusudhan Chikkature struct mmc_data *data; 154a45c6cb8SMadhusudhan Chikkature struct clk *fclk; 155a45c6cb8SMadhusudhan Chikkature struct clk *dbclk; 156db0fefc5SAdrian Hunter /* 157db0fefc5SAdrian Hunter * vcc == configured supply 158db0fefc5SAdrian Hunter * vcc_aux == optional 159db0fefc5SAdrian Hunter * - MMC1, supply for DAT4..DAT7 160db0fefc5SAdrian Hunter * - MMC2/MMC2, external level shifter voltage supply, for 161db0fefc5SAdrian Hunter * chip (SDIO, eMMC, etc) or transceiver (MMC2 only) 162db0fefc5SAdrian Hunter */ 163db0fefc5SAdrian Hunter struct regulator *vcc; 164db0fefc5SAdrian Hunter struct regulator *vcc_aux; 165a45c6cb8SMadhusudhan Chikkature struct work_struct mmc_carddetect_work; 166a45c6cb8SMadhusudhan Chikkature void __iomem *base; 167a45c6cb8SMadhusudhan Chikkature resource_size_t mapbase; 1684dffd7a2SAdrian Hunter spinlock_t irq_lock; /* Prevent races with irq handler */ 169a45c6cb8SMadhusudhan Chikkature unsigned int id; 170a45c6cb8SMadhusudhan Chikkature unsigned int dma_len; 1710ccd76d4SJuha Yrjola unsigned int dma_sg_idx; 172a45c6cb8SMadhusudhan Chikkature unsigned char bus_mode; 173a3621465SAdrian Hunter unsigned char power_mode; 174a45c6cb8SMadhusudhan Chikkature u32 *buffer; 175a45c6cb8SMadhusudhan Chikkature u32 bytesleft; 176a45c6cb8SMadhusudhan Chikkature int suspended; 177a45c6cb8SMadhusudhan Chikkature int irq; 178a45c6cb8SMadhusudhan Chikkature int use_dma, dma_ch; 179f3e2f1ddSGrazvydas Ignotas int dma_line_tx, dma_line_rx; 180a45c6cb8SMadhusudhan Chikkature int slot_id; 1812bec0893SAdrian Hunter int got_dbclk; 1824a694dc9SAdrian Hunter int response_busy; 18311dd62a7SDenis Karpov int context_loss; 184dd498effSDenis Karpov int dpm_state; 185623821f7SAdrian Hunter int vdd; 186b62f6228SAdrian Hunter int protect_card; 187b62f6228SAdrian Hunter int reqs_blocked; 188db0fefc5SAdrian Hunter int use_reg; 189b417577dSAdrian Hunter int req_in_progress; 1909782aff8SPer Forlin struct omap_hsmmc_next next_data; 19111dd62a7SDenis Karpov 192a45c6cb8SMadhusudhan Chikkature struct omap_mmc_platform_data *pdata; 193a45c6cb8SMadhusudhan Chikkature }; 194a45c6cb8SMadhusudhan Chikkature 195db0fefc5SAdrian Hunter static int omap_hsmmc_card_detect(struct device *dev, int slot) 196db0fefc5SAdrian Hunter { 197db0fefc5SAdrian Hunter struct omap_mmc_platform_data *mmc = dev->platform_data; 198db0fefc5SAdrian Hunter 199db0fefc5SAdrian Hunter /* NOTE: assumes card detect signal is active-low */ 200db0fefc5SAdrian Hunter return !gpio_get_value_cansleep(mmc->slots[0].switch_pin); 201db0fefc5SAdrian Hunter } 202db0fefc5SAdrian Hunter 203db0fefc5SAdrian Hunter static int omap_hsmmc_get_wp(struct device *dev, int slot) 204db0fefc5SAdrian Hunter { 205db0fefc5SAdrian Hunter struct omap_mmc_platform_data *mmc = dev->platform_data; 206db0fefc5SAdrian Hunter 207db0fefc5SAdrian Hunter /* NOTE: assumes write protect signal is active-high */ 208db0fefc5SAdrian Hunter return gpio_get_value_cansleep(mmc->slots[0].gpio_wp); 209db0fefc5SAdrian Hunter } 210db0fefc5SAdrian Hunter 211db0fefc5SAdrian Hunter static int omap_hsmmc_get_cover_state(struct device *dev, int slot) 212db0fefc5SAdrian Hunter { 213db0fefc5SAdrian Hunter struct omap_mmc_platform_data *mmc = dev->platform_data; 214db0fefc5SAdrian Hunter 215db0fefc5SAdrian Hunter /* NOTE: assumes card detect signal is active-low */ 216db0fefc5SAdrian Hunter return !gpio_get_value_cansleep(mmc->slots[0].switch_pin); 217db0fefc5SAdrian Hunter } 218db0fefc5SAdrian Hunter 219db0fefc5SAdrian Hunter #ifdef CONFIG_PM 220db0fefc5SAdrian Hunter 221db0fefc5SAdrian Hunter static int omap_hsmmc_suspend_cdirq(struct device *dev, int slot) 222db0fefc5SAdrian Hunter { 223db0fefc5SAdrian Hunter struct omap_mmc_platform_data *mmc = dev->platform_data; 224db0fefc5SAdrian Hunter 225db0fefc5SAdrian Hunter disable_irq(mmc->slots[0].card_detect_irq); 226db0fefc5SAdrian Hunter return 0; 227db0fefc5SAdrian Hunter } 228db0fefc5SAdrian Hunter 229db0fefc5SAdrian Hunter static int omap_hsmmc_resume_cdirq(struct device *dev, int slot) 230db0fefc5SAdrian Hunter { 231db0fefc5SAdrian Hunter struct omap_mmc_platform_data *mmc = dev->platform_data; 232db0fefc5SAdrian Hunter 233db0fefc5SAdrian Hunter enable_irq(mmc->slots[0].card_detect_irq); 234db0fefc5SAdrian Hunter return 0; 235db0fefc5SAdrian Hunter } 236db0fefc5SAdrian Hunter 237db0fefc5SAdrian Hunter #else 238db0fefc5SAdrian Hunter 239db0fefc5SAdrian Hunter #define omap_hsmmc_suspend_cdirq NULL 240db0fefc5SAdrian Hunter #define omap_hsmmc_resume_cdirq NULL 241db0fefc5SAdrian Hunter 242db0fefc5SAdrian Hunter #endif 243db0fefc5SAdrian Hunter 244b702b106SAdrian Hunter #ifdef CONFIG_REGULATOR 245b702b106SAdrian Hunter 246db0fefc5SAdrian Hunter static int omap_hsmmc_1_set_power(struct device *dev, int slot, int power_on, 247db0fefc5SAdrian Hunter int vdd) 248db0fefc5SAdrian Hunter { 249db0fefc5SAdrian Hunter struct omap_hsmmc_host *host = 250db0fefc5SAdrian Hunter platform_get_drvdata(to_platform_device(dev)); 251db0fefc5SAdrian Hunter int ret; 252db0fefc5SAdrian Hunter 253db0fefc5SAdrian Hunter if (mmc_slot(host).before_set_reg) 254db0fefc5SAdrian Hunter mmc_slot(host).before_set_reg(dev, slot, power_on, vdd); 255db0fefc5SAdrian Hunter 256db0fefc5SAdrian Hunter if (power_on) 25799fc5131SLinus Walleij ret = mmc_regulator_set_ocr(host->mmc, host->vcc, vdd); 258db0fefc5SAdrian Hunter else 25999fc5131SLinus Walleij ret = mmc_regulator_set_ocr(host->mmc, host->vcc, 0); 260db0fefc5SAdrian Hunter 261db0fefc5SAdrian Hunter if (mmc_slot(host).after_set_reg) 262db0fefc5SAdrian Hunter mmc_slot(host).after_set_reg(dev, slot, power_on, vdd); 263db0fefc5SAdrian Hunter 264db0fefc5SAdrian Hunter return ret; 265db0fefc5SAdrian Hunter } 266db0fefc5SAdrian Hunter 2677715db5aSKishore Kadiyala static int omap_hsmmc_235_set_power(struct device *dev, int slot, int power_on, 268db0fefc5SAdrian Hunter int vdd) 269db0fefc5SAdrian Hunter { 270db0fefc5SAdrian Hunter struct omap_hsmmc_host *host = 271db0fefc5SAdrian Hunter platform_get_drvdata(to_platform_device(dev)); 272db0fefc5SAdrian Hunter int ret = 0; 273db0fefc5SAdrian Hunter 274db0fefc5SAdrian Hunter /* 275db0fefc5SAdrian Hunter * If we don't see a Vcc regulator, assume it's a fixed 276db0fefc5SAdrian Hunter * voltage always-on regulator. 277db0fefc5SAdrian Hunter */ 278db0fefc5SAdrian Hunter if (!host->vcc) 279db0fefc5SAdrian Hunter return 0; 280db0fefc5SAdrian Hunter 281db0fefc5SAdrian Hunter if (mmc_slot(host).before_set_reg) 282db0fefc5SAdrian Hunter mmc_slot(host).before_set_reg(dev, slot, power_on, vdd); 283db0fefc5SAdrian Hunter 284db0fefc5SAdrian Hunter /* 285db0fefc5SAdrian Hunter * Assume Vcc regulator is used only to power the card ... OMAP 286db0fefc5SAdrian Hunter * VDDS is used to power the pins, optionally with a transceiver to 287db0fefc5SAdrian Hunter * support cards using voltages other than VDDS (1.8V nominal). When a 288db0fefc5SAdrian Hunter * transceiver is used, DAT3..7 are muxed as transceiver control pins. 289db0fefc5SAdrian Hunter * 290db0fefc5SAdrian Hunter * In some cases this regulator won't support enable/disable; 291db0fefc5SAdrian Hunter * e.g. it's a fixed rail for a WLAN chip. 292db0fefc5SAdrian Hunter * 293db0fefc5SAdrian Hunter * In other cases vcc_aux switches interface power. Example, for 294db0fefc5SAdrian Hunter * eMMC cards it represents VccQ. Sometimes transceivers or SDIO 295db0fefc5SAdrian Hunter * chips/cards need an interface voltage rail too. 296db0fefc5SAdrian Hunter */ 297db0fefc5SAdrian Hunter if (power_on) { 29899fc5131SLinus Walleij ret = mmc_regulator_set_ocr(host->mmc, host->vcc, vdd); 299db0fefc5SAdrian Hunter /* Enable interface voltage rail, if needed */ 300db0fefc5SAdrian Hunter if (ret == 0 && host->vcc_aux) { 301db0fefc5SAdrian Hunter ret = regulator_enable(host->vcc_aux); 302db0fefc5SAdrian Hunter if (ret < 0) 30399fc5131SLinus Walleij ret = mmc_regulator_set_ocr(host->mmc, 30499fc5131SLinus Walleij host->vcc, 0); 305db0fefc5SAdrian Hunter } 306db0fefc5SAdrian Hunter } else { 30799fc5131SLinus Walleij /* Shut down the rail */ 3086da20c89SAdrian Hunter if (host->vcc_aux) 309db0fefc5SAdrian Hunter ret = regulator_disable(host->vcc_aux); 31099fc5131SLinus Walleij if (!ret) { 31199fc5131SLinus Walleij /* Then proceed to shut down the local regulator */ 31299fc5131SLinus Walleij ret = mmc_regulator_set_ocr(host->mmc, 31399fc5131SLinus Walleij host->vcc, 0); 31499fc5131SLinus Walleij } 315db0fefc5SAdrian Hunter } 316db0fefc5SAdrian Hunter 317db0fefc5SAdrian Hunter if (mmc_slot(host).after_set_reg) 318db0fefc5SAdrian Hunter mmc_slot(host).after_set_reg(dev, slot, power_on, vdd); 319db0fefc5SAdrian Hunter 320db0fefc5SAdrian Hunter return ret; 321db0fefc5SAdrian Hunter } 322db0fefc5SAdrian Hunter 3237715db5aSKishore Kadiyala static int omap_hsmmc_4_set_power(struct device *dev, int slot, int power_on, 3247715db5aSKishore Kadiyala int vdd) 3257715db5aSKishore Kadiyala { 3267715db5aSKishore Kadiyala return 0; 3277715db5aSKishore Kadiyala } 3287715db5aSKishore Kadiyala 329db0fefc5SAdrian Hunter static int omap_hsmmc_1_set_sleep(struct device *dev, int slot, int sleep, 330db0fefc5SAdrian Hunter int vdd, int cardsleep) 331db0fefc5SAdrian Hunter { 332db0fefc5SAdrian Hunter struct omap_hsmmc_host *host = 333db0fefc5SAdrian Hunter platform_get_drvdata(to_platform_device(dev)); 334db0fefc5SAdrian Hunter int mode = sleep ? REGULATOR_MODE_STANDBY : REGULATOR_MODE_NORMAL; 335db0fefc5SAdrian Hunter 336db0fefc5SAdrian Hunter return regulator_set_mode(host->vcc, mode); 337db0fefc5SAdrian Hunter } 338db0fefc5SAdrian Hunter 3397715db5aSKishore Kadiyala static int omap_hsmmc_235_set_sleep(struct device *dev, int slot, int sleep, 340db0fefc5SAdrian Hunter int vdd, int cardsleep) 341db0fefc5SAdrian Hunter { 342db0fefc5SAdrian Hunter struct omap_hsmmc_host *host = 343db0fefc5SAdrian Hunter platform_get_drvdata(to_platform_device(dev)); 344db0fefc5SAdrian Hunter int err, mode; 345db0fefc5SAdrian Hunter 346db0fefc5SAdrian Hunter /* 347db0fefc5SAdrian Hunter * If we don't see a Vcc regulator, assume it's a fixed 348db0fefc5SAdrian Hunter * voltage always-on regulator. 349db0fefc5SAdrian Hunter */ 350db0fefc5SAdrian Hunter if (!host->vcc) 351db0fefc5SAdrian Hunter return 0; 352db0fefc5SAdrian Hunter 353db0fefc5SAdrian Hunter mode = sleep ? REGULATOR_MODE_STANDBY : REGULATOR_MODE_NORMAL; 354db0fefc5SAdrian Hunter 355db0fefc5SAdrian Hunter if (!host->vcc_aux) 356db0fefc5SAdrian Hunter return regulator_set_mode(host->vcc, mode); 357db0fefc5SAdrian Hunter 358db0fefc5SAdrian Hunter if (cardsleep) { 359db0fefc5SAdrian Hunter /* VCC can be turned off if card is asleep */ 360db0fefc5SAdrian Hunter if (sleep) 36199fc5131SLinus Walleij err = mmc_regulator_set_ocr(host->mmc, host->vcc, 0); 362db0fefc5SAdrian Hunter else 36399fc5131SLinus Walleij err = mmc_regulator_set_ocr(host->mmc, host->vcc, vdd); 364db0fefc5SAdrian Hunter } else 365db0fefc5SAdrian Hunter err = regulator_set_mode(host->vcc, mode); 366db0fefc5SAdrian Hunter if (err) 367db0fefc5SAdrian Hunter return err; 368e0eb2424SAdrian Hunter 369e0eb2424SAdrian Hunter if (!mmc_slot(host).vcc_aux_disable_is_sleep) 370db0fefc5SAdrian Hunter return regulator_set_mode(host->vcc_aux, mode); 371e0eb2424SAdrian Hunter 372e0eb2424SAdrian Hunter if (sleep) 373e0eb2424SAdrian Hunter return regulator_disable(host->vcc_aux); 374e0eb2424SAdrian Hunter else 375e0eb2424SAdrian Hunter return regulator_enable(host->vcc_aux); 376db0fefc5SAdrian Hunter } 377db0fefc5SAdrian Hunter 3787715db5aSKishore Kadiyala static int omap_hsmmc_4_set_sleep(struct device *dev, int slot, int sleep, 3797715db5aSKishore Kadiyala int vdd, int cardsleep) 3807715db5aSKishore Kadiyala { 3817715db5aSKishore Kadiyala return 0; 3827715db5aSKishore Kadiyala } 3837715db5aSKishore Kadiyala 384db0fefc5SAdrian Hunter static int omap_hsmmc_reg_get(struct omap_hsmmc_host *host) 385db0fefc5SAdrian Hunter { 386db0fefc5SAdrian Hunter struct regulator *reg; 387db0fefc5SAdrian Hunter int ret = 0; 38864be9782Skishore kadiyala int ocr_value = 0; 389db0fefc5SAdrian Hunter 390db0fefc5SAdrian Hunter switch (host->id) { 391db0fefc5SAdrian Hunter case OMAP_MMC1_DEVID: 392db0fefc5SAdrian Hunter /* On-chip level shifting via PBIAS0/PBIAS1 */ 393db0fefc5SAdrian Hunter mmc_slot(host).set_power = omap_hsmmc_1_set_power; 394db0fefc5SAdrian Hunter mmc_slot(host).set_sleep = omap_hsmmc_1_set_sleep; 395db0fefc5SAdrian Hunter break; 396db0fefc5SAdrian Hunter case OMAP_MMC2_DEVID: 397db0fefc5SAdrian Hunter case OMAP_MMC3_DEVID: 3987715db5aSKishore Kadiyala case OMAP_MMC5_DEVID: 399db0fefc5SAdrian Hunter /* Off-chip level shifting, or none */ 4007715db5aSKishore Kadiyala mmc_slot(host).set_power = omap_hsmmc_235_set_power; 4017715db5aSKishore Kadiyala mmc_slot(host).set_sleep = omap_hsmmc_235_set_sleep; 402db0fefc5SAdrian Hunter break; 4037715db5aSKishore Kadiyala case OMAP_MMC4_DEVID: 4047715db5aSKishore Kadiyala mmc_slot(host).set_power = omap_hsmmc_4_set_power; 4057715db5aSKishore Kadiyala mmc_slot(host).set_sleep = omap_hsmmc_4_set_sleep; 406db0fefc5SAdrian Hunter default: 407db0fefc5SAdrian Hunter pr_err("MMC%d configuration not supported!\n", host->id); 408db0fefc5SAdrian Hunter return -EINVAL; 409db0fefc5SAdrian Hunter } 410db0fefc5SAdrian Hunter 411db0fefc5SAdrian Hunter reg = regulator_get(host->dev, "vmmc"); 412db0fefc5SAdrian Hunter if (IS_ERR(reg)) { 413db0fefc5SAdrian Hunter dev_dbg(host->dev, "vmmc regulator missing\n"); 414db0fefc5SAdrian Hunter /* 415db0fefc5SAdrian Hunter * HACK: until fixed.c regulator is usable, 416db0fefc5SAdrian Hunter * we don't require a main regulator 417db0fefc5SAdrian Hunter * for MMC2 or MMC3 418db0fefc5SAdrian Hunter */ 419db0fefc5SAdrian Hunter if (host->id == OMAP_MMC1_DEVID) { 420db0fefc5SAdrian Hunter ret = PTR_ERR(reg); 421db0fefc5SAdrian Hunter goto err; 422db0fefc5SAdrian Hunter } 423db0fefc5SAdrian Hunter } else { 424db0fefc5SAdrian Hunter host->vcc = reg; 42564be9782Skishore kadiyala ocr_value = mmc_regulator_get_ocrmask(reg); 42664be9782Skishore kadiyala if (!mmc_slot(host).ocr_mask) { 42764be9782Skishore kadiyala mmc_slot(host).ocr_mask = ocr_value; 42864be9782Skishore kadiyala } else { 42964be9782Skishore kadiyala if (!(mmc_slot(host).ocr_mask & ocr_value)) { 43064be9782Skishore kadiyala pr_err("MMC%d ocrmask %x is not supported\n", 43164be9782Skishore kadiyala host->id, mmc_slot(host).ocr_mask); 43264be9782Skishore kadiyala mmc_slot(host).ocr_mask = 0; 43364be9782Skishore kadiyala return -EINVAL; 43464be9782Skishore kadiyala } 43564be9782Skishore kadiyala } 436db0fefc5SAdrian Hunter 437db0fefc5SAdrian Hunter /* Allow an aux regulator */ 438db0fefc5SAdrian Hunter reg = regulator_get(host->dev, "vmmc_aux"); 439db0fefc5SAdrian Hunter host->vcc_aux = IS_ERR(reg) ? NULL : reg; 440db0fefc5SAdrian Hunter 441b1c1df7aSBalaji T K /* For eMMC do not power off when not in sleep state */ 442b1c1df7aSBalaji T K if (mmc_slot(host).no_regulator_off_init) 443b1c1df7aSBalaji T K return 0; 444db0fefc5SAdrian Hunter /* 445db0fefc5SAdrian Hunter * UGLY HACK: workaround regulator framework bugs. 446db0fefc5SAdrian Hunter * When the bootloader leaves a supply active, it's 447db0fefc5SAdrian Hunter * initialized with zero usecount ... and we can't 448db0fefc5SAdrian Hunter * disable it without first enabling it. Until the 449db0fefc5SAdrian Hunter * framework is fixed, we need a workaround like this 450db0fefc5SAdrian Hunter * (which is safe for MMC, but not in general). 451db0fefc5SAdrian Hunter */ 452db0fefc5SAdrian Hunter if (regulator_is_enabled(host->vcc) > 0) { 453db0fefc5SAdrian Hunter regulator_enable(host->vcc); 454db0fefc5SAdrian Hunter regulator_disable(host->vcc); 455db0fefc5SAdrian Hunter } 456db0fefc5SAdrian Hunter if (host->vcc_aux) { 457db0fefc5SAdrian Hunter if (regulator_is_enabled(reg) > 0) { 458db0fefc5SAdrian Hunter regulator_enable(reg); 459db0fefc5SAdrian Hunter regulator_disable(reg); 460db0fefc5SAdrian Hunter } 461db0fefc5SAdrian Hunter } 462db0fefc5SAdrian Hunter } 463db0fefc5SAdrian Hunter 464db0fefc5SAdrian Hunter return 0; 465db0fefc5SAdrian Hunter 466db0fefc5SAdrian Hunter err: 467db0fefc5SAdrian Hunter mmc_slot(host).set_power = NULL; 468db0fefc5SAdrian Hunter mmc_slot(host).set_sleep = NULL; 469db0fefc5SAdrian Hunter return ret; 470db0fefc5SAdrian Hunter } 471db0fefc5SAdrian Hunter 472db0fefc5SAdrian Hunter static void omap_hsmmc_reg_put(struct omap_hsmmc_host *host) 473db0fefc5SAdrian Hunter { 474db0fefc5SAdrian Hunter regulator_put(host->vcc); 475db0fefc5SAdrian Hunter regulator_put(host->vcc_aux); 476db0fefc5SAdrian Hunter mmc_slot(host).set_power = NULL; 477db0fefc5SAdrian Hunter mmc_slot(host).set_sleep = NULL; 478db0fefc5SAdrian Hunter } 479db0fefc5SAdrian Hunter 480b702b106SAdrian Hunter static inline int omap_hsmmc_have_reg(void) 481b702b106SAdrian Hunter { 482b702b106SAdrian Hunter return 1; 483b702b106SAdrian Hunter } 484b702b106SAdrian Hunter 485b702b106SAdrian Hunter #else 486b702b106SAdrian Hunter 487b702b106SAdrian Hunter static inline int omap_hsmmc_reg_get(struct omap_hsmmc_host *host) 488b702b106SAdrian Hunter { 489b702b106SAdrian Hunter return -EINVAL; 490b702b106SAdrian Hunter } 491b702b106SAdrian Hunter 492b702b106SAdrian Hunter static inline void omap_hsmmc_reg_put(struct omap_hsmmc_host *host) 493b702b106SAdrian Hunter { 494b702b106SAdrian Hunter } 495b702b106SAdrian Hunter 496b702b106SAdrian Hunter static inline int omap_hsmmc_have_reg(void) 497b702b106SAdrian Hunter { 498b702b106SAdrian Hunter return 0; 499b702b106SAdrian Hunter } 500b702b106SAdrian Hunter 501b702b106SAdrian Hunter #endif 502b702b106SAdrian Hunter 503b702b106SAdrian Hunter static int omap_hsmmc_gpio_init(struct omap_mmc_platform_data *pdata) 504b702b106SAdrian Hunter { 505b702b106SAdrian Hunter int ret; 506b702b106SAdrian Hunter 507b702b106SAdrian Hunter if (gpio_is_valid(pdata->slots[0].switch_pin)) { 508b702b106SAdrian Hunter if (pdata->slots[0].cover) 509b702b106SAdrian Hunter pdata->slots[0].get_cover_state = 510b702b106SAdrian Hunter omap_hsmmc_get_cover_state; 511b702b106SAdrian Hunter else 512b702b106SAdrian Hunter pdata->slots[0].card_detect = omap_hsmmc_card_detect; 513b702b106SAdrian Hunter pdata->slots[0].card_detect_irq = 514b702b106SAdrian Hunter gpio_to_irq(pdata->slots[0].switch_pin); 515b702b106SAdrian Hunter ret = gpio_request(pdata->slots[0].switch_pin, "mmc_cd"); 516b702b106SAdrian Hunter if (ret) 517b702b106SAdrian Hunter return ret; 518b702b106SAdrian Hunter ret = gpio_direction_input(pdata->slots[0].switch_pin); 519b702b106SAdrian Hunter if (ret) 520b702b106SAdrian Hunter goto err_free_sp; 521b702b106SAdrian Hunter } else 522b702b106SAdrian Hunter pdata->slots[0].switch_pin = -EINVAL; 523b702b106SAdrian Hunter 524b702b106SAdrian Hunter if (gpio_is_valid(pdata->slots[0].gpio_wp)) { 525b702b106SAdrian Hunter pdata->slots[0].get_ro = omap_hsmmc_get_wp; 526b702b106SAdrian Hunter ret = gpio_request(pdata->slots[0].gpio_wp, "mmc_wp"); 527b702b106SAdrian Hunter if (ret) 528b702b106SAdrian Hunter goto err_free_cd; 529b702b106SAdrian Hunter ret = gpio_direction_input(pdata->slots[0].gpio_wp); 530b702b106SAdrian Hunter if (ret) 531b702b106SAdrian Hunter goto err_free_wp; 532b702b106SAdrian Hunter } else 533b702b106SAdrian Hunter pdata->slots[0].gpio_wp = -EINVAL; 534b702b106SAdrian Hunter 535b702b106SAdrian Hunter return 0; 536b702b106SAdrian Hunter 537b702b106SAdrian Hunter err_free_wp: 538b702b106SAdrian Hunter gpio_free(pdata->slots[0].gpio_wp); 539b702b106SAdrian Hunter err_free_cd: 540b702b106SAdrian Hunter if (gpio_is_valid(pdata->slots[0].switch_pin)) 541b702b106SAdrian Hunter err_free_sp: 542b702b106SAdrian Hunter gpio_free(pdata->slots[0].switch_pin); 543b702b106SAdrian Hunter return ret; 544b702b106SAdrian Hunter } 545b702b106SAdrian Hunter 546b702b106SAdrian Hunter static void omap_hsmmc_gpio_free(struct omap_mmc_platform_data *pdata) 547b702b106SAdrian Hunter { 548b702b106SAdrian Hunter if (gpio_is_valid(pdata->slots[0].gpio_wp)) 549b702b106SAdrian Hunter gpio_free(pdata->slots[0].gpio_wp); 550b702b106SAdrian Hunter if (gpio_is_valid(pdata->slots[0].switch_pin)) 551b702b106SAdrian Hunter gpio_free(pdata->slots[0].switch_pin); 552b702b106SAdrian Hunter } 553b702b106SAdrian Hunter 554a45c6cb8SMadhusudhan Chikkature /* 555a45c6cb8SMadhusudhan Chikkature * Stop clock to the card 556a45c6cb8SMadhusudhan Chikkature */ 55770a3341aSDenis Karpov static void omap_hsmmc_stop_clock(struct omap_hsmmc_host *host) 558a45c6cb8SMadhusudhan Chikkature { 559a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, 560a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, SYSCTL) & ~CEN); 561a45c6cb8SMadhusudhan Chikkature if ((OMAP_HSMMC_READ(host->base, SYSCTL) & CEN) != 0x0) 562a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "MMC Clock is not stoped\n"); 563a45c6cb8SMadhusudhan Chikkature } 564a45c6cb8SMadhusudhan Chikkature 56593caf8e6SAdrian Hunter static void omap_hsmmc_enable_irq(struct omap_hsmmc_host *host, 56693caf8e6SAdrian Hunter struct mmc_command *cmd) 567b417577dSAdrian Hunter { 568b417577dSAdrian Hunter unsigned int irq_mask; 569b417577dSAdrian Hunter 570b417577dSAdrian Hunter if (host->use_dma) 571b417577dSAdrian Hunter irq_mask = INT_EN_MASK & ~(BRR_ENABLE | BWR_ENABLE); 572b417577dSAdrian Hunter else 573b417577dSAdrian Hunter irq_mask = INT_EN_MASK; 574b417577dSAdrian Hunter 57593caf8e6SAdrian Hunter /* Disable timeout for erases */ 57693caf8e6SAdrian Hunter if (cmd->opcode == MMC_ERASE) 57793caf8e6SAdrian Hunter irq_mask &= ~DTO_ENABLE; 57893caf8e6SAdrian Hunter 579b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); 580b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, ISE, irq_mask); 581b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, IE, irq_mask); 582b417577dSAdrian Hunter } 583b417577dSAdrian Hunter 584b417577dSAdrian Hunter static void omap_hsmmc_disable_irq(struct omap_hsmmc_host *host) 585b417577dSAdrian Hunter { 586b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, ISE, 0); 587b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, IE, 0); 588b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); 589b417577dSAdrian Hunter } 590b417577dSAdrian Hunter 59111dd62a7SDenis Karpov #ifdef CONFIG_PM 59211dd62a7SDenis Karpov 59311dd62a7SDenis Karpov /* 59411dd62a7SDenis Karpov * Restore the MMC host context, if it was lost as result of a 59511dd62a7SDenis Karpov * power state change. 59611dd62a7SDenis Karpov */ 59770a3341aSDenis Karpov static int omap_hsmmc_context_restore(struct omap_hsmmc_host *host) 59811dd62a7SDenis Karpov { 59911dd62a7SDenis Karpov struct mmc_ios *ios = &host->mmc->ios; 60011dd62a7SDenis Karpov struct omap_mmc_platform_data *pdata = host->pdata; 60111dd62a7SDenis Karpov int context_loss = 0; 60211dd62a7SDenis Karpov u32 hctl, capa, con; 60311dd62a7SDenis Karpov u16 dsor = 0; 60411dd62a7SDenis Karpov unsigned long timeout; 60511dd62a7SDenis Karpov 60611dd62a7SDenis Karpov if (pdata->get_context_loss_count) { 60711dd62a7SDenis Karpov context_loss = pdata->get_context_loss_count(host->dev); 60811dd62a7SDenis Karpov if (context_loss < 0) 60911dd62a7SDenis Karpov return 1; 61011dd62a7SDenis Karpov } 61111dd62a7SDenis Karpov 61211dd62a7SDenis Karpov dev_dbg(mmc_dev(host->mmc), "context was %slost\n", 61311dd62a7SDenis Karpov context_loss == host->context_loss ? "not " : ""); 61411dd62a7SDenis Karpov if (host->context_loss == context_loss) 61511dd62a7SDenis Karpov return 1; 61611dd62a7SDenis Karpov 61711dd62a7SDenis Karpov /* Wait for hardware reset */ 61811dd62a7SDenis Karpov timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 61911dd62a7SDenis Karpov while ((OMAP_HSMMC_READ(host->base, SYSSTATUS) & RESETDONE) != RESETDONE 62011dd62a7SDenis Karpov && time_before(jiffies, timeout)) 62111dd62a7SDenis Karpov ; 62211dd62a7SDenis Karpov 62311dd62a7SDenis Karpov /* Do software reset */ 62411dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, SYSCONFIG, SOFTRESET); 62511dd62a7SDenis Karpov timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 62611dd62a7SDenis Karpov while ((OMAP_HSMMC_READ(host->base, SYSSTATUS) & RESETDONE) != RESETDONE 62711dd62a7SDenis Karpov && time_before(jiffies, timeout)) 62811dd62a7SDenis Karpov ; 62911dd62a7SDenis Karpov 63011dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, SYSCONFIG, 63111dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCONFIG) | AUTOIDLE); 63211dd62a7SDenis Karpov 63311dd62a7SDenis Karpov if (host->id == OMAP_MMC1_DEVID) { 63411dd62a7SDenis Karpov if (host->power_mode != MMC_POWER_OFF && 63511dd62a7SDenis Karpov (1 << ios->vdd) <= MMC_VDD_23_24) 63611dd62a7SDenis Karpov hctl = SDVS18; 63711dd62a7SDenis Karpov else 63811dd62a7SDenis Karpov hctl = SDVS30; 63911dd62a7SDenis Karpov capa = VS30 | VS18; 64011dd62a7SDenis Karpov } else { 64111dd62a7SDenis Karpov hctl = SDVS18; 64211dd62a7SDenis Karpov capa = VS18; 64311dd62a7SDenis Karpov } 64411dd62a7SDenis Karpov 64511dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, HCTL, 64611dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, HCTL) | hctl); 64711dd62a7SDenis Karpov 64811dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, CAPA, 64911dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, CAPA) | capa); 65011dd62a7SDenis Karpov 65111dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, HCTL, 65211dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, HCTL) | SDBP); 65311dd62a7SDenis Karpov 65411dd62a7SDenis Karpov timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 65511dd62a7SDenis Karpov while ((OMAP_HSMMC_READ(host->base, HCTL) & SDBP) != SDBP 65611dd62a7SDenis Karpov && time_before(jiffies, timeout)) 65711dd62a7SDenis Karpov ; 65811dd62a7SDenis Karpov 659b417577dSAdrian Hunter omap_hsmmc_disable_irq(host); 66011dd62a7SDenis Karpov 66111dd62a7SDenis Karpov /* Do not initialize card-specific things if the power is off */ 66211dd62a7SDenis Karpov if (host->power_mode == MMC_POWER_OFF) 66311dd62a7SDenis Karpov goto out; 66411dd62a7SDenis Karpov 66511dd62a7SDenis Karpov con = OMAP_HSMMC_READ(host->base, CON); 66611dd62a7SDenis Karpov switch (ios->bus_width) { 66711dd62a7SDenis Karpov case MMC_BUS_WIDTH_8: 66811dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, CON, con | DW8); 66911dd62a7SDenis Karpov break; 67011dd62a7SDenis Karpov case MMC_BUS_WIDTH_4: 67111dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, CON, con & ~DW8); 67211dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, HCTL, 67311dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, HCTL) | FOUR_BIT); 67411dd62a7SDenis Karpov break; 67511dd62a7SDenis Karpov case MMC_BUS_WIDTH_1: 67611dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, CON, con & ~DW8); 67711dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, HCTL, 67811dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, HCTL) & ~FOUR_BIT); 67911dd62a7SDenis Karpov break; 68011dd62a7SDenis Karpov } 68111dd62a7SDenis Karpov 68211dd62a7SDenis Karpov if (ios->clock) { 68311dd62a7SDenis Karpov dsor = OMAP_MMC_MASTER_CLOCK / ios->clock; 68411dd62a7SDenis Karpov if (dsor < 1) 68511dd62a7SDenis Karpov dsor = 1; 68611dd62a7SDenis Karpov 68711dd62a7SDenis Karpov if (OMAP_MMC_MASTER_CLOCK / dsor > ios->clock) 68811dd62a7SDenis Karpov dsor++; 68911dd62a7SDenis Karpov 69011dd62a7SDenis Karpov if (dsor > 250) 69111dd62a7SDenis Karpov dsor = 250; 69211dd62a7SDenis Karpov } 69311dd62a7SDenis Karpov 69411dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, SYSCTL, 69511dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCTL) & ~CEN); 69611dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, SYSCTL, (dsor << 6) | (DTO << 16)); 69711dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, SYSCTL, 69811dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCTL) | ICE); 69911dd62a7SDenis Karpov 70011dd62a7SDenis Karpov timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 70111dd62a7SDenis Karpov while ((OMAP_HSMMC_READ(host->base, SYSCTL) & ICS) != ICS 70211dd62a7SDenis Karpov && time_before(jiffies, timeout)) 70311dd62a7SDenis Karpov ; 70411dd62a7SDenis Karpov 70511dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, SYSCTL, 70611dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCTL) | CEN); 70711dd62a7SDenis Karpov 70811dd62a7SDenis Karpov con = OMAP_HSMMC_READ(host->base, CON); 70911dd62a7SDenis Karpov if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN) 71011dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, CON, con | OD); 71111dd62a7SDenis Karpov else 71211dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, CON, con & ~OD); 71311dd62a7SDenis Karpov out: 71411dd62a7SDenis Karpov host->context_loss = context_loss; 71511dd62a7SDenis Karpov 71611dd62a7SDenis Karpov dev_dbg(mmc_dev(host->mmc), "context is restored\n"); 71711dd62a7SDenis Karpov return 0; 71811dd62a7SDenis Karpov } 71911dd62a7SDenis Karpov 72011dd62a7SDenis Karpov /* 72111dd62a7SDenis Karpov * Save the MMC host context (store the number of power state changes so far). 72211dd62a7SDenis Karpov */ 72370a3341aSDenis Karpov static void omap_hsmmc_context_save(struct omap_hsmmc_host *host) 72411dd62a7SDenis Karpov { 72511dd62a7SDenis Karpov struct omap_mmc_platform_data *pdata = host->pdata; 72611dd62a7SDenis Karpov int context_loss; 72711dd62a7SDenis Karpov 72811dd62a7SDenis Karpov if (pdata->get_context_loss_count) { 72911dd62a7SDenis Karpov context_loss = pdata->get_context_loss_count(host->dev); 73011dd62a7SDenis Karpov if (context_loss < 0) 73111dd62a7SDenis Karpov return; 73211dd62a7SDenis Karpov host->context_loss = context_loss; 73311dd62a7SDenis Karpov } 73411dd62a7SDenis Karpov } 73511dd62a7SDenis Karpov 73611dd62a7SDenis Karpov #else 73711dd62a7SDenis Karpov 73870a3341aSDenis Karpov static int omap_hsmmc_context_restore(struct omap_hsmmc_host *host) 73911dd62a7SDenis Karpov { 74011dd62a7SDenis Karpov return 0; 74111dd62a7SDenis Karpov } 74211dd62a7SDenis Karpov 74370a3341aSDenis Karpov static void omap_hsmmc_context_save(struct omap_hsmmc_host *host) 74411dd62a7SDenis Karpov { 74511dd62a7SDenis Karpov } 74611dd62a7SDenis Karpov 74711dd62a7SDenis Karpov #endif 74811dd62a7SDenis Karpov 749a45c6cb8SMadhusudhan Chikkature /* 750a45c6cb8SMadhusudhan Chikkature * Send init stream sequence to card 751a45c6cb8SMadhusudhan Chikkature * before sending IDLE command 752a45c6cb8SMadhusudhan Chikkature */ 75370a3341aSDenis Karpov static void send_init_stream(struct omap_hsmmc_host *host) 754a45c6cb8SMadhusudhan Chikkature { 755a45c6cb8SMadhusudhan Chikkature int reg = 0; 756a45c6cb8SMadhusudhan Chikkature unsigned long timeout; 757a45c6cb8SMadhusudhan Chikkature 758b62f6228SAdrian Hunter if (host->protect_card) 759b62f6228SAdrian Hunter return; 760b62f6228SAdrian Hunter 761a45c6cb8SMadhusudhan Chikkature disable_irq(host->irq); 762b417577dSAdrian Hunter 763b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK); 764a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CON, 765a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, CON) | INIT_STREAM); 766a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CMD, INIT_STREAM_CMD); 767a45c6cb8SMadhusudhan Chikkature 768a45c6cb8SMadhusudhan Chikkature timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 769a45c6cb8SMadhusudhan Chikkature while ((reg != CC) && time_before(jiffies, timeout)) 770a45c6cb8SMadhusudhan Chikkature reg = OMAP_HSMMC_READ(host->base, STAT) & CC; 771a45c6cb8SMadhusudhan Chikkature 772a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CON, 773a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, CON) & ~INIT_STREAM); 774c653a6d4SAdrian Hunter 775c653a6d4SAdrian Hunter OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); 776c653a6d4SAdrian Hunter OMAP_HSMMC_READ(host->base, STAT); 777c653a6d4SAdrian Hunter 778a45c6cb8SMadhusudhan Chikkature enable_irq(host->irq); 779a45c6cb8SMadhusudhan Chikkature } 780a45c6cb8SMadhusudhan Chikkature 781a45c6cb8SMadhusudhan Chikkature static inline 78270a3341aSDenis Karpov int omap_hsmmc_cover_is_closed(struct omap_hsmmc_host *host) 783a45c6cb8SMadhusudhan Chikkature { 784a45c6cb8SMadhusudhan Chikkature int r = 1; 785a45c6cb8SMadhusudhan Chikkature 786191d1f1dSDenis Karpov if (mmc_slot(host).get_cover_state) 787191d1f1dSDenis Karpov r = mmc_slot(host).get_cover_state(host->dev, host->slot_id); 788a45c6cb8SMadhusudhan Chikkature return r; 789a45c6cb8SMadhusudhan Chikkature } 790a45c6cb8SMadhusudhan Chikkature 791a45c6cb8SMadhusudhan Chikkature static ssize_t 79270a3341aSDenis Karpov omap_hsmmc_show_cover_switch(struct device *dev, struct device_attribute *attr, 793a45c6cb8SMadhusudhan Chikkature char *buf) 794a45c6cb8SMadhusudhan Chikkature { 795a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev); 79670a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 797a45c6cb8SMadhusudhan Chikkature 79870a3341aSDenis Karpov return sprintf(buf, "%s\n", 79970a3341aSDenis Karpov omap_hsmmc_cover_is_closed(host) ? "closed" : "open"); 800a45c6cb8SMadhusudhan Chikkature } 801a45c6cb8SMadhusudhan Chikkature 80270a3341aSDenis Karpov static DEVICE_ATTR(cover_switch, S_IRUGO, omap_hsmmc_show_cover_switch, NULL); 803a45c6cb8SMadhusudhan Chikkature 804a45c6cb8SMadhusudhan Chikkature static ssize_t 80570a3341aSDenis Karpov omap_hsmmc_show_slot_name(struct device *dev, struct device_attribute *attr, 806a45c6cb8SMadhusudhan Chikkature char *buf) 807a45c6cb8SMadhusudhan Chikkature { 808a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev); 80970a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 810a45c6cb8SMadhusudhan Chikkature 811191d1f1dSDenis Karpov return sprintf(buf, "%s\n", mmc_slot(host).name); 812a45c6cb8SMadhusudhan Chikkature } 813a45c6cb8SMadhusudhan Chikkature 81470a3341aSDenis Karpov static DEVICE_ATTR(slot_name, S_IRUGO, omap_hsmmc_show_slot_name, NULL); 815a45c6cb8SMadhusudhan Chikkature 816a45c6cb8SMadhusudhan Chikkature /* 817a45c6cb8SMadhusudhan Chikkature * Configure the response type and send the cmd. 818a45c6cb8SMadhusudhan Chikkature */ 819a45c6cb8SMadhusudhan Chikkature static void 82070a3341aSDenis Karpov omap_hsmmc_start_command(struct omap_hsmmc_host *host, struct mmc_command *cmd, 821a45c6cb8SMadhusudhan Chikkature struct mmc_data *data) 822a45c6cb8SMadhusudhan Chikkature { 823a45c6cb8SMadhusudhan Chikkature int cmdreg = 0, resptype = 0, cmdtype = 0; 824a45c6cb8SMadhusudhan Chikkature 825a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "%s: CMD%d, argument 0x%08x\n", 826a45c6cb8SMadhusudhan Chikkature mmc_hostname(host->mmc), cmd->opcode, cmd->arg); 827a45c6cb8SMadhusudhan Chikkature host->cmd = cmd; 828a45c6cb8SMadhusudhan Chikkature 82993caf8e6SAdrian Hunter omap_hsmmc_enable_irq(host, cmd); 830a45c6cb8SMadhusudhan Chikkature 8314a694dc9SAdrian Hunter host->response_busy = 0; 832a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_PRESENT) { 833a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_136) 834a45c6cb8SMadhusudhan Chikkature resptype = 1; 8354a694dc9SAdrian Hunter else if (cmd->flags & MMC_RSP_BUSY) { 8364a694dc9SAdrian Hunter resptype = 3; 8374a694dc9SAdrian Hunter host->response_busy = 1; 8384a694dc9SAdrian Hunter } else 839a45c6cb8SMadhusudhan Chikkature resptype = 2; 840a45c6cb8SMadhusudhan Chikkature } 841a45c6cb8SMadhusudhan Chikkature 842a45c6cb8SMadhusudhan Chikkature /* 843a45c6cb8SMadhusudhan Chikkature * Unlike OMAP1 controller, the cmdtype does not seem to be based on 844a45c6cb8SMadhusudhan Chikkature * ac, bc, adtc, bcr. Only commands ending an open ended transfer need 845a45c6cb8SMadhusudhan Chikkature * a val of 0x3, rest 0x0. 846a45c6cb8SMadhusudhan Chikkature */ 847a45c6cb8SMadhusudhan Chikkature if (cmd == host->mrq->stop) 848a45c6cb8SMadhusudhan Chikkature cmdtype = 0x3; 849a45c6cb8SMadhusudhan Chikkature 850a45c6cb8SMadhusudhan Chikkature cmdreg = (cmd->opcode << 24) | (resptype << 16) | (cmdtype << 22); 851a45c6cb8SMadhusudhan Chikkature 852a45c6cb8SMadhusudhan Chikkature if (data) { 853a45c6cb8SMadhusudhan Chikkature cmdreg |= DP_SELECT | MSBS | BCE; 854a45c6cb8SMadhusudhan Chikkature if (data->flags & MMC_DATA_READ) 855a45c6cb8SMadhusudhan Chikkature cmdreg |= DDIR; 856a45c6cb8SMadhusudhan Chikkature else 857a45c6cb8SMadhusudhan Chikkature cmdreg &= ~(DDIR); 858a45c6cb8SMadhusudhan Chikkature } 859a45c6cb8SMadhusudhan Chikkature 860a45c6cb8SMadhusudhan Chikkature if (host->use_dma) 861a45c6cb8SMadhusudhan Chikkature cmdreg |= DMA_EN; 862a45c6cb8SMadhusudhan Chikkature 863b417577dSAdrian Hunter host->req_in_progress = 1; 8644dffd7a2SAdrian Hunter 865a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, ARG, cmd->arg); 866a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CMD, cmdreg); 867a45c6cb8SMadhusudhan Chikkature } 868a45c6cb8SMadhusudhan Chikkature 8690ccd76d4SJuha Yrjola static int 87070a3341aSDenis Karpov omap_hsmmc_get_dma_dir(struct omap_hsmmc_host *host, struct mmc_data *data) 8710ccd76d4SJuha Yrjola { 8720ccd76d4SJuha Yrjola if (data->flags & MMC_DATA_WRITE) 8730ccd76d4SJuha Yrjola return DMA_TO_DEVICE; 8740ccd76d4SJuha Yrjola else 8750ccd76d4SJuha Yrjola return DMA_FROM_DEVICE; 8760ccd76d4SJuha Yrjola } 8770ccd76d4SJuha Yrjola 878b417577dSAdrian Hunter static void omap_hsmmc_request_done(struct omap_hsmmc_host *host, struct mmc_request *mrq) 879b417577dSAdrian Hunter { 880b417577dSAdrian Hunter int dma_ch; 881b417577dSAdrian Hunter 882b417577dSAdrian Hunter spin_lock(&host->irq_lock); 883b417577dSAdrian Hunter host->req_in_progress = 0; 884b417577dSAdrian Hunter dma_ch = host->dma_ch; 885b417577dSAdrian Hunter spin_unlock(&host->irq_lock); 886b417577dSAdrian Hunter 887b417577dSAdrian Hunter omap_hsmmc_disable_irq(host); 888b417577dSAdrian Hunter /* Do not complete the request if DMA is still in progress */ 889b417577dSAdrian Hunter if (mrq->data && host->use_dma && dma_ch != -1) 890b417577dSAdrian Hunter return; 891b417577dSAdrian Hunter host->mrq = NULL; 892b417577dSAdrian Hunter mmc_request_done(host->mmc, mrq); 893b417577dSAdrian Hunter } 894b417577dSAdrian Hunter 895a45c6cb8SMadhusudhan Chikkature /* 896a45c6cb8SMadhusudhan Chikkature * Notify the transfer complete to MMC core 897a45c6cb8SMadhusudhan Chikkature */ 898a45c6cb8SMadhusudhan Chikkature static void 89970a3341aSDenis Karpov omap_hsmmc_xfer_done(struct omap_hsmmc_host *host, struct mmc_data *data) 900a45c6cb8SMadhusudhan Chikkature { 9014a694dc9SAdrian Hunter if (!data) { 9024a694dc9SAdrian Hunter struct mmc_request *mrq = host->mrq; 9034a694dc9SAdrian Hunter 90423050103SAdrian Hunter /* TC before CC from CMD6 - don't know why, but it happens */ 90523050103SAdrian Hunter if (host->cmd && host->cmd->opcode == 6 && 90623050103SAdrian Hunter host->response_busy) { 90723050103SAdrian Hunter host->response_busy = 0; 90823050103SAdrian Hunter return; 90923050103SAdrian Hunter } 91023050103SAdrian Hunter 911b417577dSAdrian Hunter omap_hsmmc_request_done(host, mrq); 9124a694dc9SAdrian Hunter return; 9134a694dc9SAdrian Hunter } 9144a694dc9SAdrian Hunter 915a45c6cb8SMadhusudhan Chikkature host->data = NULL; 916a45c6cb8SMadhusudhan Chikkature 917a45c6cb8SMadhusudhan Chikkature if (!data->error) 918a45c6cb8SMadhusudhan Chikkature data->bytes_xfered += data->blocks * (data->blksz); 919a45c6cb8SMadhusudhan Chikkature else 920a45c6cb8SMadhusudhan Chikkature data->bytes_xfered = 0; 921a45c6cb8SMadhusudhan Chikkature 922a45c6cb8SMadhusudhan Chikkature if (!data->stop) { 923b417577dSAdrian Hunter omap_hsmmc_request_done(host, data->mrq); 924a45c6cb8SMadhusudhan Chikkature return; 925a45c6cb8SMadhusudhan Chikkature } 92670a3341aSDenis Karpov omap_hsmmc_start_command(host, data->stop, NULL); 927a45c6cb8SMadhusudhan Chikkature } 928a45c6cb8SMadhusudhan Chikkature 929a45c6cb8SMadhusudhan Chikkature /* 930a45c6cb8SMadhusudhan Chikkature * Notify the core about command completion 931a45c6cb8SMadhusudhan Chikkature */ 932a45c6cb8SMadhusudhan Chikkature static void 93370a3341aSDenis Karpov omap_hsmmc_cmd_done(struct omap_hsmmc_host *host, struct mmc_command *cmd) 934a45c6cb8SMadhusudhan Chikkature { 935a45c6cb8SMadhusudhan Chikkature host->cmd = NULL; 936a45c6cb8SMadhusudhan Chikkature 937a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_PRESENT) { 938a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_136) { 939a45c6cb8SMadhusudhan Chikkature /* response type 2 */ 940a45c6cb8SMadhusudhan Chikkature cmd->resp[3] = OMAP_HSMMC_READ(host->base, RSP10); 941a45c6cb8SMadhusudhan Chikkature cmd->resp[2] = OMAP_HSMMC_READ(host->base, RSP32); 942a45c6cb8SMadhusudhan Chikkature cmd->resp[1] = OMAP_HSMMC_READ(host->base, RSP54); 943a45c6cb8SMadhusudhan Chikkature cmd->resp[0] = OMAP_HSMMC_READ(host->base, RSP76); 944a45c6cb8SMadhusudhan Chikkature } else { 945a45c6cb8SMadhusudhan Chikkature /* response types 1, 1b, 3, 4, 5, 6 */ 946a45c6cb8SMadhusudhan Chikkature cmd->resp[0] = OMAP_HSMMC_READ(host->base, RSP10); 947a45c6cb8SMadhusudhan Chikkature } 948a45c6cb8SMadhusudhan Chikkature } 949b417577dSAdrian Hunter if ((host->data == NULL && !host->response_busy) || cmd->error) 950b417577dSAdrian Hunter omap_hsmmc_request_done(host, cmd->mrq); 951a45c6cb8SMadhusudhan Chikkature } 952a45c6cb8SMadhusudhan Chikkature 953a45c6cb8SMadhusudhan Chikkature /* 954a45c6cb8SMadhusudhan Chikkature * DMA clean up for command errors 955a45c6cb8SMadhusudhan Chikkature */ 95670a3341aSDenis Karpov static void omap_hsmmc_dma_cleanup(struct omap_hsmmc_host *host, int errno) 957a45c6cb8SMadhusudhan Chikkature { 958b417577dSAdrian Hunter int dma_ch; 959b417577dSAdrian Hunter 96082788ff5SJarkko Lavinen host->data->error = errno; 961a45c6cb8SMadhusudhan Chikkature 962b417577dSAdrian Hunter spin_lock(&host->irq_lock); 963b417577dSAdrian Hunter dma_ch = host->dma_ch; 964b417577dSAdrian Hunter host->dma_ch = -1; 965b417577dSAdrian Hunter spin_unlock(&host->irq_lock); 966b417577dSAdrian Hunter 967b417577dSAdrian Hunter if (host->use_dma && dma_ch != -1) { 968a9120c33SPer Forlin dma_unmap_sg(mmc_dev(host->mmc), host->data->sg, 969a9120c33SPer Forlin host->data->sg_len, 97070a3341aSDenis Karpov omap_hsmmc_get_dma_dir(host, host->data)); 971b417577dSAdrian Hunter omap_free_dma(dma_ch); 972a45c6cb8SMadhusudhan Chikkature } 973a45c6cb8SMadhusudhan Chikkature host->data = NULL; 974a45c6cb8SMadhusudhan Chikkature } 975a45c6cb8SMadhusudhan Chikkature 976a45c6cb8SMadhusudhan Chikkature /* 977a45c6cb8SMadhusudhan Chikkature * Readable error output 978a45c6cb8SMadhusudhan Chikkature */ 979a45c6cb8SMadhusudhan Chikkature #ifdef CONFIG_MMC_DEBUG 980699b958bSAdrian Hunter static void omap_hsmmc_dbg_report_irq(struct omap_hsmmc_host *host, u32 status) 981a45c6cb8SMadhusudhan Chikkature { 982a45c6cb8SMadhusudhan Chikkature /* --- means reserved bit without definition at documentation */ 98370a3341aSDenis Karpov static const char *omap_hsmmc_status_bits[] = { 984699b958bSAdrian Hunter "CC" , "TC" , "BGE", "---", "BWR" , "BRR" , "---" , "---" , 985699b958bSAdrian Hunter "CIRQ", "OBI" , "---", "---", "---" , "---" , "---" , "ERRI", 986699b958bSAdrian Hunter "CTO" , "CCRC", "CEB", "CIE", "DTO" , "DCRC", "DEB" , "---" , 987699b958bSAdrian Hunter "ACE" , "---" , "---", "---", "CERR", "BADA", "---" , "---" 988a45c6cb8SMadhusudhan Chikkature }; 989a45c6cb8SMadhusudhan Chikkature char res[256]; 990a45c6cb8SMadhusudhan Chikkature char *buf = res; 991a45c6cb8SMadhusudhan Chikkature int len, i; 992a45c6cb8SMadhusudhan Chikkature 993a45c6cb8SMadhusudhan Chikkature len = sprintf(buf, "MMC IRQ 0x%x :", status); 994a45c6cb8SMadhusudhan Chikkature buf += len; 995a45c6cb8SMadhusudhan Chikkature 99670a3341aSDenis Karpov for (i = 0; i < ARRAY_SIZE(omap_hsmmc_status_bits); i++) 997a45c6cb8SMadhusudhan Chikkature if (status & (1 << i)) { 99870a3341aSDenis Karpov len = sprintf(buf, " %s", omap_hsmmc_status_bits[i]); 999a45c6cb8SMadhusudhan Chikkature buf += len; 1000a45c6cb8SMadhusudhan Chikkature } 1001a45c6cb8SMadhusudhan Chikkature 1002a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "%s\n", res); 1003a45c6cb8SMadhusudhan Chikkature } 1004699b958bSAdrian Hunter #else 1005699b958bSAdrian Hunter static inline void omap_hsmmc_dbg_report_irq(struct omap_hsmmc_host *host, 1006699b958bSAdrian Hunter u32 status) 1007699b958bSAdrian Hunter { 1008699b958bSAdrian Hunter } 1009a45c6cb8SMadhusudhan Chikkature #endif /* CONFIG_MMC_DEBUG */ 1010a45c6cb8SMadhusudhan Chikkature 10113ebf74b1SJean Pihet /* 10123ebf74b1SJean Pihet * MMC controller internal state machines reset 10133ebf74b1SJean Pihet * 10143ebf74b1SJean Pihet * Used to reset command or data internal state machines, using respectively 10153ebf74b1SJean Pihet * SRC or SRD bit of SYSCTL register 10163ebf74b1SJean Pihet * Can be called from interrupt context 10173ebf74b1SJean Pihet */ 101870a3341aSDenis Karpov static inline void omap_hsmmc_reset_controller_fsm(struct omap_hsmmc_host *host, 10193ebf74b1SJean Pihet unsigned long bit) 10203ebf74b1SJean Pihet { 10213ebf74b1SJean Pihet unsigned long i = 0; 10223ebf74b1SJean Pihet unsigned long limit = (loops_per_jiffy * 10233ebf74b1SJean Pihet msecs_to_jiffies(MMC_TIMEOUT_MS)); 10243ebf74b1SJean Pihet 10253ebf74b1SJean Pihet OMAP_HSMMC_WRITE(host->base, SYSCTL, 10263ebf74b1SJean Pihet OMAP_HSMMC_READ(host->base, SYSCTL) | bit); 10273ebf74b1SJean Pihet 102807ad64b6SMadhusudhan Chikkature /* 102907ad64b6SMadhusudhan Chikkature * OMAP4 ES2 and greater has an updated reset logic. 103007ad64b6SMadhusudhan Chikkature * Monitor a 0->1 transition first 103107ad64b6SMadhusudhan Chikkature */ 103207ad64b6SMadhusudhan Chikkature if (mmc_slot(host).features & HSMMC_HAS_UPDATED_RESET) { 1033b432b4b3Skishore kadiyala while ((!(OMAP_HSMMC_READ(host->base, SYSCTL) & bit)) 103407ad64b6SMadhusudhan Chikkature && (i++ < limit)) 103507ad64b6SMadhusudhan Chikkature cpu_relax(); 103607ad64b6SMadhusudhan Chikkature } 103707ad64b6SMadhusudhan Chikkature i = 0; 103807ad64b6SMadhusudhan Chikkature 10393ebf74b1SJean Pihet while ((OMAP_HSMMC_READ(host->base, SYSCTL) & bit) && 10403ebf74b1SJean Pihet (i++ < limit)) 10413ebf74b1SJean Pihet cpu_relax(); 10423ebf74b1SJean Pihet 10433ebf74b1SJean Pihet if (OMAP_HSMMC_READ(host->base, SYSCTL) & bit) 10443ebf74b1SJean Pihet dev_err(mmc_dev(host->mmc), 10453ebf74b1SJean Pihet "Timeout waiting on controller reset in %s\n", 10463ebf74b1SJean Pihet __func__); 10473ebf74b1SJean Pihet } 1048a45c6cb8SMadhusudhan Chikkature 1049b417577dSAdrian Hunter static void omap_hsmmc_do_irq(struct omap_hsmmc_host *host, int status) 1050a45c6cb8SMadhusudhan Chikkature { 1051a45c6cb8SMadhusudhan Chikkature struct mmc_data *data; 1052b417577dSAdrian Hunter int end_cmd = 0, end_trans = 0; 1053a45c6cb8SMadhusudhan Chikkature 1054b417577dSAdrian Hunter if (!host->req_in_progress) { 1055b417577dSAdrian Hunter do { 1056b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, STAT, status); 105700adadc1SKevin Hilman /* Flush posted write */ 1058b417577dSAdrian Hunter status = OMAP_HSMMC_READ(host->base, STAT); 1059b417577dSAdrian Hunter } while (status & INT_EN_MASK); 1060b417577dSAdrian Hunter return; 1061a45c6cb8SMadhusudhan Chikkature } 1062a45c6cb8SMadhusudhan Chikkature 1063a45c6cb8SMadhusudhan Chikkature data = host->data; 1064a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "IRQ Status is %x\n", status); 1065a45c6cb8SMadhusudhan Chikkature 1066a45c6cb8SMadhusudhan Chikkature if (status & ERR) { 1067699b958bSAdrian Hunter omap_hsmmc_dbg_report_irq(host, status); 1068a45c6cb8SMadhusudhan Chikkature if ((status & CMD_TIMEOUT) || 1069a45c6cb8SMadhusudhan Chikkature (status & CMD_CRC)) { 1070a45c6cb8SMadhusudhan Chikkature if (host->cmd) { 1071a45c6cb8SMadhusudhan Chikkature if (status & CMD_TIMEOUT) { 107270a3341aSDenis Karpov omap_hsmmc_reset_controller_fsm(host, 1073191d1f1dSDenis Karpov SRC); 1074a45c6cb8SMadhusudhan Chikkature host->cmd->error = -ETIMEDOUT; 1075a45c6cb8SMadhusudhan Chikkature } else { 1076a45c6cb8SMadhusudhan Chikkature host->cmd->error = -EILSEQ; 1077a45c6cb8SMadhusudhan Chikkature } 1078a45c6cb8SMadhusudhan Chikkature end_cmd = 1; 1079a45c6cb8SMadhusudhan Chikkature } 10804a694dc9SAdrian Hunter if (host->data || host->response_busy) { 10814a694dc9SAdrian Hunter if (host->data) 108270a3341aSDenis Karpov omap_hsmmc_dma_cleanup(host, 108370a3341aSDenis Karpov -ETIMEDOUT); 10844a694dc9SAdrian Hunter host->response_busy = 0; 108570a3341aSDenis Karpov omap_hsmmc_reset_controller_fsm(host, SRD); 1086c232f457SJean Pihet } 1087a45c6cb8SMadhusudhan Chikkature } 1088a45c6cb8SMadhusudhan Chikkature if ((status & DATA_TIMEOUT) || 1089a45c6cb8SMadhusudhan Chikkature (status & DATA_CRC)) { 10904a694dc9SAdrian Hunter if (host->data || host->response_busy) { 10914a694dc9SAdrian Hunter int err = (status & DATA_TIMEOUT) ? 10924a694dc9SAdrian Hunter -ETIMEDOUT : -EILSEQ; 10934a694dc9SAdrian Hunter 10944a694dc9SAdrian Hunter if (host->data) 109570a3341aSDenis Karpov omap_hsmmc_dma_cleanup(host, err); 1096a45c6cb8SMadhusudhan Chikkature else 10974a694dc9SAdrian Hunter host->mrq->cmd->error = err; 10984a694dc9SAdrian Hunter host->response_busy = 0; 109970a3341aSDenis Karpov omap_hsmmc_reset_controller_fsm(host, SRD); 1100a45c6cb8SMadhusudhan Chikkature end_trans = 1; 1101a45c6cb8SMadhusudhan Chikkature } 1102a45c6cb8SMadhusudhan Chikkature } 1103a45c6cb8SMadhusudhan Chikkature if (status & CARD_ERR) { 1104a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1105a45c6cb8SMadhusudhan Chikkature "Ignoring card err CMD%d\n", host->cmd->opcode); 1106a45c6cb8SMadhusudhan Chikkature if (host->cmd) 1107a45c6cb8SMadhusudhan Chikkature end_cmd = 1; 1108a45c6cb8SMadhusudhan Chikkature if (host->data) 1109a45c6cb8SMadhusudhan Chikkature end_trans = 1; 1110a45c6cb8SMadhusudhan Chikkature } 1111a45c6cb8SMadhusudhan Chikkature } 1112a45c6cb8SMadhusudhan Chikkature 1113a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, STAT, status); 1114a45c6cb8SMadhusudhan Chikkature 1115a8fe29d8SJarkko Lavinen if (end_cmd || ((status & CC) && host->cmd)) 111670a3341aSDenis Karpov omap_hsmmc_cmd_done(host, host->cmd); 11170a40e647SJarkko Lavinen if ((end_trans || (status & TC)) && host->mrq) 111870a3341aSDenis Karpov omap_hsmmc_xfer_done(host, data); 1119b417577dSAdrian Hunter } 1120a45c6cb8SMadhusudhan Chikkature 1121b417577dSAdrian Hunter /* 1122b417577dSAdrian Hunter * MMC controller IRQ handler 1123b417577dSAdrian Hunter */ 1124b417577dSAdrian Hunter static irqreturn_t omap_hsmmc_irq(int irq, void *dev_id) 1125b417577dSAdrian Hunter { 1126b417577dSAdrian Hunter struct omap_hsmmc_host *host = dev_id; 1127b417577dSAdrian Hunter int status; 1128b417577dSAdrian Hunter 1129b417577dSAdrian Hunter status = OMAP_HSMMC_READ(host->base, STAT); 1130b417577dSAdrian Hunter do { 1131b417577dSAdrian Hunter omap_hsmmc_do_irq(host, status); 1132b417577dSAdrian Hunter /* Flush posted write */ 1133b417577dSAdrian Hunter status = OMAP_HSMMC_READ(host->base, STAT); 1134b417577dSAdrian Hunter } while (status & INT_EN_MASK); 11354dffd7a2SAdrian Hunter 1136a45c6cb8SMadhusudhan Chikkature return IRQ_HANDLED; 1137a45c6cb8SMadhusudhan Chikkature } 1138a45c6cb8SMadhusudhan Chikkature 113970a3341aSDenis Karpov static void set_sd_bus_power(struct omap_hsmmc_host *host) 1140e13bb300SAdrian Hunter { 1141e13bb300SAdrian Hunter unsigned long i; 1142e13bb300SAdrian Hunter 1143e13bb300SAdrian Hunter OMAP_HSMMC_WRITE(host->base, HCTL, 1144e13bb300SAdrian Hunter OMAP_HSMMC_READ(host->base, HCTL) | SDBP); 1145e13bb300SAdrian Hunter for (i = 0; i < loops_per_jiffy; i++) { 1146e13bb300SAdrian Hunter if (OMAP_HSMMC_READ(host->base, HCTL) & SDBP) 1147e13bb300SAdrian Hunter break; 1148e13bb300SAdrian Hunter cpu_relax(); 1149e13bb300SAdrian Hunter } 1150e13bb300SAdrian Hunter } 1151e13bb300SAdrian Hunter 1152a45c6cb8SMadhusudhan Chikkature /* 1153eb250826SDavid Brownell * Switch MMC interface voltage ... only relevant for MMC1. 1154eb250826SDavid Brownell * 1155eb250826SDavid Brownell * MMC2 and MMC3 use fixed 1.8V levels, and maybe a transceiver. 1156eb250826SDavid Brownell * The MMC2 transceiver controls are used instead of DAT4..DAT7. 1157eb250826SDavid Brownell * Some chips, like eMMC ones, use internal transceivers. 1158a45c6cb8SMadhusudhan Chikkature */ 115970a3341aSDenis Karpov static int omap_hsmmc_switch_opcond(struct omap_hsmmc_host *host, int vdd) 1160a45c6cb8SMadhusudhan Chikkature { 1161a45c6cb8SMadhusudhan Chikkature u32 reg_val = 0; 1162a45c6cb8SMadhusudhan Chikkature int ret; 1163a45c6cb8SMadhusudhan Chikkature 1164a45c6cb8SMadhusudhan Chikkature /* Disable the clocks */ 1165fa4aa2d4SBalaji T K pm_runtime_put_sync(host->dev); 11662bec0893SAdrian Hunter if (host->got_dbclk) 1167a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 1168a45c6cb8SMadhusudhan Chikkature 1169a45c6cb8SMadhusudhan Chikkature /* Turn the power off */ 1170a45c6cb8SMadhusudhan Chikkature ret = mmc_slot(host).set_power(host->dev, host->slot_id, 0, 0); 1171a45c6cb8SMadhusudhan Chikkature 1172a45c6cb8SMadhusudhan Chikkature /* Turn the power ON with given VDD 1.8 or 3.0v */ 11732bec0893SAdrian Hunter if (!ret) 11742bec0893SAdrian Hunter ret = mmc_slot(host).set_power(host->dev, host->slot_id, 1, 11752bec0893SAdrian Hunter vdd); 1176fa4aa2d4SBalaji T K pm_runtime_get_sync(host->dev); 11772bec0893SAdrian Hunter if (host->got_dbclk) 11782bec0893SAdrian Hunter clk_enable(host->dbclk); 11792bec0893SAdrian Hunter 1180a45c6cb8SMadhusudhan Chikkature if (ret != 0) 1181a45c6cb8SMadhusudhan Chikkature goto err; 1182a45c6cb8SMadhusudhan Chikkature 1183a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 1184a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) & SDVSCLR); 1185a45c6cb8SMadhusudhan Chikkature reg_val = OMAP_HSMMC_READ(host->base, HCTL); 1186eb250826SDavid Brownell 1187a45c6cb8SMadhusudhan Chikkature /* 1188a45c6cb8SMadhusudhan Chikkature * If a MMC dual voltage card is detected, the set_ios fn calls 1189a45c6cb8SMadhusudhan Chikkature * this fn with VDD bit set for 1.8V. Upon card removal from the 119070a3341aSDenis Karpov * slot, omap_hsmmc_set_ios sets the VDD back to 3V on MMC_POWER_OFF. 1191a45c6cb8SMadhusudhan Chikkature * 1192eb250826SDavid Brownell * Cope with a bit of slop in the range ... per data sheets: 1193eb250826SDavid Brownell * - "1.8V" for vdds_mmc1/vdds_mmc1a can be up to 2.45V max, 1194eb250826SDavid Brownell * but recommended values are 1.71V to 1.89V 1195eb250826SDavid Brownell * - "3.0V" for vdds_mmc1/vdds_mmc1a can be up to 3.5V max, 1196eb250826SDavid Brownell * but recommended values are 2.7V to 3.3V 1197eb250826SDavid Brownell * 1198eb250826SDavid Brownell * Board setup code shouldn't permit anything very out-of-range. 1199eb250826SDavid Brownell * TWL4030-family VMMC1 and VSIM regulators are fine (avoiding the 1200eb250826SDavid Brownell * middle range) but VSIM can't power DAT4..DAT7 at more than 3V. 1201a45c6cb8SMadhusudhan Chikkature */ 1202eb250826SDavid Brownell if ((1 << vdd) <= MMC_VDD_23_24) 1203a45c6cb8SMadhusudhan Chikkature reg_val |= SDVS18; 1204eb250826SDavid Brownell else 1205eb250826SDavid Brownell reg_val |= SDVS30; 1206a45c6cb8SMadhusudhan Chikkature 1207a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, reg_val); 1208e13bb300SAdrian Hunter set_sd_bus_power(host); 1209a45c6cb8SMadhusudhan Chikkature 1210a45c6cb8SMadhusudhan Chikkature return 0; 1211a45c6cb8SMadhusudhan Chikkature err: 1212a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Unable to switch operating voltage\n"); 1213a45c6cb8SMadhusudhan Chikkature return ret; 1214a45c6cb8SMadhusudhan Chikkature } 1215a45c6cb8SMadhusudhan Chikkature 1216b62f6228SAdrian Hunter /* Protect the card while the cover is open */ 1217b62f6228SAdrian Hunter static void omap_hsmmc_protect_card(struct omap_hsmmc_host *host) 1218b62f6228SAdrian Hunter { 1219b62f6228SAdrian Hunter if (!mmc_slot(host).get_cover_state) 1220b62f6228SAdrian Hunter return; 1221b62f6228SAdrian Hunter 1222b62f6228SAdrian Hunter host->reqs_blocked = 0; 1223b62f6228SAdrian Hunter if (mmc_slot(host).get_cover_state(host->dev, host->slot_id)) { 1224b62f6228SAdrian Hunter if (host->protect_card) { 1225b62f6228SAdrian Hunter printk(KERN_INFO "%s: cover is closed, " 1226b62f6228SAdrian Hunter "card is now accessible\n", 1227b62f6228SAdrian Hunter mmc_hostname(host->mmc)); 1228b62f6228SAdrian Hunter host->protect_card = 0; 1229b62f6228SAdrian Hunter } 1230b62f6228SAdrian Hunter } else { 1231b62f6228SAdrian Hunter if (!host->protect_card) { 1232b62f6228SAdrian Hunter printk(KERN_INFO "%s: cover is open, " 1233b62f6228SAdrian Hunter "card is now inaccessible\n", 1234b62f6228SAdrian Hunter mmc_hostname(host->mmc)); 1235b62f6228SAdrian Hunter host->protect_card = 1; 1236b62f6228SAdrian Hunter } 1237b62f6228SAdrian Hunter } 1238b62f6228SAdrian Hunter } 1239b62f6228SAdrian Hunter 1240a45c6cb8SMadhusudhan Chikkature /* 1241a45c6cb8SMadhusudhan Chikkature * Work Item to notify the core about card insertion/removal 1242a45c6cb8SMadhusudhan Chikkature */ 124370a3341aSDenis Karpov static void omap_hsmmc_detect(struct work_struct *work) 1244a45c6cb8SMadhusudhan Chikkature { 124570a3341aSDenis Karpov struct omap_hsmmc_host *host = 124670a3341aSDenis Karpov container_of(work, struct omap_hsmmc_host, mmc_carddetect_work); 1247249d0fa9SDavid Brownell struct omap_mmc_slot_data *slot = &mmc_slot(host); 1248a6b2240dSAdrian Hunter int carddetect; 1249249d0fa9SDavid Brownell 1250a6b2240dSAdrian Hunter if (host->suspended) 1251a6b2240dSAdrian Hunter return; 1252a45c6cb8SMadhusudhan Chikkature 1253a45c6cb8SMadhusudhan Chikkature sysfs_notify(&host->mmc->class_dev.kobj, NULL, "cover_switch"); 1254a6b2240dSAdrian Hunter 1255191d1f1dSDenis Karpov if (slot->card_detect) 1256db0fefc5SAdrian Hunter carddetect = slot->card_detect(host->dev, host->slot_id); 1257b62f6228SAdrian Hunter else { 1258b62f6228SAdrian Hunter omap_hsmmc_protect_card(host); 1259a6b2240dSAdrian Hunter carddetect = -ENOSYS; 1260b62f6228SAdrian Hunter } 1261a6b2240dSAdrian Hunter 1262cdeebaddSMadhusudhan Chikkature if (carddetect) 1263a45c6cb8SMadhusudhan Chikkature mmc_detect_change(host->mmc, (HZ * 200) / 1000); 1264cdeebaddSMadhusudhan Chikkature else 1265a45c6cb8SMadhusudhan Chikkature mmc_detect_change(host->mmc, (HZ * 50) / 1000); 1266a45c6cb8SMadhusudhan Chikkature } 1267a45c6cb8SMadhusudhan Chikkature 1268a45c6cb8SMadhusudhan Chikkature /* 1269a45c6cb8SMadhusudhan Chikkature * ISR for handling card insertion and removal 1270a45c6cb8SMadhusudhan Chikkature */ 127170a3341aSDenis Karpov static irqreturn_t omap_hsmmc_cd_handler(int irq, void *dev_id) 1272a45c6cb8SMadhusudhan Chikkature { 127370a3341aSDenis Karpov struct omap_hsmmc_host *host = (struct omap_hsmmc_host *)dev_id; 1274a45c6cb8SMadhusudhan Chikkature 1275a6b2240dSAdrian Hunter if (host->suspended) 1276a6b2240dSAdrian Hunter return IRQ_HANDLED; 1277a45c6cb8SMadhusudhan Chikkature schedule_work(&host->mmc_carddetect_work); 1278a45c6cb8SMadhusudhan Chikkature 1279a45c6cb8SMadhusudhan Chikkature return IRQ_HANDLED; 1280a45c6cb8SMadhusudhan Chikkature } 1281a45c6cb8SMadhusudhan Chikkature 128270a3341aSDenis Karpov static int omap_hsmmc_get_dma_sync_dev(struct omap_hsmmc_host *host, 12830ccd76d4SJuha Yrjola struct mmc_data *data) 12840ccd76d4SJuha Yrjola { 12850ccd76d4SJuha Yrjola int sync_dev; 12860ccd76d4SJuha Yrjola 1287f3e2f1ddSGrazvydas Ignotas if (data->flags & MMC_DATA_WRITE) 1288f3e2f1ddSGrazvydas Ignotas sync_dev = host->dma_line_tx; 12890ccd76d4SJuha Yrjola else 1290f3e2f1ddSGrazvydas Ignotas sync_dev = host->dma_line_rx; 12910ccd76d4SJuha Yrjola return sync_dev; 12920ccd76d4SJuha Yrjola } 12930ccd76d4SJuha Yrjola 129470a3341aSDenis Karpov static void omap_hsmmc_config_dma_params(struct omap_hsmmc_host *host, 12950ccd76d4SJuha Yrjola struct mmc_data *data, 12960ccd76d4SJuha Yrjola struct scatterlist *sgl) 12970ccd76d4SJuha Yrjola { 12980ccd76d4SJuha Yrjola int blksz, nblk, dma_ch; 12990ccd76d4SJuha Yrjola 13000ccd76d4SJuha Yrjola dma_ch = host->dma_ch; 13010ccd76d4SJuha Yrjola if (data->flags & MMC_DATA_WRITE) { 13020ccd76d4SJuha Yrjola omap_set_dma_dest_params(dma_ch, 0, OMAP_DMA_AMODE_CONSTANT, 13030ccd76d4SJuha Yrjola (host->mapbase + OMAP_HSMMC_DATA), 0, 0); 13040ccd76d4SJuha Yrjola omap_set_dma_src_params(dma_ch, 0, OMAP_DMA_AMODE_POST_INC, 13050ccd76d4SJuha Yrjola sg_dma_address(sgl), 0, 0); 13060ccd76d4SJuha Yrjola } else { 13070ccd76d4SJuha Yrjola omap_set_dma_src_params(dma_ch, 0, OMAP_DMA_AMODE_CONSTANT, 13080ccd76d4SJuha Yrjola (host->mapbase + OMAP_HSMMC_DATA), 0, 0); 13090ccd76d4SJuha Yrjola omap_set_dma_dest_params(dma_ch, 0, OMAP_DMA_AMODE_POST_INC, 13100ccd76d4SJuha Yrjola sg_dma_address(sgl), 0, 0); 13110ccd76d4SJuha Yrjola } 13120ccd76d4SJuha Yrjola 13130ccd76d4SJuha Yrjola blksz = host->data->blksz; 13140ccd76d4SJuha Yrjola nblk = sg_dma_len(sgl) / blksz; 13150ccd76d4SJuha Yrjola 13160ccd76d4SJuha Yrjola omap_set_dma_transfer_params(dma_ch, OMAP_DMA_DATA_TYPE_S32, 13170ccd76d4SJuha Yrjola blksz / 4, nblk, OMAP_DMA_SYNC_FRAME, 131870a3341aSDenis Karpov omap_hsmmc_get_dma_sync_dev(host, data), 13190ccd76d4SJuha Yrjola !(data->flags & MMC_DATA_WRITE)); 13200ccd76d4SJuha Yrjola 13210ccd76d4SJuha Yrjola omap_start_dma(dma_ch); 13220ccd76d4SJuha Yrjola } 13230ccd76d4SJuha Yrjola 1324a45c6cb8SMadhusudhan Chikkature /* 1325a45c6cb8SMadhusudhan Chikkature * DMA call back function 1326a45c6cb8SMadhusudhan Chikkature */ 1327b417577dSAdrian Hunter static void omap_hsmmc_dma_cb(int lch, u16 ch_status, void *cb_data) 1328a45c6cb8SMadhusudhan Chikkature { 1329b417577dSAdrian Hunter struct omap_hsmmc_host *host = cb_data; 1330b417577dSAdrian Hunter struct mmc_data *data = host->mrq->data; 1331b417577dSAdrian Hunter int dma_ch, req_in_progress; 1332a45c6cb8SMadhusudhan Chikkature 1333f3584e5eSVenkatraman S if (!(ch_status & OMAP_DMA_BLOCK_IRQ)) { 1334f3584e5eSVenkatraman S dev_warn(mmc_dev(host->mmc), "unexpected dma status %x\n", 1335f3584e5eSVenkatraman S ch_status); 1336f3584e5eSVenkatraman S return; 1337f3584e5eSVenkatraman S } 1338a45c6cb8SMadhusudhan Chikkature 1339b417577dSAdrian Hunter spin_lock(&host->irq_lock); 1340b417577dSAdrian Hunter if (host->dma_ch < 0) { 1341b417577dSAdrian Hunter spin_unlock(&host->irq_lock); 1342a45c6cb8SMadhusudhan Chikkature return; 1343b417577dSAdrian Hunter } 1344a45c6cb8SMadhusudhan Chikkature 13450ccd76d4SJuha Yrjola host->dma_sg_idx++; 13460ccd76d4SJuha Yrjola if (host->dma_sg_idx < host->dma_len) { 13470ccd76d4SJuha Yrjola /* Fire up the next transfer. */ 1348b417577dSAdrian Hunter omap_hsmmc_config_dma_params(host, data, 1349b417577dSAdrian Hunter data->sg + host->dma_sg_idx); 1350b417577dSAdrian Hunter spin_unlock(&host->irq_lock); 13510ccd76d4SJuha Yrjola return; 13520ccd76d4SJuha Yrjola } 13530ccd76d4SJuha Yrjola 13549782aff8SPer Forlin if (!data->host_cookie) 1355a9120c33SPer Forlin dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len, 1356b417577dSAdrian Hunter omap_hsmmc_get_dma_dir(host, data)); 1357b417577dSAdrian Hunter 1358b417577dSAdrian Hunter req_in_progress = host->req_in_progress; 1359b417577dSAdrian Hunter dma_ch = host->dma_ch; 1360a45c6cb8SMadhusudhan Chikkature host->dma_ch = -1; 1361b417577dSAdrian Hunter spin_unlock(&host->irq_lock); 1362b417577dSAdrian Hunter 1363b417577dSAdrian Hunter omap_free_dma(dma_ch); 1364b417577dSAdrian Hunter 1365b417577dSAdrian Hunter /* If DMA has finished after TC, complete the request */ 1366b417577dSAdrian Hunter if (!req_in_progress) { 1367b417577dSAdrian Hunter struct mmc_request *mrq = host->mrq; 1368b417577dSAdrian Hunter 1369b417577dSAdrian Hunter host->mrq = NULL; 1370b417577dSAdrian Hunter mmc_request_done(host->mmc, mrq); 1371b417577dSAdrian Hunter } 1372a45c6cb8SMadhusudhan Chikkature } 1373a45c6cb8SMadhusudhan Chikkature 13749782aff8SPer Forlin static int omap_hsmmc_pre_dma_transfer(struct omap_hsmmc_host *host, 13759782aff8SPer Forlin struct mmc_data *data, 13769782aff8SPer Forlin struct omap_hsmmc_next *next) 13779782aff8SPer Forlin { 13789782aff8SPer Forlin int dma_len; 13799782aff8SPer Forlin 13809782aff8SPer Forlin if (!next && data->host_cookie && 13819782aff8SPer Forlin data->host_cookie != host->next_data.cookie) { 13829782aff8SPer Forlin printk(KERN_WARNING "[%s] invalid cookie: data->host_cookie %d" 13839782aff8SPer Forlin " host->next_data.cookie %d\n", 13849782aff8SPer Forlin __func__, data->host_cookie, host->next_data.cookie); 13859782aff8SPer Forlin data->host_cookie = 0; 13869782aff8SPer Forlin } 13879782aff8SPer Forlin 13889782aff8SPer Forlin /* Check if next job is already prepared */ 13899782aff8SPer Forlin if (next || 13909782aff8SPer Forlin (!next && data->host_cookie != host->next_data.cookie)) { 13919782aff8SPer Forlin dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg, 13929782aff8SPer Forlin data->sg_len, 13939782aff8SPer Forlin omap_hsmmc_get_dma_dir(host, data)); 13949782aff8SPer Forlin 13959782aff8SPer Forlin } else { 13969782aff8SPer Forlin dma_len = host->next_data.dma_len; 13979782aff8SPer Forlin host->next_data.dma_len = 0; 13989782aff8SPer Forlin } 13999782aff8SPer Forlin 14009782aff8SPer Forlin 14019782aff8SPer Forlin if (dma_len == 0) 14029782aff8SPer Forlin return -EINVAL; 14039782aff8SPer Forlin 14049782aff8SPer Forlin if (next) { 14059782aff8SPer Forlin next->dma_len = dma_len; 14069782aff8SPer Forlin data->host_cookie = ++next->cookie < 0 ? 1 : next->cookie; 14079782aff8SPer Forlin } else 14089782aff8SPer Forlin host->dma_len = dma_len; 14099782aff8SPer Forlin 14109782aff8SPer Forlin return 0; 14119782aff8SPer Forlin } 14129782aff8SPer Forlin 1413a45c6cb8SMadhusudhan Chikkature /* 1414a45c6cb8SMadhusudhan Chikkature * Routine to configure and start DMA for the MMC card 1415a45c6cb8SMadhusudhan Chikkature */ 141670a3341aSDenis Karpov static int omap_hsmmc_start_dma_transfer(struct omap_hsmmc_host *host, 141770a3341aSDenis Karpov struct mmc_request *req) 1418a45c6cb8SMadhusudhan Chikkature { 1419b417577dSAdrian Hunter int dma_ch = 0, ret = 0, i; 1420a45c6cb8SMadhusudhan Chikkature struct mmc_data *data = req->data; 1421a45c6cb8SMadhusudhan Chikkature 14220ccd76d4SJuha Yrjola /* Sanity check: all the SG entries must be aligned by block size. */ 1423a3f406f8SJarkko Lavinen for (i = 0; i < data->sg_len; i++) { 14240ccd76d4SJuha Yrjola struct scatterlist *sgl; 14250ccd76d4SJuha Yrjola 14260ccd76d4SJuha Yrjola sgl = data->sg + i; 14270ccd76d4SJuha Yrjola if (sgl->length % data->blksz) 14280ccd76d4SJuha Yrjola return -EINVAL; 14290ccd76d4SJuha Yrjola } 14300ccd76d4SJuha Yrjola if ((data->blksz % 4) != 0) 14310ccd76d4SJuha Yrjola /* REVISIT: The MMC buffer increments only when MSB is written. 14320ccd76d4SJuha Yrjola * Return error for blksz which is non multiple of four. 14330ccd76d4SJuha Yrjola */ 14340ccd76d4SJuha Yrjola return -EINVAL; 14350ccd76d4SJuha Yrjola 1436b417577dSAdrian Hunter BUG_ON(host->dma_ch != -1); 1437a45c6cb8SMadhusudhan Chikkature 143870a3341aSDenis Karpov ret = omap_request_dma(omap_hsmmc_get_dma_sync_dev(host, data), 143970a3341aSDenis Karpov "MMC/SD", omap_hsmmc_dma_cb, host, &dma_ch); 1440a45c6cb8SMadhusudhan Chikkature if (ret != 0) { 14410ccd76d4SJuha Yrjola dev_err(mmc_dev(host->mmc), 1442a45c6cb8SMadhusudhan Chikkature "%s: omap_request_dma() failed with %d\n", 1443a45c6cb8SMadhusudhan Chikkature mmc_hostname(host->mmc), ret); 1444a45c6cb8SMadhusudhan Chikkature return ret; 1445a45c6cb8SMadhusudhan Chikkature } 14469782aff8SPer Forlin ret = omap_hsmmc_pre_dma_transfer(host, data, NULL); 14479782aff8SPer Forlin if (ret) 14489782aff8SPer Forlin return ret; 1449a45c6cb8SMadhusudhan Chikkature 1450a45c6cb8SMadhusudhan Chikkature host->dma_ch = dma_ch; 14510ccd76d4SJuha Yrjola host->dma_sg_idx = 0; 1452a45c6cb8SMadhusudhan Chikkature 145370a3341aSDenis Karpov omap_hsmmc_config_dma_params(host, data, data->sg); 1454a45c6cb8SMadhusudhan Chikkature 1455a45c6cb8SMadhusudhan Chikkature return 0; 1456a45c6cb8SMadhusudhan Chikkature } 1457a45c6cb8SMadhusudhan Chikkature 145870a3341aSDenis Karpov static void set_data_timeout(struct omap_hsmmc_host *host, 1459e2bf08d6SAdrian Hunter unsigned int timeout_ns, 1460e2bf08d6SAdrian Hunter unsigned int timeout_clks) 1461a45c6cb8SMadhusudhan Chikkature { 1462a45c6cb8SMadhusudhan Chikkature unsigned int timeout, cycle_ns; 1463a45c6cb8SMadhusudhan Chikkature uint32_t reg, clkd, dto = 0; 1464a45c6cb8SMadhusudhan Chikkature 1465a45c6cb8SMadhusudhan Chikkature reg = OMAP_HSMMC_READ(host->base, SYSCTL); 1466a45c6cb8SMadhusudhan Chikkature clkd = (reg & CLKD_MASK) >> CLKD_SHIFT; 1467a45c6cb8SMadhusudhan Chikkature if (clkd == 0) 1468a45c6cb8SMadhusudhan Chikkature clkd = 1; 1469a45c6cb8SMadhusudhan Chikkature 1470a45c6cb8SMadhusudhan Chikkature cycle_ns = 1000000000 / (clk_get_rate(host->fclk) / clkd); 1471e2bf08d6SAdrian Hunter timeout = timeout_ns / cycle_ns; 1472e2bf08d6SAdrian Hunter timeout += timeout_clks; 1473a45c6cb8SMadhusudhan Chikkature if (timeout) { 1474a45c6cb8SMadhusudhan Chikkature while ((timeout & 0x80000000) == 0) { 1475a45c6cb8SMadhusudhan Chikkature dto += 1; 1476a45c6cb8SMadhusudhan Chikkature timeout <<= 1; 1477a45c6cb8SMadhusudhan Chikkature } 1478a45c6cb8SMadhusudhan Chikkature dto = 31 - dto; 1479a45c6cb8SMadhusudhan Chikkature timeout <<= 1; 1480a45c6cb8SMadhusudhan Chikkature if (timeout && dto) 1481a45c6cb8SMadhusudhan Chikkature dto += 1; 1482a45c6cb8SMadhusudhan Chikkature if (dto >= 13) 1483a45c6cb8SMadhusudhan Chikkature dto -= 13; 1484a45c6cb8SMadhusudhan Chikkature else 1485a45c6cb8SMadhusudhan Chikkature dto = 0; 1486a45c6cb8SMadhusudhan Chikkature if (dto > 14) 1487a45c6cb8SMadhusudhan Chikkature dto = 14; 1488a45c6cb8SMadhusudhan Chikkature } 1489a45c6cb8SMadhusudhan Chikkature 1490a45c6cb8SMadhusudhan Chikkature reg &= ~DTO_MASK; 1491a45c6cb8SMadhusudhan Chikkature reg |= dto << DTO_SHIFT; 1492a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, reg); 1493a45c6cb8SMadhusudhan Chikkature } 1494a45c6cb8SMadhusudhan Chikkature 1495a45c6cb8SMadhusudhan Chikkature /* 1496a45c6cb8SMadhusudhan Chikkature * Configure block length for MMC/SD cards and initiate the transfer. 1497a45c6cb8SMadhusudhan Chikkature */ 1498a45c6cb8SMadhusudhan Chikkature static int 149970a3341aSDenis Karpov omap_hsmmc_prepare_data(struct omap_hsmmc_host *host, struct mmc_request *req) 1500a45c6cb8SMadhusudhan Chikkature { 1501a45c6cb8SMadhusudhan Chikkature int ret; 1502a45c6cb8SMadhusudhan Chikkature host->data = req->data; 1503a45c6cb8SMadhusudhan Chikkature 1504a45c6cb8SMadhusudhan Chikkature if (req->data == NULL) { 1505a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, BLK, 0); 1506e2bf08d6SAdrian Hunter /* 1507e2bf08d6SAdrian Hunter * Set an arbitrary 100ms data timeout for commands with 1508e2bf08d6SAdrian Hunter * busy signal. 1509e2bf08d6SAdrian Hunter */ 1510e2bf08d6SAdrian Hunter if (req->cmd->flags & MMC_RSP_BUSY) 1511e2bf08d6SAdrian Hunter set_data_timeout(host, 100000000U, 0); 1512a45c6cb8SMadhusudhan Chikkature return 0; 1513a45c6cb8SMadhusudhan Chikkature } 1514a45c6cb8SMadhusudhan Chikkature 1515a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, BLK, (req->data->blksz) 1516a45c6cb8SMadhusudhan Chikkature | (req->data->blocks << 16)); 1517e2bf08d6SAdrian Hunter set_data_timeout(host, req->data->timeout_ns, req->data->timeout_clks); 1518a45c6cb8SMadhusudhan Chikkature 1519a45c6cb8SMadhusudhan Chikkature if (host->use_dma) { 152070a3341aSDenis Karpov ret = omap_hsmmc_start_dma_transfer(host, req); 1521a45c6cb8SMadhusudhan Chikkature if (ret != 0) { 1522a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "MMC start dma failure\n"); 1523a45c6cb8SMadhusudhan Chikkature return ret; 1524a45c6cb8SMadhusudhan Chikkature } 1525a45c6cb8SMadhusudhan Chikkature } 1526a45c6cb8SMadhusudhan Chikkature return 0; 1527a45c6cb8SMadhusudhan Chikkature } 1528a45c6cb8SMadhusudhan Chikkature 15299782aff8SPer Forlin static void omap_hsmmc_post_req(struct mmc_host *mmc, struct mmc_request *mrq, 15309782aff8SPer Forlin int err) 15319782aff8SPer Forlin { 15329782aff8SPer Forlin struct omap_hsmmc_host *host = mmc_priv(mmc); 15339782aff8SPer Forlin struct mmc_data *data = mrq->data; 15349782aff8SPer Forlin 15359782aff8SPer Forlin if (host->use_dma) { 15369782aff8SPer Forlin dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len, 15379782aff8SPer Forlin omap_hsmmc_get_dma_dir(host, data)); 15389782aff8SPer Forlin data->host_cookie = 0; 15399782aff8SPer Forlin } 15409782aff8SPer Forlin } 15419782aff8SPer Forlin 15429782aff8SPer Forlin static void omap_hsmmc_pre_req(struct mmc_host *mmc, struct mmc_request *mrq, 15439782aff8SPer Forlin bool is_first_req) 15449782aff8SPer Forlin { 15459782aff8SPer Forlin struct omap_hsmmc_host *host = mmc_priv(mmc); 15469782aff8SPer Forlin 15479782aff8SPer Forlin if (mrq->data->host_cookie) { 15489782aff8SPer Forlin mrq->data->host_cookie = 0; 15499782aff8SPer Forlin return ; 15509782aff8SPer Forlin } 15519782aff8SPer Forlin 15529782aff8SPer Forlin if (host->use_dma) 15539782aff8SPer Forlin if (omap_hsmmc_pre_dma_transfer(host, mrq->data, 15549782aff8SPer Forlin &host->next_data)) 15559782aff8SPer Forlin mrq->data->host_cookie = 0; 15569782aff8SPer Forlin } 15579782aff8SPer Forlin 1558a45c6cb8SMadhusudhan Chikkature /* 1559a45c6cb8SMadhusudhan Chikkature * Request function. for read/write operation 1560a45c6cb8SMadhusudhan Chikkature */ 156170a3341aSDenis Karpov static void omap_hsmmc_request(struct mmc_host *mmc, struct mmc_request *req) 1562a45c6cb8SMadhusudhan Chikkature { 156370a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1564a3f406f8SJarkko Lavinen int err; 1565a45c6cb8SMadhusudhan Chikkature 1566b417577dSAdrian Hunter BUG_ON(host->req_in_progress); 1567b417577dSAdrian Hunter BUG_ON(host->dma_ch != -1); 1568b62f6228SAdrian Hunter if (host->protect_card) { 1569b62f6228SAdrian Hunter if (host->reqs_blocked < 3) { 1570b62f6228SAdrian Hunter /* 1571b62f6228SAdrian Hunter * Ensure the controller is left in a consistent 1572b62f6228SAdrian Hunter * state by resetting the command and data state 1573b62f6228SAdrian Hunter * machines. 1574b62f6228SAdrian Hunter */ 1575b62f6228SAdrian Hunter omap_hsmmc_reset_controller_fsm(host, SRD); 1576b62f6228SAdrian Hunter omap_hsmmc_reset_controller_fsm(host, SRC); 1577b62f6228SAdrian Hunter host->reqs_blocked += 1; 1578b62f6228SAdrian Hunter } 1579b62f6228SAdrian Hunter req->cmd->error = -EBADF; 1580b62f6228SAdrian Hunter if (req->data) 1581b62f6228SAdrian Hunter req->data->error = -EBADF; 1582b417577dSAdrian Hunter req->cmd->retries = 0; 1583b62f6228SAdrian Hunter mmc_request_done(mmc, req); 1584b62f6228SAdrian Hunter return; 1585b62f6228SAdrian Hunter } else if (host->reqs_blocked) 1586b62f6228SAdrian Hunter host->reqs_blocked = 0; 1587a45c6cb8SMadhusudhan Chikkature WARN_ON(host->mrq != NULL); 1588a45c6cb8SMadhusudhan Chikkature host->mrq = req; 158970a3341aSDenis Karpov err = omap_hsmmc_prepare_data(host, req); 1590a3f406f8SJarkko Lavinen if (err) { 1591a3f406f8SJarkko Lavinen req->cmd->error = err; 1592a3f406f8SJarkko Lavinen if (req->data) 1593a3f406f8SJarkko Lavinen req->data->error = err; 1594a3f406f8SJarkko Lavinen host->mrq = NULL; 1595a3f406f8SJarkko Lavinen mmc_request_done(mmc, req); 1596a3f406f8SJarkko Lavinen return; 1597a3f406f8SJarkko Lavinen } 1598a3f406f8SJarkko Lavinen 159970a3341aSDenis Karpov omap_hsmmc_start_command(host, req->cmd, req->data); 1600a45c6cb8SMadhusudhan Chikkature } 1601a45c6cb8SMadhusudhan Chikkature 1602a45c6cb8SMadhusudhan Chikkature /* Routine to configure clock values. Exposed API to core */ 160370a3341aSDenis Karpov static void omap_hsmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 1604a45c6cb8SMadhusudhan Chikkature { 160570a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1606a45c6cb8SMadhusudhan Chikkature u16 dsor = 0; 1607a45c6cb8SMadhusudhan Chikkature unsigned long regval; 1608a45c6cb8SMadhusudhan Chikkature unsigned long timeout; 160973153010SJarkko Lavinen u32 con; 1610a3621465SAdrian Hunter int do_send_init_stream = 0; 1611a45c6cb8SMadhusudhan Chikkature 1612fa4aa2d4SBalaji T K pm_runtime_get_sync(host->dev); 16135e2ea617SAdrian Hunter 1614a3621465SAdrian Hunter if (ios->power_mode != host->power_mode) { 1615a45c6cb8SMadhusudhan Chikkature switch (ios->power_mode) { 1616a45c6cb8SMadhusudhan Chikkature case MMC_POWER_OFF: 1617a3621465SAdrian Hunter mmc_slot(host).set_power(host->dev, host->slot_id, 1618a3621465SAdrian Hunter 0, 0); 1619623821f7SAdrian Hunter host->vdd = 0; 1620a45c6cb8SMadhusudhan Chikkature break; 1621a45c6cb8SMadhusudhan Chikkature case MMC_POWER_UP: 1622a3621465SAdrian Hunter mmc_slot(host).set_power(host->dev, host->slot_id, 1623a3621465SAdrian Hunter 1, ios->vdd); 1624623821f7SAdrian Hunter host->vdd = ios->vdd; 1625a45c6cb8SMadhusudhan Chikkature break; 1626a3621465SAdrian Hunter case MMC_POWER_ON: 1627a3621465SAdrian Hunter do_send_init_stream = 1; 1628a3621465SAdrian Hunter break; 1629a3621465SAdrian Hunter } 1630a3621465SAdrian Hunter host->power_mode = ios->power_mode; 1631a45c6cb8SMadhusudhan Chikkature } 1632a45c6cb8SMadhusudhan Chikkature 1633dd498effSDenis Karpov /* FIXME: set registers based only on changes to ios */ 1634dd498effSDenis Karpov 163573153010SJarkko Lavinen con = OMAP_HSMMC_READ(host->base, CON); 1636a45c6cb8SMadhusudhan Chikkature switch (mmc->ios.bus_width) { 163773153010SJarkko Lavinen case MMC_BUS_WIDTH_8: 163873153010SJarkko Lavinen OMAP_HSMMC_WRITE(host->base, CON, con | DW8); 163973153010SJarkko Lavinen break; 1640a45c6cb8SMadhusudhan Chikkature case MMC_BUS_WIDTH_4: 164173153010SJarkko Lavinen OMAP_HSMMC_WRITE(host->base, CON, con & ~DW8); 1642a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 1643a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) | FOUR_BIT); 1644a45c6cb8SMadhusudhan Chikkature break; 1645a45c6cb8SMadhusudhan Chikkature case MMC_BUS_WIDTH_1: 164673153010SJarkko Lavinen OMAP_HSMMC_WRITE(host->base, CON, con & ~DW8); 1647a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 1648a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) & ~FOUR_BIT); 1649a45c6cb8SMadhusudhan Chikkature break; 1650a45c6cb8SMadhusudhan Chikkature } 1651a45c6cb8SMadhusudhan Chikkature 16524621d5f8SKishore Kadiyala if (host->pdata->controller_flags & OMAP_HSMMC_SUPPORTS_DUAL_VOLT) { 1653eb250826SDavid Brownell /* Only MMC1 can interface at 3V without some flavor 1654eb250826SDavid Brownell * of external transceiver; but they all handle 1.8V. 1655eb250826SDavid Brownell */ 1656a45c6cb8SMadhusudhan Chikkature if ((OMAP_HSMMC_READ(host->base, HCTL) & SDVSDET) && 1657a45c6cb8SMadhusudhan Chikkature (ios->vdd == DUAL_VOLT_OCR_BIT)) { 1658a45c6cb8SMadhusudhan Chikkature /* 1659a45c6cb8SMadhusudhan Chikkature * The mmc_select_voltage fn of the core does 1660a45c6cb8SMadhusudhan Chikkature * not seem to set the power_mode to 1661a45c6cb8SMadhusudhan Chikkature * MMC_POWER_UP upon recalculating the voltage. 1662a45c6cb8SMadhusudhan Chikkature * vdd 1.8v. 1663a45c6cb8SMadhusudhan Chikkature */ 166470a3341aSDenis Karpov if (omap_hsmmc_switch_opcond(host, ios->vdd) != 0) 1665a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1666a45c6cb8SMadhusudhan Chikkature "Switch operation failed\n"); 1667a45c6cb8SMadhusudhan Chikkature } 1668a45c6cb8SMadhusudhan Chikkature } 1669a45c6cb8SMadhusudhan Chikkature 1670a45c6cb8SMadhusudhan Chikkature if (ios->clock) { 1671a45c6cb8SMadhusudhan Chikkature dsor = OMAP_MMC_MASTER_CLOCK / ios->clock; 1672a45c6cb8SMadhusudhan Chikkature if (dsor < 1) 1673a45c6cb8SMadhusudhan Chikkature dsor = 1; 1674a45c6cb8SMadhusudhan Chikkature 1675a45c6cb8SMadhusudhan Chikkature if (OMAP_MMC_MASTER_CLOCK / dsor > ios->clock) 1676a45c6cb8SMadhusudhan Chikkature dsor++; 1677a45c6cb8SMadhusudhan Chikkature 1678a45c6cb8SMadhusudhan Chikkature if (dsor > 250) 1679a45c6cb8SMadhusudhan Chikkature dsor = 250; 1680a45c6cb8SMadhusudhan Chikkature } 168170a3341aSDenis Karpov omap_hsmmc_stop_clock(host); 1682a45c6cb8SMadhusudhan Chikkature regval = OMAP_HSMMC_READ(host->base, SYSCTL); 1683a45c6cb8SMadhusudhan Chikkature regval = regval & ~(CLKD_MASK); 1684a45c6cb8SMadhusudhan Chikkature regval = regval | (dsor << 6) | (DTO << 16); 1685a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, regval); 1686a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, 1687a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, SYSCTL) | ICE); 1688a45c6cb8SMadhusudhan Chikkature 1689a45c6cb8SMadhusudhan Chikkature /* Wait till the ICS bit is set */ 1690a45c6cb8SMadhusudhan Chikkature timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 169111dd62a7SDenis Karpov while ((OMAP_HSMMC_READ(host->base, SYSCTL) & ICS) != ICS 1692a45c6cb8SMadhusudhan Chikkature && time_before(jiffies, timeout)) 1693a45c6cb8SMadhusudhan Chikkature msleep(1); 1694a45c6cb8SMadhusudhan Chikkature 1695a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, 1696a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, SYSCTL) | CEN); 1697a45c6cb8SMadhusudhan Chikkature 1698a3621465SAdrian Hunter if (do_send_init_stream) 1699a45c6cb8SMadhusudhan Chikkature send_init_stream(host); 1700a45c6cb8SMadhusudhan Chikkature 1701abb28e73SDenis Karpov con = OMAP_HSMMC_READ(host->base, CON); 1702a45c6cb8SMadhusudhan Chikkature if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN) 1703abb28e73SDenis Karpov OMAP_HSMMC_WRITE(host->base, CON, con | OD); 1704abb28e73SDenis Karpov else 1705abb28e73SDenis Karpov OMAP_HSMMC_WRITE(host->base, CON, con & ~OD); 17065e2ea617SAdrian Hunter 1707fa4aa2d4SBalaji T K pm_runtime_put_autosuspend(host->dev); 1708a45c6cb8SMadhusudhan Chikkature } 1709a45c6cb8SMadhusudhan Chikkature 1710a45c6cb8SMadhusudhan Chikkature static int omap_hsmmc_get_cd(struct mmc_host *mmc) 1711a45c6cb8SMadhusudhan Chikkature { 171270a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1713a45c6cb8SMadhusudhan Chikkature 1714191d1f1dSDenis Karpov if (!mmc_slot(host).card_detect) 1715a45c6cb8SMadhusudhan Chikkature return -ENOSYS; 1716db0fefc5SAdrian Hunter return mmc_slot(host).card_detect(host->dev, host->slot_id); 1717a45c6cb8SMadhusudhan Chikkature } 1718a45c6cb8SMadhusudhan Chikkature 1719a45c6cb8SMadhusudhan Chikkature static int omap_hsmmc_get_ro(struct mmc_host *mmc) 1720a45c6cb8SMadhusudhan Chikkature { 172170a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1722a45c6cb8SMadhusudhan Chikkature 1723191d1f1dSDenis Karpov if (!mmc_slot(host).get_ro) 1724a45c6cb8SMadhusudhan Chikkature return -ENOSYS; 1725191d1f1dSDenis Karpov return mmc_slot(host).get_ro(host->dev, 0); 1726a45c6cb8SMadhusudhan Chikkature } 1727a45c6cb8SMadhusudhan Chikkature 17284816858cSGrazvydas Ignotas static void omap_hsmmc_init_card(struct mmc_host *mmc, struct mmc_card *card) 17294816858cSGrazvydas Ignotas { 17304816858cSGrazvydas Ignotas struct omap_hsmmc_host *host = mmc_priv(mmc); 17314816858cSGrazvydas Ignotas 17324816858cSGrazvydas Ignotas if (mmc_slot(host).init_card) 17334816858cSGrazvydas Ignotas mmc_slot(host).init_card(card); 17344816858cSGrazvydas Ignotas } 17354816858cSGrazvydas Ignotas 173670a3341aSDenis Karpov static void omap_hsmmc_conf_bus_power(struct omap_hsmmc_host *host) 17371b331e69SKim Kyuwon { 17381b331e69SKim Kyuwon u32 hctl, capa, value; 17391b331e69SKim Kyuwon 17401b331e69SKim Kyuwon /* Only MMC1 supports 3.0V */ 17414621d5f8SKishore Kadiyala if (host->pdata->controller_flags & OMAP_HSMMC_SUPPORTS_DUAL_VOLT) { 17421b331e69SKim Kyuwon hctl = SDVS30; 17431b331e69SKim Kyuwon capa = VS30 | VS18; 17441b331e69SKim Kyuwon } else { 17451b331e69SKim Kyuwon hctl = SDVS18; 17461b331e69SKim Kyuwon capa = VS18; 17471b331e69SKim Kyuwon } 17481b331e69SKim Kyuwon 17491b331e69SKim Kyuwon value = OMAP_HSMMC_READ(host->base, HCTL) & ~SDVS_MASK; 17501b331e69SKim Kyuwon OMAP_HSMMC_WRITE(host->base, HCTL, value | hctl); 17511b331e69SKim Kyuwon 17521b331e69SKim Kyuwon value = OMAP_HSMMC_READ(host->base, CAPA); 17531b331e69SKim Kyuwon OMAP_HSMMC_WRITE(host->base, CAPA, value | capa); 17541b331e69SKim Kyuwon 17551b331e69SKim Kyuwon /* Set the controller to AUTO IDLE mode */ 17561b331e69SKim Kyuwon value = OMAP_HSMMC_READ(host->base, SYSCONFIG); 17571b331e69SKim Kyuwon OMAP_HSMMC_WRITE(host->base, SYSCONFIG, value | AUTOIDLE); 17581b331e69SKim Kyuwon 17591b331e69SKim Kyuwon /* Set SD bus power bit */ 1760e13bb300SAdrian Hunter set_sd_bus_power(host); 17611b331e69SKim Kyuwon } 17621b331e69SKim Kyuwon 176370a3341aSDenis Karpov static int omap_hsmmc_enable_fclk(struct mmc_host *mmc) 1764dd498effSDenis Karpov { 176570a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1766dd498effSDenis Karpov 1767fa4aa2d4SBalaji T K pm_runtime_get_sync(host->dev); 1768fa4aa2d4SBalaji T K 1769dd498effSDenis Karpov return 0; 1770dd498effSDenis Karpov } 1771dd498effSDenis Karpov 177270a3341aSDenis Karpov static int omap_hsmmc_disable_fclk(struct mmc_host *mmc, int lazy) 1773dd498effSDenis Karpov { 177470a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1775dd498effSDenis Karpov 1776fa4aa2d4SBalaji T K pm_runtime_mark_last_busy(host->dev); 1777fa4aa2d4SBalaji T K pm_runtime_put_autosuspend(host->dev); 1778fa4aa2d4SBalaji T K 1779dd498effSDenis Karpov return 0; 1780dd498effSDenis Karpov } 1781dd498effSDenis Karpov 178270a3341aSDenis Karpov static const struct mmc_host_ops omap_hsmmc_ops = { 178370a3341aSDenis Karpov .enable = omap_hsmmc_enable_fclk, 178470a3341aSDenis Karpov .disable = omap_hsmmc_disable_fclk, 17859782aff8SPer Forlin .post_req = omap_hsmmc_post_req, 17869782aff8SPer Forlin .pre_req = omap_hsmmc_pre_req, 178770a3341aSDenis Karpov .request = omap_hsmmc_request, 178870a3341aSDenis Karpov .set_ios = omap_hsmmc_set_ios, 1789dd498effSDenis Karpov .get_cd = omap_hsmmc_get_cd, 1790dd498effSDenis Karpov .get_ro = omap_hsmmc_get_ro, 17914816858cSGrazvydas Ignotas .init_card = omap_hsmmc_init_card, 1792dd498effSDenis Karpov /* NYET -- enable_sdio_irq */ 1793dd498effSDenis Karpov }; 1794dd498effSDenis Karpov 1795d900f712SDenis Karpov #ifdef CONFIG_DEBUG_FS 1796d900f712SDenis Karpov 179770a3341aSDenis Karpov static int omap_hsmmc_regs_show(struct seq_file *s, void *data) 1798d900f712SDenis Karpov { 1799d900f712SDenis Karpov struct mmc_host *mmc = s->private; 180070a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 180111dd62a7SDenis Karpov int context_loss = 0; 180211dd62a7SDenis Karpov 180370a3341aSDenis Karpov if (host->pdata->get_context_loss_count) 180470a3341aSDenis Karpov context_loss = host->pdata->get_context_loss_count(host->dev); 1805d900f712SDenis Karpov 18065e2ea617SAdrian Hunter seq_printf(s, "mmc%d:\n" 18075e2ea617SAdrian Hunter " enabled:\t%d\n" 1808dd498effSDenis Karpov " dpm_state:\t%d\n" 18095e2ea617SAdrian Hunter " nesting_cnt:\t%d\n" 181011dd62a7SDenis Karpov " ctx_loss:\t%d:%d\n" 18115e2ea617SAdrian Hunter "\nregs:\n", 1812dd498effSDenis Karpov mmc->index, mmc->enabled ? 1 : 0, 1813dd498effSDenis Karpov host->dpm_state, mmc->nesting_cnt, 181411dd62a7SDenis Karpov host->context_loss, context_loss); 18155e2ea617SAdrian Hunter 18167a8c2cefSBalaji T K if (host->suspended) { 1817dd498effSDenis Karpov seq_printf(s, "host suspended, can't read registers\n"); 1818dd498effSDenis Karpov return 0; 1819dd498effSDenis Karpov } 1820dd498effSDenis Karpov 1821fa4aa2d4SBalaji T K pm_runtime_get_sync(host->dev); 1822d900f712SDenis Karpov 1823d900f712SDenis Karpov seq_printf(s, "SYSCONFIG:\t0x%08x\n", 1824d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCONFIG)); 1825d900f712SDenis Karpov seq_printf(s, "CON:\t\t0x%08x\n", 1826d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, CON)); 1827d900f712SDenis Karpov seq_printf(s, "HCTL:\t\t0x%08x\n", 1828d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, HCTL)); 1829d900f712SDenis Karpov seq_printf(s, "SYSCTL:\t\t0x%08x\n", 1830d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCTL)); 1831d900f712SDenis Karpov seq_printf(s, "IE:\t\t0x%08x\n", 1832d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, IE)); 1833d900f712SDenis Karpov seq_printf(s, "ISE:\t\t0x%08x\n", 1834d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, ISE)); 1835d900f712SDenis Karpov seq_printf(s, "CAPA:\t\t0x%08x\n", 1836d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, CAPA)); 18375e2ea617SAdrian Hunter 1838fa4aa2d4SBalaji T K pm_runtime_mark_last_busy(host->dev); 1839fa4aa2d4SBalaji T K pm_runtime_put_autosuspend(host->dev); 1840dd498effSDenis Karpov 1841d900f712SDenis Karpov return 0; 1842d900f712SDenis Karpov } 1843d900f712SDenis Karpov 184470a3341aSDenis Karpov static int omap_hsmmc_regs_open(struct inode *inode, struct file *file) 1845d900f712SDenis Karpov { 184670a3341aSDenis Karpov return single_open(file, omap_hsmmc_regs_show, inode->i_private); 1847d900f712SDenis Karpov } 1848d900f712SDenis Karpov 1849d900f712SDenis Karpov static const struct file_operations mmc_regs_fops = { 185070a3341aSDenis Karpov .open = omap_hsmmc_regs_open, 1851d900f712SDenis Karpov .read = seq_read, 1852d900f712SDenis Karpov .llseek = seq_lseek, 1853d900f712SDenis Karpov .release = single_release, 1854d900f712SDenis Karpov }; 1855d900f712SDenis Karpov 185670a3341aSDenis Karpov static void omap_hsmmc_debugfs(struct mmc_host *mmc) 1857d900f712SDenis Karpov { 1858d900f712SDenis Karpov if (mmc->debugfs_root) 1859d900f712SDenis Karpov debugfs_create_file("regs", S_IRUSR, mmc->debugfs_root, 1860d900f712SDenis Karpov mmc, &mmc_regs_fops); 1861d900f712SDenis Karpov } 1862d900f712SDenis Karpov 1863d900f712SDenis Karpov #else 1864d900f712SDenis Karpov 186570a3341aSDenis Karpov static void omap_hsmmc_debugfs(struct mmc_host *mmc) 1866d900f712SDenis Karpov { 1867d900f712SDenis Karpov } 1868d900f712SDenis Karpov 1869d900f712SDenis Karpov #endif 1870d900f712SDenis Karpov 187170a3341aSDenis Karpov static int __init omap_hsmmc_probe(struct platform_device *pdev) 1872a45c6cb8SMadhusudhan Chikkature { 1873a45c6cb8SMadhusudhan Chikkature struct omap_mmc_platform_data *pdata = pdev->dev.platform_data; 1874a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc; 187570a3341aSDenis Karpov struct omap_hsmmc_host *host = NULL; 1876a45c6cb8SMadhusudhan Chikkature struct resource *res; 1877db0fefc5SAdrian Hunter int ret, irq; 1878a45c6cb8SMadhusudhan Chikkature 1879a45c6cb8SMadhusudhan Chikkature if (pdata == NULL) { 1880a45c6cb8SMadhusudhan Chikkature dev_err(&pdev->dev, "Platform Data is missing\n"); 1881a45c6cb8SMadhusudhan Chikkature return -ENXIO; 1882a45c6cb8SMadhusudhan Chikkature } 1883a45c6cb8SMadhusudhan Chikkature 1884a45c6cb8SMadhusudhan Chikkature if (pdata->nr_slots == 0) { 1885a45c6cb8SMadhusudhan Chikkature dev_err(&pdev->dev, "No Slots\n"); 1886a45c6cb8SMadhusudhan Chikkature return -ENXIO; 1887a45c6cb8SMadhusudhan Chikkature } 1888a45c6cb8SMadhusudhan Chikkature 1889a45c6cb8SMadhusudhan Chikkature res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1890a45c6cb8SMadhusudhan Chikkature irq = platform_get_irq(pdev, 0); 1891a45c6cb8SMadhusudhan Chikkature if (res == NULL || irq < 0) 1892a45c6cb8SMadhusudhan Chikkature return -ENXIO; 1893a45c6cb8SMadhusudhan Chikkature 189491a0b089Skishore kadiyala res->start += pdata->reg_offset; 189591a0b089Skishore kadiyala res->end += pdata->reg_offset; 1896984b203aSChris Ball res = request_mem_region(res->start, resource_size(res), pdev->name); 1897a45c6cb8SMadhusudhan Chikkature if (res == NULL) 1898a45c6cb8SMadhusudhan Chikkature return -EBUSY; 1899a45c6cb8SMadhusudhan Chikkature 1900db0fefc5SAdrian Hunter ret = omap_hsmmc_gpio_init(pdata); 1901db0fefc5SAdrian Hunter if (ret) 1902db0fefc5SAdrian Hunter goto err; 1903db0fefc5SAdrian Hunter 190470a3341aSDenis Karpov mmc = mmc_alloc_host(sizeof(struct omap_hsmmc_host), &pdev->dev); 1905a45c6cb8SMadhusudhan Chikkature if (!mmc) { 1906a45c6cb8SMadhusudhan Chikkature ret = -ENOMEM; 1907db0fefc5SAdrian Hunter goto err_alloc; 1908a45c6cb8SMadhusudhan Chikkature } 1909a45c6cb8SMadhusudhan Chikkature 1910a45c6cb8SMadhusudhan Chikkature host = mmc_priv(mmc); 1911a45c6cb8SMadhusudhan Chikkature host->mmc = mmc; 1912a45c6cb8SMadhusudhan Chikkature host->pdata = pdata; 1913a45c6cb8SMadhusudhan Chikkature host->dev = &pdev->dev; 1914a45c6cb8SMadhusudhan Chikkature host->use_dma = 1; 1915a45c6cb8SMadhusudhan Chikkature host->dev->dma_mask = &pdata->dma_mask; 1916a45c6cb8SMadhusudhan Chikkature host->dma_ch = -1; 1917a45c6cb8SMadhusudhan Chikkature host->irq = irq; 1918a45c6cb8SMadhusudhan Chikkature host->id = pdev->id; 1919a45c6cb8SMadhusudhan Chikkature host->slot_id = 0; 1920a45c6cb8SMadhusudhan Chikkature host->mapbase = res->start; 1921a45c6cb8SMadhusudhan Chikkature host->base = ioremap(host->mapbase, SZ_4K); 19226da20c89SAdrian Hunter host->power_mode = MMC_POWER_OFF; 19239782aff8SPer Forlin host->next_data.cookie = 1; 1924a45c6cb8SMadhusudhan Chikkature 1925a45c6cb8SMadhusudhan Chikkature platform_set_drvdata(pdev, host); 192670a3341aSDenis Karpov INIT_WORK(&host->mmc_carddetect_work, omap_hsmmc_detect); 1927a45c6cb8SMadhusudhan Chikkature 192870a3341aSDenis Karpov mmc->ops = &omap_hsmmc_ops; 1929dd498effSDenis Karpov 1930e0eb2424SAdrian Hunter /* 1931e0eb2424SAdrian Hunter * If regulator_disable can only put vcc_aux to sleep then there is 1932e0eb2424SAdrian Hunter * no off state. 1933e0eb2424SAdrian Hunter */ 1934e0eb2424SAdrian Hunter if (mmc_slot(host).vcc_aux_disable_is_sleep) 1935e0eb2424SAdrian Hunter mmc_slot(host).no_off = 1; 1936e0eb2424SAdrian Hunter 19376b206efeSAndy Shevchenko mmc->f_min = OMAP_MMC_MIN_CLOCK; 19386b206efeSAndy Shevchenko mmc->f_max = OMAP_MMC_MAX_CLOCK; 1939a45c6cb8SMadhusudhan Chikkature 19404dffd7a2SAdrian Hunter spin_lock_init(&host->irq_lock); 1941a45c6cb8SMadhusudhan Chikkature 19426f7607ccSRussell King host->fclk = clk_get(&pdev->dev, "fck"); 1943a45c6cb8SMadhusudhan Chikkature if (IS_ERR(host->fclk)) { 1944a45c6cb8SMadhusudhan Chikkature ret = PTR_ERR(host->fclk); 1945a45c6cb8SMadhusudhan Chikkature host->fclk = NULL; 1946a45c6cb8SMadhusudhan Chikkature goto err1; 1947a45c6cb8SMadhusudhan Chikkature } 1948a45c6cb8SMadhusudhan Chikkature 194970a3341aSDenis Karpov omap_hsmmc_context_save(host); 195011dd62a7SDenis Karpov 19515e2ea617SAdrian Hunter mmc->caps |= MMC_CAP_DISABLE; 1952dd498effSDenis Karpov 1953fa4aa2d4SBalaji T K pm_runtime_enable(host->dev); 1954fa4aa2d4SBalaji T K pm_runtime_get_sync(host->dev); 1955fa4aa2d4SBalaji T K pm_runtime_set_autosuspend_delay(host->dev, MMC_AUTOSUSPEND_DELAY); 1956fa4aa2d4SBalaji T K pm_runtime_use_autosuspend(host->dev); 1957a45c6cb8SMadhusudhan Chikkature 19582bec0893SAdrian Hunter if (cpu_is_omap2430()) { 1959a45c6cb8SMadhusudhan Chikkature host->dbclk = clk_get(&pdev->dev, "mmchsdb_fck"); 1960a45c6cb8SMadhusudhan Chikkature /* 1961a45c6cb8SMadhusudhan Chikkature * MMC can still work without debounce clock. 1962a45c6cb8SMadhusudhan Chikkature */ 1963a45c6cb8SMadhusudhan Chikkature if (IS_ERR(host->dbclk)) 19642bec0893SAdrian Hunter dev_warn(mmc_dev(host->mmc), 19652bec0893SAdrian Hunter "Failed to get debounce clock\n"); 1966a45c6cb8SMadhusudhan Chikkature else 19672bec0893SAdrian Hunter host->got_dbclk = 1; 19682bec0893SAdrian Hunter 19692bec0893SAdrian Hunter if (host->got_dbclk) 1970a45c6cb8SMadhusudhan Chikkature if (clk_enable(host->dbclk) != 0) 1971a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Enabling debounce" 1972a45c6cb8SMadhusudhan Chikkature " clk failed\n"); 19732bec0893SAdrian Hunter } 1974a45c6cb8SMadhusudhan Chikkature 19750ccd76d4SJuha Yrjola /* Since we do only SG emulation, we can have as many segs 19760ccd76d4SJuha Yrjola * as we want. */ 1977a36274e0SMartin K. Petersen mmc->max_segs = 1024; 19780ccd76d4SJuha Yrjola 1979a45c6cb8SMadhusudhan Chikkature mmc->max_blk_size = 512; /* Block Length at max can be 1024 */ 1980a45c6cb8SMadhusudhan Chikkature mmc->max_blk_count = 0xFFFF; /* No. of Blocks is 16 bits */ 1981a45c6cb8SMadhusudhan Chikkature mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; 1982a45c6cb8SMadhusudhan Chikkature mmc->max_seg_size = mmc->max_req_size; 1983a45c6cb8SMadhusudhan Chikkature 198413189e78SJarkko Lavinen mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED | 198593caf8e6SAdrian Hunter MMC_CAP_WAIT_WHILE_BUSY | MMC_CAP_ERASE; 1986a45c6cb8SMadhusudhan Chikkature 19873a63833eSSukumar Ghorai mmc->caps |= mmc_slot(host).caps; 19883a63833eSSukumar Ghorai if (mmc->caps & MMC_CAP_8_BIT_DATA) 1989a45c6cb8SMadhusudhan Chikkature mmc->caps |= MMC_CAP_4_BIT_DATA; 1990a45c6cb8SMadhusudhan Chikkature 1991191d1f1dSDenis Karpov if (mmc_slot(host).nonremovable) 199223d99bb9SAdrian Hunter mmc->caps |= MMC_CAP_NONREMOVABLE; 199323d99bb9SAdrian Hunter 199470a3341aSDenis Karpov omap_hsmmc_conf_bus_power(host); 1995a45c6cb8SMadhusudhan Chikkature 1996f3e2f1ddSGrazvydas Ignotas /* Select DMA lines */ 1997f3e2f1ddSGrazvydas Ignotas switch (host->id) { 1998f3e2f1ddSGrazvydas Ignotas case OMAP_MMC1_DEVID: 1999f3e2f1ddSGrazvydas Ignotas host->dma_line_tx = OMAP24XX_DMA_MMC1_TX; 2000f3e2f1ddSGrazvydas Ignotas host->dma_line_rx = OMAP24XX_DMA_MMC1_RX; 2001f3e2f1ddSGrazvydas Ignotas break; 2002f3e2f1ddSGrazvydas Ignotas case OMAP_MMC2_DEVID: 2003f3e2f1ddSGrazvydas Ignotas host->dma_line_tx = OMAP24XX_DMA_MMC2_TX; 2004f3e2f1ddSGrazvydas Ignotas host->dma_line_rx = OMAP24XX_DMA_MMC2_RX; 2005f3e2f1ddSGrazvydas Ignotas break; 2006f3e2f1ddSGrazvydas Ignotas case OMAP_MMC3_DEVID: 2007f3e2f1ddSGrazvydas Ignotas host->dma_line_tx = OMAP34XX_DMA_MMC3_TX; 2008f3e2f1ddSGrazvydas Ignotas host->dma_line_rx = OMAP34XX_DMA_MMC3_RX; 2009f3e2f1ddSGrazvydas Ignotas break; 201082cf818dSkishore kadiyala case OMAP_MMC4_DEVID: 201182cf818dSkishore kadiyala host->dma_line_tx = OMAP44XX_DMA_MMC4_TX; 201282cf818dSkishore kadiyala host->dma_line_rx = OMAP44XX_DMA_MMC4_RX; 201382cf818dSkishore kadiyala break; 201482cf818dSkishore kadiyala case OMAP_MMC5_DEVID: 201582cf818dSkishore kadiyala host->dma_line_tx = OMAP44XX_DMA_MMC5_TX; 201682cf818dSkishore kadiyala host->dma_line_rx = OMAP44XX_DMA_MMC5_RX; 201782cf818dSkishore kadiyala break; 2018f3e2f1ddSGrazvydas Ignotas default: 2019f3e2f1ddSGrazvydas Ignotas dev_err(mmc_dev(host->mmc), "Invalid MMC id\n"); 2020f3e2f1ddSGrazvydas Ignotas goto err_irq; 2021a45c6cb8SMadhusudhan Chikkature } 2022a45c6cb8SMadhusudhan Chikkature 2023a45c6cb8SMadhusudhan Chikkature /* Request IRQ for MMC operations */ 202470a3341aSDenis Karpov ret = request_irq(host->irq, omap_hsmmc_irq, IRQF_DISABLED, 2025a45c6cb8SMadhusudhan Chikkature mmc_hostname(mmc), host); 2026a45c6cb8SMadhusudhan Chikkature if (ret) { 2027a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Unable to grab HSMMC IRQ\n"); 2028a45c6cb8SMadhusudhan Chikkature goto err_irq; 2029a45c6cb8SMadhusudhan Chikkature } 2030a45c6cb8SMadhusudhan Chikkature 2031a45c6cb8SMadhusudhan Chikkature if (pdata->init != NULL) { 2032a45c6cb8SMadhusudhan Chikkature if (pdata->init(&pdev->dev) != 0) { 203370a3341aSDenis Karpov dev_dbg(mmc_dev(host->mmc), 203470a3341aSDenis Karpov "Unable to configure MMC IRQs\n"); 2035a45c6cb8SMadhusudhan Chikkature goto err_irq_cd_init; 2036a45c6cb8SMadhusudhan Chikkature } 2037a45c6cb8SMadhusudhan Chikkature } 2038db0fefc5SAdrian Hunter 2039b702b106SAdrian Hunter if (omap_hsmmc_have_reg() && !mmc_slot(host).set_power) { 2040db0fefc5SAdrian Hunter ret = omap_hsmmc_reg_get(host); 2041db0fefc5SAdrian Hunter if (ret) 2042db0fefc5SAdrian Hunter goto err_reg; 2043db0fefc5SAdrian Hunter host->use_reg = 1; 2044db0fefc5SAdrian Hunter } 2045db0fefc5SAdrian Hunter 2046b583f26dSDavid Brownell mmc->ocr_avail = mmc_slot(host).ocr_mask; 2047a45c6cb8SMadhusudhan Chikkature 2048a45c6cb8SMadhusudhan Chikkature /* Request IRQ for card detect */ 2049e1a55f5eSAdrian Hunter if ((mmc_slot(host).card_detect_irq)) { 2050a45c6cb8SMadhusudhan Chikkature ret = request_irq(mmc_slot(host).card_detect_irq, 205170a3341aSDenis Karpov omap_hsmmc_cd_handler, 2052a45c6cb8SMadhusudhan Chikkature IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING 2053a45c6cb8SMadhusudhan Chikkature | IRQF_DISABLED, 2054a45c6cb8SMadhusudhan Chikkature mmc_hostname(mmc), host); 2055a45c6cb8SMadhusudhan Chikkature if (ret) { 2056a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 2057a45c6cb8SMadhusudhan Chikkature "Unable to grab MMC CD IRQ\n"); 2058a45c6cb8SMadhusudhan Chikkature goto err_irq_cd; 2059a45c6cb8SMadhusudhan Chikkature } 206072f2e2c7Skishore kadiyala pdata->suspend = omap_hsmmc_suspend_cdirq; 206172f2e2c7Skishore kadiyala pdata->resume = omap_hsmmc_resume_cdirq; 2062a45c6cb8SMadhusudhan Chikkature } 2063a45c6cb8SMadhusudhan Chikkature 2064b417577dSAdrian Hunter omap_hsmmc_disable_irq(host); 2065a45c6cb8SMadhusudhan Chikkature 2066b62f6228SAdrian Hunter omap_hsmmc_protect_card(host); 2067b62f6228SAdrian Hunter 2068a45c6cb8SMadhusudhan Chikkature mmc_add_host(mmc); 2069a45c6cb8SMadhusudhan Chikkature 2070191d1f1dSDenis Karpov if (mmc_slot(host).name != NULL) { 2071a45c6cb8SMadhusudhan Chikkature ret = device_create_file(&mmc->class_dev, &dev_attr_slot_name); 2072a45c6cb8SMadhusudhan Chikkature if (ret < 0) 2073a45c6cb8SMadhusudhan Chikkature goto err_slot_name; 2074a45c6cb8SMadhusudhan Chikkature } 2075191d1f1dSDenis Karpov if (mmc_slot(host).card_detect_irq && mmc_slot(host).get_cover_state) { 2076a45c6cb8SMadhusudhan Chikkature ret = device_create_file(&mmc->class_dev, 2077a45c6cb8SMadhusudhan Chikkature &dev_attr_cover_switch); 2078a45c6cb8SMadhusudhan Chikkature if (ret < 0) 2079db0fefc5SAdrian Hunter goto err_slot_name; 2080a45c6cb8SMadhusudhan Chikkature } 2081a45c6cb8SMadhusudhan Chikkature 208270a3341aSDenis Karpov omap_hsmmc_debugfs(mmc); 2083fa4aa2d4SBalaji T K pm_runtime_mark_last_busy(host->dev); 2084fa4aa2d4SBalaji T K pm_runtime_put_autosuspend(host->dev); 2085d900f712SDenis Karpov 2086a45c6cb8SMadhusudhan Chikkature return 0; 2087a45c6cb8SMadhusudhan Chikkature 2088a45c6cb8SMadhusudhan Chikkature err_slot_name: 2089a45c6cb8SMadhusudhan Chikkature mmc_remove_host(mmc); 2090a45c6cb8SMadhusudhan Chikkature free_irq(mmc_slot(host).card_detect_irq, host); 2091db0fefc5SAdrian Hunter err_irq_cd: 2092db0fefc5SAdrian Hunter if (host->use_reg) 2093db0fefc5SAdrian Hunter omap_hsmmc_reg_put(host); 2094db0fefc5SAdrian Hunter err_reg: 2095db0fefc5SAdrian Hunter if (host->pdata->cleanup) 2096db0fefc5SAdrian Hunter host->pdata->cleanup(&pdev->dev); 2097a45c6cb8SMadhusudhan Chikkature err_irq_cd_init: 2098a45c6cb8SMadhusudhan Chikkature free_irq(host->irq, host); 2099a45c6cb8SMadhusudhan Chikkature err_irq: 2100fa4aa2d4SBalaji T K pm_runtime_mark_last_busy(host->dev); 2101fa4aa2d4SBalaji T K pm_runtime_put_autosuspend(host->dev); 2102a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 21032bec0893SAdrian Hunter if (host->got_dbclk) { 2104a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 2105a45c6cb8SMadhusudhan Chikkature clk_put(host->dbclk); 2106a45c6cb8SMadhusudhan Chikkature } 2107a45c6cb8SMadhusudhan Chikkature err1: 2108a45c6cb8SMadhusudhan Chikkature iounmap(host->base); 2109db0fefc5SAdrian Hunter platform_set_drvdata(pdev, NULL); 2110a45c6cb8SMadhusudhan Chikkature mmc_free_host(mmc); 2111db0fefc5SAdrian Hunter err_alloc: 2112db0fefc5SAdrian Hunter omap_hsmmc_gpio_free(pdata); 2113db0fefc5SAdrian Hunter err: 2114984b203aSChris Ball release_mem_region(res->start, resource_size(res)); 2115a45c6cb8SMadhusudhan Chikkature return ret; 2116a45c6cb8SMadhusudhan Chikkature } 2117a45c6cb8SMadhusudhan Chikkature 211870a3341aSDenis Karpov static int omap_hsmmc_remove(struct platform_device *pdev) 2119a45c6cb8SMadhusudhan Chikkature { 212070a3341aSDenis Karpov struct omap_hsmmc_host *host = platform_get_drvdata(pdev); 2121a45c6cb8SMadhusudhan Chikkature struct resource *res; 2122a45c6cb8SMadhusudhan Chikkature 2123a45c6cb8SMadhusudhan Chikkature if (host) { 2124fa4aa2d4SBalaji T K pm_runtime_get_sync(host->dev); 2125a45c6cb8SMadhusudhan Chikkature mmc_remove_host(host->mmc); 2126db0fefc5SAdrian Hunter if (host->use_reg) 2127db0fefc5SAdrian Hunter omap_hsmmc_reg_put(host); 2128a45c6cb8SMadhusudhan Chikkature if (host->pdata->cleanup) 2129a45c6cb8SMadhusudhan Chikkature host->pdata->cleanup(&pdev->dev); 2130a45c6cb8SMadhusudhan Chikkature free_irq(host->irq, host); 2131a45c6cb8SMadhusudhan Chikkature if (mmc_slot(host).card_detect_irq) 2132a45c6cb8SMadhusudhan Chikkature free_irq(mmc_slot(host).card_detect_irq, host); 21330d9ee5b2STejun Heo flush_work_sync(&host->mmc_carddetect_work); 2134a45c6cb8SMadhusudhan Chikkature 2135fa4aa2d4SBalaji T K pm_runtime_put_sync(host->dev); 2136fa4aa2d4SBalaji T K pm_runtime_disable(host->dev); 2137a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 21382bec0893SAdrian Hunter if (host->got_dbclk) { 2139a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 2140a45c6cb8SMadhusudhan Chikkature clk_put(host->dbclk); 2141a45c6cb8SMadhusudhan Chikkature } 2142a45c6cb8SMadhusudhan Chikkature 2143a45c6cb8SMadhusudhan Chikkature mmc_free_host(host->mmc); 2144a45c6cb8SMadhusudhan Chikkature iounmap(host->base); 2145db0fefc5SAdrian Hunter omap_hsmmc_gpio_free(pdev->dev.platform_data); 2146a45c6cb8SMadhusudhan Chikkature } 2147a45c6cb8SMadhusudhan Chikkature 2148a45c6cb8SMadhusudhan Chikkature res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2149a45c6cb8SMadhusudhan Chikkature if (res) 2150984b203aSChris Ball release_mem_region(res->start, resource_size(res)); 2151a45c6cb8SMadhusudhan Chikkature platform_set_drvdata(pdev, NULL); 2152a45c6cb8SMadhusudhan Chikkature 2153a45c6cb8SMadhusudhan Chikkature return 0; 2154a45c6cb8SMadhusudhan Chikkature } 2155a45c6cb8SMadhusudhan Chikkature 2156a45c6cb8SMadhusudhan Chikkature #ifdef CONFIG_PM 2157a791daa1SKevin Hilman static int omap_hsmmc_suspend(struct device *dev) 2158a45c6cb8SMadhusudhan Chikkature { 2159a45c6cb8SMadhusudhan Chikkature int ret = 0; 2160a791daa1SKevin Hilman struct platform_device *pdev = to_platform_device(dev); 216170a3341aSDenis Karpov struct omap_hsmmc_host *host = platform_get_drvdata(pdev); 2162a45c6cb8SMadhusudhan Chikkature 2163a45c6cb8SMadhusudhan Chikkature if (host && host->suspended) 2164a45c6cb8SMadhusudhan Chikkature return 0; 2165a45c6cb8SMadhusudhan Chikkature 2166a45c6cb8SMadhusudhan Chikkature if (host) { 2167fa4aa2d4SBalaji T K pm_runtime_get_sync(host->dev); 2168a45c6cb8SMadhusudhan Chikkature host->suspended = 1; 2169a45c6cb8SMadhusudhan Chikkature if (host->pdata->suspend) { 2170a45c6cb8SMadhusudhan Chikkature ret = host->pdata->suspend(&pdev->dev, 2171a45c6cb8SMadhusudhan Chikkature host->slot_id); 2172a6b2240dSAdrian Hunter if (ret) { 2173a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 2174a45c6cb8SMadhusudhan Chikkature "Unable to handle MMC board" 2175a45c6cb8SMadhusudhan Chikkature " level suspend\n"); 2176a6b2240dSAdrian Hunter host->suspended = 0; 2177a6b2240dSAdrian Hunter return ret; 2178a45c6cb8SMadhusudhan Chikkature } 2179a6b2240dSAdrian Hunter } 2180a6b2240dSAdrian Hunter cancel_work_sync(&host->mmc_carddetect_work); 21811a13f8faSMatt Fleming ret = mmc_suspend_host(host->mmc); 2182fa4aa2d4SBalaji T K 2183a6b2240dSAdrian Hunter if (ret == 0) { 2184b417577dSAdrian Hunter omap_hsmmc_disable_irq(host); 2185a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 21860683af48SJarkko Lavinen OMAP_HSMMC_READ(host->base, HCTL) & ~SDBP); 21872bec0893SAdrian Hunter if (host->got_dbclk) 2188a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 2189a6b2240dSAdrian Hunter } else { 2190a6b2240dSAdrian Hunter host->suspended = 0; 2191a6b2240dSAdrian Hunter if (host->pdata->resume) { 2192a6b2240dSAdrian Hunter ret = host->pdata->resume(&pdev->dev, 2193a6b2240dSAdrian Hunter host->slot_id); 2194a6b2240dSAdrian Hunter if (ret) 2195a6b2240dSAdrian Hunter dev_dbg(mmc_dev(host->mmc), 2196a6b2240dSAdrian Hunter "Unmask interrupt failed\n"); 2197a6b2240dSAdrian Hunter } 2198a6b2240dSAdrian Hunter } 2199fa4aa2d4SBalaji T K pm_runtime_put_sync(host->dev); 2200a45c6cb8SMadhusudhan Chikkature } 2201a45c6cb8SMadhusudhan Chikkature return ret; 2202a45c6cb8SMadhusudhan Chikkature } 2203a45c6cb8SMadhusudhan Chikkature 2204a45c6cb8SMadhusudhan Chikkature /* Routine to resume the MMC device */ 2205a791daa1SKevin Hilman static int omap_hsmmc_resume(struct device *dev) 2206a45c6cb8SMadhusudhan Chikkature { 2207a45c6cb8SMadhusudhan Chikkature int ret = 0; 2208a791daa1SKevin Hilman struct platform_device *pdev = to_platform_device(dev); 220970a3341aSDenis Karpov struct omap_hsmmc_host *host = platform_get_drvdata(pdev); 2210a45c6cb8SMadhusudhan Chikkature 2211a45c6cb8SMadhusudhan Chikkature if (host && !host->suspended) 2212a45c6cb8SMadhusudhan Chikkature return 0; 2213a45c6cb8SMadhusudhan Chikkature 2214a45c6cb8SMadhusudhan Chikkature if (host) { 2215fa4aa2d4SBalaji T K pm_runtime_get_sync(host->dev); 221611dd62a7SDenis Karpov 22172bec0893SAdrian Hunter if (host->got_dbclk) 22182bec0893SAdrian Hunter clk_enable(host->dbclk); 22192bec0893SAdrian Hunter 222070a3341aSDenis Karpov omap_hsmmc_conf_bus_power(host); 22211b331e69SKim Kyuwon 2222a45c6cb8SMadhusudhan Chikkature if (host->pdata->resume) { 2223a45c6cb8SMadhusudhan Chikkature ret = host->pdata->resume(&pdev->dev, host->slot_id); 2224a45c6cb8SMadhusudhan Chikkature if (ret) 2225a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 2226a45c6cb8SMadhusudhan Chikkature "Unmask interrupt failed\n"); 2227a45c6cb8SMadhusudhan Chikkature } 2228a45c6cb8SMadhusudhan Chikkature 2229b62f6228SAdrian Hunter omap_hsmmc_protect_card(host); 2230b62f6228SAdrian Hunter 2231a45c6cb8SMadhusudhan Chikkature /* Notify the core to resume the host */ 2232a45c6cb8SMadhusudhan Chikkature ret = mmc_resume_host(host->mmc); 2233a45c6cb8SMadhusudhan Chikkature if (ret == 0) 2234a45c6cb8SMadhusudhan Chikkature host->suspended = 0; 2235fa4aa2d4SBalaji T K 2236fa4aa2d4SBalaji T K pm_runtime_mark_last_busy(host->dev); 2237fa4aa2d4SBalaji T K pm_runtime_put_autosuspend(host->dev); 2238a45c6cb8SMadhusudhan Chikkature } 2239a45c6cb8SMadhusudhan Chikkature 2240a45c6cb8SMadhusudhan Chikkature return ret; 2241a45c6cb8SMadhusudhan Chikkature 2242a45c6cb8SMadhusudhan Chikkature } 2243a45c6cb8SMadhusudhan Chikkature 2244a45c6cb8SMadhusudhan Chikkature #else 224570a3341aSDenis Karpov #define omap_hsmmc_suspend NULL 224670a3341aSDenis Karpov #define omap_hsmmc_resume NULL 2247a45c6cb8SMadhusudhan Chikkature #endif 2248a45c6cb8SMadhusudhan Chikkature 2249fa4aa2d4SBalaji T K static int omap_hsmmc_runtime_suspend(struct device *dev) 2250fa4aa2d4SBalaji T K { 2251fa4aa2d4SBalaji T K struct omap_hsmmc_host *host; 2252fa4aa2d4SBalaji T K 2253fa4aa2d4SBalaji T K host = platform_get_drvdata(to_platform_device(dev)); 2254fa4aa2d4SBalaji T K omap_hsmmc_context_save(host); 2255fa4aa2d4SBalaji T K dev_dbg(mmc_dev(host->mmc), "disabled\n"); 2256fa4aa2d4SBalaji T K 2257fa4aa2d4SBalaji T K return 0; 2258fa4aa2d4SBalaji T K } 2259fa4aa2d4SBalaji T K 2260fa4aa2d4SBalaji T K static int omap_hsmmc_runtime_resume(struct device *dev) 2261fa4aa2d4SBalaji T K { 2262fa4aa2d4SBalaji T K struct omap_hsmmc_host *host; 2263fa4aa2d4SBalaji T K 2264fa4aa2d4SBalaji T K host = platform_get_drvdata(to_platform_device(dev)); 2265fa4aa2d4SBalaji T K omap_hsmmc_context_restore(host); 2266fa4aa2d4SBalaji T K dev_dbg(mmc_dev(host->mmc), "enabled\n"); 2267fa4aa2d4SBalaji T K 2268fa4aa2d4SBalaji T K return 0; 2269fa4aa2d4SBalaji T K } 2270fa4aa2d4SBalaji T K 2271a791daa1SKevin Hilman static struct dev_pm_ops omap_hsmmc_dev_pm_ops = { 227270a3341aSDenis Karpov .suspend = omap_hsmmc_suspend, 227370a3341aSDenis Karpov .resume = omap_hsmmc_resume, 2274fa4aa2d4SBalaji T K .runtime_suspend = omap_hsmmc_runtime_suspend, 2275fa4aa2d4SBalaji T K .runtime_resume = omap_hsmmc_runtime_resume, 2276a791daa1SKevin Hilman }; 2277a791daa1SKevin Hilman 2278a791daa1SKevin Hilman static struct platform_driver omap_hsmmc_driver = { 2279a791daa1SKevin Hilman .remove = omap_hsmmc_remove, 2280a45c6cb8SMadhusudhan Chikkature .driver = { 2281a45c6cb8SMadhusudhan Chikkature .name = DRIVER_NAME, 2282a45c6cb8SMadhusudhan Chikkature .owner = THIS_MODULE, 2283a791daa1SKevin Hilman .pm = &omap_hsmmc_dev_pm_ops, 2284a45c6cb8SMadhusudhan Chikkature }, 2285a45c6cb8SMadhusudhan Chikkature }; 2286a45c6cb8SMadhusudhan Chikkature 228770a3341aSDenis Karpov static int __init omap_hsmmc_init(void) 2288a45c6cb8SMadhusudhan Chikkature { 2289a45c6cb8SMadhusudhan Chikkature /* Register the MMC driver */ 22908753298aSRoger Quadros return platform_driver_probe(&omap_hsmmc_driver, omap_hsmmc_probe); 2291a45c6cb8SMadhusudhan Chikkature } 2292a45c6cb8SMadhusudhan Chikkature 229370a3341aSDenis Karpov static void __exit omap_hsmmc_cleanup(void) 2294a45c6cb8SMadhusudhan Chikkature { 2295a45c6cb8SMadhusudhan Chikkature /* Unregister MMC driver */ 229670a3341aSDenis Karpov platform_driver_unregister(&omap_hsmmc_driver); 2297a45c6cb8SMadhusudhan Chikkature } 2298a45c6cb8SMadhusudhan Chikkature 229970a3341aSDenis Karpov module_init(omap_hsmmc_init); 230070a3341aSDenis Karpov module_exit(omap_hsmmc_cleanup); 2301a45c6cb8SMadhusudhan Chikkature 2302a45c6cb8SMadhusudhan Chikkature MODULE_DESCRIPTION("OMAP High Speed Multimedia Card driver"); 2303a45c6cb8SMadhusudhan Chikkature MODULE_LICENSE("GPL"); 2304a45c6cb8SMadhusudhan Chikkature MODULE_ALIAS("platform:" DRIVER_NAME); 2305a45c6cb8SMadhusudhan Chikkature MODULE_AUTHOR("Texas Instruments Inc"); 2306