1a45c6cb8SMadhusudhan Chikkature /* 2a45c6cb8SMadhusudhan Chikkature * drivers/mmc/host/omap_hsmmc.c 3a45c6cb8SMadhusudhan Chikkature * 4a45c6cb8SMadhusudhan Chikkature * Driver for OMAP2430/3430 MMC controller. 5a45c6cb8SMadhusudhan Chikkature * 6a45c6cb8SMadhusudhan Chikkature * Copyright (C) 2007 Texas Instruments. 7a45c6cb8SMadhusudhan Chikkature * 8a45c6cb8SMadhusudhan Chikkature * Authors: 9a45c6cb8SMadhusudhan Chikkature * Syed Mohammed Khasim <x0khasim@ti.com> 10a45c6cb8SMadhusudhan Chikkature * Madhusudhan <madhu.cr@ti.com> 11a45c6cb8SMadhusudhan Chikkature * Mohit Jalori <mjalori@ti.com> 12a45c6cb8SMadhusudhan Chikkature * 13a45c6cb8SMadhusudhan Chikkature * This file is licensed under the terms of the GNU General Public License 14a45c6cb8SMadhusudhan Chikkature * version 2. This program is licensed "as is" without any warranty of any 15a45c6cb8SMadhusudhan Chikkature * kind, whether express or implied. 16a45c6cb8SMadhusudhan Chikkature */ 17a45c6cb8SMadhusudhan Chikkature 18a45c6cb8SMadhusudhan Chikkature #include <linux/module.h> 19a45c6cb8SMadhusudhan Chikkature #include <linux/init.h> 20d900f712SDenis Karpov #include <linux/debugfs.h> 21d900f712SDenis Karpov #include <linux/seq_file.h> 22a45c6cb8SMadhusudhan Chikkature #include <linux/interrupt.h> 23a45c6cb8SMadhusudhan Chikkature #include <linux/delay.h> 24a45c6cb8SMadhusudhan Chikkature #include <linux/dma-mapping.h> 25a45c6cb8SMadhusudhan Chikkature #include <linux/platform_device.h> 26a45c6cb8SMadhusudhan Chikkature #include <linux/workqueue.h> 27a45c6cb8SMadhusudhan Chikkature #include <linux/timer.h> 28a45c6cb8SMadhusudhan Chikkature #include <linux/clk.h> 29a45c6cb8SMadhusudhan Chikkature #include <linux/mmc/host.h> 30a45c6cb8SMadhusudhan Chikkature #include <linux/io.h> 31a45c6cb8SMadhusudhan Chikkature #include <linux/semaphore.h> 32a45c6cb8SMadhusudhan Chikkature #include <mach/dma.h> 33a45c6cb8SMadhusudhan Chikkature #include <mach/hardware.h> 34a45c6cb8SMadhusudhan Chikkature #include <mach/board.h> 35a45c6cb8SMadhusudhan Chikkature #include <mach/mmc.h> 36a45c6cb8SMadhusudhan Chikkature #include <mach/cpu.h> 37a45c6cb8SMadhusudhan Chikkature 38a45c6cb8SMadhusudhan Chikkature /* OMAP HSMMC Host Controller Registers */ 39a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_SYSCONFIG 0x0010 40a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_CON 0x002C 41a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_BLK 0x0104 42a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_ARG 0x0108 43a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_CMD 0x010C 44a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP10 0x0110 45a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP32 0x0114 46a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP54 0x0118 47a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP76 0x011C 48a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_DATA 0x0120 49a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_HCTL 0x0128 50a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_SYSCTL 0x012C 51a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_STAT 0x0130 52a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_IE 0x0134 53a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_ISE 0x0138 54a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_CAPA 0x0140 55a45c6cb8SMadhusudhan Chikkature 56a45c6cb8SMadhusudhan Chikkature #define VS18 (1 << 26) 57a45c6cb8SMadhusudhan Chikkature #define VS30 (1 << 25) 58a45c6cb8SMadhusudhan Chikkature #define SDVS18 (0x5 << 9) 59a45c6cb8SMadhusudhan Chikkature #define SDVS30 (0x6 << 9) 60eb250826SDavid Brownell #define SDVS33 (0x7 << 9) 611b331e69SKim Kyuwon #define SDVS_MASK 0x00000E00 62a45c6cb8SMadhusudhan Chikkature #define SDVSCLR 0xFFFFF1FF 63a45c6cb8SMadhusudhan Chikkature #define SDVSDET 0x00000400 64a45c6cb8SMadhusudhan Chikkature #define AUTOIDLE 0x1 65a45c6cb8SMadhusudhan Chikkature #define SDBP (1 << 8) 66a45c6cb8SMadhusudhan Chikkature #define DTO 0xe 67a45c6cb8SMadhusudhan Chikkature #define ICE 0x1 68a45c6cb8SMadhusudhan Chikkature #define ICS 0x2 69a45c6cb8SMadhusudhan Chikkature #define CEN (1 << 2) 70a45c6cb8SMadhusudhan Chikkature #define CLKD_MASK 0x0000FFC0 71a45c6cb8SMadhusudhan Chikkature #define CLKD_SHIFT 6 72a45c6cb8SMadhusudhan Chikkature #define DTO_MASK 0x000F0000 73a45c6cb8SMadhusudhan Chikkature #define DTO_SHIFT 16 74a45c6cb8SMadhusudhan Chikkature #define INT_EN_MASK 0x307F0033 75ccdfe3a6SAnand Gadiyar #define BWR_ENABLE (1 << 4) 76ccdfe3a6SAnand Gadiyar #define BRR_ENABLE (1 << 5) 77a45c6cb8SMadhusudhan Chikkature #define INIT_STREAM (1 << 1) 78a45c6cb8SMadhusudhan Chikkature #define DP_SELECT (1 << 21) 79a45c6cb8SMadhusudhan Chikkature #define DDIR (1 << 4) 80a45c6cb8SMadhusudhan Chikkature #define DMA_EN 0x1 81a45c6cb8SMadhusudhan Chikkature #define MSBS (1 << 5) 82a45c6cb8SMadhusudhan Chikkature #define BCE (1 << 1) 83a45c6cb8SMadhusudhan Chikkature #define FOUR_BIT (1 << 1) 8473153010SJarkko Lavinen #define DW8 (1 << 5) 85a45c6cb8SMadhusudhan Chikkature #define CC 0x1 86a45c6cb8SMadhusudhan Chikkature #define TC 0x02 87a45c6cb8SMadhusudhan Chikkature #define OD 0x1 88a45c6cb8SMadhusudhan Chikkature #define ERR (1 << 15) 89a45c6cb8SMadhusudhan Chikkature #define CMD_TIMEOUT (1 << 16) 90a45c6cb8SMadhusudhan Chikkature #define DATA_TIMEOUT (1 << 20) 91a45c6cb8SMadhusudhan Chikkature #define CMD_CRC (1 << 17) 92a45c6cb8SMadhusudhan Chikkature #define DATA_CRC (1 << 21) 93a45c6cb8SMadhusudhan Chikkature #define CARD_ERR (1 << 28) 94a45c6cb8SMadhusudhan Chikkature #define STAT_CLEAR 0xFFFFFFFF 95a45c6cb8SMadhusudhan Chikkature #define INIT_STREAM_CMD 0x00000000 96a45c6cb8SMadhusudhan Chikkature #define DUAL_VOLT_OCR_BIT 7 97a45c6cb8SMadhusudhan Chikkature #define SRC (1 << 25) 98a45c6cb8SMadhusudhan Chikkature #define SRD (1 << 26) 99a45c6cb8SMadhusudhan Chikkature 100a45c6cb8SMadhusudhan Chikkature /* 101a45c6cb8SMadhusudhan Chikkature * FIXME: Most likely all the data using these _DEVID defines should come 102a45c6cb8SMadhusudhan Chikkature * from the platform_data, or implemented in controller and slot specific 103a45c6cb8SMadhusudhan Chikkature * functions. 104a45c6cb8SMadhusudhan Chikkature */ 105a45c6cb8SMadhusudhan Chikkature #define OMAP_MMC1_DEVID 0 106a45c6cb8SMadhusudhan Chikkature #define OMAP_MMC2_DEVID 1 107f3e2f1ddSGrazvydas Ignotas #define OMAP_MMC3_DEVID 2 108a45c6cb8SMadhusudhan Chikkature 109a45c6cb8SMadhusudhan Chikkature #define MMC_TIMEOUT_MS 20 110a45c6cb8SMadhusudhan Chikkature #define OMAP_MMC_MASTER_CLOCK 96000000 111a45c6cb8SMadhusudhan Chikkature #define DRIVER_NAME "mmci-omap-hs" 112a45c6cb8SMadhusudhan Chikkature 113a45c6cb8SMadhusudhan Chikkature /* 114a45c6cb8SMadhusudhan Chikkature * One controller can have multiple slots, like on some omap boards using 115a45c6cb8SMadhusudhan Chikkature * omap.c controller driver. Luckily this is not currently done on any known 116a45c6cb8SMadhusudhan Chikkature * omap_hsmmc.c device. 117a45c6cb8SMadhusudhan Chikkature */ 118a45c6cb8SMadhusudhan Chikkature #define mmc_slot(host) (host->pdata->slots[host->slot_id]) 119a45c6cb8SMadhusudhan Chikkature 120a45c6cb8SMadhusudhan Chikkature /* 121a45c6cb8SMadhusudhan Chikkature * MMC Host controller read/write API's 122a45c6cb8SMadhusudhan Chikkature */ 123a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_READ(base, reg) \ 124a45c6cb8SMadhusudhan Chikkature __raw_readl((base) + OMAP_HSMMC_##reg) 125a45c6cb8SMadhusudhan Chikkature 126a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_WRITE(base, reg, val) \ 127a45c6cb8SMadhusudhan Chikkature __raw_writel((val), (base) + OMAP_HSMMC_##reg) 128a45c6cb8SMadhusudhan Chikkature 129a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host { 130a45c6cb8SMadhusudhan Chikkature struct device *dev; 131a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc; 132a45c6cb8SMadhusudhan Chikkature struct mmc_request *mrq; 133a45c6cb8SMadhusudhan Chikkature struct mmc_command *cmd; 134a45c6cb8SMadhusudhan Chikkature struct mmc_data *data; 135a45c6cb8SMadhusudhan Chikkature struct clk *fclk; 136a45c6cb8SMadhusudhan Chikkature struct clk *iclk; 137a45c6cb8SMadhusudhan Chikkature struct clk *dbclk; 138a45c6cb8SMadhusudhan Chikkature struct semaphore sem; 139a45c6cb8SMadhusudhan Chikkature struct work_struct mmc_carddetect_work; 140a45c6cb8SMadhusudhan Chikkature void __iomem *base; 141a45c6cb8SMadhusudhan Chikkature resource_size_t mapbase; 142a45c6cb8SMadhusudhan Chikkature unsigned int id; 143a45c6cb8SMadhusudhan Chikkature unsigned int dma_len; 1440ccd76d4SJuha Yrjola unsigned int dma_sg_idx; 145a45c6cb8SMadhusudhan Chikkature unsigned char bus_mode; 146a45c6cb8SMadhusudhan Chikkature u32 *buffer; 147a45c6cb8SMadhusudhan Chikkature u32 bytesleft; 148a45c6cb8SMadhusudhan Chikkature int suspended; 149a45c6cb8SMadhusudhan Chikkature int irq; 150a45c6cb8SMadhusudhan Chikkature int carddetect; 151a45c6cb8SMadhusudhan Chikkature int use_dma, dma_ch; 152f3e2f1ddSGrazvydas Ignotas int dma_line_tx, dma_line_rx; 153a45c6cb8SMadhusudhan Chikkature int slot_id; 154a45c6cb8SMadhusudhan Chikkature int dbclk_enabled; 1554a694dc9SAdrian Hunter int response_busy; 156a45c6cb8SMadhusudhan Chikkature struct omap_mmc_platform_data *pdata; 157a45c6cb8SMadhusudhan Chikkature }; 158a45c6cb8SMadhusudhan Chikkature 159a45c6cb8SMadhusudhan Chikkature /* 160a45c6cb8SMadhusudhan Chikkature * Stop clock to the card 161a45c6cb8SMadhusudhan Chikkature */ 162a45c6cb8SMadhusudhan Chikkature static void omap_mmc_stop_clock(struct mmc_omap_host *host) 163a45c6cb8SMadhusudhan Chikkature { 164a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, 165a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, SYSCTL) & ~CEN); 166a45c6cb8SMadhusudhan Chikkature if ((OMAP_HSMMC_READ(host->base, SYSCTL) & CEN) != 0x0) 167a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "MMC Clock is not stoped\n"); 168a45c6cb8SMadhusudhan Chikkature } 169a45c6cb8SMadhusudhan Chikkature 170a45c6cb8SMadhusudhan Chikkature /* 171a45c6cb8SMadhusudhan Chikkature * Send init stream sequence to card 172a45c6cb8SMadhusudhan Chikkature * before sending IDLE command 173a45c6cb8SMadhusudhan Chikkature */ 174a45c6cb8SMadhusudhan Chikkature static void send_init_stream(struct mmc_omap_host *host) 175a45c6cb8SMadhusudhan Chikkature { 176a45c6cb8SMadhusudhan Chikkature int reg = 0; 177a45c6cb8SMadhusudhan Chikkature unsigned long timeout; 178a45c6cb8SMadhusudhan Chikkature 179a45c6cb8SMadhusudhan Chikkature disable_irq(host->irq); 180a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CON, 181a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, CON) | INIT_STREAM); 182a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CMD, INIT_STREAM_CMD); 183a45c6cb8SMadhusudhan Chikkature 184a45c6cb8SMadhusudhan Chikkature timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 185a45c6cb8SMadhusudhan Chikkature while ((reg != CC) && time_before(jiffies, timeout)) 186a45c6cb8SMadhusudhan Chikkature reg = OMAP_HSMMC_READ(host->base, STAT) & CC; 187a45c6cb8SMadhusudhan Chikkature 188a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CON, 189a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, CON) & ~INIT_STREAM); 190a45c6cb8SMadhusudhan Chikkature enable_irq(host->irq); 191a45c6cb8SMadhusudhan Chikkature } 192a45c6cb8SMadhusudhan Chikkature 193a45c6cb8SMadhusudhan Chikkature static inline 194a45c6cb8SMadhusudhan Chikkature int mmc_omap_cover_is_closed(struct mmc_omap_host *host) 195a45c6cb8SMadhusudhan Chikkature { 196a45c6cb8SMadhusudhan Chikkature int r = 1; 197a45c6cb8SMadhusudhan Chikkature 198a45c6cb8SMadhusudhan Chikkature if (host->pdata->slots[host->slot_id].get_cover_state) 199a45c6cb8SMadhusudhan Chikkature r = host->pdata->slots[host->slot_id].get_cover_state(host->dev, 200a45c6cb8SMadhusudhan Chikkature host->slot_id); 201a45c6cb8SMadhusudhan Chikkature return r; 202a45c6cb8SMadhusudhan Chikkature } 203a45c6cb8SMadhusudhan Chikkature 204a45c6cb8SMadhusudhan Chikkature static ssize_t 205a45c6cb8SMadhusudhan Chikkature mmc_omap_show_cover_switch(struct device *dev, struct device_attribute *attr, 206a45c6cb8SMadhusudhan Chikkature char *buf) 207a45c6cb8SMadhusudhan Chikkature { 208a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev); 209a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = mmc_priv(mmc); 210a45c6cb8SMadhusudhan Chikkature 211a45c6cb8SMadhusudhan Chikkature return sprintf(buf, "%s\n", mmc_omap_cover_is_closed(host) ? "closed" : 212a45c6cb8SMadhusudhan Chikkature "open"); 213a45c6cb8SMadhusudhan Chikkature } 214a45c6cb8SMadhusudhan Chikkature 215a45c6cb8SMadhusudhan Chikkature static DEVICE_ATTR(cover_switch, S_IRUGO, mmc_omap_show_cover_switch, NULL); 216a45c6cb8SMadhusudhan Chikkature 217a45c6cb8SMadhusudhan Chikkature static ssize_t 218a45c6cb8SMadhusudhan Chikkature mmc_omap_show_slot_name(struct device *dev, struct device_attribute *attr, 219a45c6cb8SMadhusudhan Chikkature char *buf) 220a45c6cb8SMadhusudhan Chikkature { 221a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev); 222a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = mmc_priv(mmc); 223a45c6cb8SMadhusudhan Chikkature struct omap_mmc_slot_data slot = host->pdata->slots[host->slot_id]; 224a45c6cb8SMadhusudhan Chikkature 225e68fdabcSAdrian Hunter return sprintf(buf, "%s\n", slot.name); 226a45c6cb8SMadhusudhan Chikkature } 227a45c6cb8SMadhusudhan Chikkature 228a45c6cb8SMadhusudhan Chikkature static DEVICE_ATTR(slot_name, S_IRUGO, mmc_omap_show_slot_name, NULL); 229a45c6cb8SMadhusudhan Chikkature 230a45c6cb8SMadhusudhan Chikkature /* 231a45c6cb8SMadhusudhan Chikkature * Configure the response type and send the cmd. 232a45c6cb8SMadhusudhan Chikkature */ 233a45c6cb8SMadhusudhan Chikkature static void 234a45c6cb8SMadhusudhan Chikkature mmc_omap_start_command(struct mmc_omap_host *host, struct mmc_command *cmd, 235a45c6cb8SMadhusudhan Chikkature struct mmc_data *data) 236a45c6cb8SMadhusudhan Chikkature { 237a45c6cb8SMadhusudhan Chikkature int cmdreg = 0, resptype = 0, cmdtype = 0; 238a45c6cb8SMadhusudhan Chikkature 239a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "%s: CMD%d, argument 0x%08x\n", 240a45c6cb8SMadhusudhan Chikkature mmc_hostname(host->mmc), cmd->opcode, cmd->arg); 241a45c6cb8SMadhusudhan Chikkature host->cmd = cmd; 242a45c6cb8SMadhusudhan Chikkature 243a45c6cb8SMadhusudhan Chikkature /* 244a45c6cb8SMadhusudhan Chikkature * Clear status bits and enable interrupts 245a45c6cb8SMadhusudhan Chikkature */ 246a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); 247a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK); 248ccdfe3a6SAnand Gadiyar 249ccdfe3a6SAnand Gadiyar if (host->use_dma) 250ccdfe3a6SAnand Gadiyar OMAP_HSMMC_WRITE(host->base, IE, 251ccdfe3a6SAnand Gadiyar INT_EN_MASK & ~(BRR_ENABLE | BWR_ENABLE)); 252ccdfe3a6SAnand Gadiyar else 253a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK); 254a45c6cb8SMadhusudhan Chikkature 2554a694dc9SAdrian Hunter host->response_busy = 0; 256a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_PRESENT) { 257a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_136) 258a45c6cb8SMadhusudhan Chikkature resptype = 1; 2594a694dc9SAdrian Hunter else if (cmd->flags & MMC_RSP_BUSY) { 2604a694dc9SAdrian Hunter resptype = 3; 2614a694dc9SAdrian Hunter host->response_busy = 1; 2624a694dc9SAdrian Hunter } else 263a45c6cb8SMadhusudhan Chikkature resptype = 2; 264a45c6cb8SMadhusudhan Chikkature } 265a45c6cb8SMadhusudhan Chikkature 266a45c6cb8SMadhusudhan Chikkature /* 267a45c6cb8SMadhusudhan Chikkature * Unlike OMAP1 controller, the cmdtype does not seem to be based on 268a45c6cb8SMadhusudhan Chikkature * ac, bc, adtc, bcr. Only commands ending an open ended transfer need 269a45c6cb8SMadhusudhan Chikkature * a val of 0x3, rest 0x0. 270a45c6cb8SMadhusudhan Chikkature */ 271a45c6cb8SMadhusudhan Chikkature if (cmd == host->mrq->stop) 272a45c6cb8SMadhusudhan Chikkature cmdtype = 0x3; 273a45c6cb8SMadhusudhan Chikkature 274a45c6cb8SMadhusudhan Chikkature cmdreg = (cmd->opcode << 24) | (resptype << 16) | (cmdtype << 22); 275a45c6cb8SMadhusudhan Chikkature 276a45c6cb8SMadhusudhan Chikkature if (data) { 277a45c6cb8SMadhusudhan Chikkature cmdreg |= DP_SELECT | MSBS | BCE; 278a45c6cb8SMadhusudhan Chikkature if (data->flags & MMC_DATA_READ) 279a45c6cb8SMadhusudhan Chikkature cmdreg |= DDIR; 280a45c6cb8SMadhusudhan Chikkature else 281a45c6cb8SMadhusudhan Chikkature cmdreg &= ~(DDIR); 282a45c6cb8SMadhusudhan Chikkature } 283a45c6cb8SMadhusudhan Chikkature 284a45c6cb8SMadhusudhan Chikkature if (host->use_dma) 285a45c6cb8SMadhusudhan Chikkature cmdreg |= DMA_EN; 286a45c6cb8SMadhusudhan Chikkature 287a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, ARG, cmd->arg); 288a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CMD, cmdreg); 289a45c6cb8SMadhusudhan Chikkature } 290a45c6cb8SMadhusudhan Chikkature 2910ccd76d4SJuha Yrjola static int 2920ccd76d4SJuha Yrjola mmc_omap_get_dma_dir(struct mmc_omap_host *host, struct mmc_data *data) 2930ccd76d4SJuha Yrjola { 2940ccd76d4SJuha Yrjola if (data->flags & MMC_DATA_WRITE) 2950ccd76d4SJuha Yrjola return DMA_TO_DEVICE; 2960ccd76d4SJuha Yrjola else 2970ccd76d4SJuha Yrjola return DMA_FROM_DEVICE; 2980ccd76d4SJuha Yrjola } 2990ccd76d4SJuha Yrjola 300a45c6cb8SMadhusudhan Chikkature /* 301a45c6cb8SMadhusudhan Chikkature * Notify the transfer complete to MMC core 302a45c6cb8SMadhusudhan Chikkature */ 303a45c6cb8SMadhusudhan Chikkature static void 304a45c6cb8SMadhusudhan Chikkature mmc_omap_xfer_done(struct mmc_omap_host *host, struct mmc_data *data) 305a45c6cb8SMadhusudhan Chikkature { 3064a694dc9SAdrian Hunter if (!data) { 3074a694dc9SAdrian Hunter struct mmc_request *mrq = host->mrq; 3084a694dc9SAdrian Hunter 3094a694dc9SAdrian Hunter host->mrq = NULL; 3104a694dc9SAdrian Hunter mmc_request_done(host->mmc, mrq); 3114a694dc9SAdrian Hunter return; 3124a694dc9SAdrian Hunter } 3134a694dc9SAdrian Hunter 314a45c6cb8SMadhusudhan Chikkature host->data = NULL; 315a45c6cb8SMadhusudhan Chikkature 316a45c6cb8SMadhusudhan Chikkature if (host->use_dma && host->dma_ch != -1) 317a45c6cb8SMadhusudhan Chikkature dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->dma_len, 3180ccd76d4SJuha Yrjola mmc_omap_get_dma_dir(host, data)); 319a45c6cb8SMadhusudhan Chikkature 320a45c6cb8SMadhusudhan Chikkature if (!data->error) 321a45c6cb8SMadhusudhan Chikkature data->bytes_xfered += data->blocks * (data->blksz); 322a45c6cb8SMadhusudhan Chikkature else 323a45c6cb8SMadhusudhan Chikkature data->bytes_xfered = 0; 324a45c6cb8SMadhusudhan Chikkature 325a45c6cb8SMadhusudhan Chikkature if (!data->stop) { 326a45c6cb8SMadhusudhan Chikkature host->mrq = NULL; 327a45c6cb8SMadhusudhan Chikkature mmc_request_done(host->mmc, data->mrq); 328a45c6cb8SMadhusudhan Chikkature return; 329a45c6cb8SMadhusudhan Chikkature } 330a45c6cb8SMadhusudhan Chikkature mmc_omap_start_command(host, data->stop, NULL); 331a45c6cb8SMadhusudhan Chikkature } 332a45c6cb8SMadhusudhan Chikkature 333a45c6cb8SMadhusudhan Chikkature /* 334a45c6cb8SMadhusudhan Chikkature * Notify the core about command completion 335a45c6cb8SMadhusudhan Chikkature */ 336a45c6cb8SMadhusudhan Chikkature static void 337a45c6cb8SMadhusudhan Chikkature mmc_omap_cmd_done(struct mmc_omap_host *host, struct mmc_command *cmd) 338a45c6cb8SMadhusudhan Chikkature { 339a45c6cb8SMadhusudhan Chikkature host->cmd = NULL; 340a45c6cb8SMadhusudhan Chikkature 341a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_PRESENT) { 342a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_136) { 343a45c6cb8SMadhusudhan Chikkature /* response type 2 */ 344a45c6cb8SMadhusudhan Chikkature cmd->resp[3] = OMAP_HSMMC_READ(host->base, RSP10); 345a45c6cb8SMadhusudhan Chikkature cmd->resp[2] = OMAP_HSMMC_READ(host->base, RSP32); 346a45c6cb8SMadhusudhan Chikkature cmd->resp[1] = OMAP_HSMMC_READ(host->base, RSP54); 347a45c6cb8SMadhusudhan Chikkature cmd->resp[0] = OMAP_HSMMC_READ(host->base, RSP76); 348a45c6cb8SMadhusudhan Chikkature } else { 349a45c6cb8SMadhusudhan Chikkature /* response types 1, 1b, 3, 4, 5, 6 */ 350a45c6cb8SMadhusudhan Chikkature cmd->resp[0] = OMAP_HSMMC_READ(host->base, RSP10); 351a45c6cb8SMadhusudhan Chikkature } 352a45c6cb8SMadhusudhan Chikkature } 3534a694dc9SAdrian Hunter if ((host->data == NULL && !host->response_busy) || cmd->error) { 354a45c6cb8SMadhusudhan Chikkature host->mrq = NULL; 355a45c6cb8SMadhusudhan Chikkature mmc_request_done(host->mmc, cmd->mrq); 356a45c6cb8SMadhusudhan Chikkature } 357a45c6cb8SMadhusudhan Chikkature } 358a45c6cb8SMadhusudhan Chikkature 359a45c6cb8SMadhusudhan Chikkature /* 360a45c6cb8SMadhusudhan Chikkature * DMA clean up for command errors 361a45c6cb8SMadhusudhan Chikkature */ 36282788ff5SJarkko Lavinen static void mmc_dma_cleanup(struct mmc_omap_host *host, int errno) 363a45c6cb8SMadhusudhan Chikkature { 36482788ff5SJarkko Lavinen host->data->error = errno; 365a45c6cb8SMadhusudhan Chikkature 366a45c6cb8SMadhusudhan Chikkature if (host->use_dma && host->dma_ch != -1) { 367a45c6cb8SMadhusudhan Chikkature dma_unmap_sg(mmc_dev(host->mmc), host->data->sg, host->dma_len, 3680ccd76d4SJuha Yrjola mmc_omap_get_dma_dir(host, host->data)); 369a45c6cb8SMadhusudhan Chikkature omap_free_dma(host->dma_ch); 370a45c6cb8SMadhusudhan Chikkature host->dma_ch = -1; 371a45c6cb8SMadhusudhan Chikkature up(&host->sem); 372a45c6cb8SMadhusudhan Chikkature } 373a45c6cb8SMadhusudhan Chikkature host->data = NULL; 374a45c6cb8SMadhusudhan Chikkature } 375a45c6cb8SMadhusudhan Chikkature 376a45c6cb8SMadhusudhan Chikkature /* 377a45c6cb8SMadhusudhan Chikkature * Readable error output 378a45c6cb8SMadhusudhan Chikkature */ 379a45c6cb8SMadhusudhan Chikkature #ifdef CONFIG_MMC_DEBUG 380a45c6cb8SMadhusudhan Chikkature static void mmc_omap_report_irq(struct mmc_omap_host *host, u32 status) 381a45c6cb8SMadhusudhan Chikkature { 382a45c6cb8SMadhusudhan Chikkature /* --- means reserved bit without definition at documentation */ 383a45c6cb8SMadhusudhan Chikkature static const char *mmc_omap_status_bits[] = { 384a45c6cb8SMadhusudhan Chikkature "CC", "TC", "BGE", "---", "BWR", "BRR", "---", "---", "CIRQ", 385a45c6cb8SMadhusudhan Chikkature "OBI", "---", "---", "---", "---", "---", "ERRI", "CTO", "CCRC", 386a45c6cb8SMadhusudhan Chikkature "CEB", "CIE", "DTO", "DCRC", "DEB", "---", "ACE", "---", 387a45c6cb8SMadhusudhan Chikkature "---", "---", "---", "CERR", "CERR", "BADA", "---", "---", "---" 388a45c6cb8SMadhusudhan Chikkature }; 389a45c6cb8SMadhusudhan Chikkature char res[256]; 390a45c6cb8SMadhusudhan Chikkature char *buf = res; 391a45c6cb8SMadhusudhan Chikkature int len, i; 392a45c6cb8SMadhusudhan Chikkature 393a45c6cb8SMadhusudhan Chikkature len = sprintf(buf, "MMC IRQ 0x%x :", status); 394a45c6cb8SMadhusudhan Chikkature buf += len; 395a45c6cb8SMadhusudhan Chikkature 396a45c6cb8SMadhusudhan Chikkature for (i = 0; i < ARRAY_SIZE(mmc_omap_status_bits); i++) 397a45c6cb8SMadhusudhan Chikkature if (status & (1 << i)) { 398a45c6cb8SMadhusudhan Chikkature len = sprintf(buf, " %s", mmc_omap_status_bits[i]); 399a45c6cb8SMadhusudhan Chikkature buf += len; 400a45c6cb8SMadhusudhan Chikkature } 401a45c6cb8SMadhusudhan Chikkature 402a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "%s\n", res); 403a45c6cb8SMadhusudhan Chikkature } 404a45c6cb8SMadhusudhan Chikkature #endif /* CONFIG_MMC_DEBUG */ 405a45c6cb8SMadhusudhan Chikkature 4063ebf74b1SJean Pihet /* 4073ebf74b1SJean Pihet * MMC controller internal state machines reset 4083ebf74b1SJean Pihet * 4093ebf74b1SJean Pihet * Used to reset command or data internal state machines, using respectively 4103ebf74b1SJean Pihet * SRC or SRD bit of SYSCTL register 4113ebf74b1SJean Pihet * Can be called from interrupt context 4123ebf74b1SJean Pihet */ 4133ebf74b1SJean Pihet static inline void mmc_omap_reset_controller_fsm(struct mmc_omap_host *host, 4143ebf74b1SJean Pihet unsigned long bit) 4153ebf74b1SJean Pihet { 4163ebf74b1SJean Pihet unsigned long i = 0; 4173ebf74b1SJean Pihet unsigned long limit = (loops_per_jiffy * 4183ebf74b1SJean Pihet msecs_to_jiffies(MMC_TIMEOUT_MS)); 4193ebf74b1SJean Pihet 4203ebf74b1SJean Pihet OMAP_HSMMC_WRITE(host->base, SYSCTL, 4213ebf74b1SJean Pihet OMAP_HSMMC_READ(host->base, SYSCTL) | bit); 4223ebf74b1SJean Pihet 4233ebf74b1SJean Pihet while ((OMAP_HSMMC_READ(host->base, SYSCTL) & bit) && 4243ebf74b1SJean Pihet (i++ < limit)) 4253ebf74b1SJean Pihet cpu_relax(); 4263ebf74b1SJean Pihet 4273ebf74b1SJean Pihet if (OMAP_HSMMC_READ(host->base, SYSCTL) & bit) 4283ebf74b1SJean Pihet dev_err(mmc_dev(host->mmc), 4293ebf74b1SJean Pihet "Timeout waiting on controller reset in %s\n", 4303ebf74b1SJean Pihet __func__); 4313ebf74b1SJean Pihet } 432a45c6cb8SMadhusudhan Chikkature 433a45c6cb8SMadhusudhan Chikkature /* 434a45c6cb8SMadhusudhan Chikkature * MMC controller IRQ handler 435a45c6cb8SMadhusudhan Chikkature */ 436a45c6cb8SMadhusudhan Chikkature static irqreturn_t mmc_omap_irq(int irq, void *dev_id) 437a45c6cb8SMadhusudhan Chikkature { 438a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = dev_id; 439a45c6cb8SMadhusudhan Chikkature struct mmc_data *data; 440a45c6cb8SMadhusudhan Chikkature int end_cmd = 0, end_trans = 0, status; 441a45c6cb8SMadhusudhan Chikkature 4424a694dc9SAdrian Hunter if (host->mrq == NULL) { 443a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, STAT, 444a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, STAT)); 44500adadc1SKevin Hilman /* Flush posted write */ 44600adadc1SKevin Hilman OMAP_HSMMC_READ(host->base, STAT); 447a45c6cb8SMadhusudhan Chikkature return IRQ_HANDLED; 448a45c6cb8SMadhusudhan Chikkature } 449a45c6cb8SMadhusudhan Chikkature 450a45c6cb8SMadhusudhan Chikkature data = host->data; 451a45c6cb8SMadhusudhan Chikkature status = OMAP_HSMMC_READ(host->base, STAT); 452a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "IRQ Status is %x\n", status); 453a45c6cb8SMadhusudhan Chikkature 454a45c6cb8SMadhusudhan Chikkature if (status & ERR) { 455a45c6cb8SMadhusudhan Chikkature #ifdef CONFIG_MMC_DEBUG 456a45c6cb8SMadhusudhan Chikkature mmc_omap_report_irq(host, status); 457a45c6cb8SMadhusudhan Chikkature #endif 458a45c6cb8SMadhusudhan Chikkature if ((status & CMD_TIMEOUT) || 459a45c6cb8SMadhusudhan Chikkature (status & CMD_CRC)) { 460a45c6cb8SMadhusudhan Chikkature if (host->cmd) { 461a45c6cb8SMadhusudhan Chikkature if (status & CMD_TIMEOUT) { 4623ebf74b1SJean Pihet mmc_omap_reset_controller_fsm(host, SRC); 463a45c6cb8SMadhusudhan Chikkature host->cmd->error = -ETIMEDOUT; 464a45c6cb8SMadhusudhan Chikkature } else { 465a45c6cb8SMadhusudhan Chikkature host->cmd->error = -EILSEQ; 466a45c6cb8SMadhusudhan Chikkature } 467a45c6cb8SMadhusudhan Chikkature end_cmd = 1; 468a45c6cb8SMadhusudhan Chikkature } 4694a694dc9SAdrian Hunter if (host->data || host->response_busy) { 4704a694dc9SAdrian Hunter if (host->data) 47182788ff5SJarkko Lavinen mmc_dma_cleanup(host, -ETIMEDOUT); 4724a694dc9SAdrian Hunter host->response_busy = 0; 4733ebf74b1SJean Pihet mmc_omap_reset_controller_fsm(host, SRD); 474c232f457SJean Pihet } 475a45c6cb8SMadhusudhan Chikkature } 476a45c6cb8SMadhusudhan Chikkature if ((status & DATA_TIMEOUT) || 477a45c6cb8SMadhusudhan Chikkature (status & DATA_CRC)) { 4784a694dc9SAdrian Hunter if (host->data || host->response_busy) { 4794a694dc9SAdrian Hunter int err = (status & DATA_TIMEOUT) ? 4804a694dc9SAdrian Hunter -ETIMEDOUT : -EILSEQ; 4814a694dc9SAdrian Hunter 4824a694dc9SAdrian Hunter if (host->data) 4834a694dc9SAdrian Hunter mmc_dma_cleanup(host, err); 484a45c6cb8SMadhusudhan Chikkature else 4854a694dc9SAdrian Hunter host->mrq->cmd->error = err; 4864a694dc9SAdrian Hunter host->response_busy = 0; 4873ebf74b1SJean Pihet mmc_omap_reset_controller_fsm(host, SRD); 488a45c6cb8SMadhusudhan Chikkature end_trans = 1; 489a45c6cb8SMadhusudhan Chikkature } 490a45c6cb8SMadhusudhan Chikkature } 491a45c6cb8SMadhusudhan Chikkature if (status & CARD_ERR) { 492a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 493a45c6cb8SMadhusudhan Chikkature "Ignoring card err CMD%d\n", host->cmd->opcode); 494a45c6cb8SMadhusudhan Chikkature if (host->cmd) 495a45c6cb8SMadhusudhan Chikkature end_cmd = 1; 496a45c6cb8SMadhusudhan Chikkature if (host->data) 497a45c6cb8SMadhusudhan Chikkature end_trans = 1; 498a45c6cb8SMadhusudhan Chikkature } 499a45c6cb8SMadhusudhan Chikkature } 500a45c6cb8SMadhusudhan Chikkature 501a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, STAT, status); 50200adadc1SKevin Hilman /* Flush posted write */ 50300adadc1SKevin Hilman OMAP_HSMMC_READ(host->base, STAT); 504a45c6cb8SMadhusudhan Chikkature 505a8fe29d8SJarkko Lavinen if (end_cmd || ((status & CC) && host->cmd)) 506a45c6cb8SMadhusudhan Chikkature mmc_omap_cmd_done(host, host->cmd); 507a45c6cb8SMadhusudhan Chikkature if (end_trans || (status & TC)) 508a45c6cb8SMadhusudhan Chikkature mmc_omap_xfer_done(host, data); 509a45c6cb8SMadhusudhan Chikkature 510a45c6cb8SMadhusudhan Chikkature return IRQ_HANDLED; 511a45c6cb8SMadhusudhan Chikkature } 512a45c6cb8SMadhusudhan Chikkature 513e13bb300SAdrian Hunter static void set_sd_bus_power(struct mmc_omap_host *host) 514e13bb300SAdrian Hunter { 515e13bb300SAdrian Hunter unsigned long i; 516e13bb300SAdrian Hunter 517e13bb300SAdrian Hunter OMAP_HSMMC_WRITE(host->base, HCTL, 518e13bb300SAdrian Hunter OMAP_HSMMC_READ(host->base, HCTL) | SDBP); 519e13bb300SAdrian Hunter for (i = 0; i < loops_per_jiffy; i++) { 520e13bb300SAdrian Hunter if (OMAP_HSMMC_READ(host->base, HCTL) & SDBP) 521e13bb300SAdrian Hunter break; 522e13bb300SAdrian Hunter cpu_relax(); 523e13bb300SAdrian Hunter } 524e13bb300SAdrian Hunter } 525e13bb300SAdrian Hunter 526a45c6cb8SMadhusudhan Chikkature /* 527eb250826SDavid Brownell * Switch MMC interface voltage ... only relevant for MMC1. 528eb250826SDavid Brownell * 529eb250826SDavid Brownell * MMC2 and MMC3 use fixed 1.8V levels, and maybe a transceiver. 530eb250826SDavid Brownell * The MMC2 transceiver controls are used instead of DAT4..DAT7. 531eb250826SDavid Brownell * Some chips, like eMMC ones, use internal transceivers. 532a45c6cb8SMadhusudhan Chikkature */ 533a45c6cb8SMadhusudhan Chikkature static int omap_mmc_switch_opcond(struct mmc_omap_host *host, int vdd) 534a45c6cb8SMadhusudhan Chikkature { 535a45c6cb8SMadhusudhan Chikkature u32 reg_val = 0; 536a45c6cb8SMadhusudhan Chikkature int ret; 537a45c6cb8SMadhusudhan Chikkature 538a45c6cb8SMadhusudhan Chikkature /* Disable the clocks */ 539a45c6cb8SMadhusudhan Chikkature clk_disable(host->fclk); 540a45c6cb8SMadhusudhan Chikkature clk_disable(host->iclk); 541a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 542a45c6cb8SMadhusudhan Chikkature 543a45c6cb8SMadhusudhan Chikkature /* Turn the power off */ 544a45c6cb8SMadhusudhan Chikkature ret = mmc_slot(host).set_power(host->dev, host->slot_id, 0, 0); 545a45c6cb8SMadhusudhan Chikkature if (ret != 0) 546a45c6cb8SMadhusudhan Chikkature goto err; 547a45c6cb8SMadhusudhan Chikkature 548a45c6cb8SMadhusudhan Chikkature /* Turn the power ON with given VDD 1.8 or 3.0v */ 549a45c6cb8SMadhusudhan Chikkature ret = mmc_slot(host).set_power(host->dev, host->slot_id, 1, vdd); 550a45c6cb8SMadhusudhan Chikkature if (ret != 0) 551a45c6cb8SMadhusudhan Chikkature goto err; 552a45c6cb8SMadhusudhan Chikkature 553a45c6cb8SMadhusudhan Chikkature clk_enable(host->fclk); 554a45c6cb8SMadhusudhan Chikkature clk_enable(host->iclk); 555a45c6cb8SMadhusudhan Chikkature clk_enable(host->dbclk); 556a45c6cb8SMadhusudhan Chikkature 557a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 558a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) & SDVSCLR); 559a45c6cb8SMadhusudhan Chikkature reg_val = OMAP_HSMMC_READ(host->base, HCTL); 560eb250826SDavid Brownell 561a45c6cb8SMadhusudhan Chikkature /* 562a45c6cb8SMadhusudhan Chikkature * If a MMC dual voltage card is detected, the set_ios fn calls 563a45c6cb8SMadhusudhan Chikkature * this fn with VDD bit set for 1.8V. Upon card removal from the 564a45c6cb8SMadhusudhan Chikkature * slot, omap_mmc_set_ios sets the VDD back to 3V on MMC_POWER_OFF. 565a45c6cb8SMadhusudhan Chikkature * 566eb250826SDavid Brownell * Cope with a bit of slop in the range ... per data sheets: 567eb250826SDavid Brownell * - "1.8V" for vdds_mmc1/vdds_mmc1a can be up to 2.45V max, 568eb250826SDavid Brownell * but recommended values are 1.71V to 1.89V 569eb250826SDavid Brownell * - "3.0V" for vdds_mmc1/vdds_mmc1a can be up to 3.5V max, 570eb250826SDavid Brownell * but recommended values are 2.7V to 3.3V 571eb250826SDavid Brownell * 572eb250826SDavid Brownell * Board setup code shouldn't permit anything very out-of-range. 573eb250826SDavid Brownell * TWL4030-family VMMC1 and VSIM regulators are fine (avoiding the 574eb250826SDavid Brownell * middle range) but VSIM can't power DAT4..DAT7 at more than 3V. 575a45c6cb8SMadhusudhan Chikkature */ 576eb250826SDavid Brownell if ((1 << vdd) <= MMC_VDD_23_24) 577a45c6cb8SMadhusudhan Chikkature reg_val |= SDVS18; 578eb250826SDavid Brownell else 579eb250826SDavid Brownell reg_val |= SDVS30; 580a45c6cb8SMadhusudhan Chikkature 581a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, reg_val); 582e13bb300SAdrian Hunter set_sd_bus_power(host); 583a45c6cb8SMadhusudhan Chikkature 584a45c6cb8SMadhusudhan Chikkature return 0; 585a45c6cb8SMadhusudhan Chikkature err: 586a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Unable to switch operating voltage\n"); 587a45c6cb8SMadhusudhan Chikkature return ret; 588a45c6cb8SMadhusudhan Chikkature } 589a45c6cb8SMadhusudhan Chikkature 590a45c6cb8SMadhusudhan Chikkature /* 591a45c6cb8SMadhusudhan Chikkature * Work Item to notify the core about card insertion/removal 592a45c6cb8SMadhusudhan Chikkature */ 593a45c6cb8SMadhusudhan Chikkature static void mmc_omap_detect(struct work_struct *work) 594a45c6cb8SMadhusudhan Chikkature { 595a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = container_of(work, struct mmc_omap_host, 596a45c6cb8SMadhusudhan Chikkature mmc_carddetect_work); 597249d0fa9SDavid Brownell struct omap_mmc_slot_data *slot = &mmc_slot(host); 598249d0fa9SDavid Brownell 599e1a55f5eSAdrian Hunter if (mmc_slot(host).card_detect) 600249d0fa9SDavid Brownell host->carddetect = slot->card_detect(slot->card_detect_irq); 601e1a55f5eSAdrian Hunter else 602e1a55f5eSAdrian Hunter host->carddetect = -ENOSYS; 603a45c6cb8SMadhusudhan Chikkature 604a45c6cb8SMadhusudhan Chikkature sysfs_notify(&host->mmc->class_dev.kobj, NULL, "cover_switch"); 605a45c6cb8SMadhusudhan Chikkature if (host->carddetect) { 606a45c6cb8SMadhusudhan Chikkature mmc_detect_change(host->mmc, (HZ * 200) / 1000); 607a45c6cb8SMadhusudhan Chikkature } else { 6085e2ea617SAdrian Hunter mmc_host_enable(host->mmc); 6093ebf74b1SJean Pihet mmc_omap_reset_controller_fsm(host, SRD); 6105e2ea617SAdrian Hunter mmc_host_lazy_disable(host->mmc); 611a45c6cb8SMadhusudhan Chikkature mmc_detect_change(host->mmc, (HZ * 50) / 1000); 612a45c6cb8SMadhusudhan Chikkature } 613a45c6cb8SMadhusudhan Chikkature } 614a45c6cb8SMadhusudhan Chikkature 615a45c6cb8SMadhusudhan Chikkature /* 616a45c6cb8SMadhusudhan Chikkature * ISR for handling card insertion and removal 617a45c6cb8SMadhusudhan Chikkature */ 618a45c6cb8SMadhusudhan Chikkature static irqreturn_t omap_mmc_cd_handler(int irq, void *dev_id) 619a45c6cb8SMadhusudhan Chikkature { 620a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = (struct mmc_omap_host *)dev_id; 621a45c6cb8SMadhusudhan Chikkature 622a45c6cb8SMadhusudhan Chikkature schedule_work(&host->mmc_carddetect_work); 623a45c6cb8SMadhusudhan Chikkature 624a45c6cb8SMadhusudhan Chikkature return IRQ_HANDLED; 625a45c6cb8SMadhusudhan Chikkature } 626a45c6cb8SMadhusudhan Chikkature 6270ccd76d4SJuha Yrjola static int mmc_omap_get_dma_sync_dev(struct mmc_omap_host *host, 6280ccd76d4SJuha Yrjola struct mmc_data *data) 6290ccd76d4SJuha Yrjola { 6300ccd76d4SJuha Yrjola int sync_dev; 6310ccd76d4SJuha Yrjola 632f3e2f1ddSGrazvydas Ignotas if (data->flags & MMC_DATA_WRITE) 633f3e2f1ddSGrazvydas Ignotas sync_dev = host->dma_line_tx; 6340ccd76d4SJuha Yrjola else 635f3e2f1ddSGrazvydas Ignotas sync_dev = host->dma_line_rx; 6360ccd76d4SJuha Yrjola return sync_dev; 6370ccd76d4SJuha Yrjola } 6380ccd76d4SJuha Yrjola 6390ccd76d4SJuha Yrjola static void mmc_omap_config_dma_params(struct mmc_omap_host *host, 6400ccd76d4SJuha Yrjola struct mmc_data *data, 6410ccd76d4SJuha Yrjola struct scatterlist *sgl) 6420ccd76d4SJuha Yrjola { 6430ccd76d4SJuha Yrjola int blksz, nblk, dma_ch; 6440ccd76d4SJuha Yrjola 6450ccd76d4SJuha Yrjola dma_ch = host->dma_ch; 6460ccd76d4SJuha Yrjola if (data->flags & MMC_DATA_WRITE) { 6470ccd76d4SJuha Yrjola omap_set_dma_dest_params(dma_ch, 0, OMAP_DMA_AMODE_CONSTANT, 6480ccd76d4SJuha Yrjola (host->mapbase + OMAP_HSMMC_DATA), 0, 0); 6490ccd76d4SJuha Yrjola omap_set_dma_src_params(dma_ch, 0, OMAP_DMA_AMODE_POST_INC, 6500ccd76d4SJuha Yrjola sg_dma_address(sgl), 0, 0); 6510ccd76d4SJuha Yrjola } else { 6520ccd76d4SJuha Yrjola omap_set_dma_src_params(dma_ch, 0, OMAP_DMA_AMODE_CONSTANT, 6530ccd76d4SJuha Yrjola (host->mapbase + OMAP_HSMMC_DATA), 0, 0); 6540ccd76d4SJuha Yrjola omap_set_dma_dest_params(dma_ch, 0, OMAP_DMA_AMODE_POST_INC, 6550ccd76d4SJuha Yrjola sg_dma_address(sgl), 0, 0); 6560ccd76d4SJuha Yrjola } 6570ccd76d4SJuha Yrjola 6580ccd76d4SJuha Yrjola blksz = host->data->blksz; 6590ccd76d4SJuha Yrjola nblk = sg_dma_len(sgl) / blksz; 6600ccd76d4SJuha Yrjola 6610ccd76d4SJuha Yrjola omap_set_dma_transfer_params(dma_ch, OMAP_DMA_DATA_TYPE_S32, 6620ccd76d4SJuha Yrjola blksz / 4, nblk, OMAP_DMA_SYNC_FRAME, 6630ccd76d4SJuha Yrjola mmc_omap_get_dma_sync_dev(host, data), 6640ccd76d4SJuha Yrjola !(data->flags & MMC_DATA_WRITE)); 6650ccd76d4SJuha Yrjola 6660ccd76d4SJuha Yrjola omap_start_dma(dma_ch); 6670ccd76d4SJuha Yrjola } 6680ccd76d4SJuha Yrjola 669a45c6cb8SMadhusudhan Chikkature /* 670a45c6cb8SMadhusudhan Chikkature * DMA call back function 671a45c6cb8SMadhusudhan Chikkature */ 672a45c6cb8SMadhusudhan Chikkature static void mmc_omap_dma_cb(int lch, u16 ch_status, void *data) 673a45c6cb8SMadhusudhan Chikkature { 674a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = data; 675a45c6cb8SMadhusudhan Chikkature 676a45c6cb8SMadhusudhan Chikkature if (ch_status & OMAP2_DMA_MISALIGNED_ERR_IRQ) 677a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "MISALIGNED_ADRS_ERR\n"); 678a45c6cb8SMadhusudhan Chikkature 679a45c6cb8SMadhusudhan Chikkature if (host->dma_ch < 0) 680a45c6cb8SMadhusudhan Chikkature return; 681a45c6cb8SMadhusudhan Chikkature 6820ccd76d4SJuha Yrjola host->dma_sg_idx++; 6830ccd76d4SJuha Yrjola if (host->dma_sg_idx < host->dma_len) { 6840ccd76d4SJuha Yrjola /* Fire up the next transfer. */ 6850ccd76d4SJuha Yrjola mmc_omap_config_dma_params(host, host->data, 6860ccd76d4SJuha Yrjola host->data->sg + host->dma_sg_idx); 6870ccd76d4SJuha Yrjola return; 6880ccd76d4SJuha Yrjola } 6890ccd76d4SJuha Yrjola 690a45c6cb8SMadhusudhan Chikkature omap_free_dma(host->dma_ch); 691a45c6cb8SMadhusudhan Chikkature host->dma_ch = -1; 692a45c6cb8SMadhusudhan Chikkature /* 693a45c6cb8SMadhusudhan Chikkature * DMA Callback: run in interrupt context. 69485b84322SAnand Gadiyar * mutex_unlock will throw a kernel warning if used. 695a45c6cb8SMadhusudhan Chikkature */ 696a45c6cb8SMadhusudhan Chikkature up(&host->sem); 697a45c6cb8SMadhusudhan Chikkature } 698a45c6cb8SMadhusudhan Chikkature 699a45c6cb8SMadhusudhan Chikkature /* 700a45c6cb8SMadhusudhan Chikkature * Routine to configure and start DMA for the MMC card 701a45c6cb8SMadhusudhan Chikkature */ 702a45c6cb8SMadhusudhan Chikkature static int 703a45c6cb8SMadhusudhan Chikkature mmc_omap_start_dma_transfer(struct mmc_omap_host *host, struct mmc_request *req) 704a45c6cb8SMadhusudhan Chikkature { 7050ccd76d4SJuha Yrjola int dma_ch = 0, ret = 0, err = 1, i; 706a45c6cb8SMadhusudhan Chikkature struct mmc_data *data = req->data; 707a45c6cb8SMadhusudhan Chikkature 7080ccd76d4SJuha Yrjola /* Sanity check: all the SG entries must be aligned by block size. */ 7090ccd76d4SJuha Yrjola for (i = 0; i < host->dma_len; i++) { 7100ccd76d4SJuha Yrjola struct scatterlist *sgl; 7110ccd76d4SJuha Yrjola 7120ccd76d4SJuha Yrjola sgl = data->sg + i; 7130ccd76d4SJuha Yrjola if (sgl->length % data->blksz) 7140ccd76d4SJuha Yrjola return -EINVAL; 7150ccd76d4SJuha Yrjola } 7160ccd76d4SJuha Yrjola if ((data->blksz % 4) != 0) 7170ccd76d4SJuha Yrjola /* REVISIT: The MMC buffer increments only when MSB is written. 7180ccd76d4SJuha Yrjola * Return error for blksz which is non multiple of four. 7190ccd76d4SJuha Yrjola */ 7200ccd76d4SJuha Yrjola return -EINVAL; 7210ccd76d4SJuha Yrjola 722a45c6cb8SMadhusudhan Chikkature /* 723a45c6cb8SMadhusudhan Chikkature * If for some reason the DMA transfer is still active, 724a45c6cb8SMadhusudhan Chikkature * we wait for timeout period and free the dma 725a45c6cb8SMadhusudhan Chikkature */ 726a45c6cb8SMadhusudhan Chikkature if (host->dma_ch != -1) { 727a45c6cb8SMadhusudhan Chikkature set_current_state(TASK_UNINTERRUPTIBLE); 728a45c6cb8SMadhusudhan Chikkature schedule_timeout(100); 729a45c6cb8SMadhusudhan Chikkature if (down_trylock(&host->sem)) { 730a45c6cb8SMadhusudhan Chikkature omap_free_dma(host->dma_ch); 731a45c6cb8SMadhusudhan Chikkature host->dma_ch = -1; 732a45c6cb8SMadhusudhan Chikkature up(&host->sem); 733a45c6cb8SMadhusudhan Chikkature return err; 734a45c6cb8SMadhusudhan Chikkature } 735a45c6cb8SMadhusudhan Chikkature } else { 736a45c6cb8SMadhusudhan Chikkature if (down_trylock(&host->sem)) 737a45c6cb8SMadhusudhan Chikkature return err; 738a45c6cb8SMadhusudhan Chikkature } 739a45c6cb8SMadhusudhan Chikkature 7400ccd76d4SJuha Yrjola ret = omap_request_dma(mmc_omap_get_dma_sync_dev(host, data), "MMC/SD", 7410ccd76d4SJuha Yrjola mmc_omap_dma_cb,host, &dma_ch); 742a45c6cb8SMadhusudhan Chikkature if (ret != 0) { 7430ccd76d4SJuha Yrjola dev_err(mmc_dev(host->mmc), 744a45c6cb8SMadhusudhan Chikkature "%s: omap_request_dma() failed with %d\n", 745a45c6cb8SMadhusudhan Chikkature mmc_hostname(host->mmc), ret); 746a45c6cb8SMadhusudhan Chikkature return ret; 747a45c6cb8SMadhusudhan Chikkature } 748a45c6cb8SMadhusudhan Chikkature 749a45c6cb8SMadhusudhan Chikkature host->dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg, 7500ccd76d4SJuha Yrjola data->sg_len, mmc_omap_get_dma_dir(host, data)); 751a45c6cb8SMadhusudhan Chikkature host->dma_ch = dma_ch; 7520ccd76d4SJuha Yrjola host->dma_sg_idx = 0; 753a45c6cb8SMadhusudhan Chikkature 7540ccd76d4SJuha Yrjola mmc_omap_config_dma_params(host, data, data->sg); 755a45c6cb8SMadhusudhan Chikkature 756a45c6cb8SMadhusudhan Chikkature return 0; 757a45c6cb8SMadhusudhan Chikkature } 758a45c6cb8SMadhusudhan Chikkature 759a45c6cb8SMadhusudhan Chikkature static void set_data_timeout(struct mmc_omap_host *host, 760a45c6cb8SMadhusudhan Chikkature struct mmc_request *req) 761a45c6cb8SMadhusudhan Chikkature { 762a45c6cb8SMadhusudhan Chikkature unsigned int timeout, cycle_ns; 763a45c6cb8SMadhusudhan Chikkature uint32_t reg, clkd, dto = 0; 764a45c6cb8SMadhusudhan Chikkature 765a45c6cb8SMadhusudhan Chikkature reg = OMAP_HSMMC_READ(host->base, SYSCTL); 766a45c6cb8SMadhusudhan Chikkature clkd = (reg & CLKD_MASK) >> CLKD_SHIFT; 767a45c6cb8SMadhusudhan Chikkature if (clkd == 0) 768a45c6cb8SMadhusudhan Chikkature clkd = 1; 769a45c6cb8SMadhusudhan Chikkature 770a45c6cb8SMadhusudhan Chikkature cycle_ns = 1000000000 / (clk_get_rate(host->fclk) / clkd); 771a45c6cb8SMadhusudhan Chikkature timeout = req->data->timeout_ns / cycle_ns; 772a45c6cb8SMadhusudhan Chikkature timeout += req->data->timeout_clks; 773a45c6cb8SMadhusudhan Chikkature if (timeout) { 774a45c6cb8SMadhusudhan Chikkature while ((timeout & 0x80000000) == 0) { 775a45c6cb8SMadhusudhan Chikkature dto += 1; 776a45c6cb8SMadhusudhan Chikkature timeout <<= 1; 777a45c6cb8SMadhusudhan Chikkature } 778a45c6cb8SMadhusudhan Chikkature dto = 31 - dto; 779a45c6cb8SMadhusudhan Chikkature timeout <<= 1; 780a45c6cb8SMadhusudhan Chikkature if (timeout && dto) 781a45c6cb8SMadhusudhan Chikkature dto += 1; 782a45c6cb8SMadhusudhan Chikkature if (dto >= 13) 783a45c6cb8SMadhusudhan Chikkature dto -= 13; 784a45c6cb8SMadhusudhan Chikkature else 785a45c6cb8SMadhusudhan Chikkature dto = 0; 786a45c6cb8SMadhusudhan Chikkature if (dto > 14) 787a45c6cb8SMadhusudhan Chikkature dto = 14; 788a45c6cb8SMadhusudhan Chikkature } 789a45c6cb8SMadhusudhan Chikkature 790a45c6cb8SMadhusudhan Chikkature reg &= ~DTO_MASK; 791a45c6cb8SMadhusudhan Chikkature reg |= dto << DTO_SHIFT; 792a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, reg); 793a45c6cb8SMadhusudhan Chikkature } 794a45c6cb8SMadhusudhan Chikkature 795a45c6cb8SMadhusudhan Chikkature /* 796a45c6cb8SMadhusudhan Chikkature * Configure block length for MMC/SD cards and initiate the transfer. 797a45c6cb8SMadhusudhan Chikkature */ 798a45c6cb8SMadhusudhan Chikkature static int 799a45c6cb8SMadhusudhan Chikkature mmc_omap_prepare_data(struct mmc_omap_host *host, struct mmc_request *req) 800a45c6cb8SMadhusudhan Chikkature { 801a45c6cb8SMadhusudhan Chikkature int ret; 802a45c6cb8SMadhusudhan Chikkature host->data = req->data; 803a45c6cb8SMadhusudhan Chikkature 804a45c6cb8SMadhusudhan Chikkature if (req->data == NULL) { 805a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, BLK, 0); 806a45c6cb8SMadhusudhan Chikkature return 0; 807a45c6cb8SMadhusudhan Chikkature } 808a45c6cb8SMadhusudhan Chikkature 809a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, BLK, (req->data->blksz) 810a45c6cb8SMadhusudhan Chikkature | (req->data->blocks << 16)); 811a45c6cb8SMadhusudhan Chikkature set_data_timeout(host, req); 812a45c6cb8SMadhusudhan Chikkature 813a45c6cb8SMadhusudhan Chikkature if (host->use_dma) { 814a45c6cb8SMadhusudhan Chikkature ret = mmc_omap_start_dma_transfer(host, req); 815a45c6cb8SMadhusudhan Chikkature if (ret != 0) { 816a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "MMC start dma failure\n"); 817a45c6cb8SMadhusudhan Chikkature return ret; 818a45c6cb8SMadhusudhan Chikkature } 819a45c6cb8SMadhusudhan Chikkature } 820a45c6cb8SMadhusudhan Chikkature return 0; 821a45c6cb8SMadhusudhan Chikkature } 822a45c6cb8SMadhusudhan Chikkature 8235e2ea617SAdrian Hunter static int omap_mmc_enable(struct mmc_host *mmc) 8245e2ea617SAdrian Hunter { 8255e2ea617SAdrian Hunter struct mmc_omap_host *host = mmc_priv(mmc); 8265e2ea617SAdrian Hunter int err; 8275e2ea617SAdrian Hunter 8285e2ea617SAdrian Hunter err = clk_enable(host->fclk); 8295e2ea617SAdrian Hunter if (err) 8305e2ea617SAdrian Hunter return err; 8315e2ea617SAdrian Hunter dev_dbg(mmc_dev(host->mmc), "mmc_fclk: enabled\n"); 8325e2ea617SAdrian Hunter return 0; 8335e2ea617SAdrian Hunter } 8345e2ea617SAdrian Hunter 8355e2ea617SAdrian Hunter static int omap_mmc_disable(struct mmc_host *mmc, int lazy) 8365e2ea617SAdrian Hunter { 8375e2ea617SAdrian Hunter struct mmc_omap_host *host = mmc_priv(mmc); 8385e2ea617SAdrian Hunter 8395e2ea617SAdrian Hunter clk_disable(host->fclk); 8405e2ea617SAdrian Hunter dev_dbg(mmc_dev(host->mmc), "mmc_fclk: disabled\n"); 8415e2ea617SAdrian Hunter return 0; 8425e2ea617SAdrian Hunter } 8435e2ea617SAdrian Hunter 844a45c6cb8SMadhusudhan Chikkature /* 845a45c6cb8SMadhusudhan Chikkature * Request function. for read/write operation 846a45c6cb8SMadhusudhan Chikkature */ 847a45c6cb8SMadhusudhan Chikkature static void omap_mmc_request(struct mmc_host *mmc, struct mmc_request *req) 848a45c6cb8SMadhusudhan Chikkature { 849a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = mmc_priv(mmc); 850a45c6cb8SMadhusudhan Chikkature 851a45c6cb8SMadhusudhan Chikkature WARN_ON(host->mrq != NULL); 852a45c6cb8SMadhusudhan Chikkature host->mrq = req; 853a45c6cb8SMadhusudhan Chikkature mmc_omap_prepare_data(host, req); 854a45c6cb8SMadhusudhan Chikkature mmc_omap_start_command(host, req->cmd, req->data); 855a45c6cb8SMadhusudhan Chikkature } 856a45c6cb8SMadhusudhan Chikkature 857a45c6cb8SMadhusudhan Chikkature 858a45c6cb8SMadhusudhan Chikkature /* Routine to configure clock values. Exposed API to core */ 859a45c6cb8SMadhusudhan Chikkature static void omap_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 860a45c6cb8SMadhusudhan Chikkature { 861a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = mmc_priv(mmc); 862a45c6cb8SMadhusudhan Chikkature u16 dsor = 0; 863a45c6cb8SMadhusudhan Chikkature unsigned long regval; 864a45c6cb8SMadhusudhan Chikkature unsigned long timeout; 86573153010SJarkko Lavinen u32 con; 866a45c6cb8SMadhusudhan Chikkature 8675e2ea617SAdrian Hunter mmc_host_enable(host->mmc); 8685e2ea617SAdrian Hunter 869a45c6cb8SMadhusudhan Chikkature switch (ios->power_mode) { 870a45c6cb8SMadhusudhan Chikkature case MMC_POWER_OFF: 871a45c6cb8SMadhusudhan Chikkature mmc_slot(host).set_power(host->dev, host->slot_id, 0, 0); 872a45c6cb8SMadhusudhan Chikkature break; 873a45c6cb8SMadhusudhan Chikkature case MMC_POWER_UP: 874a45c6cb8SMadhusudhan Chikkature mmc_slot(host).set_power(host->dev, host->slot_id, 1, ios->vdd); 875a45c6cb8SMadhusudhan Chikkature break; 876a45c6cb8SMadhusudhan Chikkature } 877a45c6cb8SMadhusudhan Chikkature 87873153010SJarkko Lavinen con = OMAP_HSMMC_READ(host->base, CON); 879a45c6cb8SMadhusudhan Chikkature switch (mmc->ios.bus_width) { 88073153010SJarkko Lavinen case MMC_BUS_WIDTH_8: 88173153010SJarkko Lavinen OMAP_HSMMC_WRITE(host->base, CON, con | DW8); 88273153010SJarkko Lavinen break; 883a45c6cb8SMadhusudhan Chikkature case MMC_BUS_WIDTH_4: 88473153010SJarkko Lavinen OMAP_HSMMC_WRITE(host->base, CON, con & ~DW8); 885a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 886a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) | FOUR_BIT); 887a45c6cb8SMadhusudhan Chikkature break; 888a45c6cb8SMadhusudhan Chikkature case MMC_BUS_WIDTH_1: 88973153010SJarkko Lavinen OMAP_HSMMC_WRITE(host->base, CON, con & ~DW8); 890a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 891a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) & ~FOUR_BIT); 892a45c6cb8SMadhusudhan Chikkature break; 893a45c6cb8SMadhusudhan Chikkature } 894a45c6cb8SMadhusudhan Chikkature 895a45c6cb8SMadhusudhan Chikkature if (host->id == OMAP_MMC1_DEVID) { 896eb250826SDavid Brownell /* Only MMC1 can interface at 3V without some flavor 897eb250826SDavid Brownell * of external transceiver; but they all handle 1.8V. 898eb250826SDavid Brownell */ 899a45c6cb8SMadhusudhan Chikkature if ((OMAP_HSMMC_READ(host->base, HCTL) & SDVSDET) && 900a45c6cb8SMadhusudhan Chikkature (ios->vdd == DUAL_VOLT_OCR_BIT)) { 901a45c6cb8SMadhusudhan Chikkature /* 902a45c6cb8SMadhusudhan Chikkature * The mmc_select_voltage fn of the core does 903a45c6cb8SMadhusudhan Chikkature * not seem to set the power_mode to 904a45c6cb8SMadhusudhan Chikkature * MMC_POWER_UP upon recalculating the voltage. 905a45c6cb8SMadhusudhan Chikkature * vdd 1.8v. 906a45c6cb8SMadhusudhan Chikkature */ 907a45c6cb8SMadhusudhan Chikkature if (omap_mmc_switch_opcond(host, ios->vdd) != 0) 908a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 909a45c6cb8SMadhusudhan Chikkature "Switch operation failed\n"); 910a45c6cb8SMadhusudhan Chikkature } 911a45c6cb8SMadhusudhan Chikkature } 912a45c6cb8SMadhusudhan Chikkature 913a45c6cb8SMadhusudhan Chikkature if (ios->clock) { 914a45c6cb8SMadhusudhan Chikkature dsor = OMAP_MMC_MASTER_CLOCK / ios->clock; 915a45c6cb8SMadhusudhan Chikkature if (dsor < 1) 916a45c6cb8SMadhusudhan Chikkature dsor = 1; 917a45c6cb8SMadhusudhan Chikkature 918a45c6cb8SMadhusudhan Chikkature if (OMAP_MMC_MASTER_CLOCK / dsor > ios->clock) 919a45c6cb8SMadhusudhan Chikkature dsor++; 920a45c6cb8SMadhusudhan Chikkature 921a45c6cb8SMadhusudhan Chikkature if (dsor > 250) 922a45c6cb8SMadhusudhan Chikkature dsor = 250; 923a45c6cb8SMadhusudhan Chikkature } 924a45c6cb8SMadhusudhan Chikkature omap_mmc_stop_clock(host); 925a45c6cb8SMadhusudhan Chikkature regval = OMAP_HSMMC_READ(host->base, SYSCTL); 926a45c6cb8SMadhusudhan Chikkature regval = regval & ~(CLKD_MASK); 927a45c6cb8SMadhusudhan Chikkature regval = regval | (dsor << 6) | (DTO << 16); 928a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, regval); 929a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, 930a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, SYSCTL) | ICE); 931a45c6cb8SMadhusudhan Chikkature 932a45c6cb8SMadhusudhan Chikkature /* Wait till the ICS bit is set */ 933a45c6cb8SMadhusudhan Chikkature timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 934a45c6cb8SMadhusudhan Chikkature while ((OMAP_HSMMC_READ(host->base, SYSCTL) & ICS) != 0x2 935a45c6cb8SMadhusudhan Chikkature && time_before(jiffies, timeout)) 936a45c6cb8SMadhusudhan Chikkature msleep(1); 937a45c6cb8SMadhusudhan Chikkature 938a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, 939a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, SYSCTL) | CEN); 940a45c6cb8SMadhusudhan Chikkature 941a45c6cb8SMadhusudhan Chikkature if (ios->power_mode == MMC_POWER_ON) 942a45c6cb8SMadhusudhan Chikkature send_init_stream(host); 943a45c6cb8SMadhusudhan Chikkature 944a45c6cb8SMadhusudhan Chikkature if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN) 945a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CON, 946a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, CON) | OD); 9475e2ea617SAdrian Hunter 9485e2ea617SAdrian Hunter mmc_host_lazy_disable(host->mmc); 949a45c6cb8SMadhusudhan Chikkature } 950a45c6cb8SMadhusudhan Chikkature 951a45c6cb8SMadhusudhan Chikkature static int omap_hsmmc_get_cd(struct mmc_host *mmc) 952a45c6cb8SMadhusudhan Chikkature { 953a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = mmc_priv(mmc); 954a45c6cb8SMadhusudhan Chikkature struct omap_mmc_platform_data *pdata = host->pdata; 955a45c6cb8SMadhusudhan Chikkature 956a45c6cb8SMadhusudhan Chikkature if (!pdata->slots[0].card_detect) 957a45c6cb8SMadhusudhan Chikkature return -ENOSYS; 958a45c6cb8SMadhusudhan Chikkature return pdata->slots[0].card_detect(pdata->slots[0].card_detect_irq); 959a45c6cb8SMadhusudhan Chikkature } 960a45c6cb8SMadhusudhan Chikkature 961a45c6cb8SMadhusudhan Chikkature static int omap_hsmmc_get_ro(struct mmc_host *mmc) 962a45c6cb8SMadhusudhan Chikkature { 963a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = mmc_priv(mmc); 964a45c6cb8SMadhusudhan Chikkature struct omap_mmc_platform_data *pdata = host->pdata; 965a45c6cb8SMadhusudhan Chikkature 966a45c6cb8SMadhusudhan Chikkature if (!pdata->slots[0].get_ro) 967a45c6cb8SMadhusudhan Chikkature return -ENOSYS; 968a45c6cb8SMadhusudhan Chikkature return pdata->slots[0].get_ro(host->dev, 0); 969a45c6cb8SMadhusudhan Chikkature } 970a45c6cb8SMadhusudhan Chikkature 9711b331e69SKim Kyuwon static void omap_hsmmc_init(struct mmc_omap_host *host) 9721b331e69SKim Kyuwon { 9731b331e69SKim Kyuwon u32 hctl, capa, value; 9741b331e69SKim Kyuwon 9751b331e69SKim Kyuwon /* Only MMC1 supports 3.0V */ 9761b331e69SKim Kyuwon if (host->id == OMAP_MMC1_DEVID) { 9771b331e69SKim Kyuwon hctl = SDVS30; 9781b331e69SKim Kyuwon capa = VS30 | VS18; 9791b331e69SKim Kyuwon } else { 9801b331e69SKim Kyuwon hctl = SDVS18; 9811b331e69SKim Kyuwon capa = VS18; 9821b331e69SKim Kyuwon } 9831b331e69SKim Kyuwon 9841b331e69SKim Kyuwon value = OMAP_HSMMC_READ(host->base, HCTL) & ~SDVS_MASK; 9851b331e69SKim Kyuwon OMAP_HSMMC_WRITE(host->base, HCTL, value | hctl); 9861b331e69SKim Kyuwon 9871b331e69SKim Kyuwon value = OMAP_HSMMC_READ(host->base, CAPA); 9881b331e69SKim Kyuwon OMAP_HSMMC_WRITE(host->base, CAPA, value | capa); 9891b331e69SKim Kyuwon 9901b331e69SKim Kyuwon /* Set the controller to AUTO IDLE mode */ 9911b331e69SKim Kyuwon value = OMAP_HSMMC_READ(host->base, SYSCONFIG); 9921b331e69SKim Kyuwon OMAP_HSMMC_WRITE(host->base, SYSCONFIG, value | AUTOIDLE); 9931b331e69SKim Kyuwon 9941b331e69SKim Kyuwon /* Set SD bus power bit */ 995e13bb300SAdrian Hunter set_sd_bus_power(host); 9961b331e69SKim Kyuwon } 9971b331e69SKim Kyuwon 998a45c6cb8SMadhusudhan Chikkature static struct mmc_host_ops mmc_omap_ops = { 9995e2ea617SAdrian Hunter .enable = omap_mmc_enable, 10005e2ea617SAdrian Hunter .disable = omap_mmc_disable, 1001a45c6cb8SMadhusudhan Chikkature .request = omap_mmc_request, 1002a45c6cb8SMadhusudhan Chikkature .set_ios = omap_mmc_set_ios, 1003a45c6cb8SMadhusudhan Chikkature .get_cd = omap_hsmmc_get_cd, 1004a45c6cb8SMadhusudhan Chikkature .get_ro = omap_hsmmc_get_ro, 1005a45c6cb8SMadhusudhan Chikkature /* NYET -- enable_sdio_irq */ 1006a45c6cb8SMadhusudhan Chikkature }; 1007a45c6cb8SMadhusudhan Chikkature 1008d900f712SDenis Karpov #ifdef CONFIG_DEBUG_FS 1009d900f712SDenis Karpov 1010d900f712SDenis Karpov static int mmc_regs_show(struct seq_file *s, void *data) 1011d900f712SDenis Karpov { 1012d900f712SDenis Karpov struct mmc_host *mmc = s->private; 1013d900f712SDenis Karpov struct mmc_omap_host *host = mmc_priv(mmc); 1014d900f712SDenis Karpov 10155e2ea617SAdrian Hunter seq_printf(s, "mmc%d:\n" 10165e2ea617SAdrian Hunter " enabled:\t%d\n" 10175e2ea617SAdrian Hunter " nesting_cnt:\t%d\n" 10185e2ea617SAdrian Hunter "\nregs:\n", 10195e2ea617SAdrian Hunter mmc->index, mmc->enabled ? 1 : 0, mmc->nesting_cnt); 10205e2ea617SAdrian Hunter 10215e2ea617SAdrian Hunter if (clk_enable(host->fclk) != 0) { 10225e2ea617SAdrian Hunter seq_printf(s, "can't read the regs\n"); 10235e2ea617SAdrian Hunter goto err; 10245e2ea617SAdrian Hunter } 1025d900f712SDenis Karpov 1026d900f712SDenis Karpov seq_printf(s, "SYSCONFIG:\t0x%08x\n", 1027d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCONFIG)); 1028d900f712SDenis Karpov seq_printf(s, "CON:\t\t0x%08x\n", 1029d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, CON)); 1030d900f712SDenis Karpov seq_printf(s, "HCTL:\t\t0x%08x\n", 1031d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, HCTL)); 1032d900f712SDenis Karpov seq_printf(s, "SYSCTL:\t\t0x%08x\n", 1033d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCTL)); 1034d900f712SDenis Karpov seq_printf(s, "IE:\t\t0x%08x\n", 1035d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, IE)); 1036d900f712SDenis Karpov seq_printf(s, "ISE:\t\t0x%08x\n", 1037d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, ISE)); 1038d900f712SDenis Karpov seq_printf(s, "CAPA:\t\t0x%08x\n", 1039d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, CAPA)); 10405e2ea617SAdrian Hunter 10415e2ea617SAdrian Hunter clk_disable(host->fclk); 10425e2ea617SAdrian Hunter err: 1043d900f712SDenis Karpov return 0; 1044d900f712SDenis Karpov } 1045d900f712SDenis Karpov 1046d900f712SDenis Karpov static int mmc_regs_open(struct inode *inode, struct file *file) 1047d900f712SDenis Karpov { 1048d900f712SDenis Karpov return single_open(file, mmc_regs_show, inode->i_private); 1049d900f712SDenis Karpov } 1050d900f712SDenis Karpov 1051d900f712SDenis Karpov static const struct file_operations mmc_regs_fops = { 1052d900f712SDenis Karpov .open = mmc_regs_open, 1053d900f712SDenis Karpov .read = seq_read, 1054d900f712SDenis Karpov .llseek = seq_lseek, 1055d900f712SDenis Karpov .release = single_release, 1056d900f712SDenis Karpov }; 1057d900f712SDenis Karpov 1058d900f712SDenis Karpov static void omap_mmc_debugfs(struct mmc_host *mmc) 1059d900f712SDenis Karpov { 1060d900f712SDenis Karpov if (mmc->debugfs_root) 1061d900f712SDenis Karpov debugfs_create_file("regs", S_IRUSR, mmc->debugfs_root, 1062d900f712SDenis Karpov mmc, &mmc_regs_fops); 1063d900f712SDenis Karpov } 1064d900f712SDenis Karpov 1065d900f712SDenis Karpov #else 1066d900f712SDenis Karpov 1067d900f712SDenis Karpov static void omap_mmc_debugfs(struct mmc_host *mmc) 1068d900f712SDenis Karpov { 1069d900f712SDenis Karpov } 1070d900f712SDenis Karpov 1071d900f712SDenis Karpov #endif 1072d900f712SDenis Karpov 1073a45c6cb8SMadhusudhan Chikkature static int __init omap_mmc_probe(struct platform_device *pdev) 1074a45c6cb8SMadhusudhan Chikkature { 1075a45c6cb8SMadhusudhan Chikkature struct omap_mmc_platform_data *pdata = pdev->dev.platform_data; 1076a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc; 1077a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = NULL; 1078a45c6cb8SMadhusudhan Chikkature struct resource *res; 1079a45c6cb8SMadhusudhan Chikkature int ret = 0, irq; 1080a45c6cb8SMadhusudhan Chikkature 1081a45c6cb8SMadhusudhan Chikkature if (pdata == NULL) { 1082a45c6cb8SMadhusudhan Chikkature dev_err(&pdev->dev, "Platform Data is missing\n"); 1083a45c6cb8SMadhusudhan Chikkature return -ENXIO; 1084a45c6cb8SMadhusudhan Chikkature } 1085a45c6cb8SMadhusudhan Chikkature 1086a45c6cb8SMadhusudhan Chikkature if (pdata->nr_slots == 0) { 1087a45c6cb8SMadhusudhan Chikkature dev_err(&pdev->dev, "No Slots\n"); 1088a45c6cb8SMadhusudhan Chikkature return -ENXIO; 1089a45c6cb8SMadhusudhan Chikkature } 1090a45c6cb8SMadhusudhan Chikkature 1091a45c6cb8SMadhusudhan Chikkature res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1092a45c6cb8SMadhusudhan Chikkature irq = platform_get_irq(pdev, 0); 1093a45c6cb8SMadhusudhan Chikkature if (res == NULL || irq < 0) 1094a45c6cb8SMadhusudhan Chikkature return -ENXIO; 1095a45c6cb8SMadhusudhan Chikkature 1096a45c6cb8SMadhusudhan Chikkature res = request_mem_region(res->start, res->end - res->start + 1, 1097a45c6cb8SMadhusudhan Chikkature pdev->name); 1098a45c6cb8SMadhusudhan Chikkature if (res == NULL) 1099a45c6cb8SMadhusudhan Chikkature return -EBUSY; 1100a45c6cb8SMadhusudhan Chikkature 1101a45c6cb8SMadhusudhan Chikkature mmc = mmc_alloc_host(sizeof(struct mmc_omap_host), &pdev->dev); 1102a45c6cb8SMadhusudhan Chikkature if (!mmc) { 1103a45c6cb8SMadhusudhan Chikkature ret = -ENOMEM; 1104a45c6cb8SMadhusudhan Chikkature goto err; 1105a45c6cb8SMadhusudhan Chikkature } 1106a45c6cb8SMadhusudhan Chikkature 1107a45c6cb8SMadhusudhan Chikkature host = mmc_priv(mmc); 1108a45c6cb8SMadhusudhan Chikkature host->mmc = mmc; 1109a45c6cb8SMadhusudhan Chikkature host->pdata = pdata; 1110a45c6cb8SMadhusudhan Chikkature host->dev = &pdev->dev; 1111a45c6cb8SMadhusudhan Chikkature host->use_dma = 1; 1112a45c6cb8SMadhusudhan Chikkature host->dev->dma_mask = &pdata->dma_mask; 1113a45c6cb8SMadhusudhan Chikkature host->dma_ch = -1; 1114a45c6cb8SMadhusudhan Chikkature host->irq = irq; 1115a45c6cb8SMadhusudhan Chikkature host->id = pdev->id; 1116a45c6cb8SMadhusudhan Chikkature host->slot_id = 0; 1117a45c6cb8SMadhusudhan Chikkature host->mapbase = res->start; 1118a45c6cb8SMadhusudhan Chikkature host->base = ioremap(host->mapbase, SZ_4K); 1119a45c6cb8SMadhusudhan Chikkature 1120a45c6cb8SMadhusudhan Chikkature platform_set_drvdata(pdev, host); 1121a45c6cb8SMadhusudhan Chikkature INIT_WORK(&host->mmc_carddetect_work, mmc_omap_detect); 1122a45c6cb8SMadhusudhan Chikkature 1123a45c6cb8SMadhusudhan Chikkature mmc->ops = &mmc_omap_ops; 1124a45c6cb8SMadhusudhan Chikkature mmc->f_min = 400000; 1125a45c6cb8SMadhusudhan Chikkature mmc->f_max = 52000000; 1126a45c6cb8SMadhusudhan Chikkature 1127a45c6cb8SMadhusudhan Chikkature sema_init(&host->sem, 1); 1128a45c6cb8SMadhusudhan Chikkature 11296f7607ccSRussell King host->iclk = clk_get(&pdev->dev, "ick"); 1130a45c6cb8SMadhusudhan Chikkature if (IS_ERR(host->iclk)) { 1131a45c6cb8SMadhusudhan Chikkature ret = PTR_ERR(host->iclk); 1132a45c6cb8SMadhusudhan Chikkature host->iclk = NULL; 1133a45c6cb8SMadhusudhan Chikkature goto err1; 1134a45c6cb8SMadhusudhan Chikkature } 11356f7607ccSRussell King host->fclk = clk_get(&pdev->dev, "fck"); 1136a45c6cb8SMadhusudhan Chikkature if (IS_ERR(host->fclk)) { 1137a45c6cb8SMadhusudhan Chikkature ret = PTR_ERR(host->fclk); 1138a45c6cb8SMadhusudhan Chikkature host->fclk = NULL; 1139a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 1140a45c6cb8SMadhusudhan Chikkature goto err1; 1141a45c6cb8SMadhusudhan Chikkature } 1142a45c6cb8SMadhusudhan Chikkature 11435e2ea617SAdrian Hunter mmc->caps |= MMC_CAP_DISABLE; 11445e2ea617SAdrian Hunter mmc_set_disable_delay(mmc, 100); 11455e2ea617SAdrian Hunter if (mmc_host_enable(host->mmc) != 0) { 1146a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 1147a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 1148a45c6cb8SMadhusudhan Chikkature goto err1; 1149a45c6cb8SMadhusudhan Chikkature } 1150a45c6cb8SMadhusudhan Chikkature 1151a45c6cb8SMadhusudhan Chikkature if (clk_enable(host->iclk) != 0) { 11525e2ea617SAdrian Hunter mmc_host_disable(host->mmc); 1153a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 1154a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 1155a45c6cb8SMadhusudhan Chikkature goto err1; 1156a45c6cb8SMadhusudhan Chikkature } 1157a45c6cb8SMadhusudhan Chikkature 1158a45c6cb8SMadhusudhan Chikkature host->dbclk = clk_get(&pdev->dev, "mmchsdb_fck"); 1159a45c6cb8SMadhusudhan Chikkature /* 1160a45c6cb8SMadhusudhan Chikkature * MMC can still work without debounce clock. 1161a45c6cb8SMadhusudhan Chikkature */ 1162a45c6cb8SMadhusudhan Chikkature if (IS_ERR(host->dbclk)) 1163a45c6cb8SMadhusudhan Chikkature dev_warn(mmc_dev(host->mmc), "Failed to get debounce clock\n"); 1164a45c6cb8SMadhusudhan Chikkature else 1165a45c6cb8SMadhusudhan Chikkature if (clk_enable(host->dbclk) != 0) 1166a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Enabling debounce" 1167a45c6cb8SMadhusudhan Chikkature " clk failed\n"); 1168a45c6cb8SMadhusudhan Chikkature else 1169a45c6cb8SMadhusudhan Chikkature host->dbclk_enabled = 1; 1170a45c6cb8SMadhusudhan Chikkature 11710ccd76d4SJuha Yrjola /* Since we do only SG emulation, we can have as many segs 11720ccd76d4SJuha Yrjola * as we want. */ 11730ccd76d4SJuha Yrjola mmc->max_phys_segs = 1024; 11740ccd76d4SJuha Yrjola mmc->max_hw_segs = 1024; 11750ccd76d4SJuha Yrjola 1176a45c6cb8SMadhusudhan Chikkature mmc->max_blk_size = 512; /* Block Length at max can be 1024 */ 1177a45c6cb8SMadhusudhan Chikkature mmc->max_blk_count = 0xFFFF; /* No. of Blocks is 16 bits */ 1178a45c6cb8SMadhusudhan Chikkature mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; 1179a45c6cb8SMadhusudhan Chikkature mmc->max_seg_size = mmc->max_req_size; 1180a45c6cb8SMadhusudhan Chikkature 1181a45c6cb8SMadhusudhan Chikkature mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED; 1182a45c6cb8SMadhusudhan Chikkature 118373153010SJarkko Lavinen if (pdata->slots[host->slot_id].wires >= 8) 118473153010SJarkko Lavinen mmc->caps |= MMC_CAP_8_BIT_DATA; 118573153010SJarkko Lavinen else if (pdata->slots[host->slot_id].wires >= 4) 1186a45c6cb8SMadhusudhan Chikkature mmc->caps |= MMC_CAP_4_BIT_DATA; 1187a45c6cb8SMadhusudhan Chikkature 11881b331e69SKim Kyuwon omap_hsmmc_init(host); 1189a45c6cb8SMadhusudhan Chikkature 1190f3e2f1ddSGrazvydas Ignotas /* Select DMA lines */ 1191f3e2f1ddSGrazvydas Ignotas switch (host->id) { 1192f3e2f1ddSGrazvydas Ignotas case OMAP_MMC1_DEVID: 1193f3e2f1ddSGrazvydas Ignotas host->dma_line_tx = OMAP24XX_DMA_MMC1_TX; 1194f3e2f1ddSGrazvydas Ignotas host->dma_line_rx = OMAP24XX_DMA_MMC1_RX; 1195f3e2f1ddSGrazvydas Ignotas break; 1196f3e2f1ddSGrazvydas Ignotas case OMAP_MMC2_DEVID: 1197f3e2f1ddSGrazvydas Ignotas host->dma_line_tx = OMAP24XX_DMA_MMC2_TX; 1198f3e2f1ddSGrazvydas Ignotas host->dma_line_rx = OMAP24XX_DMA_MMC2_RX; 1199f3e2f1ddSGrazvydas Ignotas break; 1200f3e2f1ddSGrazvydas Ignotas case OMAP_MMC3_DEVID: 1201f3e2f1ddSGrazvydas Ignotas host->dma_line_tx = OMAP34XX_DMA_MMC3_TX; 1202f3e2f1ddSGrazvydas Ignotas host->dma_line_rx = OMAP34XX_DMA_MMC3_RX; 1203f3e2f1ddSGrazvydas Ignotas break; 1204f3e2f1ddSGrazvydas Ignotas default: 1205f3e2f1ddSGrazvydas Ignotas dev_err(mmc_dev(host->mmc), "Invalid MMC id\n"); 1206f3e2f1ddSGrazvydas Ignotas goto err_irq; 1207a45c6cb8SMadhusudhan Chikkature } 1208a45c6cb8SMadhusudhan Chikkature 1209a45c6cb8SMadhusudhan Chikkature /* Request IRQ for MMC operations */ 1210a45c6cb8SMadhusudhan Chikkature ret = request_irq(host->irq, mmc_omap_irq, IRQF_DISABLED, 1211a45c6cb8SMadhusudhan Chikkature mmc_hostname(mmc), host); 1212a45c6cb8SMadhusudhan Chikkature if (ret) { 1213a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Unable to grab HSMMC IRQ\n"); 1214a45c6cb8SMadhusudhan Chikkature goto err_irq; 1215a45c6cb8SMadhusudhan Chikkature } 1216a45c6cb8SMadhusudhan Chikkature 1217b583f26dSDavid Brownell /* initialize power supplies, gpios, etc */ 1218a45c6cb8SMadhusudhan Chikkature if (pdata->init != NULL) { 1219a45c6cb8SMadhusudhan Chikkature if (pdata->init(&pdev->dev) != 0) { 1220b583f26dSDavid Brownell dev_dbg(mmc_dev(host->mmc), "late init error\n"); 1221a45c6cb8SMadhusudhan Chikkature goto err_irq_cd_init; 1222a45c6cb8SMadhusudhan Chikkature } 1223a45c6cb8SMadhusudhan Chikkature } 1224b583f26dSDavid Brownell mmc->ocr_avail = mmc_slot(host).ocr_mask; 1225a45c6cb8SMadhusudhan Chikkature 1226a45c6cb8SMadhusudhan Chikkature /* Request IRQ for card detect */ 1227e1a55f5eSAdrian Hunter if ((mmc_slot(host).card_detect_irq)) { 1228a45c6cb8SMadhusudhan Chikkature ret = request_irq(mmc_slot(host).card_detect_irq, 1229a45c6cb8SMadhusudhan Chikkature omap_mmc_cd_handler, 1230a45c6cb8SMadhusudhan Chikkature IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING 1231a45c6cb8SMadhusudhan Chikkature | IRQF_DISABLED, 1232a45c6cb8SMadhusudhan Chikkature mmc_hostname(mmc), host); 1233a45c6cb8SMadhusudhan Chikkature if (ret) { 1234a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1235a45c6cb8SMadhusudhan Chikkature "Unable to grab MMC CD IRQ\n"); 1236a45c6cb8SMadhusudhan Chikkature goto err_irq_cd; 1237a45c6cb8SMadhusudhan Chikkature } 1238a45c6cb8SMadhusudhan Chikkature } 1239a45c6cb8SMadhusudhan Chikkature 1240a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK); 1241a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK); 1242a45c6cb8SMadhusudhan Chikkature 12435e2ea617SAdrian Hunter mmc_host_lazy_disable(host->mmc); 12445e2ea617SAdrian Hunter 1245a45c6cb8SMadhusudhan Chikkature mmc_add_host(mmc); 1246a45c6cb8SMadhusudhan Chikkature 1247a45c6cb8SMadhusudhan Chikkature if (host->pdata->slots[host->slot_id].name != NULL) { 1248a45c6cb8SMadhusudhan Chikkature ret = device_create_file(&mmc->class_dev, &dev_attr_slot_name); 1249a45c6cb8SMadhusudhan Chikkature if (ret < 0) 1250a45c6cb8SMadhusudhan Chikkature goto err_slot_name; 1251a45c6cb8SMadhusudhan Chikkature } 1252e1a55f5eSAdrian Hunter if (mmc_slot(host).card_detect_irq && 1253a45c6cb8SMadhusudhan Chikkature host->pdata->slots[host->slot_id].get_cover_state) { 1254a45c6cb8SMadhusudhan Chikkature ret = device_create_file(&mmc->class_dev, 1255a45c6cb8SMadhusudhan Chikkature &dev_attr_cover_switch); 1256a45c6cb8SMadhusudhan Chikkature if (ret < 0) 1257a45c6cb8SMadhusudhan Chikkature goto err_cover_switch; 1258a45c6cb8SMadhusudhan Chikkature } 1259a45c6cb8SMadhusudhan Chikkature 1260d900f712SDenis Karpov omap_mmc_debugfs(mmc); 1261d900f712SDenis Karpov 1262a45c6cb8SMadhusudhan Chikkature return 0; 1263a45c6cb8SMadhusudhan Chikkature 1264a45c6cb8SMadhusudhan Chikkature err_cover_switch: 1265a45c6cb8SMadhusudhan Chikkature device_remove_file(&mmc->class_dev, &dev_attr_cover_switch); 1266a45c6cb8SMadhusudhan Chikkature err_slot_name: 1267a45c6cb8SMadhusudhan Chikkature mmc_remove_host(mmc); 1268a45c6cb8SMadhusudhan Chikkature err_irq_cd: 1269a45c6cb8SMadhusudhan Chikkature free_irq(mmc_slot(host).card_detect_irq, host); 1270a45c6cb8SMadhusudhan Chikkature err_irq_cd_init: 1271a45c6cb8SMadhusudhan Chikkature free_irq(host->irq, host); 1272a45c6cb8SMadhusudhan Chikkature err_irq: 12735e2ea617SAdrian Hunter mmc_host_disable(host->mmc); 1274a45c6cb8SMadhusudhan Chikkature clk_disable(host->iclk); 1275a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 1276a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 1277a45c6cb8SMadhusudhan Chikkature if (host->dbclk_enabled) { 1278a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 1279a45c6cb8SMadhusudhan Chikkature clk_put(host->dbclk); 1280a45c6cb8SMadhusudhan Chikkature } 1281a45c6cb8SMadhusudhan Chikkature 1282a45c6cb8SMadhusudhan Chikkature err1: 1283a45c6cb8SMadhusudhan Chikkature iounmap(host->base); 1284a45c6cb8SMadhusudhan Chikkature err: 1285a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Probe Failed\n"); 1286a45c6cb8SMadhusudhan Chikkature release_mem_region(res->start, res->end - res->start + 1); 1287a45c6cb8SMadhusudhan Chikkature if (host) 1288a45c6cb8SMadhusudhan Chikkature mmc_free_host(mmc); 1289a45c6cb8SMadhusudhan Chikkature return ret; 1290a45c6cb8SMadhusudhan Chikkature } 1291a45c6cb8SMadhusudhan Chikkature 1292a45c6cb8SMadhusudhan Chikkature static int omap_mmc_remove(struct platform_device *pdev) 1293a45c6cb8SMadhusudhan Chikkature { 1294a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = platform_get_drvdata(pdev); 1295a45c6cb8SMadhusudhan Chikkature struct resource *res; 1296a45c6cb8SMadhusudhan Chikkature 1297a45c6cb8SMadhusudhan Chikkature if (host) { 12985e2ea617SAdrian Hunter mmc_host_enable(host->mmc); 1299a45c6cb8SMadhusudhan Chikkature mmc_remove_host(host->mmc); 1300a45c6cb8SMadhusudhan Chikkature if (host->pdata->cleanup) 1301a45c6cb8SMadhusudhan Chikkature host->pdata->cleanup(&pdev->dev); 1302a45c6cb8SMadhusudhan Chikkature free_irq(host->irq, host); 1303a45c6cb8SMadhusudhan Chikkature if (mmc_slot(host).card_detect_irq) 1304a45c6cb8SMadhusudhan Chikkature free_irq(mmc_slot(host).card_detect_irq, host); 1305a45c6cb8SMadhusudhan Chikkature flush_scheduled_work(); 1306a45c6cb8SMadhusudhan Chikkature 13075e2ea617SAdrian Hunter mmc_host_disable(host->mmc); 1308a45c6cb8SMadhusudhan Chikkature clk_disable(host->iclk); 1309a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 1310a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 1311a45c6cb8SMadhusudhan Chikkature if (host->dbclk_enabled) { 1312a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 1313a45c6cb8SMadhusudhan Chikkature clk_put(host->dbclk); 1314a45c6cb8SMadhusudhan Chikkature } 1315a45c6cb8SMadhusudhan Chikkature 1316a45c6cb8SMadhusudhan Chikkature mmc_free_host(host->mmc); 1317a45c6cb8SMadhusudhan Chikkature iounmap(host->base); 1318a45c6cb8SMadhusudhan Chikkature } 1319a45c6cb8SMadhusudhan Chikkature 1320a45c6cb8SMadhusudhan Chikkature res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1321a45c6cb8SMadhusudhan Chikkature if (res) 1322a45c6cb8SMadhusudhan Chikkature release_mem_region(res->start, res->end - res->start + 1); 1323a45c6cb8SMadhusudhan Chikkature platform_set_drvdata(pdev, NULL); 1324a45c6cb8SMadhusudhan Chikkature 1325a45c6cb8SMadhusudhan Chikkature return 0; 1326a45c6cb8SMadhusudhan Chikkature } 1327a45c6cb8SMadhusudhan Chikkature 1328a45c6cb8SMadhusudhan Chikkature #ifdef CONFIG_PM 1329a45c6cb8SMadhusudhan Chikkature static int omap_mmc_suspend(struct platform_device *pdev, pm_message_t state) 1330a45c6cb8SMadhusudhan Chikkature { 1331a45c6cb8SMadhusudhan Chikkature int ret = 0; 1332a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = platform_get_drvdata(pdev); 1333a45c6cb8SMadhusudhan Chikkature 1334a45c6cb8SMadhusudhan Chikkature if (host && host->suspended) 1335a45c6cb8SMadhusudhan Chikkature return 0; 1336a45c6cb8SMadhusudhan Chikkature 1337a45c6cb8SMadhusudhan Chikkature if (host) { 13385e2ea617SAdrian Hunter mmc_host_enable(host->mmc); 1339a45c6cb8SMadhusudhan Chikkature ret = mmc_suspend_host(host->mmc, state); 1340a45c6cb8SMadhusudhan Chikkature if (ret == 0) { 1341a45c6cb8SMadhusudhan Chikkature host->suspended = 1; 1342a45c6cb8SMadhusudhan Chikkature 1343a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, ISE, 0); 1344a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, IE, 0); 1345a45c6cb8SMadhusudhan Chikkature 1346a45c6cb8SMadhusudhan Chikkature if (host->pdata->suspend) { 1347a45c6cb8SMadhusudhan Chikkature ret = host->pdata->suspend(&pdev->dev, 1348a45c6cb8SMadhusudhan Chikkature host->slot_id); 1349a45c6cb8SMadhusudhan Chikkature if (ret) 1350a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1351a45c6cb8SMadhusudhan Chikkature "Unable to handle MMC board" 1352a45c6cb8SMadhusudhan Chikkature " level suspend\n"); 1353a45c6cb8SMadhusudhan Chikkature } 1354a45c6cb8SMadhusudhan Chikkature 1355a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 13560683af48SJarkko Lavinen OMAP_HSMMC_READ(host->base, HCTL) & ~SDBP); 13575e2ea617SAdrian Hunter mmc_host_disable(host->mmc); 1358a45c6cb8SMadhusudhan Chikkature clk_disable(host->iclk); 1359a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 13605e2ea617SAdrian Hunter } else 13615e2ea617SAdrian Hunter mmc_host_disable(host->mmc); 1362a45c6cb8SMadhusudhan Chikkature 1363a45c6cb8SMadhusudhan Chikkature } 1364a45c6cb8SMadhusudhan Chikkature return ret; 1365a45c6cb8SMadhusudhan Chikkature } 1366a45c6cb8SMadhusudhan Chikkature 1367a45c6cb8SMadhusudhan Chikkature /* Routine to resume the MMC device */ 1368a45c6cb8SMadhusudhan Chikkature static int omap_mmc_resume(struct platform_device *pdev) 1369a45c6cb8SMadhusudhan Chikkature { 1370a45c6cb8SMadhusudhan Chikkature int ret = 0; 1371a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = platform_get_drvdata(pdev); 1372a45c6cb8SMadhusudhan Chikkature 1373a45c6cb8SMadhusudhan Chikkature if (host && !host->suspended) 1374a45c6cb8SMadhusudhan Chikkature return 0; 1375a45c6cb8SMadhusudhan Chikkature 1376a45c6cb8SMadhusudhan Chikkature if (host) { 1377a45c6cb8SMadhusudhan Chikkature 13785e2ea617SAdrian Hunter if (mmc_host_enable(host->mmc) != 0) 1379a45c6cb8SMadhusudhan Chikkature goto clk_en_err; 1380a45c6cb8SMadhusudhan Chikkature 1381a45c6cb8SMadhusudhan Chikkature ret = clk_enable(host->iclk); 1382a45c6cb8SMadhusudhan Chikkature if (ret) { 13835e2ea617SAdrian Hunter mmc_host_disable(host->mmc); 1384a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 1385a45c6cb8SMadhusudhan Chikkature goto clk_en_err; 1386a45c6cb8SMadhusudhan Chikkature } 1387a45c6cb8SMadhusudhan Chikkature 1388a45c6cb8SMadhusudhan Chikkature if (clk_enable(host->dbclk) != 0) 1389a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1390a45c6cb8SMadhusudhan Chikkature "Enabling debounce clk failed\n"); 1391a45c6cb8SMadhusudhan Chikkature 13921b331e69SKim Kyuwon omap_hsmmc_init(host); 13931b331e69SKim Kyuwon 1394a45c6cb8SMadhusudhan Chikkature if (host->pdata->resume) { 1395a45c6cb8SMadhusudhan Chikkature ret = host->pdata->resume(&pdev->dev, host->slot_id); 1396a45c6cb8SMadhusudhan Chikkature if (ret) 1397a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1398a45c6cb8SMadhusudhan Chikkature "Unmask interrupt failed\n"); 1399a45c6cb8SMadhusudhan Chikkature } 1400a45c6cb8SMadhusudhan Chikkature 1401a45c6cb8SMadhusudhan Chikkature /* Notify the core to resume the host */ 1402a45c6cb8SMadhusudhan Chikkature ret = mmc_resume_host(host->mmc); 1403a45c6cb8SMadhusudhan Chikkature if (ret == 0) 1404a45c6cb8SMadhusudhan Chikkature host->suspended = 0; 14055e2ea617SAdrian Hunter mmc_host_lazy_disable(host->mmc); 1406a45c6cb8SMadhusudhan Chikkature } 1407a45c6cb8SMadhusudhan Chikkature 1408a45c6cb8SMadhusudhan Chikkature return ret; 1409a45c6cb8SMadhusudhan Chikkature 1410a45c6cb8SMadhusudhan Chikkature clk_en_err: 1411a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1412a45c6cb8SMadhusudhan Chikkature "Failed to enable MMC clocks during resume\n"); 1413a45c6cb8SMadhusudhan Chikkature return ret; 1414a45c6cb8SMadhusudhan Chikkature } 1415a45c6cb8SMadhusudhan Chikkature 1416a45c6cb8SMadhusudhan Chikkature #else 1417a45c6cb8SMadhusudhan Chikkature #define omap_mmc_suspend NULL 1418a45c6cb8SMadhusudhan Chikkature #define omap_mmc_resume NULL 1419a45c6cb8SMadhusudhan Chikkature #endif 1420a45c6cb8SMadhusudhan Chikkature 1421a45c6cb8SMadhusudhan Chikkature static struct platform_driver omap_mmc_driver = { 1422a45c6cb8SMadhusudhan Chikkature .remove = omap_mmc_remove, 1423a45c6cb8SMadhusudhan Chikkature .suspend = omap_mmc_suspend, 1424a45c6cb8SMadhusudhan Chikkature .resume = omap_mmc_resume, 1425a45c6cb8SMadhusudhan Chikkature .driver = { 1426a45c6cb8SMadhusudhan Chikkature .name = DRIVER_NAME, 1427a45c6cb8SMadhusudhan Chikkature .owner = THIS_MODULE, 1428a45c6cb8SMadhusudhan Chikkature }, 1429a45c6cb8SMadhusudhan Chikkature }; 1430a45c6cb8SMadhusudhan Chikkature 1431a45c6cb8SMadhusudhan Chikkature static int __init omap_mmc_init(void) 1432a45c6cb8SMadhusudhan Chikkature { 1433a45c6cb8SMadhusudhan Chikkature /* Register the MMC driver */ 1434f400cd8cSUwe Kleine-König return platform_driver_probe(&omap_mmc_driver, omap_mmc_probe); 1435a45c6cb8SMadhusudhan Chikkature } 1436a45c6cb8SMadhusudhan Chikkature 1437a45c6cb8SMadhusudhan Chikkature static void __exit omap_mmc_cleanup(void) 1438a45c6cb8SMadhusudhan Chikkature { 1439a45c6cb8SMadhusudhan Chikkature /* Unregister MMC driver */ 1440a45c6cb8SMadhusudhan Chikkature platform_driver_unregister(&omap_mmc_driver); 1441a45c6cb8SMadhusudhan Chikkature } 1442a45c6cb8SMadhusudhan Chikkature 1443a45c6cb8SMadhusudhan Chikkature module_init(omap_mmc_init); 1444a45c6cb8SMadhusudhan Chikkature module_exit(omap_mmc_cleanup); 1445a45c6cb8SMadhusudhan Chikkature 1446a45c6cb8SMadhusudhan Chikkature MODULE_DESCRIPTION("OMAP High Speed Multimedia Card driver"); 1447a45c6cb8SMadhusudhan Chikkature MODULE_LICENSE("GPL"); 1448a45c6cb8SMadhusudhan Chikkature MODULE_ALIAS("platform:" DRIVER_NAME); 1449a45c6cb8SMadhusudhan Chikkature MODULE_AUTHOR("Texas Instruments Inc"); 1450