1a45c6cb8SMadhusudhan Chikkature /* 2a45c6cb8SMadhusudhan Chikkature * drivers/mmc/host/omap_hsmmc.c 3a45c6cb8SMadhusudhan Chikkature * 4a45c6cb8SMadhusudhan Chikkature * Driver for OMAP2430/3430 MMC controller. 5a45c6cb8SMadhusudhan Chikkature * 6a45c6cb8SMadhusudhan Chikkature * Copyright (C) 2007 Texas Instruments. 7a45c6cb8SMadhusudhan Chikkature * 8a45c6cb8SMadhusudhan Chikkature * Authors: 9a45c6cb8SMadhusudhan Chikkature * Syed Mohammed Khasim <x0khasim@ti.com> 10a45c6cb8SMadhusudhan Chikkature * Madhusudhan <madhu.cr@ti.com> 11a45c6cb8SMadhusudhan Chikkature * Mohit Jalori <mjalori@ti.com> 12a45c6cb8SMadhusudhan Chikkature * 13a45c6cb8SMadhusudhan Chikkature * This file is licensed under the terms of the GNU General Public License 14a45c6cb8SMadhusudhan Chikkature * version 2. This program is licensed "as is" without any warranty of any 15a45c6cb8SMadhusudhan Chikkature * kind, whether express or implied. 16a45c6cb8SMadhusudhan Chikkature */ 17a45c6cb8SMadhusudhan Chikkature 18a45c6cb8SMadhusudhan Chikkature #include <linux/module.h> 19a45c6cb8SMadhusudhan Chikkature #include <linux/init.h> 20ac330f44SAndy Shevchenko #include <linux/kernel.h> 21d900f712SDenis Karpov #include <linux/debugfs.h> 22d900f712SDenis Karpov #include <linux/seq_file.h> 23a45c6cb8SMadhusudhan Chikkature #include <linux/interrupt.h> 24a45c6cb8SMadhusudhan Chikkature #include <linux/delay.h> 25a45c6cb8SMadhusudhan Chikkature #include <linux/dma-mapping.h> 26a45c6cb8SMadhusudhan Chikkature #include <linux/platform_device.h> 27a45c6cb8SMadhusudhan Chikkature #include <linux/timer.h> 28a45c6cb8SMadhusudhan Chikkature #include <linux/clk.h> 29a45c6cb8SMadhusudhan Chikkature #include <linux/mmc/host.h> 3013189e78SJarkko Lavinen #include <linux/mmc/core.h> 3193caf8e6SAdrian Hunter #include <linux/mmc/mmc.h> 32a45c6cb8SMadhusudhan Chikkature #include <linux/io.h> 33a45c6cb8SMadhusudhan Chikkature #include <linux/semaphore.h> 34db0fefc5SAdrian Hunter #include <linux/gpio.h> 35db0fefc5SAdrian Hunter #include <linux/regulator/consumer.h> 36fa4aa2d4SBalaji T K #include <linux/pm_runtime.h> 37ce491cf8STony Lindgren #include <plat/dma.h> 38a45c6cb8SMadhusudhan Chikkature #include <mach/hardware.h> 39ce491cf8STony Lindgren #include <plat/board.h> 40ce491cf8STony Lindgren #include <plat/mmc.h> 41ce491cf8STony Lindgren #include <plat/cpu.h> 42a45c6cb8SMadhusudhan Chikkature 43a45c6cb8SMadhusudhan Chikkature /* OMAP HSMMC Host Controller Registers */ 44a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_SYSCONFIG 0x0010 4511dd62a7SDenis Karpov #define OMAP_HSMMC_SYSSTATUS 0x0014 46a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_CON 0x002C 47a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_BLK 0x0104 48a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_ARG 0x0108 49a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_CMD 0x010C 50a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP10 0x0110 51a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP32 0x0114 52a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP54 0x0118 53a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP76 0x011C 54a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_DATA 0x0120 55a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_HCTL 0x0128 56a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_SYSCTL 0x012C 57a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_STAT 0x0130 58a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_IE 0x0134 59a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_ISE 0x0138 60a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_CAPA 0x0140 61a45c6cb8SMadhusudhan Chikkature 62a45c6cb8SMadhusudhan Chikkature #define VS18 (1 << 26) 63a45c6cb8SMadhusudhan Chikkature #define VS30 (1 << 25) 64a45c6cb8SMadhusudhan Chikkature #define SDVS18 (0x5 << 9) 65a45c6cb8SMadhusudhan Chikkature #define SDVS30 (0x6 << 9) 66eb250826SDavid Brownell #define SDVS33 (0x7 << 9) 671b331e69SKim Kyuwon #define SDVS_MASK 0x00000E00 68a45c6cb8SMadhusudhan Chikkature #define SDVSCLR 0xFFFFF1FF 69a45c6cb8SMadhusudhan Chikkature #define SDVSDET 0x00000400 70a45c6cb8SMadhusudhan Chikkature #define AUTOIDLE 0x1 71a45c6cb8SMadhusudhan Chikkature #define SDBP (1 << 8) 72a45c6cb8SMadhusudhan Chikkature #define DTO 0xe 73a45c6cb8SMadhusudhan Chikkature #define ICE 0x1 74a45c6cb8SMadhusudhan Chikkature #define ICS 0x2 75a45c6cb8SMadhusudhan Chikkature #define CEN (1 << 2) 76a45c6cb8SMadhusudhan Chikkature #define CLKD_MASK 0x0000FFC0 77a45c6cb8SMadhusudhan Chikkature #define CLKD_SHIFT 6 78a45c6cb8SMadhusudhan Chikkature #define DTO_MASK 0x000F0000 79a45c6cb8SMadhusudhan Chikkature #define DTO_SHIFT 16 80a45c6cb8SMadhusudhan Chikkature #define INT_EN_MASK 0x307F0033 81ccdfe3a6SAnand Gadiyar #define BWR_ENABLE (1 << 4) 82ccdfe3a6SAnand Gadiyar #define BRR_ENABLE (1 << 5) 8393caf8e6SAdrian Hunter #define DTO_ENABLE (1 << 20) 84a45c6cb8SMadhusudhan Chikkature #define INIT_STREAM (1 << 1) 85a45c6cb8SMadhusudhan Chikkature #define DP_SELECT (1 << 21) 86a45c6cb8SMadhusudhan Chikkature #define DDIR (1 << 4) 87a45c6cb8SMadhusudhan Chikkature #define DMA_EN 0x1 88a45c6cb8SMadhusudhan Chikkature #define MSBS (1 << 5) 89a45c6cb8SMadhusudhan Chikkature #define BCE (1 << 1) 90a45c6cb8SMadhusudhan Chikkature #define FOUR_BIT (1 << 1) 9173153010SJarkko Lavinen #define DW8 (1 << 5) 92a45c6cb8SMadhusudhan Chikkature #define CC 0x1 93a45c6cb8SMadhusudhan Chikkature #define TC 0x02 94a45c6cb8SMadhusudhan Chikkature #define OD 0x1 95a45c6cb8SMadhusudhan Chikkature #define ERR (1 << 15) 96a45c6cb8SMadhusudhan Chikkature #define CMD_TIMEOUT (1 << 16) 97a45c6cb8SMadhusudhan Chikkature #define DATA_TIMEOUT (1 << 20) 98a45c6cb8SMadhusudhan Chikkature #define CMD_CRC (1 << 17) 99a45c6cb8SMadhusudhan Chikkature #define DATA_CRC (1 << 21) 100a45c6cb8SMadhusudhan Chikkature #define CARD_ERR (1 << 28) 101a45c6cb8SMadhusudhan Chikkature #define STAT_CLEAR 0xFFFFFFFF 102a45c6cb8SMadhusudhan Chikkature #define INIT_STREAM_CMD 0x00000000 103a45c6cb8SMadhusudhan Chikkature #define DUAL_VOLT_OCR_BIT 7 104a45c6cb8SMadhusudhan Chikkature #define SRC (1 << 25) 105a45c6cb8SMadhusudhan Chikkature #define SRD (1 << 26) 10611dd62a7SDenis Karpov #define SOFTRESET (1 << 1) 10711dd62a7SDenis Karpov #define RESETDONE (1 << 0) 108a45c6cb8SMadhusudhan Chikkature 109fa4aa2d4SBalaji T K #define MMC_AUTOSUSPEND_DELAY 100 110a45c6cb8SMadhusudhan Chikkature #define MMC_TIMEOUT_MS 20 1116b206efeSAndy Shevchenko #define OMAP_MMC_MIN_CLOCK 400000 1126b206efeSAndy Shevchenko #define OMAP_MMC_MAX_CLOCK 52000000 1130005ae73SKishore Kadiyala #define DRIVER_NAME "omap_hsmmc" 114a45c6cb8SMadhusudhan Chikkature 115a45c6cb8SMadhusudhan Chikkature /* 116a45c6cb8SMadhusudhan Chikkature * One controller can have multiple slots, like on some omap boards using 117a45c6cb8SMadhusudhan Chikkature * omap.c controller driver. Luckily this is not currently done on any known 118a45c6cb8SMadhusudhan Chikkature * omap_hsmmc.c device. 119a45c6cb8SMadhusudhan Chikkature */ 120a45c6cb8SMadhusudhan Chikkature #define mmc_slot(host) (host->pdata->slots[host->slot_id]) 121a45c6cb8SMadhusudhan Chikkature 122a45c6cb8SMadhusudhan Chikkature /* 123a45c6cb8SMadhusudhan Chikkature * MMC Host controller read/write API's 124a45c6cb8SMadhusudhan Chikkature */ 125a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_READ(base, reg) \ 126a45c6cb8SMadhusudhan Chikkature __raw_readl((base) + OMAP_HSMMC_##reg) 127a45c6cb8SMadhusudhan Chikkature 128a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_WRITE(base, reg, val) \ 129a45c6cb8SMadhusudhan Chikkature __raw_writel((val), (base) + OMAP_HSMMC_##reg) 130a45c6cb8SMadhusudhan Chikkature 1319782aff8SPer Forlin struct omap_hsmmc_next { 1329782aff8SPer Forlin unsigned int dma_len; 1339782aff8SPer Forlin s32 cookie; 1349782aff8SPer Forlin }; 1359782aff8SPer Forlin 13670a3341aSDenis Karpov struct omap_hsmmc_host { 137a45c6cb8SMadhusudhan Chikkature struct device *dev; 138a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc; 139a45c6cb8SMadhusudhan Chikkature struct mmc_request *mrq; 140a45c6cb8SMadhusudhan Chikkature struct mmc_command *cmd; 141a45c6cb8SMadhusudhan Chikkature struct mmc_data *data; 142a45c6cb8SMadhusudhan Chikkature struct clk *fclk; 143a45c6cb8SMadhusudhan Chikkature struct clk *dbclk; 144db0fefc5SAdrian Hunter /* 145db0fefc5SAdrian Hunter * vcc == configured supply 146db0fefc5SAdrian Hunter * vcc_aux == optional 147db0fefc5SAdrian Hunter * - MMC1, supply for DAT4..DAT7 148db0fefc5SAdrian Hunter * - MMC2/MMC2, external level shifter voltage supply, for 149db0fefc5SAdrian Hunter * chip (SDIO, eMMC, etc) or transceiver (MMC2 only) 150db0fefc5SAdrian Hunter */ 151db0fefc5SAdrian Hunter struct regulator *vcc; 152db0fefc5SAdrian Hunter struct regulator *vcc_aux; 153a45c6cb8SMadhusudhan Chikkature void __iomem *base; 154a45c6cb8SMadhusudhan Chikkature resource_size_t mapbase; 1554dffd7a2SAdrian Hunter spinlock_t irq_lock; /* Prevent races with irq handler */ 156a45c6cb8SMadhusudhan Chikkature unsigned int dma_len; 1570ccd76d4SJuha Yrjola unsigned int dma_sg_idx; 158a45c6cb8SMadhusudhan Chikkature unsigned char bus_mode; 159a3621465SAdrian Hunter unsigned char power_mode; 160a45c6cb8SMadhusudhan Chikkature u32 *buffer; 161a45c6cb8SMadhusudhan Chikkature u32 bytesleft; 162a45c6cb8SMadhusudhan Chikkature int suspended; 163a45c6cb8SMadhusudhan Chikkature int irq; 164a45c6cb8SMadhusudhan Chikkature int use_dma, dma_ch; 165f3e2f1ddSGrazvydas Ignotas int dma_line_tx, dma_line_rx; 166a45c6cb8SMadhusudhan Chikkature int slot_id; 1672bec0893SAdrian Hunter int got_dbclk; 1684a694dc9SAdrian Hunter int response_busy; 16911dd62a7SDenis Karpov int context_loss; 170623821f7SAdrian Hunter int vdd; 171b62f6228SAdrian Hunter int protect_card; 172b62f6228SAdrian Hunter int reqs_blocked; 173db0fefc5SAdrian Hunter int use_reg; 174b417577dSAdrian Hunter int req_in_progress; 1759782aff8SPer Forlin struct omap_hsmmc_next next_data; 17611dd62a7SDenis Karpov 177a45c6cb8SMadhusudhan Chikkature struct omap_mmc_platform_data *pdata; 178a45c6cb8SMadhusudhan Chikkature }; 179a45c6cb8SMadhusudhan Chikkature 180db0fefc5SAdrian Hunter static int omap_hsmmc_card_detect(struct device *dev, int slot) 181db0fefc5SAdrian Hunter { 182db0fefc5SAdrian Hunter struct omap_mmc_platform_data *mmc = dev->platform_data; 183db0fefc5SAdrian Hunter 184db0fefc5SAdrian Hunter /* NOTE: assumes card detect signal is active-low */ 185db0fefc5SAdrian Hunter return !gpio_get_value_cansleep(mmc->slots[0].switch_pin); 186db0fefc5SAdrian Hunter } 187db0fefc5SAdrian Hunter 188db0fefc5SAdrian Hunter static int omap_hsmmc_get_wp(struct device *dev, int slot) 189db0fefc5SAdrian Hunter { 190db0fefc5SAdrian Hunter struct omap_mmc_platform_data *mmc = dev->platform_data; 191db0fefc5SAdrian Hunter 192db0fefc5SAdrian Hunter /* NOTE: assumes write protect signal is active-high */ 193db0fefc5SAdrian Hunter return gpio_get_value_cansleep(mmc->slots[0].gpio_wp); 194db0fefc5SAdrian Hunter } 195db0fefc5SAdrian Hunter 196db0fefc5SAdrian Hunter static int omap_hsmmc_get_cover_state(struct device *dev, int slot) 197db0fefc5SAdrian Hunter { 198db0fefc5SAdrian Hunter struct omap_mmc_platform_data *mmc = dev->platform_data; 199db0fefc5SAdrian Hunter 200db0fefc5SAdrian Hunter /* NOTE: assumes card detect signal is active-low */ 201db0fefc5SAdrian Hunter return !gpio_get_value_cansleep(mmc->slots[0].switch_pin); 202db0fefc5SAdrian Hunter } 203db0fefc5SAdrian Hunter 204db0fefc5SAdrian Hunter #ifdef CONFIG_PM 205db0fefc5SAdrian Hunter 206db0fefc5SAdrian Hunter static int omap_hsmmc_suspend_cdirq(struct device *dev, int slot) 207db0fefc5SAdrian Hunter { 208db0fefc5SAdrian Hunter struct omap_mmc_platform_data *mmc = dev->platform_data; 209db0fefc5SAdrian Hunter 210db0fefc5SAdrian Hunter disable_irq(mmc->slots[0].card_detect_irq); 211db0fefc5SAdrian Hunter return 0; 212db0fefc5SAdrian Hunter } 213db0fefc5SAdrian Hunter 214db0fefc5SAdrian Hunter static int omap_hsmmc_resume_cdirq(struct device *dev, int slot) 215db0fefc5SAdrian Hunter { 216db0fefc5SAdrian Hunter struct omap_mmc_platform_data *mmc = dev->platform_data; 217db0fefc5SAdrian Hunter 218db0fefc5SAdrian Hunter enable_irq(mmc->slots[0].card_detect_irq); 219db0fefc5SAdrian Hunter return 0; 220db0fefc5SAdrian Hunter } 221db0fefc5SAdrian Hunter 222db0fefc5SAdrian Hunter #else 223db0fefc5SAdrian Hunter 224db0fefc5SAdrian Hunter #define omap_hsmmc_suspend_cdirq NULL 225db0fefc5SAdrian Hunter #define omap_hsmmc_resume_cdirq NULL 226db0fefc5SAdrian Hunter 227db0fefc5SAdrian Hunter #endif 228db0fefc5SAdrian Hunter 229b702b106SAdrian Hunter #ifdef CONFIG_REGULATOR 230b702b106SAdrian Hunter 23169b07eceSRajendra Nayak static int omap_hsmmc_set_power(struct device *dev, int slot, int power_on, 232db0fefc5SAdrian Hunter int vdd) 233db0fefc5SAdrian Hunter { 234db0fefc5SAdrian Hunter struct omap_hsmmc_host *host = 235db0fefc5SAdrian Hunter platform_get_drvdata(to_platform_device(dev)); 236db0fefc5SAdrian Hunter int ret = 0; 237db0fefc5SAdrian Hunter 238db0fefc5SAdrian Hunter /* 239db0fefc5SAdrian Hunter * If we don't see a Vcc regulator, assume it's a fixed 240db0fefc5SAdrian Hunter * voltage always-on regulator. 241db0fefc5SAdrian Hunter */ 242db0fefc5SAdrian Hunter if (!host->vcc) 243db0fefc5SAdrian Hunter return 0; 244db0fefc5SAdrian Hunter 245db0fefc5SAdrian Hunter if (mmc_slot(host).before_set_reg) 246db0fefc5SAdrian Hunter mmc_slot(host).before_set_reg(dev, slot, power_on, vdd); 247db0fefc5SAdrian Hunter 248db0fefc5SAdrian Hunter /* 249db0fefc5SAdrian Hunter * Assume Vcc regulator is used only to power the card ... OMAP 250db0fefc5SAdrian Hunter * VDDS is used to power the pins, optionally with a transceiver to 251db0fefc5SAdrian Hunter * support cards using voltages other than VDDS (1.8V nominal). When a 252db0fefc5SAdrian Hunter * transceiver is used, DAT3..7 are muxed as transceiver control pins. 253db0fefc5SAdrian Hunter * 254db0fefc5SAdrian Hunter * In some cases this regulator won't support enable/disable; 255db0fefc5SAdrian Hunter * e.g. it's a fixed rail for a WLAN chip. 256db0fefc5SAdrian Hunter * 257db0fefc5SAdrian Hunter * In other cases vcc_aux switches interface power. Example, for 258db0fefc5SAdrian Hunter * eMMC cards it represents VccQ. Sometimes transceivers or SDIO 259db0fefc5SAdrian Hunter * chips/cards need an interface voltage rail too. 260db0fefc5SAdrian Hunter */ 261db0fefc5SAdrian Hunter if (power_on) { 26299fc5131SLinus Walleij ret = mmc_regulator_set_ocr(host->mmc, host->vcc, vdd); 263db0fefc5SAdrian Hunter /* Enable interface voltage rail, if needed */ 264db0fefc5SAdrian Hunter if (ret == 0 && host->vcc_aux) { 265db0fefc5SAdrian Hunter ret = regulator_enable(host->vcc_aux); 266db0fefc5SAdrian Hunter if (ret < 0) 26799fc5131SLinus Walleij ret = mmc_regulator_set_ocr(host->mmc, 26899fc5131SLinus Walleij host->vcc, 0); 269db0fefc5SAdrian Hunter } 270db0fefc5SAdrian Hunter } else { 27199fc5131SLinus Walleij /* Shut down the rail */ 2726da20c89SAdrian Hunter if (host->vcc_aux) 273db0fefc5SAdrian Hunter ret = regulator_disable(host->vcc_aux); 27499fc5131SLinus Walleij if (!ret) { 27599fc5131SLinus Walleij /* Then proceed to shut down the local regulator */ 27699fc5131SLinus Walleij ret = mmc_regulator_set_ocr(host->mmc, 27799fc5131SLinus Walleij host->vcc, 0); 27899fc5131SLinus Walleij } 279db0fefc5SAdrian Hunter } 280db0fefc5SAdrian Hunter 281db0fefc5SAdrian Hunter if (mmc_slot(host).after_set_reg) 282db0fefc5SAdrian Hunter mmc_slot(host).after_set_reg(dev, slot, power_on, vdd); 283db0fefc5SAdrian Hunter 284db0fefc5SAdrian Hunter return ret; 285db0fefc5SAdrian Hunter } 286db0fefc5SAdrian Hunter 287db0fefc5SAdrian Hunter static int omap_hsmmc_reg_get(struct omap_hsmmc_host *host) 288db0fefc5SAdrian Hunter { 289db0fefc5SAdrian Hunter struct regulator *reg; 29064be9782Skishore kadiyala int ocr_value = 0; 291db0fefc5SAdrian Hunter 29269b07eceSRajendra Nayak mmc_slot(host).set_power = omap_hsmmc_set_power; 293db0fefc5SAdrian Hunter 294db0fefc5SAdrian Hunter reg = regulator_get(host->dev, "vmmc"); 295db0fefc5SAdrian Hunter if (IS_ERR(reg)) { 296db0fefc5SAdrian Hunter dev_dbg(host->dev, "vmmc regulator missing\n"); 297db0fefc5SAdrian Hunter } else { 298db0fefc5SAdrian Hunter host->vcc = reg; 29964be9782Skishore kadiyala ocr_value = mmc_regulator_get_ocrmask(reg); 30064be9782Skishore kadiyala if (!mmc_slot(host).ocr_mask) { 30164be9782Skishore kadiyala mmc_slot(host).ocr_mask = ocr_value; 30264be9782Skishore kadiyala } else { 30364be9782Skishore kadiyala if (!(mmc_slot(host).ocr_mask & ocr_value)) { 3042cecdf00SRajendra Nayak dev_err(host->dev, "ocrmask %x is not supported\n", 305e3f1adb6SRajendra Nayak mmc_slot(host).ocr_mask); 30664be9782Skishore kadiyala mmc_slot(host).ocr_mask = 0; 30764be9782Skishore kadiyala return -EINVAL; 30864be9782Skishore kadiyala } 30964be9782Skishore kadiyala } 310db0fefc5SAdrian Hunter 311db0fefc5SAdrian Hunter /* Allow an aux regulator */ 312db0fefc5SAdrian Hunter reg = regulator_get(host->dev, "vmmc_aux"); 313db0fefc5SAdrian Hunter host->vcc_aux = IS_ERR(reg) ? NULL : reg; 314db0fefc5SAdrian Hunter 315b1c1df7aSBalaji T K /* For eMMC do not power off when not in sleep state */ 316b1c1df7aSBalaji T K if (mmc_slot(host).no_regulator_off_init) 317b1c1df7aSBalaji T K return 0; 318db0fefc5SAdrian Hunter /* 319db0fefc5SAdrian Hunter * UGLY HACK: workaround regulator framework bugs. 320db0fefc5SAdrian Hunter * When the bootloader leaves a supply active, it's 321db0fefc5SAdrian Hunter * initialized with zero usecount ... and we can't 322db0fefc5SAdrian Hunter * disable it without first enabling it. Until the 323db0fefc5SAdrian Hunter * framework is fixed, we need a workaround like this 324db0fefc5SAdrian Hunter * (which is safe for MMC, but not in general). 325db0fefc5SAdrian Hunter */ 326e840ce13SAdrian Hunter if (regulator_is_enabled(host->vcc) > 0 || 327e840ce13SAdrian Hunter (host->vcc_aux && regulator_is_enabled(host->vcc_aux))) { 328e840ce13SAdrian Hunter int vdd = ffs(mmc_slot(host).ocr_mask) - 1; 329e840ce13SAdrian Hunter 330e840ce13SAdrian Hunter mmc_slot(host).set_power(host->dev, host->slot_id, 331e840ce13SAdrian Hunter 1, vdd); 332e840ce13SAdrian Hunter mmc_slot(host).set_power(host->dev, host->slot_id, 333e840ce13SAdrian Hunter 0, 0); 334db0fefc5SAdrian Hunter } 335db0fefc5SAdrian Hunter } 336db0fefc5SAdrian Hunter 337db0fefc5SAdrian Hunter return 0; 338db0fefc5SAdrian Hunter } 339db0fefc5SAdrian Hunter 340db0fefc5SAdrian Hunter static void omap_hsmmc_reg_put(struct omap_hsmmc_host *host) 341db0fefc5SAdrian Hunter { 342db0fefc5SAdrian Hunter regulator_put(host->vcc); 343db0fefc5SAdrian Hunter regulator_put(host->vcc_aux); 344db0fefc5SAdrian Hunter mmc_slot(host).set_power = NULL; 345db0fefc5SAdrian Hunter } 346db0fefc5SAdrian Hunter 347b702b106SAdrian Hunter static inline int omap_hsmmc_have_reg(void) 348b702b106SAdrian Hunter { 349b702b106SAdrian Hunter return 1; 350b702b106SAdrian Hunter } 351b702b106SAdrian Hunter 352b702b106SAdrian Hunter #else 353b702b106SAdrian Hunter 354b702b106SAdrian Hunter static inline int omap_hsmmc_reg_get(struct omap_hsmmc_host *host) 355b702b106SAdrian Hunter { 356b702b106SAdrian Hunter return -EINVAL; 357b702b106SAdrian Hunter } 358b702b106SAdrian Hunter 359b702b106SAdrian Hunter static inline void omap_hsmmc_reg_put(struct omap_hsmmc_host *host) 360b702b106SAdrian Hunter { 361b702b106SAdrian Hunter } 362b702b106SAdrian Hunter 363b702b106SAdrian Hunter static inline int omap_hsmmc_have_reg(void) 364b702b106SAdrian Hunter { 365b702b106SAdrian Hunter return 0; 366b702b106SAdrian Hunter } 367b702b106SAdrian Hunter 368b702b106SAdrian Hunter #endif 369b702b106SAdrian Hunter 370b702b106SAdrian Hunter static int omap_hsmmc_gpio_init(struct omap_mmc_platform_data *pdata) 371b702b106SAdrian Hunter { 372b702b106SAdrian Hunter int ret; 373b702b106SAdrian Hunter 374b702b106SAdrian Hunter if (gpio_is_valid(pdata->slots[0].switch_pin)) { 375b702b106SAdrian Hunter if (pdata->slots[0].cover) 376b702b106SAdrian Hunter pdata->slots[0].get_cover_state = 377b702b106SAdrian Hunter omap_hsmmc_get_cover_state; 378b702b106SAdrian Hunter else 379b702b106SAdrian Hunter pdata->slots[0].card_detect = omap_hsmmc_card_detect; 380b702b106SAdrian Hunter pdata->slots[0].card_detect_irq = 381b702b106SAdrian Hunter gpio_to_irq(pdata->slots[0].switch_pin); 382b702b106SAdrian Hunter ret = gpio_request(pdata->slots[0].switch_pin, "mmc_cd"); 383b702b106SAdrian Hunter if (ret) 384b702b106SAdrian Hunter return ret; 385b702b106SAdrian Hunter ret = gpio_direction_input(pdata->slots[0].switch_pin); 386b702b106SAdrian Hunter if (ret) 387b702b106SAdrian Hunter goto err_free_sp; 388b702b106SAdrian Hunter } else 389b702b106SAdrian Hunter pdata->slots[0].switch_pin = -EINVAL; 390b702b106SAdrian Hunter 391b702b106SAdrian Hunter if (gpio_is_valid(pdata->slots[0].gpio_wp)) { 392b702b106SAdrian Hunter pdata->slots[0].get_ro = omap_hsmmc_get_wp; 393b702b106SAdrian Hunter ret = gpio_request(pdata->slots[0].gpio_wp, "mmc_wp"); 394b702b106SAdrian Hunter if (ret) 395b702b106SAdrian Hunter goto err_free_cd; 396b702b106SAdrian Hunter ret = gpio_direction_input(pdata->slots[0].gpio_wp); 397b702b106SAdrian Hunter if (ret) 398b702b106SAdrian Hunter goto err_free_wp; 399b702b106SAdrian Hunter } else 400b702b106SAdrian Hunter pdata->slots[0].gpio_wp = -EINVAL; 401b702b106SAdrian Hunter 402b702b106SAdrian Hunter return 0; 403b702b106SAdrian Hunter 404b702b106SAdrian Hunter err_free_wp: 405b702b106SAdrian Hunter gpio_free(pdata->slots[0].gpio_wp); 406b702b106SAdrian Hunter err_free_cd: 407b702b106SAdrian Hunter if (gpio_is_valid(pdata->slots[0].switch_pin)) 408b702b106SAdrian Hunter err_free_sp: 409b702b106SAdrian Hunter gpio_free(pdata->slots[0].switch_pin); 410b702b106SAdrian Hunter return ret; 411b702b106SAdrian Hunter } 412b702b106SAdrian Hunter 413b702b106SAdrian Hunter static void omap_hsmmc_gpio_free(struct omap_mmc_platform_data *pdata) 414b702b106SAdrian Hunter { 415b702b106SAdrian Hunter if (gpio_is_valid(pdata->slots[0].gpio_wp)) 416b702b106SAdrian Hunter gpio_free(pdata->slots[0].gpio_wp); 417b702b106SAdrian Hunter if (gpio_is_valid(pdata->slots[0].switch_pin)) 418b702b106SAdrian Hunter gpio_free(pdata->slots[0].switch_pin); 419b702b106SAdrian Hunter } 420b702b106SAdrian Hunter 421a45c6cb8SMadhusudhan Chikkature /* 422e0c7f99bSAndy Shevchenko * Start clock to the card 423e0c7f99bSAndy Shevchenko */ 424e0c7f99bSAndy Shevchenko static void omap_hsmmc_start_clock(struct omap_hsmmc_host *host) 425e0c7f99bSAndy Shevchenko { 426e0c7f99bSAndy Shevchenko OMAP_HSMMC_WRITE(host->base, SYSCTL, 427e0c7f99bSAndy Shevchenko OMAP_HSMMC_READ(host->base, SYSCTL) | CEN); 428e0c7f99bSAndy Shevchenko } 429e0c7f99bSAndy Shevchenko 430e0c7f99bSAndy Shevchenko /* 431a45c6cb8SMadhusudhan Chikkature * Stop clock to the card 432a45c6cb8SMadhusudhan Chikkature */ 43370a3341aSDenis Karpov static void omap_hsmmc_stop_clock(struct omap_hsmmc_host *host) 434a45c6cb8SMadhusudhan Chikkature { 435a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, 436a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, SYSCTL) & ~CEN); 437a45c6cb8SMadhusudhan Chikkature if ((OMAP_HSMMC_READ(host->base, SYSCTL) & CEN) != 0x0) 438a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "MMC Clock is not stoped\n"); 439a45c6cb8SMadhusudhan Chikkature } 440a45c6cb8SMadhusudhan Chikkature 44193caf8e6SAdrian Hunter static void omap_hsmmc_enable_irq(struct omap_hsmmc_host *host, 44293caf8e6SAdrian Hunter struct mmc_command *cmd) 443b417577dSAdrian Hunter { 444b417577dSAdrian Hunter unsigned int irq_mask; 445b417577dSAdrian Hunter 446b417577dSAdrian Hunter if (host->use_dma) 447b417577dSAdrian Hunter irq_mask = INT_EN_MASK & ~(BRR_ENABLE | BWR_ENABLE); 448b417577dSAdrian Hunter else 449b417577dSAdrian Hunter irq_mask = INT_EN_MASK; 450b417577dSAdrian Hunter 45193caf8e6SAdrian Hunter /* Disable timeout for erases */ 45293caf8e6SAdrian Hunter if (cmd->opcode == MMC_ERASE) 45393caf8e6SAdrian Hunter irq_mask &= ~DTO_ENABLE; 45493caf8e6SAdrian Hunter 455b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); 456b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, ISE, irq_mask); 457b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, IE, irq_mask); 458b417577dSAdrian Hunter } 459b417577dSAdrian Hunter 460b417577dSAdrian Hunter static void omap_hsmmc_disable_irq(struct omap_hsmmc_host *host) 461b417577dSAdrian Hunter { 462b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, ISE, 0); 463b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, IE, 0); 464b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); 465b417577dSAdrian Hunter } 466b417577dSAdrian Hunter 467ac330f44SAndy Shevchenko /* Calculate divisor for the given clock frequency */ 468d83b6e03SBalaji TK static u16 calc_divisor(struct omap_hsmmc_host *host, struct mmc_ios *ios) 469ac330f44SAndy Shevchenko { 470ac330f44SAndy Shevchenko u16 dsor = 0; 471ac330f44SAndy Shevchenko 472ac330f44SAndy Shevchenko if (ios->clock) { 473d83b6e03SBalaji TK dsor = DIV_ROUND_UP(clk_get_rate(host->fclk), ios->clock); 474ac330f44SAndy Shevchenko if (dsor > 250) 475ac330f44SAndy Shevchenko dsor = 250; 476ac330f44SAndy Shevchenko } 477ac330f44SAndy Shevchenko 478ac330f44SAndy Shevchenko return dsor; 479ac330f44SAndy Shevchenko } 480ac330f44SAndy Shevchenko 4815934df2fSAndy Shevchenko static void omap_hsmmc_set_clock(struct omap_hsmmc_host *host) 4825934df2fSAndy Shevchenko { 4835934df2fSAndy Shevchenko struct mmc_ios *ios = &host->mmc->ios; 4845934df2fSAndy Shevchenko unsigned long regval; 4855934df2fSAndy Shevchenko unsigned long timeout; 4865934df2fSAndy Shevchenko 4875934df2fSAndy Shevchenko dev_dbg(mmc_dev(host->mmc), "Set clock to %uHz\n", ios->clock); 4885934df2fSAndy Shevchenko 4895934df2fSAndy Shevchenko omap_hsmmc_stop_clock(host); 4905934df2fSAndy Shevchenko 4915934df2fSAndy Shevchenko regval = OMAP_HSMMC_READ(host->base, SYSCTL); 4925934df2fSAndy Shevchenko regval = regval & ~(CLKD_MASK | DTO_MASK); 493d83b6e03SBalaji TK regval = regval | (calc_divisor(host, ios) << 6) | (DTO << 16); 4945934df2fSAndy Shevchenko OMAP_HSMMC_WRITE(host->base, SYSCTL, regval); 4955934df2fSAndy Shevchenko OMAP_HSMMC_WRITE(host->base, SYSCTL, 4965934df2fSAndy Shevchenko OMAP_HSMMC_READ(host->base, SYSCTL) | ICE); 4975934df2fSAndy Shevchenko 4985934df2fSAndy Shevchenko /* Wait till the ICS bit is set */ 4995934df2fSAndy Shevchenko timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 5005934df2fSAndy Shevchenko while ((OMAP_HSMMC_READ(host->base, SYSCTL) & ICS) != ICS 5015934df2fSAndy Shevchenko && time_before(jiffies, timeout)) 5025934df2fSAndy Shevchenko cpu_relax(); 5035934df2fSAndy Shevchenko 5045934df2fSAndy Shevchenko omap_hsmmc_start_clock(host); 5055934df2fSAndy Shevchenko } 5065934df2fSAndy Shevchenko 5073796fb8aSAndy Shevchenko static void omap_hsmmc_set_bus_width(struct omap_hsmmc_host *host) 5083796fb8aSAndy Shevchenko { 5093796fb8aSAndy Shevchenko struct mmc_ios *ios = &host->mmc->ios; 5103796fb8aSAndy Shevchenko u32 con; 5113796fb8aSAndy Shevchenko 5123796fb8aSAndy Shevchenko con = OMAP_HSMMC_READ(host->base, CON); 5133796fb8aSAndy Shevchenko switch (ios->bus_width) { 5143796fb8aSAndy Shevchenko case MMC_BUS_WIDTH_8: 5153796fb8aSAndy Shevchenko OMAP_HSMMC_WRITE(host->base, CON, con | DW8); 5163796fb8aSAndy Shevchenko break; 5173796fb8aSAndy Shevchenko case MMC_BUS_WIDTH_4: 5183796fb8aSAndy Shevchenko OMAP_HSMMC_WRITE(host->base, CON, con & ~DW8); 5193796fb8aSAndy Shevchenko OMAP_HSMMC_WRITE(host->base, HCTL, 5203796fb8aSAndy Shevchenko OMAP_HSMMC_READ(host->base, HCTL) | FOUR_BIT); 5213796fb8aSAndy Shevchenko break; 5223796fb8aSAndy Shevchenko case MMC_BUS_WIDTH_1: 5233796fb8aSAndy Shevchenko OMAP_HSMMC_WRITE(host->base, CON, con & ~DW8); 5243796fb8aSAndy Shevchenko OMAP_HSMMC_WRITE(host->base, HCTL, 5253796fb8aSAndy Shevchenko OMAP_HSMMC_READ(host->base, HCTL) & ~FOUR_BIT); 5263796fb8aSAndy Shevchenko break; 5273796fb8aSAndy Shevchenko } 5283796fb8aSAndy Shevchenko } 5293796fb8aSAndy Shevchenko 5303796fb8aSAndy Shevchenko static void omap_hsmmc_set_bus_mode(struct omap_hsmmc_host *host) 5313796fb8aSAndy Shevchenko { 5323796fb8aSAndy Shevchenko struct mmc_ios *ios = &host->mmc->ios; 5333796fb8aSAndy Shevchenko u32 con; 5343796fb8aSAndy Shevchenko 5353796fb8aSAndy Shevchenko con = OMAP_HSMMC_READ(host->base, CON); 5363796fb8aSAndy Shevchenko if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN) 5373796fb8aSAndy Shevchenko OMAP_HSMMC_WRITE(host->base, CON, con | OD); 5383796fb8aSAndy Shevchenko else 5393796fb8aSAndy Shevchenko OMAP_HSMMC_WRITE(host->base, CON, con & ~OD); 5403796fb8aSAndy Shevchenko } 5413796fb8aSAndy Shevchenko 54211dd62a7SDenis Karpov #ifdef CONFIG_PM 54311dd62a7SDenis Karpov 54411dd62a7SDenis Karpov /* 54511dd62a7SDenis Karpov * Restore the MMC host context, if it was lost as result of a 54611dd62a7SDenis Karpov * power state change. 54711dd62a7SDenis Karpov */ 54870a3341aSDenis Karpov static int omap_hsmmc_context_restore(struct omap_hsmmc_host *host) 54911dd62a7SDenis Karpov { 55011dd62a7SDenis Karpov struct mmc_ios *ios = &host->mmc->ios; 55111dd62a7SDenis Karpov struct omap_mmc_platform_data *pdata = host->pdata; 55211dd62a7SDenis Karpov int context_loss = 0; 5533796fb8aSAndy Shevchenko u32 hctl, capa; 55411dd62a7SDenis Karpov unsigned long timeout; 55511dd62a7SDenis Karpov 55611dd62a7SDenis Karpov if (pdata->get_context_loss_count) { 55711dd62a7SDenis Karpov context_loss = pdata->get_context_loss_count(host->dev); 55811dd62a7SDenis Karpov if (context_loss < 0) 55911dd62a7SDenis Karpov return 1; 56011dd62a7SDenis Karpov } 56111dd62a7SDenis Karpov 56211dd62a7SDenis Karpov dev_dbg(mmc_dev(host->mmc), "context was %slost\n", 56311dd62a7SDenis Karpov context_loss == host->context_loss ? "not " : ""); 56411dd62a7SDenis Karpov if (host->context_loss == context_loss) 56511dd62a7SDenis Karpov return 1; 56611dd62a7SDenis Karpov 56711dd62a7SDenis Karpov /* Wait for hardware reset */ 56811dd62a7SDenis Karpov timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 56911dd62a7SDenis Karpov while ((OMAP_HSMMC_READ(host->base, SYSSTATUS) & RESETDONE) != RESETDONE 57011dd62a7SDenis Karpov && time_before(jiffies, timeout)) 57111dd62a7SDenis Karpov ; 57211dd62a7SDenis Karpov 57311dd62a7SDenis Karpov /* Do software reset */ 57411dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, SYSCONFIG, SOFTRESET); 57511dd62a7SDenis Karpov timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 57611dd62a7SDenis Karpov while ((OMAP_HSMMC_READ(host->base, SYSSTATUS) & RESETDONE) != RESETDONE 57711dd62a7SDenis Karpov && time_before(jiffies, timeout)) 57811dd62a7SDenis Karpov ; 57911dd62a7SDenis Karpov 58011dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, SYSCONFIG, 58111dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCONFIG) | AUTOIDLE); 58211dd62a7SDenis Karpov 583c2200efbSBalaji T K if (host->pdata->controller_flags & OMAP_HSMMC_SUPPORTS_DUAL_VOLT) { 58411dd62a7SDenis Karpov if (host->power_mode != MMC_POWER_OFF && 58511dd62a7SDenis Karpov (1 << ios->vdd) <= MMC_VDD_23_24) 58611dd62a7SDenis Karpov hctl = SDVS18; 58711dd62a7SDenis Karpov else 58811dd62a7SDenis Karpov hctl = SDVS30; 58911dd62a7SDenis Karpov capa = VS30 | VS18; 59011dd62a7SDenis Karpov } else { 59111dd62a7SDenis Karpov hctl = SDVS18; 59211dd62a7SDenis Karpov capa = VS18; 59311dd62a7SDenis Karpov } 59411dd62a7SDenis Karpov 59511dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, HCTL, 59611dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, HCTL) | hctl); 59711dd62a7SDenis Karpov 59811dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, CAPA, 59911dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, CAPA) | capa); 60011dd62a7SDenis Karpov 60111dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, HCTL, 60211dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, HCTL) | SDBP); 60311dd62a7SDenis Karpov 60411dd62a7SDenis Karpov timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 60511dd62a7SDenis Karpov while ((OMAP_HSMMC_READ(host->base, HCTL) & SDBP) != SDBP 60611dd62a7SDenis Karpov && time_before(jiffies, timeout)) 60711dd62a7SDenis Karpov ; 60811dd62a7SDenis Karpov 609b417577dSAdrian Hunter omap_hsmmc_disable_irq(host); 61011dd62a7SDenis Karpov 61111dd62a7SDenis Karpov /* Do not initialize card-specific things if the power is off */ 61211dd62a7SDenis Karpov if (host->power_mode == MMC_POWER_OFF) 61311dd62a7SDenis Karpov goto out; 61411dd62a7SDenis Karpov 6153796fb8aSAndy Shevchenko omap_hsmmc_set_bus_width(host); 61611dd62a7SDenis Karpov 6175934df2fSAndy Shevchenko omap_hsmmc_set_clock(host); 61811dd62a7SDenis Karpov 6193796fb8aSAndy Shevchenko omap_hsmmc_set_bus_mode(host); 6203796fb8aSAndy Shevchenko 62111dd62a7SDenis Karpov out: 62211dd62a7SDenis Karpov host->context_loss = context_loss; 62311dd62a7SDenis Karpov 62411dd62a7SDenis Karpov dev_dbg(mmc_dev(host->mmc), "context is restored\n"); 62511dd62a7SDenis Karpov return 0; 62611dd62a7SDenis Karpov } 62711dd62a7SDenis Karpov 62811dd62a7SDenis Karpov /* 62911dd62a7SDenis Karpov * Save the MMC host context (store the number of power state changes so far). 63011dd62a7SDenis Karpov */ 63170a3341aSDenis Karpov static void omap_hsmmc_context_save(struct omap_hsmmc_host *host) 63211dd62a7SDenis Karpov { 63311dd62a7SDenis Karpov struct omap_mmc_platform_data *pdata = host->pdata; 63411dd62a7SDenis Karpov int context_loss; 63511dd62a7SDenis Karpov 63611dd62a7SDenis Karpov if (pdata->get_context_loss_count) { 63711dd62a7SDenis Karpov context_loss = pdata->get_context_loss_count(host->dev); 63811dd62a7SDenis Karpov if (context_loss < 0) 63911dd62a7SDenis Karpov return; 64011dd62a7SDenis Karpov host->context_loss = context_loss; 64111dd62a7SDenis Karpov } 64211dd62a7SDenis Karpov } 64311dd62a7SDenis Karpov 64411dd62a7SDenis Karpov #else 64511dd62a7SDenis Karpov 64670a3341aSDenis Karpov static int omap_hsmmc_context_restore(struct omap_hsmmc_host *host) 64711dd62a7SDenis Karpov { 64811dd62a7SDenis Karpov return 0; 64911dd62a7SDenis Karpov } 65011dd62a7SDenis Karpov 65170a3341aSDenis Karpov static void omap_hsmmc_context_save(struct omap_hsmmc_host *host) 65211dd62a7SDenis Karpov { 65311dd62a7SDenis Karpov } 65411dd62a7SDenis Karpov 65511dd62a7SDenis Karpov #endif 65611dd62a7SDenis Karpov 657a45c6cb8SMadhusudhan Chikkature /* 658a45c6cb8SMadhusudhan Chikkature * Send init stream sequence to card 659a45c6cb8SMadhusudhan Chikkature * before sending IDLE command 660a45c6cb8SMadhusudhan Chikkature */ 66170a3341aSDenis Karpov static void send_init_stream(struct omap_hsmmc_host *host) 662a45c6cb8SMadhusudhan Chikkature { 663a45c6cb8SMadhusudhan Chikkature int reg = 0; 664a45c6cb8SMadhusudhan Chikkature unsigned long timeout; 665a45c6cb8SMadhusudhan Chikkature 666b62f6228SAdrian Hunter if (host->protect_card) 667b62f6228SAdrian Hunter return; 668b62f6228SAdrian Hunter 669a45c6cb8SMadhusudhan Chikkature disable_irq(host->irq); 670b417577dSAdrian Hunter 671b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK); 672a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CON, 673a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, CON) | INIT_STREAM); 674a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CMD, INIT_STREAM_CMD); 675a45c6cb8SMadhusudhan Chikkature 676a45c6cb8SMadhusudhan Chikkature timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 677a45c6cb8SMadhusudhan Chikkature while ((reg != CC) && time_before(jiffies, timeout)) 678a45c6cb8SMadhusudhan Chikkature reg = OMAP_HSMMC_READ(host->base, STAT) & CC; 679a45c6cb8SMadhusudhan Chikkature 680a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CON, 681a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, CON) & ~INIT_STREAM); 682c653a6d4SAdrian Hunter 683c653a6d4SAdrian Hunter OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); 684c653a6d4SAdrian Hunter OMAP_HSMMC_READ(host->base, STAT); 685c653a6d4SAdrian Hunter 686a45c6cb8SMadhusudhan Chikkature enable_irq(host->irq); 687a45c6cb8SMadhusudhan Chikkature } 688a45c6cb8SMadhusudhan Chikkature 689a45c6cb8SMadhusudhan Chikkature static inline 69070a3341aSDenis Karpov int omap_hsmmc_cover_is_closed(struct omap_hsmmc_host *host) 691a45c6cb8SMadhusudhan Chikkature { 692a45c6cb8SMadhusudhan Chikkature int r = 1; 693a45c6cb8SMadhusudhan Chikkature 694191d1f1dSDenis Karpov if (mmc_slot(host).get_cover_state) 695191d1f1dSDenis Karpov r = mmc_slot(host).get_cover_state(host->dev, host->slot_id); 696a45c6cb8SMadhusudhan Chikkature return r; 697a45c6cb8SMadhusudhan Chikkature } 698a45c6cb8SMadhusudhan Chikkature 699a45c6cb8SMadhusudhan Chikkature static ssize_t 70070a3341aSDenis Karpov omap_hsmmc_show_cover_switch(struct device *dev, struct device_attribute *attr, 701a45c6cb8SMadhusudhan Chikkature char *buf) 702a45c6cb8SMadhusudhan Chikkature { 703a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev); 70470a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 705a45c6cb8SMadhusudhan Chikkature 70670a3341aSDenis Karpov return sprintf(buf, "%s\n", 70770a3341aSDenis Karpov omap_hsmmc_cover_is_closed(host) ? "closed" : "open"); 708a45c6cb8SMadhusudhan Chikkature } 709a45c6cb8SMadhusudhan Chikkature 71070a3341aSDenis Karpov static DEVICE_ATTR(cover_switch, S_IRUGO, omap_hsmmc_show_cover_switch, NULL); 711a45c6cb8SMadhusudhan Chikkature 712a45c6cb8SMadhusudhan Chikkature static ssize_t 71370a3341aSDenis Karpov omap_hsmmc_show_slot_name(struct device *dev, struct device_attribute *attr, 714a45c6cb8SMadhusudhan Chikkature char *buf) 715a45c6cb8SMadhusudhan Chikkature { 716a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev); 71770a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 718a45c6cb8SMadhusudhan Chikkature 719191d1f1dSDenis Karpov return sprintf(buf, "%s\n", mmc_slot(host).name); 720a45c6cb8SMadhusudhan Chikkature } 721a45c6cb8SMadhusudhan Chikkature 72270a3341aSDenis Karpov static DEVICE_ATTR(slot_name, S_IRUGO, omap_hsmmc_show_slot_name, NULL); 723a45c6cb8SMadhusudhan Chikkature 724a45c6cb8SMadhusudhan Chikkature /* 725a45c6cb8SMadhusudhan Chikkature * Configure the response type and send the cmd. 726a45c6cb8SMadhusudhan Chikkature */ 727a45c6cb8SMadhusudhan Chikkature static void 72870a3341aSDenis Karpov omap_hsmmc_start_command(struct omap_hsmmc_host *host, struct mmc_command *cmd, 729a45c6cb8SMadhusudhan Chikkature struct mmc_data *data) 730a45c6cb8SMadhusudhan Chikkature { 731a45c6cb8SMadhusudhan Chikkature int cmdreg = 0, resptype = 0, cmdtype = 0; 732a45c6cb8SMadhusudhan Chikkature 733a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "%s: CMD%d, argument 0x%08x\n", 734a45c6cb8SMadhusudhan Chikkature mmc_hostname(host->mmc), cmd->opcode, cmd->arg); 735a45c6cb8SMadhusudhan Chikkature host->cmd = cmd; 736a45c6cb8SMadhusudhan Chikkature 73793caf8e6SAdrian Hunter omap_hsmmc_enable_irq(host, cmd); 738a45c6cb8SMadhusudhan Chikkature 7394a694dc9SAdrian Hunter host->response_busy = 0; 740a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_PRESENT) { 741a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_136) 742a45c6cb8SMadhusudhan Chikkature resptype = 1; 7434a694dc9SAdrian Hunter else if (cmd->flags & MMC_RSP_BUSY) { 7444a694dc9SAdrian Hunter resptype = 3; 7454a694dc9SAdrian Hunter host->response_busy = 1; 7464a694dc9SAdrian Hunter } else 747a45c6cb8SMadhusudhan Chikkature resptype = 2; 748a45c6cb8SMadhusudhan Chikkature } 749a45c6cb8SMadhusudhan Chikkature 750a45c6cb8SMadhusudhan Chikkature /* 751a45c6cb8SMadhusudhan Chikkature * Unlike OMAP1 controller, the cmdtype does not seem to be based on 752a45c6cb8SMadhusudhan Chikkature * ac, bc, adtc, bcr. Only commands ending an open ended transfer need 753a45c6cb8SMadhusudhan Chikkature * a val of 0x3, rest 0x0. 754a45c6cb8SMadhusudhan Chikkature */ 755a45c6cb8SMadhusudhan Chikkature if (cmd == host->mrq->stop) 756a45c6cb8SMadhusudhan Chikkature cmdtype = 0x3; 757a45c6cb8SMadhusudhan Chikkature 758a45c6cb8SMadhusudhan Chikkature cmdreg = (cmd->opcode << 24) | (resptype << 16) | (cmdtype << 22); 759a45c6cb8SMadhusudhan Chikkature 760a45c6cb8SMadhusudhan Chikkature if (data) { 761a45c6cb8SMadhusudhan Chikkature cmdreg |= DP_SELECT | MSBS | BCE; 762a45c6cb8SMadhusudhan Chikkature if (data->flags & MMC_DATA_READ) 763a45c6cb8SMadhusudhan Chikkature cmdreg |= DDIR; 764a45c6cb8SMadhusudhan Chikkature else 765a45c6cb8SMadhusudhan Chikkature cmdreg &= ~(DDIR); 766a45c6cb8SMadhusudhan Chikkature } 767a45c6cb8SMadhusudhan Chikkature 768a45c6cb8SMadhusudhan Chikkature if (host->use_dma) 769a45c6cb8SMadhusudhan Chikkature cmdreg |= DMA_EN; 770a45c6cb8SMadhusudhan Chikkature 771b417577dSAdrian Hunter host->req_in_progress = 1; 7724dffd7a2SAdrian Hunter 773a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, ARG, cmd->arg); 774a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CMD, cmdreg); 775a45c6cb8SMadhusudhan Chikkature } 776a45c6cb8SMadhusudhan Chikkature 7770ccd76d4SJuha Yrjola static int 77870a3341aSDenis Karpov omap_hsmmc_get_dma_dir(struct omap_hsmmc_host *host, struct mmc_data *data) 7790ccd76d4SJuha Yrjola { 7800ccd76d4SJuha Yrjola if (data->flags & MMC_DATA_WRITE) 7810ccd76d4SJuha Yrjola return DMA_TO_DEVICE; 7820ccd76d4SJuha Yrjola else 7830ccd76d4SJuha Yrjola return DMA_FROM_DEVICE; 7840ccd76d4SJuha Yrjola } 7850ccd76d4SJuha Yrjola 786b417577dSAdrian Hunter static void omap_hsmmc_request_done(struct omap_hsmmc_host *host, struct mmc_request *mrq) 787b417577dSAdrian Hunter { 788b417577dSAdrian Hunter int dma_ch; 789b417577dSAdrian Hunter 790b417577dSAdrian Hunter spin_lock(&host->irq_lock); 791b417577dSAdrian Hunter host->req_in_progress = 0; 792b417577dSAdrian Hunter dma_ch = host->dma_ch; 793b417577dSAdrian Hunter spin_unlock(&host->irq_lock); 794b417577dSAdrian Hunter 795b417577dSAdrian Hunter omap_hsmmc_disable_irq(host); 796b417577dSAdrian Hunter /* Do not complete the request if DMA is still in progress */ 797b417577dSAdrian Hunter if (mrq->data && host->use_dma && dma_ch != -1) 798b417577dSAdrian Hunter return; 799b417577dSAdrian Hunter host->mrq = NULL; 800b417577dSAdrian Hunter mmc_request_done(host->mmc, mrq); 801b417577dSAdrian Hunter } 802b417577dSAdrian Hunter 803a45c6cb8SMadhusudhan Chikkature /* 804a45c6cb8SMadhusudhan Chikkature * Notify the transfer complete to MMC core 805a45c6cb8SMadhusudhan Chikkature */ 806a45c6cb8SMadhusudhan Chikkature static void 80770a3341aSDenis Karpov omap_hsmmc_xfer_done(struct omap_hsmmc_host *host, struct mmc_data *data) 808a45c6cb8SMadhusudhan Chikkature { 8094a694dc9SAdrian Hunter if (!data) { 8104a694dc9SAdrian Hunter struct mmc_request *mrq = host->mrq; 8114a694dc9SAdrian Hunter 81223050103SAdrian Hunter /* TC before CC from CMD6 - don't know why, but it happens */ 81323050103SAdrian Hunter if (host->cmd && host->cmd->opcode == 6 && 81423050103SAdrian Hunter host->response_busy) { 81523050103SAdrian Hunter host->response_busy = 0; 81623050103SAdrian Hunter return; 81723050103SAdrian Hunter } 81823050103SAdrian Hunter 819b417577dSAdrian Hunter omap_hsmmc_request_done(host, mrq); 8204a694dc9SAdrian Hunter return; 8214a694dc9SAdrian Hunter } 8224a694dc9SAdrian Hunter 823a45c6cb8SMadhusudhan Chikkature host->data = NULL; 824a45c6cb8SMadhusudhan Chikkature 825a45c6cb8SMadhusudhan Chikkature if (!data->error) 826a45c6cb8SMadhusudhan Chikkature data->bytes_xfered += data->blocks * (data->blksz); 827a45c6cb8SMadhusudhan Chikkature else 828a45c6cb8SMadhusudhan Chikkature data->bytes_xfered = 0; 829a45c6cb8SMadhusudhan Chikkature 830a45c6cb8SMadhusudhan Chikkature if (!data->stop) { 831b417577dSAdrian Hunter omap_hsmmc_request_done(host, data->mrq); 832a45c6cb8SMadhusudhan Chikkature return; 833a45c6cb8SMadhusudhan Chikkature } 83470a3341aSDenis Karpov omap_hsmmc_start_command(host, data->stop, NULL); 835a45c6cb8SMadhusudhan Chikkature } 836a45c6cb8SMadhusudhan Chikkature 837a45c6cb8SMadhusudhan Chikkature /* 838a45c6cb8SMadhusudhan Chikkature * Notify the core about command completion 839a45c6cb8SMadhusudhan Chikkature */ 840a45c6cb8SMadhusudhan Chikkature static void 84170a3341aSDenis Karpov omap_hsmmc_cmd_done(struct omap_hsmmc_host *host, struct mmc_command *cmd) 842a45c6cb8SMadhusudhan Chikkature { 843a45c6cb8SMadhusudhan Chikkature host->cmd = NULL; 844a45c6cb8SMadhusudhan Chikkature 845a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_PRESENT) { 846a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_136) { 847a45c6cb8SMadhusudhan Chikkature /* response type 2 */ 848a45c6cb8SMadhusudhan Chikkature cmd->resp[3] = OMAP_HSMMC_READ(host->base, RSP10); 849a45c6cb8SMadhusudhan Chikkature cmd->resp[2] = OMAP_HSMMC_READ(host->base, RSP32); 850a45c6cb8SMadhusudhan Chikkature cmd->resp[1] = OMAP_HSMMC_READ(host->base, RSP54); 851a45c6cb8SMadhusudhan Chikkature cmd->resp[0] = OMAP_HSMMC_READ(host->base, RSP76); 852a45c6cb8SMadhusudhan Chikkature } else { 853a45c6cb8SMadhusudhan Chikkature /* response types 1, 1b, 3, 4, 5, 6 */ 854a45c6cb8SMadhusudhan Chikkature cmd->resp[0] = OMAP_HSMMC_READ(host->base, RSP10); 855a45c6cb8SMadhusudhan Chikkature } 856a45c6cb8SMadhusudhan Chikkature } 857b417577dSAdrian Hunter if ((host->data == NULL && !host->response_busy) || cmd->error) 858b417577dSAdrian Hunter omap_hsmmc_request_done(host, cmd->mrq); 859a45c6cb8SMadhusudhan Chikkature } 860a45c6cb8SMadhusudhan Chikkature 861a45c6cb8SMadhusudhan Chikkature /* 862a45c6cb8SMadhusudhan Chikkature * DMA clean up for command errors 863a45c6cb8SMadhusudhan Chikkature */ 86470a3341aSDenis Karpov static void omap_hsmmc_dma_cleanup(struct omap_hsmmc_host *host, int errno) 865a45c6cb8SMadhusudhan Chikkature { 866b417577dSAdrian Hunter int dma_ch; 867b417577dSAdrian Hunter 86882788ff5SJarkko Lavinen host->data->error = errno; 869a45c6cb8SMadhusudhan Chikkature 870b417577dSAdrian Hunter spin_lock(&host->irq_lock); 871b417577dSAdrian Hunter dma_ch = host->dma_ch; 872b417577dSAdrian Hunter host->dma_ch = -1; 873b417577dSAdrian Hunter spin_unlock(&host->irq_lock); 874b417577dSAdrian Hunter 875b417577dSAdrian Hunter if (host->use_dma && dma_ch != -1) { 876a9120c33SPer Forlin dma_unmap_sg(mmc_dev(host->mmc), host->data->sg, 877a9120c33SPer Forlin host->data->sg_len, 87870a3341aSDenis Karpov omap_hsmmc_get_dma_dir(host, host->data)); 879b417577dSAdrian Hunter omap_free_dma(dma_ch); 880053bf34fSPer Forlin host->data->host_cookie = 0; 881a45c6cb8SMadhusudhan Chikkature } 882a45c6cb8SMadhusudhan Chikkature host->data = NULL; 883a45c6cb8SMadhusudhan Chikkature } 884a45c6cb8SMadhusudhan Chikkature 885a45c6cb8SMadhusudhan Chikkature /* 886a45c6cb8SMadhusudhan Chikkature * Readable error output 887a45c6cb8SMadhusudhan Chikkature */ 888a45c6cb8SMadhusudhan Chikkature #ifdef CONFIG_MMC_DEBUG 889699b958bSAdrian Hunter static void omap_hsmmc_dbg_report_irq(struct omap_hsmmc_host *host, u32 status) 890a45c6cb8SMadhusudhan Chikkature { 891a45c6cb8SMadhusudhan Chikkature /* --- means reserved bit without definition at documentation */ 89270a3341aSDenis Karpov static const char *omap_hsmmc_status_bits[] = { 893699b958bSAdrian Hunter "CC" , "TC" , "BGE", "---", "BWR" , "BRR" , "---" , "---" , 894699b958bSAdrian Hunter "CIRQ", "OBI" , "---", "---", "---" , "---" , "---" , "ERRI", 895699b958bSAdrian Hunter "CTO" , "CCRC", "CEB", "CIE", "DTO" , "DCRC", "DEB" , "---" , 896699b958bSAdrian Hunter "ACE" , "---" , "---", "---", "CERR", "BADA", "---" , "---" 897a45c6cb8SMadhusudhan Chikkature }; 898a45c6cb8SMadhusudhan Chikkature char res[256]; 899a45c6cb8SMadhusudhan Chikkature char *buf = res; 900a45c6cb8SMadhusudhan Chikkature int len, i; 901a45c6cb8SMadhusudhan Chikkature 902a45c6cb8SMadhusudhan Chikkature len = sprintf(buf, "MMC IRQ 0x%x :", status); 903a45c6cb8SMadhusudhan Chikkature buf += len; 904a45c6cb8SMadhusudhan Chikkature 90570a3341aSDenis Karpov for (i = 0; i < ARRAY_SIZE(omap_hsmmc_status_bits); i++) 906a45c6cb8SMadhusudhan Chikkature if (status & (1 << i)) { 90770a3341aSDenis Karpov len = sprintf(buf, " %s", omap_hsmmc_status_bits[i]); 908a45c6cb8SMadhusudhan Chikkature buf += len; 909a45c6cb8SMadhusudhan Chikkature } 910a45c6cb8SMadhusudhan Chikkature 911a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "%s\n", res); 912a45c6cb8SMadhusudhan Chikkature } 913699b958bSAdrian Hunter #else 914699b958bSAdrian Hunter static inline void omap_hsmmc_dbg_report_irq(struct omap_hsmmc_host *host, 915699b958bSAdrian Hunter u32 status) 916699b958bSAdrian Hunter { 917699b958bSAdrian Hunter } 918a45c6cb8SMadhusudhan Chikkature #endif /* CONFIG_MMC_DEBUG */ 919a45c6cb8SMadhusudhan Chikkature 9203ebf74b1SJean Pihet /* 9213ebf74b1SJean Pihet * MMC controller internal state machines reset 9223ebf74b1SJean Pihet * 9233ebf74b1SJean Pihet * Used to reset command or data internal state machines, using respectively 9243ebf74b1SJean Pihet * SRC or SRD bit of SYSCTL register 9253ebf74b1SJean Pihet * Can be called from interrupt context 9263ebf74b1SJean Pihet */ 92770a3341aSDenis Karpov static inline void omap_hsmmc_reset_controller_fsm(struct omap_hsmmc_host *host, 9283ebf74b1SJean Pihet unsigned long bit) 9293ebf74b1SJean Pihet { 9303ebf74b1SJean Pihet unsigned long i = 0; 9313ebf74b1SJean Pihet unsigned long limit = (loops_per_jiffy * 9323ebf74b1SJean Pihet msecs_to_jiffies(MMC_TIMEOUT_MS)); 9333ebf74b1SJean Pihet 9343ebf74b1SJean Pihet OMAP_HSMMC_WRITE(host->base, SYSCTL, 9353ebf74b1SJean Pihet OMAP_HSMMC_READ(host->base, SYSCTL) | bit); 9363ebf74b1SJean Pihet 93707ad64b6SMadhusudhan Chikkature /* 93807ad64b6SMadhusudhan Chikkature * OMAP4 ES2 and greater has an updated reset logic. 93907ad64b6SMadhusudhan Chikkature * Monitor a 0->1 transition first 94007ad64b6SMadhusudhan Chikkature */ 94107ad64b6SMadhusudhan Chikkature if (mmc_slot(host).features & HSMMC_HAS_UPDATED_RESET) { 942b432b4b3Skishore kadiyala while ((!(OMAP_HSMMC_READ(host->base, SYSCTL) & bit)) 94307ad64b6SMadhusudhan Chikkature && (i++ < limit)) 94407ad64b6SMadhusudhan Chikkature cpu_relax(); 94507ad64b6SMadhusudhan Chikkature } 94607ad64b6SMadhusudhan Chikkature i = 0; 94707ad64b6SMadhusudhan Chikkature 9483ebf74b1SJean Pihet while ((OMAP_HSMMC_READ(host->base, SYSCTL) & bit) && 9493ebf74b1SJean Pihet (i++ < limit)) 9503ebf74b1SJean Pihet cpu_relax(); 9513ebf74b1SJean Pihet 9523ebf74b1SJean Pihet if (OMAP_HSMMC_READ(host->base, SYSCTL) & bit) 9533ebf74b1SJean Pihet dev_err(mmc_dev(host->mmc), 9543ebf74b1SJean Pihet "Timeout waiting on controller reset in %s\n", 9553ebf74b1SJean Pihet __func__); 9563ebf74b1SJean Pihet } 957a45c6cb8SMadhusudhan Chikkature 958b417577dSAdrian Hunter static void omap_hsmmc_do_irq(struct omap_hsmmc_host *host, int status) 959a45c6cb8SMadhusudhan Chikkature { 960a45c6cb8SMadhusudhan Chikkature struct mmc_data *data; 961b417577dSAdrian Hunter int end_cmd = 0, end_trans = 0; 962a45c6cb8SMadhusudhan Chikkature 963b417577dSAdrian Hunter if (!host->req_in_progress) { 964b417577dSAdrian Hunter do { 965b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, STAT, status); 96600adadc1SKevin Hilman /* Flush posted write */ 967b417577dSAdrian Hunter status = OMAP_HSMMC_READ(host->base, STAT); 968b417577dSAdrian Hunter } while (status & INT_EN_MASK); 969b417577dSAdrian Hunter return; 970a45c6cb8SMadhusudhan Chikkature } 971a45c6cb8SMadhusudhan Chikkature 972a45c6cb8SMadhusudhan Chikkature data = host->data; 973a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "IRQ Status is %x\n", status); 974a45c6cb8SMadhusudhan Chikkature 975a45c6cb8SMadhusudhan Chikkature if (status & ERR) { 976699b958bSAdrian Hunter omap_hsmmc_dbg_report_irq(host, status); 977a45c6cb8SMadhusudhan Chikkature if ((status & CMD_TIMEOUT) || 978a45c6cb8SMadhusudhan Chikkature (status & CMD_CRC)) { 979a45c6cb8SMadhusudhan Chikkature if (host->cmd) { 980a45c6cb8SMadhusudhan Chikkature if (status & CMD_TIMEOUT) { 98170a3341aSDenis Karpov omap_hsmmc_reset_controller_fsm(host, 982191d1f1dSDenis Karpov SRC); 983a45c6cb8SMadhusudhan Chikkature host->cmd->error = -ETIMEDOUT; 984a45c6cb8SMadhusudhan Chikkature } else { 985a45c6cb8SMadhusudhan Chikkature host->cmd->error = -EILSEQ; 986a45c6cb8SMadhusudhan Chikkature } 987a45c6cb8SMadhusudhan Chikkature end_cmd = 1; 988a45c6cb8SMadhusudhan Chikkature } 9894a694dc9SAdrian Hunter if (host->data || host->response_busy) { 9904a694dc9SAdrian Hunter if (host->data) 99170a3341aSDenis Karpov omap_hsmmc_dma_cleanup(host, 99270a3341aSDenis Karpov -ETIMEDOUT); 9934a694dc9SAdrian Hunter host->response_busy = 0; 99470a3341aSDenis Karpov omap_hsmmc_reset_controller_fsm(host, SRD); 995c232f457SJean Pihet } 996a45c6cb8SMadhusudhan Chikkature } 997a45c6cb8SMadhusudhan Chikkature if ((status & DATA_TIMEOUT) || 998a45c6cb8SMadhusudhan Chikkature (status & DATA_CRC)) { 9994a694dc9SAdrian Hunter if (host->data || host->response_busy) { 10004a694dc9SAdrian Hunter int err = (status & DATA_TIMEOUT) ? 10014a694dc9SAdrian Hunter -ETIMEDOUT : -EILSEQ; 10024a694dc9SAdrian Hunter 10034a694dc9SAdrian Hunter if (host->data) 100470a3341aSDenis Karpov omap_hsmmc_dma_cleanup(host, err); 1005a45c6cb8SMadhusudhan Chikkature else 10064a694dc9SAdrian Hunter host->mrq->cmd->error = err; 10074a694dc9SAdrian Hunter host->response_busy = 0; 100870a3341aSDenis Karpov omap_hsmmc_reset_controller_fsm(host, SRD); 1009a45c6cb8SMadhusudhan Chikkature end_trans = 1; 1010a45c6cb8SMadhusudhan Chikkature } 1011a45c6cb8SMadhusudhan Chikkature } 1012a45c6cb8SMadhusudhan Chikkature if (status & CARD_ERR) { 1013a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1014a45c6cb8SMadhusudhan Chikkature "Ignoring card err CMD%d\n", host->cmd->opcode); 1015a45c6cb8SMadhusudhan Chikkature if (host->cmd) 1016a45c6cb8SMadhusudhan Chikkature end_cmd = 1; 1017a45c6cb8SMadhusudhan Chikkature if (host->data) 1018a45c6cb8SMadhusudhan Chikkature end_trans = 1; 1019a45c6cb8SMadhusudhan Chikkature } 1020a45c6cb8SMadhusudhan Chikkature } 1021a45c6cb8SMadhusudhan Chikkature 1022a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, STAT, status); 1023a45c6cb8SMadhusudhan Chikkature 1024a8fe29d8SJarkko Lavinen if (end_cmd || ((status & CC) && host->cmd)) 102570a3341aSDenis Karpov omap_hsmmc_cmd_done(host, host->cmd); 10260a40e647SJarkko Lavinen if ((end_trans || (status & TC)) && host->mrq) 102770a3341aSDenis Karpov omap_hsmmc_xfer_done(host, data); 1028b417577dSAdrian Hunter } 1029a45c6cb8SMadhusudhan Chikkature 1030b417577dSAdrian Hunter /* 1031b417577dSAdrian Hunter * MMC controller IRQ handler 1032b417577dSAdrian Hunter */ 1033b417577dSAdrian Hunter static irqreturn_t omap_hsmmc_irq(int irq, void *dev_id) 1034b417577dSAdrian Hunter { 1035b417577dSAdrian Hunter struct omap_hsmmc_host *host = dev_id; 1036b417577dSAdrian Hunter int status; 1037b417577dSAdrian Hunter 1038b417577dSAdrian Hunter status = OMAP_HSMMC_READ(host->base, STAT); 1039b417577dSAdrian Hunter do { 1040b417577dSAdrian Hunter omap_hsmmc_do_irq(host, status); 1041b417577dSAdrian Hunter /* Flush posted write */ 1042b417577dSAdrian Hunter status = OMAP_HSMMC_READ(host->base, STAT); 1043b417577dSAdrian Hunter } while (status & INT_EN_MASK); 10444dffd7a2SAdrian Hunter 1045a45c6cb8SMadhusudhan Chikkature return IRQ_HANDLED; 1046a45c6cb8SMadhusudhan Chikkature } 1047a45c6cb8SMadhusudhan Chikkature 104870a3341aSDenis Karpov static void set_sd_bus_power(struct omap_hsmmc_host *host) 1049e13bb300SAdrian Hunter { 1050e13bb300SAdrian Hunter unsigned long i; 1051e13bb300SAdrian Hunter 1052e13bb300SAdrian Hunter OMAP_HSMMC_WRITE(host->base, HCTL, 1053e13bb300SAdrian Hunter OMAP_HSMMC_READ(host->base, HCTL) | SDBP); 1054e13bb300SAdrian Hunter for (i = 0; i < loops_per_jiffy; i++) { 1055e13bb300SAdrian Hunter if (OMAP_HSMMC_READ(host->base, HCTL) & SDBP) 1056e13bb300SAdrian Hunter break; 1057e13bb300SAdrian Hunter cpu_relax(); 1058e13bb300SAdrian Hunter } 1059e13bb300SAdrian Hunter } 1060e13bb300SAdrian Hunter 1061a45c6cb8SMadhusudhan Chikkature /* 1062eb250826SDavid Brownell * Switch MMC interface voltage ... only relevant for MMC1. 1063eb250826SDavid Brownell * 1064eb250826SDavid Brownell * MMC2 and MMC3 use fixed 1.8V levels, and maybe a transceiver. 1065eb250826SDavid Brownell * The MMC2 transceiver controls are used instead of DAT4..DAT7. 1066eb250826SDavid Brownell * Some chips, like eMMC ones, use internal transceivers. 1067a45c6cb8SMadhusudhan Chikkature */ 106870a3341aSDenis Karpov static int omap_hsmmc_switch_opcond(struct omap_hsmmc_host *host, int vdd) 1069a45c6cb8SMadhusudhan Chikkature { 1070a45c6cb8SMadhusudhan Chikkature u32 reg_val = 0; 1071a45c6cb8SMadhusudhan Chikkature int ret; 1072a45c6cb8SMadhusudhan Chikkature 1073a45c6cb8SMadhusudhan Chikkature /* Disable the clocks */ 1074fa4aa2d4SBalaji T K pm_runtime_put_sync(host->dev); 10752bec0893SAdrian Hunter if (host->got_dbclk) 1076a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 1077a45c6cb8SMadhusudhan Chikkature 1078a45c6cb8SMadhusudhan Chikkature /* Turn the power off */ 1079a45c6cb8SMadhusudhan Chikkature ret = mmc_slot(host).set_power(host->dev, host->slot_id, 0, 0); 1080a45c6cb8SMadhusudhan Chikkature 1081a45c6cb8SMadhusudhan Chikkature /* Turn the power ON with given VDD 1.8 or 3.0v */ 10822bec0893SAdrian Hunter if (!ret) 10832bec0893SAdrian Hunter ret = mmc_slot(host).set_power(host->dev, host->slot_id, 1, 10842bec0893SAdrian Hunter vdd); 1085fa4aa2d4SBalaji T K pm_runtime_get_sync(host->dev); 10862bec0893SAdrian Hunter if (host->got_dbclk) 10872bec0893SAdrian Hunter clk_enable(host->dbclk); 10882bec0893SAdrian Hunter 1089a45c6cb8SMadhusudhan Chikkature if (ret != 0) 1090a45c6cb8SMadhusudhan Chikkature goto err; 1091a45c6cb8SMadhusudhan Chikkature 1092a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 1093a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) & SDVSCLR); 1094a45c6cb8SMadhusudhan Chikkature reg_val = OMAP_HSMMC_READ(host->base, HCTL); 1095eb250826SDavid Brownell 1096a45c6cb8SMadhusudhan Chikkature /* 1097a45c6cb8SMadhusudhan Chikkature * If a MMC dual voltage card is detected, the set_ios fn calls 1098a45c6cb8SMadhusudhan Chikkature * this fn with VDD bit set for 1.8V. Upon card removal from the 109970a3341aSDenis Karpov * slot, omap_hsmmc_set_ios sets the VDD back to 3V on MMC_POWER_OFF. 1100a45c6cb8SMadhusudhan Chikkature * 1101eb250826SDavid Brownell * Cope with a bit of slop in the range ... per data sheets: 1102eb250826SDavid Brownell * - "1.8V" for vdds_mmc1/vdds_mmc1a can be up to 2.45V max, 1103eb250826SDavid Brownell * but recommended values are 1.71V to 1.89V 1104eb250826SDavid Brownell * - "3.0V" for vdds_mmc1/vdds_mmc1a can be up to 3.5V max, 1105eb250826SDavid Brownell * but recommended values are 2.7V to 3.3V 1106eb250826SDavid Brownell * 1107eb250826SDavid Brownell * Board setup code shouldn't permit anything very out-of-range. 1108eb250826SDavid Brownell * TWL4030-family VMMC1 and VSIM regulators are fine (avoiding the 1109eb250826SDavid Brownell * middle range) but VSIM can't power DAT4..DAT7 at more than 3V. 1110a45c6cb8SMadhusudhan Chikkature */ 1111eb250826SDavid Brownell if ((1 << vdd) <= MMC_VDD_23_24) 1112a45c6cb8SMadhusudhan Chikkature reg_val |= SDVS18; 1113eb250826SDavid Brownell else 1114eb250826SDavid Brownell reg_val |= SDVS30; 1115a45c6cb8SMadhusudhan Chikkature 1116a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, reg_val); 1117e13bb300SAdrian Hunter set_sd_bus_power(host); 1118a45c6cb8SMadhusudhan Chikkature 1119a45c6cb8SMadhusudhan Chikkature return 0; 1120a45c6cb8SMadhusudhan Chikkature err: 1121a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Unable to switch operating voltage\n"); 1122a45c6cb8SMadhusudhan Chikkature return ret; 1123a45c6cb8SMadhusudhan Chikkature } 1124a45c6cb8SMadhusudhan Chikkature 1125b62f6228SAdrian Hunter /* Protect the card while the cover is open */ 1126b62f6228SAdrian Hunter static void omap_hsmmc_protect_card(struct omap_hsmmc_host *host) 1127b62f6228SAdrian Hunter { 1128b62f6228SAdrian Hunter if (!mmc_slot(host).get_cover_state) 1129b62f6228SAdrian Hunter return; 1130b62f6228SAdrian Hunter 1131b62f6228SAdrian Hunter host->reqs_blocked = 0; 1132b62f6228SAdrian Hunter if (mmc_slot(host).get_cover_state(host->dev, host->slot_id)) { 1133b62f6228SAdrian Hunter if (host->protect_card) { 11342cecdf00SRajendra Nayak dev_info(host->dev, "%s: cover is closed, " 1135b62f6228SAdrian Hunter "card is now accessible\n", 1136b62f6228SAdrian Hunter mmc_hostname(host->mmc)); 1137b62f6228SAdrian Hunter host->protect_card = 0; 1138b62f6228SAdrian Hunter } 1139b62f6228SAdrian Hunter } else { 1140b62f6228SAdrian Hunter if (!host->protect_card) { 11412cecdf00SRajendra Nayak dev_info(host->dev, "%s: cover is open, " 1142b62f6228SAdrian Hunter "card is now inaccessible\n", 1143b62f6228SAdrian Hunter mmc_hostname(host->mmc)); 1144b62f6228SAdrian Hunter host->protect_card = 1; 1145b62f6228SAdrian Hunter } 1146b62f6228SAdrian Hunter } 1147b62f6228SAdrian Hunter } 1148b62f6228SAdrian Hunter 1149a45c6cb8SMadhusudhan Chikkature /* 11507efab4f3SNeilBrown * irq handler to notify the core about card insertion/removal 1151a45c6cb8SMadhusudhan Chikkature */ 11527efab4f3SNeilBrown static irqreturn_t omap_hsmmc_detect(int irq, void *dev_id) 1153a45c6cb8SMadhusudhan Chikkature { 11547efab4f3SNeilBrown struct omap_hsmmc_host *host = dev_id; 1155249d0fa9SDavid Brownell struct omap_mmc_slot_data *slot = &mmc_slot(host); 1156a6b2240dSAdrian Hunter int carddetect; 1157249d0fa9SDavid Brownell 1158a6b2240dSAdrian Hunter if (host->suspended) 11597efab4f3SNeilBrown return IRQ_HANDLED; 1160a45c6cb8SMadhusudhan Chikkature 1161a45c6cb8SMadhusudhan Chikkature sysfs_notify(&host->mmc->class_dev.kobj, NULL, "cover_switch"); 1162a6b2240dSAdrian Hunter 1163191d1f1dSDenis Karpov if (slot->card_detect) 1164db0fefc5SAdrian Hunter carddetect = slot->card_detect(host->dev, host->slot_id); 1165b62f6228SAdrian Hunter else { 1166b62f6228SAdrian Hunter omap_hsmmc_protect_card(host); 1167a6b2240dSAdrian Hunter carddetect = -ENOSYS; 1168b62f6228SAdrian Hunter } 1169a6b2240dSAdrian Hunter 1170cdeebaddSMadhusudhan Chikkature if (carddetect) 1171a45c6cb8SMadhusudhan Chikkature mmc_detect_change(host->mmc, (HZ * 200) / 1000); 1172cdeebaddSMadhusudhan Chikkature else 1173a45c6cb8SMadhusudhan Chikkature mmc_detect_change(host->mmc, (HZ * 50) / 1000); 1174a45c6cb8SMadhusudhan Chikkature return IRQ_HANDLED; 1175a45c6cb8SMadhusudhan Chikkature } 1176a45c6cb8SMadhusudhan Chikkature 117770a3341aSDenis Karpov static int omap_hsmmc_get_dma_sync_dev(struct omap_hsmmc_host *host, 11780ccd76d4SJuha Yrjola struct mmc_data *data) 11790ccd76d4SJuha Yrjola { 11800ccd76d4SJuha Yrjola int sync_dev; 11810ccd76d4SJuha Yrjola 1182f3e2f1ddSGrazvydas Ignotas if (data->flags & MMC_DATA_WRITE) 1183f3e2f1ddSGrazvydas Ignotas sync_dev = host->dma_line_tx; 11840ccd76d4SJuha Yrjola else 1185f3e2f1ddSGrazvydas Ignotas sync_dev = host->dma_line_rx; 11860ccd76d4SJuha Yrjola return sync_dev; 11870ccd76d4SJuha Yrjola } 11880ccd76d4SJuha Yrjola 118970a3341aSDenis Karpov static void omap_hsmmc_config_dma_params(struct omap_hsmmc_host *host, 11900ccd76d4SJuha Yrjola struct mmc_data *data, 11910ccd76d4SJuha Yrjola struct scatterlist *sgl) 11920ccd76d4SJuha Yrjola { 11930ccd76d4SJuha Yrjola int blksz, nblk, dma_ch; 11940ccd76d4SJuha Yrjola 11950ccd76d4SJuha Yrjola dma_ch = host->dma_ch; 11960ccd76d4SJuha Yrjola if (data->flags & MMC_DATA_WRITE) { 11970ccd76d4SJuha Yrjola omap_set_dma_dest_params(dma_ch, 0, OMAP_DMA_AMODE_CONSTANT, 11980ccd76d4SJuha Yrjola (host->mapbase + OMAP_HSMMC_DATA), 0, 0); 11990ccd76d4SJuha Yrjola omap_set_dma_src_params(dma_ch, 0, OMAP_DMA_AMODE_POST_INC, 12000ccd76d4SJuha Yrjola sg_dma_address(sgl), 0, 0); 12010ccd76d4SJuha Yrjola } else { 12020ccd76d4SJuha Yrjola omap_set_dma_src_params(dma_ch, 0, OMAP_DMA_AMODE_CONSTANT, 12030ccd76d4SJuha Yrjola (host->mapbase + OMAP_HSMMC_DATA), 0, 0); 12040ccd76d4SJuha Yrjola omap_set_dma_dest_params(dma_ch, 0, OMAP_DMA_AMODE_POST_INC, 12050ccd76d4SJuha Yrjola sg_dma_address(sgl), 0, 0); 12060ccd76d4SJuha Yrjola } 12070ccd76d4SJuha Yrjola 12080ccd76d4SJuha Yrjola blksz = host->data->blksz; 12090ccd76d4SJuha Yrjola nblk = sg_dma_len(sgl) / blksz; 12100ccd76d4SJuha Yrjola 12110ccd76d4SJuha Yrjola omap_set_dma_transfer_params(dma_ch, OMAP_DMA_DATA_TYPE_S32, 12120ccd76d4SJuha Yrjola blksz / 4, nblk, OMAP_DMA_SYNC_FRAME, 121370a3341aSDenis Karpov omap_hsmmc_get_dma_sync_dev(host, data), 12140ccd76d4SJuha Yrjola !(data->flags & MMC_DATA_WRITE)); 12150ccd76d4SJuha Yrjola 12160ccd76d4SJuha Yrjola omap_start_dma(dma_ch); 12170ccd76d4SJuha Yrjola } 12180ccd76d4SJuha Yrjola 1219a45c6cb8SMadhusudhan Chikkature /* 1220a45c6cb8SMadhusudhan Chikkature * DMA call back function 1221a45c6cb8SMadhusudhan Chikkature */ 1222b417577dSAdrian Hunter static void omap_hsmmc_dma_cb(int lch, u16 ch_status, void *cb_data) 1223a45c6cb8SMadhusudhan Chikkature { 1224b417577dSAdrian Hunter struct omap_hsmmc_host *host = cb_data; 1225770d7432SAdrian Hunter struct mmc_data *data; 1226b417577dSAdrian Hunter int dma_ch, req_in_progress; 1227a45c6cb8SMadhusudhan Chikkature 1228f3584e5eSVenkatraman S if (!(ch_status & OMAP_DMA_BLOCK_IRQ)) { 1229f3584e5eSVenkatraman S dev_warn(mmc_dev(host->mmc), "unexpected dma status %x\n", 1230f3584e5eSVenkatraman S ch_status); 1231f3584e5eSVenkatraman S return; 1232f3584e5eSVenkatraman S } 1233a45c6cb8SMadhusudhan Chikkature 1234b417577dSAdrian Hunter spin_lock(&host->irq_lock); 1235b417577dSAdrian Hunter if (host->dma_ch < 0) { 1236b417577dSAdrian Hunter spin_unlock(&host->irq_lock); 1237a45c6cb8SMadhusudhan Chikkature return; 1238b417577dSAdrian Hunter } 1239a45c6cb8SMadhusudhan Chikkature 1240770d7432SAdrian Hunter data = host->mrq->data; 12410ccd76d4SJuha Yrjola host->dma_sg_idx++; 12420ccd76d4SJuha Yrjola if (host->dma_sg_idx < host->dma_len) { 12430ccd76d4SJuha Yrjola /* Fire up the next transfer. */ 1244b417577dSAdrian Hunter omap_hsmmc_config_dma_params(host, data, 1245b417577dSAdrian Hunter data->sg + host->dma_sg_idx); 1246b417577dSAdrian Hunter spin_unlock(&host->irq_lock); 12470ccd76d4SJuha Yrjola return; 12480ccd76d4SJuha Yrjola } 12490ccd76d4SJuha Yrjola 12509782aff8SPer Forlin if (!data->host_cookie) 1251a9120c33SPer Forlin dma_unmap_sg(mmc_dev(host->mmc), data->sg, data->sg_len, 1252b417577dSAdrian Hunter omap_hsmmc_get_dma_dir(host, data)); 1253b417577dSAdrian Hunter 1254b417577dSAdrian Hunter req_in_progress = host->req_in_progress; 1255b417577dSAdrian Hunter dma_ch = host->dma_ch; 1256a45c6cb8SMadhusudhan Chikkature host->dma_ch = -1; 1257b417577dSAdrian Hunter spin_unlock(&host->irq_lock); 1258b417577dSAdrian Hunter 1259b417577dSAdrian Hunter omap_free_dma(dma_ch); 1260b417577dSAdrian Hunter 1261b417577dSAdrian Hunter /* If DMA has finished after TC, complete the request */ 1262b417577dSAdrian Hunter if (!req_in_progress) { 1263b417577dSAdrian Hunter struct mmc_request *mrq = host->mrq; 1264b417577dSAdrian Hunter 1265b417577dSAdrian Hunter host->mrq = NULL; 1266b417577dSAdrian Hunter mmc_request_done(host->mmc, mrq); 1267b417577dSAdrian Hunter } 1268a45c6cb8SMadhusudhan Chikkature } 1269a45c6cb8SMadhusudhan Chikkature 12709782aff8SPer Forlin static int omap_hsmmc_pre_dma_transfer(struct omap_hsmmc_host *host, 12719782aff8SPer Forlin struct mmc_data *data, 12729782aff8SPer Forlin struct omap_hsmmc_next *next) 12739782aff8SPer Forlin { 12749782aff8SPer Forlin int dma_len; 12759782aff8SPer Forlin 12769782aff8SPer Forlin if (!next && data->host_cookie && 12779782aff8SPer Forlin data->host_cookie != host->next_data.cookie) { 12782cecdf00SRajendra Nayak dev_warn(host->dev, "[%s] invalid cookie: data->host_cookie %d" 12799782aff8SPer Forlin " host->next_data.cookie %d\n", 12809782aff8SPer Forlin __func__, data->host_cookie, host->next_data.cookie); 12819782aff8SPer Forlin data->host_cookie = 0; 12829782aff8SPer Forlin } 12839782aff8SPer Forlin 12849782aff8SPer Forlin /* Check if next job is already prepared */ 12859782aff8SPer Forlin if (next || 12869782aff8SPer Forlin (!next && data->host_cookie != host->next_data.cookie)) { 12879782aff8SPer Forlin dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg, 12889782aff8SPer Forlin data->sg_len, 12899782aff8SPer Forlin omap_hsmmc_get_dma_dir(host, data)); 12909782aff8SPer Forlin 12919782aff8SPer Forlin } else { 12929782aff8SPer Forlin dma_len = host->next_data.dma_len; 12939782aff8SPer Forlin host->next_data.dma_len = 0; 12949782aff8SPer Forlin } 12959782aff8SPer Forlin 12969782aff8SPer Forlin 12979782aff8SPer Forlin if (dma_len == 0) 12989782aff8SPer Forlin return -EINVAL; 12999782aff8SPer Forlin 13009782aff8SPer Forlin if (next) { 13019782aff8SPer Forlin next->dma_len = dma_len; 13029782aff8SPer Forlin data->host_cookie = ++next->cookie < 0 ? 1 : next->cookie; 13039782aff8SPer Forlin } else 13049782aff8SPer Forlin host->dma_len = dma_len; 13059782aff8SPer Forlin 13069782aff8SPer Forlin return 0; 13079782aff8SPer Forlin } 13089782aff8SPer Forlin 1309a45c6cb8SMadhusudhan Chikkature /* 1310a45c6cb8SMadhusudhan Chikkature * Routine to configure and start DMA for the MMC card 1311a45c6cb8SMadhusudhan Chikkature */ 131270a3341aSDenis Karpov static int omap_hsmmc_start_dma_transfer(struct omap_hsmmc_host *host, 131370a3341aSDenis Karpov struct mmc_request *req) 1314a45c6cb8SMadhusudhan Chikkature { 1315b417577dSAdrian Hunter int dma_ch = 0, ret = 0, i; 1316a45c6cb8SMadhusudhan Chikkature struct mmc_data *data = req->data; 1317a45c6cb8SMadhusudhan Chikkature 13180ccd76d4SJuha Yrjola /* Sanity check: all the SG entries must be aligned by block size. */ 1319a3f406f8SJarkko Lavinen for (i = 0; i < data->sg_len; i++) { 13200ccd76d4SJuha Yrjola struct scatterlist *sgl; 13210ccd76d4SJuha Yrjola 13220ccd76d4SJuha Yrjola sgl = data->sg + i; 13230ccd76d4SJuha Yrjola if (sgl->length % data->blksz) 13240ccd76d4SJuha Yrjola return -EINVAL; 13250ccd76d4SJuha Yrjola } 13260ccd76d4SJuha Yrjola if ((data->blksz % 4) != 0) 13270ccd76d4SJuha Yrjola /* REVISIT: The MMC buffer increments only when MSB is written. 13280ccd76d4SJuha Yrjola * Return error for blksz which is non multiple of four. 13290ccd76d4SJuha Yrjola */ 13300ccd76d4SJuha Yrjola return -EINVAL; 13310ccd76d4SJuha Yrjola 1332b417577dSAdrian Hunter BUG_ON(host->dma_ch != -1); 1333a45c6cb8SMadhusudhan Chikkature 133470a3341aSDenis Karpov ret = omap_request_dma(omap_hsmmc_get_dma_sync_dev(host, data), 133570a3341aSDenis Karpov "MMC/SD", omap_hsmmc_dma_cb, host, &dma_ch); 1336a45c6cb8SMadhusudhan Chikkature if (ret != 0) { 13370ccd76d4SJuha Yrjola dev_err(mmc_dev(host->mmc), 1338a45c6cb8SMadhusudhan Chikkature "%s: omap_request_dma() failed with %d\n", 1339a45c6cb8SMadhusudhan Chikkature mmc_hostname(host->mmc), ret); 1340a45c6cb8SMadhusudhan Chikkature return ret; 1341a45c6cb8SMadhusudhan Chikkature } 13429782aff8SPer Forlin ret = omap_hsmmc_pre_dma_transfer(host, data, NULL); 13439782aff8SPer Forlin if (ret) 13449782aff8SPer Forlin return ret; 1345a45c6cb8SMadhusudhan Chikkature 1346a45c6cb8SMadhusudhan Chikkature host->dma_ch = dma_ch; 13470ccd76d4SJuha Yrjola host->dma_sg_idx = 0; 1348a45c6cb8SMadhusudhan Chikkature 134970a3341aSDenis Karpov omap_hsmmc_config_dma_params(host, data, data->sg); 1350a45c6cb8SMadhusudhan Chikkature 1351a45c6cb8SMadhusudhan Chikkature return 0; 1352a45c6cb8SMadhusudhan Chikkature } 1353a45c6cb8SMadhusudhan Chikkature 135470a3341aSDenis Karpov static void set_data_timeout(struct omap_hsmmc_host *host, 1355e2bf08d6SAdrian Hunter unsigned int timeout_ns, 1356e2bf08d6SAdrian Hunter unsigned int timeout_clks) 1357a45c6cb8SMadhusudhan Chikkature { 1358a45c6cb8SMadhusudhan Chikkature unsigned int timeout, cycle_ns; 1359a45c6cb8SMadhusudhan Chikkature uint32_t reg, clkd, dto = 0; 1360a45c6cb8SMadhusudhan Chikkature 1361a45c6cb8SMadhusudhan Chikkature reg = OMAP_HSMMC_READ(host->base, SYSCTL); 1362a45c6cb8SMadhusudhan Chikkature clkd = (reg & CLKD_MASK) >> CLKD_SHIFT; 1363a45c6cb8SMadhusudhan Chikkature if (clkd == 0) 1364a45c6cb8SMadhusudhan Chikkature clkd = 1; 1365a45c6cb8SMadhusudhan Chikkature 1366a45c6cb8SMadhusudhan Chikkature cycle_ns = 1000000000 / (clk_get_rate(host->fclk) / clkd); 1367e2bf08d6SAdrian Hunter timeout = timeout_ns / cycle_ns; 1368e2bf08d6SAdrian Hunter timeout += timeout_clks; 1369a45c6cb8SMadhusudhan Chikkature if (timeout) { 1370a45c6cb8SMadhusudhan Chikkature while ((timeout & 0x80000000) == 0) { 1371a45c6cb8SMadhusudhan Chikkature dto += 1; 1372a45c6cb8SMadhusudhan Chikkature timeout <<= 1; 1373a45c6cb8SMadhusudhan Chikkature } 1374a45c6cb8SMadhusudhan Chikkature dto = 31 - dto; 1375a45c6cb8SMadhusudhan Chikkature timeout <<= 1; 1376a45c6cb8SMadhusudhan Chikkature if (timeout && dto) 1377a45c6cb8SMadhusudhan Chikkature dto += 1; 1378a45c6cb8SMadhusudhan Chikkature if (dto >= 13) 1379a45c6cb8SMadhusudhan Chikkature dto -= 13; 1380a45c6cb8SMadhusudhan Chikkature else 1381a45c6cb8SMadhusudhan Chikkature dto = 0; 1382a45c6cb8SMadhusudhan Chikkature if (dto > 14) 1383a45c6cb8SMadhusudhan Chikkature dto = 14; 1384a45c6cb8SMadhusudhan Chikkature } 1385a45c6cb8SMadhusudhan Chikkature 1386a45c6cb8SMadhusudhan Chikkature reg &= ~DTO_MASK; 1387a45c6cb8SMadhusudhan Chikkature reg |= dto << DTO_SHIFT; 1388a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, reg); 1389a45c6cb8SMadhusudhan Chikkature } 1390a45c6cb8SMadhusudhan Chikkature 1391a45c6cb8SMadhusudhan Chikkature /* 1392a45c6cb8SMadhusudhan Chikkature * Configure block length for MMC/SD cards and initiate the transfer. 1393a45c6cb8SMadhusudhan Chikkature */ 1394a45c6cb8SMadhusudhan Chikkature static int 139570a3341aSDenis Karpov omap_hsmmc_prepare_data(struct omap_hsmmc_host *host, struct mmc_request *req) 1396a45c6cb8SMadhusudhan Chikkature { 1397a45c6cb8SMadhusudhan Chikkature int ret; 1398a45c6cb8SMadhusudhan Chikkature host->data = req->data; 1399a45c6cb8SMadhusudhan Chikkature 1400a45c6cb8SMadhusudhan Chikkature if (req->data == NULL) { 1401a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, BLK, 0); 1402e2bf08d6SAdrian Hunter /* 1403e2bf08d6SAdrian Hunter * Set an arbitrary 100ms data timeout for commands with 1404e2bf08d6SAdrian Hunter * busy signal. 1405e2bf08d6SAdrian Hunter */ 1406e2bf08d6SAdrian Hunter if (req->cmd->flags & MMC_RSP_BUSY) 1407e2bf08d6SAdrian Hunter set_data_timeout(host, 100000000U, 0); 1408a45c6cb8SMadhusudhan Chikkature return 0; 1409a45c6cb8SMadhusudhan Chikkature } 1410a45c6cb8SMadhusudhan Chikkature 1411a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, BLK, (req->data->blksz) 1412a45c6cb8SMadhusudhan Chikkature | (req->data->blocks << 16)); 1413e2bf08d6SAdrian Hunter set_data_timeout(host, req->data->timeout_ns, req->data->timeout_clks); 1414a45c6cb8SMadhusudhan Chikkature 1415a45c6cb8SMadhusudhan Chikkature if (host->use_dma) { 141670a3341aSDenis Karpov ret = omap_hsmmc_start_dma_transfer(host, req); 1417a45c6cb8SMadhusudhan Chikkature if (ret != 0) { 1418a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "MMC start dma failure\n"); 1419a45c6cb8SMadhusudhan Chikkature return ret; 1420a45c6cb8SMadhusudhan Chikkature } 1421a45c6cb8SMadhusudhan Chikkature } 1422a45c6cb8SMadhusudhan Chikkature return 0; 1423a45c6cb8SMadhusudhan Chikkature } 1424a45c6cb8SMadhusudhan Chikkature 14259782aff8SPer Forlin static void omap_hsmmc_post_req(struct mmc_host *mmc, struct mmc_request *mrq, 14269782aff8SPer Forlin int err) 14279782aff8SPer Forlin { 14289782aff8SPer Forlin struct omap_hsmmc_host *host = mmc_priv(mmc); 14299782aff8SPer Forlin struct mmc_data *data = mrq->data; 14309782aff8SPer Forlin 14319782aff8SPer Forlin if (host->use_dma) { 1432053bf34fSPer Forlin if (data->host_cookie) 1433053bf34fSPer Forlin dma_unmap_sg(mmc_dev(host->mmc), data->sg, 1434053bf34fSPer Forlin data->sg_len, 14359782aff8SPer Forlin omap_hsmmc_get_dma_dir(host, data)); 14369782aff8SPer Forlin data->host_cookie = 0; 14379782aff8SPer Forlin } 14389782aff8SPer Forlin } 14399782aff8SPer Forlin 14409782aff8SPer Forlin static void omap_hsmmc_pre_req(struct mmc_host *mmc, struct mmc_request *mrq, 14419782aff8SPer Forlin bool is_first_req) 14429782aff8SPer Forlin { 14439782aff8SPer Forlin struct omap_hsmmc_host *host = mmc_priv(mmc); 14449782aff8SPer Forlin 14459782aff8SPer Forlin if (mrq->data->host_cookie) { 14469782aff8SPer Forlin mrq->data->host_cookie = 0; 14479782aff8SPer Forlin return ; 14489782aff8SPer Forlin } 14499782aff8SPer Forlin 14509782aff8SPer Forlin if (host->use_dma) 14519782aff8SPer Forlin if (omap_hsmmc_pre_dma_transfer(host, mrq->data, 14529782aff8SPer Forlin &host->next_data)) 14539782aff8SPer Forlin mrq->data->host_cookie = 0; 14549782aff8SPer Forlin } 14559782aff8SPer Forlin 1456a45c6cb8SMadhusudhan Chikkature /* 1457a45c6cb8SMadhusudhan Chikkature * Request function. for read/write operation 1458a45c6cb8SMadhusudhan Chikkature */ 145970a3341aSDenis Karpov static void omap_hsmmc_request(struct mmc_host *mmc, struct mmc_request *req) 1460a45c6cb8SMadhusudhan Chikkature { 146170a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1462a3f406f8SJarkko Lavinen int err; 1463a45c6cb8SMadhusudhan Chikkature 1464b417577dSAdrian Hunter BUG_ON(host->req_in_progress); 1465b417577dSAdrian Hunter BUG_ON(host->dma_ch != -1); 1466b62f6228SAdrian Hunter if (host->protect_card) { 1467b62f6228SAdrian Hunter if (host->reqs_blocked < 3) { 1468b62f6228SAdrian Hunter /* 1469b62f6228SAdrian Hunter * Ensure the controller is left in a consistent 1470b62f6228SAdrian Hunter * state by resetting the command and data state 1471b62f6228SAdrian Hunter * machines. 1472b62f6228SAdrian Hunter */ 1473b62f6228SAdrian Hunter omap_hsmmc_reset_controller_fsm(host, SRD); 1474b62f6228SAdrian Hunter omap_hsmmc_reset_controller_fsm(host, SRC); 1475b62f6228SAdrian Hunter host->reqs_blocked += 1; 1476b62f6228SAdrian Hunter } 1477b62f6228SAdrian Hunter req->cmd->error = -EBADF; 1478b62f6228SAdrian Hunter if (req->data) 1479b62f6228SAdrian Hunter req->data->error = -EBADF; 1480b417577dSAdrian Hunter req->cmd->retries = 0; 1481b62f6228SAdrian Hunter mmc_request_done(mmc, req); 1482b62f6228SAdrian Hunter return; 1483b62f6228SAdrian Hunter } else if (host->reqs_blocked) 1484b62f6228SAdrian Hunter host->reqs_blocked = 0; 1485a45c6cb8SMadhusudhan Chikkature WARN_ON(host->mrq != NULL); 1486a45c6cb8SMadhusudhan Chikkature host->mrq = req; 148770a3341aSDenis Karpov err = omap_hsmmc_prepare_data(host, req); 1488a3f406f8SJarkko Lavinen if (err) { 1489a3f406f8SJarkko Lavinen req->cmd->error = err; 1490a3f406f8SJarkko Lavinen if (req->data) 1491a3f406f8SJarkko Lavinen req->data->error = err; 1492a3f406f8SJarkko Lavinen host->mrq = NULL; 1493a3f406f8SJarkko Lavinen mmc_request_done(mmc, req); 1494a3f406f8SJarkko Lavinen return; 1495a3f406f8SJarkko Lavinen } 1496a3f406f8SJarkko Lavinen 149770a3341aSDenis Karpov omap_hsmmc_start_command(host, req->cmd, req->data); 1498a45c6cb8SMadhusudhan Chikkature } 1499a45c6cb8SMadhusudhan Chikkature 1500a45c6cb8SMadhusudhan Chikkature /* Routine to configure clock values. Exposed API to core */ 150170a3341aSDenis Karpov static void omap_hsmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 1502a45c6cb8SMadhusudhan Chikkature { 150370a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1504a3621465SAdrian Hunter int do_send_init_stream = 0; 1505a45c6cb8SMadhusudhan Chikkature 1506fa4aa2d4SBalaji T K pm_runtime_get_sync(host->dev); 15075e2ea617SAdrian Hunter 1508a3621465SAdrian Hunter if (ios->power_mode != host->power_mode) { 1509a45c6cb8SMadhusudhan Chikkature switch (ios->power_mode) { 1510a45c6cb8SMadhusudhan Chikkature case MMC_POWER_OFF: 1511a3621465SAdrian Hunter mmc_slot(host).set_power(host->dev, host->slot_id, 1512a3621465SAdrian Hunter 0, 0); 1513623821f7SAdrian Hunter host->vdd = 0; 1514a45c6cb8SMadhusudhan Chikkature break; 1515a45c6cb8SMadhusudhan Chikkature case MMC_POWER_UP: 1516a3621465SAdrian Hunter mmc_slot(host).set_power(host->dev, host->slot_id, 1517a3621465SAdrian Hunter 1, ios->vdd); 1518623821f7SAdrian Hunter host->vdd = ios->vdd; 1519a45c6cb8SMadhusudhan Chikkature break; 1520a3621465SAdrian Hunter case MMC_POWER_ON: 1521a3621465SAdrian Hunter do_send_init_stream = 1; 1522a3621465SAdrian Hunter break; 1523a3621465SAdrian Hunter } 1524a3621465SAdrian Hunter host->power_mode = ios->power_mode; 1525a45c6cb8SMadhusudhan Chikkature } 1526a45c6cb8SMadhusudhan Chikkature 1527dd498effSDenis Karpov /* FIXME: set registers based only on changes to ios */ 1528dd498effSDenis Karpov 15293796fb8aSAndy Shevchenko omap_hsmmc_set_bus_width(host); 1530a45c6cb8SMadhusudhan Chikkature 15314621d5f8SKishore Kadiyala if (host->pdata->controller_flags & OMAP_HSMMC_SUPPORTS_DUAL_VOLT) { 1532eb250826SDavid Brownell /* Only MMC1 can interface at 3V without some flavor 1533eb250826SDavid Brownell * of external transceiver; but they all handle 1.8V. 1534eb250826SDavid Brownell */ 1535a45c6cb8SMadhusudhan Chikkature if ((OMAP_HSMMC_READ(host->base, HCTL) & SDVSDET) && 1536a45c6cb8SMadhusudhan Chikkature (ios->vdd == DUAL_VOLT_OCR_BIT)) { 1537a45c6cb8SMadhusudhan Chikkature /* 1538a45c6cb8SMadhusudhan Chikkature * The mmc_select_voltage fn of the core does 1539a45c6cb8SMadhusudhan Chikkature * not seem to set the power_mode to 1540a45c6cb8SMadhusudhan Chikkature * MMC_POWER_UP upon recalculating the voltage. 1541a45c6cb8SMadhusudhan Chikkature * vdd 1.8v. 1542a45c6cb8SMadhusudhan Chikkature */ 154370a3341aSDenis Karpov if (omap_hsmmc_switch_opcond(host, ios->vdd) != 0) 1544a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1545a45c6cb8SMadhusudhan Chikkature "Switch operation failed\n"); 1546a45c6cb8SMadhusudhan Chikkature } 1547a45c6cb8SMadhusudhan Chikkature } 1548a45c6cb8SMadhusudhan Chikkature 15495934df2fSAndy Shevchenko omap_hsmmc_set_clock(host); 1550a45c6cb8SMadhusudhan Chikkature 1551a3621465SAdrian Hunter if (do_send_init_stream) 1552a45c6cb8SMadhusudhan Chikkature send_init_stream(host); 1553a45c6cb8SMadhusudhan Chikkature 15543796fb8aSAndy Shevchenko omap_hsmmc_set_bus_mode(host); 15555e2ea617SAdrian Hunter 1556fa4aa2d4SBalaji T K pm_runtime_put_autosuspend(host->dev); 1557a45c6cb8SMadhusudhan Chikkature } 1558a45c6cb8SMadhusudhan Chikkature 1559a45c6cb8SMadhusudhan Chikkature static int omap_hsmmc_get_cd(struct mmc_host *mmc) 1560a45c6cb8SMadhusudhan Chikkature { 156170a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1562a45c6cb8SMadhusudhan Chikkature 1563191d1f1dSDenis Karpov if (!mmc_slot(host).card_detect) 1564a45c6cb8SMadhusudhan Chikkature return -ENOSYS; 1565db0fefc5SAdrian Hunter return mmc_slot(host).card_detect(host->dev, host->slot_id); 1566a45c6cb8SMadhusudhan Chikkature } 1567a45c6cb8SMadhusudhan Chikkature 1568a45c6cb8SMadhusudhan Chikkature static int omap_hsmmc_get_ro(struct mmc_host *mmc) 1569a45c6cb8SMadhusudhan Chikkature { 157070a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1571a45c6cb8SMadhusudhan Chikkature 1572191d1f1dSDenis Karpov if (!mmc_slot(host).get_ro) 1573a45c6cb8SMadhusudhan Chikkature return -ENOSYS; 1574191d1f1dSDenis Karpov return mmc_slot(host).get_ro(host->dev, 0); 1575a45c6cb8SMadhusudhan Chikkature } 1576a45c6cb8SMadhusudhan Chikkature 15774816858cSGrazvydas Ignotas static void omap_hsmmc_init_card(struct mmc_host *mmc, struct mmc_card *card) 15784816858cSGrazvydas Ignotas { 15794816858cSGrazvydas Ignotas struct omap_hsmmc_host *host = mmc_priv(mmc); 15804816858cSGrazvydas Ignotas 15814816858cSGrazvydas Ignotas if (mmc_slot(host).init_card) 15824816858cSGrazvydas Ignotas mmc_slot(host).init_card(card); 15834816858cSGrazvydas Ignotas } 15844816858cSGrazvydas Ignotas 158570a3341aSDenis Karpov static void omap_hsmmc_conf_bus_power(struct omap_hsmmc_host *host) 15861b331e69SKim Kyuwon { 15871b331e69SKim Kyuwon u32 hctl, capa, value; 15881b331e69SKim Kyuwon 15891b331e69SKim Kyuwon /* Only MMC1 supports 3.0V */ 15904621d5f8SKishore Kadiyala if (host->pdata->controller_flags & OMAP_HSMMC_SUPPORTS_DUAL_VOLT) { 15911b331e69SKim Kyuwon hctl = SDVS30; 15921b331e69SKim Kyuwon capa = VS30 | VS18; 15931b331e69SKim Kyuwon } else { 15941b331e69SKim Kyuwon hctl = SDVS18; 15951b331e69SKim Kyuwon capa = VS18; 15961b331e69SKim Kyuwon } 15971b331e69SKim Kyuwon 15981b331e69SKim Kyuwon value = OMAP_HSMMC_READ(host->base, HCTL) & ~SDVS_MASK; 15991b331e69SKim Kyuwon OMAP_HSMMC_WRITE(host->base, HCTL, value | hctl); 16001b331e69SKim Kyuwon 16011b331e69SKim Kyuwon value = OMAP_HSMMC_READ(host->base, CAPA); 16021b331e69SKim Kyuwon OMAP_HSMMC_WRITE(host->base, CAPA, value | capa); 16031b331e69SKim Kyuwon 16041b331e69SKim Kyuwon /* Set the controller to AUTO IDLE mode */ 16051b331e69SKim Kyuwon value = OMAP_HSMMC_READ(host->base, SYSCONFIG); 16061b331e69SKim Kyuwon OMAP_HSMMC_WRITE(host->base, SYSCONFIG, value | AUTOIDLE); 16071b331e69SKim Kyuwon 16081b331e69SKim Kyuwon /* Set SD bus power bit */ 1609e13bb300SAdrian Hunter set_sd_bus_power(host); 16101b331e69SKim Kyuwon } 16111b331e69SKim Kyuwon 161270a3341aSDenis Karpov static int omap_hsmmc_enable_fclk(struct mmc_host *mmc) 1613dd498effSDenis Karpov { 161470a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1615dd498effSDenis Karpov 1616fa4aa2d4SBalaji T K pm_runtime_get_sync(host->dev); 1617fa4aa2d4SBalaji T K 1618dd498effSDenis Karpov return 0; 1619dd498effSDenis Karpov } 1620dd498effSDenis Karpov 1621907d2e7cSAdrian Hunter static int omap_hsmmc_disable_fclk(struct mmc_host *mmc) 1622dd498effSDenis Karpov { 162370a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1624dd498effSDenis Karpov 1625fa4aa2d4SBalaji T K pm_runtime_mark_last_busy(host->dev); 1626fa4aa2d4SBalaji T K pm_runtime_put_autosuspend(host->dev); 1627fa4aa2d4SBalaji T K 1628dd498effSDenis Karpov return 0; 1629dd498effSDenis Karpov } 1630dd498effSDenis Karpov 163170a3341aSDenis Karpov static const struct mmc_host_ops omap_hsmmc_ops = { 163270a3341aSDenis Karpov .enable = omap_hsmmc_enable_fclk, 163370a3341aSDenis Karpov .disable = omap_hsmmc_disable_fclk, 16349782aff8SPer Forlin .post_req = omap_hsmmc_post_req, 16359782aff8SPer Forlin .pre_req = omap_hsmmc_pre_req, 163670a3341aSDenis Karpov .request = omap_hsmmc_request, 163770a3341aSDenis Karpov .set_ios = omap_hsmmc_set_ios, 1638dd498effSDenis Karpov .get_cd = omap_hsmmc_get_cd, 1639dd498effSDenis Karpov .get_ro = omap_hsmmc_get_ro, 16404816858cSGrazvydas Ignotas .init_card = omap_hsmmc_init_card, 1641dd498effSDenis Karpov /* NYET -- enable_sdio_irq */ 1642dd498effSDenis Karpov }; 1643dd498effSDenis Karpov 1644d900f712SDenis Karpov #ifdef CONFIG_DEBUG_FS 1645d900f712SDenis Karpov 164670a3341aSDenis Karpov static int omap_hsmmc_regs_show(struct seq_file *s, void *data) 1647d900f712SDenis Karpov { 1648d900f712SDenis Karpov struct mmc_host *mmc = s->private; 164970a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 165011dd62a7SDenis Karpov int context_loss = 0; 165111dd62a7SDenis Karpov 165270a3341aSDenis Karpov if (host->pdata->get_context_loss_count) 165370a3341aSDenis Karpov context_loss = host->pdata->get_context_loss_count(host->dev); 1654d900f712SDenis Karpov 1655907d2e7cSAdrian Hunter seq_printf(s, "mmc%d:\n ctx_loss:\t%d:%d\n\nregs:\n", 1656907d2e7cSAdrian Hunter mmc->index, host->context_loss, context_loss); 16575e2ea617SAdrian Hunter 16587a8c2cefSBalaji T K if (host->suspended) { 1659dd498effSDenis Karpov seq_printf(s, "host suspended, can't read registers\n"); 1660dd498effSDenis Karpov return 0; 1661dd498effSDenis Karpov } 1662dd498effSDenis Karpov 1663fa4aa2d4SBalaji T K pm_runtime_get_sync(host->dev); 1664d900f712SDenis Karpov 1665d900f712SDenis Karpov seq_printf(s, "SYSCONFIG:\t0x%08x\n", 1666d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCONFIG)); 1667d900f712SDenis Karpov seq_printf(s, "CON:\t\t0x%08x\n", 1668d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, CON)); 1669d900f712SDenis Karpov seq_printf(s, "HCTL:\t\t0x%08x\n", 1670d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, HCTL)); 1671d900f712SDenis Karpov seq_printf(s, "SYSCTL:\t\t0x%08x\n", 1672d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCTL)); 1673d900f712SDenis Karpov seq_printf(s, "IE:\t\t0x%08x\n", 1674d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, IE)); 1675d900f712SDenis Karpov seq_printf(s, "ISE:\t\t0x%08x\n", 1676d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, ISE)); 1677d900f712SDenis Karpov seq_printf(s, "CAPA:\t\t0x%08x\n", 1678d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, CAPA)); 16795e2ea617SAdrian Hunter 1680fa4aa2d4SBalaji T K pm_runtime_mark_last_busy(host->dev); 1681fa4aa2d4SBalaji T K pm_runtime_put_autosuspend(host->dev); 1682dd498effSDenis Karpov 1683d900f712SDenis Karpov return 0; 1684d900f712SDenis Karpov } 1685d900f712SDenis Karpov 168670a3341aSDenis Karpov static int omap_hsmmc_regs_open(struct inode *inode, struct file *file) 1687d900f712SDenis Karpov { 168870a3341aSDenis Karpov return single_open(file, omap_hsmmc_regs_show, inode->i_private); 1689d900f712SDenis Karpov } 1690d900f712SDenis Karpov 1691d900f712SDenis Karpov static const struct file_operations mmc_regs_fops = { 169270a3341aSDenis Karpov .open = omap_hsmmc_regs_open, 1693d900f712SDenis Karpov .read = seq_read, 1694d900f712SDenis Karpov .llseek = seq_lseek, 1695d900f712SDenis Karpov .release = single_release, 1696d900f712SDenis Karpov }; 1697d900f712SDenis Karpov 169870a3341aSDenis Karpov static void omap_hsmmc_debugfs(struct mmc_host *mmc) 1699d900f712SDenis Karpov { 1700d900f712SDenis Karpov if (mmc->debugfs_root) 1701d900f712SDenis Karpov debugfs_create_file("regs", S_IRUSR, mmc->debugfs_root, 1702d900f712SDenis Karpov mmc, &mmc_regs_fops); 1703d900f712SDenis Karpov } 1704d900f712SDenis Karpov 1705d900f712SDenis Karpov #else 1706d900f712SDenis Karpov 170770a3341aSDenis Karpov static void omap_hsmmc_debugfs(struct mmc_host *mmc) 1708d900f712SDenis Karpov { 1709d900f712SDenis Karpov } 1710d900f712SDenis Karpov 1711d900f712SDenis Karpov #endif 1712d900f712SDenis Karpov 171370a3341aSDenis Karpov static int __init omap_hsmmc_probe(struct platform_device *pdev) 1714a45c6cb8SMadhusudhan Chikkature { 1715a45c6cb8SMadhusudhan Chikkature struct omap_mmc_platform_data *pdata = pdev->dev.platform_data; 1716a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc; 171770a3341aSDenis Karpov struct omap_hsmmc_host *host = NULL; 1718a45c6cb8SMadhusudhan Chikkature struct resource *res; 1719db0fefc5SAdrian Hunter int ret, irq; 1720a45c6cb8SMadhusudhan Chikkature 1721a45c6cb8SMadhusudhan Chikkature if (pdata == NULL) { 1722a45c6cb8SMadhusudhan Chikkature dev_err(&pdev->dev, "Platform Data is missing\n"); 1723a45c6cb8SMadhusudhan Chikkature return -ENXIO; 1724a45c6cb8SMadhusudhan Chikkature } 1725a45c6cb8SMadhusudhan Chikkature 1726a45c6cb8SMadhusudhan Chikkature if (pdata->nr_slots == 0) { 1727a45c6cb8SMadhusudhan Chikkature dev_err(&pdev->dev, "No Slots\n"); 1728a45c6cb8SMadhusudhan Chikkature return -ENXIO; 1729a45c6cb8SMadhusudhan Chikkature } 1730a45c6cb8SMadhusudhan Chikkature 1731a45c6cb8SMadhusudhan Chikkature res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1732a45c6cb8SMadhusudhan Chikkature irq = platform_get_irq(pdev, 0); 1733a45c6cb8SMadhusudhan Chikkature if (res == NULL || irq < 0) 1734a45c6cb8SMadhusudhan Chikkature return -ENXIO; 1735a45c6cb8SMadhusudhan Chikkature 173691a0b089Skishore kadiyala res->start += pdata->reg_offset; 173791a0b089Skishore kadiyala res->end += pdata->reg_offset; 1738984b203aSChris Ball res = request_mem_region(res->start, resource_size(res), pdev->name); 1739a45c6cb8SMadhusudhan Chikkature if (res == NULL) 1740a45c6cb8SMadhusudhan Chikkature return -EBUSY; 1741a45c6cb8SMadhusudhan Chikkature 1742db0fefc5SAdrian Hunter ret = omap_hsmmc_gpio_init(pdata); 1743db0fefc5SAdrian Hunter if (ret) 1744db0fefc5SAdrian Hunter goto err; 1745db0fefc5SAdrian Hunter 174670a3341aSDenis Karpov mmc = mmc_alloc_host(sizeof(struct omap_hsmmc_host), &pdev->dev); 1747a45c6cb8SMadhusudhan Chikkature if (!mmc) { 1748a45c6cb8SMadhusudhan Chikkature ret = -ENOMEM; 1749db0fefc5SAdrian Hunter goto err_alloc; 1750a45c6cb8SMadhusudhan Chikkature } 1751a45c6cb8SMadhusudhan Chikkature 1752a45c6cb8SMadhusudhan Chikkature host = mmc_priv(mmc); 1753a45c6cb8SMadhusudhan Chikkature host->mmc = mmc; 1754a45c6cb8SMadhusudhan Chikkature host->pdata = pdata; 1755a45c6cb8SMadhusudhan Chikkature host->dev = &pdev->dev; 1756a45c6cb8SMadhusudhan Chikkature host->use_dma = 1; 1757a45c6cb8SMadhusudhan Chikkature host->dev->dma_mask = &pdata->dma_mask; 1758a45c6cb8SMadhusudhan Chikkature host->dma_ch = -1; 1759a45c6cb8SMadhusudhan Chikkature host->irq = irq; 1760a45c6cb8SMadhusudhan Chikkature host->slot_id = 0; 1761a45c6cb8SMadhusudhan Chikkature host->mapbase = res->start; 1762a45c6cb8SMadhusudhan Chikkature host->base = ioremap(host->mapbase, SZ_4K); 17636da20c89SAdrian Hunter host->power_mode = MMC_POWER_OFF; 17649782aff8SPer Forlin host->next_data.cookie = 1; 1765a45c6cb8SMadhusudhan Chikkature 1766a45c6cb8SMadhusudhan Chikkature platform_set_drvdata(pdev, host); 1767a45c6cb8SMadhusudhan Chikkature 176870a3341aSDenis Karpov mmc->ops = &omap_hsmmc_ops; 1769dd498effSDenis Karpov 1770e0eb2424SAdrian Hunter /* 1771e0eb2424SAdrian Hunter * If regulator_disable can only put vcc_aux to sleep then there is 1772e0eb2424SAdrian Hunter * no off state. 1773e0eb2424SAdrian Hunter */ 1774e0eb2424SAdrian Hunter if (mmc_slot(host).vcc_aux_disable_is_sleep) 1775e0eb2424SAdrian Hunter mmc_slot(host).no_off = 1; 1776e0eb2424SAdrian Hunter 17776b206efeSAndy Shevchenko mmc->f_min = OMAP_MMC_MIN_CLOCK; 1778d418ed87SDaniel Mack 1779d418ed87SDaniel Mack if (pdata->max_freq > 0) 1780d418ed87SDaniel Mack mmc->f_max = pdata->max_freq; 1781d418ed87SDaniel Mack else 17826b206efeSAndy Shevchenko mmc->f_max = OMAP_MMC_MAX_CLOCK; 1783a45c6cb8SMadhusudhan Chikkature 17844dffd7a2SAdrian Hunter spin_lock_init(&host->irq_lock); 1785a45c6cb8SMadhusudhan Chikkature 17866f7607ccSRussell King host->fclk = clk_get(&pdev->dev, "fck"); 1787a45c6cb8SMadhusudhan Chikkature if (IS_ERR(host->fclk)) { 1788a45c6cb8SMadhusudhan Chikkature ret = PTR_ERR(host->fclk); 1789a45c6cb8SMadhusudhan Chikkature host->fclk = NULL; 1790a45c6cb8SMadhusudhan Chikkature goto err1; 1791a45c6cb8SMadhusudhan Chikkature } 1792a45c6cb8SMadhusudhan Chikkature 179370a3341aSDenis Karpov omap_hsmmc_context_save(host); 179411dd62a7SDenis Karpov 17959b68256cSPaul Walmsley if (host->pdata->controller_flags & OMAP_HSMMC_BROKEN_MULTIBLOCK_READ) { 17969b68256cSPaul Walmsley dev_info(&pdev->dev, "multiblock reads disabled due to 35xx erratum 2.1.1.128; MMC read performance may suffer\n"); 17979b68256cSPaul Walmsley mmc->caps2 |= MMC_CAP2_NO_MULTI_READ; 17989b68256cSPaul Walmsley } 1799dd498effSDenis Karpov 1800fa4aa2d4SBalaji T K pm_runtime_enable(host->dev); 1801fa4aa2d4SBalaji T K pm_runtime_get_sync(host->dev); 1802fa4aa2d4SBalaji T K pm_runtime_set_autosuspend_delay(host->dev, MMC_AUTOSUSPEND_DELAY); 1803fa4aa2d4SBalaji T K pm_runtime_use_autosuspend(host->dev); 1804a45c6cb8SMadhusudhan Chikkature 18052bec0893SAdrian Hunter if (cpu_is_omap2430()) { 1806a45c6cb8SMadhusudhan Chikkature host->dbclk = clk_get(&pdev->dev, "mmchsdb_fck"); 1807a45c6cb8SMadhusudhan Chikkature /* 1808a45c6cb8SMadhusudhan Chikkature * MMC can still work without debounce clock. 1809a45c6cb8SMadhusudhan Chikkature */ 1810a45c6cb8SMadhusudhan Chikkature if (IS_ERR(host->dbclk)) 18112bec0893SAdrian Hunter dev_warn(mmc_dev(host->mmc), 18122bec0893SAdrian Hunter "Failed to get debounce clock\n"); 1813a45c6cb8SMadhusudhan Chikkature else 18142bec0893SAdrian Hunter host->got_dbclk = 1; 18152bec0893SAdrian Hunter 18162bec0893SAdrian Hunter if (host->got_dbclk) 1817a45c6cb8SMadhusudhan Chikkature if (clk_enable(host->dbclk) != 0) 1818a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Enabling debounce" 1819a45c6cb8SMadhusudhan Chikkature " clk failed\n"); 18202bec0893SAdrian Hunter } 1821a45c6cb8SMadhusudhan Chikkature 18220ccd76d4SJuha Yrjola /* Since we do only SG emulation, we can have as many segs 18230ccd76d4SJuha Yrjola * as we want. */ 1824a36274e0SMartin K. Petersen mmc->max_segs = 1024; 18250ccd76d4SJuha Yrjola 1826a45c6cb8SMadhusudhan Chikkature mmc->max_blk_size = 512; /* Block Length at max can be 1024 */ 1827a45c6cb8SMadhusudhan Chikkature mmc->max_blk_count = 0xFFFF; /* No. of Blocks is 16 bits */ 1828a45c6cb8SMadhusudhan Chikkature mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; 1829a45c6cb8SMadhusudhan Chikkature mmc->max_seg_size = mmc->max_req_size; 1830a45c6cb8SMadhusudhan Chikkature 183113189e78SJarkko Lavinen mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED | 183293caf8e6SAdrian Hunter MMC_CAP_WAIT_WHILE_BUSY | MMC_CAP_ERASE; 1833a45c6cb8SMadhusudhan Chikkature 18343a63833eSSukumar Ghorai mmc->caps |= mmc_slot(host).caps; 18353a63833eSSukumar Ghorai if (mmc->caps & MMC_CAP_8_BIT_DATA) 1836a45c6cb8SMadhusudhan Chikkature mmc->caps |= MMC_CAP_4_BIT_DATA; 1837a45c6cb8SMadhusudhan Chikkature 1838191d1f1dSDenis Karpov if (mmc_slot(host).nonremovable) 183923d99bb9SAdrian Hunter mmc->caps |= MMC_CAP_NONREMOVABLE; 184023d99bb9SAdrian Hunter 18416fdc75deSEliad Peller mmc->pm_caps = mmc_slot(host).pm_caps; 18426fdc75deSEliad Peller 184370a3341aSDenis Karpov omap_hsmmc_conf_bus_power(host); 1844a45c6cb8SMadhusudhan Chikkature 1845b7bf773bSBalaji T K res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "tx"); 1846b7bf773bSBalaji T K if (!res) { 1847b7bf773bSBalaji T K dev_err(mmc_dev(host->mmc), "cannot get DMA TX channel\n"); 1848f3e2f1ddSGrazvydas Ignotas goto err_irq; 1849a45c6cb8SMadhusudhan Chikkature } 1850b7bf773bSBalaji T K host->dma_line_tx = res->start; 1851b7bf773bSBalaji T K 1852b7bf773bSBalaji T K res = platform_get_resource_byname(pdev, IORESOURCE_DMA, "rx"); 1853b7bf773bSBalaji T K if (!res) { 1854b7bf773bSBalaji T K dev_err(mmc_dev(host->mmc), "cannot get DMA RX channel\n"); 1855b7bf773bSBalaji T K goto err_irq; 1856b7bf773bSBalaji T K } 1857b7bf773bSBalaji T K host->dma_line_rx = res->start; 1858a45c6cb8SMadhusudhan Chikkature 1859a45c6cb8SMadhusudhan Chikkature /* Request IRQ for MMC operations */ 1860d9618e9fSYong Zhang ret = request_irq(host->irq, omap_hsmmc_irq, 0, 1861a45c6cb8SMadhusudhan Chikkature mmc_hostname(mmc), host); 1862a45c6cb8SMadhusudhan Chikkature if (ret) { 1863a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Unable to grab HSMMC IRQ\n"); 1864a45c6cb8SMadhusudhan Chikkature goto err_irq; 1865a45c6cb8SMadhusudhan Chikkature } 1866a45c6cb8SMadhusudhan Chikkature 1867a45c6cb8SMadhusudhan Chikkature if (pdata->init != NULL) { 1868a45c6cb8SMadhusudhan Chikkature if (pdata->init(&pdev->dev) != 0) { 186970a3341aSDenis Karpov dev_dbg(mmc_dev(host->mmc), 187070a3341aSDenis Karpov "Unable to configure MMC IRQs\n"); 1871a45c6cb8SMadhusudhan Chikkature goto err_irq_cd_init; 1872a45c6cb8SMadhusudhan Chikkature } 1873a45c6cb8SMadhusudhan Chikkature } 1874db0fefc5SAdrian Hunter 1875b702b106SAdrian Hunter if (omap_hsmmc_have_reg() && !mmc_slot(host).set_power) { 1876db0fefc5SAdrian Hunter ret = omap_hsmmc_reg_get(host); 1877db0fefc5SAdrian Hunter if (ret) 1878db0fefc5SAdrian Hunter goto err_reg; 1879db0fefc5SAdrian Hunter host->use_reg = 1; 1880db0fefc5SAdrian Hunter } 1881db0fefc5SAdrian Hunter 1882b583f26dSDavid Brownell mmc->ocr_avail = mmc_slot(host).ocr_mask; 1883a45c6cb8SMadhusudhan Chikkature 1884a45c6cb8SMadhusudhan Chikkature /* Request IRQ for card detect */ 1885e1a55f5eSAdrian Hunter if ((mmc_slot(host).card_detect_irq)) { 18867efab4f3SNeilBrown ret = request_threaded_irq(mmc_slot(host).card_detect_irq, 18877efab4f3SNeilBrown NULL, 18887efab4f3SNeilBrown omap_hsmmc_detect, 1889d9618e9fSYong Zhang IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING, 1890a45c6cb8SMadhusudhan Chikkature mmc_hostname(mmc), host); 1891a45c6cb8SMadhusudhan Chikkature if (ret) { 1892a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1893a45c6cb8SMadhusudhan Chikkature "Unable to grab MMC CD IRQ\n"); 1894a45c6cb8SMadhusudhan Chikkature goto err_irq_cd; 1895a45c6cb8SMadhusudhan Chikkature } 189672f2e2c7Skishore kadiyala pdata->suspend = omap_hsmmc_suspend_cdirq; 189772f2e2c7Skishore kadiyala pdata->resume = omap_hsmmc_resume_cdirq; 1898a45c6cb8SMadhusudhan Chikkature } 1899a45c6cb8SMadhusudhan Chikkature 1900b417577dSAdrian Hunter omap_hsmmc_disable_irq(host); 1901a45c6cb8SMadhusudhan Chikkature 1902b62f6228SAdrian Hunter omap_hsmmc_protect_card(host); 1903b62f6228SAdrian Hunter 1904a45c6cb8SMadhusudhan Chikkature mmc_add_host(mmc); 1905a45c6cb8SMadhusudhan Chikkature 1906191d1f1dSDenis Karpov if (mmc_slot(host).name != NULL) { 1907a45c6cb8SMadhusudhan Chikkature ret = device_create_file(&mmc->class_dev, &dev_attr_slot_name); 1908a45c6cb8SMadhusudhan Chikkature if (ret < 0) 1909a45c6cb8SMadhusudhan Chikkature goto err_slot_name; 1910a45c6cb8SMadhusudhan Chikkature } 1911191d1f1dSDenis Karpov if (mmc_slot(host).card_detect_irq && mmc_slot(host).get_cover_state) { 1912a45c6cb8SMadhusudhan Chikkature ret = device_create_file(&mmc->class_dev, 1913a45c6cb8SMadhusudhan Chikkature &dev_attr_cover_switch); 1914a45c6cb8SMadhusudhan Chikkature if (ret < 0) 1915db0fefc5SAdrian Hunter goto err_slot_name; 1916a45c6cb8SMadhusudhan Chikkature } 1917a45c6cb8SMadhusudhan Chikkature 191870a3341aSDenis Karpov omap_hsmmc_debugfs(mmc); 1919fa4aa2d4SBalaji T K pm_runtime_mark_last_busy(host->dev); 1920fa4aa2d4SBalaji T K pm_runtime_put_autosuspend(host->dev); 1921d900f712SDenis Karpov 1922a45c6cb8SMadhusudhan Chikkature return 0; 1923a45c6cb8SMadhusudhan Chikkature 1924a45c6cb8SMadhusudhan Chikkature err_slot_name: 1925a45c6cb8SMadhusudhan Chikkature mmc_remove_host(mmc); 1926a45c6cb8SMadhusudhan Chikkature free_irq(mmc_slot(host).card_detect_irq, host); 1927db0fefc5SAdrian Hunter err_irq_cd: 1928db0fefc5SAdrian Hunter if (host->use_reg) 1929db0fefc5SAdrian Hunter omap_hsmmc_reg_put(host); 1930db0fefc5SAdrian Hunter err_reg: 1931db0fefc5SAdrian Hunter if (host->pdata->cleanup) 1932db0fefc5SAdrian Hunter host->pdata->cleanup(&pdev->dev); 1933a45c6cb8SMadhusudhan Chikkature err_irq_cd_init: 1934a45c6cb8SMadhusudhan Chikkature free_irq(host->irq, host); 1935a45c6cb8SMadhusudhan Chikkature err_irq: 1936fa4aa2d4SBalaji T K pm_runtime_mark_last_busy(host->dev); 1937fa4aa2d4SBalaji T K pm_runtime_put_autosuspend(host->dev); 193837f6190dSTony Lindgren pm_runtime_disable(host->dev); 1939a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 19402bec0893SAdrian Hunter if (host->got_dbclk) { 1941a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 1942a45c6cb8SMadhusudhan Chikkature clk_put(host->dbclk); 1943a45c6cb8SMadhusudhan Chikkature } 1944a45c6cb8SMadhusudhan Chikkature err1: 1945a45c6cb8SMadhusudhan Chikkature iounmap(host->base); 1946db0fefc5SAdrian Hunter platform_set_drvdata(pdev, NULL); 1947a45c6cb8SMadhusudhan Chikkature mmc_free_host(mmc); 1948db0fefc5SAdrian Hunter err_alloc: 1949db0fefc5SAdrian Hunter omap_hsmmc_gpio_free(pdata); 1950db0fefc5SAdrian Hunter err: 1951984b203aSChris Ball release_mem_region(res->start, resource_size(res)); 1952a45c6cb8SMadhusudhan Chikkature return ret; 1953a45c6cb8SMadhusudhan Chikkature } 1954a45c6cb8SMadhusudhan Chikkature 195570a3341aSDenis Karpov static int omap_hsmmc_remove(struct platform_device *pdev) 1956a45c6cb8SMadhusudhan Chikkature { 195770a3341aSDenis Karpov struct omap_hsmmc_host *host = platform_get_drvdata(pdev); 1958a45c6cb8SMadhusudhan Chikkature struct resource *res; 1959a45c6cb8SMadhusudhan Chikkature 1960a45c6cb8SMadhusudhan Chikkature if (host) { 1961fa4aa2d4SBalaji T K pm_runtime_get_sync(host->dev); 1962a45c6cb8SMadhusudhan Chikkature mmc_remove_host(host->mmc); 1963db0fefc5SAdrian Hunter if (host->use_reg) 1964db0fefc5SAdrian Hunter omap_hsmmc_reg_put(host); 1965a45c6cb8SMadhusudhan Chikkature if (host->pdata->cleanup) 1966a45c6cb8SMadhusudhan Chikkature host->pdata->cleanup(&pdev->dev); 1967a45c6cb8SMadhusudhan Chikkature free_irq(host->irq, host); 1968a45c6cb8SMadhusudhan Chikkature if (mmc_slot(host).card_detect_irq) 1969a45c6cb8SMadhusudhan Chikkature free_irq(mmc_slot(host).card_detect_irq, host); 1970a45c6cb8SMadhusudhan Chikkature 1971fa4aa2d4SBalaji T K pm_runtime_put_sync(host->dev); 1972fa4aa2d4SBalaji T K pm_runtime_disable(host->dev); 1973a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 19742bec0893SAdrian Hunter if (host->got_dbclk) { 1975a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 1976a45c6cb8SMadhusudhan Chikkature clk_put(host->dbclk); 1977a45c6cb8SMadhusudhan Chikkature } 1978a45c6cb8SMadhusudhan Chikkature 1979a45c6cb8SMadhusudhan Chikkature mmc_free_host(host->mmc); 1980a45c6cb8SMadhusudhan Chikkature iounmap(host->base); 1981db0fefc5SAdrian Hunter omap_hsmmc_gpio_free(pdev->dev.platform_data); 1982a45c6cb8SMadhusudhan Chikkature } 1983a45c6cb8SMadhusudhan Chikkature 1984a45c6cb8SMadhusudhan Chikkature res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1985a45c6cb8SMadhusudhan Chikkature if (res) 1986984b203aSChris Ball release_mem_region(res->start, resource_size(res)); 1987a45c6cb8SMadhusudhan Chikkature platform_set_drvdata(pdev, NULL); 1988a45c6cb8SMadhusudhan Chikkature 1989a45c6cb8SMadhusudhan Chikkature return 0; 1990a45c6cb8SMadhusudhan Chikkature } 1991a45c6cb8SMadhusudhan Chikkature 1992a45c6cb8SMadhusudhan Chikkature #ifdef CONFIG_PM 1993a791daa1SKevin Hilman static int omap_hsmmc_suspend(struct device *dev) 1994a45c6cb8SMadhusudhan Chikkature { 1995a45c6cb8SMadhusudhan Chikkature int ret = 0; 1996a791daa1SKevin Hilman struct platform_device *pdev = to_platform_device(dev); 199770a3341aSDenis Karpov struct omap_hsmmc_host *host = platform_get_drvdata(pdev); 1998a45c6cb8SMadhusudhan Chikkature 1999a45c6cb8SMadhusudhan Chikkature if (host && host->suspended) 2000a45c6cb8SMadhusudhan Chikkature return 0; 2001a45c6cb8SMadhusudhan Chikkature 2002a45c6cb8SMadhusudhan Chikkature if (host) { 2003fa4aa2d4SBalaji T K pm_runtime_get_sync(host->dev); 2004a45c6cb8SMadhusudhan Chikkature host->suspended = 1; 2005a45c6cb8SMadhusudhan Chikkature if (host->pdata->suspend) { 2006a45c6cb8SMadhusudhan Chikkature ret = host->pdata->suspend(&pdev->dev, 2007a45c6cb8SMadhusudhan Chikkature host->slot_id); 2008a6b2240dSAdrian Hunter if (ret) { 2009a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 2010a45c6cb8SMadhusudhan Chikkature "Unable to handle MMC board" 2011a45c6cb8SMadhusudhan Chikkature " level suspend\n"); 2012a6b2240dSAdrian Hunter host->suspended = 0; 2013a6b2240dSAdrian Hunter return ret; 2014a45c6cb8SMadhusudhan Chikkature } 2015a6b2240dSAdrian Hunter } 20161a13f8faSMatt Fleming ret = mmc_suspend_host(host->mmc); 2017fa4aa2d4SBalaji T K 201831f9d463SEliad Peller if (ret) { 2019a6b2240dSAdrian Hunter host->suspended = 0; 2020a6b2240dSAdrian Hunter if (host->pdata->resume) { 2021a6b2240dSAdrian Hunter ret = host->pdata->resume(&pdev->dev, 2022a6b2240dSAdrian Hunter host->slot_id); 2023a6b2240dSAdrian Hunter if (ret) 2024a6b2240dSAdrian Hunter dev_dbg(mmc_dev(host->mmc), 2025a6b2240dSAdrian Hunter "Unmask interrupt failed\n"); 2026a6b2240dSAdrian Hunter } 202731f9d463SEliad Peller goto err; 2028a6b2240dSAdrian Hunter } 202931f9d463SEliad Peller 203031f9d463SEliad Peller if (!(host->mmc->pm_flags & MMC_PM_KEEP_POWER)) { 203131f9d463SEliad Peller omap_hsmmc_disable_irq(host); 203231f9d463SEliad Peller OMAP_HSMMC_WRITE(host->base, HCTL, 203331f9d463SEliad Peller OMAP_HSMMC_READ(host->base, HCTL) & ~SDBP); 203431f9d463SEliad Peller } 203531f9d463SEliad Peller if (host->got_dbclk) 203631f9d463SEliad Peller clk_disable(host->dbclk); 203731f9d463SEliad Peller 203831f9d463SEliad Peller } 203931f9d463SEliad Peller err: 2040fa4aa2d4SBalaji T K pm_runtime_put_sync(host->dev); 2041a45c6cb8SMadhusudhan Chikkature return ret; 2042a45c6cb8SMadhusudhan Chikkature } 2043a45c6cb8SMadhusudhan Chikkature 2044a45c6cb8SMadhusudhan Chikkature /* Routine to resume the MMC device */ 2045a791daa1SKevin Hilman static int omap_hsmmc_resume(struct device *dev) 2046a45c6cb8SMadhusudhan Chikkature { 2047a45c6cb8SMadhusudhan Chikkature int ret = 0; 2048a791daa1SKevin Hilman struct platform_device *pdev = to_platform_device(dev); 204970a3341aSDenis Karpov struct omap_hsmmc_host *host = platform_get_drvdata(pdev); 2050a45c6cb8SMadhusudhan Chikkature 2051a45c6cb8SMadhusudhan Chikkature if (host && !host->suspended) 2052a45c6cb8SMadhusudhan Chikkature return 0; 2053a45c6cb8SMadhusudhan Chikkature 2054a45c6cb8SMadhusudhan Chikkature if (host) { 2055fa4aa2d4SBalaji T K pm_runtime_get_sync(host->dev); 205611dd62a7SDenis Karpov 20572bec0893SAdrian Hunter if (host->got_dbclk) 20582bec0893SAdrian Hunter clk_enable(host->dbclk); 20592bec0893SAdrian Hunter 206031f9d463SEliad Peller if (!(host->mmc->pm_flags & MMC_PM_KEEP_POWER)) 206170a3341aSDenis Karpov omap_hsmmc_conf_bus_power(host); 20621b331e69SKim Kyuwon 2063a45c6cb8SMadhusudhan Chikkature if (host->pdata->resume) { 2064a45c6cb8SMadhusudhan Chikkature ret = host->pdata->resume(&pdev->dev, host->slot_id); 2065a45c6cb8SMadhusudhan Chikkature if (ret) 2066a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 2067a45c6cb8SMadhusudhan Chikkature "Unmask interrupt failed\n"); 2068a45c6cb8SMadhusudhan Chikkature } 2069a45c6cb8SMadhusudhan Chikkature 2070b62f6228SAdrian Hunter omap_hsmmc_protect_card(host); 2071b62f6228SAdrian Hunter 2072a45c6cb8SMadhusudhan Chikkature /* Notify the core to resume the host */ 2073a45c6cb8SMadhusudhan Chikkature ret = mmc_resume_host(host->mmc); 2074a45c6cb8SMadhusudhan Chikkature if (ret == 0) 2075a45c6cb8SMadhusudhan Chikkature host->suspended = 0; 2076fa4aa2d4SBalaji T K 2077fa4aa2d4SBalaji T K pm_runtime_mark_last_busy(host->dev); 2078fa4aa2d4SBalaji T K pm_runtime_put_autosuspend(host->dev); 2079a45c6cb8SMadhusudhan Chikkature } 2080a45c6cb8SMadhusudhan Chikkature 2081a45c6cb8SMadhusudhan Chikkature return ret; 2082a45c6cb8SMadhusudhan Chikkature 2083a45c6cb8SMadhusudhan Chikkature } 2084a45c6cb8SMadhusudhan Chikkature 2085a45c6cb8SMadhusudhan Chikkature #else 208670a3341aSDenis Karpov #define omap_hsmmc_suspend NULL 208770a3341aSDenis Karpov #define omap_hsmmc_resume NULL 2088a45c6cb8SMadhusudhan Chikkature #endif 2089a45c6cb8SMadhusudhan Chikkature 2090fa4aa2d4SBalaji T K static int omap_hsmmc_runtime_suspend(struct device *dev) 2091fa4aa2d4SBalaji T K { 2092fa4aa2d4SBalaji T K struct omap_hsmmc_host *host; 2093fa4aa2d4SBalaji T K 2094fa4aa2d4SBalaji T K host = platform_get_drvdata(to_platform_device(dev)); 2095fa4aa2d4SBalaji T K omap_hsmmc_context_save(host); 2096fa4aa2d4SBalaji T K dev_dbg(mmc_dev(host->mmc), "disabled\n"); 2097fa4aa2d4SBalaji T K 2098fa4aa2d4SBalaji T K return 0; 2099fa4aa2d4SBalaji T K } 2100fa4aa2d4SBalaji T K 2101fa4aa2d4SBalaji T K static int omap_hsmmc_runtime_resume(struct device *dev) 2102fa4aa2d4SBalaji T K { 2103fa4aa2d4SBalaji T K struct omap_hsmmc_host *host; 2104fa4aa2d4SBalaji T K 2105fa4aa2d4SBalaji T K host = platform_get_drvdata(to_platform_device(dev)); 2106fa4aa2d4SBalaji T K omap_hsmmc_context_restore(host); 2107fa4aa2d4SBalaji T K dev_dbg(mmc_dev(host->mmc), "enabled\n"); 2108fa4aa2d4SBalaji T K 2109fa4aa2d4SBalaji T K return 0; 2110fa4aa2d4SBalaji T K } 2111fa4aa2d4SBalaji T K 2112a791daa1SKevin Hilman static struct dev_pm_ops omap_hsmmc_dev_pm_ops = { 211370a3341aSDenis Karpov .suspend = omap_hsmmc_suspend, 211470a3341aSDenis Karpov .resume = omap_hsmmc_resume, 2115fa4aa2d4SBalaji T K .runtime_suspend = omap_hsmmc_runtime_suspend, 2116fa4aa2d4SBalaji T K .runtime_resume = omap_hsmmc_runtime_resume, 2117a791daa1SKevin Hilman }; 2118a791daa1SKevin Hilman 2119a791daa1SKevin Hilman static struct platform_driver omap_hsmmc_driver = { 2120a791daa1SKevin Hilman .remove = omap_hsmmc_remove, 2121a45c6cb8SMadhusudhan Chikkature .driver = { 2122a45c6cb8SMadhusudhan Chikkature .name = DRIVER_NAME, 2123a45c6cb8SMadhusudhan Chikkature .owner = THIS_MODULE, 2124a791daa1SKevin Hilman .pm = &omap_hsmmc_dev_pm_ops, 2125a45c6cb8SMadhusudhan Chikkature }, 2126a45c6cb8SMadhusudhan Chikkature }; 2127a45c6cb8SMadhusudhan Chikkature 212870a3341aSDenis Karpov static int __init omap_hsmmc_init(void) 2129a45c6cb8SMadhusudhan Chikkature { 2130a45c6cb8SMadhusudhan Chikkature /* Register the MMC driver */ 21318753298aSRoger Quadros return platform_driver_probe(&omap_hsmmc_driver, omap_hsmmc_probe); 2132a45c6cb8SMadhusudhan Chikkature } 2133a45c6cb8SMadhusudhan Chikkature 213470a3341aSDenis Karpov static void __exit omap_hsmmc_cleanup(void) 2135a45c6cb8SMadhusudhan Chikkature { 2136a45c6cb8SMadhusudhan Chikkature /* Unregister MMC driver */ 213770a3341aSDenis Karpov platform_driver_unregister(&omap_hsmmc_driver); 2138a45c6cb8SMadhusudhan Chikkature } 2139a45c6cb8SMadhusudhan Chikkature 214070a3341aSDenis Karpov module_init(omap_hsmmc_init); 214170a3341aSDenis Karpov module_exit(omap_hsmmc_cleanup); 2142a45c6cb8SMadhusudhan Chikkature 2143a45c6cb8SMadhusudhan Chikkature MODULE_DESCRIPTION("OMAP High Speed Multimedia Card driver"); 2144a45c6cb8SMadhusudhan Chikkature MODULE_LICENSE("GPL"); 2145a45c6cb8SMadhusudhan Chikkature MODULE_ALIAS("platform:" DRIVER_NAME); 2146a45c6cb8SMadhusudhan Chikkature MODULE_AUTHOR("Texas Instruments Inc"); 2147