1a45c6cb8SMadhusudhan Chikkature /* 2a45c6cb8SMadhusudhan Chikkature * drivers/mmc/host/omap_hsmmc.c 3a45c6cb8SMadhusudhan Chikkature * 4a45c6cb8SMadhusudhan Chikkature * Driver for OMAP2430/3430 MMC controller. 5a45c6cb8SMadhusudhan Chikkature * 6a45c6cb8SMadhusudhan Chikkature * Copyright (C) 2007 Texas Instruments. 7a45c6cb8SMadhusudhan Chikkature * 8a45c6cb8SMadhusudhan Chikkature * Authors: 9a45c6cb8SMadhusudhan Chikkature * Syed Mohammed Khasim <x0khasim@ti.com> 10a45c6cb8SMadhusudhan Chikkature * Madhusudhan <madhu.cr@ti.com> 11a45c6cb8SMadhusudhan Chikkature * Mohit Jalori <mjalori@ti.com> 12a45c6cb8SMadhusudhan Chikkature * 13a45c6cb8SMadhusudhan Chikkature * This file is licensed under the terms of the GNU General Public License 14a45c6cb8SMadhusudhan Chikkature * version 2. This program is licensed "as is" without any warranty of any 15a45c6cb8SMadhusudhan Chikkature * kind, whether express or implied. 16a45c6cb8SMadhusudhan Chikkature */ 17a45c6cb8SMadhusudhan Chikkature 18a45c6cb8SMadhusudhan Chikkature #include <linux/module.h> 19a45c6cb8SMadhusudhan Chikkature #include <linux/init.h> 20a45c6cb8SMadhusudhan Chikkature #include <linux/interrupt.h> 21a45c6cb8SMadhusudhan Chikkature #include <linux/delay.h> 22a45c6cb8SMadhusudhan Chikkature #include <linux/dma-mapping.h> 23a45c6cb8SMadhusudhan Chikkature #include <linux/platform_device.h> 24a45c6cb8SMadhusudhan Chikkature #include <linux/workqueue.h> 25a45c6cb8SMadhusudhan Chikkature #include <linux/timer.h> 26a45c6cb8SMadhusudhan Chikkature #include <linux/clk.h> 27a45c6cb8SMadhusudhan Chikkature #include <linux/mmc/host.h> 28a45c6cb8SMadhusudhan Chikkature #include <linux/io.h> 29a45c6cb8SMadhusudhan Chikkature #include <linux/semaphore.h> 30a45c6cb8SMadhusudhan Chikkature #include <mach/dma.h> 31a45c6cb8SMadhusudhan Chikkature #include <mach/hardware.h> 32a45c6cb8SMadhusudhan Chikkature #include <mach/board.h> 33a45c6cb8SMadhusudhan Chikkature #include <mach/mmc.h> 34a45c6cb8SMadhusudhan Chikkature #include <mach/cpu.h> 35a45c6cb8SMadhusudhan Chikkature 36a45c6cb8SMadhusudhan Chikkature /* OMAP HSMMC Host Controller Registers */ 37a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_SYSCONFIG 0x0010 38a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_CON 0x002C 39a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_BLK 0x0104 40a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_ARG 0x0108 41a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_CMD 0x010C 42a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP10 0x0110 43a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP32 0x0114 44a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP54 0x0118 45a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP76 0x011C 46a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_DATA 0x0120 47a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_HCTL 0x0128 48a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_SYSCTL 0x012C 49a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_STAT 0x0130 50a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_IE 0x0134 51a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_ISE 0x0138 52a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_CAPA 0x0140 53a45c6cb8SMadhusudhan Chikkature 54a45c6cb8SMadhusudhan Chikkature #define VS18 (1 << 26) 55a45c6cb8SMadhusudhan Chikkature #define VS30 (1 << 25) 56a45c6cb8SMadhusudhan Chikkature #define SDVS18 (0x5 << 9) 57a45c6cb8SMadhusudhan Chikkature #define SDVS30 (0x6 << 9) 58eb250826SDavid Brownell #define SDVS33 (0x7 << 9) 591b331e69SKim Kyuwon #define SDVS_MASK 0x00000E00 60a45c6cb8SMadhusudhan Chikkature #define SDVSCLR 0xFFFFF1FF 61a45c6cb8SMadhusudhan Chikkature #define SDVSDET 0x00000400 62a45c6cb8SMadhusudhan Chikkature #define AUTOIDLE 0x1 63a45c6cb8SMadhusudhan Chikkature #define SDBP (1 << 8) 64a45c6cb8SMadhusudhan Chikkature #define DTO 0xe 65a45c6cb8SMadhusudhan Chikkature #define ICE 0x1 66a45c6cb8SMadhusudhan Chikkature #define ICS 0x2 67a45c6cb8SMadhusudhan Chikkature #define CEN (1 << 2) 68a45c6cb8SMadhusudhan Chikkature #define CLKD_MASK 0x0000FFC0 69a45c6cb8SMadhusudhan Chikkature #define CLKD_SHIFT 6 70a45c6cb8SMadhusudhan Chikkature #define DTO_MASK 0x000F0000 71a45c6cb8SMadhusudhan Chikkature #define DTO_SHIFT 16 72a45c6cb8SMadhusudhan Chikkature #define INT_EN_MASK 0x307F0033 73a45c6cb8SMadhusudhan Chikkature #define INIT_STREAM (1 << 1) 74a45c6cb8SMadhusudhan Chikkature #define DP_SELECT (1 << 21) 75a45c6cb8SMadhusudhan Chikkature #define DDIR (1 << 4) 76a45c6cb8SMadhusudhan Chikkature #define DMA_EN 0x1 77a45c6cb8SMadhusudhan Chikkature #define MSBS (1 << 5) 78a45c6cb8SMadhusudhan Chikkature #define BCE (1 << 1) 79a45c6cb8SMadhusudhan Chikkature #define FOUR_BIT (1 << 1) 80a45c6cb8SMadhusudhan Chikkature #define CC 0x1 81a45c6cb8SMadhusudhan Chikkature #define TC 0x02 82a45c6cb8SMadhusudhan Chikkature #define OD 0x1 83a45c6cb8SMadhusudhan Chikkature #define ERR (1 << 15) 84a45c6cb8SMadhusudhan Chikkature #define CMD_TIMEOUT (1 << 16) 85a45c6cb8SMadhusudhan Chikkature #define DATA_TIMEOUT (1 << 20) 86a45c6cb8SMadhusudhan Chikkature #define CMD_CRC (1 << 17) 87a45c6cb8SMadhusudhan Chikkature #define DATA_CRC (1 << 21) 88a45c6cb8SMadhusudhan Chikkature #define CARD_ERR (1 << 28) 89a45c6cb8SMadhusudhan Chikkature #define STAT_CLEAR 0xFFFFFFFF 90a45c6cb8SMadhusudhan Chikkature #define INIT_STREAM_CMD 0x00000000 91a45c6cb8SMadhusudhan Chikkature #define DUAL_VOLT_OCR_BIT 7 92a45c6cb8SMadhusudhan Chikkature #define SRC (1 << 25) 93a45c6cb8SMadhusudhan Chikkature #define SRD (1 << 26) 94a45c6cb8SMadhusudhan Chikkature 95a45c6cb8SMadhusudhan Chikkature /* 96a45c6cb8SMadhusudhan Chikkature * FIXME: Most likely all the data using these _DEVID defines should come 97a45c6cb8SMadhusudhan Chikkature * from the platform_data, or implemented in controller and slot specific 98a45c6cb8SMadhusudhan Chikkature * functions. 99a45c6cb8SMadhusudhan Chikkature */ 100a45c6cb8SMadhusudhan Chikkature #define OMAP_MMC1_DEVID 0 101a45c6cb8SMadhusudhan Chikkature #define OMAP_MMC2_DEVID 1 102a45c6cb8SMadhusudhan Chikkature 103a45c6cb8SMadhusudhan Chikkature #define OMAP_MMC_DATADIR_NONE 0 104a45c6cb8SMadhusudhan Chikkature #define OMAP_MMC_DATADIR_READ 1 105a45c6cb8SMadhusudhan Chikkature #define OMAP_MMC_DATADIR_WRITE 2 106a45c6cb8SMadhusudhan Chikkature #define MMC_TIMEOUT_MS 20 107a45c6cb8SMadhusudhan Chikkature #define OMAP_MMC_MASTER_CLOCK 96000000 108a45c6cb8SMadhusudhan Chikkature #define DRIVER_NAME "mmci-omap-hs" 109a45c6cb8SMadhusudhan Chikkature 110a45c6cb8SMadhusudhan Chikkature /* 111a45c6cb8SMadhusudhan Chikkature * One controller can have multiple slots, like on some omap boards using 112a45c6cb8SMadhusudhan Chikkature * omap.c controller driver. Luckily this is not currently done on any known 113a45c6cb8SMadhusudhan Chikkature * omap_hsmmc.c device. 114a45c6cb8SMadhusudhan Chikkature */ 115a45c6cb8SMadhusudhan Chikkature #define mmc_slot(host) (host->pdata->slots[host->slot_id]) 116a45c6cb8SMadhusudhan Chikkature 117a45c6cb8SMadhusudhan Chikkature /* 118a45c6cb8SMadhusudhan Chikkature * MMC Host controller read/write API's 119a45c6cb8SMadhusudhan Chikkature */ 120a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_READ(base, reg) \ 121a45c6cb8SMadhusudhan Chikkature __raw_readl((base) + OMAP_HSMMC_##reg) 122a45c6cb8SMadhusudhan Chikkature 123a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_WRITE(base, reg, val) \ 124a45c6cb8SMadhusudhan Chikkature __raw_writel((val), (base) + OMAP_HSMMC_##reg) 125a45c6cb8SMadhusudhan Chikkature 126a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host { 127a45c6cb8SMadhusudhan Chikkature struct device *dev; 128a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc; 129a45c6cb8SMadhusudhan Chikkature struct mmc_request *mrq; 130a45c6cb8SMadhusudhan Chikkature struct mmc_command *cmd; 131a45c6cb8SMadhusudhan Chikkature struct mmc_data *data; 132a45c6cb8SMadhusudhan Chikkature struct clk *fclk; 133a45c6cb8SMadhusudhan Chikkature struct clk *iclk; 134a45c6cb8SMadhusudhan Chikkature struct clk *dbclk; 135a45c6cb8SMadhusudhan Chikkature struct semaphore sem; 136a45c6cb8SMadhusudhan Chikkature struct work_struct mmc_carddetect_work; 137a45c6cb8SMadhusudhan Chikkature void __iomem *base; 138a45c6cb8SMadhusudhan Chikkature resource_size_t mapbase; 139a45c6cb8SMadhusudhan Chikkature unsigned int id; 140a45c6cb8SMadhusudhan Chikkature unsigned int dma_len; 141a45c6cb8SMadhusudhan Chikkature unsigned int dma_dir; 142a45c6cb8SMadhusudhan Chikkature unsigned char bus_mode; 143a45c6cb8SMadhusudhan Chikkature unsigned char datadir; 144a45c6cb8SMadhusudhan Chikkature u32 *buffer; 145a45c6cb8SMadhusudhan Chikkature u32 bytesleft; 146a45c6cb8SMadhusudhan Chikkature int suspended; 147a45c6cb8SMadhusudhan Chikkature int irq; 148a45c6cb8SMadhusudhan Chikkature int carddetect; 149a45c6cb8SMadhusudhan Chikkature int use_dma, dma_ch; 150a45c6cb8SMadhusudhan Chikkature int initstr; 151a45c6cb8SMadhusudhan Chikkature int slot_id; 152a45c6cb8SMadhusudhan Chikkature int dbclk_enabled; 153a45c6cb8SMadhusudhan Chikkature struct omap_mmc_platform_data *pdata; 154a45c6cb8SMadhusudhan Chikkature }; 155a45c6cb8SMadhusudhan Chikkature 156a45c6cb8SMadhusudhan Chikkature /* 157a45c6cb8SMadhusudhan Chikkature * Stop clock to the card 158a45c6cb8SMadhusudhan Chikkature */ 159a45c6cb8SMadhusudhan Chikkature static void omap_mmc_stop_clock(struct mmc_omap_host *host) 160a45c6cb8SMadhusudhan Chikkature { 161a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, 162a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, SYSCTL) & ~CEN); 163a45c6cb8SMadhusudhan Chikkature if ((OMAP_HSMMC_READ(host->base, SYSCTL) & CEN) != 0x0) 164a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "MMC Clock is not stoped\n"); 165a45c6cb8SMadhusudhan Chikkature } 166a45c6cb8SMadhusudhan Chikkature 167a45c6cb8SMadhusudhan Chikkature /* 168a45c6cb8SMadhusudhan Chikkature * Send init stream sequence to card 169a45c6cb8SMadhusudhan Chikkature * before sending IDLE command 170a45c6cb8SMadhusudhan Chikkature */ 171a45c6cb8SMadhusudhan Chikkature static void send_init_stream(struct mmc_omap_host *host) 172a45c6cb8SMadhusudhan Chikkature { 173a45c6cb8SMadhusudhan Chikkature int reg = 0; 174a45c6cb8SMadhusudhan Chikkature unsigned long timeout; 175a45c6cb8SMadhusudhan Chikkature 176a45c6cb8SMadhusudhan Chikkature disable_irq(host->irq); 177a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CON, 178a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, CON) | INIT_STREAM); 179a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CMD, INIT_STREAM_CMD); 180a45c6cb8SMadhusudhan Chikkature 181a45c6cb8SMadhusudhan Chikkature timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 182a45c6cb8SMadhusudhan Chikkature while ((reg != CC) && time_before(jiffies, timeout)) 183a45c6cb8SMadhusudhan Chikkature reg = OMAP_HSMMC_READ(host->base, STAT) & CC; 184a45c6cb8SMadhusudhan Chikkature 185a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CON, 186a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, CON) & ~INIT_STREAM); 187a45c6cb8SMadhusudhan Chikkature enable_irq(host->irq); 188a45c6cb8SMadhusudhan Chikkature } 189a45c6cb8SMadhusudhan Chikkature 190a45c6cb8SMadhusudhan Chikkature static inline 191a45c6cb8SMadhusudhan Chikkature int mmc_omap_cover_is_closed(struct mmc_omap_host *host) 192a45c6cb8SMadhusudhan Chikkature { 193a45c6cb8SMadhusudhan Chikkature int r = 1; 194a45c6cb8SMadhusudhan Chikkature 195a45c6cb8SMadhusudhan Chikkature if (host->pdata->slots[host->slot_id].get_cover_state) 196a45c6cb8SMadhusudhan Chikkature r = host->pdata->slots[host->slot_id].get_cover_state(host->dev, 197a45c6cb8SMadhusudhan Chikkature host->slot_id); 198a45c6cb8SMadhusudhan Chikkature return r; 199a45c6cb8SMadhusudhan Chikkature } 200a45c6cb8SMadhusudhan Chikkature 201a45c6cb8SMadhusudhan Chikkature static ssize_t 202a45c6cb8SMadhusudhan Chikkature mmc_omap_show_cover_switch(struct device *dev, struct device_attribute *attr, 203a45c6cb8SMadhusudhan Chikkature char *buf) 204a45c6cb8SMadhusudhan Chikkature { 205a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev); 206a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = mmc_priv(mmc); 207a45c6cb8SMadhusudhan Chikkature 208a45c6cb8SMadhusudhan Chikkature return sprintf(buf, "%s\n", mmc_omap_cover_is_closed(host) ? "closed" : 209a45c6cb8SMadhusudhan Chikkature "open"); 210a45c6cb8SMadhusudhan Chikkature } 211a45c6cb8SMadhusudhan Chikkature 212a45c6cb8SMadhusudhan Chikkature static DEVICE_ATTR(cover_switch, S_IRUGO, mmc_omap_show_cover_switch, NULL); 213a45c6cb8SMadhusudhan Chikkature 214a45c6cb8SMadhusudhan Chikkature static ssize_t 215a45c6cb8SMadhusudhan Chikkature mmc_omap_show_slot_name(struct device *dev, struct device_attribute *attr, 216a45c6cb8SMadhusudhan Chikkature char *buf) 217a45c6cb8SMadhusudhan Chikkature { 218a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev); 219a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = mmc_priv(mmc); 220a45c6cb8SMadhusudhan Chikkature struct omap_mmc_slot_data slot = host->pdata->slots[host->slot_id]; 221a45c6cb8SMadhusudhan Chikkature 222a45c6cb8SMadhusudhan Chikkature return sprintf(buf, "slot:%s\n", slot.name); 223a45c6cb8SMadhusudhan Chikkature } 224a45c6cb8SMadhusudhan Chikkature 225a45c6cb8SMadhusudhan Chikkature static DEVICE_ATTR(slot_name, S_IRUGO, mmc_omap_show_slot_name, NULL); 226a45c6cb8SMadhusudhan Chikkature 227a45c6cb8SMadhusudhan Chikkature /* 228a45c6cb8SMadhusudhan Chikkature * Configure the response type and send the cmd. 229a45c6cb8SMadhusudhan Chikkature */ 230a45c6cb8SMadhusudhan Chikkature static void 231a45c6cb8SMadhusudhan Chikkature mmc_omap_start_command(struct mmc_omap_host *host, struct mmc_command *cmd, 232a45c6cb8SMadhusudhan Chikkature struct mmc_data *data) 233a45c6cb8SMadhusudhan Chikkature { 234a45c6cb8SMadhusudhan Chikkature int cmdreg = 0, resptype = 0, cmdtype = 0; 235a45c6cb8SMadhusudhan Chikkature 236a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "%s: CMD%d, argument 0x%08x\n", 237a45c6cb8SMadhusudhan Chikkature mmc_hostname(host->mmc), cmd->opcode, cmd->arg); 238a45c6cb8SMadhusudhan Chikkature host->cmd = cmd; 239a45c6cb8SMadhusudhan Chikkature 240a45c6cb8SMadhusudhan Chikkature /* 241a45c6cb8SMadhusudhan Chikkature * Clear status bits and enable interrupts 242a45c6cb8SMadhusudhan Chikkature */ 243a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); 244a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK); 245a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK); 246a45c6cb8SMadhusudhan Chikkature 247a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_PRESENT) { 248a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_136) 249a45c6cb8SMadhusudhan Chikkature resptype = 1; 250a45c6cb8SMadhusudhan Chikkature else 251a45c6cb8SMadhusudhan Chikkature resptype = 2; 252a45c6cb8SMadhusudhan Chikkature } 253a45c6cb8SMadhusudhan Chikkature 254a45c6cb8SMadhusudhan Chikkature /* 255a45c6cb8SMadhusudhan Chikkature * Unlike OMAP1 controller, the cmdtype does not seem to be based on 256a45c6cb8SMadhusudhan Chikkature * ac, bc, adtc, bcr. Only commands ending an open ended transfer need 257a45c6cb8SMadhusudhan Chikkature * a val of 0x3, rest 0x0. 258a45c6cb8SMadhusudhan Chikkature */ 259a45c6cb8SMadhusudhan Chikkature if (cmd == host->mrq->stop) 260a45c6cb8SMadhusudhan Chikkature cmdtype = 0x3; 261a45c6cb8SMadhusudhan Chikkature 262a45c6cb8SMadhusudhan Chikkature cmdreg = (cmd->opcode << 24) | (resptype << 16) | (cmdtype << 22); 263a45c6cb8SMadhusudhan Chikkature 264a45c6cb8SMadhusudhan Chikkature if (data) { 265a45c6cb8SMadhusudhan Chikkature cmdreg |= DP_SELECT | MSBS | BCE; 266a45c6cb8SMadhusudhan Chikkature if (data->flags & MMC_DATA_READ) 267a45c6cb8SMadhusudhan Chikkature cmdreg |= DDIR; 268a45c6cb8SMadhusudhan Chikkature else 269a45c6cb8SMadhusudhan Chikkature cmdreg &= ~(DDIR); 270a45c6cb8SMadhusudhan Chikkature } 271a45c6cb8SMadhusudhan Chikkature 272a45c6cb8SMadhusudhan Chikkature if (host->use_dma) 273a45c6cb8SMadhusudhan Chikkature cmdreg |= DMA_EN; 274a45c6cb8SMadhusudhan Chikkature 275a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, ARG, cmd->arg); 276a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CMD, cmdreg); 277a45c6cb8SMadhusudhan Chikkature } 278a45c6cb8SMadhusudhan Chikkature 279a45c6cb8SMadhusudhan Chikkature /* 280a45c6cb8SMadhusudhan Chikkature * Notify the transfer complete to MMC core 281a45c6cb8SMadhusudhan Chikkature */ 282a45c6cb8SMadhusudhan Chikkature static void 283a45c6cb8SMadhusudhan Chikkature mmc_omap_xfer_done(struct mmc_omap_host *host, struct mmc_data *data) 284a45c6cb8SMadhusudhan Chikkature { 285a45c6cb8SMadhusudhan Chikkature host->data = NULL; 286a45c6cb8SMadhusudhan Chikkature 287a45c6cb8SMadhusudhan Chikkature if (host->use_dma && host->dma_ch != -1) 288a45c6cb8SMadhusudhan Chikkature dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->dma_len, 289a45c6cb8SMadhusudhan Chikkature host->dma_dir); 290a45c6cb8SMadhusudhan Chikkature 291a45c6cb8SMadhusudhan Chikkature host->datadir = OMAP_MMC_DATADIR_NONE; 292a45c6cb8SMadhusudhan Chikkature 293a45c6cb8SMadhusudhan Chikkature if (!data->error) 294a45c6cb8SMadhusudhan Chikkature data->bytes_xfered += data->blocks * (data->blksz); 295a45c6cb8SMadhusudhan Chikkature else 296a45c6cb8SMadhusudhan Chikkature data->bytes_xfered = 0; 297a45c6cb8SMadhusudhan Chikkature 298a45c6cb8SMadhusudhan Chikkature if (!data->stop) { 299a45c6cb8SMadhusudhan Chikkature host->mrq = NULL; 300a45c6cb8SMadhusudhan Chikkature mmc_request_done(host->mmc, data->mrq); 301a45c6cb8SMadhusudhan Chikkature return; 302a45c6cb8SMadhusudhan Chikkature } 303a45c6cb8SMadhusudhan Chikkature mmc_omap_start_command(host, data->stop, NULL); 304a45c6cb8SMadhusudhan Chikkature } 305a45c6cb8SMadhusudhan Chikkature 306a45c6cb8SMadhusudhan Chikkature /* 307a45c6cb8SMadhusudhan Chikkature * Notify the core about command completion 308a45c6cb8SMadhusudhan Chikkature */ 309a45c6cb8SMadhusudhan Chikkature static void 310a45c6cb8SMadhusudhan Chikkature mmc_omap_cmd_done(struct mmc_omap_host *host, struct mmc_command *cmd) 311a45c6cb8SMadhusudhan Chikkature { 312a45c6cb8SMadhusudhan Chikkature host->cmd = NULL; 313a45c6cb8SMadhusudhan Chikkature 314a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_PRESENT) { 315a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_136) { 316a45c6cb8SMadhusudhan Chikkature /* response type 2 */ 317a45c6cb8SMadhusudhan Chikkature cmd->resp[3] = OMAP_HSMMC_READ(host->base, RSP10); 318a45c6cb8SMadhusudhan Chikkature cmd->resp[2] = OMAP_HSMMC_READ(host->base, RSP32); 319a45c6cb8SMadhusudhan Chikkature cmd->resp[1] = OMAP_HSMMC_READ(host->base, RSP54); 320a45c6cb8SMadhusudhan Chikkature cmd->resp[0] = OMAP_HSMMC_READ(host->base, RSP76); 321a45c6cb8SMadhusudhan Chikkature } else { 322a45c6cb8SMadhusudhan Chikkature /* response types 1, 1b, 3, 4, 5, 6 */ 323a45c6cb8SMadhusudhan Chikkature cmd->resp[0] = OMAP_HSMMC_READ(host->base, RSP10); 324a45c6cb8SMadhusudhan Chikkature } 325a45c6cb8SMadhusudhan Chikkature } 326a45c6cb8SMadhusudhan Chikkature if (host->data == NULL || cmd->error) { 327a45c6cb8SMadhusudhan Chikkature host->mrq = NULL; 328a45c6cb8SMadhusudhan Chikkature mmc_request_done(host->mmc, cmd->mrq); 329a45c6cb8SMadhusudhan Chikkature } 330a45c6cb8SMadhusudhan Chikkature } 331a45c6cb8SMadhusudhan Chikkature 332a45c6cb8SMadhusudhan Chikkature /* 333a45c6cb8SMadhusudhan Chikkature * DMA clean up for command errors 334a45c6cb8SMadhusudhan Chikkature */ 335a45c6cb8SMadhusudhan Chikkature static void mmc_dma_cleanup(struct mmc_omap_host *host) 336a45c6cb8SMadhusudhan Chikkature { 337a45c6cb8SMadhusudhan Chikkature host->data->error = -ETIMEDOUT; 338a45c6cb8SMadhusudhan Chikkature 339a45c6cb8SMadhusudhan Chikkature if (host->use_dma && host->dma_ch != -1) { 340a45c6cb8SMadhusudhan Chikkature dma_unmap_sg(mmc_dev(host->mmc), host->data->sg, host->dma_len, 341a45c6cb8SMadhusudhan Chikkature host->dma_dir); 342a45c6cb8SMadhusudhan Chikkature omap_free_dma(host->dma_ch); 343a45c6cb8SMadhusudhan Chikkature host->dma_ch = -1; 344a45c6cb8SMadhusudhan Chikkature up(&host->sem); 345a45c6cb8SMadhusudhan Chikkature } 346a45c6cb8SMadhusudhan Chikkature host->data = NULL; 347a45c6cb8SMadhusudhan Chikkature host->datadir = OMAP_MMC_DATADIR_NONE; 348a45c6cb8SMadhusudhan Chikkature } 349a45c6cb8SMadhusudhan Chikkature 350a45c6cb8SMadhusudhan Chikkature /* 351a45c6cb8SMadhusudhan Chikkature * Readable error output 352a45c6cb8SMadhusudhan Chikkature */ 353a45c6cb8SMadhusudhan Chikkature #ifdef CONFIG_MMC_DEBUG 354a45c6cb8SMadhusudhan Chikkature static void mmc_omap_report_irq(struct mmc_omap_host *host, u32 status) 355a45c6cb8SMadhusudhan Chikkature { 356a45c6cb8SMadhusudhan Chikkature /* --- means reserved bit without definition at documentation */ 357a45c6cb8SMadhusudhan Chikkature static const char *mmc_omap_status_bits[] = { 358a45c6cb8SMadhusudhan Chikkature "CC", "TC", "BGE", "---", "BWR", "BRR", "---", "---", "CIRQ", 359a45c6cb8SMadhusudhan Chikkature "OBI", "---", "---", "---", "---", "---", "ERRI", "CTO", "CCRC", 360a45c6cb8SMadhusudhan Chikkature "CEB", "CIE", "DTO", "DCRC", "DEB", "---", "ACE", "---", 361a45c6cb8SMadhusudhan Chikkature "---", "---", "---", "CERR", "CERR", "BADA", "---", "---", "---" 362a45c6cb8SMadhusudhan Chikkature }; 363a45c6cb8SMadhusudhan Chikkature char res[256]; 364a45c6cb8SMadhusudhan Chikkature char *buf = res; 365a45c6cb8SMadhusudhan Chikkature int len, i; 366a45c6cb8SMadhusudhan Chikkature 367a45c6cb8SMadhusudhan Chikkature len = sprintf(buf, "MMC IRQ 0x%x :", status); 368a45c6cb8SMadhusudhan Chikkature buf += len; 369a45c6cb8SMadhusudhan Chikkature 370a45c6cb8SMadhusudhan Chikkature for (i = 0; i < ARRAY_SIZE(mmc_omap_status_bits); i++) 371a45c6cb8SMadhusudhan Chikkature if (status & (1 << i)) { 372a45c6cb8SMadhusudhan Chikkature len = sprintf(buf, " %s", mmc_omap_status_bits[i]); 373a45c6cb8SMadhusudhan Chikkature buf += len; 374a45c6cb8SMadhusudhan Chikkature } 375a45c6cb8SMadhusudhan Chikkature 376a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "%s\n", res); 377a45c6cb8SMadhusudhan Chikkature } 378a45c6cb8SMadhusudhan Chikkature #endif /* CONFIG_MMC_DEBUG */ 379a45c6cb8SMadhusudhan Chikkature 3803ebf74b1SJean Pihet /* 3813ebf74b1SJean Pihet * MMC controller internal state machines reset 3823ebf74b1SJean Pihet * 3833ebf74b1SJean Pihet * Used to reset command or data internal state machines, using respectively 3843ebf74b1SJean Pihet * SRC or SRD bit of SYSCTL register 3853ebf74b1SJean Pihet * Can be called from interrupt context 3863ebf74b1SJean Pihet */ 3873ebf74b1SJean Pihet static inline void mmc_omap_reset_controller_fsm(struct mmc_omap_host *host, 3883ebf74b1SJean Pihet unsigned long bit) 3893ebf74b1SJean Pihet { 3903ebf74b1SJean Pihet unsigned long i = 0; 3913ebf74b1SJean Pihet unsigned long limit = (loops_per_jiffy * 3923ebf74b1SJean Pihet msecs_to_jiffies(MMC_TIMEOUT_MS)); 3933ebf74b1SJean Pihet 3943ebf74b1SJean Pihet OMAP_HSMMC_WRITE(host->base, SYSCTL, 3953ebf74b1SJean Pihet OMAP_HSMMC_READ(host->base, SYSCTL) | bit); 3963ebf74b1SJean Pihet 3973ebf74b1SJean Pihet while ((OMAP_HSMMC_READ(host->base, SYSCTL) & bit) && 3983ebf74b1SJean Pihet (i++ < limit)) 3993ebf74b1SJean Pihet cpu_relax(); 4003ebf74b1SJean Pihet 4013ebf74b1SJean Pihet if (OMAP_HSMMC_READ(host->base, SYSCTL) & bit) 4023ebf74b1SJean Pihet dev_err(mmc_dev(host->mmc), 4033ebf74b1SJean Pihet "Timeout waiting on controller reset in %s\n", 4043ebf74b1SJean Pihet __func__); 4053ebf74b1SJean Pihet } 406a45c6cb8SMadhusudhan Chikkature 407a45c6cb8SMadhusudhan Chikkature /* 408a45c6cb8SMadhusudhan Chikkature * MMC controller IRQ handler 409a45c6cb8SMadhusudhan Chikkature */ 410a45c6cb8SMadhusudhan Chikkature static irqreturn_t mmc_omap_irq(int irq, void *dev_id) 411a45c6cb8SMadhusudhan Chikkature { 412a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = dev_id; 413a45c6cb8SMadhusudhan Chikkature struct mmc_data *data; 414a45c6cb8SMadhusudhan Chikkature int end_cmd = 0, end_trans = 0, status; 415a45c6cb8SMadhusudhan Chikkature 416a45c6cb8SMadhusudhan Chikkature if (host->cmd == NULL && host->data == NULL) { 417a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, STAT, 418a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, STAT)); 419a45c6cb8SMadhusudhan Chikkature return IRQ_HANDLED; 420a45c6cb8SMadhusudhan Chikkature } 421a45c6cb8SMadhusudhan Chikkature 422a45c6cb8SMadhusudhan Chikkature data = host->data; 423a45c6cb8SMadhusudhan Chikkature status = OMAP_HSMMC_READ(host->base, STAT); 424a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "IRQ Status is %x\n", status); 425a45c6cb8SMadhusudhan Chikkature 426a45c6cb8SMadhusudhan Chikkature if (status & ERR) { 427a45c6cb8SMadhusudhan Chikkature #ifdef CONFIG_MMC_DEBUG 428a45c6cb8SMadhusudhan Chikkature mmc_omap_report_irq(host, status); 429a45c6cb8SMadhusudhan Chikkature #endif 430a45c6cb8SMadhusudhan Chikkature if ((status & CMD_TIMEOUT) || 431a45c6cb8SMadhusudhan Chikkature (status & CMD_CRC)) { 432a45c6cb8SMadhusudhan Chikkature if (host->cmd) { 433a45c6cb8SMadhusudhan Chikkature if (status & CMD_TIMEOUT) { 4343ebf74b1SJean Pihet mmc_omap_reset_controller_fsm(host, SRC); 435a45c6cb8SMadhusudhan Chikkature host->cmd->error = -ETIMEDOUT; 436a45c6cb8SMadhusudhan Chikkature } else { 437a45c6cb8SMadhusudhan Chikkature host->cmd->error = -EILSEQ; 438a45c6cb8SMadhusudhan Chikkature } 439a45c6cb8SMadhusudhan Chikkature end_cmd = 1; 440a45c6cb8SMadhusudhan Chikkature } 441c232f457SJean Pihet if (host->data) { 442a45c6cb8SMadhusudhan Chikkature mmc_dma_cleanup(host); 4433ebf74b1SJean Pihet mmc_omap_reset_controller_fsm(host, SRD); 444c232f457SJean Pihet } 445a45c6cb8SMadhusudhan Chikkature } 446a45c6cb8SMadhusudhan Chikkature if ((status & DATA_TIMEOUT) || 447a45c6cb8SMadhusudhan Chikkature (status & DATA_CRC)) { 448a45c6cb8SMadhusudhan Chikkature if (host->data) { 449a45c6cb8SMadhusudhan Chikkature if (status & DATA_TIMEOUT) 450a45c6cb8SMadhusudhan Chikkature mmc_dma_cleanup(host); 451a45c6cb8SMadhusudhan Chikkature else 452a45c6cb8SMadhusudhan Chikkature host->data->error = -EILSEQ; 4533ebf74b1SJean Pihet mmc_omap_reset_controller_fsm(host, SRD); 454a45c6cb8SMadhusudhan Chikkature end_trans = 1; 455a45c6cb8SMadhusudhan Chikkature } 456a45c6cb8SMadhusudhan Chikkature } 457a45c6cb8SMadhusudhan Chikkature if (status & CARD_ERR) { 458a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 459a45c6cb8SMadhusudhan Chikkature "Ignoring card err CMD%d\n", host->cmd->opcode); 460a45c6cb8SMadhusudhan Chikkature if (host->cmd) 461a45c6cb8SMadhusudhan Chikkature end_cmd = 1; 462a45c6cb8SMadhusudhan Chikkature if (host->data) 463a45c6cb8SMadhusudhan Chikkature end_trans = 1; 464a45c6cb8SMadhusudhan Chikkature } 465a45c6cb8SMadhusudhan Chikkature } 466a45c6cb8SMadhusudhan Chikkature 467a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, STAT, status); 468a45c6cb8SMadhusudhan Chikkature 469a45c6cb8SMadhusudhan Chikkature if (end_cmd || (status & CC)) 470a45c6cb8SMadhusudhan Chikkature mmc_omap_cmd_done(host, host->cmd); 471a45c6cb8SMadhusudhan Chikkature if (end_trans || (status & TC)) 472a45c6cb8SMadhusudhan Chikkature mmc_omap_xfer_done(host, data); 473a45c6cb8SMadhusudhan Chikkature 474a45c6cb8SMadhusudhan Chikkature return IRQ_HANDLED; 475a45c6cb8SMadhusudhan Chikkature } 476a45c6cb8SMadhusudhan Chikkature 477a45c6cb8SMadhusudhan Chikkature /* 478eb250826SDavid Brownell * Switch MMC interface voltage ... only relevant for MMC1. 479eb250826SDavid Brownell * 480eb250826SDavid Brownell * MMC2 and MMC3 use fixed 1.8V levels, and maybe a transceiver. 481eb250826SDavid Brownell * The MMC2 transceiver controls are used instead of DAT4..DAT7. 482eb250826SDavid Brownell * Some chips, like eMMC ones, use internal transceivers. 483a45c6cb8SMadhusudhan Chikkature */ 484a45c6cb8SMadhusudhan Chikkature static int omap_mmc_switch_opcond(struct mmc_omap_host *host, int vdd) 485a45c6cb8SMadhusudhan Chikkature { 486a45c6cb8SMadhusudhan Chikkature u32 reg_val = 0; 487a45c6cb8SMadhusudhan Chikkature int ret; 488a45c6cb8SMadhusudhan Chikkature 489a45c6cb8SMadhusudhan Chikkature /* Disable the clocks */ 490a45c6cb8SMadhusudhan Chikkature clk_disable(host->fclk); 491a45c6cb8SMadhusudhan Chikkature clk_disable(host->iclk); 492a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 493a45c6cb8SMadhusudhan Chikkature 494a45c6cb8SMadhusudhan Chikkature /* Turn the power off */ 495a45c6cb8SMadhusudhan Chikkature ret = mmc_slot(host).set_power(host->dev, host->slot_id, 0, 0); 496a45c6cb8SMadhusudhan Chikkature if (ret != 0) 497a45c6cb8SMadhusudhan Chikkature goto err; 498a45c6cb8SMadhusudhan Chikkature 499a45c6cb8SMadhusudhan Chikkature /* Turn the power ON with given VDD 1.8 or 3.0v */ 500a45c6cb8SMadhusudhan Chikkature ret = mmc_slot(host).set_power(host->dev, host->slot_id, 1, vdd); 501a45c6cb8SMadhusudhan Chikkature if (ret != 0) 502a45c6cb8SMadhusudhan Chikkature goto err; 503a45c6cb8SMadhusudhan Chikkature 504a45c6cb8SMadhusudhan Chikkature clk_enable(host->fclk); 505a45c6cb8SMadhusudhan Chikkature clk_enable(host->iclk); 506a45c6cb8SMadhusudhan Chikkature clk_enable(host->dbclk); 507a45c6cb8SMadhusudhan Chikkature 508a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 509a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) & SDVSCLR); 510a45c6cb8SMadhusudhan Chikkature reg_val = OMAP_HSMMC_READ(host->base, HCTL); 511eb250826SDavid Brownell 512a45c6cb8SMadhusudhan Chikkature /* 513a45c6cb8SMadhusudhan Chikkature * If a MMC dual voltage card is detected, the set_ios fn calls 514a45c6cb8SMadhusudhan Chikkature * this fn with VDD bit set for 1.8V. Upon card removal from the 515a45c6cb8SMadhusudhan Chikkature * slot, omap_mmc_set_ios sets the VDD back to 3V on MMC_POWER_OFF. 516a45c6cb8SMadhusudhan Chikkature * 517eb250826SDavid Brownell * Cope with a bit of slop in the range ... per data sheets: 518eb250826SDavid Brownell * - "1.8V" for vdds_mmc1/vdds_mmc1a can be up to 2.45V max, 519eb250826SDavid Brownell * but recommended values are 1.71V to 1.89V 520eb250826SDavid Brownell * - "3.0V" for vdds_mmc1/vdds_mmc1a can be up to 3.5V max, 521eb250826SDavid Brownell * but recommended values are 2.7V to 3.3V 522eb250826SDavid Brownell * 523eb250826SDavid Brownell * Board setup code shouldn't permit anything very out-of-range. 524eb250826SDavid Brownell * TWL4030-family VMMC1 and VSIM regulators are fine (avoiding the 525eb250826SDavid Brownell * middle range) but VSIM can't power DAT4..DAT7 at more than 3V. 526a45c6cb8SMadhusudhan Chikkature */ 527eb250826SDavid Brownell if ((1 << vdd) <= MMC_VDD_23_24) 528a45c6cb8SMadhusudhan Chikkature reg_val |= SDVS18; 529eb250826SDavid Brownell else 530eb250826SDavid Brownell reg_val |= SDVS30; 531a45c6cb8SMadhusudhan Chikkature 532a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, reg_val); 533a45c6cb8SMadhusudhan Chikkature 534a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 535a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) | SDBP); 536a45c6cb8SMadhusudhan Chikkature 537a45c6cb8SMadhusudhan Chikkature return 0; 538a45c6cb8SMadhusudhan Chikkature err: 539a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Unable to switch operating voltage\n"); 540a45c6cb8SMadhusudhan Chikkature return ret; 541a45c6cb8SMadhusudhan Chikkature } 542a45c6cb8SMadhusudhan Chikkature 543a45c6cb8SMadhusudhan Chikkature /* 544a45c6cb8SMadhusudhan Chikkature * Work Item to notify the core about card insertion/removal 545a45c6cb8SMadhusudhan Chikkature */ 546a45c6cb8SMadhusudhan Chikkature static void mmc_omap_detect(struct work_struct *work) 547a45c6cb8SMadhusudhan Chikkature { 548a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = container_of(work, struct mmc_omap_host, 549a45c6cb8SMadhusudhan Chikkature mmc_carddetect_work); 550249d0fa9SDavid Brownell struct omap_mmc_slot_data *slot = &mmc_slot(host); 551249d0fa9SDavid Brownell 552249d0fa9SDavid Brownell host->carddetect = slot->card_detect(slot->card_detect_irq); 553a45c6cb8SMadhusudhan Chikkature 554a45c6cb8SMadhusudhan Chikkature sysfs_notify(&host->mmc->class_dev.kobj, NULL, "cover_switch"); 555a45c6cb8SMadhusudhan Chikkature if (host->carddetect) { 556a45c6cb8SMadhusudhan Chikkature mmc_detect_change(host->mmc, (HZ * 200) / 1000); 557a45c6cb8SMadhusudhan Chikkature } else { 5583ebf74b1SJean Pihet mmc_omap_reset_controller_fsm(host, SRD); 559a45c6cb8SMadhusudhan Chikkature mmc_detect_change(host->mmc, (HZ * 50) / 1000); 560a45c6cb8SMadhusudhan Chikkature } 561a45c6cb8SMadhusudhan Chikkature } 562a45c6cb8SMadhusudhan Chikkature 563a45c6cb8SMadhusudhan Chikkature /* 564a45c6cb8SMadhusudhan Chikkature * ISR for handling card insertion and removal 565a45c6cb8SMadhusudhan Chikkature */ 566a45c6cb8SMadhusudhan Chikkature static irqreturn_t omap_mmc_cd_handler(int irq, void *dev_id) 567a45c6cb8SMadhusudhan Chikkature { 568a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = (struct mmc_omap_host *)dev_id; 569a45c6cb8SMadhusudhan Chikkature 570a45c6cb8SMadhusudhan Chikkature schedule_work(&host->mmc_carddetect_work); 571a45c6cb8SMadhusudhan Chikkature 572a45c6cb8SMadhusudhan Chikkature return IRQ_HANDLED; 573a45c6cb8SMadhusudhan Chikkature } 574a45c6cb8SMadhusudhan Chikkature 575a45c6cb8SMadhusudhan Chikkature /* 576a45c6cb8SMadhusudhan Chikkature * DMA call back function 577a45c6cb8SMadhusudhan Chikkature */ 578a45c6cb8SMadhusudhan Chikkature static void mmc_omap_dma_cb(int lch, u16 ch_status, void *data) 579a45c6cb8SMadhusudhan Chikkature { 580a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = data; 581a45c6cb8SMadhusudhan Chikkature 582a45c6cb8SMadhusudhan Chikkature if (ch_status & OMAP2_DMA_MISALIGNED_ERR_IRQ) 583a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "MISALIGNED_ADRS_ERR\n"); 584a45c6cb8SMadhusudhan Chikkature 585a45c6cb8SMadhusudhan Chikkature if (host->dma_ch < 0) 586a45c6cb8SMadhusudhan Chikkature return; 587a45c6cb8SMadhusudhan Chikkature 588a45c6cb8SMadhusudhan Chikkature omap_free_dma(host->dma_ch); 589a45c6cb8SMadhusudhan Chikkature host->dma_ch = -1; 590a45c6cb8SMadhusudhan Chikkature /* 591a45c6cb8SMadhusudhan Chikkature * DMA Callback: run in interrupt context. 592a45c6cb8SMadhusudhan Chikkature * mutex_unlock will through a kernel warning if used. 593a45c6cb8SMadhusudhan Chikkature */ 594a45c6cb8SMadhusudhan Chikkature up(&host->sem); 595a45c6cb8SMadhusudhan Chikkature } 596a45c6cb8SMadhusudhan Chikkature 597a45c6cb8SMadhusudhan Chikkature /* 598a45c6cb8SMadhusudhan Chikkature * Configure dma src and destination parameters 599a45c6cb8SMadhusudhan Chikkature */ 600a45c6cb8SMadhusudhan Chikkature static int mmc_omap_config_dma_param(int sync_dir, struct mmc_omap_host *host, 601a45c6cb8SMadhusudhan Chikkature struct mmc_data *data) 602a45c6cb8SMadhusudhan Chikkature { 603a45c6cb8SMadhusudhan Chikkature if (sync_dir == 0) { 604a45c6cb8SMadhusudhan Chikkature omap_set_dma_dest_params(host->dma_ch, 0, 605a45c6cb8SMadhusudhan Chikkature OMAP_DMA_AMODE_CONSTANT, 606a45c6cb8SMadhusudhan Chikkature (host->mapbase + OMAP_HSMMC_DATA), 0, 0); 607a45c6cb8SMadhusudhan Chikkature omap_set_dma_src_params(host->dma_ch, 0, 608a45c6cb8SMadhusudhan Chikkature OMAP_DMA_AMODE_POST_INC, 609a45c6cb8SMadhusudhan Chikkature sg_dma_address(&data->sg[0]), 0, 0); 610a45c6cb8SMadhusudhan Chikkature } else { 611a45c6cb8SMadhusudhan Chikkature omap_set_dma_src_params(host->dma_ch, 0, 612a45c6cb8SMadhusudhan Chikkature OMAP_DMA_AMODE_CONSTANT, 613a45c6cb8SMadhusudhan Chikkature (host->mapbase + OMAP_HSMMC_DATA), 0, 0); 614a45c6cb8SMadhusudhan Chikkature omap_set_dma_dest_params(host->dma_ch, 0, 615a45c6cb8SMadhusudhan Chikkature OMAP_DMA_AMODE_POST_INC, 616a45c6cb8SMadhusudhan Chikkature sg_dma_address(&data->sg[0]), 0, 0); 617a45c6cb8SMadhusudhan Chikkature } 618a45c6cb8SMadhusudhan Chikkature return 0; 619a45c6cb8SMadhusudhan Chikkature } 620a45c6cb8SMadhusudhan Chikkature /* 621a45c6cb8SMadhusudhan Chikkature * Routine to configure and start DMA for the MMC card 622a45c6cb8SMadhusudhan Chikkature */ 623a45c6cb8SMadhusudhan Chikkature static int 624a45c6cb8SMadhusudhan Chikkature mmc_omap_start_dma_transfer(struct mmc_omap_host *host, struct mmc_request *req) 625a45c6cb8SMadhusudhan Chikkature { 626a45c6cb8SMadhusudhan Chikkature int sync_dev, sync_dir = 0; 627a45c6cb8SMadhusudhan Chikkature int dma_ch = 0, ret = 0, err = 1; 628a45c6cb8SMadhusudhan Chikkature struct mmc_data *data = req->data; 629a45c6cb8SMadhusudhan Chikkature 630a45c6cb8SMadhusudhan Chikkature /* 631a45c6cb8SMadhusudhan Chikkature * If for some reason the DMA transfer is still active, 632a45c6cb8SMadhusudhan Chikkature * we wait for timeout period and free the dma 633a45c6cb8SMadhusudhan Chikkature */ 634a45c6cb8SMadhusudhan Chikkature if (host->dma_ch != -1) { 635a45c6cb8SMadhusudhan Chikkature set_current_state(TASK_UNINTERRUPTIBLE); 636a45c6cb8SMadhusudhan Chikkature schedule_timeout(100); 637a45c6cb8SMadhusudhan Chikkature if (down_trylock(&host->sem)) { 638a45c6cb8SMadhusudhan Chikkature omap_free_dma(host->dma_ch); 639a45c6cb8SMadhusudhan Chikkature host->dma_ch = -1; 640a45c6cb8SMadhusudhan Chikkature up(&host->sem); 641a45c6cb8SMadhusudhan Chikkature return err; 642a45c6cb8SMadhusudhan Chikkature } 643a45c6cb8SMadhusudhan Chikkature } else { 644a45c6cb8SMadhusudhan Chikkature if (down_trylock(&host->sem)) 645a45c6cb8SMadhusudhan Chikkature return err; 646a45c6cb8SMadhusudhan Chikkature } 647a45c6cb8SMadhusudhan Chikkature 648a45c6cb8SMadhusudhan Chikkature if (!(data->flags & MMC_DATA_WRITE)) { 649a45c6cb8SMadhusudhan Chikkature host->dma_dir = DMA_FROM_DEVICE; 650a45c6cb8SMadhusudhan Chikkature if (host->id == OMAP_MMC1_DEVID) 651a45c6cb8SMadhusudhan Chikkature sync_dev = OMAP24XX_DMA_MMC1_RX; 652a45c6cb8SMadhusudhan Chikkature else 653a45c6cb8SMadhusudhan Chikkature sync_dev = OMAP24XX_DMA_MMC2_RX; 654a45c6cb8SMadhusudhan Chikkature } else { 655a45c6cb8SMadhusudhan Chikkature host->dma_dir = DMA_TO_DEVICE; 656a45c6cb8SMadhusudhan Chikkature if (host->id == OMAP_MMC1_DEVID) 657a45c6cb8SMadhusudhan Chikkature sync_dev = OMAP24XX_DMA_MMC1_TX; 658a45c6cb8SMadhusudhan Chikkature else 659a45c6cb8SMadhusudhan Chikkature sync_dev = OMAP24XX_DMA_MMC2_TX; 660a45c6cb8SMadhusudhan Chikkature } 661a45c6cb8SMadhusudhan Chikkature 662a45c6cb8SMadhusudhan Chikkature ret = omap_request_dma(sync_dev, "MMC/SD", mmc_omap_dma_cb, 663a45c6cb8SMadhusudhan Chikkature host, &dma_ch); 664a45c6cb8SMadhusudhan Chikkature if (ret != 0) { 665a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 666a45c6cb8SMadhusudhan Chikkature "%s: omap_request_dma() failed with %d\n", 667a45c6cb8SMadhusudhan Chikkature mmc_hostname(host->mmc), ret); 668a45c6cb8SMadhusudhan Chikkature return ret; 669a45c6cb8SMadhusudhan Chikkature } 670a45c6cb8SMadhusudhan Chikkature 671a45c6cb8SMadhusudhan Chikkature host->dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg, 672a45c6cb8SMadhusudhan Chikkature data->sg_len, host->dma_dir); 673a45c6cb8SMadhusudhan Chikkature host->dma_ch = dma_ch; 674a45c6cb8SMadhusudhan Chikkature 675a45c6cb8SMadhusudhan Chikkature if (!(data->flags & MMC_DATA_WRITE)) 676a45c6cb8SMadhusudhan Chikkature mmc_omap_config_dma_param(1, host, data); 677a45c6cb8SMadhusudhan Chikkature else 678a45c6cb8SMadhusudhan Chikkature mmc_omap_config_dma_param(0, host, data); 679a45c6cb8SMadhusudhan Chikkature 680a45c6cb8SMadhusudhan Chikkature if ((data->blksz % 4) == 0) 681a45c6cb8SMadhusudhan Chikkature omap_set_dma_transfer_params(dma_ch, OMAP_DMA_DATA_TYPE_S32, 682a45c6cb8SMadhusudhan Chikkature (data->blksz / 4), data->blocks, OMAP_DMA_SYNC_FRAME, 683a45c6cb8SMadhusudhan Chikkature sync_dev, sync_dir); 684a45c6cb8SMadhusudhan Chikkature else 685a45c6cb8SMadhusudhan Chikkature /* REVISIT: The MMC buffer increments only when MSB is written. 686a45c6cb8SMadhusudhan Chikkature * Return error for blksz which is non multiple of four. 687a45c6cb8SMadhusudhan Chikkature */ 688a45c6cb8SMadhusudhan Chikkature return -EINVAL; 689a45c6cb8SMadhusudhan Chikkature 690a45c6cb8SMadhusudhan Chikkature omap_start_dma(dma_ch); 691a45c6cb8SMadhusudhan Chikkature return 0; 692a45c6cb8SMadhusudhan Chikkature } 693a45c6cb8SMadhusudhan Chikkature 694a45c6cb8SMadhusudhan Chikkature static void set_data_timeout(struct mmc_omap_host *host, 695a45c6cb8SMadhusudhan Chikkature struct mmc_request *req) 696a45c6cb8SMadhusudhan Chikkature { 697a45c6cb8SMadhusudhan Chikkature unsigned int timeout, cycle_ns; 698a45c6cb8SMadhusudhan Chikkature uint32_t reg, clkd, dto = 0; 699a45c6cb8SMadhusudhan Chikkature 700a45c6cb8SMadhusudhan Chikkature reg = OMAP_HSMMC_READ(host->base, SYSCTL); 701a45c6cb8SMadhusudhan Chikkature clkd = (reg & CLKD_MASK) >> CLKD_SHIFT; 702a45c6cb8SMadhusudhan Chikkature if (clkd == 0) 703a45c6cb8SMadhusudhan Chikkature clkd = 1; 704a45c6cb8SMadhusudhan Chikkature 705a45c6cb8SMadhusudhan Chikkature cycle_ns = 1000000000 / (clk_get_rate(host->fclk) / clkd); 706a45c6cb8SMadhusudhan Chikkature timeout = req->data->timeout_ns / cycle_ns; 707a45c6cb8SMadhusudhan Chikkature timeout += req->data->timeout_clks; 708a45c6cb8SMadhusudhan Chikkature if (timeout) { 709a45c6cb8SMadhusudhan Chikkature while ((timeout & 0x80000000) == 0) { 710a45c6cb8SMadhusudhan Chikkature dto += 1; 711a45c6cb8SMadhusudhan Chikkature timeout <<= 1; 712a45c6cb8SMadhusudhan Chikkature } 713a45c6cb8SMadhusudhan Chikkature dto = 31 - dto; 714a45c6cb8SMadhusudhan Chikkature timeout <<= 1; 715a45c6cb8SMadhusudhan Chikkature if (timeout && dto) 716a45c6cb8SMadhusudhan Chikkature dto += 1; 717a45c6cb8SMadhusudhan Chikkature if (dto >= 13) 718a45c6cb8SMadhusudhan Chikkature dto -= 13; 719a45c6cb8SMadhusudhan Chikkature else 720a45c6cb8SMadhusudhan Chikkature dto = 0; 721a45c6cb8SMadhusudhan Chikkature if (dto > 14) 722a45c6cb8SMadhusudhan Chikkature dto = 14; 723a45c6cb8SMadhusudhan Chikkature } 724a45c6cb8SMadhusudhan Chikkature 725a45c6cb8SMadhusudhan Chikkature reg &= ~DTO_MASK; 726a45c6cb8SMadhusudhan Chikkature reg |= dto << DTO_SHIFT; 727a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, reg); 728a45c6cb8SMadhusudhan Chikkature } 729a45c6cb8SMadhusudhan Chikkature 730a45c6cb8SMadhusudhan Chikkature /* 731a45c6cb8SMadhusudhan Chikkature * Configure block length for MMC/SD cards and initiate the transfer. 732a45c6cb8SMadhusudhan Chikkature */ 733a45c6cb8SMadhusudhan Chikkature static int 734a45c6cb8SMadhusudhan Chikkature mmc_omap_prepare_data(struct mmc_omap_host *host, struct mmc_request *req) 735a45c6cb8SMadhusudhan Chikkature { 736a45c6cb8SMadhusudhan Chikkature int ret; 737a45c6cb8SMadhusudhan Chikkature host->data = req->data; 738a45c6cb8SMadhusudhan Chikkature 739a45c6cb8SMadhusudhan Chikkature if (req->data == NULL) { 740a45c6cb8SMadhusudhan Chikkature host->datadir = OMAP_MMC_DATADIR_NONE; 741a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, BLK, 0); 742a45c6cb8SMadhusudhan Chikkature return 0; 743a45c6cb8SMadhusudhan Chikkature } 744a45c6cb8SMadhusudhan Chikkature 745a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, BLK, (req->data->blksz) 746a45c6cb8SMadhusudhan Chikkature | (req->data->blocks << 16)); 747a45c6cb8SMadhusudhan Chikkature set_data_timeout(host, req); 748a45c6cb8SMadhusudhan Chikkature 749a45c6cb8SMadhusudhan Chikkature host->datadir = (req->data->flags & MMC_DATA_WRITE) ? 750a45c6cb8SMadhusudhan Chikkature OMAP_MMC_DATADIR_WRITE : OMAP_MMC_DATADIR_READ; 751a45c6cb8SMadhusudhan Chikkature 752a45c6cb8SMadhusudhan Chikkature if (host->use_dma) { 753a45c6cb8SMadhusudhan Chikkature ret = mmc_omap_start_dma_transfer(host, req); 754a45c6cb8SMadhusudhan Chikkature if (ret != 0) { 755a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "MMC start dma failure\n"); 756a45c6cb8SMadhusudhan Chikkature return ret; 757a45c6cb8SMadhusudhan Chikkature } 758a45c6cb8SMadhusudhan Chikkature } 759a45c6cb8SMadhusudhan Chikkature return 0; 760a45c6cb8SMadhusudhan Chikkature } 761a45c6cb8SMadhusudhan Chikkature 762a45c6cb8SMadhusudhan Chikkature /* 763a45c6cb8SMadhusudhan Chikkature * Request function. for read/write operation 764a45c6cb8SMadhusudhan Chikkature */ 765a45c6cb8SMadhusudhan Chikkature static void omap_mmc_request(struct mmc_host *mmc, struct mmc_request *req) 766a45c6cb8SMadhusudhan Chikkature { 767a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = mmc_priv(mmc); 768a45c6cb8SMadhusudhan Chikkature 769a45c6cb8SMadhusudhan Chikkature WARN_ON(host->mrq != NULL); 770a45c6cb8SMadhusudhan Chikkature host->mrq = req; 771a45c6cb8SMadhusudhan Chikkature mmc_omap_prepare_data(host, req); 772a45c6cb8SMadhusudhan Chikkature mmc_omap_start_command(host, req->cmd, req->data); 773a45c6cb8SMadhusudhan Chikkature } 774a45c6cb8SMadhusudhan Chikkature 775a45c6cb8SMadhusudhan Chikkature 776a45c6cb8SMadhusudhan Chikkature /* Routine to configure clock values. Exposed API to core */ 777a45c6cb8SMadhusudhan Chikkature static void omap_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 778a45c6cb8SMadhusudhan Chikkature { 779a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = mmc_priv(mmc); 780a45c6cb8SMadhusudhan Chikkature u16 dsor = 0; 781a45c6cb8SMadhusudhan Chikkature unsigned long regval; 782a45c6cb8SMadhusudhan Chikkature unsigned long timeout; 783a45c6cb8SMadhusudhan Chikkature 784a45c6cb8SMadhusudhan Chikkature switch (ios->power_mode) { 785a45c6cb8SMadhusudhan Chikkature case MMC_POWER_OFF: 786a45c6cb8SMadhusudhan Chikkature mmc_slot(host).set_power(host->dev, host->slot_id, 0, 0); 787a45c6cb8SMadhusudhan Chikkature break; 788a45c6cb8SMadhusudhan Chikkature case MMC_POWER_UP: 789a45c6cb8SMadhusudhan Chikkature mmc_slot(host).set_power(host->dev, host->slot_id, 1, ios->vdd); 790a45c6cb8SMadhusudhan Chikkature break; 791a45c6cb8SMadhusudhan Chikkature } 792a45c6cb8SMadhusudhan Chikkature 793a45c6cb8SMadhusudhan Chikkature switch (mmc->ios.bus_width) { 794a45c6cb8SMadhusudhan Chikkature case MMC_BUS_WIDTH_4: 795a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 796a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) | FOUR_BIT); 797a45c6cb8SMadhusudhan Chikkature break; 798a45c6cb8SMadhusudhan Chikkature case MMC_BUS_WIDTH_1: 799a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 800a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) & ~FOUR_BIT); 801a45c6cb8SMadhusudhan Chikkature break; 802a45c6cb8SMadhusudhan Chikkature } 803a45c6cb8SMadhusudhan Chikkature 804a45c6cb8SMadhusudhan Chikkature if (host->id == OMAP_MMC1_DEVID) { 805eb250826SDavid Brownell /* Only MMC1 can interface at 3V without some flavor 806eb250826SDavid Brownell * of external transceiver; but they all handle 1.8V. 807eb250826SDavid Brownell */ 808a45c6cb8SMadhusudhan Chikkature if ((OMAP_HSMMC_READ(host->base, HCTL) & SDVSDET) && 809a45c6cb8SMadhusudhan Chikkature (ios->vdd == DUAL_VOLT_OCR_BIT)) { 810a45c6cb8SMadhusudhan Chikkature /* 811a45c6cb8SMadhusudhan Chikkature * The mmc_select_voltage fn of the core does 812a45c6cb8SMadhusudhan Chikkature * not seem to set the power_mode to 813a45c6cb8SMadhusudhan Chikkature * MMC_POWER_UP upon recalculating the voltage. 814a45c6cb8SMadhusudhan Chikkature * vdd 1.8v. 815a45c6cb8SMadhusudhan Chikkature */ 816a45c6cb8SMadhusudhan Chikkature if (omap_mmc_switch_opcond(host, ios->vdd) != 0) 817a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 818a45c6cb8SMadhusudhan Chikkature "Switch operation failed\n"); 819a45c6cb8SMadhusudhan Chikkature } 820a45c6cb8SMadhusudhan Chikkature } 821a45c6cb8SMadhusudhan Chikkature 822a45c6cb8SMadhusudhan Chikkature if (ios->clock) { 823a45c6cb8SMadhusudhan Chikkature dsor = OMAP_MMC_MASTER_CLOCK / ios->clock; 824a45c6cb8SMadhusudhan Chikkature if (dsor < 1) 825a45c6cb8SMadhusudhan Chikkature dsor = 1; 826a45c6cb8SMadhusudhan Chikkature 827a45c6cb8SMadhusudhan Chikkature if (OMAP_MMC_MASTER_CLOCK / dsor > ios->clock) 828a45c6cb8SMadhusudhan Chikkature dsor++; 829a45c6cb8SMadhusudhan Chikkature 830a45c6cb8SMadhusudhan Chikkature if (dsor > 250) 831a45c6cb8SMadhusudhan Chikkature dsor = 250; 832a45c6cb8SMadhusudhan Chikkature } 833a45c6cb8SMadhusudhan Chikkature omap_mmc_stop_clock(host); 834a45c6cb8SMadhusudhan Chikkature regval = OMAP_HSMMC_READ(host->base, SYSCTL); 835a45c6cb8SMadhusudhan Chikkature regval = regval & ~(CLKD_MASK); 836a45c6cb8SMadhusudhan Chikkature regval = regval | (dsor << 6) | (DTO << 16); 837a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, regval); 838a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, 839a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, SYSCTL) | ICE); 840a45c6cb8SMadhusudhan Chikkature 841a45c6cb8SMadhusudhan Chikkature /* Wait till the ICS bit is set */ 842a45c6cb8SMadhusudhan Chikkature timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 843a45c6cb8SMadhusudhan Chikkature while ((OMAP_HSMMC_READ(host->base, SYSCTL) & ICS) != 0x2 844a45c6cb8SMadhusudhan Chikkature && time_before(jiffies, timeout)) 845a45c6cb8SMadhusudhan Chikkature msleep(1); 846a45c6cb8SMadhusudhan Chikkature 847a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, 848a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, SYSCTL) | CEN); 849a45c6cb8SMadhusudhan Chikkature 850a45c6cb8SMadhusudhan Chikkature if (ios->power_mode == MMC_POWER_ON) 851a45c6cb8SMadhusudhan Chikkature send_init_stream(host); 852a45c6cb8SMadhusudhan Chikkature 853a45c6cb8SMadhusudhan Chikkature if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN) 854a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CON, 855a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, CON) | OD); 856a45c6cb8SMadhusudhan Chikkature } 857a45c6cb8SMadhusudhan Chikkature 858a45c6cb8SMadhusudhan Chikkature static int omap_hsmmc_get_cd(struct mmc_host *mmc) 859a45c6cb8SMadhusudhan Chikkature { 860a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = mmc_priv(mmc); 861a45c6cb8SMadhusudhan Chikkature struct omap_mmc_platform_data *pdata = host->pdata; 862a45c6cb8SMadhusudhan Chikkature 863a45c6cb8SMadhusudhan Chikkature if (!pdata->slots[0].card_detect) 864a45c6cb8SMadhusudhan Chikkature return -ENOSYS; 865a45c6cb8SMadhusudhan Chikkature return pdata->slots[0].card_detect(pdata->slots[0].card_detect_irq); 866a45c6cb8SMadhusudhan Chikkature } 867a45c6cb8SMadhusudhan Chikkature 868a45c6cb8SMadhusudhan Chikkature static int omap_hsmmc_get_ro(struct mmc_host *mmc) 869a45c6cb8SMadhusudhan Chikkature { 870a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = mmc_priv(mmc); 871a45c6cb8SMadhusudhan Chikkature struct omap_mmc_platform_data *pdata = host->pdata; 872a45c6cb8SMadhusudhan Chikkature 873a45c6cb8SMadhusudhan Chikkature if (!pdata->slots[0].get_ro) 874a45c6cb8SMadhusudhan Chikkature return -ENOSYS; 875a45c6cb8SMadhusudhan Chikkature return pdata->slots[0].get_ro(host->dev, 0); 876a45c6cb8SMadhusudhan Chikkature } 877a45c6cb8SMadhusudhan Chikkature 8781b331e69SKim Kyuwon static void omap_hsmmc_init(struct mmc_omap_host *host) 8791b331e69SKim Kyuwon { 8801b331e69SKim Kyuwon u32 hctl, capa, value; 8811b331e69SKim Kyuwon 8821b331e69SKim Kyuwon /* Only MMC1 supports 3.0V */ 8831b331e69SKim Kyuwon if (host->id == OMAP_MMC1_DEVID) { 8841b331e69SKim Kyuwon hctl = SDVS30; 8851b331e69SKim Kyuwon capa = VS30 | VS18; 8861b331e69SKim Kyuwon } else { 8871b331e69SKim Kyuwon hctl = SDVS18; 8881b331e69SKim Kyuwon capa = VS18; 8891b331e69SKim Kyuwon } 8901b331e69SKim Kyuwon 8911b331e69SKim Kyuwon value = OMAP_HSMMC_READ(host->base, HCTL) & ~SDVS_MASK; 8921b331e69SKim Kyuwon OMAP_HSMMC_WRITE(host->base, HCTL, value | hctl); 8931b331e69SKim Kyuwon 8941b331e69SKim Kyuwon value = OMAP_HSMMC_READ(host->base, CAPA); 8951b331e69SKim Kyuwon OMAP_HSMMC_WRITE(host->base, CAPA, value | capa); 8961b331e69SKim Kyuwon 8971b331e69SKim Kyuwon /* Set the controller to AUTO IDLE mode */ 8981b331e69SKim Kyuwon value = OMAP_HSMMC_READ(host->base, SYSCONFIG); 8991b331e69SKim Kyuwon OMAP_HSMMC_WRITE(host->base, SYSCONFIG, value | AUTOIDLE); 9001b331e69SKim Kyuwon 9011b331e69SKim Kyuwon /* Set SD bus power bit */ 9021b331e69SKim Kyuwon value = OMAP_HSMMC_READ(host->base, HCTL); 9031b331e69SKim Kyuwon OMAP_HSMMC_WRITE(host->base, HCTL, value | SDBP); 9041b331e69SKim Kyuwon } 9051b331e69SKim Kyuwon 906a45c6cb8SMadhusudhan Chikkature static struct mmc_host_ops mmc_omap_ops = { 907a45c6cb8SMadhusudhan Chikkature .request = omap_mmc_request, 908a45c6cb8SMadhusudhan Chikkature .set_ios = omap_mmc_set_ios, 909a45c6cb8SMadhusudhan Chikkature .get_cd = omap_hsmmc_get_cd, 910a45c6cb8SMadhusudhan Chikkature .get_ro = omap_hsmmc_get_ro, 911a45c6cb8SMadhusudhan Chikkature /* NYET -- enable_sdio_irq */ 912a45c6cb8SMadhusudhan Chikkature }; 913a45c6cb8SMadhusudhan Chikkature 914a45c6cb8SMadhusudhan Chikkature static int __init omap_mmc_probe(struct platform_device *pdev) 915a45c6cb8SMadhusudhan Chikkature { 916a45c6cb8SMadhusudhan Chikkature struct omap_mmc_platform_data *pdata = pdev->dev.platform_data; 917a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc; 918a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = NULL; 919a45c6cb8SMadhusudhan Chikkature struct resource *res; 920a45c6cb8SMadhusudhan Chikkature int ret = 0, irq; 921a45c6cb8SMadhusudhan Chikkature 922a45c6cb8SMadhusudhan Chikkature if (pdata == NULL) { 923a45c6cb8SMadhusudhan Chikkature dev_err(&pdev->dev, "Platform Data is missing\n"); 924a45c6cb8SMadhusudhan Chikkature return -ENXIO; 925a45c6cb8SMadhusudhan Chikkature } 926a45c6cb8SMadhusudhan Chikkature 927a45c6cb8SMadhusudhan Chikkature if (pdata->nr_slots == 0) { 928a45c6cb8SMadhusudhan Chikkature dev_err(&pdev->dev, "No Slots\n"); 929a45c6cb8SMadhusudhan Chikkature return -ENXIO; 930a45c6cb8SMadhusudhan Chikkature } 931a45c6cb8SMadhusudhan Chikkature 932a45c6cb8SMadhusudhan Chikkature res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 933a45c6cb8SMadhusudhan Chikkature irq = platform_get_irq(pdev, 0); 934a45c6cb8SMadhusudhan Chikkature if (res == NULL || irq < 0) 935a45c6cb8SMadhusudhan Chikkature return -ENXIO; 936a45c6cb8SMadhusudhan Chikkature 937a45c6cb8SMadhusudhan Chikkature res = request_mem_region(res->start, res->end - res->start + 1, 938a45c6cb8SMadhusudhan Chikkature pdev->name); 939a45c6cb8SMadhusudhan Chikkature if (res == NULL) 940a45c6cb8SMadhusudhan Chikkature return -EBUSY; 941a45c6cb8SMadhusudhan Chikkature 942a45c6cb8SMadhusudhan Chikkature mmc = mmc_alloc_host(sizeof(struct mmc_omap_host), &pdev->dev); 943a45c6cb8SMadhusudhan Chikkature if (!mmc) { 944a45c6cb8SMadhusudhan Chikkature ret = -ENOMEM; 945a45c6cb8SMadhusudhan Chikkature goto err; 946a45c6cb8SMadhusudhan Chikkature } 947a45c6cb8SMadhusudhan Chikkature 948a45c6cb8SMadhusudhan Chikkature host = mmc_priv(mmc); 949a45c6cb8SMadhusudhan Chikkature host->mmc = mmc; 950a45c6cb8SMadhusudhan Chikkature host->pdata = pdata; 951a45c6cb8SMadhusudhan Chikkature host->dev = &pdev->dev; 952a45c6cb8SMadhusudhan Chikkature host->use_dma = 1; 953a45c6cb8SMadhusudhan Chikkature host->dev->dma_mask = &pdata->dma_mask; 954a45c6cb8SMadhusudhan Chikkature host->dma_ch = -1; 955a45c6cb8SMadhusudhan Chikkature host->irq = irq; 956a45c6cb8SMadhusudhan Chikkature host->id = pdev->id; 957a45c6cb8SMadhusudhan Chikkature host->slot_id = 0; 958a45c6cb8SMadhusudhan Chikkature host->mapbase = res->start; 959a45c6cb8SMadhusudhan Chikkature host->base = ioremap(host->mapbase, SZ_4K); 960a45c6cb8SMadhusudhan Chikkature 961a45c6cb8SMadhusudhan Chikkature platform_set_drvdata(pdev, host); 962a45c6cb8SMadhusudhan Chikkature INIT_WORK(&host->mmc_carddetect_work, mmc_omap_detect); 963a45c6cb8SMadhusudhan Chikkature 964a45c6cb8SMadhusudhan Chikkature mmc->ops = &mmc_omap_ops; 965a45c6cb8SMadhusudhan Chikkature mmc->f_min = 400000; 966a45c6cb8SMadhusudhan Chikkature mmc->f_max = 52000000; 967a45c6cb8SMadhusudhan Chikkature 968a45c6cb8SMadhusudhan Chikkature sema_init(&host->sem, 1); 969a45c6cb8SMadhusudhan Chikkature 970a45c6cb8SMadhusudhan Chikkature host->iclk = clk_get(&pdev->dev, "mmchs_ick"); 971a45c6cb8SMadhusudhan Chikkature if (IS_ERR(host->iclk)) { 972a45c6cb8SMadhusudhan Chikkature ret = PTR_ERR(host->iclk); 973a45c6cb8SMadhusudhan Chikkature host->iclk = NULL; 974a45c6cb8SMadhusudhan Chikkature goto err1; 975a45c6cb8SMadhusudhan Chikkature } 976a45c6cb8SMadhusudhan Chikkature host->fclk = clk_get(&pdev->dev, "mmchs_fck"); 977a45c6cb8SMadhusudhan Chikkature if (IS_ERR(host->fclk)) { 978a45c6cb8SMadhusudhan Chikkature ret = PTR_ERR(host->fclk); 979a45c6cb8SMadhusudhan Chikkature host->fclk = NULL; 980a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 981a45c6cb8SMadhusudhan Chikkature goto err1; 982a45c6cb8SMadhusudhan Chikkature } 983a45c6cb8SMadhusudhan Chikkature 984a45c6cb8SMadhusudhan Chikkature if (clk_enable(host->fclk) != 0) { 985a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 986a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 987a45c6cb8SMadhusudhan Chikkature goto err1; 988a45c6cb8SMadhusudhan Chikkature } 989a45c6cb8SMadhusudhan Chikkature 990a45c6cb8SMadhusudhan Chikkature if (clk_enable(host->iclk) != 0) { 991a45c6cb8SMadhusudhan Chikkature clk_disable(host->fclk); 992a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 993a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 994a45c6cb8SMadhusudhan Chikkature goto err1; 995a45c6cb8SMadhusudhan Chikkature } 996a45c6cb8SMadhusudhan Chikkature 997a45c6cb8SMadhusudhan Chikkature host->dbclk = clk_get(&pdev->dev, "mmchsdb_fck"); 998a45c6cb8SMadhusudhan Chikkature /* 999a45c6cb8SMadhusudhan Chikkature * MMC can still work without debounce clock. 1000a45c6cb8SMadhusudhan Chikkature */ 1001a45c6cb8SMadhusudhan Chikkature if (IS_ERR(host->dbclk)) 1002a45c6cb8SMadhusudhan Chikkature dev_warn(mmc_dev(host->mmc), "Failed to get debounce clock\n"); 1003a45c6cb8SMadhusudhan Chikkature else 1004a45c6cb8SMadhusudhan Chikkature if (clk_enable(host->dbclk) != 0) 1005a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Enabling debounce" 1006a45c6cb8SMadhusudhan Chikkature " clk failed\n"); 1007a45c6cb8SMadhusudhan Chikkature else 1008a45c6cb8SMadhusudhan Chikkature host->dbclk_enabled = 1; 1009a45c6cb8SMadhusudhan Chikkature 1010a45c6cb8SMadhusudhan Chikkature #ifdef CONFIG_MMC_BLOCK_BOUNCE 1011a45c6cb8SMadhusudhan Chikkature mmc->max_phys_segs = 1; 1012a45c6cb8SMadhusudhan Chikkature mmc->max_hw_segs = 1; 1013a45c6cb8SMadhusudhan Chikkature #endif 1014a45c6cb8SMadhusudhan Chikkature mmc->max_blk_size = 512; /* Block Length at max can be 1024 */ 1015a45c6cb8SMadhusudhan Chikkature mmc->max_blk_count = 0xFFFF; /* No. of Blocks is 16 bits */ 1016a45c6cb8SMadhusudhan Chikkature mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; 1017a45c6cb8SMadhusudhan Chikkature mmc->max_seg_size = mmc->max_req_size; 1018a45c6cb8SMadhusudhan Chikkature 1019a45c6cb8SMadhusudhan Chikkature mmc->ocr_avail = mmc_slot(host).ocr_mask; 1020a45c6cb8SMadhusudhan Chikkature mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED; 1021a45c6cb8SMadhusudhan Chikkature 1022a45c6cb8SMadhusudhan Chikkature if (pdata->slots[host->slot_id].wires >= 4) 1023a45c6cb8SMadhusudhan Chikkature mmc->caps |= MMC_CAP_4_BIT_DATA; 1024a45c6cb8SMadhusudhan Chikkature 10251b331e69SKim Kyuwon omap_hsmmc_init(host); 1026a45c6cb8SMadhusudhan Chikkature 1027a45c6cb8SMadhusudhan Chikkature /* Request IRQ for MMC operations */ 1028a45c6cb8SMadhusudhan Chikkature ret = request_irq(host->irq, mmc_omap_irq, IRQF_DISABLED, 1029a45c6cb8SMadhusudhan Chikkature mmc_hostname(mmc), host); 1030a45c6cb8SMadhusudhan Chikkature if (ret) { 1031a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Unable to grab HSMMC IRQ\n"); 1032a45c6cb8SMadhusudhan Chikkature goto err_irq; 1033a45c6cb8SMadhusudhan Chikkature } 1034a45c6cb8SMadhusudhan Chikkature 1035a45c6cb8SMadhusudhan Chikkature if (pdata->init != NULL) { 1036a45c6cb8SMadhusudhan Chikkature if (pdata->init(&pdev->dev) != 0) { 1037a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1038a45c6cb8SMadhusudhan Chikkature "Unable to configure MMC IRQs\n"); 1039a45c6cb8SMadhusudhan Chikkature goto err_irq_cd_init; 1040a45c6cb8SMadhusudhan Chikkature } 1041a45c6cb8SMadhusudhan Chikkature } 1042a45c6cb8SMadhusudhan Chikkature 1043a45c6cb8SMadhusudhan Chikkature /* Request IRQ for card detect */ 1044a45c6cb8SMadhusudhan Chikkature if ((mmc_slot(host).card_detect_irq) && (mmc_slot(host).card_detect)) { 1045a45c6cb8SMadhusudhan Chikkature ret = request_irq(mmc_slot(host).card_detect_irq, 1046a45c6cb8SMadhusudhan Chikkature omap_mmc_cd_handler, 1047a45c6cb8SMadhusudhan Chikkature IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING 1048a45c6cb8SMadhusudhan Chikkature | IRQF_DISABLED, 1049a45c6cb8SMadhusudhan Chikkature mmc_hostname(mmc), host); 1050a45c6cb8SMadhusudhan Chikkature if (ret) { 1051a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1052a45c6cb8SMadhusudhan Chikkature "Unable to grab MMC CD IRQ\n"); 1053a45c6cb8SMadhusudhan Chikkature goto err_irq_cd; 1054a45c6cb8SMadhusudhan Chikkature } 1055a45c6cb8SMadhusudhan Chikkature } 1056a45c6cb8SMadhusudhan Chikkature 1057a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, ISE, INT_EN_MASK); 1058a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK); 1059a45c6cb8SMadhusudhan Chikkature 1060a45c6cb8SMadhusudhan Chikkature mmc_add_host(mmc); 1061a45c6cb8SMadhusudhan Chikkature 1062a45c6cb8SMadhusudhan Chikkature if (host->pdata->slots[host->slot_id].name != NULL) { 1063a45c6cb8SMadhusudhan Chikkature ret = device_create_file(&mmc->class_dev, &dev_attr_slot_name); 1064a45c6cb8SMadhusudhan Chikkature if (ret < 0) 1065a45c6cb8SMadhusudhan Chikkature goto err_slot_name; 1066a45c6cb8SMadhusudhan Chikkature } 1067a45c6cb8SMadhusudhan Chikkature if (mmc_slot(host).card_detect_irq && mmc_slot(host).card_detect && 1068a45c6cb8SMadhusudhan Chikkature host->pdata->slots[host->slot_id].get_cover_state) { 1069a45c6cb8SMadhusudhan Chikkature ret = device_create_file(&mmc->class_dev, 1070a45c6cb8SMadhusudhan Chikkature &dev_attr_cover_switch); 1071a45c6cb8SMadhusudhan Chikkature if (ret < 0) 1072a45c6cb8SMadhusudhan Chikkature goto err_cover_switch; 1073a45c6cb8SMadhusudhan Chikkature } 1074a45c6cb8SMadhusudhan Chikkature 1075a45c6cb8SMadhusudhan Chikkature return 0; 1076a45c6cb8SMadhusudhan Chikkature 1077a45c6cb8SMadhusudhan Chikkature err_cover_switch: 1078a45c6cb8SMadhusudhan Chikkature device_remove_file(&mmc->class_dev, &dev_attr_cover_switch); 1079a45c6cb8SMadhusudhan Chikkature err_slot_name: 1080a45c6cb8SMadhusudhan Chikkature mmc_remove_host(mmc); 1081a45c6cb8SMadhusudhan Chikkature err_irq_cd: 1082a45c6cb8SMadhusudhan Chikkature free_irq(mmc_slot(host).card_detect_irq, host); 1083a45c6cb8SMadhusudhan Chikkature err_irq_cd_init: 1084a45c6cb8SMadhusudhan Chikkature free_irq(host->irq, host); 1085a45c6cb8SMadhusudhan Chikkature err_irq: 1086a45c6cb8SMadhusudhan Chikkature clk_disable(host->fclk); 1087a45c6cb8SMadhusudhan Chikkature clk_disable(host->iclk); 1088a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 1089a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 1090a45c6cb8SMadhusudhan Chikkature if (host->dbclk_enabled) { 1091a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 1092a45c6cb8SMadhusudhan Chikkature clk_put(host->dbclk); 1093a45c6cb8SMadhusudhan Chikkature } 1094a45c6cb8SMadhusudhan Chikkature 1095a45c6cb8SMadhusudhan Chikkature err1: 1096a45c6cb8SMadhusudhan Chikkature iounmap(host->base); 1097a45c6cb8SMadhusudhan Chikkature err: 1098a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Probe Failed\n"); 1099a45c6cb8SMadhusudhan Chikkature release_mem_region(res->start, res->end - res->start + 1); 1100a45c6cb8SMadhusudhan Chikkature if (host) 1101a45c6cb8SMadhusudhan Chikkature mmc_free_host(mmc); 1102a45c6cb8SMadhusudhan Chikkature return ret; 1103a45c6cb8SMadhusudhan Chikkature } 1104a45c6cb8SMadhusudhan Chikkature 1105a45c6cb8SMadhusudhan Chikkature static int omap_mmc_remove(struct platform_device *pdev) 1106a45c6cb8SMadhusudhan Chikkature { 1107a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = platform_get_drvdata(pdev); 1108a45c6cb8SMadhusudhan Chikkature struct resource *res; 1109a45c6cb8SMadhusudhan Chikkature 1110a45c6cb8SMadhusudhan Chikkature if (host) { 1111a45c6cb8SMadhusudhan Chikkature mmc_remove_host(host->mmc); 1112a45c6cb8SMadhusudhan Chikkature if (host->pdata->cleanup) 1113a45c6cb8SMadhusudhan Chikkature host->pdata->cleanup(&pdev->dev); 1114a45c6cb8SMadhusudhan Chikkature free_irq(host->irq, host); 1115a45c6cb8SMadhusudhan Chikkature if (mmc_slot(host).card_detect_irq) 1116a45c6cb8SMadhusudhan Chikkature free_irq(mmc_slot(host).card_detect_irq, host); 1117a45c6cb8SMadhusudhan Chikkature flush_scheduled_work(); 1118a45c6cb8SMadhusudhan Chikkature 1119a45c6cb8SMadhusudhan Chikkature clk_disable(host->fclk); 1120a45c6cb8SMadhusudhan Chikkature clk_disable(host->iclk); 1121a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 1122a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 1123a45c6cb8SMadhusudhan Chikkature if (host->dbclk_enabled) { 1124a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 1125a45c6cb8SMadhusudhan Chikkature clk_put(host->dbclk); 1126a45c6cb8SMadhusudhan Chikkature } 1127a45c6cb8SMadhusudhan Chikkature 1128a45c6cb8SMadhusudhan Chikkature mmc_free_host(host->mmc); 1129a45c6cb8SMadhusudhan Chikkature iounmap(host->base); 1130a45c6cb8SMadhusudhan Chikkature } 1131a45c6cb8SMadhusudhan Chikkature 1132a45c6cb8SMadhusudhan Chikkature res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 1133a45c6cb8SMadhusudhan Chikkature if (res) 1134a45c6cb8SMadhusudhan Chikkature release_mem_region(res->start, res->end - res->start + 1); 1135a45c6cb8SMadhusudhan Chikkature platform_set_drvdata(pdev, NULL); 1136a45c6cb8SMadhusudhan Chikkature 1137a45c6cb8SMadhusudhan Chikkature return 0; 1138a45c6cb8SMadhusudhan Chikkature } 1139a45c6cb8SMadhusudhan Chikkature 1140a45c6cb8SMadhusudhan Chikkature #ifdef CONFIG_PM 1141a45c6cb8SMadhusudhan Chikkature static int omap_mmc_suspend(struct platform_device *pdev, pm_message_t state) 1142a45c6cb8SMadhusudhan Chikkature { 1143a45c6cb8SMadhusudhan Chikkature int ret = 0; 1144a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = platform_get_drvdata(pdev); 1145a45c6cb8SMadhusudhan Chikkature 1146a45c6cb8SMadhusudhan Chikkature if (host && host->suspended) 1147a45c6cb8SMadhusudhan Chikkature return 0; 1148a45c6cb8SMadhusudhan Chikkature 1149a45c6cb8SMadhusudhan Chikkature if (host) { 1150a45c6cb8SMadhusudhan Chikkature ret = mmc_suspend_host(host->mmc, state); 1151a45c6cb8SMadhusudhan Chikkature if (ret == 0) { 1152a45c6cb8SMadhusudhan Chikkature host->suspended = 1; 1153a45c6cb8SMadhusudhan Chikkature 1154a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, ISE, 0); 1155a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, IE, 0); 1156a45c6cb8SMadhusudhan Chikkature 1157a45c6cb8SMadhusudhan Chikkature if (host->pdata->suspend) { 1158a45c6cb8SMadhusudhan Chikkature ret = host->pdata->suspend(&pdev->dev, 1159a45c6cb8SMadhusudhan Chikkature host->slot_id); 1160a45c6cb8SMadhusudhan Chikkature if (ret) 1161a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1162a45c6cb8SMadhusudhan Chikkature "Unable to handle MMC board" 1163a45c6cb8SMadhusudhan Chikkature " level suspend\n"); 1164a45c6cb8SMadhusudhan Chikkature } 1165a45c6cb8SMadhusudhan Chikkature 1166eb250826SDavid Brownell if (host->id == OMAP_MMC1_DEVID 1167eb250826SDavid Brownell && !(OMAP_HSMMC_READ(host->base, HCTL) 1168eb250826SDavid Brownell & SDVSDET)) { 1169a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 1170a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) 1171a45c6cb8SMadhusudhan Chikkature & SDVSCLR); 1172a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 1173a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) 1174a45c6cb8SMadhusudhan Chikkature | SDVS30); 1175a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 1176a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) 1177a45c6cb8SMadhusudhan Chikkature | SDBP); 1178a45c6cb8SMadhusudhan Chikkature } 1179a45c6cb8SMadhusudhan Chikkature 1180a45c6cb8SMadhusudhan Chikkature clk_disable(host->fclk); 1181a45c6cb8SMadhusudhan Chikkature clk_disable(host->iclk); 1182a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 1183a45c6cb8SMadhusudhan Chikkature } 1184a45c6cb8SMadhusudhan Chikkature 1185a45c6cb8SMadhusudhan Chikkature } 1186a45c6cb8SMadhusudhan Chikkature return ret; 1187a45c6cb8SMadhusudhan Chikkature } 1188a45c6cb8SMadhusudhan Chikkature 1189a45c6cb8SMadhusudhan Chikkature /* Routine to resume the MMC device */ 1190a45c6cb8SMadhusudhan Chikkature static int omap_mmc_resume(struct platform_device *pdev) 1191a45c6cb8SMadhusudhan Chikkature { 1192a45c6cb8SMadhusudhan Chikkature int ret = 0; 1193a45c6cb8SMadhusudhan Chikkature struct mmc_omap_host *host = platform_get_drvdata(pdev); 1194a45c6cb8SMadhusudhan Chikkature 1195a45c6cb8SMadhusudhan Chikkature if (host && !host->suspended) 1196a45c6cb8SMadhusudhan Chikkature return 0; 1197a45c6cb8SMadhusudhan Chikkature 1198a45c6cb8SMadhusudhan Chikkature if (host) { 1199a45c6cb8SMadhusudhan Chikkature 1200a45c6cb8SMadhusudhan Chikkature ret = clk_enable(host->fclk); 1201a45c6cb8SMadhusudhan Chikkature if (ret) 1202a45c6cb8SMadhusudhan Chikkature goto clk_en_err; 1203a45c6cb8SMadhusudhan Chikkature 1204a45c6cb8SMadhusudhan Chikkature ret = clk_enable(host->iclk); 1205a45c6cb8SMadhusudhan Chikkature if (ret) { 1206a45c6cb8SMadhusudhan Chikkature clk_disable(host->fclk); 1207a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 1208a45c6cb8SMadhusudhan Chikkature goto clk_en_err; 1209a45c6cb8SMadhusudhan Chikkature } 1210a45c6cb8SMadhusudhan Chikkature 1211a45c6cb8SMadhusudhan Chikkature if (clk_enable(host->dbclk) != 0) 1212a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1213a45c6cb8SMadhusudhan Chikkature "Enabling debounce clk failed\n"); 1214a45c6cb8SMadhusudhan Chikkature 12151b331e69SKim Kyuwon omap_hsmmc_init(host); 12161b331e69SKim Kyuwon 1217a45c6cb8SMadhusudhan Chikkature if (host->pdata->resume) { 1218a45c6cb8SMadhusudhan Chikkature ret = host->pdata->resume(&pdev->dev, host->slot_id); 1219a45c6cb8SMadhusudhan Chikkature if (ret) 1220a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1221a45c6cb8SMadhusudhan Chikkature "Unmask interrupt failed\n"); 1222a45c6cb8SMadhusudhan Chikkature } 1223a45c6cb8SMadhusudhan Chikkature 1224a45c6cb8SMadhusudhan Chikkature /* Notify the core to resume the host */ 1225a45c6cb8SMadhusudhan Chikkature ret = mmc_resume_host(host->mmc); 1226a45c6cb8SMadhusudhan Chikkature if (ret == 0) 1227a45c6cb8SMadhusudhan Chikkature host->suspended = 0; 1228a45c6cb8SMadhusudhan Chikkature } 1229a45c6cb8SMadhusudhan Chikkature 1230a45c6cb8SMadhusudhan Chikkature return ret; 1231a45c6cb8SMadhusudhan Chikkature 1232a45c6cb8SMadhusudhan Chikkature clk_en_err: 1233a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1234a45c6cb8SMadhusudhan Chikkature "Failed to enable MMC clocks during resume\n"); 1235a45c6cb8SMadhusudhan Chikkature return ret; 1236a45c6cb8SMadhusudhan Chikkature } 1237a45c6cb8SMadhusudhan Chikkature 1238a45c6cb8SMadhusudhan Chikkature #else 1239a45c6cb8SMadhusudhan Chikkature #define omap_mmc_suspend NULL 1240a45c6cb8SMadhusudhan Chikkature #define omap_mmc_resume NULL 1241a45c6cb8SMadhusudhan Chikkature #endif 1242a45c6cb8SMadhusudhan Chikkature 1243a45c6cb8SMadhusudhan Chikkature static struct platform_driver omap_mmc_driver = { 1244a45c6cb8SMadhusudhan Chikkature .probe = omap_mmc_probe, 1245a45c6cb8SMadhusudhan Chikkature .remove = omap_mmc_remove, 1246a45c6cb8SMadhusudhan Chikkature .suspend = omap_mmc_suspend, 1247a45c6cb8SMadhusudhan Chikkature .resume = omap_mmc_resume, 1248a45c6cb8SMadhusudhan Chikkature .driver = { 1249a45c6cb8SMadhusudhan Chikkature .name = DRIVER_NAME, 1250a45c6cb8SMadhusudhan Chikkature .owner = THIS_MODULE, 1251a45c6cb8SMadhusudhan Chikkature }, 1252a45c6cb8SMadhusudhan Chikkature }; 1253a45c6cb8SMadhusudhan Chikkature 1254a45c6cb8SMadhusudhan Chikkature static int __init omap_mmc_init(void) 1255a45c6cb8SMadhusudhan Chikkature { 1256a45c6cb8SMadhusudhan Chikkature /* Register the MMC driver */ 1257a45c6cb8SMadhusudhan Chikkature return platform_driver_register(&omap_mmc_driver); 1258a45c6cb8SMadhusudhan Chikkature } 1259a45c6cb8SMadhusudhan Chikkature 1260a45c6cb8SMadhusudhan Chikkature static void __exit omap_mmc_cleanup(void) 1261a45c6cb8SMadhusudhan Chikkature { 1262a45c6cb8SMadhusudhan Chikkature /* Unregister MMC driver */ 1263a45c6cb8SMadhusudhan Chikkature platform_driver_unregister(&omap_mmc_driver); 1264a45c6cb8SMadhusudhan Chikkature } 1265a45c6cb8SMadhusudhan Chikkature 1266a45c6cb8SMadhusudhan Chikkature module_init(omap_mmc_init); 1267a45c6cb8SMadhusudhan Chikkature module_exit(omap_mmc_cleanup); 1268a45c6cb8SMadhusudhan Chikkature 1269a45c6cb8SMadhusudhan Chikkature MODULE_DESCRIPTION("OMAP High Speed Multimedia Card driver"); 1270a45c6cb8SMadhusudhan Chikkature MODULE_LICENSE("GPL"); 1271a45c6cb8SMadhusudhan Chikkature MODULE_ALIAS("platform:" DRIVER_NAME); 1272a45c6cb8SMadhusudhan Chikkature MODULE_AUTHOR("Texas Instruments Inc"); 1273