1a45c6cb8SMadhusudhan Chikkature /* 2a45c6cb8SMadhusudhan Chikkature * drivers/mmc/host/omap_hsmmc.c 3a45c6cb8SMadhusudhan Chikkature * 4a45c6cb8SMadhusudhan Chikkature * Driver for OMAP2430/3430 MMC controller. 5a45c6cb8SMadhusudhan Chikkature * 6a45c6cb8SMadhusudhan Chikkature * Copyright (C) 2007 Texas Instruments. 7a45c6cb8SMadhusudhan Chikkature * 8a45c6cb8SMadhusudhan Chikkature * Authors: 9a45c6cb8SMadhusudhan Chikkature * Syed Mohammed Khasim <x0khasim@ti.com> 10a45c6cb8SMadhusudhan Chikkature * Madhusudhan <madhu.cr@ti.com> 11a45c6cb8SMadhusudhan Chikkature * Mohit Jalori <mjalori@ti.com> 12a45c6cb8SMadhusudhan Chikkature * 13a45c6cb8SMadhusudhan Chikkature * This file is licensed under the terms of the GNU General Public License 14a45c6cb8SMadhusudhan Chikkature * version 2. This program is licensed "as is" without any warranty of any 15a45c6cb8SMadhusudhan Chikkature * kind, whether express or implied. 16a45c6cb8SMadhusudhan Chikkature */ 17a45c6cb8SMadhusudhan Chikkature 18a45c6cb8SMadhusudhan Chikkature #include <linux/module.h> 19a45c6cb8SMadhusudhan Chikkature #include <linux/init.h> 20d900f712SDenis Karpov #include <linux/debugfs.h> 21d900f712SDenis Karpov #include <linux/seq_file.h> 22a45c6cb8SMadhusudhan Chikkature #include <linux/interrupt.h> 23a45c6cb8SMadhusudhan Chikkature #include <linux/delay.h> 24a45c6cb8SMadhusudhan Chikkature #include <linux/dma-mapping.h> 25a45c6cb8SMadhusudhan Chikkature #include <linux/platform_device.h> 26a45c6cb8SMadhusudhan Chikkature #include <linux/workqueue.h> 27a45c6cb8SMadhusudhan Chikkature #include <linux/timer.h> 28a45c6cb8SMadhusudhan Chikkature #include <linux/clk.h> 29a45c6cb8SMadhusudhan Chikkature #include <linux/mmc/host.h> 3013189e78SJarkko Lavinen #include <linux/mmc/core.h> 3193caf8e6SAdrian Hunter #include <linux/mmc/mmc.h> 32a45c6cb8SMadhusudhan Chikkature #include <linux/io.h> 33a45c6cb8SMadhusudhan Chikkature #include <linux/semaphore.h> 34db0fefc5SAdrian Hunter #include <linux/gpio.h> 35db0fefc5SAdrian Hunter #include <linux/regulator/consumer.h> 36ce491cf8STony Lindgren #include <plat/dma.h> 37a45c6cb8SMadhusudhan Chikkature #include <mach/hardware.h> 38ce491cf8STony Lindgren #include <plat/board.h> 39ce491cf8STony Lindgren #include <plat/mmc.h> 40ce491cf8STony Lindgren #include <plat/cpu.h> 41a45c6cb8SMadhusudhan Chikkature 42a45c6cb8SMadhusudhan Chikkature /* OMAP HSMMC Host Controller Registers */ 43a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_SYSCONFIG 0x0010 4411dd62a7SDenis Karpov #define OMAP_HSMMC_SYSSTATUS 0x0014 45a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_CON 0x002C 46a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_BLK 0x0104 47a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_ARG 0x0108 48a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_CMD 0x010C 49a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP10 0x0110 50a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP32 0x0114 51a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP54 0x0118 52a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_RSP76 0x011C 53a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_DATA 0x0120 54a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_HCTL 0x0128 55a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_SYSCTL 0x012C 56a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_STAT 0x0130 57a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_IE 0x0134 58a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_ISE 0x0138 59a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_CAPA 0x0140 60a45c6cb8SMadhusudhan Chikkature 61a45c6cb8SMadhusudhan Chikkature #define VS18 (1 << 26) 62a45c6cb8SMadhusudhan Chikkature #define VS30 (1 << 25) 63a45c6cb8SMadhusudhan Chikkature #define SDVS18 (0x5 << 9) 64a45c6cb8SMadhusudhan Chikkature #define SDVS30 (0x6 << 9) 65eb250826SDavid Brownell #define SDVS33 (0x7 << 9) 661b331e69SKim Kyuwon #define SDVS_MASK 0x00000E00 67a45c6cb8SMadhusudhan Chikkature #define SDVSCLR 0xFFFFF1FF 68a45c6cb8SMadhusudhan Chikkature #define SDVSDET 0x00000400 69a45c6cb8SMadhusudhan Chikkature #define AUTOIDLE 0x1 70a45c6cb8SMadhusudhan Chikkature #define SDBP (1 << 8) 71a45c6cb8SMadhusudhan Chikkature #define DTO 0xe 72a45c6cb8SMadhusudhan Chikkature #define ICE 0x1 73a45c6cb8SMadhusudhan Chikkature #define ICS 0x2 74a45c6cb8SMadhusudhan Chikkature #define CEN (1 << 2) 75a45c6cb8SMadhusudhan Chikkature #define CLKD_MASK 0x0000FFC0 76a45c6cb8SMadhusudhan Chikkature #define CLKD_SHIFT 6 77a45c6cb8SMadhusudhan Chikkature #define DTO_MASK 0x000F0000 78a45c6cb8SMadhusudhan Chikkature #define DTO_SHIFT 16 79a45c6cb8SMadhusudhan Chikkature #define INT_EN_MASK 0x307F0033 80ccdfe3a6SAnand Gadiyar #define BWR_ENABLE (1 << 4) 81ccdfe3a6SAnand Gadiyar #define BRR_ENABLE (1 << 5) 8293caf8e6SAdrian Hunter #define DTO_ENABLE (1 << 20) 83a45c6cb8SMadhusudhan Chikkature #define INIT_STREAM (1 << 1) 84a45c6cb8SMadhusudhan Chikkature #define DP_SELECT (1 << 21) 85a45c6cb8SMadhusudhan Chikkature #define DDIR (1 << 4) 86a45c6cb8SMadhusudhan Chikkature #define DMA_EN 0x1 87a45c6cb8SMadhusudhan Chikkature #define MSBS (1 << 5) 88a45c6cb8SMadhusudhan Chikkature #define BCE (1 << 1) 89a45c6cb8SMadhusudhan Chikkature #define FOUR_BIT (1 << 1) 9073153010SJarkko Lavinen #define DW8 (1 << 5) 91a45c6cb8SMadhusudhan Chikkature #define CC 0x1 92a45c6cb8SMadhusudhan Chikkature #define TC 0x02 93a45c6cb8SMadhusudhan Chikkature #define OD 0x1 94a45c6cb8SMadhusudhan Chikkature #define ERR (1 << 15) 95a45c6cb8SMadhusudhan Chikkature #define CMD_TIMEOUT (1 << 16) 96a45c6cb8SMadhusudhan Chikkature #define DATA_TIMEOUT (1 << 20) 97a45c6cb8SMadhusudhan Chikkature #define CMD_CRC (1 << 17) 98a45c6cb8SMadhusudhan Chikkature #define DATA_CRC (1 << 21) 99a45c6cb8SMadhusudhan Chikkature #define CARD_ERR (1 << 28) 100a45c6cb8SMadhusudhan Chikkature #define STAT_CLEAR 0xFFFFFFFF 101a45c6cb8SMadhusudhan Chikkature #define INIT_STREAM_CMD 0x00000000 102a45c6cb8SMadhusudhan Chikkature #define DUAL_VOLT_OCR_BIT 7 103a45c6cb8SMadhusudhan Chikkature #define SRC (1 << 25) 104a45c6cb8SMadhusudhan Chikkature #define SRD (1 << 26) 10511dd62a7SDenis Karpov #define SOFTRESET (1 << 1) 10611dd62a7SDenis Karpov #define RESETDONE (1 << 0) 107a45c6cb8SMadhusudhan Chikkature 108a45c6cb8SMadhusudhan Chikkature /* 109a45c6cb8SMadhusudhan Chikkature * FIXME: Most likely all the data using these _DEVID defines should come 110a45c6cb8SMadhusudhan Chikkature * from the platform_data, or implemented in controller and slot specific 111a45c6cb8SMadhusudhan Chikkature * functions. 112a45c6cb8SMadhusudhan Chikkature */ 113a45c6cb8SMadhusudhan Chikkature #define OMAP_MMC1_DEVID 0 114a45c6cb8SMadhusudhan Chikkature #define OMAP_MMC2_DEVID 1 115f3e2f1ddSGrazvydas Ignotas #define OMAP_MMC3_DEVID 2 11682cf818dSkishore kadiyala #define OMAP_MMC4_DEVID 3 11782cf818dSkishore kadiyala #define OMAP_MMC5_DEVID 4 118a45c6cb8SMadhusudhan Chikkature 119a45c6cb8SMadhusudhan Chikkature #define MMC_TIMEOUT_MS 20 120a45c6cb8SMadhusudhan Chikkature #define OMAP_MMC_MASTER_CLOCK 96000000 121a45c6cb8SMadhusudhan Chikkature #define DRIVER_NAME "mmci-omap-hs" 122a45c6cb8SMadhusudhan Chikkature 123dd498effSDenis Karpov /* Timeouts for entering power saving states on inactivity, msec */ 124dd498effSDenis Karpov #define OMAP_MMC_DISABLED_TIMEOUT 100 12513189e78SJarkko Lavinen #define OMAP_MMC_SLEEP_TIMEOUT 1000 12613189e78SJarkko Lavinen #define OMAP_MMC_OFF_TIMEOUT 8000 127dd498effSDenis Karpov 128a45c6cb8SMadhusudhan Chikkature /* 129a45c6cb8SMadhusudhan Chikkature * One controller can have multiple slots, like on some omap boards using 130a45c6cb8SMadhusudhan Chikkature * omap.c controller driver. Luckily this is not currently done on any known 131a45c6cb8SMadhusudhan Chikkature * omap_hsmmc.c device. 132a45c6cb8SMadhusudhan Chikkature */ 133a45c6cb8SMadhusudhan Chikkature #define mmc_slot(host) (host->pdata->slots[host->slot_id]) 134a45c6cb8SMadhusudhan Chikkature 135a45c6cb8SMadhusudhan Chikkature /* 136a45c6cb8SMadhusudhan Chikkature * MMC Host controller read/write API's 137a45c6cb8SMadhusudhan Chikkature */ 138a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_READ(base, reg) \ 139a45c6cb8SMadhusudhan Chikkature __raw_readl((base) + OMAP_HSMMC_##reg) 140a45c6cb8SMadhusudhan Chikkature 141a45c6cb8SMadhusudhan Chikkature #define OMAP_HSMMC_WRITE(base, reg, val) \ 142a45c6cb8SMadhusudhan Chikkature __raw_writel((val), (base) + OMAP_HSMMC_##reg) 143a45c6cb8SMadhusudhan Chikkature 14470a3341aSDenis Karpov struct omap_hsmmc_host { 145a45c6cb8SMadhusudhan Chikkature struct device *dev; 146a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc; 147a45c6cb8SMadhusudhan Chikkature struct mmc_request *mrq; 148a45c6cb8SMadhusudhan Chikkature struct mmc_command *cmd; 149a45c6cb8SMadhusudhan Chikkature struct mmc_data *data; 150a45c6cb8SMadhusudhan Chikkature struct clk *fclk; 151a45c6cb8SMadhusudhan Chikkature struct clk *iclk; 152a45c6cb8SMadhusudhan Chikkature struct clk *dbclk; 153db0fefc5SAdrian Hunter /* 154db0fefc5SAdrian Hunter * vcc == configured supply 155db0fefc5SAdrian Hunter * vcc_aux == optional 156db0fefc5SAdrian Hunter * - MMC1, supply for DAT4..DAT7 157db0fefc5SAdrian Hunter * - MMC2/MMC2, external level shifter voltage supply, for 158db0fefc5SAdrian Hunter * chip (SDIO, eMMC, etc) or transceiver (MMC2 only) 159db0fefc5SAdrian Hunter */ 160db0fefc5SAdrian Hunter struct regulator *vcc; 161db0fefc5SAdrian Hunter struct regulator *vcc_aux; 162a45c6cb8SMadhusudhan Chikkature struct work_struct mmc_carddetect_work; 163a45c6cb8SMadhusudhan Chikkature void __iomem *base; 164a45c6cb8SMadhusudhan Chikkature resource_size_t mapbase; 1654dffd7a2SAdrian Hunter spinlock_t irq_lock; /* Prevent races with irq handler */ 166a45c6cb8SMadhusudhan Chikkature unsigned int id; 167a45c6cb8SMadhusudhan Chikkature unsigned int dma_len; 1680ccd76d4SJuha Yrjola unsigned int dma_sg_idx; 169a45c6cb8SMadhusudhan Chikkature unsigned char bus_mode; 170a3621465SAdrian Hunter unsigned char power_mode; 171a45c6cb8SMadhusudhan Chikkature u32 *buffer; 172a45c6cb8SMadhusudhan Chikkature u32 bytesleft; 173a45c6cb8SMadhusudhan Chikkature int suspended; 174a45c6cb8SMadhusudhan Chikkature int irq; 175a45c6cb8SMadhusudhan Chikkature int use_dma, dma_ch; 176f3e2f1ddSGrazvydas Ignotas int dma_line_tx, dma_line_rx; 177a45c6cb8SMadhusudhan Chikkature int slot_id; 1782bec0893SAdrian Hunter int got_dbclk; 1794a694dc9SAdrian Hunter int response_busy; 18011dd62a7SDenis Karpov int context_loss; 181dd498effSDenis Karpov int dpm_state; 182623821f7SAdrian Hunter int vdd; 183b62f6228SAdrian Hunter int protect_card; 184b62f6228SAdrian Hunter int reqs_blocked; 185db0fefc5SAdrian Hunter int use_reg; 186b417577dSAdrian Hunter int req_in_progress; 18711dd62a7SDenis Karpov 188a45c6cb8SMadhusudhan Chikkature struct omap_mmc_platform_data *pdata; 189a45c6cb8SMadhusudhan Chikkature }; 190a45c6cb8SMadhusudhan Chikkature 191db0fefc5SAdrian Hunter static int omap_hsmmc_card_detect(struct device *dev, int slot) 192db0fefc5SAdrian Hunter { 193db0fefc5SAdrian Hunter struct omap_mmc_platform_data *mmc = dev->platform_data; 194db0fefc5SAdrian Hunter 195db0fefc5SAdrian Hunter /* NOTE: assumes card detect signal is active-low */ 196db0fefc5SAdrian Hunter return !gpio_get_value_cansleep(mmc->slots[0].switch_pin); 197db0fefc5SAdrian Hunter } 198db0fefc5SAdrian Hunter 199db0fefc5SAdrian Hunter static int omap_hsmmc_get_wp(struct device *dev, int slot) 200db0fefc5SAdrian Hunter { 201db0fefc5SAdrian Hunter struct omap_mmc_platform_data *mmc = dev->platform_data; 202db0fefc5SAdrian Hunter 203db0fefc5SAdrian Hunter /* NOTE: assumes write protect signal is active-high */ 204db0fefc5SAdrian Hunter return gpio_get_value_cansleep(mmc->slots[0].gpio_wp); 205db0fefc5SAdrian Hunter } 206db0fefc5SAdrian Hunter 207db0fefc5SAdrian Hunter static int omap_hsmmc_get_cover_state(struct device *dev, int slot) 208db0fefc5SAdrian Hunter { 209db0fefc5SAdrian Hunter struct omap_mmc_platform_data *mmc = dev->platform_data; 210db0fefc5SAdrian Hunter 211db0fefc5SAdrian Hunter /* NOTE: assumes card detect signal is active-low */ 212db0fefc5SAdrian Hunter return !gpio_get_value_cansleep(mmc->slots[0].switch_pin); 213db0fefc5SAdrian Hunter } 214db0fefc5SAdrian Hunter 215db0fefc5SAdrian Hunter #ifdef CONFIG_PM 216db0fefc5SAdrian Hunter 217db0fefc5SAdrian Hunter static int omap_hsmmc_suspend_cdirq(struct device *dev, int slot) 218db0fefc5SAdrian Hunter { 219db0fefc5SAdrian Hunter struct omap_mmc_platform_data *mmc = dev->platform_data; 220db0fefc5SAdrian Hunter 221db0fefc5SAdrian Hunter disable_irq(mmc->slots[0].card_detect_irq); 222db0fefc5SAdrian Hunter return 0; 223db0fefc5SAdrian Hunter } 224db0fefc5SAdrian Hunter 225db0fefc5SAdrian Hunter static int omap_hsmmc_resume_cdirq(struct device *dev, int slot) 226db0fefc5SAdrian Hunter { 227db0fefc5SAdrian Hunter struct omap_mmc_platform_data *mmc = dev->platform_data; 228db0fefc5SAdrian Hunter 229db0fefc5SAdrian Hunter enable_irq(mmc->slots[0].card_detect_irq); 230db0fefc5SAdrian Hunter return 0; 231db0fefc5SAdrian Hunter } 232db0fefc5SAdrian Hunter 233db0fefc5SAdrian Hunter #else 234db0fefc5SAdrian Hunter 235db0fefc5SAdrian Hunter #define omap_hsmmc_suspend_cdirq NULL 236db0fefc5SAdrian Hunter #define omap_hsmmc_resume_cdirq NULL 237db0fefc5SAdrian Hunter 238db0fefc5SAdrian Hunter #endif 239db0fefc5SAdrian Hunter 240b702b106SAdrian Hunter #ifdef CONFIG_REGULATOR 241b702b106SAdrian Hunter 242db0fefc5SAdrian Hunter static int omap_hsmmc_1_set_power(struct device *dev, int slot, int power_on, 243db0fefc5SAdrian Hunter int vdd) 244db0fefc5SAdrian Hunter { 245db0fefc5SAdrian Hunter struct omap_hsmmc_host *host = 246db0fefc5SAdrian Hunter platform_get_drvdata(to_platform_device(dev)); 247db0fefc5SAdrian Hunter int ret; 248db0fefc5SAdrian Hunter 249db0fefc5SAdrian Hunter if (mmc_slot(host).before_set_reg) 250db0fefc5SAdrian Hunter mmc_slot(host).before_set_reg(dev, slot, power_on, vdd); 251db0fefc5SAdrian Hunter 252db0fefc5SAdrian Hunter if (power_on) 253db0fefc5SAdrian Hunter ret = mmc_regulator_set_ocr(host->vcc, vdd); 254db0fefc5SAdrian Hunter else 255db0fefc5SAdrian Hunter ret = mmc_regulator_set_ocr(host->vcc, 0); 256db0fefc5SAdrian Hunter 257db0fefc5SAdrian Hunter if (mmc_slot(host).after_set_reg) 258db0fefc5SAdrian Hunter mmc_slot(host).after_set_reg(dev, slot, power_on, vdd); 259db0fefc5SAdrian Hunter 260db0fefc5SAdrian Hunter return ret; 261db0fefc5SAdrian Hunter } 262db0fefc5SAdrian Hunter 263db0fefc5SAdrian Hunter static int omap_hsmmc_23_set_power(struct device *dev, int slot, int power_on, 264db0fefc5SAdrian Hunter int vdd) 265db0fefc5SAdrian Hunter { 266db0fefc5SAdrian Hunter struct omap_hsmmc_host *host = 267db0fefc5SAdrian Hunter platform_get_drvdata(to_platform_device(dev)); 268db0fefc5SAdrian Hunter int ret = 0; 269db0fefc5SAdrian Hunter 270db0fefc5SAdrian Hunter /* 271db0fefc5SAdrian Hunter * If we don't see a Vcc regulator, assume it's a fixed 272db0fefc5SAdrian Hunter * voltage always-on regulator. 273db0fefc5SAdrian Hunter */ 274db0fefc5SAdrian Hunter if (!host->vcc) 275db0fefc5SAdrian Hunter return 0; 276db0fefc5SAdrian Hunter 277db0fefc5SAdrian Hunter if (mmc_slot(host).before_set_reg) 278db0fefc5SAdrian Hunter mmc_slot(host).before_set_reg(dev, slot, power_on, vdd); 279db0fefc5SAdrian Hunter 280db0fefc5SAdrian Hunter /* 281db0fefc5SAdrian Hunter * Assume Vcc regulator is used only to power the card ... OMAP 282db0fefc5SAdrian Hunter * VDDS is used to power the pins, optionally with a transceiver to 283db0fefc5SAdrian Hunter * support cards using voltages other than VDDS (1.8V nominal). When a 284db0fefc5SAdrian Hunter * transceiver is used, DAT3..7 are muxed as transceiver control pins. 285db0fefc5SAdrian Hunter * 286db0fefc5SAdrian Hunter * In some cases this regulator won't support enable/disable; 287db0fefc5SAdrian Hunter * e.g. it's a fixed rail for a WLAN chip. 288db0fefc5SAdrian Hunter * 289db0fefc5SAdrian Hunter * In other cases vcc_aux switches interface power. Example, for 290db0fefc5SAdrian Hunter * eMMC cards it represents VccQ. Sometimes transceivers or SDIO 291db0fefc5SAdrian Hunter * chips/cards need an interface voltage rail too. 292db0fefc5SAdrian Hunter */ 293db0fefc5SAdrian Hunter if (power_on) { 294db0fefc5SAdrian Hunter ret = mmc_regulator_set_ocr(host->vcc, vdd); 295db0fefc5SAdrian Hunter /* Enable interface voltage rail, if needed */ 296db0fefc5SAdrian Hunter if (ret == 0 && host->vcc_aux) { 297db0fefc5SAdrian Hunter ret = regulator_enable(host->vcc_aux); 298db0fefc5SAdrian Hunter if (ret < 0) 299db0fefc5SAdrian Hunter ret = mmc_regulator_set_ocr(host->vcc, 0); 300db0fefc5SAdrian Hunter } 301db0fefc5SAdrian Hunter } else { 3026da20c89SAdrian Hunter if (host->vcc_aux) 303db0fefc5SAdrian Hunter ret = regulator_disable(host->vcc_aux); 304db0fefc5SAdrian Hunter if (ret == 0) 305db0fefc5SAdrian Hunter ret = mmc_regulator_set_ocr(host->vcc, 0); 306db0fefc5SAdrian Hunter } 307db0fefc5SAdrian Hunter 308db0fefc5SAdrian Hunter if (mmc_slot(host).after_set_reg) 309db0fefc5SAdrian Hunter mmc_slot(host).after_set_reg(dev, slot, power_on, vdd); 310db0fefc5SAdrian Hunter 311db0fefc5SAdrian Hunter return ret; 312db0fefc5SAdrian Hunter } 313db0fefc5SAdrian Hunter 314db0fefc5SAdrian Hunter static int omap_hsmmc_1_set_sleep(struct device *dev, int slot, int sleep, 315db0fefc5SAdrian Hunter int vdd, int cardsleep) 316db0fefc5SAdrian Hunter { 317db0fefc5SAdrian Hunter struct omap_hsmmc_host *host = 318db0fefc5SAdrian Hunter platform_get_drvdata(to_platform_device(dev)); 319db0fefc5SAdrian Hunter int mode = sleep ? REGULATOR_MODE_STANDBY : REGULATOR_MODE_NORMAL; 320db0fefc5SAdrian Hunter 321db0fefc5SAdrian Hunter return regulator_set_mode(host->vcc, mode); 322db0fefc5SAdrian Hunter } 323db0fefc5SAdrian Hunter 324db0fefc5SAdrian Hunter static int omap_hsmmc_23_set_sleep(struct device *dev, int slot, int sleep, 325db0fefc5SAdrian Hunter int vdd, int cardsleep) 326db0fefc5SAdrian Hunter { 327db0fefc5SAdrian Hunter struct omap_hsmmc_host *host = 328db0fefc5SAdrian Hunter platform_get_drvdata(to_platform_device(dev)); 329db0fefc5SAdrian Hunter int err, mode; 330db0fefc5SAdrian Hunter 331db0fefc5SAdrian Hunter /* 332db0fefc5SAdrian Hunter * If we don't see a Vcc regulator, assume it's a fixed 333db0fefc5SAdrian Hunter * voltage always-on regulator. 334db0fefc5SAdrian Hunter */ 335db0fefc5SAdrian Hunter if (!host->vcc) 336db0fefc5SAdrian Hunter return 0; 337db0fefc5SAdrian Hunter 338db0fefc5SAdrian Hunter mode = sleep ? REGULATOR_MODE_STANDBY : REGULATOR_MODE_NORMAL; 339db0fefc5SAdrian Hunter 340db0fefc5SAdrian Hunter if (!host->vcc_aux) 341db0fefc5SAdrian Hunter return regulator_set_mode(host->vcc, mode); 342db0fefc5SAdrian Hunter 343db0fefc5SAdrian Hunter if (cardsleep) { 344db0fefc5SAdrian Hunter /* VCC can be turned off if card is asleep */ 345db0fefc5SAdrian Hunter if (sleep) 346db0fefc5SAdrian Hunter err = mmc_regulator_set_ocr(host->vcc, 0); 347db0fefc5SAdrian Hunter else 348db0fefc5SAdrian Hunter err = mmc_regulator_set_ocr(host->vcc, vdd); 349db0fefc5SAdrian Hunter } else 350db0fefc5SAdrian Hunter err = regulator_set_mode(host->vcc, mode); 351db0fefc5SAdrian Hunter if (err) 352db0fefc5SAdrian Hunter return err; 353e0eb2424SAdrian Hunter 354e0eb2424SAdrian Hunter if (!mmc_slot(host).vcc_aux_disable_is_sleep) 355db0fefc5SAdrian Hunter return regulator_set_mode(host->vcc_aux, mode); 356e0eb2424SAdrian Hunter 357e0eb2424SAdrian Hunter if (sleep) 358e0eb2424SAdrian Hunter return regulator_disable(host->vcc_aux); 359e0eb2424SAdrian Hunter else 360e0eb2424SAdrian Hunter return regulator_enable(host->vcc_aux); 361db0fefc5SAdrian Hunter } 362db0fefc5SAdrian Hunter 363db0fefc5SAdrian Hunter static int omap_hsmmc_reg_get(struct omap_hsmmc_host *host) 364db0fefc5SAdrian Hunter { 365db0fefc5SAdrian Hunter struct regulator *reg; 366db0fefc5SAdrian Hunter int ret = 0; 367db0fefc5SAdrian Hunter 368db0fefc5SAdrian Hunter switch (host->id) { 369db0fefc5SAdrian Hunter case OMAP_MMC1_DEVID: 370db0fefc5SAdrian Hunter /* On-chip level shifting via PBIAS0/PBIAS1 */ 371db0fefc5SAdrian Hunter mmc_slot(host).set_power = omap_hsmmc_1_set_power; 372db0fefc5SAdrian Hunter mmc_slot(host).set_sleep = omap_hsmmc_1_set_sleep; 373db0fefc5SAdrian Hunter break; 374db0fefc5SAdrian Hunter case OMAP_MMC2_DEVID: 375db0fefc5SAdrian Hunter case OMAP_MMC3_DEVID: 376db0fefc5SAdrian Hunter /* Off-chip level shifting, or none */ 377db0fefc5SAdrian Hunter mmc_slot(host).set_power = omap_hsmmc_23_set_power; 378db0fefc5SAdrian Hunter mmc_slot(host).set_sleep = omap_hsmmc_23_set_sleep; 379db0fefc5SAdrian Hunter break; 380db0fefc5SAdrian Hunter default: 381db0fefc5SAdrian Hunter pr_err("MMC%d configuration not supported!\n", host->id); 382db0fefc5SAdrian Hunter return -EINVAL; 383db0fefc5SAdrian Hunter } 384db0fefc5SAdrian Hunter 385db0fefc5SAdrian Hunter reg = regulator_get(host->dev, "vmmc"); 386db0fefc5SAdrian Hunter if (IS_ERR(reg)) { 387db0fefc5SAdrian Hunter dev_dbg(host->dev, "vmmc regulator missing\n"); 388db0fefc5SAdrian Hunter /* 389db0fefc5SAdrian Hunter * HACK: until fixed.c regulator is usable, 390db0fefc5SAdrian Hunter * we don't require a main regulator 391db0fefc5SAdrian Hunter * for MMC2 or MMC3 392db0fefc5SAdrian Hunter */ 393db0fefc5SAdrian Hunter if (host->id == OMAP_MMC1_DEVID) { 394db0fefc5SAdrian Hunter ret = PTR_ERR(reg); 395db0fefc5SAdrian Hunter goto err; 396db0fefc5SAdrian Hunter } 397db0fefc5SAdrian Hunter } else { 398db0fefc5SAdrian Hunter host->vcc = reg; 399db0fefc5SAdrian Hunter mmc_slot(host).ocr_mask = mmc_regulator_get_ocrmask(reg); 400db0fefc5SAdrian Hunter 401db0fefc5SAdrian Hunter /* Allow an aux regulator */ 402db0fefc5SAdrian Hunter reg = regulator_get(host->dev, "vmmc_aux"); 403db0fefc5SAdrian Hunter host->vcc_aux = IS_ERR(reg) ? NULL : reg; 404db0fefc5SAdrian Hunter 405db0fefc5SAdrian Hunter /* 406db0fefc5SAdrian Hunter * UGLY HACK: workaround regulator framework bugs. 407db0fefc5SAdrian Hunter * When the bootloader leaves a supply active, it's 408db0fefc5SAdrian Hunter * initialized with zero usecount ... and we can't 409db0fefc5SAdrian Hunter * disable it without first enabling it. Until the 410db0fefc5SAdrian Hunter * framework is fixed, we need a workaround like this 411db0fefc5SAdrian Hunter * (which is safe for MMC, but not in general). 412db0fefc5SAdrian Hunter */ 413db0fefc5SAdrian Hunter if (regulator_is_enabled(host->vcc) > 0) { 414db0fefc5SAdrian Hunter regulator_enable(host->vcc); 415db0fefc5SAdrian Hunter regulator_disable(host->vcc); 416db0fefc5SAdrian Hunter } 417db0fefc5SAdrian Hunter if (host->vcc_aux) { 418db0fefc5SAdrian Hunter if (regulator_is_enabled(reg) > 0) { 419db0fefc5SAdrian Hunter regulator_enable(reg); 420db0fefc5SAdrian Hunter regulator_disable(reg); 421db0fefc5SAdrian Hunter } 422db0fefc5SAdrian Hunter } 423db0fefc5SAdrian Hunter } 424db0fefc5SAdrian Hunter 425db0fefc5SAdrian Hunter return 0; 426db0fefc5SAdrian Hunter 427db0fefc5SAdrian Hunter err: 428db0fefc5SAdrian Hunter mmc_slot(host).set_power = NULL; 429db0fefc5SAdrian Hunter mmc_slot(host).set_sleep = NULL; 430db0fefc5SAdrian Hunter return ret; 431db0fefc5SAdrian Hunter } 432db0fefc5SAdrian Hunter 433db0fefc5SAdrian Hunter static void omap_hsmmc_reg_put(struct omap_hsmmc_host *host) 434db0fefc5SAdrian Hunter { 435db0fefc5SAdrian Hunter regulator_put(host->vcc); 436db0fefc5SAdrian Hunter regulator_put(host->vcc_aux); 437db0fefc5SAdrian Hunter mmc_slot(host).set_power = NULL; 438db0fefc5SAdrian Hunter mmc_slot(host).set_sleep = NULL; 439db0fefc5SAdrian Hunter } 440db0fefc5SAdrian Hunter 441b702b106SAdrian Hunter static inline int omap_hsmmc_have_reg(void) 442b702b106SAdrian Hunter { 443b702b106SAdrian Hunter return 1; 444b702b106SAdrian Hunter } 445b702b106SAdrian Hunter 446b702b106SAdrian Hunter #else 447b702b106SAdrian Hunter 448b702b106SAdrian Hunter static inline int omap_hsmmc_reg_get(struct omap_hsmmc_host *host) 449b702b106SAdrian Hunter { 450b702b106SAdrian Hunter return -EINVAL; 451b702b106SAdrian Hunter } 452b702b106SAdrian Hunter 453b702b106SAdrian Hunter static inline void omap_hsmmc_reg_put(struct omap_hsmmc_host *host) 454b702b106SAdrian Hunter { 455b702b106SAdrian Hunter } 456b702b106SAdrian Hunter 457b702b106SAdrian Hunter static inline int omap_hsmmc_have_reg(void) 458b702b106SAdrian Hunter { 459b702b106SAdrian Hunter return 0; 460b702b106SAdrian Hunter } 461b702b106SAdrian Hunter 462b702b106SAdrian Hunter #endif 463b702b106SAdrian Hunter 464b702b106SAdrian Hunter static int omap_hsmmc_gpio_init(struct omap_mmc_platform_data *pdata) 465b702b106SAdrian Hunter { 466b702b106SAdrian Hunter int ret; 467b702b106SAdrian Hunter 468b702b106SAdrian Hunter if (gpio_is_valid(pdata->slots[0].switch_pin)) { 469b702b106SAdrian Hunter pdata->suspend = omap_hsmmc_suspend_cdirq; 470b702b106SAdrian Hunter pdata->resume = omap_hsmmc_resume_cdirq; 471b702b106SAdrian Hunter if (pdata->slots[0].cover) 472b702b106SAdrian Hunter pdata->slots[0].get_cover_state = 473b702b106SAdrian Hunter omap_hsmmc_get_cover_state; 474b702b106SAdrian Hunter else 475b702b106SAdrian Hunter pdata->slots[0].card_detect = omap_hsmmc_card_detect; 476b702b106SAdrian Hunter pdata->slots[0].card_detect_irq = 477b702b106SAdrian Hunter gpio_to_irq(pdata->slots[0].switch_pin); 478b702b106SAdrian Hunter ret = gpio_request(pdata->slots[0].switch_pin, "mmc_cd"); 479b702b106SAdrian Hunter if (ret) 480b702b106SAdrian Hunter return ret; 481b702b106SAdrian Hunter ret = gpio_direction_input(pdata->slots[0].switch_pin); 482b702b106SAdrian Hunter if (ret) 483b702b106SAdrian Hunter goto err_free_sp; 484b702b106SAdrian Hunter } else 485b702b106SAdrian Hunter pdata->slots[0].switch_pin = -EINVAL; 486b702b106SAdrian Hunter 487b702b106SAdrian Hunter if (gpio_is_valid(pdata->slots[0].gpio_wp)) { 488b702b106SAdrian Hunter pdata->slots[0].get_ro = omap_hsmmc_get_wp; 489b702b106SAdrian Hunter ret = gpio_request(pdata->slots[0].gpio_wp, "mmc_wp"); 490b702b106SAdrian Hunter if (ret) 491b702b106SAdrian Hunter goto err_free_cd; 492b702b106SAdrian Hunter ret = gpio_direction_input(pdata->slots[0].gpio_wp); 493b702b106SAdrian Hunter if (ret) 494b702b106SAdrian Hunter goto err_free_wp; 495b702b106SAdrian Hunter } else 496b702b106SAdrian Hunter pdata->slots[0].gpio_wp = -EINVAL; 497b702b106SAdrian Hunter 498b702b106SAdrian Hunter return 0; 499b702b106SAdrian Hunter 500b702b106SAdrian Hunter err_free_wp: 501b702b106SAdrian Hunter gpio_free(pdata->slots[0].gpio_wp); 502b702b106SAdrian Hunter err_free_cd: 503b702b106SAdrian Hunter if (gpio_is_valid(pdata->slots[0].switch_pin)) 504b702b106SAdrian Hunter err_free_sp: 505b702b106SAdrian Hunter gpio_free(pdata->slots[0].switch_pin); 506b702b106SAdrian Hunter return ret; 507b702b106SAdrian Hunter } 508b702b106SAdrian Hunter 509b702b106SAdrian Hunter static void omap_hsmmc_gpio_free(struct omap_mmc_platform_data *pdata) 510b702b106SAdrian Hunter { 511b702b106SAdrian Hunter if (gpio_is_valid(pdata->slots[0].gpio_wp)) 512b702b106SAdrian Hunter gpio_free(pdata->slots[0].gpio_wp); 513b702b106SAdrian Hunter if (gpio_is_valid(pdata->slots[0].switch_pin)) 514b702b106SAdrian Hunter gpio_free(pdata->slots[0].switch_pin); 515b702b106SAdrian Hunter } 516b702b106SAdrian Hunter 517a45c6cb8SMadhusudhan Chikkature /* 518a45c6cb8SMadhusudhan Chikkature * Stop clock to the card 519a45c6cb8SMadhusudhan Chikkature */ 52070a3341aSDenis Karpov static void omap_hsmmc_stop_clock(struct omap_hsmmc_host *host) 521a45c6cb8SMadhusudhan Chikkature { 522a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, 523a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, SYSCTL) & ~CEN); 524a45c6cb8SMadhusudhan Chikkature if ((OMAP_HSMMC_READ(host->base, SYSCTL) & CEN) != 0x0) 525a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "MMC Clock is not stoped\n"); 526a45c6cb8SMadhusudhan Chikkature } 527a45c6cb8SMadhusudhan Chikkature 52893caf8e6SAdrian Hunter static void omap_hsmmc_enable_irq(struct omap_hsmmc_host *host, 52993caf8e6SAdrian Hunter struct mmc_command *cmd) 530b417577dSAdrian Hunter { 531b417577dSAdrian Hunter unsigned int irq_mask; 532b417577dSAdrian Hunter 533b417577dSAdrian Hunter if (host->use_dma) 534b417577dSAdrian Hunter irq_mask = INT_EN_MASK & ~(BRR_ENABLE | BWR_ENABLE); 535b417577dSAdrian Hunter else 536b417577dSAdrian Hunter irq_mask = INT_EN_MASK; 537b417577dSAdrian Hunter 53893caf8e6SAdrian Hunter /* Disable timeout for erases */ 53993caf8e6SAdrian Hunter if (cmd->opcode == MMC_ERASE) 54093caf8e6SAdrian Hunter irq_mask &= ~DTO_ENABLE; 54193caf8e6SAdrian Hunter 542b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); 543b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, ISE, irq_mask); 544b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, IE, irq_mask); 545b417577dSAdrian Hunter } 546b417577dSAdrian Hunter 547b417577dSAdrian Hunter static void omap_hsmmc_disable_irq(struct omap_hsmmc_host *host) 548b417577dSAdrian Hunter { 549b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, ISE, 0); 550b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, IE, 0); 551b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); 552b417577dSAdrian Hunter } 553b417577dSAdrian Hunter 55411dd62a7SDenis Karpov #ifdef CONFIG_PM 55511dd62a7SDenis Karpov 55611dd62a7SDenis Karpov /* 55711dd62a7SDenis Karpov * Restore the MMC host context, if it was lost as result of a 55811dd62a7SDenis Karpov * power state change. 55911dd62a7SDenis Karpov */ 56070a3341aSDenis Karpov static int omap_hsmmc_context_restore(struct omap_hsmmc_host *host) 56111dd62a7SDenis Karpov { 56211dd62a7SDenis Karpov struct mmc_ios *ios = &host->mmc->ios; 56311dd62a7SDenis Karpov struct omap_mmc_platform_data *pdata = host->pdata; 56411dd62a7SDenis Karpov int context_loss = 0; 56511dd62a7SDenis Karpov u32 hctl, capa, con; 56611dd62a7SDenis Karpov u16 dsor = 0; 56711dd62a7SDenis Karpov unsigned long timeout; 56811dd62a7SDenis Karpov 56911dd62a7SDenis Karpov if (pdata->get_context_loss_count) { 57011dd62a7SDenis Karpov context_loss = pdata->get_context_loss_count(host->dev); 57111dd62a7SDenis Karpov if (context_loss < 0) 57211dd62a7SDenis Karpov return 1; 57311dd62a7SDenis Karpov } 57411dd62a7SDenis Karpov 57511dd62a7SDenis Karpov dev_dbg(mmc_dev(host->mmc), "context was %slost\n", 57611dd62a7SDenis Karpov context_loss == host->context_loss ? "not " : ""); 57711dd62a7SDenis Karpov if (host->context_loss == context_loss) 57811dd62a7SDenis Karpov return 1; 57911dd62a7SDenis Karpov 58011dd62a7SDenis Karpov /* Wait for hardware reset */ 58111dd62a7SDenis Karpov timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 58211dd62a7SDenis Karpov while ((OMAP_HSMMC_READ(host->base, SYSSTATUS) & RESETDONE) != RESETDONE 58311dd62a7SDenis Karpov && time_before(jiffies, timeout)) 58411dd62a7SDenis Karpov ; 58511dd62a7SDenis Karpov 58611dd62a7SDenis Karpov /* Do software reset */ 58711dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, SYSCONFIG, SOFTRESET); 58811dd62a7SDenis Karpov timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 58911dd62a7SDenis Karpov while ((OMAP_HSMMC_READ(host->base, SYSSTATUS) & RESETDONE) != RESETDONE 59011dd62a7SDenis Karpov && time_before(jiffies, timeout)) 59111dd62a7SDenis Karpov ; 59211dd62a7SDenis Karpov 59311dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, SYSCONFIG, 59411dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCONFIG) | AUTOIDLE); 59511dd62a7SDenis Karpov 59611dd62a7SDenis Karpov if (host->id == OMAP_MMC1_DEVID) { 59711dd62a7SDenis Karpov if (host->power_mode != MMC_POWER_OFF && 59811dd62a7SDenis Karpov (1 << ios->vdd) <= MMC_VDD_23_24) 59911dd62a7SDenis Karpov hctl = SDVS18; 60011dd62a7SDenis Karpov else 60111dd62a7SDenis Karpov hctl = SDVS30; 60211dd62a7SDenis Karpov capa = VS30 | VS18; 60311dd62a7SDenis Karpov } else { 60411dd62a7SDenis Karpov hctl = SDVS18; 60511dd62a7SDenis Karpov capa = VS18; 60611dd62a7SDenis Karpov } 60711dd62a7SDenis Karpov 60811dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, HCTL, 60911dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, HCTL) | hctl); 61011dd62a7SDenis Karpov 61111dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, CAPA, 61211dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, CAPA) | capa); 61311dd62a7SDenis Karpov 61411dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, HCTL, 61511dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, HCTL) | SDBP); 61611dd62a7SDenis Karpov 61711dd62a7SDenis Karpov timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 61811dd62a7SDenis Karpov while ((OMAP_HSMMC_READ(host->base, HCTL) & SDBP) != SDBP 61911dd62a7SDenis Karpov && time_before(jiffies, timeout)) 62011dd62a7SDenis Karpov ; 62111dd62a7SDenis Karpov 622b417577dSAdrian Hunter omap_hsmmc_disable_irq(host); 62311dd62a7SDenis Karpov 62411dd62a7SDenis Karpov /* Do not initialize card-specific things if the power is off */ 62511dd62a7SDenis Karpov if (host->power_mode == MMC_POWER_OFF) 62611dd62a7SDenis Karpov goto out; 62711dd62a7SDenis Karpov 62811dd62a7SDenis Karpov con = OMAP_HSMMC_READ(host->base, CON); 62911dd62a7SDenis Karpov switch (ios->bus_width) { 63011dd62a7SDenis Karpov case MMC_BUS_WIDTH_8: 63111dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, CON, con | DW8); 63211dd62a7SDenis Karpov break; 63311dd62a7SDenis Karpov case MMC_BUS_WIDTH_4: 63411dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, CON, con & ~DW8); 63511dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, HCTL, 63611dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, HCTL) | FOUR_BIT); 63711dd62a7SDenis Karpov break; 63811dd62a7SDenis Karpov case MMC_BUS_WIDTH_1: 63911dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, CON, con & ~DW8); 64011dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, HCTL, 64111dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, HCTL) & ~FOUR_BIT); 64211dd62a7SDenis Karpov break; 64311dd62a7SDenis Karpov } 64411dd62a7SDenis Karpov 64511dd62a7SDenis Karpov if (ios->clock) { 64611dd62a7SDenis Karpov dsor = OMAP_MMC_MASTER_CLOCK / ios->clock; 64711dd62a7SDenis Karpov if (dsor < 1) 64811dd62a7SDenis Karpov dsor = 1; 64911dd62a7SDenis Karpov 65011dd62a7SDenis Karpov if (OMAP_MMC_MASTER_CLOCK / dsor > ios->clock) 65111dd62a7SDenis Karpov dsor++; 65211dd62a7SDenis Karpov 65311dd62a7SDenis Karpov if (dsor > 250) 65411dd62a7SDenis Karpov dsor = 250; 65511dd62a7SDenis Karpov } 65611dd62a7SDenis Karpov 65711dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, SYSCTL, 65811dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCTL) & ~CEN); 65911dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, SYSCTL, (dsor << 6) | (DTO << 16)); 66011dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, SYSCTL, 66111dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCTL) | ICE); 66211dd62a7SDenis Karpov 66311dd62a7SDenis Karpov timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 66411dd62a7SDenis Karpov while ((OMAP_HSMMC_READ(host->base, SYSCTL) & ICS) != ICS 66511dd62a7SDenis Karpov && time_before(jiffies, timeout)) 66611dd62a7SDenis Karpov ; 66711dd62a7SDenis Karpov 66811dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, SYSCTL, 66911dd62a7SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCTL) | CEN); 67011dd62a7SDenis Karpov 67111dd62a7SDenis Karpov con = OMAP_HSMMC_READ(host->base, CON); 67211dd62a7SDenis Karpov if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN) 67311dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, CON, con | OD); 67411dd62a7SDenis Karpov else 67511dd62a7SDenis Karpov OMAP_HSMMC_WRITE(host->base, CON, con & ~OD); 67611dd62a7SDenis Karpov out: 67711dd62a7SDenis Karpov host->context_loss = context_loss; 67811dd62a7SDenis Karpov 67911dd62a7SDenis Karpov dev_dbg(mmc_dev(host->mmc), "context is restored\n"); 68011dd62a7SDenis Karpov return 0; 68111dd62a7SDenis Karpov } 68211dd62a7SDenis Karpov 68311dd62a7SDenis Karpov /* 68411dd62a7SDenis Karpov * Save the MMC host context (store the number of power state changes so far). 68511dd62a7SDenis Karpov */ 68670a3341aSDenis Karpov static void omap_hsmmc_context_save(struct omap_hsmmc_host *host) 68711dd62a7SDenis Karpov { 68811dd62a7SDenis Karpov struct omap_mmc_platform_data *pdata = host->pdata; 68911dd62a7SDenis Karpov int context_loss; 69011dd62a7SDenis Karpov 69111dd62a7SDenis Karpov if (pdata->get_context_loss_count) { 69211dd62a7SDenis Karpov context_loss = pdata->get_context_loss_count(host->dev); 69311dd62a7SDenis Karpov if (context_loss < 0) 69411dd62a7SDenis Karpov return; 69511dd62a7SDenis Karpov host->context_loss = context_loss; 69611dd62a7SDenis Karpov } 69711dd62a7SDenis Karpov } 69811dd62a7SDenis Karpov 69911dd62a7SDenis Karpov #else 70011dd62a7SDenis Karpov 70170a3341aSDenis Karpov static int omap_hsmmc_context_restore(struct omap_hsmmc_host *host) 70211dd62a7SDenis Karpov { 70311dd62a7SDenis Karpov return 0; 70411dd62a7SDenis Karpov } 70511dd62a7SDenis Karpov 70670a3341aSDenis Karpov static void omap_hsmmc_context_save(struct omap_hsmmc_host *host) 70711dd62a7SDenis Karpov { 70811dd62a7SDenis Karpov } 70911dd62a7SDenis Karpov 71011dd62a7SDenis Karpov #endif 71111dd62a7SDenis Karpov 712a45c6cb8SMadhusudhan Chikkature /* 713a45c6cb8SMadhusudhan Chikkature * Send init stream sequence to card 714a45c6cb8SMadhusudhan Chikkature * before sending IDLE command 715a45c6cb8SMadhusudhan Chikkature */ 71670a3341aSDenis Karpov static void send_init_stream(struct omap_hsmmc_host *host) 717a45c6cb8SMadhusudhan Chikkature { 718a45c6cb8SMadhusudhan Chikkature int reg = 0; 719a45c6cb8SMadhusudhan Chikkature unsigned long timeout; 720a45c6cb8SMadhusudhan Chikkature 721b62f6228SAdrian Hunter if (host->protect_card) 722b62f6228SAdrian Hunter return; 723b62f6228SAdrian Hunter 724a45c6cb8SMadhusudhan Chikkature disable_irq(host->irq); 725b417577dSAdrian Hunter 726b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, IE, INT_EN_MASK); 727a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CON, 728a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, CON) | INIT_STREAM); 729a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CMD, INIT_STREAM_CMD); 730a45c6cb8SMadhusudhan Chikkature 731a45c6cb8SMadhusudhan Chikkature timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 732a45c6cb8SMadhusudhan Chikkature while ((reg != CC) && time_before(jiffies, timeout)) 733a45c6cb8SMadhusudhan Chikkature reg = OMAP_HSMMC_READ(host->base, STAT) & CC; 734a45c6cb8SMadhusudhan Chikkature 735a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CON, 736a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, CON) & ~INIT_STREAM); 737c653a6d4SAdrian Hunter 738c653a6d4SAdrian Hunter OMAP_HSMMC_WRITE(host->base, STAT, STAT_CLEAR); 739c653a6d4SAdrian Hunter OMAP_HSMMC_READ(host->base, STAT); 740c653a6d4SAdrian Hunter 741a45c6cb8SMadhusudhan Chikkature enable_irq(host->irq); 742a45c6cb8SMadhusudhan Chikkature } 743a45c6cb8SMadhusudhan Chikkature 744a45c6cb8SMadhusudhan Chikkature static inline 74570a3341aSDenis Karpov int omap_hsmmc_cover_is_closed(struct omap_hsmmc_host *host) 746a45c6cb8SMadhusudhan Chikkature { 747a45c6cb8SMadhusudhan Chikkature int r = 1; 748a45c6cb8SMadhusudhan Chikkature 749191d1f1dSDenis Karpov if (mmc_slot(host).get_cover_state) 750191d1f1dSDenis Karpov r = mmc_slot(host).get_cover_state(host->dev, host->slot_id); 751a45c6cb8SMadhusudhan Chikkature return r; 752a45c6cb8SMadhusudhan Chikkature } 753a45c6cb8SMadhusudhan Chikkature 754a45c6cb8SMadhusudhan Chikkature static ssize_t 75570a3341aSDenis Karpov omap_hsmmc_show_cover_switch(struct device *dev, struct device_attribute *attr, 756a45c6cb8SMadhusudhan Chikkature char *buf) 757a45c6cb8SMadhusudhan Chikkature { 758a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev); 75970a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 760a45c6cb8SMadhusudhan Chikkature 76170a3341aSDenis Karpov return sprintf(buf, "%s\n", 76270a3341aSDenis Karpov omap_hsmmc_cover_is_closed(host) ? "closed" : "open"); 763a45c6cb8SMadhusudhan Chikkature } 764a45c6cb8SMadhusudhan Chikkature 76570a3341aSDenis Karpov static DEVICE_ATTR(cover_switch, S_IRUGO, omap_hsmmc_show_cover_switch, NULL); 766a45c6cb8SMadhusudhan Chikkature 767a45c6cb8SMadhusudhan Chikkature static ssize_t 76870a3341aSDenis Karpov omap_hsmmc_show_slot_name(struct device *dev, struct device_attribute *attr, 769a45c6cb8SMadhusudhan Chikkature char *buf) 770a45c6cb8SMadhusudhan Chikkature { 771a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc = container_of(dev, struct mmc_host, class_dev); 77270a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 773a45c6cb8SMadhusudhan Chikkature 774191d1f1dSDenis Karpov return sprintf(buf, "%s\n", mmc_slot(host).name); 775a45c6cb8SMadhusudhan Chikkature } 776a45c6cb8SMadhusudhan Chikkature 77770a3341aSDenis Karpov static DEVICE_ATTR(slot_name, S_IRUGO, omap_hsmmc_show_slot_name, NULL); 778a45c6cb8SMadhusudhan Chikkature 779a45c6cb8SMadhusudhan Chikkature /* 780a45c6cb8SMadhusudhan Chikkature * Configure the response type and send the cmd. 781a45c6cb8SMadhusudhan Chikkature */ 782a45c6cb8SMadhusudhan Chikkature static void 78370a3341aSDenis Karpov omap_hsmmc_start_command(struct omap_hsmmc_host *host, struct mmc_command *cmd, 784a45c6cb8SMadhusudhan Chikkature struct mmc_data *data) 785a45c6cb8SMadhusudhan Chikkature { 786a45c6cb8SMadhusudhan Chikkature int cmdreg = 0, resptype = 0, cmdtype = 0; 787a45c6cb8SMadhusudhan Chikkature 788a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "%s: CMD%d, argument 0x%08x\n", 789a45c6cb8SMadhusudhan Chikkature mmc_hostname(host->mmc), cmd->opcode, cmd->arg); 790a45c6cb8SMadhusudhan Chikkature host->cmd = cmd; 791a45c6cb8SMadhusudhan Chikkature 79293caf8e6SAdrian Hunter omap_hsmmc_enable_irq(host, cmd); 793a45c6cb8SMadhusudhan Chikkature 7944a694dc9SAdrian Hunter host->response_busy = 0; 795a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_PRESENT) { 796a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_136) 797a45c6cb8SMadhusudhan Chikkature resptype = 1; 7984a694dc9SAdrian Hunter else if (cmd->flags & MMC_RSP_BUSY) { 7994a694dc9SAdrian Hunter resptype = 3; 8004a694dc9SAdrian Hunter host->response_busy = 1; 8014a694dc9SAdrian Hunter } else 802a45c6cb8SMadhusudhan Chikkature resptype = 2; 803a45c6cb8SMadhusudhan Chikkature } 804a45c6cb8SMadhusudhan Chikkature 805a45c6cb8SMadhusudhan Chikkature /* 806a45c6cb8SMadhusudhan Chikkature * Unlike OMAP1 controller, the cmdtype does not seem to be based on 807a45c6cb8SMadhusudhan Chikkature * ac, bc, adtc, bcr. Only commands ending an open ended transfer need 808a45c6cb8SMadhusudhan Chikkature * a val of 0x3, rest 0x0. 809a45c6cb8SMadhusudhan Chikkature */ 810a45c6cb8SMadhusudhan Chikkature if (cmd == host->mrq->stop) 811a45c6cb8SMadhusudhan Chikkature cmdtype = 0x3; 812a45c6cb8SMadhusudhan Chikkature 813a45c6cb8SMadhusudhan Chikkature cmdreg = (cmd->opcode << 24) | (resptype << 16) | (cmdtype << 22); 814a45c6cb8SMadhusudhan Chikkature 815a45c6cb8SMadhusudhan Chikkature if (data) { 816a45c6cb8SMadhusudhan Chikkature cmdreg |= DP_SELECT | MSBS | BCE; 817a45c6cb8SMadhusudhan Chikkature if (data->flags & MMC_DATA_READ) 818a45c6cb8SMadhusudhan Chikkature cmdreg |= DDIR; 819a45c6cb8SMadhusudhan Chikkature else 820a45c6cb8SMadhusudhan Chikkature cmdreg &= ~(DDIR); 821a45c6cb8SMadhusudhan Chikkature } 822a45c6cb8SMadhusudhan Chikkature 823a45c6cb8SMadhusudhan Chikkature if (host->use_dma) 824a45c6cb8SMadhusudhan Chikkature cmdreg |= DMA_EN; 825a45c6cb8SMadhusudhan Chikkature 826b417577dSAdrian Hunter host->req_in_progress = 1; 8274dffd7a2SAdrian Hunter 828a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, ARG, cmd->arg); 829a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, CMD, cmdreg); 830a45c6cb8SMadhusudhan Chikkature } 831a45c6cb8SMadhusudhan Chikkature 8320ccd76d4SJuha Yrjola static int 83370a3341aSDenis Karpov omap_hsmmc_get_dma_dir(struct omap_hsmmc_host *host, struct mmc_data *data) 8340ccd76d4SJuha Yrjola { 8350ccd76d4SJuha Yrjola if (data->flags & MMC_DATA_WRITE) 8360ccd76d4SJuha Yrjola return DMA_TO_DEVICE; 8370ccd76d4SJuha Yrjola else 8380ccd76d4SJuha Yrjola return DMA_FROM_DEVICE; 8390ccd76d4SJuha Yrjola } 8400ccd76d4SJuha Yrjola 841b417577dSAdrian Hunter static void omap_hsmmc_request_done(struct omap_hsmmc_host *host, struct mmc_request *mrq) 842b417577dSAdrian Hunter { 843b417577dSAdrian Hunter int dma_ch; 844b417577dSAdrian Hunter 845b417577dSAdrian Hunter spin_lock(&host->irq_lock); 846b417577dSAdrian Hunter host->req_in_progress = 0; 847b417577dSAdrian Hunter dma_ch = host->dma_ch; 848b417577dSAdrian Hunter spin_unlock(&host->irq_lock); 849b417577dSAdrian Hunter 850b417577dSAdrian Hunter omap_hsmmc_disable_irq(host); 851b417577dSAdrian Hunter /* Do not complete the request if DMA is still in progress */ 852b417577dSAdrian Hunter if (mrq->data && host->use_dma && dma_ch != -1) 853b417577dSAdrian Hunter return; 854b417577dSAdrian Hunter host->mrq = NULL; 855b417577dSAdrian Hunter mmc_request_done(host->mmc, mrq); 856b417577dSAdrian Hunter } 857b417577dSAdrian Hunter 858a45c6cb8SMadhusudhan Chikkature /* 859a45c6cb8SMadhusudhan Chikkature * Notify the transfer complete to MMC core 860a45c6cb8SMadhusudhan Chikkature */ 861a45c6cb8SMadhusudhan Chikkature static void 86270a3341aSDenis Karpov omap_hsmmc_xfer_done(struct omap_hsmmc_host *host, struct mmc_data *data) 863a45c6cb8SMadhusudhan Chikkature { 8644a694dc9SAdrian Hunter if (!data) { 8654a694dc9SAdrian Hunter struct mmc_request *mrq = host->mrq; 8664a694dc9SAdrian Hunter 86723050103SAdrian Hunter /* TC before CC from CMD6 - don't know why, but it happens */ 86823050103SAdrian Hunter if (host->cmd && host->cmd->opcode == 6 && 86923050103SAdrian Hunter host->response_busy) { 87023050103SAdrian Hunter host->response_busy = 0; 87123050103SAdrian Hunter return; 87223050103SAdrian Hunter } 87323050103SAdrian Hunter 874b417577dSAdrian Hunter omap_hsmmc_request_done(host, mrq); 8754a694dc9SAdrian Hunter return; 8764a694dc9SAdrian Hunter } 8774a694dc9SAdrian Hunter 878a45c6cb8SMadhusudhan Chikkature host->data = NULL; 879a45c6cb8SMadhusudhan Chikkature 880a45c6cb8SMadhusudhan Chikkature if (!data->error) 881a45c6cb8SMadhusudhan Chikkature data->bytes_xfered += data->blocks * (data->blksz); 882a45c6cb8SMadhusudhan Chikkature else 883a45c6cb8SMadhusudhan Chikkature data->bytes_xfered = 0; 884a45c6cb8SMadhusudhan Chikkature 885a45c6cb8SMadhusudhan Chikkature if (!data->stop) { 886b417577dSAdrian Hunter omap_hsmmc_request_done(host, data->mrq); 887a45c6cb8SMadhusudhan Chikkature return; 888a45c6cb8SMadhusudhan Chikkature } 88970a3341aSDenis Karpov omap_hsmmc_start_command(host, data->stop, NULL); 890a45c6cb8SMadhusudhan Chikkature } 891a45c6cb8SMadhusudhan Chikkature 892a45c6cb8SMadhusudhan Chikkature /* 893a45c6cb8SMadhusudhan Chikkature * Notify the core about command completion 894a45c6cb8SMadhusudhan Chikkature */ 895a45c6cb8SMadhusudhan Chikkature static void 89670a3341aSDenis Karpov omap_hsmmc_cmd_done(struct omap_hsmmc_host *host, struct mmc_command *cmd) 897a45c6cb8SMadhusudhan Chikkature { 898a45c6cb8SMadhusudhan Chikkature host->cmd = NULL; 899a45c6cb8SMadhusudhan Chikkature 900a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_PRESENT) { 901a45c6cb8SMadhusudhan Chikkature if (cmd->flags & MMC_RSP_136) { 902a45c6cb8SMadhusudhan Chikkature /* response type 2 */ 903a45c6cb8SMadhusudhan Chikkature cmd->resp[3] = OMAP_HSMMC_READ(host->base, RSP10); 904a45c6cb8SMadhusudhan Chikkature cmd->resp[2] = OMAP_HSMMC_READ(host->base, RSP32); 905a45c6cb8SMadhusudhan Chikkature cmd->resp[1] = OMAP_HSMMC_READ(host->base, RSP54); 906a45c6cb8SMadhusudhan Chikkature cmd->resp[0] = OMAP_HSMMC_READ(host->base, RSP76); 907a45c6cb8SMadhusudhan Chikkature } else { 908a45c6cb8SMadhusudhan Chikkature /* response types 1, 1b, 3, 4, 5, 6 */ 909a45c6cb8SMadhusudhan Chikkature cmd->resp[0] = OMAP_HSMMC_READ(host->base, RSP10); 910a45c6cb8SMadhusudhan Chikkature } 911a45c6cb8SMadhusudhan Chikkature } 912b417577dSAdrian Hunter if ((host->data == NULL && !host->response_busy) || cmd->error) 913b417577dSAdrian Hunter omap_hsmmc_request_done(host, cmd->mrq); 914a45c6cb8SMadhusudhan Chikkature } 915a45c6cb8SMadhusudhan Chikkature 916a45c6cb8SMadhusudhan Chikkature /* 917a45c6cb8SMadhusudhan Chikkature * DMA clean up for command errors 918a45c6cb8SMadhusudhan Chikkature */ 91970a3341aSDenis Karpov static void omap_hsmmc_dma_cleanup(struct omap_hsmmc_host *host, int errno) 920a45c6cb8SMadhusudhan Chikkature { 921b417577dSAdrian Hunter int dma_ch; 922b417577dSAdrian Hunter 92382788ff5SJarkko Lavinen host->data->error = errno; 924a45c6cb8SMadhusudhan Chikkature 925b417577dSAdrian Hunter spin_lock(&host->irq_lock); 926b417577dSAdrian Hunter dma_ch = host->dma_ch; 927b417577dSAdrian Hunter host->dma_ch = -1; 928b417577dSAdrian Hunter spin_unlock(&host->irq_lock); 929b417577dSAdrian Hunter 930b417577dSAdrian Hunter if (host->use_dma && dma_ch != -1) { 931a45c6cb8SMadhusudhan Chikkature dma_unmap_sg(mmc_dev(host->mmc), host->data->sg, host->dma_len, 93270a3341aSDenis Karpov omap_hsmmc_get_dma_dir(host, host->data)); 933b417577dSAdrian Hunter omap_free_dma(dma_ch); 934a45c6cb8SMadhusudhan Chikkature } 935a45c6cb8SMadhusudhan Chikkature host->data = NULL; 936a45c6cb8SMadhusudhan Chikkature } 937a45c6cb8SMadhusudhan Chikkature 938a45c6cb8SMadhusudhan Chikkature /* 939a45c6cb8SMadhusudhan Chikkature * Readable error output 940a45c6cb8SMadhusudhan Chikkature */ 941a45c6cb8SMadhusudhan Chikkature #ifdef CONFIG_MMC_DEBUG 94270a3341aSDenis Karpov static void omap_hsmmc_report_irq(struct omap_hsmmc_host *host, u32 status) 943a45c6cb8SMadhusudhan Chikkature { 944a45c6cb8SMadhusudhan Chikkature /* --- means reserved bit without definition at documentation */ 94570a3341aSDenis Karpov static const char *omap_hsmmc_status_bits[] = { 946a45c6cb8SMadhusudhan Chikkature "CC", "TC", "BGE", "---", "BWR", "BRR", "---", "---", "CIRQ", 947a45c6cb8SMadhusudhan Chikkature "OBI", "---", "---", "---", "---", "---", "ERRI", "CTO", "CCRC", 948a45c6cb8SMadhusudhan Chikkature "CEB", "CIE", "DTO", "DCRC", "DEB", "---", "ACE", "---", 949a45c6cb8SMadhusudhan Chikkature "---", "---", "---", "CERR", "CERR", "BADA", "---", "---", "---" 950a45c6cb8SMadhusudhan Chikkature }; 951a45c6cb8SMadhusudhan Chikkature char res[256]; 952a45c6cb8SMadhusudhan Chikkature char *buf = res; 953a45c6cb8SMadhusudhan Chikkature int len, i; 954a45c6cb8SMadhusudhan Chikkature 955a45c6cb8SMadhusudhan Chikkature len = sprintf(buf, "MMC IRQ 0x%x :", status); 956a45c6cb8SMadhusudhan Chikkature buf += len; 957a45c6cb8SMadhusudhan Chikkature 95870a3341aSDenis Karpov for (i = 0; i < ARRAY_SIZE(omap_hsmmc_status_bits); i++) 959a45c6cb8SMadhusudhan Chikkature if (status & (1 << i)) { 96070a3341aSDenis Karpov len = sprintf(buf, " %s", omap_hsmmc_status_bits[i]); 961a45c6cb8SMadhusudhan Chikkature buf += len; 962a45c6cb8SMadhusudhan Chikkature } 963a45c6cb8SMadhusudhan Chikkature 964a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "%s\n", res); 965a45c6cb8SMadhusudhan Chikkature } 966a45c6cb8SMadhusudhan Chikkature #endif /* CONFIG_MMC_DEBUG */ 967a45c6cb8SMadhusudhan Chikkature 9683ebf74b1SJean Pihet /* 9693ebf74b1SJean Pihet * MMC controller internal state machines reset 9703ebf74b1SJean Pihet * 9713ebf74b1SJean Pihet * Used to reset command or data internal state machines, using respectively 9723ebf74b1SJean Pihet * SRC or SRD bit of SYSCTL register 9733ebf74b1SJean Pihet * Can be called from interrupt context 9743ebf74b1SJean Pihet */ 97570a3341aSDenis Karpov static inline void omap_hsmmc_reset_controller_fsm(struct omap_hsmmc_host *host, 9763ebf74b1SJean Pihet unsigned long bit) 9773ebf74b1SJean Pihet { 9783ebf74b1SJean Pihet unsigned long i = 0; 9793ebf74b1SJean Pihet unsigned long limit = (loops_per_jiffy * 9803ebf74b1SJean Pihet msecs_to_jiffies(MMC_TIMEOUT_MS)); 9813ebf74b1SJean Pihet 9823ebf74b1SJean Pihet OMAP_HSMMC_WRITE(host->base, SYSCTL, 9833ebf74b1SJean Pihet OMAP_HSMMC_READ(host->base, SYSCTL) | bit); 9843ebf74b1SJean Pihet 98507ad64b6SMadhusudhan Chikkature /* 98607ad64b6SMadhusudhan Chikkature * OMAP4 ES2 and greater has an updated reset logic. 98707ad64b6SMadhusudhan Chikkature * Monitor a 0->1 transition first 98807ad64b6SMadhusudhan Chikkature */ 98907ad64b6SMadhusudhan Chikkature if (mmc_slot(host).features & HSMMC_HAS_UPDATED_RESET) { 99007ad64b6SMadhusudhan Chikkature while ((!(OMAP_HSMMC_READ(host, SYSCTL) & bit)) 99107ad64b6SMadhusudhan Chikkature && (i++ < limit)) 99207ad64b6SMadhusudhan Chikkature cpu_relax(); 99307ad64b6SMadhusudhan Chikkature } 99407ad64b6SMadhusudhan Chikkature i = 0; 99507ad64b6SMadhusudhan Chikkature 9963ebf74b1SJean Pihet while ((OMAP_HSMMC_READ(host->base, SYSCTL) & bit) && 9973ebf74b1SJean Pihet (i++ < limit)) 9983ebf74b1SJean Pihet cpu_relax(); 9993ebf74b1SJean Pihet 10003ebf74b1SJean Pihet if (OMAP_HSMMC_READ(host->base, SYSCTL) & bit) 10013ebf74b1SJean Pihet dev_err(mmc_dev(host->mmc), 10023ebf74b1SJean Pihet "Timeout waiting on controller reset in %s\n", 10033ebf74b1SJean Pihet __func__); 10043ebf74b1SJean Pihet } 1005a45c6cb8SMadhusudhan Chikkature 1006b417577dSAdrian Hunter static void omap_hsmmc_do_irq(struct omap_hsmmc_host *host, int status) 1007a45c6cb8SMadhusudhan Chikkature { 1008a45c6cb8SMadhusudhan Chikkature struct mmc_data *data; 1009b417577dSAdrian Hunter int end_cmd = 0, end_trans = 0; 1010a45c6cb8SMadhusudhan Chikkature 1011b417577dSAdrian Hunter if (!host->req_in_progress) { 1012b417577dSAdrian Hunter do { 1013b417577dSAdrian Hunter OMAP_HSMMC_WRITE(host->base, STAT, status); 101400adadc1SKevin Hilman /* Flush posted write */ 1015b417577dSAdrian Hunter status = OMAP_HSMMC_READ(host->base, STAT); 1016b417577dSAdrian Hunter } while (status & INT_EN_MASK); 1017b417577dSAdrian Hunter return; 1018a45c6cb8SMadhusudhan Chikkature } 1019a45c6cb8SMadhusudhan Chikkature 1020a45c6cb8SMadhusudhan Chikkature data = host->data; 1021a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "IRQ Status is %x\n", status); 1022a45c6cb8SMadhusudhan Chikkature 1023a45c6cb8SMadhusudhan Chikkature if (status & ERR) { 1024a45c6cb8SMadhusudhan Chikkature #ifdef CONFIG_MMC_DEBUG 102570a3341aSDenis Karpov omap_hsmmc_report_irq(host, status); 1026a45c6cb8SMadhusudhan Chikkature #endif 1027a45c6cb8SMadhusudhan Chikkature if ((status & CMD_TIMEOUT) || 1028a45c6cb8SMadhusudhan Chikkature (status & CMD_CRC)) { 1029a45c6cb8SMadhusudhan Chikkature if (host->cmd) { 1030a45c6cb8SMadhusudhan Chikkature if (status & CMD_TIMEOUT) { 103170a3341aSDenis Karpov omap_hsmmc_reset_controller_fsm(host, 1032191d1f1dSDenis Karpov SRC); 1033a45c6cb8SMadhusudhan Chikkature host->cmd->error = -ETIMEDOUT; 1034a45c6cb8SMadhusudhan Chikkature } else { 1035a45c6cb8SMadhusudhan Chikkature host->cmd->error = -EILSEQ; 1036a45c6cb8SMadhusudhan Chikkature } 1037a45c6cb8SMadhusudhan Chikkature end_cmd = 1; 1038a45c6cb8SMadhusudhan Chikkature } 10394a694dc9SAdrian Hunter if (host->data || host->response_busy) { 10404a694dc9SAdrian Hunter if (host->data) 104170a3341aSDenis Karpov omap_hsmmc_dma_cleanup(host, 104270a3341aSDenis Karpov -ETIMEDOUT); 10434a694dc9SAdrian Hunter host->response_busy = 0; 104470a3341aSDenis Karpov omap_hsmmc_reset_controller_fsm(host, SRD); 1045c232f457SJean Pihet } 1046a45c6cb8SMadhusudhan Chikkature } 1047a45c6cb8SMadhusudhan Chikkature if ((status & DATA_TIMEOUT) || 1048a45c6cb8SMadhusudhan Chikkature (status & DATA_CRC)) { 10494a694dc9SAdrian Hunter if (host->data || host->response_busy) { 10504a694dc9SAdrian Hunter int err = (status & DATA_TIMEOUT) ? 10514a694dc9SAdrian Hunter -ETIMEDOUT : -EILSEQ; 10524a694dc9SAdrian Hunter 10534a694dc9SAdrian Hunter if (host->data) 105470a3341aSDenis Karpov omap_hsmmc_dma_cleanup(host, err); 1055a45c6cb8SMadhusudhan Chikkature else 10564a694dc9SAdrian Hunter host->mrq->cmd->error = err; 10574a694dc9SAdrian Hunter host->response_busy = 0; 105870a3341aSDenis Karpov omap_hsmmc_reset_controller_fsm(host, SRD); 1059a45c6cb8SMadhusudhan Chikkature end_trans = 1; 1060a45c6cb8SMadhusudhan Chikkature } 1061a45c6cb8SMadhusudhan Chikkature } 1062a45c6cb8SMadhusudhan Chikkature if (status & CARD_ERR) { 1063a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1064a45c6cb8SMadhusudhan Chikkature "Ignoring card err CMD%d\n", host->cmd->opcode); 1065a45c6cb8SMadhusudhan Chikkature if (host->cmd) 1066a45c6cb8SMadhusudhan Chikkature end_cmd = 1; 1067a45c6cb8SMadhusudhan Chikkature if (host->data) 1068a45c6cb8SMadhusudhan Chikkature end_trans = 1; 1069a45c6cb8SMadhusudhan Chikkature } 1070a45c6cb8SMadhusudhan Chikkature } 1071a45c6cb8SMadhusudhan Chikkature 1072a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, STAT, status); 1073a45c6cb8SMadhusudhan Chikkature 1074a8fe29d8SJarkko Lavinen if (end_cmd || ((status & CC) && host->cmd)) 107570a3341aSDenis Karpov omap_hsmmc_cmd_done(host, host->cmd); 10760a40e647SJarkko Lavinen if ((end_trans || (status & TC)) && host->mrq) 107770a3341aSDenis Karpov omap_hsmmc_xfer_done(host, data); 1078b417577dSAdrian Hunter } 1079a45c6cb8SMadhusudhan Chikkature 1080b417577dSAdrian Hunter /* 1081b417577dSAdrian Hunter * MMC controller IRQ handler 1082b417577dSAdrian Hunter */ 1083b417577dSAdrian Hunter static irqreturn_t omap_hsmmc_irq(int irq, void *dev_id) 1084b417577dSAdrian Hunter { 1085b417577dSAdrian Hunter struct omap_hsmmc_host *host = dev_id; 1086b417577dSAdrian Hunter int status; 1087b417577dSAdrian Hunter 1088b417577dSAdrian Hunter status = OMAP_HSMMC_READ(host->base, STAT); 1089b417577dSAdrian Hunter do { 1090b417577dSAdrian Hunter omap_hsmmc_do_irq(host, status); 1091b417577dSAdrian Hunter /* Flush posted write */ 1092b417577dSAdrian Hunter status = OMAP_HSMMC_READ(host->base, STAT); 1093b417577dSAdrian Hunter } while (status & INT_EN_MASK); 10944dffd7a2SAdrian Hunter 1095a45c6cb8SMadhusudhan Chikkature return IRQ_HANDLED; 1096a45c6cb8SMadhusudhan Chikkature } 1097a45c6cb8SMadhusudhan Chikkature 109870a3341aSDenis Karpov static void set_sd_bus_power(struct omap_hsmmc_host *host) 1099e13bb300SAdrian Hunter { 1100e13bb300SAdrian Hunter unsigned long i; 1101e13bb300SAdrian Hunter 1102e13bb300SAdrian Hunter OMAP_HSMMC_WRITE(host->base, HCTL, 1103e13bb300SAdrian Hunter OMAP_HSMMC_READ(host->base, HCTL) | SDBP); 1104e13bb300SAdrian Hunter for (i = 0; i < loops_per_jiffy; i++) { 1105e13bb300SAdrian Hunter if (OMAP_HSMMC_READ(host->base, HCTL) & SDBP) 1106e13bb300SAdrian Hunter break; 1107e13bb300SAdrian Hunter cpu_relax(); 1108e13bb300SAdrian Hunter } 1109e13bb300SAdrian Hunter } 1110e13bb300SAdrian Hunter 1111a45c6cb8SMadhusudhan Chikkature /* 1112eb250826SDavid Brownell * Switch MMC interface voltage ... only relevant for MMC1. 1113eb250826SDavid Brownell * 1114eb250826SDavid Brownell * MMC2 and MMC3 use fixed 1.8V levels, and maybe a transceiver. 1115eb250826SDavid Brownell * The MMC2 transceiver controls are used instead of DAT4..DAT7. 1116eb250826SDavid Brownell * Some chips, like eMMC ones, use internal transceivers. 1117a45c6cb8SMadhusudhan Chikkature */ 111870a3341aSDenis Karpov static int omap_hsmmc_switch_opcond(struct omap_hsmmc_host *host, int vdd) 1119a45c6cb8SMadhusudhan Chikkature { 1120a45c6cb8SMadhusudhan Chikkature u32 reg_val = 0; 1121a45c6cb8SMadhusudhan Chikkature int ret; 1122a45c6cb8SMadhusudhan Chikkature 1123a45c6cb8SMadhusudhan Chikkature /* Disable the clocks */ 1124a45c6cb8SMadhusudhan Chikkature clk_disable(host->fclk); 1125a45c6cb8SMadhusudhan Chikkature clk_disable(host->iclk); 11262bec0893SAdrian Hunter if (host->got_dbclk) 1127a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 1128a45c6cb8SMadhusudhan Chikkature 1129a45c6cb8SMadhusudhan Chikkature /* Turn the power off */ 1130a45c6cb8SMadhusudhan Chikkature ret = mmc_slot(host).set_power(host->dev, host->slot_id, 0, 0); 1131a45c6cb8SMadhusudhan Chikkature 1132a45c6cb8SMadhusudhan Chikkature /* Turn the power ON with given VDD 1.8 or 3.0v */ 11332bec0893SAdrian Hunter if (!ret) 11342bec0893SAdrian Hunter ret = mmc_slot(host).set_power(host->dev, host->slot_id, 1, 11352bec0893SAdrian Hunter vdd); 11362bec0893SAdrian Hunter clk_enable(host->iclk); 11372bec0893SAdrian Hunter clk_enable(host->fclk); 11382bec0893SAdrian Hunter if (host->got_dbclk) 11392bec0893SAdrian Hunter clk_enable(host->dbclk); 11402bec0893SAdrian Hunter 1141a45c6cb8SMadhusudhan Chikkature if (ret != 0) 1142a45c6cb8SMadhusudhan Chikkature goto err; 1143a45c6cb8SMadhusudhan Chikkature 1144a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 1145a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) & SDVSCLR); 1146a45c6cb8SMadhusudhan Chikkature reg_val = OMAP_HSMMC_READ(host->base, HCTL); 1147eb250826SDavid Brownell 1148a45c6cb8SMadhusudhan Chikkature /* 1149a45c6cb8SMadhusudhan Chikkature * If a MMC dual voltage card is detected, the set_ios fn calls 1150a45c6cb8SMadhusudhan Chikkature * this fn with VDD bit set for 1.8V. Upon card removal from the 115170a3341aSDenis Karpov * slot, omap_hsmmc_set_ios sets the VDD back to 3V on MMC_POWER_OFF. 1152a45c6cb8SMadhusudhan Chikkature * 1153eb250826SDavid Brownell * Cope with a bit of slop in the range ... per data sheets: 1154eb250826SDavid Brownell * - "1.8V" for vdds_mmc1/vdds_mmc1a can be up to 2.45V max, 1155eb250826SDavid Brownell * but recommended values are 1.71V to 1.89V 1156eb250826SDavid Brownell * - "3.0V" for vdds_mmc1/vdds_mmc1a can be up to 3.5V max, 1157eb250826SDavid Brownell * but recommended values are 2.7V to 3.3V 1158eb250826SDavid Brownell * 1159eb250826SDavid Brownell * Board setup code shouldn't permit anything very out-of-range. 1160eb250826SDavid Brownell * TWL4030-family VMMC1 and VSIM regulators are fine (avoiding the 1161eb250826SDavid Brownell * middle range) but VSIM can't power DAT4..DAT7 at more than 3V. 1162a45c6cb8SMadhusudhan Chikkature */ 1163eb250826SDavid Brownell if ((1 << vdd) <= MMC_VDD_23_24) 1164a45c6cb8SMadhusudhan Chikkature reg_val |= SDVS18; 1165eb250826SDavid Brownell else 1166eb250826SDavid Brownell reg_val |= SDVS30; 1167a45c6cb8SMadhusudhan Chikkature 1168a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, reg_val); 1169e13bb300SAdrian Hunter set_sd_bus_power(host); 1170a45c6cb8SMadhusudhan Chikkature 1171a45c6cb8SMadhusudhan Chikkature return 0; 1172a45c6cb8SMadhusudhan Chikkature err: 1173a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Unable to switch operating voltage\n"); 1174a45c6cb8SMadhusudhan Chikkature return ret; 1175a45c6cb8SMadhusudhan Chikkature } 1176a45c6cb8SMadhusudhan Chikkature 1177b62f6228SAdrian Hunter /* Protect the card while the cover is open */ 1178b62f6228SAdrian Hunter static void omap_hsmmc_protect_card(struct omap_hsmmc_host *host) 1179b62f6228SAdrian Hunter { 1180b62f6228SAdrian Hunter if (!mmc_slot(host).get_cover_state) 1181b62f6228SAdrian Hunter return; 1182b62f6228SAdrian Hunter 1183b62f6228SAdrian Hunter host->reqs_blocked = 0; 1184b62f6228SAdrian Hunter if (mmc_slot(host).get_cover_state(host->dev, host->slot_id)) { 1185b62f6228SAdrian Hunter if (host->protect_card) { 1186b62f6228SAdrian Hunter printk(KERN_INFO "%s: cover is closed, " 1187b62f6228SAdrian Hunter "card is now accessible\n", 1188b62f6228SAdrian Hunter mmc_hostname(host->mmc)); 1189b62f6228SAdrian Hunter host->protect_card = 0; 1190b62f6228SAdrian Hunter } 1191b62f6228SAdrian Hunter } else { 1192b62f6228SAdrian Hunter if (!host->protect_card) { 1193b62f6228SAdrian Hunter printk(KERN_INFO "%s: cover is open, " 1194b62f6228SAdrian Hunter "card is now inaccessible\n", 1195b62f6228SAdrian Hunter mmc_hostname(host->mmc)); 1196b62f6228SAdrian Hunter host->protect_card = 1; 1197b62f6228SAdrian Hunter } 1198b62f6228SAdrian Hunter } 1199b62f6228SAdrian Hunter } 1200b62f6228SAdrian Hunter 1201a45c6cb8SMadhusudhan Chikkature /* 1202a45c6cb8SMadhusudhan Chikkature * Work Item to notify the core about card insertion/removal 1203a45c6cb8SMadhusudhan Chikkature */ 120470a3341aSDenis Karpov static void omap_hsmmc_detect(struct work_struct *work) 1205a45c6cb8SMadhusudhan Chikkature { 120670a3341aSDenis Karpov struct omap_hsmmc_host *host = 120770a3341aSDenis Karpov container_of(work, struct omap_hsmmc_host, mmc_carddetect_work); 1208249d0fa9SDavid Brownell struct omap_mmc_slot_data *slot = &mmc_slot(host); 1209a6b2240dSAdrian Hunter int carddetect; 1210249d0fa9SDavid Brownell 1211a6b2240dSAdrian Hunter if (host->suspended) 1212a6b2240dSAdrian Hunter return; 1213a45c6cb8SMadhusudhan Chikkature 1214a45c6cb8SMadhusudhan Chikkature sysfs_notify(&host->mmc->class_dev.kobj, NULL, "cover_switch"); 1215a6b2240dSAdrian Hunter 1216191d1f1dSDenis Karpov if (slot->card_detect) 1217db0fefc5SAdrian Hunter carddetect = slot->card_detect(host->dev, host->slot_id); 1218b62f6228SAdrian Hunter else { 1219b62f6228SAdrian Hunter omap_hsmmc_protect_card(host); 1220a6b2240dSAdrian Hunter carddetect = -ENOSYS; 1221b62f6228SAdrian Hunter } 1222a6b2240dSAdrian Hunter 1223cdeebaddSMadhusudhan Chikkature if (carddetect) 1224a45c6cb8SMadhusudhan Chikkature mmc_detect_change(host->mmc, (HZ * 200) / 1000); 1225cdeebaddSMadhusudhan Chikkature else 1226a45c6cb8SMadhusudhan Chikkature mmc_detect_change(host->mmc, (HZ * 50) / 1000); 1227a45c6cb8SMadhusudhan Chikkature } 1228a45c6cb8SMadhusudhan Chikkature 1229a45c6cb8SMadhusudhan Chikkature /* 1230a45c6cb8SMadhusudhan Chikkature * ISR for handling card insertion and removal 1231a45c6cb8SMadhusudhan Chikkature */ 123270a3341aSDenis Karpov static irqreturn_t omap_hsmmc_cd_handler(int irq, void *dev_id) 1233a45c6cb8SMadhusudhan Chikkature { 123470a3341aSDenis Karpov struct omap_hsmmc_host *host = (struct omap_hsmmc_host *)dev_id; 1235a45c6cb8SMadhusudhan Chikkature 1236a6b2240dSAdrian Hunter if (host->suspended) 1237a6b2240dSAdrian Hunter return IRQ_HANDLED; 1238a45c6cb8SMadhusudhan Chikkature schedule_work(&host->mmc_carddetect_work); 1239a45c6cb8SMadhusudhan Chikkature 1240a45c6cb8SMadhusudhan Chikkature return IRQ_HANDLED; 1241a45c6cb8SMadhusudhan Chikkature } 1242a45c6cb8SMadhusudhan Chikkature 124370a3341aSDenis Karpov static int omap_hsmmc_get_dma_sync_dev(struct omap_hsmmc_host *host, 12440ccd76d4SJuha Yrjola struct mmc_data *data) 12450ccd76d4SJuha Yrjola { 12460ccd76d4SJuha Yrjola int sync_dev; 12470ccd76d4SJuha Yrjola 1248f3e2f1ddSGrazvydas Ignotas if (data->flags & MMC_DATA_WRITE) 1249f3e2f1ddSGrazvydas Ignotas sync_dev = host->dma_line_tx; 12500ccd76d4SJuha Yrjola else 1251f3e2f1ddSGrazvydas Ignotas sync_dev = host->dma_line_rx; 12520ccd76d4SJuha Yrjola return sync_dev; 12530ccd76d4SJuha Yrjola } 12540ccd76d4SJuha Yrjola 125570a3341aSDenis Karpov static void omap_hsmmc_config_dma_params(struct omap_hsmmc_host *host, 12560ccd76d4SJuha Yrjola struct mmc_data *data, 12570ccd76d4SJuha Yrjola struct scatterlist *sgl) 12580ccd76d4SJuha Yrjola { 12590ccd76d4SJuha Yrjola int blksz, nblk, dma_ch; 12600ccd76d4SJuha Yrjola 12610ccd76d4SJuha Yrjola dma_ch = host->dma_ch; 12620ccd76d4SJuha Yrjola if (data->flags & MMC_DATA_WRITE) { 12630ccd76d4SJuha Yrjola omap_set_dma_dest_params(dma_ch, 0, OMAP_DMA_AMODE_CONSTANT, 12640ccd76d4SJuha Yrjola (host->mapbase + OMAP_HSMMC_DATA), 0, 0); 12650ccd76d4SJuha Yrjola omap_set_dma_src_params(dma_ch, 0, OMAP_DMA_AMODE_POST_INC, 12660ccd76d4SJuha Yrjola sg_dma_address(sgl), 0, 0); 12670ccd76d4SJuha Yrjola } else { 12680ccd76d4SJuha Yrjola omap_set_dma_src_params(dma_ch, 0, OMAP_DMA_AMODE_CONSTANT, 12690ccd76d4SJuha Yrjola (host->mapbase + OMAP_HSMMC_DATA), 0, 0); 12700ccd76d4SJuha Yrjola omap_set_dma_dest_params(dma_ch, 0, OMAP_DMA_AMODE_POST_INC, 12710ccd76d4SJuha Yrjola sg_dma_address(sgl), 0, 0); 12720ccd76d4SJuha Yrjola } 12730ccd76d4SJuha Yrjola 12740ccd76d4SJuha Yrjola blksz = host->data->blksz; 12750ccd76d4SJuha Yrjola nblk = sg_dma_len(sgl) / blksz; 12760ccd76d4SJuha Yrjola 12770ccd76d4SJuha Yrjola omap_set_dma_transfer_params(dma_ch, OMAP_DMA_DATA_TYPE_S32, 12780ccd76d4SJuha Yrjola blksz / 4, nblk, OMAP_DMA_SYNC_FRAME, 127970a3341aSDenis Karpov omap_hsmmc_get_dma_sync_dev(host, data), 12800ccd76d4SJuha Yrjola !(data->flags & MMC_DATA_WRITE)); 12810ccd76d4SJuha Yrjola 12820ccd76d4SJuha Yrjola omap_start_dma(dma_ch); 12830ccd76d4SJuha Yrjola } 12840ccd76d4SJuha Yrjola 1285a45c6cb8SMadhusudhan Chikkature /* 1286a45c6cb8SMadhusudhan Chikkature * DMA call back function 1287a45c6cb8SMadhusudhan Chikkature */ 1288b417577dSAdrian Hunter static void omap_hsmmc_dma_cb(int lch, u16 ch_status, void *cb_data) 1289a45c6cb8SMadhusudhan Chikkature { 1290b417577dSAdrian Hunter struct omap_hsmmc_host *host = cb_data; 1291b417577dSAdrian Hunter struct mmc_data *data = host->mrq->data; 1292b417577dSAdrian Hunter int dma_ch, req_in_progress; 1293a45c6cb8SMadhusudhan Chikkature 1294f3584e5eSVenkatraman S if (!(ch_status & OMAP_DMA_BLOCK_IRQ)) { 1295f3584e5eSVenkatraman S dev_warn(mmc_dev(host->mmc), "unexpected dma status %x\n", 1296f3584e5eSVenkatraman S ch_status); 1297f3584e5eSVenkatraman S return; 1298f3584e5eSVenkatraman S } 1299a45c6cb8SMadhusudhan Chikkature 1300b417577dSAdrian Hunter spin_lock(&host->irq_lock); 1301b417577dSAdrian Hunter if (host->dma_ch < 0) { 1302b417577dSAdrian Hunter spin_unlock(&host->irq_lock); 1303a45c6cb8SMadhusudhan Chikkature return; 1304b417577dSAdrian Hunter } 1305a45c6cb8SMadhusudhan Chikkature 13060ccd76d4SJuha Yrjola host->dma_sg_idx++; 13070ccd76d4SJuha Yrjola if (host->dma_sg_idx < host->dma_len) { 13080ccd76d4SJuha Yrjola /* Fire up the next transfer. */ 1309b417577dSAdrian Hunter omap_hsmmc_config_dma_params(host, data, 1310b417577dSAdrian Hunter data->sg + host->dma_sg_idx); 1311b417577dSAdrian Hunter spin_unlock(&host->irq_lock); 13120ccd76d4SJuha Yrjola return; 13130ccd76d4SJuha Yrjola } 13140ccd76d4SJuha Yrjola 1315b417577dSAdrian Hunter dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->dma_len, 1316b417577dSAdrian Hunter omap_hsmmc_get_dma_dir(host, data)); 1317b417577dSAdrian Hunter 1318b417577dSAdrian Hunter req_in_progress = host->req_in_progress; 1319b417577dSAdrian Hunter dma_ch = host->dma_ch; 1320a45c6cb8SMadhusudhan Chikkature host->dma_ch = -1; 1321b417577dSAdrian Hunter spin_unlock(&host->irq_lock); 1322b417577dSAdrian Hunter 1323b417577dSAdrian Hunter omap_free_dma(dma_ch); 1324b417577dSAdrian Hunter 1325b417577dSAdrian Hunter /* If DMA has finished after TC, complete the request */ 1326b417577dSAdrian Hunter if (!req_in_progress) { 1327b417577dSAdrian Hunter struct mmc_request *mrq = host->mrq; 1328b417577dSAdrian Hunter 1329b417577dSAdrian Hunter host->mrq = NULL; 1330b417577dSAdrian Hunter mmc_request_done(host->mmc, mrq); 1331b417577dSAdrian Hunter } 1332a45c6cb8SMadhusudhan Chikkature } 1333a45c6cb8SMadhusudhan Chikkature 1334a45c6cb8SMadhusudhan Chikkature /* 1335a45c6cb8SMadhusudhan Chikkature * Routine to configure and start DMA for the MMC card 1336a45c6cb8SMadhusudhan Chikkature */ 133770a3341aSDenis Karpov static int omap_hsmmc_start_dma_transfer(struct omap_hsmmc_host *host, 133870a3341aSDenis Karpov struct mmc_request *req) 1339a45c6cb8SMadhusudhan Chikkature { 1340b417577dSAdrian Hunter int dma_ch = 0, ret = 0, i; 1341a45c6cb8SMadhusudhan Chikkature struct mmc_data *data = req->data; 1342a45c6cb8SMadhusudhan Chikkature 13430ccd76d4SJuha Yrjola /* Sanity check: all the SG entries must be aligned by block size. */ 1344a3f406f8SJarkko Lavinen for (i = 0; i < data->sg_len; i++) { 13450ccd76d4SJuha Yrjola struct scatterlist *sgl; 13460ccd76d4SJuha Yrjola 13470ccd76d4SJuha Yrjola sgl = data->sg + i; 13480ccd76d4SJuha Yrjola if (sgl->length % data->blksz) 13490ccd76d4SJuha Yrjola return -EINVAL; 13500ccd76d4SJuha Yrjola } 13510ccd76d4SJuha Yrjola if ((data->blksz % 4) != 0) 13520ccd76d4SJuha Yrjola /* REVISIT: The MMC buffer increments only when MSB is written. 13530ccd76d4SJuha Yrjola * Return error for blksz which is non multiple of four. 13540ccd76d4SJuha Yrjola */ 13550ccd76d4SJuha Yrjola return -EINVAL; 13560ccd76d4SJuha Yrjola 1357b417577dSAdrian Hunter BUG_ON(host->dma_ch != -1); 1358a45c6cb8SMadhusudhan Chikkature 135970a3341aSDenis Karpov ret = omap_request_dma(omap_hsmmc_get_dma_sync_dev(host, data), 136070a3341aSDenis Karpov "MMC/SD", omap_hsmmc_dma_cb, host, &dma_ch); 1361a45c6cb8SMadhusudhan Chikkature if (ret != 0) { 13620ccd76d4SJuha Yrjola dev_err(mmc_dev(host->mmc), 1363a45c6cb8SMadhusudhan Chikkature "%s: omap_request_dma() failed with %d\n", 1364a45c6cb8SMadhusudhan Chikkature mmc_hostname(host->mmc), ret); 1365a45c6cb8SMadhusudhan Chikkature return ret; 1366a45c6cb8SMadhusudhan Chikkature } 1367a45c6cb8SMadhusudhan Chikkature 1368a45c6cb8SMadhusudhan Chikkature host->dma_len = dma_map_sg(mmc_dev(host->mmc), data->sg, 136970a3341aSDenis Karpov data->sg_len, omap_hsmmc_get_dma_dir(host, data)); 1370a45c6cb8SMadhusudhan Chikkature host->dma_ch = dma_ch; 13710ccd76d4SJuha Yrjola host->dma_sg_idx = 0; 1372a45c6cb8SMadhusudhan Chikkature 137370a3341aSDenis Karpov omap_hsmmc_config_dma_params(host, data, data->sg); 1374a45c6cb8SMadhusudhan Chikkature 1375a45c6cb8SMadhusudhan Chikkature return 0; 1376a45c6cb8SMadhusudhan Chikkature } 1377a45c6cb8SMadhusudhan Chikkature 137870a3341aSDenis Karpov static void set_data_timeout(struct omap_hsmmc_host *host, 1379e2bf08d6SAdrian Hunter unsigned int timeout_ns, 1380e2bf08d6SAdrian Hunter unsigned int timeout_clks) 1381a45c6cb8SMadhusudhan Chikkature { 1382a45c6cb8SMadhusudhan Chikkature unsigned int timeout, cycle_ns; 1383a45c6cb8SMadhusudhan Chikkature uint32_t reg, clkd, dto = 0; 1384a45c6cb8SMadhusudhan Chikkature 1385a45c6cb8SMadhusudhan Chikkature reg = OMAP_HSMMC_READ(host->base, SYSCTL); 1386a45c6cb8SMadhusudhan Chikkature clkd = (reg & CLKD_MASK) >> CLKD_SHIFT; 1387a45c6cb8SMadhusudhan Chikkature if (clkd == 0) 1388a45c6cb8SMadhusudhan Chikkature clkd = 1; 1389a45c6cb8SMadhusudhan Chikkature 1390a45c6cb8SMadhusudhan Chikkature cycle_ns = 1000000000 / (clk_get_rate(host->fclk) / clkd); 1391e2bf08d6SAdrian Hunter timeout = timeout_ns / cycle_ns; 1392e2bf08d6SAdrian Hunter timeout += timeout_clks; 1393a45c6cb8SMadhusudhan Chikkature if (timeout) { 1394a45c6cb8SMadhusudhan Chikkature while ((timeout & 0x80000000) == 0) { 1395a45c6cb8SMadhusudhan Chikkature dto += 1; 1396a45c6cb8SMadhusudhan Chikkature timeout <<= 1; 1397a45c6cb8SMadhusudhan Chikkature } 1398a45c6cb8SMadhusudhan Chikkature dto = 31 - dto; 1399a45c6cb8SMadhusudhan Chikkature timeout <<= 1; 1400a45c6cb8SMadhusudhan Chikkature if (timeout && dto) 1401a45c6cb8SMadhusudhan Chikkature dto += 1; 1402a45c6cb8SMadhusudhan Chikkature if (dto >= 13) 1403a45c6cb8SMadhusudhan Chikkature dto -= 13; 1404a45c6cb8SMadhusudhan Chikkature else 1405a45c6cb8SMadhusudhan Chikkature dto = 0; 1406a45c6cb8SMadhusudhan Chikkature if (dto > 14) 1407a45c6cb8SMadhusudhan Chikkature dto = 14; 1408a45c6cb8SMadhusudhan Chikkature } 1409a45c6cb8SMadhusudhan Chikkature 1410a45c6cb8SMadhusudhan Chikkature reg &= ~DTO_MASK; 1411a45c6cb8SMadhusudhan Chikkature reg |= dto << DTO_SHIFT; 1412a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, reg); 1413a45c6cb8SMadhusudhan Chikkature } 1414a45c6cb8SMadhusudhan Chikkature 1415a45c6cb8SMadhusudhan Chikkature /* 1416a45c6cb8SMadhusudhan Chikkature * Configure block length for MMC/SD cards and initiate the transfer. 1417a45c6cb8SMadhusudhan Chikkature */ 1418a45c6cb8SMadhusudhan Chikkature static int 141970a3341aSDenis Karpov omap_hsmmc_prepare_data(struct omap_hsmmc_host *host, struct mmc_request *req) 1420a45c6cb8SMadhusudhan Chikkature { 1421a45c6cb8SMadhusudhan Chikkature int ret; 1422a45c6cb8SMadhusudhan Chikkature host->data = req->data; 1423a45c6cb8SMadhusudhan Chikkature 1424a45c6cb8SMadhusudhan Chikkature if (req->data == NULL) { 1425a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, BLK, 0); 1426e2bf08d6SAdrian Hunter /* 1427e2bf08d6SAdrian Hunter * Set an arbitrary 100ms data timeout for commands with 1428e2bf08d6SAdrian Hunter * busy signal. 1429e2bf08d6SAdrian Hunter */ 1430e2bf08d6SAdrian Hunter if (req->cmd->flags & MMC_RSP_BUSY) 1431e2bf08d6SAdrian Hunter set_data_timeout(host, 100000000U, 0); 1432a45c6cb8SMadhusudhan Chikkature return 0; 1433a45c6cb8SMadhusudhan Chikkature } 1434a45c6cb8SMadhusudhan Chikkature 1435a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, BLK, (req->data->blksz) 1436a45c6cb8SMadhusudhan Chikkature | (req->data->blocks << 16)); 1437e2bf08d6SAdrian Hunter set_data_timeout(host, req->data->timeout_ns, req->data->timeout_clks); 1438a45c6cb8SMadhusudhan Chikkature 1439a45c6cb8SMadhusudhan Chikkature if (host->use_dma) { 144070a3341aSDenis Karpov ret = omap_hsmmc_start_dma_transfer(host, req); 1441a45c6cb8SMadhusudhan Chikkature if (ret != 0) { 1442a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "MMC start dma failure\n"); 1443a45c6cb8SMadhusudhan Chikkature return ret; 1444a45c6cb8SMadhusudhan Chikkature } 1445a45c6cb8SMadhusudhan Chikkature } 1446a45c6cb8SMadhusudhan Chikkature return 0; 1447a45c6cb8SMadhusudhan Chikkature } 1448a45c6cb8SMadhusudhan Chikkature 1449a45c6cb8SMadhusudhan Chikkature /* 1450a45c6cb8SMadhusudhan Chikkature * Request function. for read/write operation 1451a45c6cb8SMadhusudhan Chikkature */ 145270a3341aSDenis Karpov static void omap_hsmmc_request(struct mmc_host *mmc, struct mmc_request *req) 1453a45c6cb8SMadhusudhan Chikkature { 145470a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1455a3f406f8SJarkko Lavinen int err; 1456a45c6cb8SMadhusudhan Chikkature 1457b417577dSAdrian Hunter BUG_ON(host->req_in_progress); 1458b417577dSAdrian Hunter BUG_ON(host->dma_ch != -1); 1459b62f6228SAdrian Hunter if (host->protect_card) { 1460b62f6228SAdrian Hunter if (host->reqs_blocked < 3) { 1461b62f6228SAdrian Hunter /* 1462b62f6228SAdrian Hunter * Ensure the controller is left in a consistent 1463b62f6228SAdrian Hunter * state by resetting the command and data state 1464b62f6228SAdrian Hunter * machines. 1465b62f6228SAdrian Hunter */ 1466b62f6228SAdrian Hunter omap_hsmmc_reset_controller_fsm(host, SRD); 1467b62f6228SAdrian Hunter omap_hsmmc_reset_controller_fsm(host, SRC); 1468b62f6228SAdrian Hunter host->reqs_blocked += 1; 1469b62f6228SAdrian Hunter } 1470b62f6228SAdrian Hunter req->cmd->error = -EBADF; 1471b62f6228SAdrian Hunter if (req->data) 1472b62f6228SAdrian Hunter req->data->error = -EBADF; 1473b417577dSAdrian Hunter req->cmd->retries = 0; 1474b62f6228SAdrian Hunter mmc_request_done(mmc, req); 1475b62f6228SAdrian Hunter return; 1476b62f6228SAdrian Hunter } else if (host->reqs_blocked) 1477b62f6228SAdrian Hunter host->reqs_blocked = 0; 1478a45c6cb8SMadhusudhan Chikkature WARN_ON(host->mrq != NULL); 1479a45c6cb8SMadhusudhan Chikkature host->mrq = req; 148070a3341aSDenis Karpov err = omap_hsmmc_prepare_data(host, req); 1481a3f406f8SJarkko Lavinen if (err) { 1482a3f406f8SJarkko Lavinen req->cmd->error = err; 1483a3f406f8SJarkko Lavinen if (req->data) 1484a3f406f8SJarkko Lavinen req->data->error = err; 1485a3f406f8SJarkko Lavinen host->mrq = NULL; 1486a3f406f8SJarkko Lavinen mmc_request_done(mmc, req); 1487a3f406f8SJarkko Lavinen return; 1488a3f406f8SJarkko Lavinen } 1489a3f406f8SJarkko Lavinen 149070a3341aSDenis Karpov omap_hsmmc_start_command(host, req->cmd, req->data); 1491a45c6cb8SMadhusudhan Chikkature } 1492a45c6cb8SMadhusudhan Chikkature 1493a45c6cb8SMadhusudhan Chikkature /* Routine to configure clock values. Exposed API to core */ 149470a3341aSDenis Karpov static void omap_hsmmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 1495a45c6cb8SMadhusudhan Chikkature { 149670a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1497a45c6cb8SMadhusudhan Chikkature u16 dsor = 0; 1498a45c6cb8SMadhusudhan Chikkature unsigned long regval; 1499a45c6cb8SMadhusudhan Chikkature unsigned long timeout; 150073153010SJarkko Lavinen u32 con; 1501a3621465SAdrian Hunter int do_send_init_stream = 0; 1502a45c6cb8SMadhusudhan Chikkature 15035e2ea617SAdrian Hunter mmc_host_enable(host->mmc); 15045e2ea617SAdrian Hunter 1505a3621465SAdrian Hunter if (ios->power_mode != host->power_mode) { 1506a45c6cb8SMadhusudhan Chikkature switch (ios->power_mode) { 1507a45c6cb8SMadhusudhan Chikkature case MMC_POWER_OFF: 1508a3621465SAdrian Hunter mmc_slot(host).set_power(host->dev, host->slot_id, 1509a3621465SAdrian Hunter 0, 0); 1510623821f7SAdrian Hunter host->vdd = 0; 1511a45c6cb8SMadhusudhan Chikkature break; 1512a45c6cb8SMadhusudhan Chikkature case MMC_POWER_UP: 1513a3621465SAdrian Hunter mmc_slot(host).set_power(host->dev, host->slot_id, 1514a3621465SAdrian Hunter 1, ios->vdd); 1515623821f7SAdrian Hunter host->vdd = ios->vdd; 1516a45c6cb8SMadhusudhan Chikkature break; 1517a3621465SAdrian Hunter case MMC_POWER_ON: 1518a3621465SAdrian Hunter do_send_init_stream = 1; 1519a3621465SAdrian Hunter break; 1520a3621465SAdrian Hunter } 1521a3621465SAdrian Hunter host->power_mode = ios->power_mode; 1522a45c6cb8SMadhusudhan Chikkature } 1523a45c6cb8SMadhusudhan Chikkature 1524dd498effSDenis Karpov /* FIXME: set registers based only on changes to ios */ 1525dd498effSDenis Karpov 152673153010SJarkko Lavinen con = OMAP_HSMMC_READ(host->base, CON); 1527a45c6cb8SMadhusudhan Chikkature switch (mmc->ios.bus_width) { 152873153010SJarkko Lavinen case MMC_BUS_WIDTH_8: 152973153010SJarkko Lavinen OMAP_HSMMC_WRITE(host->base, CON, con | DW8); 153073153010SJarkko Lavinen break; 1531a45c6cb8SMadhusudhan Chikkature case MMC_BUS_WIDTH_4: 153273153010SJarkko Lavinen OMAP_HSMMC_WRITE(host->base, CON, con & ~DW8); 1533a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 1534a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) | FOUR_BIT); 1535a45c6cb8SMadhusudhan Chikkature break; 1536a45c6cb8SMadhusudhan Chikkature case MMC_BUS_WIDTH_1: 153773153010SJarkko Lavinen OMAP_HSMMC_WRITE(host->base, CON, con & ~DW8); 1538a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 1539a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, HCTL) & ~FOUR_BIT); 1540a45c6cb8SMadhusudhan Chikkature break; 1541a45c6cb8SMadhusudhan Chikkature } 1542a45c6cb8SMadhusudhan Chikkature 1543a45c6cb8SMadhusudhan Chikkature if (host->id == OMAP_MMC1_DEVID) { 1544eb250826SDavid Brownell /* Only MMC1 can interface at 3V without some flavor 1545eb250826SDavid Brownell * of external transceiver; but they all handle 1.8V. 1546eb250826SDavid Brownell */ 1547a45c6cb8SMadhusudhan Chikkature if ((OMAP_HSMMC_READ(host->base, HCTL) & SDVSDET) && 1548a45c6cb8SMadhusudhan Chikkature (ios->vdd == DUAL_VOLT_OCR_BIT)) { 1549a45c6cb8SMadhusudhan Chikkature /* 1550a45c6cb8SMadhusudhan Chikkature * The mmc_select_voltage fn of the core does 1551a45c6cb8SMadhusudhan Chikkature * not seem to set the power_mode to 1552a45c6cb8SMadhusudhan Chikkature * MMC_POWER_UP upon recalculating the voltage. 1553a45c6cb8SMadhusudhan Chikkature * vdd 1.8v. 1554a45c6cb8SMadhusudhan Chikkature */ 155570a3341aSDenis Karpov if (omap_hsmmc_switch_opcond(host, ios->vdd) != 0) 1556a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 1557a45c6cb8SMadhusudhan Chikkature "Switch operation failed\n"); 1558a45c6cb8SMadhusudhan Chikkature } 1559a45c6cb8SMadhusudhan Chikkature } 1560a45c6cb8SMadhusudhan Chikkature 1561a45c6cb8SMadhusudhan Chikkature if (ios->clock) { 1562a45c6cb8SMadhusudhan Chikkature dsor = OMAP_MMC_MASTER_CLOCK / ios->clock; 1563a45c6cb8SMadhusudhan Chikkature if (dsor < 1) 1564a45c6cb8SMadhusudhan Chikkature dsor = 1; 1565a45c6cb8SMadhusudhan Chikkature 1566a45c6cb8SMadhusudhan Chikkature if (OMAP_MMC_MASTER_CLOCK / dsor > ios->clock) 1567a45c6cb8SMadhusudhan Chikkature dsor++; 1568a45c6cb8SMadhusudhan Chikkature 1569a45c6cb8SMadhusudhan Chikkature if (dsor > 250) 1570a45c6cb8SMadhusudhan Chikkature dsor = 250; 1571a45c6cb8SMadhusudhan Chikkature } 157270a3341aSDenis Karpov omap_hsmmc_stop_clock(host); 1573a45c6cb8SMadhusudhan Chikkature regval = OMAP_HSMMC_READ(host->base, SYSCTL); 1574a45c6cb8SMadhusudhan Chikkature regval = regval & ~(CLKD_MASK); 1575a45c6cb8SMadhusudhan Chikkature regval = regval | (dsor << 6) | (DTO << 16); 1576a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, regval); 1577a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, 1578a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, SYSCTL) | ICE); 1579a45c6cb8SMadhusudhan Chikkature 1580a45c6cb8SMadhusudhan Chikkature /* Wait till the ICS bit is set */ 1581a45c6cb8SMadhusudhan Chikkature timeout = jiffies + msecs_to_jiffies(MMC_TIMEOUT_MS); 158211dd62a7SDenis Karpov while ((OMAP_HSMMC_READ(host->base, SYSCTL) & ICS) != ICS 1583a45c6cb8SMadhusudhan Chikkature && time_before(jiffies, timeout)) 1584a45c6cb8SMadhusudhan Chikkature msleep(1); 1585a45c6cb8SMadhusudhan Chikkature 1586a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, SYSCTL, 1587a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_READ(host->base, SYSCTL) | CEN); 1588a45c6cb8SMadhusudhan Chikkature 1589a3621465SAdrian Hunter if (do_send_init_stream) 1590a45c6cb8SMadhusudhan Chikkature send_init_stream(host); 1591a45c6cb8SMadhusudhan Chikkature 1592abb28e73SDenis Karpov con = OMAP_HSMMC_READ(host->base, CON); 1593a45c6cb8SMadhusudhan Chikkature if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN) 1594abb28e73SDenis Karpov OMAP_HSMMC_WRITE(host->base, CON, con | OD); 1595abb28e73SDenis Karpov else 1596abb28e73SDenis Karpov OMAP_HSMMC_WRITE(host->base, CON, con & ~OD); 15975e2ea617SAdrian Hunter 1598dd498effSDenis Karpov if (host->power_mode == MMC_POWER_OFF) 1599dd498effSDenis Karpov mmc_host_disable(host->mmc); 1600dd498effSDenis Karpov else 16015e2ea617SAdrian Hunter mmc_host_lazy_disable(host->mmc); 1602a45c6cb8SMadhusudhan Chikkature } 1603a45c6cb8SMadhusudhan Chikkature 1604a45c6cb8SMadhusudhan Chikkature static int omap_hsmmc_get_cd(struct mmc_host *mmc) 1605a45c6cb8SMadhusudhan Chikkature { 160670a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1607a45c6cb8SMadhusudhan Chikkature 1608191d1f1dSDenis Karpov if (!mmc_slot(host).card_detect) 1609a45c6cb8SMadhusudhan Chikkature return -ENOSYS; 1610db0fefc5SAdrian Hunter return mmc_slot(host).card_detect(host->dev, host->slot_id); 1611a45c6cb8SMadhusudhan Chikkature } 1612a45c6cb8SMadhusudhan Chikkature 1613a45c6cb8SMadhusudhan Chikkature static int omap_hsmmc_get_ro(struct mmc_host *mmc) 1614a45c6cb8SMadhusudhan Chikkature { 161570a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1616a45c6cb8SMadhusudhan Chikkature 1617191d1f1dSDenis Karpov if (!mmc_slot(host).get_ro) 1618a45c6cb8SMadhusudhan Chikkature return -ENOSYS; 1619191d1f1dSDenis Karpov return mmc_slot(host).get_ro(host->dev, 0); 1620a45c6cb8SMadhusudhan Chikkature } 1621a45c6cb8SMadhusudhan Chikkature 16224816858cSGrazvydas Ignotas static void omap_hsmmc_init_card(struct mmc_host *mmc, struct mmc_card *card) 16234816858cSGrazvydas Ignotas { 16244816858cSGrazvydas Ignotas struct omap_hsmmc_host *host = mmc_priv(mmc); 16254816858cSGrazvydas Ignotas 16264816858cSGrazvydas Ignotas if (mmc_slot(host).init_card) 16274816858cSGrazvydas Ignotas mmc_slot(host).init_card(card); 16284816858cSGrazvydas Ignotas } 16294816858cSGrazvydas Ignotas 163070a3341aSDenis Karpov static void omap_hsmmc_conf_bus_power(struct omap_hsmmc_host *host) 16311b331e69SKim Kyuwon { 16321b331e69SKim Kyuwon u32 hctl, capa, value; 16331b331e69SKim Kyuwon 16341b331e69SKim Kyuwon /* Only MMC1 supports 3.0V */ 16351b331e69SKim Kyuwon if (host->id == OMAP_MMC1_DEVID) { 16361b331e69SKim Kyuwon hctl = SDVS30; 16371b331e69SKim Kyuwon capa = VS30 | VS18; 16381b331e69SKim Kyuwon } else { 16391b331e69SKim Kyuwon hctl = SDVS18; 16401b331e69SKim Kyuwon capa = VS18; 16411b331e69SKim Kyuwon } 16421b331e69SKim Kyuwon 16431b331e69SKim Kyuwon value = OMAP_HSMMC_READ(host->base, HCTL) & ~SDVS_MASK; 16441b331e69SKim Kyuwon OMAP_HSMMC_WRITE(host->base, HCTL, value | hctl); 16451b331e69SKim Kyuwon 16461b331e69SKim Kyuwon value = OMAP_HSMMC_READ(host->base, CAPA); 16471b331e69SKim Kyuwon OMAP_HSMMC_WRITE(host->base, CAPA, value | capa); 16481b331e69SKim Kyuwon 16491b331e69SKim Kyuwon /* Set the controller to AUTO IDLE mode */ 16501b331e69SKim Kyuwon value = OMAP_HSMMC_READ(host->base, SYSCONFIG); 16511b331e69SKim Kyuwon OMAP_HSMMC_WRITE(host->base, SYSCONFIG, value | AUTOIDLE); 16521b331e69SKim Kyuwon 16531b331e69SKim Kyuwon /* Set SD bus power bit */ 1654e13bb300SAdrian Hunter set_sd_bus_power(host); 16551b331e69SKim Kyuwon } 16561b331e69SKim Kyuwon 1657dd498effSDenis Karpov /* 1658dd498effSDenis Karpov * Dynamic power saving handling, FSM: 165913189e78SJarkko Lavinen * ENABLED -> DISABLED -> CARDSLEEP / REGSLEEP -> OFF 166013189e78SJarkko Lavinen * ^___________| | | 166113189e78SJarkko Lavinen * |______________________|______________________| 1662dd498effSDenis Karpov * 1663dd498effSDenis Karpov * ENABLED: mmc host is fully functional 1664dd498effSDenis Karpov * DISABLED: fclk is off 166513189e78SJarkko Lavinen * CARDSLEEP: fclk is off, card is asleep, voltage regulator is asleep 1666623821f7SAdrian Hunter * REGSLEEP: fclk is off, voltage regulator is asleep 166713189e78SJarkko Lavinen * OFF: fclk is off, voltage regulator is off 1668dd498effSDenis Karpov * 1669dd498effSDenis Karpov * Transition handlers return the timeout for the next state transition 1670dd498effSDenis Karpov * or negative error. 1671dd498effSDenis Karpov */ 1672dd498effSDenis Karpov 167313189e78SJarkko Lavinen enum {ENABLED = 0, DISABLED, CARDSLEEP, REGSLEEP, OFF}; 1674dd498effSDenis Karpov 1675dd498effSDenis Karpov /* Handler for [ENABLED -> DISABLED] transition */ 167670a3341aSDenis Karpov static int omap_hsmmc_enabled_to_disabled(struct omap_hsmmc_host *host) 1677dd498effSDenis Karpov { 167870a3341aSDenis Karpov omap_hsmmc_context_save(host); 1679dd498effSDenis Karpov clk_disable(host->fclk); 1680dd498effSDenis Karpov host->dpm_state = DISABLED; 1681dd498effSDenis Karpov 1682dd498effSDenis Karpov dev_dbg(mmc_dev(host->mmc), "ENABLED -> DISABLED\n"); 1683dd498effSDenis Karpov 1684dd498effSDenis Karpov if (host->power_mode == MMC_POWER_OFF) 1685dd498effSDenis Karpov return 0; 1686dd498effSDenis Karpov 16874380eea2SAdrian Hunter return OMAP_MMC_SLEEP_TIMEOUT; 1688dd498effSDenis Karpov } 1689dd498effSDenis Karpov 169013189e78SJarkko Lavinen /* Handler for [DISABLED -> REGSLEEP / CARDSLEEP] transition */ 169170a3341aSDenis Karpov static int omap_hsmmc_disabled_to_sleep(struct omap_hsmmc_host *host) 1692dd498effSDenis Karpov { 169313189e78SJarkko Lavinen int err, new_state; 1694dd498effSDenis Karpov 1695dd498effSDenis Karpov if (!mmc_try_claim_host(host->mmc)) 1696dd498effSDenis Karpov return 0; 1697dd498effSDenis Karpov 1698dd498effSDenis Karpov clk_enable(host->fclk); 169970a3341aSDenis Karpov omap_hsmmc_context_restore(host); 170013189e78SJarkko Lavinen if (mmc_card_can_sleep(host->mmc)) { 170113189e78SJarkko Lavinen err = mmc_card_sleep(host->mmc); 170213189e78SJarkko Lavinen if (err < 0) { 170313189e78SJarkko Lavinen clk_disable(host->fclk); 170413189e78SJarkko Lavinen mmc_release_host(host->mmc); 170513189e78SJarkko Lavinen return err; 170613189e78SJarkko Lavinen } 170713189e78SJarkko Lavinen new_state = CARDSLEEP; 170870a3341aSDenis Karpov } else { 170913189e78SJarkko Lavinen new_state = REGSLEEP; 171070a3341aSDenis Karpov } 171113189e78SJarkko Lavinen if (mmc_slot(host).set_sleep) 171213189e78SJarkko Lavinen mmc_slot(host).set_sleep(host->dev, host->slot_id, 1, 0, 171313189e78SJarkko Lavinen new_state == CARDSLEEP); 171413189e78SJarkko Lavinen /* FIXME: turn off bus power and perhaps interrupts too */ 171513189e78SJarkko Lavinen clk_disable(host->fclk); 171613189e78SJarkko Lavinen host->dpm_state = new_state; 171713189e78SJarkko Lavinen 171813189e78SJarkko Lavinen mmc_release_host(host->mmc); 171913189e78SJarkko Lavinen 172013189e78SJarkko Lavinen dev_dbg(mmc_dev(host->mmc), "DISABLED -> %s\n", 172113189e78SJarkko Lavinen host->dpm_state == CARDSLEEP ? "CARDSLEEP" : "REGSLEEP"); 1722dd498effSDenis Karpov 17231df58db8SAdrian Hunter if (mmc_slot(host).no_off) 17241df58db8SAdrian Hunter return 0; 17251df58db8SAdrian Hunter 1726dd498effSDenis Karpov if ((host->mmc->caps & MMC_CAP_NONREMOVABLE) || 1727dd498effSDenis Karpov mmc_slot(host).card_detect || 1728dd498effSDenis Karpov (mmc_slot(host).get_cover_state && 172913189e78SJarkko Lavinen mmc_slot(host).get_cover_state(host->dev, host->slot_id))) 17304380eea2SAdrian Hunter return OMAP_MMC_OFF_TIMEOUT; 173113189e78SJarkko Lavinen 173213189e78SJarkko Lavinen return 0; 1733623821f7SAdrian Hunter } 1734dd498effSDenis Karpov 173513189e78SJarkko Lavinen /* Handler for [REGSLEEP / CARDSLEEP -> OFF] transition */ 173670a3341aSDenis Karpov static int omap_hsmmc_sleep_to_off(struct omap_hsmmc_host *host) 173713189e78SJarkko Lavinen { 173813189e78SJarkko Lavinen if (!mmc_try_claim_host(host->mmc)) 173913189e78SJarkko Lavinen return 0; 1740dd498effSDenis Karpov 17411df58db8SAdrian Hunter if (mmc_slot(host).no_off) 17421df58db8SAdrian Hunter return 0; 17431df58db8SAdrian Hunter 174413189e78SJarkko Lavinen if (!((host->mmc->caps & MMC_CAP_NONREMOVABLE) || 174513189e78SJarkko Lavinen mmc_slot(host).card_detect || 174613189e78SJarkko Lavinen (mmc_slot(host).get_cover_state && 174713189e78SJarkko Lavinen mmc_slot(host).get_cover_state(host->dev, host->slot_id)))) { 174813189e78SJarkko Lavinen mmc_release_host(host->mmc); 174913189e78SJarkko Lavinen return 0; 175013189e78SJarkko Lavinen } 1751dd498effSDenis Karpov 175213189e78SJarkko Lavinen mmc_slot(host).set_power(host->dev, host->slot_id, 0, 0); 175313189e78SJarkko Lavinen host->vdd = 0; 175413189e78SJarkko Lavinen host->power_mode = MMC_POWER_OFF; 175513189e78SJarkko Lavinen 175613189e78SJarkko Lavinen dev_dbg(mmc_dev(host->mmc), "%s -> OFF\n", 175713189e78SJarkko Lavinen host->dpm_state == CARDSLEEP ? "CARDSLEEP" : "REGSLEEP"); 175813189e78SJarkko Lavinen 175913189e78SJarkko Lavinen host->dpm_state = OFF; 1760dd498effSDenis Karpov 1761dd498effSDenis Karpov mmc_release_host(host->mmc); 1762dd498effSDenis Karpov 1763dd498effSDenis Karpov return 0; 1764dd498effSDenis Karpov } 1765dd498effSDenis Karpov 1766dd498effSDenis Karpov /* Handler for [DISABLED -> ENABLED] transition */ 176770a3341aSDenis Karpov static int omap_hsmmc_disabled_to_enabled(struct omap_hsmmc_host *host) 1768dd498effSDenis Karpov { 1769dd498effSDenis Karpov int err; 1770dd498effSDenis Karpov 1771dd498effSDenis Karpov err = clk_enable(host->fclk); 1772dd498effSDenis Karpov if (err < 0) 1773dd498effSDenis Karpov return err; 1774dd498effSDenis Karpov 177570a3341aSDenis Karpov omap_hsmmc_context_restore(host); 1776dd498effSDenis Karpov host->dpm_state = ENABLED; 1777dd498effSDenis Karpov 1778dd498effSDenis Karpov dev_dbg(mmc_dev(host->mmc), "DISABLED -> ENABLED\n"); 1779dd498effSDenis Karpov 1780dd498effSDenis Karpov return 0; 1781dd498effSDenis Karpov } 1782dd498effSDenis Karpov 178313189e78SJarkko Lavinen /* Handler for [SLEEP -> ENABLED] transition */ 178470a3341aSDenis Karpov static int omap_hsmmc_sleep_to_enabled(struct omap_hsmmc_host *host) 178513189e78SJarkko Lavinen { 178613189e78SJarkko Lavinen if (!mmc_try_claim_host(host->mmc)) 178713189e78SJarkko Lavinen return 0; 178813189e78SJarkko Lavinen 178913189e78SJarkko Lavinen clk_enable(host->fclk); 179070a3341aSDenis Karpov omap_hsmmc_context_restore(host); 179113189e78SJarkko Lavinen if (mmc_slot(host).set_sleep) 179213189e78SJarkko Lavinen mmc_slot(host).set_sleep(host->dev, host->slot_id, 0, 179313189e78SJarkko Lavinen host->vdd, host->dpm_state == CARDSLEEP); 179413189e78SJarkko Lavinen if (mmc_card_can_sleep(host->mmc)) 179513189e78SJarkko Lavinen mmc_card_awake(host->mmc); 179613189e78SJarkko Lavinen 179713189e78SJarkko Lavinen dev_dbg(mmc_dev(host->mmc), "%s -> ENABLED\n", 179813189e78SJarkko Lavinen host->dpm_state == CARDSLEEP ? "CARDSLEEP" : "REGSLEEP"); 179913189e78SJarkko Lavinen 180013189e78SJarkko Lavinen host->dpm_state = ENABLED; 180113189e78SJarkko Lavinen 180213189e78SJarkko Lavinen mmc_release_host(host->mmc); 180313189e78SJarkko Lavinen 180413189e78SJarkko Lavinen return 0; 180513189e78SJarkko Lavinen } 180613189e78SJarkko Lavinen 1807dd498effSDenis Karpov /* Handler for [OFF -> ENABLED] transition */ 180870a3341aSDenis Karpov static int omap_hsmmc_off_to_enabled(struct omap_hsmmc_host *host) 1809dd498effSDenis Karpov { 1810dd498effSDenis Karpov clk_enable(host->fclk); 1811dd498effSDenis Karpov 181270a3341aSDenis Karpov omap_hsmmc_context_restore(host); 181370a3341aSDenis Karpov omap_hsmmc_conf_bus_power(host); 1814dd498effSDenis Karpov mmc_power_restore_host(host->mmc); 1815dd498effSDenis Karpov 1816dd498effSDenis Karpov host->dpm_state = ENABLED; 1817dd498effSDenis Karpov 1818dd498effSDenis Karpov dev_dbg(mmc_dev(host->mmc), "OFF -> ENABLED\n"); 1819dd498effSDenis Karpov 1820dd498effSDenis Karpov return 0; 1821dd498effSDenis Karpov } 1822dd498effSDenis Karpov 1823dd498effSDenis Karpov /* 1824dd498effSDenis Karpov * Bring MMC host to ENABLED from any other PM state. 1825dd498effSDenis Karpov */ 182670a3341aSDenis Karpov static int omap_hsmmc_enable(struct mmc_host *mmc) 1827dd498effSDenis Karpov { 182870a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1829dd498effSDenis Karpov 1830dd498effSDenis Karpov switch (host->dpm_state) { 1831dd498effSDenis Karpov case DISABLED: 183270a3341aSDenis Karpov return omap_hsmmc_disabled_to_enabled(host); 183313189e78SJarkko Lavinen case CARDSLEEP: 1834623821f7SAdrian Hunter case REGSLEEP: 183570a3341aSDenis Karpov return omap_hsmmc_sleep_to_enabled(host); 1836dd498effSDenis Karpov case OFF: 183770a3341aSDenis Karpov return omap_hsmmc_off_to_enabled(host); 1838dd498effSDenis Karpov default: 1839dd498effSDenis Karpov dev_dbg(mmc_dev(host->mmc), "UNKNOWN state\n"); 1840dd498effSDenis Karpov return -EINVAL; 1841dd498effSDenis Karpov } 1842dd498effSDenis Karpov } 1843dd498effSDenis Karpov 1844dd498effSDenis Karpov /* 1845dd498effSDenis Karpov * Bring MMC host in PM state (one level deeper). 1846dd498effSDenis Karpov */ 184770a3341aSDenis Karpov static int omap_hsmmc_disable(struct mmc_host *mmc, int lazy) 1848dd498effSDenis Karpov { 184970a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1850dd498effSDenis Karpov 1851dd498effSDenis Karpov switch (host->dpm_state) { 1852dd498effSDenis Karpov case ENABLED: { 1853dd498effSDenis Karpov int delay; 1854dd498effSDenis Karpov 185570a3341aSDenis Karpov delay = omap_hsmmc_enabled_to_disabled(host); 1856dd498effSDenis Karpov if (lazy || delay < 0) 1857dd498effSDenis Karpov return delay; 1858dd498effSDenis Karpov return 0; 1859dd498effSDenis Karpov } 1860dd498effSDenis Karpov case DISABLED: 186170a3341aSDenis Karpov return omap_hsmmc_disabled_to_sleep(host); 186213189e78SJarkko Lavinen case CARDSLEEP: 186313189e78SJarkko Lavinen case REGSLEEP: 186470a3341aSDenis Karpov return omap_hsmmc_sleep_to_off(host); 1865dd498effSDenis Karpov default: 1866dd498effSDenis Karpov dev_dbg(mmc_dev(host->mmc), "UNKNOWN state\n"); 1867dd498effSDenis Karpov return -EINVAL; 1868dd498effSDenis Karpov } 1869dd498effSDenis Karpov } 1870dd498effSDenis Karpov 187170a3341aSDenis Karpov static int omap_hsmmc_enable_fclk(struct mmc_host *mmc) 1872dd498effSDenis Karpov { 187370a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1874dd498effSDenis Karpov int err; 1875dd498effSDenis Karpov 1876dd498effSDenis Karpov err = clk_enable(host->fclk); 1877dd498effSDenis Karpov if (err) 1878dd498effSDenis Karpov return err; 1879dd498effSDenis Karpov dev_dbg(mmc_dev(host->mmc), "mmc_fclk: enabled\n"); 188070a3341aSDenis Karpov omap_hsmmc_context_restore(host); 1881dd498effSDenis Karpov return 0; 1882dd498effSDenis Karpov } 1883dd498effSDenis Karpov 188470a3341aSDenis Karpov static int omap_hsmmc_disable_fclk(struct mmc_host *mmc, int lazy) 1885dd498effSDenis Karpov { 188670a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 1887dd498effSDenis Karpov 188870a3341aSDenis Karpov omap_hsmmc_context_save(host); 1889dd498effSDenis Karpov clk_disable(host->fclk); 1890dd498effSDenis Karpov dev_dbg(mmc_dev(host->mmc), "mmc_fclk: disabled\n"); 1891dd498effSDenis Karpov return 0; 1892dd498effSDenis Karpov } 1893dd498effSDenis Karpov 189470a3341aSDenis Karpov static const struct mmc_host_ops omap_hsmmc_ops = { 189570a3341aSDenis Karpov .enable = omap_hsmmc_enable_fclk, 189670a3341aSDenis Karpov .disable = omap_hsmmc_disable_fclk, 189770a3341aSDenis Karpov .request = omap_hsmmc_request, 189870a3341aSDenis Karpov .set_ios = omap_hsmmc_set_ios, 1899dd498effSDenis Karpov .get_cd = omap_hsmmc_get_cd, 1900dd498effSDenis Karpov .get_ro = omap_hsmmc_get_ro, 19014816858cSGrazvydas Ignotas .init_card = omap_hsmmc_init_card, 1902dd498effSDenis Karpov /* NYET -- enable_sdio_irq */ 1903dd498effSDenis Karpov }; 1904dd498effSDenis Karpov 190570a3341aSDenis Karpov static const struct mmc_host_ops omap_hsmmc_ps_ops = { 190670a3341aSDenis Karpov .enable = omap_hsmmc_enable, 190770a3341aSDenis Karpov .disable = omap_hsmmc_disable, 190870a3341aSDenis Karpov .request = omap_hsmmc_request, 190970a3341aSDenis Karpov .set_ios = omap_hsmmc_set_ios, 1910a45c6cb8SMadhusudhan Chikkature .get_cd = omap_hsmmc_get_cd, 1911a45c6cb8SMadhusudhan Chikkature .get_ro = omap_hsmmc_get_ro, 19124816858cSGrazvydas Ignotas .init_card = omap_hsmmc_init_card, 1913a45c6cb8SMadhusudhan Chikkature /* NYET -- enable_sdio_irq */ 1914a45c6cb8SMadhusudhan Chikkature }; 1915a45c6cb8SMadhusudhan Chikkature 1916d900f712SDenis Karpov #ifdef CONFIG_DEBUG_FS 1917d900f712SDenis Karpov 191870a3341aSDenis Karpov static int omap_hsmmc_regs_show(struct seq_file *s, void *data) 1919d900f712SDenis Karpov { 1920d900f712SDenis Karpov struct mmc_host *mmc = s->private; 192170a3341aSDenis Karpov struct omap_hsmmc_host *host = mmc_priv(mmc); 192211dd62a7SDenis Karpov int context_loss = 0; 192311dd62a7SDenis Karpov 192470a3341aSDenis Karpov if (host->pdata->get_context_loss_count) 192570a3341aSDenis Karpov context_loss = host->pdata->get_context_loss_count(host->dev); 1926d900f712SDenis Karpov 19275e2ea617SAdrian Hunter seq_printf(s, "mmc%d:\n" 19285e2ea617SAdrian Hunter " enabled:\t%d\n" 1929dd498effSDenis Karpov " dpm_state:\t%d\n" 19305e2ea617SAdrian Hunter " nesting_cnt:\t%d\n" 193111dd62a7SDenis Karpov " ctx_loss:\t%d:%d\n" 19325e2ea617SAdrian Hunter "\nregs:\n", 1933dd498effSDenis Karpov mmc->index, mmc->enabled ? 1 : 0, 1934dd498effSDenis Karpov host->dpm_state, mmc->nesting_cnt, 193511dd62a7SDenis Karpov host->context_loss, context_loss); 19365e2ea617SAdrian Hunter 193713189e78SJarkko Lavinen if (host->suspended || host->dpm_state == OFF) { 1938dd498effSDenis Karpov seq_printf(s, "host suspended, can't read registers\n"); 1939dd498effSDenis Karpov return 0; 1940dd498effSDenis Karpov } 1941dd498effSDenis Karpov 19425e2ea617SAdrian Hunter if (clk_enable(host->fclk) != 0) { 19435e2ea617SAdrian Hunter seq_printf(s, "can't read the regs\n"); 1944dd498effSDenis Karpov return 0; 19455e2ea617SAdrian Hunter } 1946d900f712SDenis Karpov 1947d900f712SDenis Karpov seq_printf(s, "SYSCONFIG:\t0x%08x\n", 1948d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCONFIG)); 1949d900f712SDenis Karpov seq_printf(s, "CON:\t\t0x%08x\n", 1950d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, CON)); 1951d900f712SDenis Karpov seq_printf(s, "HCTL:\t\t0x%08x\n", 1952d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, HCTL)); 1953d900f712SDenis Karpov seq_printf(s, "SYSCTL:\t\t0x%08x\n", 1954d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, SYSCTL)); 1955d900f712SDenis Karpov seq_printf(s, "IE:\t\t0x%08x\n", 1956d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, IE)); 1957d900f712SDenis Karpov seq_printf(s, "ISE:\t\t0x%08x\n", 1958d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, ISE)); 1959d900f712SDenis Karpov seq_printf(s, "CAPA:\t\t0x%08x\n", 1960d900f712SDenis Karpov OMAP_HSMMC_READ(host->base, CAPA)); 19615e2ea617SAdrian Hunter 19625e2ea617SAdrian Hunter clk_disable(host->fclk); 1963dd498effSDenis Karpov 1964d900f712SDenis Karpov return 0; 1965d900f712SDenis Karpov } 1966d900f712SDenis Karpov 196770a3341aSDenis Karpov static int omap_hsmmc_regs_open(struct inode *inode, struct file *file) 1968d900f712SDenis Karpov { 196970a3341aSDenis Karpov return single_open(file, omap_hsmmc_regs_show, inode->i_private); 1970d900f712SDenis Karpov } 1971d900f712SDenis Karpov 1972d900f712SDenis Karpov static const struct file_operations mmc_regs_fops = { 197370a3341aSDenis Karpov .open = omap_hsmmc_regs_open, 1974d900f712SDenis Karpov .read = seq_read, 1975d900f712SDenis Karpov .llseek = seq_lseek, 1976d900f712SDenis Karpov .release = single_release, 1977d900f712SDenis Karpov }; 1978d900f712SDenis Karpov 197970a3341aSDenis Karpov static void omap_hsmmc_debugfs(struct mmc_host *mmc) 1980d900f712SDenis Karpov { 1981d900f712SDenis Karpov if (mmc->debugfs_root) 1982d900f712SDenis Karpov debugfs_create_file("regs", S_IRUSR, mmc->debugfs_root, 1983d900f712SDenis Karpov mmc, &mmc_regs_fops); 1984d900f712SDenis Karpov } 1985d900f712SDenis Karpov 1986d900f712SDenis Karpov #else 1987d900f712SDenis Karpov 198870a3341aSDenis Karpov static void omap_hsmmc_debugfs(struct mmc_host *mmc) 1989d900f712SDenis Karpov { 1990d900f712SDenis Karpov } 1991d900f712SDenis Karpov 1992d900f712SDenis Karpov #endif 1993d900f712SDenis Karpov 199470a3341aSDenis Karpov static int __init omap_hsmmc_probe(struct platform_device *pdev) 1995a45c6cb8SMadhusudhan Chikkature { 1996a45c6cb8SMadhusudhan Chikkature struct omap_mmc_platform_data *pdata = pdev->dev.platform_data; 1997a45c6cb8SMadhusudhan Chikkature struct mmc_host *mmc; 199870a3341aSDenis Karpov struct omap_hsmmc_host *host = NULL; 1999a45c6cb8SMadhusudhan Chikkature struct resource *res; 2000db0fefc5SAdrian Hunter int ret, irq; 2001a45c6cb8SMadhusudhan Chikkature 2002a45c6cb8SMadhusudhan Chikkature if (pdata == NULL) { 2003a45c6cb8SMadhusudhan Chikkature dev_err(&pdev->dev, "Platform Data is missing\n"); 2004a45c6cb8SMadhusudhan Chikkature return -ENXIO; 2005a45c6cb8SMadhusudhan Chikkature } 2006a45c6cb8SMadhusudhan Chikkature 2007a45c6cb8SMadhusudhan Chikkature if (pdata->nr_slots == 0) { 2008a45c6cb8SMadhusudhan Chikkature dev_err(&pdev->dev, "No Slots\n"); 2009a45c6cb8SMadhusudhan Chikkature return -ENXIO; 2010a45c6cb8SMadhusudhan Chikkature } 2011a45c6cb8SMadhusudhan Chikkature 2012a45c6cb8SMadhusudhan Chikkature res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2013a45c6cb8SMadhusudhan Chikkature irq = platform_get_irq(pdev, 0); 2014a45c6cb8SMadhusudhan Chikkature if (res == NULL || irq < 0) 2015a45c6cb8SMadhusudhan Chikkature return -ENXIO; 2016a45c6cb8SMadhusudhan Chikkature 2017a45c6cb8SMadhusudhan Chikkature res = request_mem_region(res->start, res->end - res->start + 1, 2018a45c6cb8SMadhusudhan Chikkature pdev->name); 2019a45c6cb8SMadhusudhan Chikkature if (res == NULL) 2020a45c6cb8SMadhusudhan Chikkature return -EBUSY; 2021a45c6cb8SMadhusudhan Chikkature 2022db0fefc5SAdrian Hunter ret = omap_hsmmc_gpio_init(pdata); 2023db0fefc5SAdrian Hunter if (ret) 2024db0fefc5SAdrian Hunter goto err; 2025db0fefc5SAdrian Hunter 202670a3341aSDenis Karpov mmc = mmc_alloc_host(sizeof(struct omap_hsmmc_host), &pdev->dev); 2027a45c6cb8SMadhusudhan Chikkature if (!mmc) { 2028a45c6cb8SMadhusudhan Chikkature ret = -ENOMEM; 2029db0fefc5SAdrian Hunter goto err_alloc; 2030a45c6cb8SMadhusudhan Chikkature } 2031a45c6cb8SMadhusudhan Chikkature 2032a45c6cb8SMadhusudhan Chikkature host = mmc_priv(mmc); 2033a45c6cb8SMadhusudhan Chikkature host->mmc = mmc; 2034a45c6cb8SMadhusudhan Chikkature host->pdata = pdata; 2035a45c6cb8SMadhusudhan Chikkature host->dev = &pdev->dev; 2036a45c6cb8SMadhusudhan Chikkature host->use_dma = 1; 2037a45c6cb8SMadhusudhan Chikkature host->dev->dma_mask = &pdata->dma_mask; 2038a45c6cb8SMadhusudhan Chikkature host->dma_ch = -1; 2039a45c6cb8SMadhusudhan Chikkature host->irq = irq; 2040a45c6cb8SMadhusudhan Chikkature host->id = pdev->id; 2041a45c6cb8SMadhusudhan Chikkature host->slot_id = 0; 2042a45c6cb8SMadhusudhan Chikkature host->mapbase = res->start; 2043a45c6cb8SMadhusudhan Chikkature host->base = ioremap(host->mapbase, SZ_4K); 20446da20c89SAdrian Hunter host->power_mode = MMC_POWER_OFF; 2045a45c6cb8SMadhusudhan Chikkature 2046a45c6cb8SMadhusudhan Chikkature platform_set_drvdata(pdev, host); 204770a3341aSDenis Karpov INIT_WORK(&host->mmc_carddetect_work, omap_hsmmc_detect); 2048a45c6cb8SMadhusudhan Chikkature 2049191d1f1dSDenis Karpov if (mmc_slot(host).power_saving) 205070a3341aSDenis Karpov mmc->ops = &omap_hsmmc_ps_ops; 2051dd498effSDenis Karpov else 205270a3341aSDenis Karpov mmc->ops = &omap_hsmmc_ops; 2053dd498effSDenis Karpov 2054e0eb2424SAdrian Hunter /* 2055e0eb2424SAdrian Hunter * If regulator_disable can only put vcc_aux to sleep then there is 2056e0eb2424SAdrian Hunter * no off state. 2057e0eb2424SAdrian Hunter */ 2058e0eb2424SAdrian Hunter if (mmc_slot(host).vcc_aux_disable_is_sleep) 2059e0eb2424SAdrian Hunter mmc_slot(host).no_off = 1; 2060e0eb2424SAdrian Hunter 2061a45c6cb8SMadhusudhan Chikkature mmc->f_min = 400000; 2062a45c6cb8SMadhusudhan Chikkature mmc->f_max = 52000000; 2063a45c6cb8SMadhusudhan Chikkature 20644dffd7a2SAdrian Hunter spin_lock_init(&host->irq_lock); 2065a45c6cb8SMadhusudhan Chikkature 20666f7607ccSRussell King host->iclk = clk_get(&pdev->dev, "ick"); 2067a45c6cb8SMadhusudhan Chikkature if (IS_ERR(host->iclk)) { 2068a45c6cb8SMadhusudhan Chikkature ret = PTR_ERR(host->iclk); 2069a45c6cb8SMadhusudhan Chikkature host->iclk = NULL; 2070a45c6cb8SMadhusudhan Chikkature goto err1; 2071a45c6cb8SMadhusudhan Chikkature } 20726f7607ccSRussell King host->fclk = clk_get(&pdev->dev, "fck"); 2073a45c6cb8SMadhusudhan Chikkature if (IS_ERR(host->fclk)) { 2074a45c6cb8SMadhusudhan Chikkature ret = PTR_ERR(host->fclk); 2075a45c6cb8SMadhusudhan Chikkature host->fclk = NULL; 2076a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 2077a45c6cb8SMadhusudhan Chikkature goto err1; 2078a45c6cb8SMadhusudhan Chikkature } 2079a45c6cb8SMadhusudhan Chikkature 208070a3341aSDenis Karpov omap_hsmmc_context_save(host); 208111dd62a7SDenis Karpov 20825e2ea617SAdrian Hunter mmc->caps |= MMC_CAP_DISABLE; 2083dd498effSDenis Karpov mmc_set_disable_delay(mmc, OMAP_MMC_DISABLED_TIMEOUT); 2084dd498effSDenis Karpov /* we start off in DISABLED state */ 2085dd498effSDenis Karpov host->dpm_state = DISABLED; 2086dd498effSDenis Karpov 20875e2ea617SAdrian Hunter if (mmc_host_enable(host->mmc) != 0) { 2088a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 2089a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 2090a45c6cb8SMadhusudhan Chikkature goto err1; 2091a45c6cb8SMadhusudhan Chikkature } 2092a45c6cb8SMadhusudhan Chikkature 2093a45c6cb8SMadhusudhan Chikkature if (clk_enable(host->iclk) != 0) { 20945e2ea617SAdrian Hunter mmc_host_disable(host->mmc); 2095a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 2096a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 2097a45c6cb8SMadhusudhan Chikkature goto err1; 2098a45c6cb8SMadhusudhan Chikkature } 2099a45c6cb8SMadhusudhan Chikkature 21002bec0893SAdrian Hunter if (cpu_is_omap2430()) { 2101a45c6cb8SMadhusudhan Chikkature host->dbclk = clk_get(&pdev->dev, "mmchsdb_fck"); 2102a45c6cb8SMadhusudhan Chikkature /* 2103a45c6cb8SMadhusudhan Chikkature * MMC can still work without debounce clock. 2104a45c6cb8SMadhusudhan Chikkature */ 2105a45c6cb8SMadhusudhan Chikkature if (IS_ERR(host->dbclk)) 21062bec0893SAdrian Hunter dev_warn(mmc_dev(host->mmc), 21072bec0893SAdrian Hunter "Failed to get debounce clock\n"); 2108a45c6cb8SMadhusudhan Chikkature else 21092bec0893SAdrian Hunter host->got_dbclk = 1; 21102bec0893SAdrian Hunter 21112bec0893SAdrian Hunter if (host->got_dbclk) 2112a45c6cb8SMadhusudhan Chikkature if (clk_enable(host->dbclk) != 0) 2113a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Enabling debounce" 2114a45c6cb8SMadhusudhan Chikkature " clk failed\n"); 21152bec0893SAdrian Hunter } 2116a45c6cb8SMadhusudhan Chikkature 21170ccd76d4SJuha Yrjola /* Since we do only SG emulation, we can have as many segs 21180ccd76d4SJuha Yrjola * as we want. */ 21190ccd76d4SJuha Yrjola mmc->max_phys_segs = 1024; 21200ccd76d4SJuha Yrjola mmc->max_hw_segs = 1024; 21210ccd76d4SJuha Yrjola 2122a45c6cb8SMadhusudhan Chikkature mmc->max_blk_size = 512; /* Block Length at max can be 1024 */ 2123a45c6cb8SMadhusudhan Chikkature mmc->max_blk_count = 0xFFFF; /* No. of Blocks is 16 bits */ 2124a45c6cb8SMadhusudhan Chikkature mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; 2125a45c6cb8SMadhusudhan Chikkature mmc->max_seg_size = mmc->max_req_size; 2126a45c6cb8SMadhusudhan Chikkature 212713189e78SJarkko Lavinen mmc->caps |= MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED | 212893caf8e6SAdrian Hunter MMC_CAP_WAIT_WHILE_BUSY | MMC_CAP_ERASE; 2129a45c6cb8SMadhusudhan Chikkature 21303a63833eSSukumar Ghorai mmc->caps |= mmc_slot(host).caps; 21313a63833eSSukumar Ghorai if (mmc->caps & MMC_CAP_8_BIT_DATA) 2132a45c6cb8SMadhusudhan Chikkature mmc->caps |= MMC_CAP_4_BIT_DATA; 2133a45c6cb8SMadhusudhan Chikkature 2134191d1f1dSDenis Karpov if (mmc_slot(host).nonremovable) 213523d99bb9SAdrian Hunter mmc->caps |= MMC_CAP_NONREMOVABLE; 213623d99bb9SAdrian Hunter 213770a3341aSDenis Karpov omap_hsmmc_conf_bus_power(host); 2138a45c6cb8SMadhusudhan Chikkature 2139f3e2f1ddSGrazvydas Ignotas /* Select DMA lines */ 2140f3e2f1ddSGrazvydas Ignotas switch (host->id) { 2141f3e2f1ddSGrazvydas Ignotas case OMAP_MMC1_DEVID: 2142f3e2f1ddSGrazvydas Ignotas host->dma_line_tx = OMAP24XX_DMA_MMC1_TX; 2143f3e2f1ddSGrazvydas Ignotas host->dma_line_rx = OMAP24XX_DMA_MMC1_RX; 2144f3e2f1ddSGrazvydas Ignotas break; 2145f3e2f1ddSGrazvydas Ignotas case OMAP_MMC2_DEVID: 2146f3e2f1ddSGrazvydas Ignotas host->dma_line_tx = OMAP24XX_DMA_MMC2_TX; 2147f3e2f1ddSGrazvydas Ignotas host->dma_line_rx = OMAP24XX_DMA_MMC2_RX; 2148f3e2f1ddSGrazvydas Ignotas break; 2149f3e2f1ddSGrazvydas Ignotas case OMAP_MMC3_DEVID: 2150f3e2f1ddSGrazvydas Ignotas host->dma_line_tx = OMAP34XX_DMA_MMC3_TX; 2151f3e2f1ddSGrazvydas Ignotas host->dma_line_rx = OMAP34XX_DMA_MMC3_RX; 2152f3e2f1ddSGrazvydas Ignotas break; 215382cf818dSkishore kadiyala case OMAP_MMC4_DEVID: 215482cf818dSkishore kadiyala host->dma_line_tx = OMAP44XX_DMA_MMC4_TX; 215582cf818dSkishore kadiyala host->dma_line_rx = OMAP44XX_DMA_MMC4_RX; 215682cf818dSkishore kadiyala break; 215782cf818dSkishore kadiyala case OMAP_MMC5_DEVID: 215882cf818dSkishore kadiyala host->dma_line_tx = OMAP44XX_DMA_MMC5_TX; 215982cf818dSkishore kadiyala host->dma_line_rx = OMAP44XX_DMA_MMC5_RX; 216082cf818dSkishore kadiyala break; 2161f3e2f1ddSGrazvydas Ignotas default: 2162f3e2f1ddSGrazvydas Ignotas dev_err(mmc_dev(host->mmc), "Invalid MMC id\n"); 2163f3e2f1ddSGrazvydas Ignotas goto err_irq; 2164a45c6cb8SMadhusudhan Chikkature } 2165a45c6cb8SMadhusudhan Chikkature 2166a45c6cb8SMadhusudhan Chikkature /* Request IRQ for MMC operations */ 216770a3341aSDenis Karpov ret = request_irq(host->irq, omap_hsmmc_irq, IRQF_DISABLED, 2168a45c6cb8SMadhusudhan Chikkature mmc_hostname(mmc), host); 2169a45c6cb8SMadhusudhan Chikkature if (ret) { 2170a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), "Unable to grab HSMMC IRQ\n"); 2171a45c6cb8SMadhusudhan Chikkature goto err_irq; 2172a45c6cb8SMadhusudhan Chikkature } 2173a45c6cb8SMadhusudhan Chikkature 2174a45c6cb8SMadhusudhan Chikkature if (pdata->init != NULL) { 2175a45c6cb8SMadhusudhan Chikkature if (pdata->init(&pdev->dev) != 0) { 217670a3341aSDenis Karpov dev_dbg(mmc_dev(host->mmc), 217770a3341aSDenis Karpov "Unable to configure MMC IRQs\n"); 2178a45c6cb8SMadhusudhan Chikkature goto err_irq_cd_init; 2179a45c6cb8SMadhusudhan Chikkature } 2180a45c6cb8SMadhusudhan Chikkature } 2181db0fefc5SAdrian Hunter 2182b702b106SAdrian Hunter if (omap_hsmmc_have_reg() && !mmc_slot(host).set_power) { 2183db0fefc5SAdrian Hunter ret = omap_hsmmc_reg_get(host); 2184db0fefc5SAdrian Hunter if (ret) 2185db0fefc5SAdrian Hunter goto err_reg; 2186db0fefc5SAdrian Hunter host->use_reg = 1; 2187db0fefc5SAdrian Hunter } 2188db0fefc5SAdrian Hunter 2189b583f26dSDavid Brownell mmc->ocr_avail = mmc_slot(host).ocr_mask; 2190a45c6cb8SMadhusudhan Chikkature 2191a45c6cb8SMadhusudhan Chikkature /* Request IRQ for card detect */ 2192e1a55f5eSAdrian Hunter if ((mmc_slot(host).card_detect_irq)) { 2193a45c6cb8SMadhusudhan Chikkature ret = request_irq(mmc_slot(host).card_detect_irq, 219470a3341aSDenis Karpov omap_hsmmc_cd_handler, 2195a45c6cb8SMadhusudhan Chikkature IRQF_TRIGGER_RISING | IRQF_TRIGGER_FALLING 2196a45c6cb8SMadhusudhan Chikkature | IRQF_DISABLED, 2197a45c6cb8SMadhusudhan Chikkature mmc_hostname(mmc), host); 2198a45c6cb8SMadhusudhan Chikkature if (ret) { 2199a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 2200a45c6cb8SMadhusudhan Chikkature "Unable to grab MMC CD IRQ\n"); 2201a45c6cb8SMadhusudhan Chikkature goto err_irq_cd; 2202a45c6cb8SMadhusudhan Chikkature } 2203a45c6cb8SMadhusudhan Chikkature } 2204a45c6cb8SMadhusudhan Chikkature 2205b417577dSAdrian Hunter omap_hsmmc_disable_irq(host); 2206a45c6cb8SMadhusudhan Chikkature 22075e2ea617SAdrian Hunter mmc_host_lazy_disable(host->mmc); 22085e2ea617SAdrian Hunter 2209b62f6228SAdrian Hunter omap_hsmmc_protect_card(host); 2210b62f6228SAdrian Hunter 2211a45c6cb8SMadhusudhan Chikkature mmc_add_host(mmc); 2212a45c6cb8SMadhusudhan Chikkature 2213191d1f1dSDenis Karpov if (mmc_slot(host).name != NULL) { 2214a45c6cb8SMadhusudhan Chikkature ret = device_create_file(&mmc->class_dev, &dev_attr_slot_name); 2215a45c6cb8SMadhusudhan Chikkature if (ret < 0) 2216a45c6cb8SMadhusudhan Chikkature goto err_slot_name; 2217a45c6cb8SMadhusudhan Chikkature } 2218191d1f1dSDenis Karpov if (mmc_slot(host).card_detect_irq && mmc_slot(host).get_cover_state) { 2219a45c6cb8SMadhusudhan Chikkature ret = device_create_file(&mmc->class_dev, 2220a45c6cb8SMadhusudhan Chikkature &dev_attr_cover_switch); 2221a45c6cb8SMadhusudhan Chikkature if (ret < 0) 2222db0fefc5SAdrian Hunter goto err_slot_name; 2223a45c6cb8SMadhusudhan Chikkature } 2224a45c6cb8SMadhusudhan Chikkature 222570a3341aSDenis Karpov omap_hsmmc_debugfs(mmc); 2226d900f712SDenis Karpov 2227a45c6cb8SMadhusudhan Chikkature return 0; 2228a45c6cb8SMadhusudhan Chikkature 2229a45c6cb8SMadhusudhan Chikkature err_slot_name: 2230a45c6cb8SMadhusudhan Chikkature mmc_remove_host(mmc); 2231a45c6cb8SMadhusudhan Chikkature free_irq(mmc_slot(host).card_detect_irq, host); 2232db0fefc5SAdrian Hunter err_irq_cd: 2233db0fefc5SAdrian Hunter if (host->use_reg) 2234db0fefc5SAdrian Hunter omap_hsmmc_reg_put(host); 2235db0fefc5SAdrian Hunter err_reg: 2236db0fefc5SAdrian Hunter if (host->pdata->cleanup) 2237db0fefc5SAdrian Hunter host->pdata->cleanup(&pdev->dev); 2238a45c6cb8SMadhusudhan Chikkature err_irq_cd_init: 2239a45c6cb8SMadhusudhan Chikkature free_irq(host->irq, host); 2240a45c6cb8SMadhusudhan Chikkature err_irq: 22415e2ea617SAdrian Hunter mmc_host_disable(host->mmc); 2242a45c6cb8SMadhusudhan Chikkature clk_disable(host->iclk); 2243a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 2244a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 22452bec0893SAdrian Hunter if (host->got_dbclk) { 2246a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 2247a45c6cb8SMadhusudhan Chikkature clk_put(host->dbclk); 2248a45c6cb8SMadhusudhan Chikkature } 2249a45c6cb8SMadhusudhan Chikkature err1: 2250a45c6cb8SMadhusudhan Chikkature iounmap(host->base); 2251db0fefc5SAdrian Hunter platform_set_drvdata(pdev, NULL); 2252a45c6cb8SMadhusudhan Chikkature mmc_free_host(mmc); 2253db0fefc5SAdrian Hunter err_alloc: 2254db0fefc5SAdrian Hunter omap_hsmmc_gpio_free(pdata); 2255db0fefc5SAdrian Hunter err: 2256db0fefc5SAdrian Hunter release_mem_region(res->start, res->end - res->start + 1); 2257a45c6cb8SMadhusudhan Chikkature return ret; 2258a45c6cb8SMadhusudhan Chikkature } 2259a45c6cb8SMadhusudhan Chikkature 226070a3341aSDenis Karpov static int omap_hsmmc_remove(struct platform_device *pdev) 2261a45c6cb8SMadhusudhan Chikkature { 226270a3341aSDenis Karpov struct omap_hsmmc_host *host = platform_get_drvdata(pdev); 2263a45c6cb8SMadhusudhan Chikkature struct resource *res; 2264a45c6cb8SMadhusudhan Chikkature 2265a45c6cb8SMadhusudhan Chikkature if (host) { 22665e2ea617SAdrian Hunter mmc_host_enable(host->mmc); 2267a45c6cb8SMadhusudhan Chikkature mmc_remove_host(host->mmc); 2268db0fefc5SAdrian Hunter if (host->use_reg) 2269db0fefc5SAdrian Hunter omap_hsmmc_reg_put(host); 2270a45c6cb8SMadhusudhan Chikkature if (host->pdata->cleanup) 2271a45c6cb8SMadhusudhan Chikkature host->pdata->cleanup(&pdev->dev); 2272a45c6cb8SMadhusudhan Chikkature free_irq(host->irq, host); 2273a45c6cb8SMadhusudhan Chikkature if (mmc_slot(host).card_detect_irq) 2274a45c6cb8SMadhusudhan Chikkature free_irq(mmc_slot(host).card_detect_irq, host); 2275a45c6cb8SMadhusudhan Chikkature flush_scheduled_work(); 2276a45c6cb8SMadhusudhan Chikkature 22775e2ea617SAdrian Hunter mmc_host_disable(host->mmc); 2278a45c6cb8SMadhusudhan Chikkature clk_disable(host->iclk); 2279a45c6cb8SMadhusudhan Chikkature clk_put(host->fclk); 2280a45c6cb8SMadhusudhan Chikkature clk_put(host->iclk); 22812bec0893SAdrian Hunter if (host->got_dbclk) { 2282a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 2283a45c6cb8SMadhusudhan Chikkature clk_put(host->dbclk); 2284a45c6cb8SMadhusudhan Chikkature } 2285a45c6cb8SMadhusudhan Chikkature 2286a45c6cb8SMadhusudhan Chikkature mmc_free_host(host->mmc); 2287a45c6cb8SMadhusudhan Chikkature iounmap(host->base); 2288db0fefc5SAdrian Hunter omap_hsmmc_gpio_free(pdev->dev.platform_data); 2289a45c6cb8SMadhusudhan Chikkature } 2290a45c6cb8SMadhusudhan Chikkature 2291a45c6cb8SMadhusudhan Chikkature res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 2292a45c6cb8SMadhusudhan Chikkature if (res) 2293a45c6cb8SMadhusudhan Chikkature release_mem_region(res->start, res->end - res->start + 1); 2294a45c6cb8SMadhusudhan Chikkature platform_set_drvdata(pdev, NULL); 2295a45c6cb8SMadhusudhan Chikkature 2296a45c6cb8SMadhusudhan Chikkature return 0; 2297a45c6cb8SMadhusudhan Chikkature } 2298a45c6cb8SMadhusudhan Chikkature 2299a45c6cb8SMadhusudhan Chikkature #ifdef CONFIG_PM 2300a791daa1SKevin Hilman static int omap_hsmmc_suspend(struct device *dev) 2301a45c6cb8SMadhusudhan Chikkature { 2302a45c6cb8SMadhusudhan Chikkature int ret = 0; 2303a791daa1SKevin Hilman struct platform_device *pdev = to_platform_device(dev); 230470a3341aSDenis Karpov struct omap_hsmmc_host *host = platform_get_drvdata(pdev); 2305a45c6cb8SMadhusudhan Chikkature 2306a45c6cb8SMadhusudhan Chikkature if (host && host->suspended) 2307a45c6cb8SMadhusudhan Chikkature return 0; 2308a45c6cb8SMadhusudhan Chikkature 2309a45c6cb8SMadhusudhan Chikkature if (host) { 2310a45c6cb8SMadhusudhan Chikkature host->suspended = 1; 2311a45c6cb8SMadhusudhan Chikkature if (host->pdata->suspend) { 2312a45c6cb8SMadhusudhan Chikkature ret = host->pdata->suspend(&pdev->dev, 2313a45c6cb8SMadhusudhan Chikkature host->slot_id); 2314a6b2240dSAdrian Hunter if (ret) { 2315a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 2316a45c6cb8SMadhusudhan Chikkature "Unable to handle MMC board" 2317a45c6cb8SMadhusudhan Chikkature " level suspend\n"); 2318a6b2240dSAdrian Hunter host->suspended = 0; 2319a6b2240dSAdrian Hunter return ret; 2320a45c6cb8SMadhusudhan Chikkature } 2321a6b2240dSAdrian Hunter } 2322a6b2240dSAdrian Hunter cancel_work_sync(&host->mmc_carddetect_work); 23231a13f8faSMatt Fleming ret = mmc_suspend_host(host->mmc); 2324e7cb756fSEthan Du mmc_host_enable(host->mmc); 2325a6b2240dSAdrian Hunter if (ret == 0) { 2326b417577dSAdrian Hunter omap_hsmmc_disable_irq(host); 2327a45c6cb8SMadhusudhan Chikkature OMAP_HSMMC_WRITE(host->base, HCTL, 23280683af48SJarkko Lavinen OMAP_HSMMC_READ(host->base, HCTL) & ~SDBP); 23295e2ea617SAdrian Hunter mmc_host_disable(host->mmc); 2330a45c6cb8SMadhusudhan Chikkature clk_disable(host->iclk); 23312bec0893SAdrian Hunter if (host->got_dbclk) 2332a45c6cb8SMadhusudhan Chikkature clk_disable(host->dbclk); 2333a6b2240dSAdrian Hunter } else { 2334a6b2240dSAdrian Hunter host->suspended = 0; 2335a6b2240dSAdrian Hunter if (host->pdata->resume) { 2336a6b2240dSAdrian Hunter ret = host->pdata->resume(&pdev->dev, 2337a6b2240dSAdrian Hunter host->slot_id); 2338a6b2240dSAdrian Hunter if (ret) 2339a6b2240dSAdrian Hunter dev_dbg(mmc_dev(host->mmc), 2340a6b2240dSAdrian Hunter "Unmask interrupt failed\n"); 2341a6b2240dSAdrian Hunter } 23425e2ea617SAdrian Hunter mmc_host_disable(host->mmc); 2343a6b2240dSAdrian Hunter } 2344a45c6cb8SMadhusudhan Chikkature 2345a45c6cb8SMadhusudhan Chikkature } 2346a45c6cb8SMadhusudhan Chikkature return ret; 2347a45c6cb8SMadhusudhan Chikkature } 2348a45c6cb8SMadhusudhan Chikkature 2349a45c6cb8SMadhusudhan Chikkature /* Routine to resume the MMC device */ 2350a791daa1SKevin Hilman static int omap_hsmmc_resume(struct device *dev) 2351a45c6cb8SMadhusudhan Chikkature { 2352a45c6cb8SMadhusudhan Chikkature int ret = 0; 2353a791daa1SKevin Hilman struct platform_device *pdev = to_platform_device(dev); 235470a3341aSDenis Karpov struct omap_hsmmc_host *host = platform_get_drvdata(pdev); 2355a45c6cb8SMadhusudhan Chikkature 2356a45c6cb8SMadhusudhan Chikkature if (host && !host->suspended) 2357a45c6cb8SMadhusudhan Chikkature return 0; 2358a45c6cb8SMadhusudhan Chikkature 2359a45c6cb8SMadhusudhan Chikkature if (host) { 2360a45c6cb8SMadhusudhan Chikkature ret = clk_enable(host->iclk); 236111dd62a7SDenis Karpov if (ret) 2362a45c6cb8SMadhusudhan Chikkature goto clk_en_err; 2363a45c6cb8SMadhusudhan Chikkature 236411dd62a7SDenis Karpov if (mmc_host_enable(host->mmc) != 0) { 236511dd62a7SDenis Karpov clk_disable(host->iclk); 236611dd62a7SDenis Karpov goto clk_en_err; 236711dd62a7SDenis Karpov } 236811dd62a7SDenis Karpov 23692bec0893SAdrian Hunter if (host->got_dbclk) 23702bec0893SAdrian Hunter clk_enable(host->dbclk); 23712bec0893SAdrian Hunter 237270a3341aSDenis Karpov omap_hsmmc_conf_bus_power(host); 23731b331e69SKim Kyuwon 2374a45c6cb8SMadhusudhan Chikkature if (host->pdata->resume) { 2375a45c6cb8SMadhusudhan Chikkature ret = host->pdata->resume(&pdev->dev, host->slot_id); 2376a45c6cb8SMadhusudhan Chikkature if (ret) 2377a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 2378a45c6cb8SMadhusudhan Chikkature "Unmask interrupt failed\n"); 2379a45c6cb8SMadhusudhan Chikkature } 2380a45c6cb8SMadhusudhan Chikkature 2381b62f6228SAdrian Hunter omap_hsmmc_protect_card(host); 2382b62f6228SAdrian Hunter 2383a45c6cb8SMadhusudhan Chikkature /* Notify the core to resume the host */ 2384a45c6cb8SMadhusudhan Chikkature ret = mmc_resume_host(host->mmc); 2385a45c6cb8SMadhusudhan Chikkature if (ret == 0) 2386a45c6cb8SMadhusudhan Chikkature host->suspended = 0; 238770a3341aSDenis Karpov 23885e2ea617SAdrian Hunter mmc_host_lazy_disable(host->mmc); 2389a45c6cb8SMadhusudhan Chikkature } 2390a45c6cb8SMadhusudhan Chikkature 2391a45c6cb8SMadhusudhan Chikkature return ret; 2392a45c6cb8SMadhusudhan Chikkature 2393a45c6cb8SMadhusudhan Chikkature clk_en_err: 2394a45c6cb8SMadhusudhan Chikkature dev_dbg(mmc_dev(host->mmc), 2395a45c6cb8SMadhusudhan Chikkature "Failed to enable MMC clocks during resume\n"); 2396a45c6cb8SMadhusudhan Chikkature return ret; 2397a45c6cb8SMadhusudhan Chikkature } 2398a45c6cb8SMadhusudhan Chikkature 2399a45c6cb8SMadhusudhan Chikkature #else 240070a3341aSDenis Karpov #define omap_hsmmc_suspend NULL 240170a3341aSDenis Karpov #define omap_hsmmc_resume NULL 2402a45c6cb8SMadhusudhan Chikkature #endif 2403a45c6cb8SMadhusudhan Chikkature 2404a791daa1SKevin Hilman static struct dev_pm_ops omap_hsmmc_dev_pm_ops = { 240570a3341aSDenis Karpov .suspend = omap_hsmmc_suspend, 240670a3341aSDenis Karpov .resume = omap_hsmmc_resume, 2407a791daa1SKevin Hilman }; 2408a791daa1SKevin Hilman 2409a791daa1SKevin Hilman static struct platform_driver omap_hsmmc_driver = { 2410a791daa1SKevin Hilman .remove = omap_hsmmc_remove, 2411a45c6cb8SMadhusudhan Chikkature .driver = { 2412a45c6cb8SMadhusudhan Chikkature .name = DRIVER_NAME, 2413a45c6cb8SMadhusudhan Chikkature .owner = THIS_MODULE, 2414a791daa1SKevin Hilman .pm = &omap_hsmmc_dev_pm_ops, 2415a45c6cb8SMadhusudhan Chikkature }, 2416a45c6cb8SMadhusudhan Chikkature }; 2417a45c6cb8SMadhusudhan Chikkature 241870a3341aSDenis Karpov static int __init omap_hsmmc_init(void) 2419a45c6cb8SMadhusudhan Chikkature { 2420a45c6cb8SMadhusudhan Chikkature /* Register the MMC driver */ 24218753298aSRoger Quadros return platform_driver_probe(&omap_hsmmc_driver, omap_hsmmc_probe); 2422a45c6cb8SMadhusudhan Chikkature } 2423a45c6cb8SMadhusudhan Chikkature 242470a3341aSDenis Karpov static void __exit omap_hsmmc_cleanup(void) 2425a45c6cb8SMadhusudhan Chikkature { 2426a45c6cb8SMadhusudhan Chikkature /* Unregister MMC driver */ 242770a3341aSDenis Karpov platform_driver_unregister(&omap_hsmmc_driver); 2428a45c6cb8SMadhusudhan Chikkature } 2429a45c6cb8SMadhusudhan Chikkature 243070a3341aSDenis Karpov module_init(omap_hsmmc_init); 243170a3341aSDenis Karpov module_exit(omap_hsmmc_cleanup); 2432a45c6cb8SMadhusudhan Chikkature 2433a45c6cb8SMadhusudhan Chikkature MODULE_DESCRIPTION("OMAP High Speed Multimedia Card driver"); 2434a45c6cb8SMadhusudhan Chikkature MODULE_LICENSE("GPL"); 2435a45c6cb8SMadhusudhan Chikkature MODULE_ALIAS("platform:" DRIVER_NAME); 2436a45c6cb8SMadhusudhan Chikkature MODULE_AUTHOR("Texas Instruments Inc"); 2437