1d96be879SSascha Hauer /* 2d96be879SSascha Hauer * linux/drivers/mmc/host/mxcmmc.c - Freescale i.MX MMCI driver 3d96be879SSascha Hauer * 4d96be879SSascha Hauer * This is a driver for the SDHC controller found in Freescale MX2/MX3 5d96be879SSascha Hauer * SoCs. It is basically the same hardware as found on MX1 (imxmmc.c). 6d96be879SSascha Hauer * Unlike the hardware found on MX1, this hardware just works and does 73ad2f3fbSDaniel Mack * not need all the quirks found in imxmmc.c, hence the separate driver. 8d96be879SSascha Hauer * 9d96be879SSascha Hauer * Copyright (C) 2008 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de> 10d96be879SSascha Hauer * Copyright (C) 2006 Pavel Pisa, PiKRON <ppisa@pikron.com> 11d96be879SSascha Hauer * 12d96be879SSascha Hauer * derived from pxamci.c by Russell King 13d96be879SSascha Hauer * 14d96be879SSascha Hauer * This program is free software; you can redistribute it and/or modify 15d96be879SSascha Hauer * it under the terms of the GNU General Public License version 2 as 16d96be879SSascha Hauer * published by the Free Software Foundation. 17d96be879SSascha Hauer * 18d96be879SSascha Hauer */ 19d96be879SSascha Hauer 20d96be879SSascha Hauer #include <linux/module.h> 21d96be879SSascha Hauer #include <linux/init.h> 22d96be879SSascha Hauer #include <linux/ioport.h> 23d96be879SSascha Hauer #include <linux/platform_device.h> 24d96be879SSascha Hauer #include <linux/interrupt.h> 25d96be879SSascha Hauer #include <linux/irq.h> 26d96be879SSascha Hauer #include <linux/blkdev.h> 27d96be879SSascha Hauer #include <linux/dma-mapping.h> 28d96be879SSascha Hauer #include <linux/mmc/host.h> 29d96be879SSascha Hauer #include <linux/mmc/card.h> 30d96be879SSascha Hauer #include <linux/delay.h> 31d96be879SSascha Hauer #include <linux/clk.h> 32d96be879SSascha Hauer #include <linux/io.h> 33d96be879SSascha Hauer #include <linux/gpio.h> 3474b66954SAlberto Panizzo #include <linux/regulator/consumer.h> 35f53fbde4SSascha Hauer #include <linux/dmaengine.h> 36258aea76SViresh Kumar #include <linux/types.h> 37d96be879SSascha Hauer 38d96be879SSascha Hauer #include <asm/dma.h> 39d96be879SSascha Hauer #include <asm/irq.h> 40d96be879SSascha Hauer #include <asm/sizes.h> 4182906b13SArnd Bergmann #include <linux/platform_data/mmc-mxcmmc.h> 42d96be879SSascha Hauer 4382906b13SArnd Bergmann #include <linux/platform_data/dma-imx.h> 44d96be879SSascha Hauer 459563b1dbSSascha Hauer #define DRIVER_NAME "mxc-mmc" 46f6ad0a48SJavier Martin #define MXCMCI_TIMEOUT_MS 10000 47d96be879SSascha Hauer 48d96be879SSascha Hauer #define MMC_REG_STR_STP_CLK 0x00 49d96be879SSascha Hauer #define MMC_REG_STATUS 0x04 50d96be879SSascha Hauer #define MMC_REG_CLK_RATE 0x08 51d96be879SSascha Hauer #define MMC_REG_CMD_DAT_CONT 0x0C 52d96be879SSascha Hauer #define MMC_REG_RES_TO 0x10 53d96be879SSascha Hauer #define MMC_REG_READ_TO 0x14 54d96be879SSascha Hauer #define MMC_REG_BLK_LEN 0x18 55d96be879SSascha Hauer #define MMC_REG_NOB 0x1C 56d96be879SSascha Hauer #define MMC_REG_REV_NO 0x20 57d96be879SSascha Hauer #define MMC_REG_INT_CNTR 0x24 58d96be879SSascha Hauer #define MMC_REG_CMD 0x28 59d96be879SSascha Hauer #define MMC_REG_ARG 0x2C 60d96be879SSascha Hauer #define MMC_REG_RES_FIFO 0x34 61d96be879SSascha Hauer #define MMC_REG_BUFFER_ACCESS 0x38 62d96be879SSascha Hauer 63d96be879SSascha Hauer #define STR_STP_CLK_RESET (1 << 3) 64d96be879SSascha Hauer #define STR_STP_CLK_START_CLK (1 << 1) 65d96be879SSascha Hauer #define STR_STP_CLK_STOP_CLK (1 << 0) 66d96be879SSascha Hauer 67d96be879SSascha Hauer #define STATUS_CARD_INSERTION (1 << 31) 68d96be879SSascha Hauer #define STATUS_CARD_REMOVAL (1 << 30) 69d96be879SSascha Hauer #define STATUS_YBUF_EMPTY (1 << 29) 70d96be879SSascha Hauer #define STATUS_XBUF_EMPTY (1 << 28) 71d96be879SSascha Hauer #define STATUS_YBUF_FULL (1 << 27) 72d96be879SSascha Hauer #define STATUS_XBUF_FULL (1 << 26) 73d96be879SSascha Hauer #define STATUS_BUF_UND_RUN (1 << 25) 74d96be879SSascha Hauer #define STATUS_BUF_OVFL (1 << 24) 75d96be879SSascha Hauer #define STATUS_SDIO_INT_ACTIVE (1 << 14) 76d96be879SSascha Hauer #define STATUS_END_CMD_RESP (1 << 13) 77d96be879SSascha Hauer #define STATUS_WRITE_OP_DONE (1 << 12) 78d96be879SSascha Hauer #define STATUS_DATA_TRANS_DONE (1 << 11) 79d96be879SSascha Hauer #define STATUS_READ_OP_DONE (1 << 11) 80d96be879SSascha Hauer #define STATUS_WR_CRC_ERROR_CODE_MASK (3 << 10) 81d96be879SSascha Hauer #define STATUS_CARD_BUS_CLK_RUN (1 << 8) 82d96be879SSascha Hauer #define STATUS_BUF_READ_RDY (1 << 7) 83d96be879SSascha Hauer #define STATUS_BUF_WRITE_RDY (1 << 6) 84d96be879SSascha Hauer #define STATUS_RESP_CRC_ERR (1 << 5) 85d96be879SSascha Hauer #define STATUS_CRC_READ_ERR (1 << 3) 86d96be879SSascha Hauer #define STATUS_CRC_WRITE_ERR (1 << 2) 87d96be879SSascha Hauer #define STATUS_TIME_OUT_RESP (1 << 1) 88d96be879SSascha Hauer #define STATUS_TIME_OUT_READ (1 << 0) 89d96be879SSascha Hauer #define STATUS_ERR_MASK 0x2f 90d96be879SSascha Hauer 91d96be879SSascha Hauer #define CMD_DAT_CONT_CMD_RESP_LONG_OFF (1 << 12) 92d96be879SSascha Hauer #define CMD_DAT_CONT_STOP_READWAIT (1 << 11) 93d96be879SSascha Hauer #define CMD_DAT_CONT_START_READWAIT (1 << 10) 94d96be879SSascha Hauer #define CMD_DAT_CONT_BUS_WIDTH_4 (2 << 8) 95d96be879SSascha Hauer #define CMD_DAT_CONT_INIT (1 << 7) 96d96be879SSascha Hauer #define CMD_DAT_CONT_WRITE (1 << 4) 97d96be879SSascha Hauer #define CMD_DAT_CONT_DATA_ENABLE (1 << 3) 98d96be879SSascha Hauer #define CMD_DAT_CONT_RESPONSE_48BIT_CRC (1 << 0) 99d96be879SSascha Hauer #define CMD_DAT_CONT_RESPONSE_136BIT (2 << 0) 100d96be879SSascha Hauer #define CMD_DAT_CONT_RESPONSE_48BIT (3 << 0) 101d96be879SSascha Hauer 102d96be879SSascha Hauer #define INT_SDIO_INT_WKP_EN (1 << 18) 103d96be879SSascha Hauer #define INT_CARD_INSERTION_WKP_EN (1 << 17) 104d96be879SSascha Hauer #define INT_CARD_REMOVAL_WKP_EN (1 << 16) 105d96be879SSascha Hauer #define INT_CARD_INSERTION_EN (1 << 15) 106d96be879SSascha Hauer #define INT_CARD_REMOVAL_EN (1 << 14) 107d96be879SSascha Hauer #define INT_SDIO_IRQ_EN (1 << 13) 108d96be879SSascha Hauer #define INT_DAT0_EN (1 << 12) 109d96be879SSascha Hauer #define INT_BUF_READ_EN (1 << 4) 110d96be879SSascha Hauer #define INT_BUF_WRITE_EN (1 << 3) 111d96be879SSascha Hauer #define INT_END_CMD_RES_EN (1 << 2) 112d96be879SSascha Hauer #define INT_WRITE_OP_DONE_EN (1 << 1) 113d96be879SSascha Hauer #define INT_READ_OP_EN (1 << 0) 114d96be879SSascha Hauer 1157f917a8dSShawn Guo enum mxcmci_type { 1167f917a8dSShawn Guo IMX21_MMC, 1177f917a8dSShawn Guo IMX31_MMC, 1187f917a8dSShawn Guo }; 1197f917a8dSShawn Guo 120d96be879SSascha Hauer struct mxcmci_host { 121d96be879SSascha Hauer struct mmc_host *mmc; 122d96be879SSascha Hauer struct resource *res; 123d96be879SSascha Hauer void __iomem *base; 124d96be879SSascha Hauer int irq; 125d96be879SSascha Hauer int detect_irq; 126f53fbde4SSascha Hauer struct dma_chan *dma; 127f53fbde4SSascha Hauer struct dma_async_tx_descriptor *desc; 128d96be879SSascha Hauer int do_dma; 12916b3bf8cSEric Bénard int default_irq_mask; 130f441b993SDaniel Mack int use_sdio; 131d96be879SSascha Hauer unsigned int power_mode; 132d96be879SSascha Hauer struct imxmmc_platform_data *pdata; 133d96be879SSascha Hauer 134d96be879SSascha Hauer struct mmc_request *req; 135d96be879SSascha Hauer struct mmc_command *cmd; 136d96be879SSascha Hauer struct mmc_data *data; 137d96be879SSascha Hauer 138d96be879SSascha Hauer unsigned int datasize; 139d96be879SSascha Hauer unsigned int dma_dir; 140d96be879SSascha Hauer 141d96be879SSascha Hauer u16 rev_no; 142d96be879SSascha Hauer unsigned int cmdat; 143d96be879SSascha Hauer 144529aa29eSSascha Hauer struct clk *clk_ipg; 145529aa29eSSascha Hauer struct clk *clk_per; 146d96be879SSascha Hauer 147d96be879SSascha Hauer int clock; 148d96be879SSascha Hauer 149d96be879SSascha Hauer struct work_struct datawork; 150f441b993SDaniel Mack spinlock_t lock; 15174b66954SAlberto Panizzo 15274b66954SAlberto Panizzo struct regulator *vcc; 153f53fbde4SSascha Hauer 154f53fbde4SSascha Hauer int burstlen; 155f53fbde4SSascha Hauer int dmareq; 156f53fbde4SSascha Hauer struct dma_slave_config dma_slave_config; 157f53fbde4SSascha Hauer struct imx_dma_data dma_data; 158f6ad0a48SJavier Martin 159f6ad0a48SJavier Martin struct timer_list watchdog; 1607f917a8dSShawn Guo enum mxcmci_type devtype; 161d96be879SSascha Hauer }; 162d96be879SSascha Hauer 1637f917a8dSShawn Guo static struct platform_device_id mxcmci_devtype[] = { 1647f917a8dSShawn Guo { 1657f917a8dSShawn Guo .name = "imx21-mmc", 1667f917a8dSShawn Guo .driver_data = IMX21_MMC, 1677f917a8dSShawn Guo }, { 1687f917a8dSShawn Guo .name = "imx31-mmc", 1697f917a8dSShawn Guo .driver_data = IMX31_MMC, 1707f917a8dSShawn Guo }, { 1717f917a8dSShawn Guo /* sentinel */ 1727f917a8dSShawn Guo } 1737f917a8dSShawn Guo }; 1747f917a8dSShawn Guo MODULE_DEVICE_TABLE(platform, mxcmci_devtype); 1757f917a8dSShawn Guo 1767f917a8dSShawn Guo static inline int is_imx31_mmc(struct mxcmci_host *host) 1777f917a8dSShawn Guo { 1787f917a8dSShawn Guo return host->devtype == IMX31_MMC; 1797f917a8dSShawn Guo } 1807f917a8dSShawn Guo 18118489fa2SMartin Fuzzey static void mxcmci_set_clk_rate(struct mxcmci_host *host, unsigned int clk_ios); 18218489fa2SMartin Fuzzey 18374b66954SAlberto Panizzo static inline void mxcmci_init_ocr(struct mxcmci_host *host) 18474b66954SAlberto Panizzo { 18574b66954SAlberto Panizzo host->vcc = regulator_get(mmc_dev(host->mmc), "vmmc"); 18674b66954SAlberto Panizzo 18774b66954SAlberto Panizzo if (IS_ERR(host->vcc)) { 18874b66954SAlberto Panizzo host->vcc = NULL; 18974b66954SAlberto Panizzo } else { 19074b66954SAlberto Panizzo host->mmc->ocr_avail = mmc_regulator_get_ocrmask(host->vcc); 19174b66954SAlberto Panizzo if (host->pdata && host->pdata->ocr_avail) 19274b66954SAlberto Panizzo dev_warn(mmc_dev(host->mmc), 19374b66954SAlberto Panizzo "pdata->ocr_avail will not be used\n"); 19474b66954SAlberto Panizzo } 195d078d242SAlberto Panizzo 19674b66954SAlberto Panizzo if (host->vcc == NULL) { 19774b66954SAlberto Panizzo /* fall-back to platform data */ 19874b66954SAlberto Panizzo if (host->pdata && host->pdata->ocr_avail) 19974b66954SAlberto Panizzo host->mmc->ocr_avail = host->pdata->ocr_avail; 20074b66954SAlberto Panizzo else 20174b66954SAlberto Panizzo host->mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; 20274b66954SAlberto Panizzo } 20374b66954SAlberto Panizzo } 20474b66954SAlberto Panizzo 205d078d242SAlberto Panizzo static inline void mxcmci_set_power(struct mxcmci_host *host, 206d078d242SAlberto Panizzo unsigned char power_mode, 207d078d242SAlberto Panizzo unsigned int vdd) 20874b66954SAlberto Panizzo { 209d078d242SAlberto Panizzo if (host->vcc) { 210d078d242SAlberto Panizzo if (power_mode == MMC_POWER_UP) 211d078d242SAlberto Panizzo mmc_regulator_set_ocr(host->mmc, host->vcc, vdd); 212d078d242SAlberto Panizzo else if (power_mode == MMC_POWER_OFF) 213d078d242SAlberto Panizzo mmc_regulator_set_ocr(host->mmc, host->vcc, 0); 214d078d242SAlberto Panizzo } 215d078d242SAlberto Panizzo 21674b66954SAlberto Panizzo if (host->pdata && host->pdata->setpower) 21774b66954SAlberto Panizzo host->pdata->setpower(mmc_dev(host->mmc), vdd); 21874b66954SAlberto Panizzo } 21974b66954SAlberto Panizzo 220d96be879SSascha Hauer static inline int mxcmci_use_dma(struct mxcmci_host *host) 221d96be879SSascha Hauer { 222d96be879SSascha Hauer return host->do_dma; 223d96be879SSascha Hauer } 224d96be879SSascha Hauer 225d96be879SSascha Hauer static void mxcmci_softreset(struct mxcmci_host *host) 226d96be879SSascha Hauer { 227d96be879SSascha Hauer int i; 228d96be879SSascha Hauer 2294725f6f1SDaniel Mack dev_dbg(mmc_dev(host->mmc), "mxcmci_softreset\n"); 2304725f6f1SDaniel Mack 231d96be879SSascha Hauer /* reset sequence */ 232d96be879SSascha Hauer writew(STR_STP_CLK_RESET, host->base + MMC_REG_STR_STP_CLK); 233d96be879SSascha Hauer writew(STR_STP_CLK_RESET | STR_STP_CLK_START_CLK, 234d96be879SSascha Hauer host->base + MMC_REG_STR_STP_CLK); 235d96be879SSascha Hauer 236d96be879SSascha Hauer for (i = 0; i < 8; i++) 237d96be879SSascha Hauer writew(STR_STP_CLK_START_CLK, host->base + MMC_REG_STR_STP_CLK); 238d96be879SSascha Hauer 239d96be879SSascha Hauer writew(0xff, host->base + MMC_REG_RES_TO); 240d96be879SSascha Hauer } 241f53fbde4SSascha Hauer static int mxcmci_setup_dma(struct mmc_host *mmc); 242d96be879SSascha Hauer 243656217d2SMartin Fuzzey static int mxcmci_setup_data(struct mxcmci_host *host, struct mmc_data *data) 244d96be879SSascha Hauer { 245d96be879SSascha Hauer unsigned int nob = data->blocks; 246d96be879SSascha Hauer unsigned int blksz = data->blksz; 247d96be879SSascha Hauer unsigned int datasize = nob * blksz; 248d96be879SSascha Hauer struct scatterlist *sg; 24905f5799cSVinod Koul enum dma_transfer_direction slave_dirn; 250f53fbde4SSascha Hauer int i, nents; 251f53fbde4SSascha Hauer 252d96be879SSascha Hauer if (data->flags & MMC_DATA_STREAM) 253d96be879SSascha Hauer nob = 0xffff; 254d96be879SSascha Hauer 255d96be879SSascha Hauer host->data = data; 256d96be879SSascha Hauer data->bytes_xfered = 0; 257d96be879SSascha Hauer 258d96be879SSascha Hauer writew(nob, host->base + MMC_REG_NOB); 259d96be879SSascha Hauer writew(blksz, host->base + MMC_REG_BLK_LEN); 260d96be879SSascha Hauer host->datasize = datasize; 261d96be879SSascha Hauer 262f53fbde4SSascha Hauer if (!mxcmci_use_dma(host)) 263f53fbde4SSascha Hauer return 0; 264f53fbde4SSascha Hauer 265d96be879SSascha Hauer for_each_sg(data->sg, sg, data->sg_len, i) { 266d96be879SSascha Hauer if (sg->offset & 3 || sg->length & 3) { 267d96be879SSascha Hauer host->do_dma = 0; 268656217d2SMartin Fuzzey return 0; 269d96be879SSascha Hauer } 270d96be879SSascha Hauer } 271d96be879SSascha Hauer 27205f5799cSVinod Koul if (data->flags & MMC_DATA_READ) { 273d96be879SSascha Hauer host->dma_dir = DMA_FROM_DEVICE; 27405f5799cSVinod Koul slave_dirn = DMA_DEV_TO_MEM; 27505f5799cSVinod Koul } else { 276d96be879SSascha Hauer host->dma_dir = DMA_TO_DEVICE; 27705f5799cSVinod Koul slave_dirn = DMA_MEM_TO_DEV; 27805f5799cSVinod Koul } 279f53fbde4SSascha Hauer 280f53fbde4SSascha Hauer nents = dma_map_sg(host->dma->device->dev, data->sg, 281d96be879SSascha Hauer data->sg_len, host->dma_dir); 282f53fbde4SSascha Hauer if (nents != data->sg_len) 283f53fbde4SSascha Hauer return -EINVAL; 284d96be879SSascha Hauer 28516052827SAlexandre Bounine host->desc = dmaengine_prep_slave_sg(host->dma, 28605f5799cSVinod Koul data->sg, data->sg_len, slave_dirn, 287f53fbde4SSascha Hauer DMA_PREP_INTERRUPT | DMA_CTRL_ACK); 288d96be879SSascha Hauer 289f53fbde4SSascha Hauer if (!host->desc) { 290f53fbde4SSascha Hauer dma_unmap_sg(host->dma->device->dev, data->sg, data->sg_len, 291f53fbde4SSascha Hauer host->dma_dir); 292f53fbde4SSascha Hauer host->do_dma = 0; 293f53fbde4SSascha Hauer return 0; /* Fall back to PIO */ 294656217d2SMartin Fuzzey } 295d96be879SSascha Hauer wmb(); 296d96be879SSascha Hauer 297f53fbde4SSascha Hauer dmaengine_submit(host->desc); 298439aa0efSSascha Hauer dma_async_issue_pending(host->dma); 299f53fbde4SSascha Hauer 300f6ad0a48SJavier Martin mod_timer(&host->watchdog, jiffies + msecs_to_jiffies(MXCMCI_TIMEOUT_MS)); 301f6ad0a48SJavier Martin 302656217d2SMartin Fuzzey return 0; 303d96be879SSascha Hauer } 304d96be879SSascha Hauer 305f6ad0a48SJavier Martin static void mxcmci_cmd_done(struct mxcmci_host *host, unsigned int stat); 306f6ad0a48SJavier Martin static void mxcmci_data_done(struct mxcmci_host *host, unsigned int stat); 307f6ad0a48SJavier Martin 308f6ad0a48SJavier Martin static void mxcmci_dma_callback(void *data) 309f6ad0a48SJavier Martin { 310f6ad0a48SJavier Martin struct mxcmci_host *host = data; 311f6ad0a48SJavier Martin u32 stat; 312f6ad0a48SJavier Martin 313f6ad0a48SJavier Martin del_timer(&host->watchdog); 314f6ad0a48SJavier Martin 315f6ad0a48SJavier Martin stat = readl(host->base + MMC_REG_STATUS); 316f6ad0a48SJavier Martin writel(stat & ~STATUS_DATA_TRANS_DONE, host->base + MMC_REG_STATUS); 317f6ad0a48SJavier Martin 318f6ad0a48SJavier Martin dev_dbg(mmc_dev(host->mmc), "%s: 0x%08x\n", __func__, stat); 319f6ad0a48SJavier Martin 320f6ad0a48SJavier Martin if (stat & STATUS_READ_OP_DONE) 321f6ad0a48SJavier Martin writel(STATUS_READ_OP_DONE, host->base + MMC_REG_STATUS); 322f6ad0a48SJavier Martin 323f6ad0a48SJavier Martin mxcmci_data_done(host, stat); 324f6ad0a48SJavier Martin } 325f6ad0a48SJavier Martin 326d96be879SSascha Hauer static int mxcmci_start_cmd(struct mxcmci_host *host, struct mmc_command *cmd, 327d96be879SSascha Hauer unsigned int cmdat) 328d96be879SSascha Hauer { 32916b3bf8cSEric Bénard u32 int_cntr = host->default_irq_mask; 330f441b993SDaniel Mack unsigned long flags; 331f441b993SDaniel Mack 332d96be879SSascha Hauer WARN_ON(host->cmd != NULL); 333d96be879SSascha Hauer host->cmd = cmd; 334d96be879SSascha Hauer 335d96be879SSascha Hauer switch (mmc_resp_type(cmd)) { 336d96be879SSascha Hauer case MMC_RSP_R1: /* short CRC, OPCODE */ 337d96be879SSascha Hauer case MMC_RSP_R1B:/* short CRC, OPCODE, BUSY */ 338d96be879SSascha Hauer cmdat |= CMD_DAT_CONT_RESPONSE_48BIT_CRC; 339d96be879SSascha Hauer break; 340d96be879SSascha Hauer case MMC_RSP_R2: /* long 136 bit + CRC */ 341d96be879SSascha Hauer cmdat |= CMD_DAT_CONT_RESPONSE_136BIT; 342d96be879SSascha Hauer break; 343d96be879SSascha Hauer case MMC_RSP_R3: /* short */ 344d96be879SSascha Hauer cmdat |= CMD_DAT_CONT_RESPONSE_48BIT; 345d96be879SSascha Hauer break; 346d96be879SSascha Hauer case MMC_RSP_NONE: 347d96be879SSascha Hauer break; 348d96be879SSascha Hauer default: 349d96be879SSascha Hauer dev_err(mmc_dev(host->mmc), "unhandled response type 0x%x\n", 350d96be879SSascha Hauer mmc_resp_type(cmd)); 351d96be879SSascha Hauer cmd->error = -EINVAL; 352d96be879SSascha Hauer return -EINVAL; 353d96be879SSascha Hauer } 354d96be879SSascha Hauer 355f441b993SDaniel Mack int_cntr = INT_END_CMD_RES_EN; 356f441b993SDaniel Mack 357f6ad0a48SJavier Martin if (mxcmci_use_dma(host)) { 358f6ad0a48SJavier Martin if (host->dma_dir == DMA_FROM_DEVICE) { 359f6ad0a48SJavier Martin host->desc->callback = mxcmci_dma_callback; 360f6ad0a48SJavier Martin host->desc->callback_param = host; 361f6ad0a48SJavier Martin } else { 362f6ad0a48SJavier Martin int_cntr |= INT_WRITE_OP_DONE_EN; 363f6ad0a48SJavier Martin } 364f6ad0a48SJavier Martin } 365f441b993SDaniel Mack 366f441b993SDaniel Mack spin_lock_irqsave(&host->lock, flags); 367f441b993SDaniel Mack if (host->use_sdio) 368f441b993SDaniel Mack int_cntr |= INT_SDIO_IRQ_EN; 369f441b993SDaniel Mack writel(int_cntr, host->base + MMC_REG_INT_CNTR); 370f441b993SDaniel Mack spin_unlock_irqrestore(&host->lock, flags); 371d96be879SSascha Hauer 372d96be879SSascha Hauer writew(cmd->opcode, host->base + MMC_REG_CMD); 373d96be879SSascha Hauer writel(cmd->arg, host->base + MMC_REG_ARG); 374d96be879SSascha Hauer writew(cmdat, host->base + MMC_REG_CMD_DAT_CONT); 375d96be879SSascha Hauer 376d96be879SSascha Hauer return 0; 377d96be879SSascha Hauer } 378d96be879SSascha Hauer 379d96be879SSascha Hauer static void mxcmci_finish_request(struct mxcmci_host *host, 380d96be879SSascha Hauer struct mmc_request *req) 381d96be879SSascha Hauer { 38216b3bf8cSEric Bénard u32 int_cntr = host->default_irq_mask; 383f441b993SDaniel Mack unsigned long flags; 384f441b993SDaniel Mack 385f441b993SDaniel Mack spin_lock_irqsave(&host->lock, flags); 386f441b993SDaniel Mack if (host->use_sdio) 387f441b993SDaniel Mack int_cntr |= INT_SDIO_IRQ_EN; 388f441b993SDaniel Mack writel(int_cntr, host->base + MMC_REG_INT_CNTR); 389f441b993SDaniel Mack spin_unlock_irqrestore(&host->lock, flags); 390d96be879SSascha Hauer 391d96be879SSascha Hauer host->req = NULL; 392d96be879SSascha Hauer host->cmd = NULL; 393d96be879SSascha Hauer host->data = NULL; 394d96be879SSascha Hauer 395d96be879SSascha Hauer mmc_request_done(host->mmc, req); 396d96be879SSascha Hauer } 397d96be879SSascha Hauer 398d96be879SSascha Hauer static int mxcmci_finish_data(struct mxcmci_host *host, unsigned int stat) 399d96be879SSascha Hauer { 400d96be879SSascha Hauer struct mmc_data *data = host->data; 401d96be879SSascha Hauer int data_error; 402d96be879SSascha Hauer 403f6ad0a48SJavier Martin if (mxcmci_use_dma(host)) 404f53fbde4SSascha Hauer dma_unmap_sg(host->dma->device->dev, data->sg, data->sg_len, 405d96be879SSascha Hauer host->dma_dir); 406d96be879SSascha Hauer 407d96be879SSascha Hauer if (stat & STATUS_ERR_MASK) { 408d96be879SSascha Hauer dev_dbg(mmc_dev(host->mmc), "request failed. status: 0x%08x\n", 409d96be879SSascha Hauer stat); 410d96be879SSascha Hauer if (stat & STATUS_CRC_READ_ERR) { 4114725f6f1SDaniel Mack dev_err(mmc_dev(host->mmc), "%s: -EILSEQ\n", __func__); 412d96be879SSascha Hauer data->error = -EILSEQ; 413d96be879SSascha Hauer } else if (stat & STATUS_CRC_WRITE_ERR) { 414d96be879SSascha Hauer u32 err_code = (stat >> 9) & 0x3; 4154725f6f1SDaniel Mack if (err_code == 2) { /* No CRC response */ 4164725f6f1SDaniel Mack dev_err(mmc_dev(host->mmc), 4174725f6f1SDaniel Mack "%s: No CRC -ETIMEDOUT\n", __func__); 418d96be879SSascha Hauer data->error = -ETIMEDOUT; 419d96be879SSascha Hauer } else { 4204725f6f1SDaniel Mack dev_err(mmc_dev(host->mmc), 4214725f6f1SDaniel Mack "%s: -EILSEQ\n", __func__); 4224725f6f1SDaniel Mack data->error = -EILSEQ; 4234725f6f1SDaniel Mack } 4244725f6f1SDaniel Mack } else if (stat & STATUS_TIME_OUT_READ) { 4254725f6f1SDaniel Mack dev_err(mmc_dev(host->mmc), 4264725f6f1SDaniel Mack "%s: read -ETIMEDOUT\n", __func__); 4274725f6f1SDaniel Mack data->error = -ETIMEDOUT; 4284725f6f1SDaniel Mack } else { 4294725f6f1SDaniel Mack dev_err(mmc_dev(host->mmc), "%s: -EIO\n", __func__); 430d96be879SSascha Hauer data->error = -EIO; 431d96be879SSascha Hauer } 432d96be879SSascha Hauer } else { 433d96be879SSascha Hauer data->bytes_xfered = host->datasize; 434d96be879SSascha Hauer } 435d96be879SSascha Hauer 436d96be879SSascha Hauer data_error = data->error; 437d96be879SSascha Hauer 438d96be879SSascha Hauer host->data = NULL; 439d96be879SSascha Hauer 440d96be879SSascha Hauer return data_error; 441d96be879SSascha Hauer } 442d96be879SSascha Hauer 443d96be879SSascha Hauer static void mxcmci_read_response(struct mxcmci_host *host, unsigned int stat) 444d96be879SSascha Hauer { 445d96be879SSascha Hauer struct mmc_command *cmd = host->cmd; 446d96be879SSascha Hauer int i; 447d96be879SSascha Hauer u32 a, b, c; 448d96be879SSascha Hauer 449d96be879SSascha Hauer if (!cmd) 450d96be879SSascha Hauer return; 451d96be879SSascha Hauer 452d96be879SSascha Hauer if (stat & STATUS_TIME_OUT_RESP) { 453d96be879SSascha Hauer dev_dbg(mmc_dev(host->mmc), "CMD TIMEOUT\n"); 454d96be879SSascha Hauer cmd->error = -ETIMEDOUT; 455d96be879SSascha Hauer } else if (stat & STATUS_RESP_CRC_ERR && cmd->flags & MMC_RSP_CRC) { 456d96be879SSascha Hauer dev_dbg(mmc_dev(host->mmc), "cmd crc error\n"); 457d96be879SSascha Hauer cmd->error = -EILSEQ; 458d96be879SSascha Hauer } 459d96be879SSascha Hauer 460d96be879SSascha Hauer if (cmd->flags & MMC_RSP_PRESENT) { 461d96be879SSascha Hauer if (cmd->flags & MMC_RSP_136) { 462d96be879SSascha Hauer for (i = 0; i < 4; i++) { 463d96be879SSascha Hauer a = readw(host->base + MMC_REG_RES_FIFO); 464d96be879SSascha Hauer b = readw(host->base + MMC_REG_RES_FIFO); 465d96be879SSascha Hauer cmd->resp[i] = a << 16 | b; 466d96be879SSascha Hauer } 467d96be879SSascha Hauer } else { 468d96be879SSascha Hauer a = readw(host->base + MMC_REG_RES_FIFO); 469d96be879SSascha Hauer b = readw(host->base + MMC_REG_RES_FIFO); 470d96be879SSascha Hauer c = readw(host->base + MMC_REG_RES_FIFO); 471d96be879SSascha Hauer cmd->resp[0] = a << 24 | b << 8 | c >> 8; 472d96be879SSascha Hauer } 473d96be879SSascha Hauer } 474d96be879SSascha Hauer } 475d96be879SSascha Hauer 476d96be879SSascha Hauer static int mxcmci_poll_status(struct mxcmci_host *host, u32 mask) 477d96be879SSascha Hauer { 478d96be879SSascha Hauer u32 stat; 479d96be879SSascha Hauer unsigned long timeout = jiffies + HZ; 480d96be879SSascha Hauer 481d96be879SSascha Hauer do { 482d96be879SSascha Hauer stat = readl(host->base + MMC_REG_STATUS); 483d96be879SSascha Hauer if (stat & STATUS_ERR_MASK) 484d96be879SSascha Hauer return stat; 48518489fa2SMartin Fuzzey if (time_after(jiffies, timeout)) { 48618489fa2SMartin Fuzzey mxcmci_softreset(host); 48718489fa2SMartin Fuzzey mxcmci_set_clk_rate(host, host->clock); 488d96be879SSascha Hauer return STATUS_TIME_OUT_READ; 48918489fa2SMartin Fuzzey } 490d96be879SSascha Hauer if (stat & mask) 491d96be879SSascha Hauer return 0; 492d96be879SSascha Hauer cpu_relax(); 493d96be879SSascha Hauer } while (1); 494d96be879SSascha Hauer } 495d96be879SSascha Hauer 496d96be879SSascha Hauer static int mxcmci_pull(struct mxcmci_host *host, void *_buf, int bytes) 497d96be879SSascha Hauer { 498d96be879SSascha Hauer unsigned int stat; 499d96be879SSascha Hauer u32 *buf = _buf; 500d96be879SSascha Hauer 501d96be879SSascha Hauer while (bytes > 3) { 502d96be879SSascha Hauer stat = mxcmci_poll_status(host, 503d96be879SSascha Hauer STATUS_BUF_READ_RDY | STATUS_READ_OP_DONE); 504d96be879SSascha Hauer if (stat) 505d96be879SSascha Hauer return stat; 506d96be879SSascha Hauer *buf++ = readl(host->base + MMC_REG_BUFFER_ACCESS); 507d96be879SSascha Hauer bytes -= 4; 508d96be879SSascha Hauer } 509d96be879SSascha Hauer 510d96be879SSascha Hauer if (bytes) { 511d96be879SSascha Hauer u8 *b = (u8 *)buf; 512d96be879SSascha Hauer u32 tmp; 513d96be879SSascha Hauer 514d96be879SSascha Hauer stat = mxcmci_poll_status(host, 515d96be879SSascha Hauer STATUS_BUF_READ_RDY | STATUS_READ_OP_DONE); 516d96be879SSascha Hauer if (stat) 517d96be879SSascha Hauer return stat; 518d96be879SSascha Hauer tmp = readl(host->base + MMC_REG_BUFFER_ACCESS); 519d96be879SSascha Hauer memcpy(b, &tmp, bytes); 520d96be879SSascha Hauer } 521d96be879SSascha Hauer 522d96be879SSascha Hauer return 0; 523d96be879SSascha Hauer } 524d96be879SSascha Hauer 525d96be879SSascha Hauer static int mxcmci_push(struct mxcmci_host *host, void *_buf, int bytes) 526d96be879SSascha Hauer { 527d96be879SSascha Hauer unsigned int stat; 528d96be879SSascha Hauer u32 *buf = _buf; 529d96be879SSascha Hauer 530d96be879SSascha Hauer while (bytes > 3) { 531d96be879SSascha Hauer stat = mxcmci_poll_status(host, STATUS_BUF_WRITE_RDY); 532d96be879SSascha Hauer if (stat) 533d96be879SSascha Hauer return stat; 534d96be879SSascha Hauer writel(*buf++, host->base + MMC_REG_BUFFER_ACCESS); 535d96be879SSascha Hauer bytes -= 4; 536d96be879SSascha Hauer } 537d96be879SSascha Hauer 538d96be879SSascha Hauer if (bytes) { 539d96be879SSascha Hauer u8 *b = (u8 *)buf; 540d96be879SSascha Hauer u32 tmp; 541d96be879SSascha Hauer 542d96be879SSascha Hauer stat = mxcmci_poll_status(host, STATUS_BUF_WRITE_RDY); 543d96be879SSascha Hauer if (stat) 544d96be879SSascha Hauer return stat; 545d96be879SSascha Hauer 546d96be879SSascha Hauer memcpy(&tmp, b, bytes); 547d96be879SSascha Hauer writel(tmp, host->base + MMC_REG_BUFFER_ACCESS); 548d96be879SSascha Hauer } 549d96be879SSascha Hauer 550d96be879SSascha Hauer stat = mxcmci_poll_status(host, STATUS_BUF_WRITE_RDY); 551d96be879SSascha Hauer if (stat) 552d96be879SSascha Hauer return stat; 553d96be879SSascha Hauer 554d96be879SSascha Hauer return 0; 555d96be879SSascha Hauer } 556d96be879SSascha Hauer 557d96be879SSascha Hauer static int mxcmci_transfer_data(struct mxcmci_host *host) 558d96be879SSascha Hauer { 559d96be879SSascha Hauer struct mmc_data *data = host->req->data; 560d96be879SSascha Hauer struct scatterlist *sg; 561d96be879SSascha Hauer int stat, i; 562d96be879SSascha Hauer 563d96be879SSascha Hauer host->data = data; 564d96be879SSascha Hauer host->datasize = 0; 565d96be879SSascha Hauer 566d96be879SSascha Hauer if (data->flags & MMC_DATA_READ) { 567d96be879SSascha Hauer for_each_sg(data->sg, sg, data->sg_len, i) { 568d96be879SSascha Hauer stat = mxcmci_pull(host, sg_virt(sg), sg->length); 569d96be879SSascha Hauer if (stat) 570d96be879SSascha Hauer return stat; 571d96be879SSascha Hauer host->datasize += sg->length; 572d96be879SSascha Hauer } 573d96be879SSascha Hauer } else { 574d96be879SSascha Hauer for_each_sg(data->sg, sg, data->sg_len, i) { 575d96be879SSascha Hauer stat = mxcmci_push(host, sg_virt(sg), sg->length); 576d96be879SSascha Hauer if (stat) 577d96be879SSascha Hauer return stat; 578d96be879SSascha Hauer host->datasize += sg->length; 579d96be879SSascha Hauer } 580d96be879SSascha Hauer stat = mxcmci_poll_status(host, STATUS_WRITE_OP_DONE); 581d96be879SSascha Hauer if (stat) 582d96be879SSascha Hauer return stat; 583d96be879SSascha Hauer } 584d96be879SSascha Hauer return 0; 585d96be879SSascha Hauer } 586d96be879SSascha Hauer 587d96be879SSascha Hauer static void mxcmci_datawork(struct work_struct *work) 588d96be879SSascha Hauer { 589d96be879SSascha Hauer struct mxcmci_host *host = container_of(work, struct mxcmci_host, 590d96be879SSascha Hauer datawork); 591d96be879SSascha Hauer int datastat = mxcmci_transfer_data(host); 5924a31f2efSDaniel Mack 5934a31f2efSDaniel Mack writel(STATUS_READ_OP_DONE | STATUS_WRITE_OP_DONE, 5944a31f2efSDaniel Mack host->base + MMC_REG_STATUS); 595d96be879SSascha Hauer mxcmci_finish_data(host, datastat); 596d96be879SSascha Hauer 597d96be879SSascha Hauer if (host->req->stop) { 598d96be879SSascha Hauer if (mxcmci_start_cmd(host, host->req->stop, 0)) { 599d96be879SSascha Hauer mxcmci_finish_request(host, host->req); 600d96be879SSascha Hauer return; 601d96be879SSascha Hauer } 602d96be879SSascha Hauer } else { 603d96be879SSascha Hauer mxcmci_finish_request(host, host->req); 604d96be879SSascha Hauer } 605d96be879SSascha Hauer } 606d96be879SSascha Hauer 607d96be879SSascha Hauer static void mxcmci_data_done(struct mxcmci_host *host, unsigned int stat) 608d96be879SSascha Hauer { 609d96be879SSascha Hauer struct mmc_data *data = host->data; 610d96be879SSascha Hauer int data_error; 611d96be879SSascha Hauer 612d96be879SSascha Hauer if (!data) 613d96be879SSascha Hauer return; 614d96be879SSascha Hauer 615d96be879SSascha Hauer data_error = mxcmci_finish_data(host, stat); 616d96be879SSascha Hauer 617d96be879SSascha Hauer mxcmci_read_response(host, stat); 618d96be879SSascha Hauer host->cmd = NULL; 619d96be879SSascha Hauer 620d96be879SSascha Hauer if (host->req->stop) { 621d96be879SSascha Hauer if (mxcmci_start_cmd(host, host->req->stop, 0)) { 622d96be879SSascha Hauer mxcmci_finish_request(host, host->req); 623d96be879SSascha Hauer return; 624d96be879SSascha Hauer } 625d96be879SSascha Hauer } else { 626d96be879SSascha Hauer mxcmci_finish_request(host, host->req); 627d96be879SSascha Hauer } 628d96be879SSascha Hauer } 629d96be879SSascha Hauer 630d96be879SSascha Hauer static void mxcmci_cmd_done(struct mxcmci_host *host, unsigned int stat) 631d96be879SSascha Hauer { 632d96be879SSascha Hauer mxcmci_read_response(host, stat); 633d96be879SSascha Hauer host->cmd = NULL; 634d96be879SSascha Hauer 635d96be879SSascha Hauer if (!host->data && host->req) { 636d96be879SSascha Hauer mxcmci_finish_request(host, host->req); 637d96be879SSascha Hauer return; 638d96be879SSascha Hauer } 639d96be879SSascha Hauer 640d96be879SSascha Hauer /* For the DMA case the DMA engine handles the data transfer 641fd589a8fSAnand Gadiyar * automatically. For non DMA we have to do it ourselves. 642d96be879SSascha Hauer * Don't do it in interrupt context though. 643d96be879SSascha Hauer */ 644d96be879SSascha Hauer if (!mxcmci_use_dma(host) && host->data) 645d96be879SSascha Hauer schedule_work(&host->datawork); 646d96be879SSascha Hauer 647d96be879SSascha Hauer } 648d96be879SSascha Hauer 649d96be879SSascha Hauer static irqreturn_t mxcmci_irq(int irq, void *devid) 650d96be879SSascha Hauer { 651d96be879SSascha Hauer struct mxcmci_host *host = devid; 652f441b993SDaniel Mack unsigned long flags; 653f441b993SDaniel Mack bool sdio_irq; 654d96be879SSascha Hauer u32 stat; 655d96be879SSascha Hauer 656d96be879SSascha Hauer stat = readl(host->base + MMC_REG_STATUS); 6574a31f2efSDaniel Mack writel(stat & ~(STATUS_SDIO_INT_ACTIVE | STATUS_DATA_TRANS_DONE | 6584a31f2efSDaniel Mack STATUS_WRITE_OP_DONE), host->base + MMC_REG_STATUS); 659d96be879SSascha Hauer 660d96be879SSascha Hauer dev_dbg(mmc_dev(host->mmc), "%s: 0x%08x\n", __func__, stat); 661d96be879SSascha Hauer 662f441b993SDaniel Mack spin_lock_irqsave(&host->lock, flags); 663f441b993SDaniel Mack sdio_irq = (stat & STATUS_SDIO_INT_ACTIVE) && host->use_sdio; 664f441b993SDaniel Mack spin_unlock_irqrestore(&host->lock, flags); 665f441b993SDaniel Mack 6664a31f2efSDaniel Mack if (mxcmci_use_dma(host) && 6674a31f2efSDaniel Mack (stat & (STATUS_READ_OP_DONE | STATUS_WRITE_OP_DONE))) 6684a31f2efSDaniel Mack writel(STATUS_READ_OP_DONE | STATUS_WRITE_OP_DONE, 6694a31f2efSDaniel Mack host->base + MMC_REG_STATUS); 6704a31f2efSDaniel Mack 671f441b993SDaniel Mack if (sdio_irq) { 672f441b993SDaniel Mack writel(STATUS_SDIO_INT_ACTIVE, host->base + MMC_REG_STATUS); 673f441b993SDaniel Mack mmc_signal_sdio_irq(host->mmc); 674f441b993SDaniel Mack } 675f441b993SDaniel Mack 676d96be879SSascha Hauer if (stat & STATUS_END_CMD_RESP) 677d96be879SSascha Hauer mxcmci_cmd_done(host, stat); 678f441b993SDaniel Mack 679d96be879SSascha Hauer if (mxcmci_use_dma(host) && 680f6ad0a48SJavier Martin (stat & (STATUS_DATA_TRANS_DONE | STATUS_WRITE_OP_DONE))) { 681f6ad0a48SJavier Martin del_timer(&host->watchdog); 682d96be879SSascha Hauer mxcmci_data_done(host, stat); 683f6ad0a48SJavier Martin } 684f53fbde4SSascha Hauer 68516b3bf8cSEric Bénard if (host->default_irq_mask && 68616b3bf8cSEric Bénard (stat & (STATUS_CARD_INSERTION | STATUS_CARD_REMOVAL))) 68716b3bf8cSEric Bénard mmc_detect_change(host->mmc, msecs_to_jiffies(200)); 688f53fbde4SSascha Hauer 689d96be879SSascha Hauer return IRQ_HANDLED; 690d96be879SSascha Hauer } 691d96be879SSascha Hauer 692d96be879SSascha Hauer static void mxcmci_request(struct mmc_host *mmc, struct mmc_request *req) 693d96be879SSascha Hauer { 694d96be879SSascha Hauer struct mxcmci_host *host = mmc_priv(mmc); 695d96be879SSascha Hauer unsigned int cmdat = host->cmdat; 696656217d2SMartin Fuzzey int error; 697d96be879SSascha Hauer 698d96be879SSascha Hauer WARN_ON(host->req != NULL); 699d96be879SSascha Hauer 700d96be879SSascha Hauer host->req = req; 701d96be879SSascha Hauer host->cmdat &= ~CMD_DAT_CONT_INIT; 702f53fbde4SSascha Hauer 703f53fbde4SSascha Hauer if (host->dma) 704d96be879SSascha Hauer host->do_dma = 1; 705f53fbde4SSascha Hauer 706d96be879SSascha Hauer if (req->data) { 707656217d2SMartin Fuzzey error = mxcmci_setup_data(host, req->data); 708656217d2SMartin Fuzzey if (error) { 709656217d2SMartin Fuzzey req->cmd->error = error; 710656217d2SMartin Fuzzey goto out; 711656217d2SMartin Fuzzey } 712656217d2SMartin Fuzzey 713d96be879SSascha Hauer 714d96be879SSascha Hauer cmdat |= CMD_DAT_CONT_DATA_ENABLE; 715d96be879SSascha Hauer 716d96be879SSascha Hauer if (req->data->flags & MMC_DATA_WRITE) 717d96be879SSascha Hauer cmdat |= CMD_DAT_CONT_WRITE; 718d96be879SSascha Hauer } 719d96be879SSascha Hauer 720656217d2SMartin Fuzzey error = mxcmci_start_cmd(host, req->cmd, cmdat); 721f53fbde4SSascha Hauer 722656217d2SMartin Fuzzey out: 723656217d2SMartin Fuzzey if (error) 724d96be879SSascha Hauer mxcmci_finish_request(host, req); 725d96be879SSascha Hauer } 726d96be879SSascha Hauer 727d96be879SSascha Hauer static void mxcmci_set_clk_rate(struct mxcmci_host *host, unsigned int clk_ios) 728d96be879SSascha Hauer { 729d96be879SSascha Hauer unsigned int divider; 730d96be879SSascha Hauer int prescaler = 0; 731529aa29eSSascha Hauer unsigned int clk_in = clk_get_rate(host->clk_per); 732d96be879SSascha Hauer 733d96be879SSascha Hauer while (prescaler <= 0x800) { 734d96be879SSascha Hauer for (divider = 1; divider <= 0xF; divider++) { 735d96be879SSascha Hauer int x; 736d96be879SSascha Hauer 737d96be879SSascha Hauer x = (clk_in / (divider + 1)); 738d96be879SSascha Hauer 739d96be879SSascha Hauer if (prescaler) 740d96be879SSascha Hauer x /= (prescaler * 2); 741d96be879SSascha Hauer 742d96be879SSascha Hauer if (x <= clk_ios) 743d96be879SSascha Hauer break; 744d96be879SSascha Hauer } 745d96be879SSascha Hauer if (divider < 0x10) 746d96be879SSascha Hauer break; 747d96be879SSascha Hauer 748d96be879SSascha Hauer if (prescaler == 0) 749d96be879SSascha Hauer prescaler = 1; 750d96be879SSascha Hauer else 751d96be879SSascha Hauer prescaler <<= 1; 752d96be879SSascha Hauer } 753d96be879SSascha Hauer 754d96be879SSascha Hauer writew((prescaler << 4) | divider, host->base + MMC_REG_CLK_RATE); 755d96be879SSascha Hauer 756d96be879SSascha Hauer dev_dbg(mmc_dev(host->mmc), "scaler: %d divider: %d in: %d out: %d\n", 757d96be879SSascha Hauer prescaler, divider, clk_in, clk_ios); 758d96be879SSascha Hauer } 759d96be879SSascha Hauer 760f53fbde4SSascha Hauer static int mxcmci_setup_dma(struct mmc_host *mmc) 761f53fbde4SSascha Hauer { 762f53fbde4SSascha Hauer struct mxcmci_host *host = mmc_priv(mmc); 763f53fbde4SSascha Hauer struct dma_slave_config *config = &host->dma_slave_config; 764f53fbde4SSascha Hauer 765f53fbde4SSascha Hauer config->dst_addr = host->res->start + MMC_REG_BUFFER_ACCESS; 766f53fbde4SSascha Hauer config->src_addr = host->res->start + MMC_REG_BUFFER_ACCESS; 767f53fbde4SSascha Hauer config->dst_addr_width = 4; 768f53fbde4SSascha Hauer config->src_addr_width = 4; 769f53fbde4SSascha Hauer config->dst_maxburst = host->burstlen; 770f53fbde4SSascha Hauer config->src_maxburst = host->burstlen; 771258aea76SViresh Kumar config->device_fc = false; 772f53fbde4SSascha Hauer 773f53fbde4SSascha Hauer return dmaengine_slave_config(host->dma, config); 774f53fbde4SSascha Hauer } 775f53fbde4SSascha Hauer 776d96be879SSascha Hauer static void mxcmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 777d96be879SSascha Hauer { 778d96be879SSascha Hauer struct mxcmci_host *host = mmc_priv(mmc); 779f53fbde4SSascha Hauer int burstlen, ret; 780f53fbde4SSascha Hauer 781d96be879SSascha Hauer /* 7826584cb88SSascha Hauer * use burstlen of 64 (16 words) in 4 bit mode (--> reg value 0) 7836584cb88SSascha Hauer * use burstlen of 16 (4 words) in 1 bit mode (--> reg value 16) 784d96be879SSascha Hauer */ 785d96be879SSascha Hauer if (ios->bus_width == MMC_BUS_WIDTH_4) 786f53fbde4SSascha Hauer burstlen = 16; 7876584cb88SSascha Hauer else 7886584cb88SSascha Hauer burstlen = 4; 789d96be879SSascha Hauer 790f53fbde4SSascha Hauer if (mxcmci_use_dma(host) && burstlen != host->burstlen) { 791f53fbde4SSascha Hauer host->burstlen = burstlen; 792f53fbde4SSascha Hauer ret = mxcmci_setup_dma(mmc); 793f53fbde4SSascha Hauer if (ret) { 794f53fbde4SSascha Hauer dev_err(mmc_dev(host->mmc), 795f53fbde4SSascha Hauer "failed to config DMA channel. Falling back to PIO\n"); 796f53fbde4SSascha Hauer dma_release_channel(host->dma); 797f53fbde4SSascha Hauer host->do_dma = 0; 798e58f516fSSascha Hauer host->dma = NULL; 799f53fbde4SSascha Hauer } 800f53fbde4SSascha Hauer } 801f53fbde4SSascha Hauer 802d96be879SSascha Hauer if (ios->bus_width == MMC_BUS_WIDTH_4) 803d96be879SSascha Hauer host->cmdat |= CMD_DAT_CONT_BUS_WIDTH_4; 804d96be879SSascha Hauer else 805d96be879SSascha Hauer host->cmdat &= ~CMD_DAT_CONT_BUS_WIDTH_4; 806d96be879SSascha Hauer 807d96be879SSascha Hauer if (host->power_mode != ios->power_mode) { 808d078d242SAlberto Panizzo mxcmci_set_power(host, ios->power_mode, ios->vdd); 809d96be879SSascha Hauer host->power_mode = ios->power_mode; 81074b66954SAlberto Panizzo 811d96be879SSascha Hauer if (ios->power_mode == MMC_POWER_ON) 812d96be879SSascha Hauer host->cmdat |= CMD_DAT_CONT_INIT; 813d96be879SSascha Hauer } 814d96be879SSascha Hauer 815d96be879SSascha Hauer if (ios->clock) { 816d96be879SSascha Hauer mxcmci_set_clk_rate(host, ios->clock); 817d96be879SSascha Hauer writew(STR_STP_CLK_START_CLK, host->base + MMC_REG_STR_STP_CLK); 818d96be879SSascha Hauer } else { 819d96be879SSascha Hauer writew(STR_STP_CLK_STOP_CLK, host->base + MMC_REG_STR_STP_CLK); 820d96be879SSascha Hauer } 821d96be879SSascha Hauer 822d96be879SSascha Hauer host->clock = ios->clock; 823d96be879SSascha Hauer } 824d96be879SSascha Hauer 825d96be879SSascha Hauer static irqreturn_t mxcmci_detect_irq(int irq, void *data) 826d96be879SSascha Hauer { 827d96be879SSascha Hauer struct mmc_host *mmc = data; 828d96be879SSascha Hauer 829d96be879SSascha Hauer dev_dbg(mmc_dev(mmc), "%s\n", __func__); 830d96be879SSascha Hauer 831d96be879SSascha Hauer mmc_detect_change(mmc, msecs_to_jiffies(250)); 832d96be879SSascha Hauer return IRQ_HANDLED; 833d96be879SSascha Hauer } 834d96be879SSascha Hauer 835d96be879SSascha Hauer static int mxcmci_get_ro(struct mmc_host *mmc) 836d96be879SSascha Hauer { 837d96be879SSascha Hauer struct mxcmci_host *host = mmc_priv(mmc); 838d96be879SSascha Hauer 839d96be879SSascha Hauer if (host->pdata && host->pdata->get_ro) 840d96be879SSascha Hauer return !!host->pdata->get_ro(mmc_dev(mmc)); 841d96be879SSascha Hauer /* 842d96be879SSascha Hauer * Board doesn't support read only detection; let the mmc core 843d96be879SSascha Hauer * decide what to do. 844d96be879SSascha Hauer */ 845d96be879SSascha Hauer return -ENOSYS; 846d96be879SSascha Hauer } 847d96be879SSascha Hauer 848f441b993SDaniel Mack static void mxcmci_enable_sdio_irq(struct mmc_host *mmc, int enable) 849f441b993SDaniel Mack { 850f441b993SDaniel Mack struct mxcmci_host *host = mmc_priv(mmc); 851f441b993SDaniel Mack unsigned long flags; 852f441b993SDaniel Mack u32 int_cntr; 853f441b993SDaniel Mack 854f441b993SDaniel Mack spin_lock_irqsave(&host->lock, flags); 855f441b993SDaniel Mack host->use_sdio = enable; 856f441b993SDaniel Mack int_cntr = readl(host->base + MMC_REG_INT_CNTR); 857f441b993SDaniel Mack 858f441b993SDaniel Mack if (enable) 859f441b993SDaniel Mack int_cntr |= INT_SDIO_IRQ_EN; 860f441b993SDaniel Mack else 861f441b993SDaniel Mack int_cntr &= ~INT_SDIO_IRQ_EN; 862f441b993SDaniel Mack 863f441b993SDaniel Mack writel(int_cntr, host->base + MMC_REG_INT_CNTR); 864f441b993SDaniel Mack spin_unlock_irqrestore(&host->lock, flags); 865f441b993SDaniel Mack } 866d96be879SSascha Hauer 8673fcb027dSDaniel Mack static void mxcmci_init_card(struct mmc_host *host, struct mmc_card *card) 8683fcb027dSDaniel Mack { 8697f917a8dSShawn Guo struct mxcmci_host *mxcmci = mmc_priv(host); 8707f917a8dSShawn Guo 8713fcb027dSDaniel Mack /* 8723fcb027dSDaniel Mack * MX3 SoCs have a silicon bug which corrupts CRC calculation of 8733fcb027dSDaniel Mack * multi-block transfers when connected SDIO peripheral doesn't 8743fcb027dSDaniel Mack * drive the BUSY line as required by the specs. 8753fcb027dSDaniel Mack * One way to prevent this is to only allow 1-bit transfers. 8763fcb027dSDaniel Mack */ 8773fcb027dSDaniel Mack 8787f917a8dSShawn Guo if (is_imx31_mmc(mxcmci) && card->type == MMC_TYPE_SDIO) 8793fcb027dSDaniel Mack host->caps &= ~MMC_CAP_4_BIT_DATA; 8803fcb027dSDaniel Mack else 8813fcb027dSDaniel Mack host->caps |= MMC_CAP_4_BIT_DATA; 8823fcb027dSDaniel Mack } 8833fcb027dSDaniel Mack 884f53fbde4SSascha Hauer static bool filter(struct dma_chan *chan, void *param) 885f53fbde4SSascha Hauer { 886f53fbde4SSascha Hauer struct mxcmci_host *host = param; 887f53fbde4SSascha Hauer 888f53fbde4SSascha Hauer if (!imx_dma_is_general_purpose(chan)) 889f53fbde4SSascha Hauer return false; 890f53fbde4SSascha Hauer 891f53fbde4SSascha Hauer chan->private = &host->dma_data; 892f53fbde4SSascha Hauer 893f53fbde4SSascha Hauer return true; 894f53fbde4SSascha Hauer } 895f53fbde4SSascha Hauer 896f6ad0a48SJavier Martin static void mxcmci_watchdog(unsigned long data) 897f6ad0a48SJavier Martin { 898f6ad0a48SJavier Martin struct mmc_host *mmc = (struct mmc_host *)data; 899f6ad0a48SJavier Martin struct mxcmci_host *host = mmc_priv(mmc); 900f6ad0a48SJavier Martin struct mmc_request *req = host->req; 901f6ad0a48SJavier Martin unsigned int stat = readl(host->base + MMC_REG_STATUS); 902f6ad0a48SJavier Martin 903f6ad0a48SJavier Martin if (host->dma_dir == DMA_FROM_DEVICE) { 904f6ad0a48SJavier Martin dmaengine_terminate_all(host->dma); 905f6ad0a48SJavier Martin dev_err(mmc_dev(host->mmc), 906f6ad0a48SJavier Martin "%s: read time out (status = 0x%08x)\n", 907f6ad0a48SJavier Martin __func__, stat); 908f6ad0a48SJavier Martin } else { 909f6ad0a48SJavier Martin dev_err(mmc_dev(host->mmc), 910f6ad0a48SJavier Martin "%s: write time out (status = 0x%08x)\n", 911f6ad0a48SJavier Martin __func__, stat); 912f6ad0a48SJavier Martin mxcmci_softreset(host); 913f6ad0a48SJavier Martin } 914f6ad0a48SJavier Martin 915f6ad0a48SJavier Martin /* Mark transfer as erroneus and inform the upper layers */ 916f6ad0a48SJavier Martin 917f6ad0a48SJavier Martin host->data->error = -ETIMEDOUT; 918f6ad0a48SJavier Martin host->req = NULL; 919f6ad0a48SJavier Martin host->cmd = NULL; 920f6ad0a48SJavier Martin host->data = NULL; 921f6ad0a48SJavier Martin mmc_request_done(host->mmc, req); 922f6ad0a48SJavier Martin } 923f6ad0a48SJavier Martin 924d96be879SSascha Hauer static const struct mmc_host_ops mxcmci_ops = { 925d96be879SSascha Hauer .request = mxcmci_request, 926d96be879SSascha Hauer .set_ios = mxcmci_set_ios, 927d96be879SSascha Hauer .get_ro = mxcmci_get_ro, 928f441b993SDaniel Mack .enable_sdio_irq = mxcmci_enable_sdio_irq, 9293fcb027dSDaniel Mack .init_card = mxcmci_init_card, 930d96be879SSascha Hauer }; 931d96be879SSascha Hauer 932d96be879SSascha Hauer static int mxcmci_probe(struct platform_device *pdev) 933d96be879SSascha Hauer { 934d96be879SSascha Hauer struct mmc_host *mmc; 935d96be879SSascha Hauer struct mxcmci_host *host = NULL; 936c0521bafSUwe Kleine-König struct resource *iores, *r; 937d96be879SSascha Hauer int ret = 0, irq; 938f53fbde4SSascha Hauer dma_cap_mask_t mask; 939d96be879SSascha Hauer 940a3c76eb9SGirish K S pr_info("i.MX SDHC driver\n"); 941d96be879SSascha Hauer 942c0521bafSUwe Kleine-König iores = platform_get_resource(pdev, IORESOURCE_MEM, 0); 943d96be879SSascha Hauer irq = platform_get_irq(pdev, 0); 944c0521bafSUwe Kleine-König if (!iores || irq < 0) 945d96be879SSascha Hauer return -EINVAL; 946d96be879SSascha Hauer 947c0521bafSUwe Kleine-König r = request_mem_region(iores->start, resource_size(iores), pdev->name); 948d96be879SSascha Hauer if (!r) 949d96be879SSascha Hauer return -EBUSY; 950d96be879SSascha Hauer 951d96be879SSascha Hauer mmc = mmc_alloc_host(sizeof(struct mxcmci_host), &pdev->dev); 952d96be879SSascha Hauer if (!mmc) { 953d96be879SSascha Hauer ret = -ENOMEM; 954d96be879SSascha Hauer goto out_release_mem; 955d96be879SSascha Hauer } 956d96be879SSascha Hauer 957d96be879SSascha Hauer mmc->ops = &mxcmci_ops; 958f441b993SDaniel Mack mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ; 959d96be879SSascha Hauer 960d96be879SSascha Hauer /* MMC core transfer sizes tunable parameters */ 961a36274e0SMartin K. Petersen mmc->max_segs = 64; 962d96be879SSascha Hauer mmc->max_blk_size = 2048; 963d96be879SSascha Hauer mmc->max_blk_count = 65535; 964d96be879SSascha Hauer mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; 965d759c374SVladimir Zapolskiy mmc->max_seg_size = mmc->max_req_size; 966d96be879SSascha Hauer 967d96be879SSascha Hauer host = mmc_priv(mmc); 968d96be879SSascha Hauer host->base = ioremap(r->start, resource_size(r)); 969d96be879SSascha Hauer if (!host->base) { 970d96be879SSascha Hauer ret = -ENOMEM; 971d96be879SSascha Hauer goto out_free; 972d96be879SSascha Hauer } 973d96be879SSascha Hauer 974d96be879SSascha Hauer host->mmc = mmc; 975d96be879SSascha Hauer host->pdata = pdev->dev.platform_data; 9767f917a8dSShawn Guo host->devtype = pdev->id_entry->driver_data; 977f441b993SDaniel Mack spin_lock_init(&host->lock); 978d96be879SSascha Hauer 97974b66954SAlberto Panizzo mxcmci_init_ocr(host); 980d96be879SSascha Hauer 98116b3bf8cSEric Bénard if (host->pdata && host->pdata->dat3_card_detect) 98216b3bf8cSEric Bénard host->default_irq_mask = 98316b3bf8cSEric Bénard INT_CARD_INSERTION_EN | INT_CARD_REMOVAL_EN; 98416b3bf8cSEric Bénard else 98516b3bf8cSEric Bénard host->default_irq_mask = 0; 98616b3bf8cSEric Bénard 987d96be879SSascha Hauer host->res = r; 988d96be879SSascha Hauer host->irq = irq; 989d96be879SSascha Hauer 990529aa29eSSascha Hauer host->clk_ipg = devm_clk_get(&pdev->dev, "ipg"); 991529aa29eSSascha Hauer if (IS_ERR(host->clk_ipg)) { 992529aa29eSSascha Hauer ret = PTR_ERR(host->clk_ipg); 993d96be879SSascha Hauer goto out_iounmap; 994d96be879SSascha Hauer } 995529aa29eSSascha Hauer 996529aa29eSSascha Hauer host->clk_per = devm_clk_get(&pdev->dev, "per"); 997529aa29eSSascha Hauer if (IS_ERR(host->clk_per)) { 998529aa29eSSascha Hauer ret = PTR_ERR(host->clk_per); 999529aa29eSSascha Hauer goto out_iounmap; 1000529aa29eSSascha Hauer } 1001529aa29eSSascha Hauer 1002529aa29eSSascha Hauer clk_prepare_enable(host->clk_per); 1003529aa29eSSascha Hauer clk_prepare_enable(host->clk_ipg); 1004d96be879SSascha Hauer 1005d96be879SSascha Hauer mxcmci_softreset(host); 1006d96be879SSascha Hauer 1007d96be879SSascha Hauer host->rev_no = readw(host->base + MMC_REG_REV_NO); 1008d96be879SSascha Hauer if (host->rev_no != 0x400) { 1009d96be879SSascha Hauer ret = -ENODEV; 1010d96be879SSascha Hauer dev_err(mmc_dev(host->mmc), "wrong rev.no. 0x%08x. aborting.\n", 1011d96be879SSascha Hauer host->rev_no); 1012d96be879SSascha Hauer goto out_clk_put; 1013d96be879SSascha Hauer } 1014d96be879SSascha Hauer 1015529aa29eSSascha Hauer mmc->f_min = clk_get_rate(host->clk_per) >> 16; 1016529aa29eSSascha Hauer mmc->f_max = clk_get_rate(host->clk_per) >> 1; 1017d96be879SSascha Hauer 1018d96be879SSascha Hauer /* recommended in data sheet */ 1019d96be879SSascha Hauer writew(0x2db4, host->base + MMC_REG_READ_TO); 1020d96be879SSascha Hauer 102116b3bf8cSEric Bénard writel(host->default_irq_mask, host->base + MMC_REG_INT_CNTR); 1022d96be879SSascha Hauer 1023d96be879SSascha Hauer r = platform_get_resource(pdev, IORESOURCE_DMA, 0); 1024f53fbde4SSascha Hauer if (r) { 1025f53fbde4SSascha Hauer host->dmareq = r->start; 1026f53fbde4SSascha Hauer host->dma_data.peripheral_type = IMX_DMATYPE_SDHC; 1027f53fbde4SSascha Hauer host->dma_data.priority = DMA_PRIO_LOW; 1028f53fbde4SSascha Hauer host->dma_data.dma_request = host->dmareq; 1029f53fbde4SSascha Hauer dma_cap_zero(mask); 1030f53fbde4SSascha Hauer dma_cap_set(DMA_SLAVE, mask); 1031f53fbde4SSascha Hauer host->dma = dma_request_channel(mask, filter, host); 1032f53fbde4SSascha Hauer if (host->dma) 1033f53fbde4SSascha Hauer mmc->max_seg_size = dma_get_max_seg_size( 1034f53fbde4SSascha Hauer host->dma->device->dev); 1035d96be879SSascha Hauer } 1036d96be879SSascha Hauer 1037f53fbde4SSascha Hauer if (!host->dma) 1038f53fbde4SSascha Hauer dev_info(mmc_dev(host->mmc), "dma not available. Using PIO\n"); 1039f53fbde4SSascha Hauer 1040d96be879SSascha Hauer INIT_WORK(&host->datawork, mxcmci_datawork); 1041d96be879SSascha Hauer 1042d96be879SSascha Hauer ret = request_irq(host->irq, mxcmci_irq, 0, DRIVER_NAME, host); 1043d96be879SSascha Hauer if (ret) 1044d96be879SSascha Hauer goto out_free_dma; 1045d96be879SSascha Hauer 1046d96be879SSascha Hauer platform_set_drvdata(pdev, mmc); 1047d96be879SSascha Hauer 1048d96be879SSascha Hauer if (host->pdata && host->pdata->init) { 1049d96be879SSascha Hauer ret = host->pdata->init(&pdev->dev, mxcmci_detect_irq, 1050d96be879SSascha Hauer host->mmc); 1051d96be879SSascha Hauer if (ret) 1052d96be879SSascha Hauer goto out_free_irq; 1053d96be879SSascha Hauer } 1054d96be879SSascha Hauer 1055d96be879SSascha Hauer mmc_add_host(mmc); 1056d96be879SSascha Hauer 1057f6ad0a48SJavier Martin init_timer(&host->watchdog); 1058f6ad0a48SJavier Martin host->watchdog.function = &mxcmci_watchdog; 1059f6ad0a48SJavier Martin host->watchdog.data = (unsigned long)mmc; 1060f6ad0a48SJavier Martin 1061d96be879SSascha Hauer return 0; 1062d96be879SSascha Hauer 1063d96be879SSascha Hauer out_free_irq: 1064d96be879SSascha Hauer free_irq(host->irq, host); 1065d96be879SSascha Hauer out_free_dma: 1066f53fbde4SSascha Hauer if (host->dma) 1067f53fbde4SSascha Hauer dma_release_channel(host->dma); 1068d96be879SSascha Hauer out_clk_put: 1069529aa29eSSascha Hauer clk_disable_unprepare(host->clk_per); 1070529aa29eSSascha Hauer clk_disable_unprepare(host->clk_ipg); 1071d96be879SSascha Hauer out_iounmap: 1072d96be879SSascha Hauer iounmap(host->base); 1073d96be879SSascha Hauer out_free: 1074d96be879SSascha Hauer mmc_free_host(mmc); 1075d96be879SSascha Hauer out_release_mem: 1076c0521bafSUwe Kleine-König release_mem_region(iores->start, resource_size(iores)); 1077d96be879SSascha Hauer return ret; 1078d96be879SSascha Hauer } 1079d96be879SSascha Hauer 1080d96be879SSascha Hauer static int mxcmci_remove(struct platform_device *pdev) 1081d96be879SSascha Hauer { 1082d96be879SSascha Hauer struct mmc_host *mmc = platform_get_drvdata(pdev); 1083d96be879SSascha Hauer struct mxcmci_host *host = mmc_priv(mmc); 1084d96be879SSascha Hauer 1085d96be879SSascha Hauer platform_set_drvdata(pdev, NULL); 1086d96be879SSascha Hauer 1087d96be879SSascha Hauer mmc_remove_host(mmc); 1088d96be879SSascha Hauer 108974b66954SAlberto Panizzo if (host->vcc) 109074b66954SAlberto Panizzo regulator_put(host->vcc); 109174b66954SAlberto Panizzo 1092d96be879SSascha Hauer if (host->pdata && host->pdata->exit) 1093d96be879SSascha Hauer host->pdata->exit(&pdev->dev, mmc); 1094d96be879SSascha Hauer 1095d96be879SSascha Hauer free_irq(host->irq, host); 1096d96be879SSascha Hauer iounmap(host->base); 1097f53fbde4SSascha Hauer 1098f53fbde4SSascha Hauer if (host->dma) 1099f53fbde4SSascha Hauer dma_release_channel(host->dma); 1100f53fbde4SSascha Hauer 1101529aa29eSSascha Hauer clk_disable_unprepare(host->clk_per); 1102529aa29eSSascha Hauer clk_disable_unprepare(host->clk_ipg); 1103d96be879SSascha Hauer 1104d96be879SSascha Hauer release_mem_region(host->res->start, resource_size(host->res)); 1105d96be879SSascha Hauer 1106d96be879SSascha Hauer mmc_free_host(mmc); 1107d96be879SSascha Hauer 1108d96be879SSascha Hauer return 0; 1109d96be879SSascha Hauer } 1110d96be879SSascha Hauer 1111d96be879SSascha Hauer #ifdef CONFIG_PM 1112a7d403cfSEric Bénard static int mxcmci_suspend(struct device *dev) 1113d96be879SSascha Hauer { 1114a7d403cfSEric Bénard struct mmc_host *mmc = dev_get_drvdata(dev); 1115a7d403cfSEric Bénard struct mxcmci_host *host = mmc_priv(mmc); 1116d96be879SSascha Hauer int ret = 0; 1117d96be879SSascha Hauer 1118d96be879SSascha Hauer if (mmc) 11191a13f8faSMatt Fleming ret = mmc_suspend_host(mmc); 1120529aa29eSSascha Hauer clk_disable_unprepare(host->clk_per); 1121529aa29eSSascha Hauer clk_disable_unprepare(host->clk_ipg); 1122d96be879SSascha Hauer 1123d96be879SSascha Hauer return ret; 1124d96be879SSascha Hauer } 1125d96be879SSascha Hauer 1126a7d403cfSEric Bénard static int mxcmci_resume(struct device *dev) 1127d96be879SSascha Hauer { 1128a7d403cfSEric Bénard struct mmc_host *mmc = dev_get_drvdata(dev); 1129a7d403cfSEric Bénard struct mxcmci_host *host = mmc_priv(mmc); 1130d96be879SSascha Hauer int ret = 0; 1131d96be879SSascha Hauer 1132529aa29eSSascha Hauer clk_prepare_enable(host->clk_per); 1133529aa29eSSascha Hauer clk_prepare_enable(host->clk_ipg); 1134a7d403cfSEric Bénard if (mmc) 1135d96be879SSascha Hauer ret = mmc_resume_host(mmc); 1136d96be879SSascha Hauer 1137d96be879SSascha Hauer return ret; 1138d96be879SSascha Hauer } 1139a7d403cfSEric Bénard 1140a7d403cfSEric Bénard static const struct dev_pm_ops mxcmci_pm_ops = { 1141a7d403cfSEric Bénard .suspend = mxcmci_suspend, 1142a7d403cfSEric Bénard .resume = mxcmci_resume, 1143a7d403cfSEric Bénard }; 1144a7d403cfSEric Bénard #endif 1145d96be879SSascha Hauer 1146d96be879SSascha Hauer static struct platform_driver mxcmci_driver = { 1147d96be879SSascha Hauer .probe = mxcmci_probe, 1148d96be879SSascha Hauer .remove = mxcmci_remove, 11497f917a8dSShawn Guo .id_table = mxcmci_devtype, 1150d96be879SSascha Hauer .driver = { 1151d96be879SSascha Hauer .name = DRIVER_NAME, 1152d96be879SSascha Hauer .owner = THIS_MODULE, 1153a7d403cfSEric Bénard #ifdef CONFIG_PM 1154a7d403cfSEric Bénard .pm = &mxcmci_pm_ops, 1155a7d403cfSEric Bénard #endif 1156d96be879SSascha Hauer } 1157d96be879SSascha Hauer }; 1158d96be879SSascha Hauer 1159d1f81a64SAxel Lin module_platform_driver(mxcmci_driver); 1160d96be879SSascha Hauer 1161d96be879SSascha Hauer MODULE_DESCRIPTION("i.MX Multimedia Card Interface Driver"); 1162d96be879SSascha Hauer MODULE_AUTHOR("Sascha Hauer, Pengutronix"); 1163d96be879SSascha Hauer MODULE_LICENSE("GPL"); 1164d96be879SSascha Hauer MODULE_ALIAS("platform:imx-mmc"); 1165