1d96be879SSascha Hauer /* 2d96be879SSascha Hauer * linux/drivers/mmc/host/mxcmmc.c - Freescale i.MX MMCI driver 3d96be879SSascha Hauer * 4d96be879SSascha Hauer * This is a driver for the SDHC controller found in Freescale MX2/MX3 5d96be879SSascha Hauer * SoCs. It is basically the same hardware as found on MX1 (imxmmc.c). 6d96be879SSascha Hauer * Unlike the hardware found on MX1, this hardware just works and does 73ad2f3fbSDaniel Mack * not need all the quirks found in imxmmc.c, hence the separate driver. 8d96be879SSascha Hauer * 9d96be879SSascha Hauer * Copyright (C) 2008 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de> 10d96be879SSascha Hauer * Copyright (C) 2006 Pavel Pisa, PiKRON <ppisa@pikron.com> 11d96be879SSascha Hauer * 12d96be879SSascha Hauer * derived from pxamci.c by Russell King 13d96be879SSascha Hauer * 14d96be879SSascha Hauer * This program is free software; you can redistribute it and/or modify 15d96be879SSascha Hauer * it under the terms of the GNU General Public License version 2 as 16d96be879SSascha Hauer * published by the Free Software Foundation. 17d96be879SSascha Hauer * 18d96be879SSascha Hauer */ 19d96be879SSascha Hauer 20d96be879SSascha Hauer #include <linux/module.h> 21d96be879SSascha Hauer #include <linux/init.h> 22d96be879SSascha Hauer #include <linux/ioport.h> 23d96be879SSascha Hauer #include <linux/platform_device.h> 24d96be879SSascha Hauer #include <linux/interrupt.h> 25d96be879SSascha Hauer #include <linux/irq.h> 26d96be879SSascha Hauer #include <linux/blkdev.h> 27d96be879SSascha Hauer #include <linux/dma-mapping.h> 28d96be879SSascha Hauer #include <linux/mmc/host.h> 29d96be879SSascha Hauer #include <linux/mmc/card.h> 30d96be879SSascha Hauer #include <linux/delay.h> 31d96be879SSascha Hauer #include <linux/clk.h> 32d96be879SSascha Hauer #include <linux/io.h> 33d96be879SSascha Hauer #include <linux/gpio.h> 3474b66954SAlberto Panizzo #include <linux/regulator/consumer.h> 35d96be879SSascha Hauer 36d96be879SSascha Hauer #include <asm/dma.h> 37d96be879SSascha Hauer #include <asm/irq.h> 38d96be879SSascha Hauer #include <asm/sizes.h> 39d96be879SSascha Hauer #include <mach/mmc.h> 40d96be879SSascha Hauer 41d96be879SSascha Hauer #ifdef CONFIG_ARCH_MX2 42d96be879SSascha Hauer #include <mach/dma-mx1-mx2.h> 43d96be879SSascha Hauer #define HAS_DMA 44d96be879SSascha Hauer #endif 45d96be879SSascha Hauer 469563b1dbSSascha Hauer #define DRIVER_NAME "mxc-mmc" 47d96be879SSascha Hauer 48d96be879SSascha Hauer #define MMC_REG_STR_STP_CLK 0x00 49d96be879SSascha Hauer #define MMC_REG_STATUS 0x04 50d96be879SSascha Hauer #define MMC_REG_CLK_RATE 0x08 51d96be879SSascha Hauer #define MMC_REG_CMD_DAT_CONT 0x0C 52d96be879SSascha Hauer #define MMC_REG_RES_TO 0x10 53d96be879SSascha Hauer #define MMC_REG_READ_TO 0x14 54d96be879SSascha Hauer #define MMC_REG_BLK_LEN 0x18 55d96be879SSascha Hauer #define MMC_REG_NOB 0x1C 56d96be879SSascha Hauer #define MMC_REG_REV_NO 0x20 57d96be879SSascha Hauer #define MMC_REG_INT_CNTR 0x24 58d96be879SSascha Hauer #define MMC_REG_CMD 0x28 59d96be879SSascha Hauer #define MMC_REG_ARG 0x2C 60d96be879SSascha Hauer #define MMC_REG_RES_FIFO 0x34 61d96be879SSascha Hauer #define MMC_REG_BUFFER_ACCESS 0x38 62d96be879SSascha Hauer 63d96be879SSascha Hauer #define STR_STP_CLK_RESET (1 << 3) 64d96be879SSascha Hauer #define STR_STP_CLK_START_CLK (1 << 1) 65d96be879SSascha Hauer #define STR_STP_CLK_STOP_CLK (1 << 0) 66d96be879SSascha Hauer 67d96be879SSascha Hauer #define STATUS_CARD_INSERTION (1 << 31) 68d96be879SSascha Hauer #define STATUS_CARD_REMOVAL (1 << 30) 69d96be879SSascha Hauer #define STATUS_YBUF_EMPTY (1 << 29) 70d96be879SSascha Hauer #define STATUS_XBUF_EMPTY (1 << 28) 71d96be879SSascha Hauer #define STATUS_YBUF_FULL (1 << 27) 72d96be879SSascha Hauer #define STATUS_XBUF_FULL (1 << 26) 73d96be879SSascha Hauer #define STATUS_BUF_UND_RUN (1 << 25) 74d96be879SSascha Hauer #define STATUS_BUF_OVFL (1 << 24) 75d96be879SSascha Hauer #define STATUS_SDIO_INT_ACTIVE (1 << 14) 76d96be879SSascha Hauer #define STATUS_END_CMD_RESP (1 << 13) 77d96be879SSascha Hauer #define STATUS_WRITE_OP_DONE (1 << 12) 78d96be879SSascha Hauer #define STATUS_DATA_TRANS_DONE (1 << 11) 79d96be879SSascha Hauer #define STATUS_READ_OP_DONE (1 << 11) 80d96be879SSascha Hauer #define STATUS_WR_CRC_ERROR_CODE_MASK (3 << 10) 81d96be879SSascha Hauer #define STATUS_CARD_BUS_CLK_RUN (1 << 8) 82d96be879SSascha Hauer #define STATUS_BUF_READ_RDY (1 << 7) 83d96be879SSascha Hauer #define STATUS_BUF_WRITE_RDY (1 << 6) 84d96be879SSascha Hauer #define STATUS_RESP_CRC_ERR (1 << 5) 85d96be879SSascha Hauer #define STATUS_CRC_READ_ERR (1 << 3) 86d96be879SSascha Hauer #define STATUS_CRC_WRITE_ERR (1 << 2) 87d96be879SSascha Hauer #define STATUS_TIME_OUT_RESP (1 << 1) 88d96be879SSascha Hauer #define STATUS_TIME_OUT_READ (1 << 0) 89d96be879SSascha Hauer #define STATUS_ERR_MASK 0x2f 90d96be879SSascha Hauer 91d96be879SSascha Hauer #define CMD_DAT_CONT_CMD_RESP_LONG_OFF (1 << 12) 92d96be879SSascha Hauer #define CMD_DAT_CONT_STOP_READWAIT (1 << 11) 93d96be879SSascha Hauer #define CMD_DAT_CONT_START_READWAIT (1 << 10) 94d96be879SSascha Hauer #define CMD_DAT_CONT_BUS_WIDTH_4 (2 << 8) 95d96be879SSascha Hauer #define CMD_DAT_CONT_INIT (1 << 7) 96d96be879SSascha Hauer #define CMD_DAT_CONT_WRITE (1 << 4) 97d96be879SSascha Hauer #define CMD_DAT_CONT_DATA_ENABLE (1 << 3) 98d96be879SSascha Hauer #define CMD_DAT_CONT_RESPONSE_48BIT_CRC (1 << 0) 99d96be879SSascha Hauer #define CMD_DAT_CONT_RESPONSE_136BIT (2 << 0) 100d96be879SSascha Hauer #define CMD_DAT_CONT_RESPONSE_48BIT (3 << 0) 101d96be879SSascha Hauer 102d96be879SSascha Hauer #define INT_SDIO_INT_WKP_EN (1 << 18) 103d96be879SSascha Hauer #define INT_CARD_INSERTION_WKP_EN (1 << 17) 104d96be879SSascha Hauer #define INT_CARD_REMOVAL_WKP_EN (1 << 16) 105d96be879SSascha Hauer #define INT_CARD_INSERTION_EN (1 << 15) 106d96be879SSascha Hauer #define INT_CARD_REMOVAL_EN (1 << 14) 107d96be879SSascha Hauer #define INT_SDIO_IRQ_EN (1 << 13) 108d96be879SSascha Hauer #define INT_DAT0_EN (1 << 12) 109d96be879SSascha Hauer #define INT_BUF_READ_EN (1 << 4) 110d96be879SSascha Hauer #define INT_BUF_WRITE_EN (1 << 3) 111d96be879SSascha Hauer #define INT_END_CMD_RES_EN (1 << 2) 112d96be879SSascha Hauer #define INT_WRITE_OP_DONE_EN (1 << 1) 113d96be879SSascha Hauer #define INT_READ_OP_EN (1 << 0) 114d96be879SSascha Hauer 115d96be879SSascha Hauer struct mxcmci_host { 116d96be879SSascha Hauer struct mmc_host *mmc; 117d96be879SSascha Hauer struct resource *res; 118d96be879SSascha Hauer void __iomem *base; 119d96be879SSascha Hauer int irq; 120d96be879SSascha Hauer int detect_irq; 121d96be879SSascha Hauer int dma; 122d96be879SSascha Hauer int do_dma; 12316b3bf8cSEric Bénard int default_irq_mask; 124f441b993SDaniel Mack int use_sdio; 125d96be879SSascha Hauer unsigned int power_mode; 126d96be879SSascha Hauer struct imxmmc_platform_data *pdata; 127d96be879SSascha Hauer 128d96be879SSascha Hauer struct mmc_request *req; 129d96be879SSascha Hauer struct mmc_command *cmd; 130d96be879SSascha Hauer struct mmc_data *data; 131d96be879SSascha Hauer 132d96be879SSascha Hauer unsigned int dma_nents; 133d96be879SSascha Hauer unsigned int datasize; 134d96be879SSascha Hauer unsigned int dma_dir; 135d96be879SSascha Hauer 136d96be879SSascha Hauer u16 rev_no; 137d96be879SSascha Hauer unsigned int cmdat; 138d96be879SSascha Hauer 139d96be879SSascha Hauer struct clk *clk; 140d96be879SSascha Hauer 141d96be879SSascha Hauer int clock; 142d96be879SSascha Hauer 143d96be879SSascha Hauer struct work_struct datawork; 144f441b993SDaniel Mack spinlock_t lock; 14574b66954SAlberto Panizzo 14674b66954SAlberto Panizzo struct regulator *vcc; 147d96be879SSascha Hauer }; 148d96be879SSascha Hauer 14918489fa2SMartin Fuzzey static void mxcmci_set_clk_rate(struct mxcmci_host *host, unsigned int clk_ios); 15018489fa2SMartin Fuzzey 15174b66954SAlberto Panizzo static inline void mxcmci_init_ocr(struct mxcmci_host *host) 15274b66954SAlberto Panizzo { 15374b66954SAlberto Panizzo #ifdef CONFIG_REGULATOR 15474b66954SAlberto Panizzo host->vcc = regulator_get(mmc_dev(host->mmc), "vmmc"); 15574b66954SAlberto Panizzo 15674b66954SAlberto Panizzo if (IS_ERR(host->vcc)) { 15774b66954SAlberto Panizzo host->vcc = NULL; 15874b66954SAlberto Panizzo } else { 15974b66954SAlberto Panizzo host->mmc->ocr_avail = mmc_regulator_get_ocrmask(host->vcc); 16074b66954SAlberto Panizzo if (host->pdata && host->pdata->ocr_avail) 16174b66954SAlberto Panizzo dev_warn(mmc_dev(host->mmc), 16274b66954SAlberto Panizzo "pdata->ocr_avail will not be used\n"); 16374b66954SAlberto Panizzo } 16474b66954SAlberto Panizzo #endif 16574b66954SAlberto Panizzo if (host->vcc == NULL) { 16674b66954SAlberto Panizzo /* fall-back to platform data */ 16774b66954SAlberto Panizzo if (host->pdata && host->pdata->ocr_avail) 16874b66954SAlberto Panizzo host->mmc->ocr_avail = host->pdata->ocr_avail; 16974b66954SAlberto Panizzo else 17074b66954SAlberto Panizzo host->mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; 17174b66954SAlberto Panizzo } 17274b66954SAlberto Panizzo } 17374b66954SAlberto Panizzo 17474b66954SAlberto Panizzo static inline void mxcmci_set_power(struct mxcmci_host *host, unsigned int vdd) 17574b66954SAlberto Panizzo { 17674b66954SAlberto Panizzo #ifdef CONFIG_REGULATOR 17774b66954SAlberto Panizzo if (host->vcc) 17874b66954SAlberto Panizzo mmc_regulator_set_ocr(host->vcc, vdd); 17974b66954SAlberto Panizzo #endif 18074b66954SAlberto Panizzo if (host->pdata && host->pdata->setpower) 18174b66954SAlberto Panizzo host->pdata->setpower(mmc_dev(host->mmc), vdd); 18274b66954SAlberto Panizzo } 18374b66954SAlberto Panizzo 184d96be879SSascha Hauer static inline int mxcmci_use_dma(struct mxcmci_host *host) 185d96be879SSascha Hauer { 186d96be879SSascha Hauer return host->do_dma; 187d96be879SSascha Hauer } 188d96be879SSascha Hauer 189d96be879SSascha Hauer static void mxcmci_softreset(struct mxcmci_host *host) 190d96be879SSascha Hauer { 191d96be879SSascha Hauer int i; 192d96be879SSascha Hauer 1934725f6f1SDaniel Mack dev_dbg(mmc_dev(host->mmc), "mxcmci_softreset\n"); 1944725f6f1SDaniel Mack 195d96be879SSascha Hauer /* reset sequence */ 196d96be879SSascha Hauer writew(STR_STP_CLK_RESET, host->base + MMC_REG_STR_STP_CLK); 197d96be879SSascha Hauer writew(STR_STP_CLK_RESET | STR_STP_CLK_START_CLK, 198d96be879SSascha Hauer host->base + MMC_REG_STR_STP_CLK); 199d96be879SSascha Hauer 200d96be879SSascha Hauer for (i = 0; i < 8; i++) 201d96be879SSascha Hauer writew(STR_STP_CLK_START_CLK, host->base + MMC_REG_STR_STP_CLK); 202d96be879SSascha Hauer 203d96be879SSascha Hauer writew(0xff, host->base + MMC_REG_RES_TO); 204d96be879SSascha Hauer } 205d96be879SSascha Hauer 206656217d2SMartin Fuzzey static int mxcmci_setup_data(struct mxcmci_host *host, struct mmc_data *data) 207d96be879SSascha Hauer { 208d96be879SSascha Hauer unsigned int nob = data->blocks; 209d96be879SSascha Hauer unsigned int blksz = data->blksz; 210d96be879SSascha Hauer unsigned int datasize = nob * blksz; 211d96be879SSascha Hauer #ifdef HAS_DMA 212d96be879SSascha Hauer struct scatterlist *sg; 213d96be879SSascha Hauer int i; 214656217d2SMartin Fuzzey int ret; 215d96be879SSascha Hauer #endif 216d96be879SSascha Hauer if (data->flags & MMC_DATA_STREAM) 217d96be879SSascha Hauer nob = 0xffff; 218d96be879SSascha Hauer 219d96be879SSascha Hauer host->data = data; 220d96be879SSascha Hauer data->bytes_xfered = 0; 221d96be879SSascha Hauer 222d96be879SSascha Hauer writew(nob, host->base + MMC_REG_NOB); 223d96be879SSascha Hauer writew(blksz, host->base + MMC_REG_BLK_LEN); 224d96be879SSascha Hauer host->datasize = datasize; 225d96be879SSascha Hauer 226d96be879SSascha Hauer #ifdef HAS_DMA 227d96be879SSascha Hauer for_each_sg(data->sg, sg, data->sg_len, i) { 228d96be879SSascha Hauer if (sg->offset & 3 || sg->length & 3) { 229d96be879SSascha Hauer host->do_dma = 0; 230656217d2SMartin Fuzzey return 0; 231d96be879SSascha Hauer } 232d96be879SSascha Hauer } 233d96be879SSascha Hauer 234d96be879SSascha Hauer if (data->flags & MMC_DATA_READ) { 235d96be879SSascha Hauer host->dma_dir = DMA_FROM_DEVICE; 236d96be879SSascha Hauer host->dma_nents = dma_map_sg(mmc_dev(host->mmc), data->sg, 237d96be879SSascha Hauer data->sg_len, host->dma_dir); 238d96be879SSascha Hauer 239656217d2SMartin Fuzzey ret = imx_dma_setup_sg(host->dma, data->sg, host->dma_nents, 240656217d2SMartin Fuzzey datasize, 241d96be879SSascha Hauer host->res->start + MMC_REG_BUFFER_ACCESS, 242d96be879SSascha Hauer DMA_MODE_READ); 243d96be879SSascha Hauer } else { 244d96be879SSascha Hauer host->dma_dir = DMA_TO_DEVICE; 245d96be879SSascha Hauer host->dma_nents = dma_map_sg(mmc_dev(host->mmc), data->sg, 246d96be879SSascha Hauer data->sg_len, host->dma_dir); 247d96be879SSascha Hauer 248656217d2SMartin Fuzzey ret = imx_dma_setup_sg(host->dma, data->sg, host->dma_nents, 249656217d2SMartin Fuzzey datasize, 250d96be879SSascha Hauer host->res->start + MMC_REG_BUFFER_ACCESS, 251d96be879SSascha Hauer DMA_MODE_WRITE); 252d96be879SSascha Hauer } 253d96be879SSascha Hauer 254656217d2SMartin Fuzzey if (ret) { 255656217d2SMartin Fuzzey dev_err(mmc_dev(host->mmc), "failed to setup DMA : %d\n", ret); 256656217d2SMartin Fuzzey return ret; 257656217d2SMartin Fuzzey } 258d96be879SSascha Hauer wmb(); 259d96be879SSascha Hauer 260d96be879SSascha Hauer imx_dma_enable(host->dma); 261d96be879SSascha Hauer #endif /* HAS_DMA */ 262656217d2SMartin Fuzzey return 0; 263d96be879SSascha Hauer } 264d96be879SSascha Hauer 265d96be879SSascha Hauer static int mxcmci_start_cmd(struct mxcmci_host *host, struct mmc_command *cmd, 266d96be879SSascha Hauer unsigned int cmdat) 267d96be879SSascha Hauer { 26816b3bf8cSEric Bénard u32 int_cntr = host->default_irq_mask; 269f441b993SDaniel Mack unsigned long flags; 270f441b993SDaniel Mack 271d96be879SSascha Hauer WARN_ON(host->cmd != NULL); 272d96be879SSascha Hauer host->cmd = cmd; 273d96be879SSascha Hauer 274d96be879SSascha Hauer switch (mmc_resp_type(cmd)) { 275d96be879SSascha Hauer case MMC_RSP_R1: /* short CRC, OPCODE */ 276d96be879SSascha Hauer case MMC_RSP_R1B:/* short CRC, OPCODE, BUSY */ 277d96be879SSascha Hauer cmdat |= CMD_DAT_CONT_RESPONSE_48BIT_CRC; 278d96be879SSascha Hauer break; 279d96be879SSascha Hauer case MMC_RSP_R2: /* long 136 bit + CRC */ 280d96be879SSascha Hauer cmdat |= CMD_DAT_CONT_RESPONSE_136BIT; 281d96be879SSascha Hauer break; 282d96be879SSascha Hauer case MMC_RSP_R3: /* short */ 283d96be879SSascha Hauer cmdat |= CMD_DAT_CONT_RESPONSE_48BIT; 284d96be879SSascha Hauer break; 285d96be879SSascha Hauer case MMC_RSP_NONE: 286d96be879SSascha Hauer break; 287d96be879SSascha Hauer default: 288d96be879SSascha Hauer dev_err(mmc_dev(host->mmc), "unhandled response type 0x%x\n", 289d96be879SSascha Hauer mmc_resp_type(cmd)); 290d96be879SSascha Hauer cmd->error = -EINVAL; 291d96be879SSascha Hauer return -EINVAL; 292d96be879SSascha Hauer } 293d96be879SSascha Hauer 294f441b993SDaniel Mack int_cntr = INT_END_CMD_RES_EN; 295f441b993SDaniel Mack 296d96be879SSascha Hauer if (mxcmci_use_dma(host)) 297f441b993SDaniel Mack int_cntr |= INT_READ_OP_EN | INT_WRITE_OP_DONE_EN; 298f441b993SDaniel Mack 299f441b993SDaniel Mack spin_lock_irqsave(&host->lock, flags); 300f441b993SDaniel Mack if (host->use_sdio) 301f441b993SDaniel Mack int_cntr |= INT_SDIO_IRQ_EN; 302f441b993SDaniel Mack writel(int_cntr, host->base + MMC_REG_INT_CNTR); 303f441b993SDaniel Mack spin_unlock_irqrestore(&host->lock, flags); 304d96be879SSascha Hauer 305d96be879SSascha Hauer writew(cmd->opcode, host->base + MMC_REG_CMD); 306d96be879SSascha Hauer writel(cmd->arg, host->base + MMC_REG_ARG); 307d96be879SSascha Hauer writew(cmdat, host->base + MMC_REG_CMD_DAT_CONT); 308d96be879SSascha Hauer 309d96be879SSascha Hauer return 0; 310d96be879SSascha Hauer } 311d96be879SSascha Hauer 312d96be879SSascha Hauer static void mxcmci_finish_request(struct mxcmci_host *host, 313d96be879SSascha Hauer struct mmc_request *req) 314d96be879SSascha Hauer { 31516b3bf8cSEric Bénard u32 int_cntr = host->default_irq_mask; 316f441b993SDaniel Mack unsigned long flags; 317f441b993SDaniel Mack 318f441b993SDaniel Mack spin_lock_irqsave(&host->lock, flags); 319f441b993SDaniel Mack if (host->use_sdio) 320f441b993SDaniel Mack int_cntr |= INT_SDIO_IRQ_EN; 321f441b993SDaniel Mack writel(int_cntr, host->base + MMC_REG_INT_CNTR); 322f441b993SDaniel Mack spin_unlock_irqrestore(&host->lock, flags); 323d96be879SSascha Hauer 324d96be879SSascha Hauer host->req = NULL; 325d96be879SSascha Hauer host->cmd = NULL; 326d96be879SSascha Hauer host->data = NULL; 327d96be879SSascha Hauer 328d96be879SSascha Hauer mmc_request_done(host->mmc, req); 329d96be879SSascha Hauer } 330d96be879SSascha Hauer 331d96be879SSascha Hauer static int mxcmci_finish_data(struct mxcmci_host *host, unsigned int stat) 332d96be879SSascha Hauer { 333d96be879SSascha Hauer struct mmc_data *data = host->data; 334d96be879SSascha Hauer int data_error; 335d96be879SSascha Hauer 336d96be879SSascha Hauer #ifdef HAS_DMA 337d96be879SSascha Hauer if (mxcmci_use_dma(host)) { 338d96be879SSascha Hauer imx_dma_disable(host->dma); 339d96be879SSascha Hauer dma_unmap_sg(mmc_dev(host->mmc), data->sg, host->dma_nents, 340d96be879SSascha Hauer host->dma_dir); 341d96be879SSascha Hauer } 342d96be879SSascha Hauer #endif 343d96be879SSascha Hauer 344d96be879SSascha Hauer if (stat & STATUS_ERR_MASK) { 345d96be879SSascha Hauer dev_dbg(mmc_dev(host->mmc), "request failed. status: 0x%08x\n", 346d96be879SSascha Hauer stat); 347d96be879SSascha Hauer if (stat & STATUS_CRC_READ_ERR) { 3484725f6f1SDaniel Mack dev_err(mmc_dev(host->mmc), "%s: -EILSEQ\n", __func__); 349d96be879SSascha Hauer data->error = -EILSEQ; 350d96be879SSascha Hauer } else if (stat & STATUS_CRC_WRITE_ERR) { 351d96be879SSascha Hauer u32 err_code = (stat >> 9) & 0x3; 3524725f6f1SDaniel Mack if (err_code == 2) { /* No CRC response */ 3534725f6f1SDaniel Mack dev_err(mmc_dev(host->mmc), 3544725f6f1SDaniel Mack "%s: No CRC -ETIMEDOUT\n", __func__); 355d96be879SSascha Hauer data->error = -ETIMEDOUT; 356d96be879SSascha Hauer } else { 3574725f6f1SDaniel Mack dev_err(mmc_dev(host->mmc), 3584725f6f1SDaniel Mack "%s: -EILSEQ\n", __func__); 3594725f6f1SDaniel Mack data->error = -EILSEQ; 3604725f6f1SDaniel Mack } 3614725f6f1SDaniel Mack } else if (stat & STATUS_TIME_OUT_READ) { 3624725f6f1SDaniel Mack dev_err(mmc_dev(host->mmc), 3634725f6f1SDaniel Mack "%s: read -ETIMEDOUT\n", __func__); 3644725f6f1SDaniel Mack data->error = -ETIMEDOUT; 3654725f6f1SDaniel Mack } else { 3664725f6f1SDaniel Mack dev_err(mmc_dev(host->mmc), "%s: -EIO\n", __func__); 367d96be879SSascha Hauer data->error = -EIO; 368d96be879SSascha Hauer } 369d96be879SSascha Hauer } else { 370d96be879SSascha Hauer data->bytes_xfered = host->datasize; 371d96be879SSascha Hauer } 372d96be879SSascha Hauer 373d96be879SSascha Hauer data_error = data->error; 374d96be879SSascha Hauer 375d96be879SSascha Hauer host->data = NULL; 376d96be879SSascha Hauer 377d96be879SSascha Hauer return data_error; 378d96be879SSascha Hauer } 379d96be879SSascha Hauer 380d96be879SSascha Hauer static void mxcmci_read_response(struct mxcmci_host *host, unsigned int stat) 381d96be879SSascha Hauer { 382d96be879SSascha Hauer struct mmc_command *cmd = host->cmd; 383d96be879SSascha Hauer int i; 384d96be879SSascha Hauer u32 a, b, c; 385d96be879SSascha Hauer 386d96be879SSascha Hauer if (!cmd) 387d96be879SSascha Hauer return; 388d96be879SSascha Hauer 389d96be879SSascha Hauer if (stat & STATUS_TIME_OUT_RESP) { 390d96be879SSascha Hauer dev_dbg(mmc_dev(host->mmc), "CMD TIMEOUT\n"); 391d96be879SSascha Hauer cmd->error = -ETIMEDOUT; 392d96be879SSascha Hauer } else if (stat & STATUS_RESP_CRC_ERR && cmd->flags & MMC_RSP_CRC) { 393d96be879SSascha Hauer dev_dbg(mmc_dev(host->mmc), "cmd crc error\n"); 394d96be879SSascha Hauer cmd->error = -EILSEQ; 395d96be879SSascha Hauer } 396d96be879SSascha Hauer 397d96be879SSascha Hauer if (cmd->flags & MMC_RSP_PRESENT) { 398d96be879SSascha Hauer if (cmd->flags & MMC_RSP_136) { 399d96be879SSascha Hauer for (i = 0; i < 4; i++) { 400d96be879SSascha Hauer a = readw(host->base + MMC_REG_RES_FIFO); 401d96be879SSascha Hauer b = readw(host->base + MMC_REG_RES_FIFO); 402d96be879SSascha Hauer cmd->resp[i] = a << 16 | b; 403d96be879SSascha Hauer } 404d96be879SSascha Hauer } else { 405d96be879SSascha Hauer a = readw(host->base + MMC_REG_RES_FIFO); 406d96be879SSascha Hauer b = readw(host->base + MMC_REG_RES_FIFO); 407d96be879SSascha Hauer c = readw(host->base + MMC_REG_RES_FIFO); 408d96be879SSascha Hauer cmd->resp[0] = a << 24 | b << 8 | c >> 8; 409d96be879SSascha Hauer } 410d96be879SSascha Hauer } 411d96be879SSascha Hauer } 412d96be879SSascha Hauer 413d96be879SSascha Hauer static int mxcmci_poll_status(struct mxcmci_host *host, u32 mask) 414d96be879SSascha Hauer { 415d96be879SSascha Hauer u32 stat; 416d96be879SSascha Hauer unsigned long timeout = jiffies + HZ; 417d96be879SSascha Hauer 418d96be879SSascha Hauer do { 419d96be879SSascha Hauer stat = readl(host->base + MMC_REG_STATUS); 420d96be879SSascha Hauer if (stat & STATUS_ERR_MASK) 421d96be879SSascha Hauer return stat; 42218489fa2SMartin Fuzzey if (time_after(jiffies, timeout)) { 42318489fa2SMartin Fuzzey mxcmci_softreset(host); 42418489fa2SMartin Fuzzey mxcmci_set_clk_rate(host, host->clock); 425d96be879SSascha Hauer return STATUS_TIME_OUT_READ; 42618489fa2SMartin Fuzzey } 427d96be879SSascha Hauer if (stat & mask) 428d96be879SSascha Hauer return 0; 429d96be879SSascha Hauer cpu_relax(); 430d96be879SSascha Hauer } while (1); 431d96be879SSascha Hauer } 432d96be879SSascha Hauer 433d96be879SSascha Hauer static int mxcmci_pull(struct mxcmci_host *host, void *_buf, int bytes) 434d96be879SSascha Hauer { 435d96be879SSascha Hauer unsigned int stat; 436d96be879SSascha Hauer u32 *buf = _buf; 437d96be879SSascha Hauer 438d96be879SSascha Hauer while (bytes > 3) { 439d96be879SSascha Hauer stat = mxcmci_poll_status(host, 440d96be879SSascha Hauer STATUS_BUF_READ_RDY | STATUS_READ_OP_DONE); 441d96be879SSascha Hauer if (stat) 442d96be879SSascha Hauer return stat; 443d96be879SSascha Hauer *buf++ = readl(host->base + MMC_REG_BUFFER_ACCESS); 444d96be879SSascha Hauer bytes -= 4; 445d96be879SSascha Hauer } 446d96be879SSascha Hauer 447d96be879SSascha Hauer if (bytes) { 448d96be879SSascha Hauer u8 *b = (u8 *)buf; 449d96be879SSascha Hauer u32 tmp; 450d96be879SSascha Hauer 451d96be879SSascha Hauer stat = mxcmci_poll_status(host, 452d96be879SSascha Hauer STATUS_BUF_READ_RDY | STATUS_READ_OP_DONE); 453d96be879SSascha Hauer if (stat) 454d96be879SSascha Hauer return stat; 455d96be879SSascha Hauer tmp = readl(host->base + MMC_REG_BUFFER_ACCESS); 456d96be879SSascha Hauer memcpy(b, &tmp, bytes); 457d96be879SSascha Hauer } 458d96be879SSascha Hauer 459d96be879SSascha Hauer return 0; 460d96be879SSascha Hauer } 461d96be879SSascha Hauer 462d96be879SSascha Hauer static int mxcmci_push(struct mxcmci_host *host, void *_buf, int bytes) 463d96be879SSascha Hauer { 464d96be879SSascha Hauer unsigned int stat; 465d96be879SSascha Hauer u32 *buf = _buf; 466d96be879SSascha Hauer 467d96be879SSascha Hauer while (bytes > 3) { 468d96be879SSascha Hauer stat = mxcmci_poll_status(host, STATUS_BUF_WRITE_RDY); 469d96be879SSascha Hauer if (stat) 470d96be879SSascha Hauer return stat; 471d96be879SSascha Hauer writel(*buf++, host->base + MMC_REG_BUFFER_ACCESS); 472d96be879SSascha Hauer bytes -= 4; 473d96be879SSascha Hauer } 474d96be879SSascha Hauer 475d96be879SSascha Hauer if (bytes) { 476d96be879SSascha Hauer u8 *b = (u8 *)buf; 477d96be879SSascha Hauer u32 tmp; 478d96be879SSascha Hauer 479d96be879SSascha Hauer stat = mxcmci_poll_status(host, STATUS_BUF_WRITE_RDY); 480d96be879SSascha Hauer if (stat) 481d96be879SSascha Hauer return stat; 482d96be879SSascha Hauer 483d96be879SSascha Hauer memcpy(&tmp, b, bytes); 484d96be879SSascha Hauer writel(tmp, host->base + MMC_REG_BUFFER_ACCESS); 485d96be879SSascha Hauer } 486d96be879SSascha Hauer 487d96be879SSascha Hauer stat = mxcmci_poll_status(host, STATUS_BUF_WRITE_RDY); 488d96be879SSascha Hauer if (stat) 489d96be879SSascha Hauer return stat; 490d96be879SSascha Hauer 491d96be879SSascha Hauer return 0; 492d96be879SSascha Hauer } 493d96be879SSascha Hauer 494d96be879SSascha Hauer static int mxcmci_transfer_data(struct mxcmci_host *host) 495d96be879SSascha Hauer { 496d96be879SSascha Hauer struct mmc_data *data = host->req->data; 497d96be879SSascha Hauer struct scatterlist *sg; 498d96be879SSascha Hauer int stat, i; 499d96be879SSascha Hauer 500d96be879SSascha Hauer host->data = data; 501d96be879SSascha Hauer host->datasize = 0; 502d96be879SSascha Hauer 503d96be879SSascha Hauer if (data->flags & MMC_DATA_READ) { 504d96be879SSascha Hauer for_each_sg(data->sg, sg, data->sg_len, i) { 505d96be879SSascha Hauer stat = mxcmci_pull(host, sg_virt(sg), sg->length); 506d96be879SSascha Hauer if (stat) 507d96be879SSascha Hauer return stat; 508d96be879SSascha Hauer host->datasize += sg->length; 509d96be879SSascha Hauer } 510d96be879SSascha Hauer } else { 511d96be879SSascha Hauer for_each_sg(data->sg, sg, data->sg_len, i) { 512d96be879SSascha Hauer stat = mxcmci_push(host, sg_virt(sg), sg->length); 513d96be879SSascha Hauer if (stat) 514d96be879SSascha Hauer return stat; 515d96be879SSascha Hauer host->datasize += sg->length; 516d96be879SSascha Hauer } 517d96be879SSascha Hauer stat = mxcmci_poll_status(host, STATUS_WRITE_OP_DONE); 518d96be879SSascha Hauer if (stat) 519d96be879SSascha Hauer return stat; 520d96be879SSascha Hauer } 521d96be879SSascha Hauer return 0; 522d96be879SSascha Hauer } 523d96be879SSascha Hauer 524d96be879SSascha Hauer static void mxcmci_datawork(struct work_struct *work) 525d96be879SSascha Hauer { 526d96be879SSascha Hauer struct mxcmci_host *host = container_of(work, struct mxcmci_host, 527d96be879SSascha Hauer datawork); 528d96be879SSascha Hauer int datastat = mxcmci_transfer_data(host); 5294a31f2efSDaniel Mack 5304a31f2efSDaniel Mack writel(STATUS_READ_OP_DONE | STATUS_WRITE_OP_DONE, 5314a31f2efSDaniel Mack host->base + MMC_REG_STATUS); 532d96be879SSascha Hauer mxcmci_finish_data(host, datastat); 533d96be879SSascha Hauer 534d96be879SSascha Hauer if (host->req->stop) { 535d96be879SSascha Hauer if (mxcmci_start_cmd(host, host->req->stop, 0)) { 536d96be879SSascha Hauer mxcmci_finish_request(host, host->req); 537d96be879SSascha Hauer return; 538d96be879SSascha Hauer } 539d96be879SSascha Hauer } else { 540d96be879SSascha Hauer mxcmci_finish_request(host, host->req); 541d96be879SSascha Hauer } 542d96be879SSascha Hauer } 543d96be879SSascha Hauer 544d96be879SSascha Hauer #ifdef HAS_DMA 545d96be879SSascha Hauer static void mxcmci_data_done(struct mxcmci_host *host, unsigned int stat) 546d96be879SSascha Hauer { 547d96be879SSascha Hauer struct mmc_data *data = host->data; 548d96be879SSascha Hauer int data_error; 549d96be879SSascha Hauer 550d96be879SSascha Hauer if (!data) 551d96be879SSascha Hauer return; 552d96be879SSascha Hauer 553d96be879SSascha Hauer data_error = mxcmci_finish_data(host, stat); 554d96be879SSascha Hauer 555d96be879SSascha Hauer mxcmci_read_response(host, stat); 556d96be879SSascha Hauer host->cmd = NULL; 557d96be879SSascha Hauer 558d96be879SSascha Hauer if (host->req->stop) { 559d96be879SSascha Hauer if (mxcmci_start_cmd(host, host->req->stop, 0)) { 560d96be879SSascha Hauer mxcmci_finish_request(host, host->req); 561d96be879SSascha Hauer return; 562d96be879SSascha Hauer } 563d96be879SSascha Hauer } else { 564d96be879SSascha Hauer mxcmci_finish_request(host, host->req); 565d96be879SSascha Hauer } 566d96be879SSascha Hauer } 567d96be879SSascha Hauer #endif /* HAS_DMA */ 568d96be879SSascha Hauer 569d96be879SSascha Hauer static void mxcmci_cmd_done(struct mxcmci_host *host, unsigned int stat) 570d96be879SSascha Hauer { 571d96be879SSascha Hauer mxcmci_read_response(host, stat); 572d96be879SSascha Hauer host->cmd = NULL; 573d96be879SSascha Hauer 574d96be879SSascha Hauer if (!host->data && host->req) { 575d96be879SSascha Hauer mxcmci_finish_request(host, host->req); 576d96be879SSascha Hauer return; 577d96be879SSascha Hauer } 578d96be879SSascha Hauer 579d96be879SSascha Hauer /* For the DMA case the DMA engine handles the data transfer 580fd589a8fSAnand Gadiyar * automatically. For non DMA we have to do it ourselves. 581d96be879SSascha Hauer * Don't do it in interrupt context though. 582d96be879SSascha Hauer */ 583d96be879SSascha Hauer if (!mxcmci_use_dma(host) && host->data) 584d96be879SSascha Hauer schedule_work(&host->datawork); 585d96be879SSascha Hauer 586d96be879SSascha Hauer } 587d96be879SSascha Hauer 588d96be879SSascha Hauer static irqreturn_t mxcmci_irq(int irq, void *devid) 589d96be879SSascha Hauer { 590d96be879SSascha Hauer struct mxcmci_host *host = devid; 591f441b993SDaniel Mack unsigned long flags; 592f441b993SDaniel Mack bool sdio_irq; 593d96be879SSascha Hauer u32 stat; 594d96be879SSascha Hauer 595d96be879SSascha Hauer stat = readl(host->base + MMC_REG_STATUS); 5964a31f2efSDaniel Mack writel(stat & ~(STATUS_SDIO_INT_ACTIVE | STATUS_DATA_TRANS_DONE | 5974a31f2efSDaniel Mack STATUS_WRITE_OP_DONE), host->base + MMC_REG_STATUS); 598d96be879SSascha Hauer 599d96be879SSascha Hauer dev_dbg(mmc_dev(host->mmc), "%s: 0x%08x\n", __func__, stat); 600d96be879SSascha Hauer 601f441b993SDaniel Mack spin_lock_irqsave(&host->lock, flags); 602f441b993SDaniel Mack sdio_irq = (stat & STATUS_SDIO_INT_ACTIVE) && host->use_sdio; 603f441b993SDaniel Mack spin_unlock_irqrestore(&host->lock, flags); 604f441b993SDaniel Mack 6054a31f2efSDaniel Mack #ifdef HAS_DMA 6064a31f2efSDaniel Mack if (mxcmci_use_dma(host) && 6074a31f2efSDaniel Mack (stat & (STATUS_READ_OP_DONE | STATUS_WRITE_OP_DONE))) 6084a31f2efSDaniel Mack writel(STATUS_READ_OP_DONE | STATUS_WRITE_OP_DONE, 6094a31f2efSDaniel Mack host->base + MMC_REG_STATUS); 6104a31f2efSDaniel Mack #endif 6114a31f2efSDaniel Mack 612f441b993SDaniel Mack if (sdio_irq) { 613f441b993SDaniel Mack writel(STATUS_SDIO_INT_ACTIVE, host->base + MMC_REG_STATUS); 614f441b993SDaniel Mack mmc_signal_sdio_irq(host->mmc); 615f441b993SDaniel Mack } 616f441b993SDaniel Mack 617d96be879SSascha Hauer if (stat & STATUS_END_CMD_RESP) 618d96be879SSascha Hauer mxcmci_cmd_done(host, stat); 619f441b993SDaniel Mack 620d96be879SSascha Hauer #ifdef HAS_DMA 621d96be879SSascha Hauer if (mxcmci_use_dma(host) && 622d96be879SSascha Hauer (stat & (STATUS_DATA_TRANS_DONE | STATUS_WRITE_OP_DONE))) 623d96be879SSascha Hauer mxcmci_data_done(host, stat); 624d96be879SSascha Hauer #endif 62516b3bf8cSEric Bénard if (host->default_irq_mask && 62616b3bf8cSEric Bénard (stat & (STATUS_CARD_INSERTION | STATUS_CARD_REMOVAL))) 62716b3bf8cSEric Bénard mmc_detect_change(host->mmc, msecs_to_jiffies(200)); 628d96be879SSascha Hauer return IRQ_HANDLED; 629d96be879SSascha Hauer } 630d96be879SSascha Hauer 631d96be879SSascha Hauer static void mxcmci_request(struct mmc_host *mmc, struct mmc_request *req) 632d96be879SSascha Hauer { 633d96be879SSascha Hauer struct mxcmci_host *host = mmc_priv(mmc); 634d96be879SSascha Hauer unsigned int cmdat = host->cmdat; 635656217d2SMartin Fuzzey int error; 636d96be879SSascha Hauer 637d96be879SSascha Hauer WARN_ON(host->req != NULL); 638d96be879SSascha Hauer 639d96be879SSascha Hauer host->req = req; 640d96be879SSascha Hauer host->cmdat &= ~CMD_DAT_CONT_INIT; 641d96be879SSascha Hauer #ifdef HAS_DMA 642d96be879SSascha Hauer host->do_dma = 1; 643d96be879SSascha Hauer #endif 644d96be879SSascha Hauer if (req->data) { 645656217d2SMartin Fuzzey error = mxcmci_setup_data(host, req->data); 646656217d2SMartin Fuzzey if (error) { 647656217d2SMartin Fuzzey req->cmd->error = error; 648656217d2SMartin Fuzzey goto out; 649656217d2SMartin Fuzzey } 650656217d2SMartin Fuzzey 651d96be879SSascha Hauer 652d96be879SSascha Hauer cmdat |= CMD_DAT_CONT_DATA_ENABLE; 653d96be879SSascha Hauer 654d96be879SSascha Hauer if (req->data->flags & MMC_DATA_WRITE) 655d96be879SSascha Hauer cmdat |= CMD_DAT_CONT_WRITE; 656d96be879SSascha Hauer } 657d96be879SSascha Hauer 658656217d2SMartin Fuzzey error = mxcmci_start_cmd(host, req->cmd, cmdat); 659656217d2SMartin Fuzzey out: 660656217d2SMartin Fuzzey if (error) 661d96be879SSascha Hauer mxcmci_finish_request(host, req); 662d96be879SSascha Hauer } 663d96be879SSascha Hauer 664d96be879SSascha Hauer static void mxcmci_set_clk_rate(struct mxcmci_host *host, unsigned int clk_ios) 665d96be879SSascha Hauer { 666d96be879SSascha Hauer unsigned int divider; 667d96be879SSascha Hauer int prescaler = 0; 668d96be879SSascha Hauer unsigned int clk_in = clk_get_rate(host->clk); 669d96be879SSascha Hauer 670d96be879SSascha Hauer while (prescaler <= 0x800) { 671d96be879SSascha Hauer for (divider = 1; divider <= 0xF; divider++) { 672d96be879SSascha Hauer int x; 673d96be879SSascha Hauer 674d96be879SSascha Hauer x = (clk_in / (divider + 1)); 675d96be879SSascha Hauer 676d96be879SSascha Hauer if (prescaler) 677d96be879SSascha Hauer x /= (prescaler * 2); 678d96be879SSascha Hauer 679d96be879SSascha Hauer if (x <= clk_ios) 680d96be879SSascha Hauer break; 681d96be879SSascha Hauer } 682d96be879SSascha Hauer if (divider < 0x10) 683d96be879SSascha Hauer break; 684d96be879SSascha Hauer 685d96be879SSascha Hauer if (prescaler == 0) 686d96be879SSascha Hauer prescaler = 1; 687d96be879SSascha Hauer else 688d96be879SSascha Hauer prescaler <<= 1; 689d96be879SSascha Hauer } 690d96be879SSascha Hauer 691d96be879SSascha Hauer writew((prescaler << 4) | divider, host->base + MMC_REG_CLK_RATE); 692d96be879SSascha Hauer 693d96be879SSascha Hauer dev_dbg(mmc_dev(host->mmc), "scaler: %d divider: %d in: %d out: %d\n", 694d96be879SSascha Hauer prescaler, divider, clk_in, clk_ios); 695d96be879SSascha Hauer } 696d96be879SSascha Hauer 697d96be879SSascha Hauer static void mxcmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 698d96be879SSascha Hauer { 699d96be879SSascha Hauer struct mxcmci_host *host = mmc_priv(mmc); 700d96be879SSascha Hauer #ifdef HAS_DMA 701d96be879SSascha Hauer unsigned int blen; 702d96be879SSascha Hauer /* 703d96be879SSascha Hauer * use burstlen of 64 in 4 bit mode (--> reg value 0) 704d96be879SSascha Hauer * use burstlen of 16 in 1 bit mode (--> reg value 16) 705d96be879SSascha Hauer */ 706d96be879SSascha Hauer if (ios->bus_width == MMC_BUS_WIDTH_4) 707d96be879SSascha Hauer blen = 0; 708d96be879SSascha Hauer else 709d96be879SSascha Hauer blen = 16; 710d96be879SSascha Hauer 711d96be879SSascha Hauer imx_dma_config_burstlen(host->dma, blen); 712d96be879SSascha Hauer #endif 713d96be879SSascha Hauer if (ios->bus_width == MMC_BUS_WIDTH_4) 714d96be879SSascha Hauer host->cmdat |= CMD_DAT_CONT_BUS_WIDTH_4; 715d96be879SSascha Hauer else 716d96be879SSascha Hauer host->cmdat &= ~CMD_DAT_CONT_BUS_WIDTH_4; 717d96be879SSascha Hauer 718d96be879SSascha Hauer if (host->power_mode != ios->power_mode) { 71974b66954SAlberto Panizzo mxcmci_set_power(host, ios->vdd); 720d96be879SSascha Hauer host->power_mode = ios->power_mode; 72174b66954SAlberto Panizzo 722d96be879SSascha Hauer if (ios->power_mode == MMC_POWER_ON) 723d96be879SSascha Hauer host->cmdat |= CMD_DAT_CONT_INIT; 724d96be879SSascha Hauer } 725d96be879SSascha Hauer 726d96be879SSascha Hauer if (ios->clock) { 727d96be879SSascha Hauer mxcmci_set_clk_rate(host, ios->clock); 728d96be879SSascha Hauer writew(STR_STP_CLK_START_CLK, host->base + MMC_REG_STR_STP_CLK); 729d96be879SSascha Hauer } else { 730d96be879SSascha Hauer writew(STR_STP_CLK_STOP_CLK, host->base + MMC_REG_STR_STP_CLK); 731d96be879SSascha Hauer } 732d96be879SSascha Hauer 733d96be879SSascha Hauer host->clock = ios->clock; 734d96be879SSascha Hauer } 735d96be879SSascha Hauer 736d96be879SSascha Hauer static irqreturn_t mxcmci_detect_irq(int irq, void *data) 737d96be879SSascha Hauer { 738d96be879SSascha Hauer struct mmc_host *mmc = data; 739d96be879SSascha Hauer 740d96be879SSascha Hauer dev_dbg(mmc_dev(mmc), "%s\n", __func__); 741d96be879SSascha Hauer 742d96be879SSascha Hauer mmc_detect_change(mmc, msecs_to_jiffies(250)); 743d96be879SSascha Hauer return IRQ_HANDLED; 744d96be879SSascha Hauer } 745d96be879SSascha Hauer 746d96be879SSascha Hauer static int mxcmci_get_ro(struct mmc_host *mmc) 747d96be879SSascha Hauer { 748d96be879SSascha Hauer struct mxcmci_host *host = mmc_priv(mmc); 749d96be879SSascha Hauer 750d96be879SSascha Hauer if (host->pdata && host->pdata->get_ro) 751d96be879SSascha Hauer return !!host->pdata->get_ro(mmc_dev(mmc)); 752d96be879SSascha Hauer /* 753d96be879SSascha Hauer * Board doesn't support read only detection; let the mmc core 754d96be879SSascha Hauer * decide what to do. 755d96be879SSascha Hauer */ 756d96be879SSascha Hauer return -ENOSYS; 757d96be879SSascha Hauer } 758d96be879SSascha Hauer 759f441b993SDaniel Mack static void mxcmci_enable_sdio_irq(struct mmc_host *mmc, int enable) 760f441b993SDaniel Mack { 761f441b993SDaniel Mack struct mxcmci_host *host = mmc_priv(mmc); 762f441b993SDaniel Mack unsigned long flags; 763f441b993SDaniel Mack u32 int_cntr; 764f441b993SDaniel Mack 765f441b993SDaniel Mack spin_lock_irqsave(&host->lock, flags); 766f441b993SDaniel Mack host->use_sdio = enable; 767f441b993SDaniel Mack int_cntr = readl(host->base + MMC_REG_INT_CNTR); 768f441b993SDaniel Mack 769f441b993SDaniel Mack if (enable) 770f441b993SDaniel Mack int_cntr |= INT_SDIO_IRQ_EN; 771f441b993SDaniel Mack else 772f441b993SDaniel Mack int_cntr &= ~INT_SDIO_IRQ_EN; 773f441b993SDaniel Mack 774f441b993SDaniel Mack writel(int_cntr, host->base + MMC_REG_INT_CNTR); 775f441b993SDaniel Mack spin_unlock_irqrestore(&host->lock, flags); 776f441b993SDaniel Mack } 777d96be879SSascha Hauer 7783fcb027dSDaniel Mack static void mxcmci_init_card(struct mmc_host *host, struct mmc_card *card) 7793fcb027dSDaniel Mack { 7803fcb027dSDaniel Mack /* 7813fcb027dSDaniel Mack * MX3 SoCs have a silicon bug which corrupts CRC calculation of 7823fcb027dSDaniel Mack * multi-block transfers when connected SDIO peripheral doesn't 7833fcb027dSDaniel Mack * drive the BUSY line as required by the specs. 7843fcb027dSDaniel Mack * One way to prevent this is to only allow 1-bit transfers. 7853fcb027dSDaniel Mack */ 7863fcb027dSDaniel Mack 7873fcb027dSDaniel Mack if (cpu_is_mx3() && card->type == MMC_TYPE_SDIO) 7883fcb027dSDaniel Mack host->caps &= ~MMC_CAP_4_BIT_DATA; 7893fcb027dSDaniel Mack else 7903fcb027dSDaniel Mack host->caps |= MMC_CAP_4_BIT_DATA; 7913fcb027dSDaniel Mack } 7923fcb027dSDaniel Mack 793d96be879SSascha Hauer static const struct mmc_host_ops mxcmci_ops = { 794d96be879SSascha Hauer .request = mxcmci_request, 795d96be879SSascha Hauer .set_ios = mxcmci_set_ios, 796d96be879SSascha Hauer .get_ro = mxcmci_get_ro, 797f441b993SDaniel Mack .enable_sdio_irq = mxcmci_enable_sdio_irq, 7983fcb027dSDaniel Mack .init_card = mxcmci_init_card, 799d96be879SSascha Hauer }; 800d96be879SSascha Hauer 801d96be879SSascha Hauer static int mxcmci_probe(struct platform_device *pdev) 802d96be879SSascha Hauer { 803d96be879SSascha Hauer struct mmc_host *mmc; 804d96be879SSascha Hauer struct mxcmci_host *host = NULL; 805c0521bafSUwe Kleine-König struct resource *iores, *r; 806d96be879SSascha Hauer int ret = 0, irq; 807d96be879SSascha Hauer 808d96be879SSascha Hauer printk(KERN_INFO "i.MX SDHC driver\n"); 809d96be879SSascha Hauer 810c0521bafSUwe Kleine-König iores = platform_get_resource(pdev, IORESOURCE_MEM, 0); 811d96be879SSascha Hauer irq = platform_get_irq(pdev, 0); 812c0521bafSUwe Kleine-König if (!iores || irq < 0) 813d96be879SSascha Hauer return -EINVAL; 814d96be879SSascha Hauer 815c0521bafSUwe Kleine-König r = request_mem_region(iores->start, resource_size(iores), pdev->name); 816d96be879SSascha Hauer if (!r) 817d96be879SSascha Hauer return -EBUSY; 818d96be879SSascha Hauer 819d96be879SSascha Hauer mmc = mmc_alloc_host(sizeof(struct mxcmci_host), &pdev->dev); 820d96be879SSascha Hauer if (!mmc) { 821d96be879SSascha Hauer ret = -ENOMEM; 822d96be879SSascha Hauer goto out_release_mem; 823d96be879SSascha Hauer } 824d96be879SSascha Hauer 825d96be879SSascha Hauer mmc->ops = &mxcmci_ops; 826f441b993SDaniel Mack mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ; 827d96be879SSascha Hauer 828d96be879SSascha Hauer /* MMC core transfer sizes tunable parameters */ 829a36274e0SMartin K. Petersen mmc->max_segs = 64; 830d96be879SSascha Hauer mmc->max_blk_size = 2048; 831d96be879SSascha Hauer mmc->max_blk_count = 65535; 832d96be879SSascha Hauer mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; 833d759c374SVladimir Zapolskiy mmc->max_seg_size = mmc->max_req_size; 834d96be879SSascha Hauer 835d96be879SSascha Hauer host = mmc_priv(mmc); 836d96be879SSascha Hauer host->base = ioremap(r->start, resource_size(r)); 837d96be879SSascha Hauer if (!host->base) { 838d96be879SSascha Hauer ret = -ENOMEM; 839d96be879SSascha Hauer goto out_free; 840d96be879SSascha Hauer } 841d96be879SSascha Hauer 842d96be879SSascha Hauer host->mmc = mmc; 843d96be879SSascha Hauer host->pdata = pdev->dev.platform_data; 844f441b993SDaniel Mack spin_lock_init(&host->lock); 845d96be879SSascha Hauer 84674b66954SAlberto Panizzo mxcmci_init_ocr(host); 847d96be879SSascha Hauer 84816b3bf8cSEric Bénard if (host->pdata && host->pdata->dat3_card_detect) 84916b3bf8cSEric Bénard host->default_irq_mask = 85016b3bf8cSEric Bénard INT_CARD_INSERTION_EN | INT_CARD_REMOVAL_EN; 85116b3bf8cSEric Bénard else 85216b3bf8cSEric Bénard host->default_irq_mask = 0; 85316b3bf8cSEric Bénard 854d96be879SSascha Hauer host->res = r; 855d96be879SSascha Hauer host->irq = irq; 856d96be879SSascha Hauer 85706277b5cSSascha Hauer host->clk = clk_get(&pdev->dev, NULL); 858d96be879SSascha Hauer if (IS_ERR(host->clk)) { 859d96be879SSascha Hauer ret = PTR_ERR(host->clk); 860d96be879SSascha Hauer goto out_iounmap; 861d96be879SSascha Hauer } 862d96be879SSascha Hauer clk_enable(host->clk); 863d96be879SSascha Hauer 864d96be879SSascha Hauer mxcmci_softreset(host); 865d96be879SSascha Hauer 866d96be879SSascha Hauer host->rev_no = readw(host->base + MMC_REG_REV_NO); 867d96be879SSascha Hauer if (host->rev_no != 0x400) { 868d96be879SSascha Hauer ret = -ENODEV; 869d96be879SSascha Hauer dev_err(mmc_dev(host->mmc), "wrong rev.no. 0x%08x. aborting.\n", 870d96be879SSascha Hauer host->rev_no); 871d96be879SSascha Hauer goto out_clk_put; 872d96be879SSascha Hauer } 873d96be879SSascha Hauer 874c499b067SSascha Hauer mmc->f_min = clk_get_rate(host->clk) >> 16; 875d96be879SSascha Hauer mmc->f_max = clk_get_rate(host->clk) >> 1; 876d96be879SSascha Hauer 877d96be879SSascha Hauer /* recommended in data sheet */ 878d96be879SSascha Hauer writew(0x2db4, host->base + MMC_REG_READ_TO); 879d96be879SSascha Hauer 88016b3bf8cSEric Bénard writel(host->default_irq_mask, host->base + MMC_REG_INT_CNTR); 881d96be879SSascha Hauer 882d96be879SSascha Hauer #ifdef HAS_DMA 883d96be879SSascha Hauer host->dma = imx_dma_request_by_prio(DRIVER_NAME, DMA_PRIO_LOW); 884d96be879SSascha Hauer if (host->dma < 0) { 885d96be879SSascha Hauer dev_err(mmc_dev(host->mmc), "imx_dma_request_by_prio failed\n"); 886d96be879SSascha Hauer ret = -EBUSY; 887d96be879SSascha Hauer goto out_clk_put; 888d96be879SSascha Hauer } 889d96be879SSascha Hauer 890d96be879SSascha Hauer r = platform_get_resource(pdev, IORESOURCE_DMA, 0); 891d96be879SSascha Hauer if (!r) { 892d96be879SSascha Hauer ret = -EINVAL; 893d96be879SSascha Hauer goto out_free_dma; 894d96be879SSascha Hauer } 895d96be879SSascha Hauer 896d96be879SSascha Hauer ret = imx_dma_config_channel(host->dma, 897d96be879SSascha Hauer IMX_DMA_MEMSIZE_32 | IMX_DMA_TYPE_FIFO, 898d96be879SSascha Hauer IMX_DMA_MEMSIZE_32 | IMX_DMA_TYPE_LINEAR, 899d96be879SSascha Hauer r->start, 0); 900d96be879SSascha Hauer if (ret) { 901d96be879SSascha Hauer dev_err(mmc_dev(host->mmc), "failed to config DMA channel\n"); 902d96be879SSascha Hauer goto out_free_dma; 903d96be879SSascha Hauer } 904d96be879SSascha Hauer #endif 905d96be879SSascha Hauer INIT_WORK(&host->datawork, mxcmci_datawork); 906d96be879SSascha Hauer 907d96be879SSascha Hauer ret = request_irq(host->irq, mxcmci_irq, 0, DRIVER_NAME, host); 908d96be879SSascha Hauer if (ret) 909d96be879SSascha Hauer goto out_free_dma; 910d96be879SSascha Hauer 911d96be879SSascha Hauer platform_set_drvdata(pdev, mmc); 912d96be879SSascha Hauer 913d96be879SSascha Hauer if (host->pdata && host->pdata->init) { 914d96be879SSascha Hauer ret = host->pdata->init(&pdev->dev, mxcmci_detect_irq, 915d96be879SSascha Hauer host->mmc); 916d96be879SSascha Hauer if (ret) 917d96be879SSascha Hauer goto out_free_irq; 918d96be879SSascha Hauer } 919d96be879SSascha Hauer 920d96be879SSascha Hauer mmc_add_host(mmc); 921d96be879SSascha Hauer 922d96be879SSascha Hauer return 0; 923d96be879SSascha Hauer 924d96be879SSascha Hauer out_free_irq: 925d96be879SSascha Hauer free_irq(host->irq, host); 926d96be879SSascha Hauer out_free_dma: 927d96be879SSascha Hauer #ifdef HAS_DMA 928d96be879SSascha Hauer imx_dma_free(host->dma); 929d96be879SSascha Hauer #endif 930d96be879SSascha Hauer out_clk_put: 931d96be879SSascha Hauer clk_disable(host->clk); 932d96be879SSascha Hauer clk_put(host->clk); 933d96be879SSascha Hauer out_iounmap: 934d96be879SSascha Hauer iounmap(host->base); 935d96be879SSascha Hauer out_free: 936d96be879SSascha Hauer mmc_free_host(mmc); 937d96be879SSascha Hauer out_release_mem: 938c0521bafSUwe Kleine-König release_mem_region(iores->start, resource_size(iores)); 939d96be879SSascha Hauer return ret; 940d96be879SSascha Hauer } 941d96be879SSascha Hauer 942d96be879SSascha Hauer static int mxcmci_remove(struct platform_device *pdev) 943d96be879SSascha Hauer { 944d96be879SSascha Hauer struct mmc_host *mmc = platform_get_drvdata(pdev); 945d96be879SSascha Hauer struct mxcmci_host *host = mmc_priv(mmc); 946d96be879SSascha Hauer 947d96be879SSascha Hauer platform_set_drvdata(pdev, NULL); 948d96be879SSascha Hauer 949d96be879SSascha Hauer mmc_remove_host(mmc); 950d96be879SSascha Hauer 95174b66954SAlberto Panizzo if (host->vcc) 95274b66954SAlberto Panizzo regulator_put(host->vcc); 95374b66954SAlberto Panizzo 954d96be879SSascha Hauer if (host->pdata && host->pdata->exit) 955d96be879SSascha Hauer host->pdata->exit(&pdev->dev, mmc); 956d96be879SSascha Hauer 957d96be879SSascha Hauer free_irq(host->irq, host); 958d96be879SSascha Hauer iounmap(host->base); 959d96be879SSascha Hauer #ifdef HAS_DMA 960d96be879SSascha Hauer imx_dma_free(host->dma); 961d96be879SSascha Hauer #endif 962d96be879SSascha Hauer clk_disable(host->clk); 963d96be879SSascha Hauer clk_put(host->clk); 964d96be879SSascha Hauer 965d96be879SSascha Hauer release_mem_region(host->res->start, resource_size(host->res)); 966d96be879SSascha Hauer release_resource(host->res); 967d96be879SSascha Hauer 968d96be879SSascha Hauer mmc_free_host(mmc); 969d96be879SSascha Hauer 970d96be879SSascha Hauer return 0; 971d96be879SSascha Hauer } 972d96be879SSascha Hauer 973d96be879SSascha Hauer #ifdef CONFIG_PM 974a7d403cfSEric Bénard static int mxcmci_suspend(struct device *dev) 975d96be879SSascha Hauer { 976a7d403cfSEric Bénard struct mmc_host *mmc = dev_get_drvdata(dev); 977a7d403cfSEric Bénard struct mxcmci_host *host = mmc_priv(mmc); 978d96be879SSascha Hauer int ret = 0; 979d96be879SSascha Hauer 980d96be879SSascha Hauer if (mmc) 9811a13f8faSMatt Fleming ret = mmc_suspend_host(mmc); 982a7d403cfSEric Bénard clk_disable(host->clk); 983d96be879SSascha Hauer 984d96be879SSascha Hauer return ret; 985d96be879SSascha Hauer } 986d96be879SSascha Hauer 987a7d403cfSEric Bénard static int mxcmci_resume(struct device *dev) 988d96be879SSascha Hauer { 989a7d403cfSEric Bénard struct mmc_host *mmc = dev_get_drvdata(dev); 990a7d403cfSEric Bénard struct mxcmci_host *host = mmc_priv(mmc); 991d96be879SSascha Hauer int ret = 0; 992d96be879SSascha Hauer 993a7d403cfSEric Bénard clk_enable(host->clk); 994a7d403cfSEric Bénard if (mmc) 995d96be879SSascha Hauer ret = mmc_resume_host(mmc); 996d96be879SSascha Hauer 997d96be879SSascha Hauer return ret; 998d96be879SSascha Hauer } 999a7d403cfSEric Bénard 1000a7d403cfSEric Bénard static const struct dev_pm_ops mxcmci_pm_ops = { 1001a7d403cfSEric Bénard .suspend = mxcmci_suspend, 1002a7d403cfSEric Bénard .resume = mxcmci_resume, 1003a7d403cfSEric Bénard }; 1004a7d403cfSEric Bénard #endif 1005d96be879SSascha Hauer 1006d96be879SSascha Hauer static struct platform_driver mxcmci_driver = { 1007d96be879SSascha Hauer .probe = mxcmci_probe, 1008d96be879SSascha Hauer .remove = mxcmci_remove, 1009d96be879SSascha Hauer .driver = { 1010d96be879SSascha Hauer .name = DRIVER_NAME, 1011d96be879SSascha Hauer .owner = THIS_MODULE, 1012a7d403cfSEric Bénard #ifdef CONFIG_PM 1013a7d403cfSEric Bénard .pm = &mxcmci_pm_ops, 1014a7d403cfSEric Bénard #endif 1015d96be879SSascha Hauer } 1016d96be879SSascha Hauer }; 1017d96be879SSascha Hauer 1018d96be879SSascha Hauer static int __init mxcmci_init(void) 1019d96be879SSascha Hauer { 1020d96be879SSascha Hauer return platform_driver_register(&mxcmci_driver); 1021d96be879SSascha Hauer } 1022d96be879SSascha Hauer 1023d96be879SSascha Hauer static void __exit mxcmci_exit(void) 1024d96be879SSascha Hauer { 1025d96be879SSascha Hauer platform_driver_unregister(&mxcmci_driver); 1026d96be879SSascha Hauer } 1027d96be879SSascha Hauer 1028d96be879SSascha Hauer module_init(mxcmci_init); 1029d96be879SSascha Hauer module_exit(mxcmci_exit); 1030d96be879SSascha Hauer 1031d96be879SSascha Hauer MODULE_DESCRIPTION("i.MX Multimedia Card Interface Driver"); 1032d96be879SSascha Hauer MODULE_AUTHOR("Sascha Hauer, Pengutronix"); 1033d96be879SSascha Hauer MODULE_LICENSE("GPL"); 1034d96be879SSascha Hauer MODULE_ALIAS("platform:imx-mmc"); 1035