1d96be879SSascha Hauer /* 2d96be879SSascha Hauer * linux/drivers/mmc/host/mxcmmc.c - Freescale i.MX MMCI driver 3d96be879SSascha Hauer * 4d96be879SSascha Hauer * This is a driver for the SDHC controller found in Freescale MX2/MX3 5d96be879SSascha Hauer * SoCs. It is basically the same hardware as found on MX1 (imxmmc.c). 6d96be879SSascha Hauer * Unlike the hardware found on MX1, this hardware just works and does 73ad2f3fbSDaniel Mack * not need all the quirks found in imxmmc.c, hence the separate driver. 8d96be879SSascha Hauer * 9d96be879SSascha Hauer * Copyright (C) 2008 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de> 10d96be879SSascha Hauer * Copyright (C) 2006 Pavel Pisa, PiKRON <ppisa@pikron.com> 11d96be879SSascha Hauer * 12d96be879SSascha Hauer * derived from pxamci.c by Russell King 13d96be879SSascha Hauer * 14d96be879SSascha Hauer * This program is free software; you can redistribute it and/or modify 15d96be879SSascha Hauer * it under the terms of the GNU General Public License version 2 as 16d96be879SSascha Hauer * published by the Free Software Foundation. 17d96be879SSascha Hauer * 18d96be879SSascha Hauer */ 19d96be879SSascha Hauer 20d96be879SSascha Hauer #include <linux/module.h> 21d96be879SSascha Hauer #include <linux/init.h> 22d96be879SSascha Hauer #include <linux/ioport.h> 23d96be879SSascha Hauer #include <linux/platform_device.h> 24d96be879SSascha Hauer #include <linux/interrupt.h> 25d96be879SSascha Hauer #include <linux/irq.h> 26d96be879SSascha Hauer #include <linux/blkdev.h> 27d96be879SSascha Hauer #include <linux/dma-mapping.h> 28d96be879SSascha Hauer #include <linux/mmc/host.h> 29d96be879SSascha Hauer #include <linux/mmc/card.h> 30d96be879SSascha Hauer #include <linux/delay.h> 31d96be879SSascha Hauer #include <linux/clk.h> 32d96be879SSascha Hauer #include <linux/io.h> 33d96be879SSascha Hauer #include <linux/gpio.h> 3474b66954SAlberto Panizzo #include <linux/regulator/consumer.h> 35f53fbde4SSascha Hauer #include <linux/dmaengine.h> 36d96be879SSascha Hauer 37d96be879SSascha Hauer #include <asm/dma.h> 38d96be879SSascha Hauer #include <asm/irq.h> 39d96be879SSascha Hauer #include <asm/sizes.h> 40d96be879SSascha Hauer #include <mach/mmc.h> 41d96be879SSascha Hauer 42f53fbde4SSascha Hauer #include <mach/dma.h> 43edae8998SShawn Guo #include <mach/hardware.h> 44d96be879SSascha Hauer 459563b1dbSSascha Hauer #define DRIVER_NAME "mxc-mmc" 46d96be879SSascha Hauer 47d96be879SSascha Hauer #define MMC_REG_STR_STP_CLK 0x00 48d96be879SSascha Hauer #define MMC_REG_STATUS 0x04 49d96be879SSascha Hauer #define MMC_REG_CLK_RATE 0x08 50d96be879SSascha Hauer #define MMC_REG_CMD_DAT_CONT 0x0C 51d96be879SSascha Hauer #define MMC_REG_RES_TO 0x10 52d96be879SSascha Hauer #define MMC_REG_READ_TO 0x14 53d96be879SSascha Hauer #define MMC_REG_BLK_LEN 0x18 54d96be879SSascha Hauer #define MMC_REG_NOB 0x1C 55d96be879SSascha Hauer #define MMC_REG_REV_NO 0x20 56d96be879SSascha Hauer #define MMC_REG_INT_CNTR 0x24 57d96be879SSascha Hauer #define MMC_REG_CMD 0x28 58d96be879SSascha Hauer #define MMC_REG_ARG 0x2C 59d96be879SSascha Hauer #define MMC_REG_RES_FIFO 0x34 60d96be879SSascha Hauer #define MMC_REG_BUFFER_ACCESS 0x38 61d96be879SSascha Hauer 62d96be879SSascha Hauer #define STR_STP_CLK_RESET (1 << 3) 63d96be879SSascha Hauer #define STR_STP_CLK_START_CLK (1 << 1) 64d96be879SSascha Hauer #define STR_STP_CLK_STOP_CLK (1 << 0) 65d96be879SSascha Hauer 66d96be879SSascha Hauer #define STATUS_CARD_INSERTION (1 << 31) 67d96be879SSascha Hauer #define STATUS_CARD_REMOVAL (1 << 30) 68d96be879SSascha Hauer #define STATUS_YBUF_EMPTY (1 << 29) 69d96be879SSascha Hauer #define STATUS_XBUF_EMPTY (1 << 28) 70d96be879SSascha Hauer #define STATUS_YBUF_FULL (1 << 27) 71d96be879SSascha Hauer #define STATUS_XBUF_FULL (1 << 26) 72d96be879SSascha Hauer #define STATUS_BUF_UND_RUN (1 << 25) 73d96be879SSascha Hauer #define STATUS_BUF_OVFL (1 << 24) 74d96be879SSascha Hauer #define STATUS_SDIO_INT_ACTIVE (1 << 14) 75d96be879SSascha Hauer #define STATUS_END_CMD_RESP (1 << 13) 76d96be879SSascha Hauer #define STATUS_WRITE_OP_DONE (1 << 12) 77d96be879SSascha Hauer #define STATUS_DATA_TRANS_DONE (1 << 11) 78d96be879SSascha Hauer #define STATUS_READ_OP_DONE (1 << 11) 79d96be879SSascha Hauer #define STATUS_WR_CRC_ERROR_CODE_MASK (3 << 10) 80d96be879SSascha Hauer #define STATUS_CARD_BUS_CLK_RUN (1 << 8) 81d96be879SSascha Hauer #define STATUS_BUF_READ_RDY (1 << 7) 82d96be879SSascha Hauer #define STATUS_BUF_WRITE_RDY (1 << 6) 83d96be879SSascha Hauer #define STATUS_RESP_CRC_ERR (1 << 5) 84d96be879SSascha Hauer #define STATUS_CRC_READ_ERR (1 << 3) 85d96be879SSascha Hauer #define STATUS_CRC_WRITE_ERR (1 << 2) 86d96be879SSascha Hauer #define STATUS_TIME_OUT_RESP (1 << 1) 87d96be879SSascha Hauer #define STATUS_TIME_OUT_READ (1 << 0) 88d96be879SSascha Hauer #define STATUS_ERR_MASK 0x2f 89d96be879SSascha Hauer 90d96be879SSascha Hauer #define CMD_DAT_CONT_CMD_RESP_LONG_OFF (1 << 12) 91d96be879SSascha Hauer #define CMD_DAT_CONT_STOP_READWAIT (1 << 11) 92d96be879SSascha Hauer #define CMD_DAT_CONT_START_READWAIT (1 << 10) 93d96be879SSascha Hauer #define CMD_DAT_CONT_BUS_WIDTH_4 (2 << 8) 94d96be879SSascha Hauer #define CMD_DAT_CONT_INIT (1 << 7) 95d96be879SSascha Hauer #define CMD_DAT_CONT_WRITE (1 << 4) 96d96be879SSascha Hauer #define CMD_DAT_CONT_DATA_ENABLE (1 << 3) 97d96be879SSascha Hauer #define CMD_DAT_CONT_RESPONSE_48BIT_CRC (1 << 0) 98d96be879SSascha Hauer #define CMD_DAT_CONT_RESPONSE_136BIT (2 << 0) 99d96be879SSascha Hauer #define CMD_DAT_CONT_RESPONSE_48BIT (3 << 0) 100d96be879SSascha Hauer 101d96be879SSascha Hauer #define INT_SDIO_INT_WKP_EN (1 << 18) 102d96be879SSascha Hauer #define INT_CARD_INSERTION_WKP_EN (1 << 17) 103d96be879SSascha Hauer #define INT_CARD_REMOVAL_WKP_EN (1 << 16) 104d96be879SSascha Hauer #define INT_CARD_INSERTION_EN (1 << 15) 105d96be879SSascha Hauer #define INT_CARD_REMOVAL_EN (1 << 14) 106d96be879SSascha Hauer #define INT_SDIO_IRQ_EN (1 << 13) 107d96be879SSascha Hauer #define INT_DAT0_EN (1 << 12) 108d96be879SSascha Hauer #define INT_BUF_READ_EN (1 << 4) 109d96be879SSascha Hauer #define INT_BUF_WRITE_EN (1 << 3) 110d96be879SSascha Hauer #define INT_END_CMD_RES_EN (1 << 2) 111d96be879SSascha Hauer #define INT_WRITE_OP_DONE_EN (1 << 1) 112d96be879SSascha Hauer #define INT_READ_OP_EN (1 << 0) 113d96be879SSascha Hauer 114d96be879SSascha Hauer struct mxcmci_host { 115d96be879SSascha Hauer struct mmc_host *mmc; 116d96be879SSascha Hauer struct resource *res; 117d96be879SSascha Hauer void __iomem *base; 118d96be879SSascha Hauer int irq; 119d96be879SSascha Hauer int detect_irq; 120f53fbde4SSascha Hauer struct dma_chan *dma; 121f53fbde4SSascha Hauer struct dma_async_tx_descriptor *desc; 122d96be879SSascha Hauer int do_dma; 12316b3bf8cSEric Bénard int default_irq_mask; 124f441b993SDaniel Mack int use_sdio; 125d96be879SSascha Hauer unsigned int power_mode; 126d96be879SSascha Hauer struct imxmmc_platform_data *pdata; 127d96be879SSascha Hauer 128d96be879SSascha Hauer struct mmc_request *req; 129d96be879SSascha Hauer struct mmc_command *cmd; 130d96be879SSascha Hauer struct mmc_data *data; 131d96be879SSascha Hauer 132d96be879SSascha Hauer unsigned int datasize; 133d96be879SSascha Hauer unsigned int dma_dir; 134d96be879SSascha Hauer 135d96be879SSascha Hauer u16 rev_no; 136d96be879SSascha Hauer unsigned int cmdat; 137d96be879SSascha Hauer 138d96be879SSascha Hauer struct clk *clk; 139d96be879SSascha Hauer 140d96be879SSascha Hauer int clock; 141d96be879SSascha Hauer 142d96be879SSascha Hauer struct work_struct datawork; 143f441b993SDaniel Mack spinlock_t lock; 14474b66954SAlberto Panizzo 14574b66954SAlberto Panizzo struct regulator *vcc; 146f53fbde4SSascha Hauer 147f53fbde4SSascha Hauer int burstlen; 148f53fbde4SSascha Hauer int dmareq; 149f53fbde4SSascha Hauer struct dma_slave_config dma_slave_config; 150f53fbde4SSascha Hauer struct imx_dma_data dma_data; 151d96be879SSascha Hauer }; 152d96be879SSascha Hauer 15318489fa2SMartin Fuzzey static void mxcmci_set_clk_rate(struct mxcmci_host *host, unsigned int clk_ios); 15418489fa2SMartin Fuzzey 15574b66954SAlberto Panizzo static inline void mxcmci_init_ocr(struct mxcmci_host *host) 15674b66954SAlberto Panizzo { 15774b66954SAlberto Panizzo host->vcc = regulator_get(mmc_dev(host->mmc), "vmmc"); 15874b66954SAlberto Panizzo 15974b66954SAlberto Panizzo if (IS_ERR(host->vcc)) { 16074b66954SAlberto Panizzo host->vcc = NULL; 16174b66954SAlberto Panizzo } else { 16274b66954SAlberto Panizzo host->mmc->ocr_avail = mmc_regulator_get_ocrmask(host->vcc); 16374b66954SAlberto Panizzo if (host->pdata && host->pdata->ocr_avail) 16474b66954SAlberto Panizzo dev_warn(mmc_dev(host->mmc), 16574b66954SAlberto Panizzo "pdata->ocr_avail will not be used\n"); 16674b66954SAlberto Panizzo } 167d078d242SAlberto Panizzo 16874b66954SAlberto Panizzo if (host->vcc == NULL) { 16974b66954SAlberto Panizzo /* fall-back to platform data */ 17074b66954SAlberto Panizzo if (host->pdata && host->pdata->ocr_avail) 17174b66954SAlberto Panizzo host->mmc->ocr_avail = host->pdata->ocr_avail; 17274b66954SAlberto Panizzo else 17374b66954SAlberto Panizzo host->mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; 17474b66954SAlberto Panizzo } 17574b66954SAlberto Panizzo } 17674b66954SAlberto Panizzo 177d078d242SAlberto Panizzo static inline void mxcmci_set_power(struct mxcmci_host *host, 178d078d242SAlberto Panizzo unsigned char power_mode, 179d078d242SAlberto Panizzo unsigned int vdd) 18074b66954SAlberto Panizzo { 181d078d242SAlberto Panizzo if (host->vcc) { 182d078d242SAlberto Panizzo if (power_mode == MMC_POWER_UP) 183d078d242SAlberto Panizzo mmc_regulator_set_ocr(host->mmc, host->vcc, vdd); 184d078d242SAlberto Panizzo else if (power_mode == MMC_POWER_OFF) 185d078d242SAlberto Panizzo mmc_regulator_set_ocr(host->mmc, host->vcc, 0); 186d078d242SAlberto Panizzo } 187d078d242SAlberto Panizzo 18874b66954SAlberto Panizzo if (host->pdata && host->pdata->setpower) 18974b66954SAlberto Panizzo host->pdata->setpower(mmc_dev(host->mmc), vdd); 19074b66954SAlberto Panizzo } 19174b66954SAlberto Panizzo 192d96be879SSascha Hauer static inline int mxcmci_use_dma(struct mxcmci_host *host) 193d96be879SSascha Hauer { 194d96be879SSascha Hauer return host->do_dma; 195d96be879SSascha Hauer } 196d96be879SSascha Hauer 197d96be879SSascha Hauer static void mxcmci_softreset(struct mxcmci_host *host) 198d96be879SSascha Hauer { 199d96be879SSascha Hauer int i; 200d96be879SSascha Hauer 2014725f6f1SDaniel Mack dev_dbg(mmc_dev(host->mmc), "mxcmci_softreset\n"); 2024725f6f1SDaniel Mack 203d96be879SSascha Hauer /* reset sequence */ 204d96be879SSascha Hauer writew(STR_STP_CLK_RESET, host->base + MMC_REG_STR_STP_CLK); 205d96be879SSascha Hauer writew(STR_STP_CLK_RESET | STR_STP_CLK_START_CLK, 206d96be879SSascha Hauer host->base + MMC_REG_STR_STP_CLK); 207d96be879SSascha Hauer 208d96be879SSascha Hauer for (i = 0; i < 8; i++) 209d96be879SSascha Hauer writew(STR_STP_CLK_START_CLK, host->base + MMC_REG_STR_STP_CLK); 210d96be879SSascha Hauer 211d96be879SSascha Hauer writew(0xff, host->base + MMC_REG_RES_TO); 212d96be879SSascha Hauer } 213f53fbde4SSascha Hauer static int mxcmci_setup_dma(struct mmc_host *mmc); 214d96be879SSascha Hauer 215656217d2SMartin Fuzzey static int mxcmci_setup_data(struct mxcmci_host *host, struct mmc_data *data) 216d96be879SSascha Hauer { 217d96be879SSascha Hauer unsigned int nob = data->blocks; 218d96be879SSascha Hauer unsigned int blksz = data->blksz; 219d96be879SSascha Hauer unsigned int datasize = nob * blksz; 220d96be879SSascha Hauer struct scatterlist *sg; 22105f5799cSVinod Koul enum dma_transfer_direction slave_dirn; 222f53fbde4SSascha Hauer int i, nents; 223f53fbde4SSascha Hauer 224d96be879SSascha Hauer if (data->flags & MMC_DATA_STREAM) 225d96be879SSascha Hauer nob = 0xffff; 226d96be879SSascha Hauer 227d96be879SSascha Hauer host->data = data; 228d96be879SSascha Hauer data->bytes_xfered = 0; 229d96be879SSascha Hauer 230d96be879SSascha Hauer writew(nob, host->base + MMC_REG_NOB); 231d96be879SSascha Hauer writew(blksz, host->base + MMC_REG_BLK_LEN); 232d96be879SSascha Hauer host->datasize = datasize; 233d96be879SSascha Hauer 234f53fbde4SSascha Hauer if (!mxcmci_use_dma(host)) 235f53fbde4SSascha Hauer return 0; 236f53fbde4SSascha Hauer 237d96be879SSascha Hauer for_each_sg(data->sg, sg, data->sg_len, i) { 238d96be879SSascha Hauer if (sg->offset & 3 || sg->length & 3) { 239d96be879SSascha Hauer host->do_dma = 0; 240656217d2SMartin Fuzzey return 0; 241d96be879SSascha Hauer } 242d96be879SSascha Hauer } 243d96be879SSascha Hauer 24405f5799cSVinod Koul if (data->flags & MMC_DATA_READ) { 245d96be879SSascha Hauer host->dma_dir = DMA_FROM_DEVICE; 24605f5799cSVinod Koul slave_dirn = DMA_DEV_TO_MEM; 24705f5799cSVinod Koul } else { 248d96be879SSascha Hauer host->dma_dir = DMA_TO_DEVICE; 24905f5799cSVinod Koul slave_dirn = DMA_MEM_TO_DEV; 25005f5799cSVinod Koul } 251f53fbde4SSascha Hauer 252f53fbde4SSascha Hauer nents = dma_map_sg(host->dma->device->dev, data->sg, 253d96be879SSascha Hauer data->sg_len, host->dma_dir); 254f53fbde4SSascha Hauer if (nents != data->sg_len) 255f53fbde4SSascha Hauer return -EINVAL; 256d96be879SSascha Hauer 257f53fbde4SSascha Hauer host->desc = host->dma->device->device_prep_slave_sg(host->dma, 25805f5799cSVinod Koul data->sg, data->sg_len, slave_dirn, 259f53fbde4SSascha Hauer DMA_PREP_INTERRUPT | DMA_CTRL_ACK); 260d96be879SSascha Hauer 261f53fbde4SSascha Hauer if (!host->desc) { 262f53fbde4SSascha Hauer dma_unmap_sg(host->dma->device->dev, data->sg, data->sg_len, 263f53fbde4SSascha Hauer host->dma_dir); 264f53fbde4SSascha Hauer host->do_dma = 0; 265f53fbde4SSascha Hauer return 0; /* Fall back to PIO */ 266656217d2SMartin Fuzzey } 267d96be879SSascha Hauer wmb(); 268d96be879SSascha Hauer 269f53fbde4SSascha Hauer dmaengine_submit(host->desc); 270439aa0efSSascha Hauer dma_async_issue_pending(host->dma); 271f53fbde4SSascha Hauer 272656217d2SMartin Fuzzey return 0; 273d96be879SSascha Hauer } 274d96be879SSascha Hauer 275d96be879SSascha Hauer static int mxcmci_start_cmd(struct mxcmci_host *host, struct mmc_command *cmd, 276d96be879SSascha Hauer unsigned int cmdat) 277d96be879SSascha Hauer { 27816b3bf8cSEric Bénard u32 int_cntr = host->default_irq_mask; 279f441b993SDaniel Mack unsigned long flags; 280f441b993SDaniel Mack 281d96be879SSascha Hauer WARN_ON(host->cmd != NULL); 282d96be879SSascha Hauer host->cmd = cmd; 283d96be879SSascha Hauer 284d96be879SSascha Hauer switch (mmc_resp_type(cmd)) { 285d96be879SSascha Hauer case MMC_RSP_R1: /* short CRC, OPCODE */ 286d96be879SSascha Hauer case MMC_RSP_R1B:/* short CRC, OPCODE, BUSY */ 287d96be879SSascha Hauer cmdat |= CMD_DAT_CONT_RESPONSE_48BIT_CRC; 288d96be879SSascha Hauer break; 289d96be879SSascha Hauer case MMC_RSP_R2: /* long 136 bit + CRC */ 290d96be879SSascha Hauer cmdat |= CMD_DAT_CONT_RESPONSE_136BIT; 291d96be879SSascha Hauer break; 292d96be879SSascha Hauer case MMC_RSP_R3: /* short */ 293d96be879SSascha Hauer cmdat |= CMD_DAT_CONT_RESPONSE_48BIT; 294d96be879SSascha Hauer break; 295d96be879SSascha Hauer case MMC_RSP_NONE: 296d96be879SSascha Hauer break; 297d96be879SSascha Hauer default: 298d96be879SSascha Hauer dev_err(mmc_dev(host->mmc), "unhandled response type 0x%x\n", 299d96be879SSascha Hauer mmc_resp_type(cmd)); 300d96be879SSascha Hauer cmd->error = -EINVAL; 301d96be879SSascha Hauer return -EINVAL; 302d96be879SSascha Hauer } 303d96be879SSascha Hauer 304f441b993SDaniel Mack int_cntr = INT_END_CMD_RES_EN; 305f441b993SDaniel Mack 306d96be879SSascha Hauer if (mxcmci_use_dma(host)) 307f441b993SDaniel Mack int_cntr |= INT_READ_OP_EN | INT_WRITE_OP_DONE_EN; 308f441b993SDaniel Mack 309f441b993SDaniel Mack spin_lock_irqsave(&host->lock, flags); 310f441b993SDaniel Mack if (host->use_sdio) 311f441b993SDaniel Mack int_cntr |= INT_SDIO_IRQ_EN; 312f441b993SDaniel Mack writel(int_cntr, host->base + MMC_REG_INT_CNTR); 313f441b993SDaniel Mack spin_unlock_irqrestore(&host->lock, flags); 314d96be879SSascha Hauer 315d96be879SSascha Hauer writew(cmd->opcode, host->base + MMC_REG_CMD); 316d96be879SSascha Hauer writel(cmd->arg, host->base + MMC_REG_ARG); 317d96be879SSascha Hauer writew(cmdat, host->base + MMC_REG_CMD_DAT_CONT); 318d96be879SSascha Hauer 319d96be879SSascha Hauer return 0; 320d96be879SSascha Hauer } 321d96be879SSascha Hauer 322d96be879SSascha Hauer static void mxcmci_finish_request(struct mxcmci_host *host, 323d96be879SSascha Hauer struct mmc_request *req) 324d96be879SSascha Hauer { 32516b3bf8cSEric Bénard u32 int_cntr = host->default_irq_mask; 326f441b993SDaniel Mack unsigned long flags; 327f441b993SDaniel Mack 328f441b993SDaniel Mack spin_lock_irqsave(&host->lock, flags); 329f441b993SDaniel Mack if (host->use_sdio) 330f441b993SDaniel Mack int_cntr |= INT_SDIO_IRQ_EN; 331f441b993SDaniel Mack writel(int_cntr, host->base + MMC_REG_INT_CNTR); 332f441b993SDaniel Mack spin_unlock_irqrestore(&host->lock, flags); 333d96be879SSascha Hauer 334d96be879SSascha Hauer host->req = NULL; 335d96be879SSascha Hauer host->cmd = NULL; 336d96be879SSascha Hauer host->data = NULL; 337d96be879SSascha Hauer 338d96be879SSascha Hauer mmc_request_done(host->mmc, req); 339d96be879SSascha Hauer } 340d96be879SSascha Hauer 341d96be879SSascha Hauer static int mxcmci_finish_data(struct mxcmci_host *host, unsigned int stat) 342d96be879SSascha Hauer { 343d96be879SSascha Hauer struct mmc_data *data = host->data; 344d96be879SSascha Hauer int data_error; 345d96be879SSascha Hauer 346d96be879SSascha Hauer if (mxcmci_use_dma(host)) { 347f53fbde4SSascha Hauer dmaengine_terminate_all(host->dma); 348f53fbde4SSascha Hauer dma_unmap_sg(host->dma->device->dev, data->sg, data->sg_len, 349d96be879SSascha Hauer host->dma_dir); 350d96be879SSascha Hauer } 351d96be879SSascha Hauer 352d96be879SSascha Hauer if (stat & STATUS_ERR_MASK) { 353d96be879SSascha Hauer dev_dbg(mmc_dev(host->mmc), "request failed. status: 0x%08x\n", 354d96be879SSascha Hauer stat); 355d96be879SSascha Hauer if (stat & STATUS_CRC_READ_ERR) { 3564725f6f1SDaniel Mack dev_err(mmc_dev(host->mmc), "%s: -EILSEQ\n", __func__); 357d96be879SSascha Hauer data->error = -EILSEQ; 358d96be879SSascha Hauer } else if (stat & STATUS_CRC_WRITE_ERR) { 359d96be879SSascha Hauer u32 err_code = (stat >> 9) & 0x3; 3604725f6f1SDaniel Mack if (err_code == 2) { /* No CRC response */ 3614725f6f1SDaniel Mack dev_err(mmc_dev(host->mmc), 3624725f6f1SDaniel Mack "%s: No CRC -ETIMEDOUT\n", __func__); 363d96be879SSascha Hauer data->error = -ETIMEDOUT; 364d96be879SSascha Hauer } else { 3654725f6f1SDaniel Mack dev_err(mmc_dev(host->mmc), 3664725f6f1SDaniel Mack "%s: -EILSEQ\n", __func__); 3674725f6f1SDaniel Mack data->error = -EILSEQ; 3684725f6f1SDaniel Mack } 3694725f6f1SDaniel Mack } else if (stat & STATUS_TIME_OUT_READ) { 3704725f6f1SDaniel Mack dev_err(mmc_dev(host->mmc), 3714725f6f1SDaniel Mack "%s: read -ETIMEDOUT\n", __func__); 3724725f6f1SDaniel Mack data->error = -ETIMEDOUT; 3734725f6f1SDaniel Mack } else { 3744725f6f1SDaniel Mack dev_err(mmc_dev(host->mmc), "%s: -EIO\n", __func__); 375d96be879SSascha Hauer data->error = -EIO; 376d96be879SSascha Hauer } 377d96be879SSascha Hauer } else { 378d96be879SSascha Hauer data->bytes_xfered = host->datasize; 379d96be879SSascha Hauer } 380d96be879SSascha Hauer 381d96be879SSascha Hauer data_error = data->error; 382d96be879SSascha Hauer 383d96be879SSascha Hauer host->data = NULL; 384d96be879SSascha Hauer 385d96be879SSascha Hauer return data_error; 386d96be879SSascha Hauer } 387d96be879SSascha Hauer 388d96be879SSascha Hauer static void mxcmci_read_response(struct mxcmci_host *host, unsigned int stat) 389d96be879SSascha Hauer { 390d96be879SSascha Hauer struct mmc_command *cmd = host->cmd; 391d96be879SSascha Hauer int i; 392d96be879SSascha Hauer u32 a, b, c; 393d96be879SSascha Hauer 394d96be879SSascha Hauer if (!cmd) 395d96be879SSascha Hauer return; 396d96be879SSascha Hauer 397d96be879SSascha Hauer if (stat & STATUS_TIME_OUT_RESP) { 398d96be879SSascha Hauer dev_dbg(mmc_dev(host->mmc), "CMD TIMEOUT\n"); 399d96be879SSascha Hauer cmd->error = -ETIMEDOUT; 400d96be879SSascha Hauer } else if (stat & STATUS_RESP_CRC_ERR && cmd->flags & MMC_RSP_CRC) { 401d96be879SSascha Hauer dev_dbg(mmc_dev(host->mmc), "cmd crc error\n"); 402d96be879SSascha Hauer cmd->error = -EILSEQ; 403d96be879SSascha Hauer } 404d96be879SSascha Hauer 405d96be879SSascha Hauer if (cmd->flags & MMC_RSP_PRESENT) { 406d96be879SSascha Hauer if (cmd->flags & MMC_RSP_136) { 407d96be879SSascha Hauer for (i = 0; i < 4; i++) { 408d96be879SSascha Hauer a = readw(host->base + MMC_REG_RES_FIFO); 409d96be879SSascha Hauer b = readw(host->base + MMC_REG_RES_FIFO); 410d96be879SSascha Hauer cmd->resp[i] = a << 16 | b; 411d96be879SSascha Hauer } 412d96be879SSascha Hauer } else { 413d96be879SSascha Hauer a = readw(host->base + MMC_REG_RES_FIFO); 414d96be879SSascha Hauer b = readw(host->base + MMC_REG_RES_FIFO); 415d96be879SSascha Hauer c = readw(host->base + MMC_REG_RES_FIFO); 416d96be879SSascha Hauer cmd->resp[0] = a << 24 | b << 8 | c >> 8; 417d96be879SSascha Hauer } 418d96be879SSascha Hauer } 419d96be879SSascha Hauer } 420d96be879SSascha Hauer 421d96be879SSascha Hauer static int mxcmci_poll_status(struct mxcmci_host *host, u32 mask) 422d96be879SSascha Hauer { 423d96be879SSascha Hauer u32 stat; 424d96be879SSascha Hauer unsigned long timeout = jiffies + HZ; 425d96be879SSascha Hauer 426d96be879SSascha Hauer do { 427d96be879SSascha Hauer stat = readl(host->base + MMC_REG_STATUS); 428d96be879SSascha Hauer if (stat & STATUS_ERR_MASK) 429d96be879SSascha Hauer return stat; 43018489fa2SMartin Fuzzey if (time_after(jiffies, timeout)) { 43118489fa2SMartin Fuzzey mxcmci_softreset(host); 43218489fa2SMartin Fuzzey mxcmci_set_clk_rate(host, host->clock); 433d96be879SSascha Hauer return STATUS_TIME_OUT_READ; 43418489fa2SMartin Fuzzey } 435d96be879SSascha Hauer if (stat & mask) 436d96be879SSascha Hauer return 0; 437d96be879SSascha Hauer cpu_relax(); 438d96be879SSascha Hauer } while (1); 439d96be879SSascha Hauer } 440d96be879SSascha Hauer 441d96be879SSascha Hauer static int mxcmci_pull(struct mxcmci_host *host, void *_buf, int bytes) 442d96be879SSascha Hauer { 443d96be879SSascha Hauer unsigned int stat; 444d96be879SSascha Hauer u32 *buf = _buf; 445d96be879SSascha Hauer 446d96be879SSascha Hauer while (bytes > 3) { 447d96be879SSascha Hauer stat = mxcmci_poll_status(host, 448d96be879SSascha Hauer STATUS_BUF_READ_RDY | STATUS_READ_OP_DONE); 449d96be879SSascha Hauer if (stat) 450d96be879SSascha Hauer return stat; 451d96be879SSascha Hauer *buf++ = readl(host->base + MMC_REG_BUFFER_ACCESS); 452d96be879SSascha Hauer bytes -= 4; 453d96be879SSascha Hauer } 454d96be879SSascha Hauer 455d96be879SSascha Hauer if (bytes) { 456d96be879SSascha Hauer u8 *b = (u8 *)buf; 457d96be879SSascha Hauer u32 tmp; 458d96be879SSascha Hauer 459d96be879SSascha Hauer stat = mxcmci_poll_status(host, 460d96be879SSascha Hauer STATUS_BUF_READ_RDY | STATUS_READ_OP_DONE); 461d96be879SSascha Hauer if (stat) 462d96be879SSascha Hauer return stat; 463d96be879SSascha Hauer tmp = readl(host->base + MMC_REG_BUFFER_ACCESS); 464d96be879SSascha Hauer memcpy(b, &tmp, bytes); 465d96be879SSascha Hauer } 466d96be879SSascha Hauer 467d96be879SSascha Hauer return 0; 468d96be879SSascha Hauer } 469d96be879SSascha Hauer 470d96be879SSascha Hauer static int mxcmci_push(struct mxcmci_host *host, void *_buf, int bytes) 471d96be879SSascha Hauer { 472d96be879SSascha Hauer unsigned int stat; 473d96be879SSascha Hauer u32 *buf = _buf; 474d96be879SSascha Hauer 475d96be879SSascha Hauer while (bytes > 3) { 476d96be879SSascha Hauer stat = mxcmci_poll_status(host, STATUS_BUF_WRITE_RDY); 477d96be879SSascha Hauer if (stat) 478d96be879SSascha Hauer return stat; 479d96be879SSascha Hauer writel(*buf++, host->base + MMC_REG_BUFFER_ACCESS); 480d96be879SSascha Hauer bytes -= 4; 481d96be879SSascha Hauer } 482d96be879SSascha Hauer 483d96be879SSascha Hauer if (bytes) { 484d96be879SSascha Hauer u8 *b = (u8 *)buf; 485d96be879SSascha Hauer u32 tmp; 486d96be879SSascha Hauer 487d96be879SSascha Hauer stat = mxcmci_poll_status(host, STATUS_BUF_WRITE_RDY); 488d96be879SSascha Hauer if (stat) 489d96be879SSascha Hauer return stat; 490d96be879SSascha Hauer 491d96be879SSascha Hauer memcpy(&tmp, b, bytes); 492d96be879SSascha Hauer writel(tmp, host->base + MMC_REG_BUFFER_ACCESS); 493d96be879SSascha Hauer } 494d96be879SSascha Hauer 495d96be879SSascha Hauer stat = mxcmci_poll_status(host, STATUS_BUF_WRITE_RDY); 496d96be879SSascha Hauer if (stat) 497d96be879SSascha Hauer return stat; 498d96be879SSascha Hauer 499d96be879SSascha Hauer return 0; 500d96be879SSascha Hauer } 501d96be879SSascha Hauer 502d96be879SSascha Hauer static int mxcmci_transfer_data(struct mxcmci_host *host) 503d96be879SSascha Hauer { 504d96be879SSascha Hauer struct mmc_data *data = host->req->data; 505d96be879SSascha Hauer struct scatterlist *sg; 506d96be879SSascha Hauer int stat, i; 507d96be879SSascha Hauer 508d96be879SSascha Hauer host->data = data; 509d96be879SSascha Hauer host->datasize = 0; 510d96be879SSascha Hauer 511d96be879SSascha Hauer if (data->flags & MMC_DATA_READ) { 512d96be879SSascha Hauer for_each_sg(data->sg, sg, data->sg_len, i) { 513d96be879SSascha Hauer stat = mxcmci_pull(host, sg_virt(sg), sg->length); 514d96be879SSascha Hauer if (stat) 515d96be879SSascha Hauer return stat; 516d96be879SSascha Hauer host->datasize += sg->length; 517d96be879SSascha Hauer } 518d96be879SSascha Hauer } else { 519d96be879SSascha Hauer for_each_sg(data->sg, sg, data->sg_len, i) { 520d96be879SSascha Hauer stat = mxcmci_push(host, sg_virt(sg), sg->length); 521d96be879SSascha Hauer if (stat) 522d96be879SSascha Hauer return stat; 523d96be879SSascha Hauer host->datasize += sg->length; 524d96be879SSascha Hauer } 525d96be879SSascha Hauer stat = mxcmci_poll_status(host, STATUS_WRITE_OP_DONE); 526d96be879SSascha Hauer if (stat) 527d96be879SSascha Hauer return stat; 528d96be879SSascha Hauer } 529d96be879SSascha Hauer return 0; 530d96be879SSascha Hauer } 531d96be879SSascha Hauer 532d96be879SSascha Hauer static void mxcmci_datawork(struct work_struct *work) 533d96be879SSascha Hauer { 534d96be879SSascha Hauer struct mxcmci_host *host = container_of(work, struct mxcmci_host, 535d96be879SSascha Hauer datawork); 536d96be879SSascha Hauer int datastat = mxcmci_transfer_data(host); 5374a31f2efSDaniel Mack 5384a31f2efSDaniel Mack writel(STATUS_READ_OP_DONE | STATUS_WRITE_OP_DONE, 5394a31f2efSDaniel Mack host->base + MMC_REG_STATUS); 540d96be879SSascha Hauer mxcmci_finish_data(host, datastat); 541d96be879SSascha Hauer 542d96be879SSascha Hauer if (host->req->stop) { 543d96be879SSascha Hauer if (mxcmci_start_cmd(host, host->req->stop, 0)) { 544d96be879SSascha Hauer mxcmci_finish_request(host, host->req); 545d96be879SSascha Hauer return; 546d96be879SSascha Hauer } 547d96be879SSascha Hauer } else { 548d96be879SSascha Hauer mxcmci_finish_request(host, host->req); 549d96be879SSascha Hauer } 550d96be879SSascha Hauer } 551d96be879SSascha Hauer 552d96be879SSascha Hauer static void mxcmci_data_done(struct mxcmci_host *host, unsigned int stat) 553d96be879SSascha Hauer { 554d96be879SSascha Hauer struct mmc_data *data = host->data; 555d96be879SSascha Hauer int data_error; 556d96be879SSascha Hauer 557d96be879SSascha Hauer if (!data) 558d96be879SSascha Hauer return; 559d96be879SSascha Hauer 560d96be879SSascha Hauer data_error = mxcmci_finish_data(host, stat); 561d96be879SSascha Hauer 562d96be879SSascha Hauer mxcmci_read_response(host, stat); 563d96be879SSascha Hauer host->cmd = NULL; 564d96be879SSascha Hauer 565d96be879SSascha Hauer if (host->req->stop) { 566d96be879SSascha Hauer if (mxcmci_start_cmd(host, host->req->stop, 0)) { 567d96be879SSascha Hauer mxcmci_finish_request(host, host->req); 568d96be879SSascha Hauer return; 569d96be879SSascha Hauer } 570d96be879SSascha Hauer } else { 571d96be879SSascha Hauer mxcmci_finish_request(host, host->req); 572d96be879SSascha Hauer } 573d96be879SSascha Hauer } 574d96be879SSascha Hauer 575d96be879SSascha Hauer static void mxcmci_cmd_done(struct mxcmci_host *host, unsigned int stat) 576d96be879SSascha Hauer { 577d96be879SSascha Hauer mxcmci_read_response(host, stat); 578d96be879SSascha Hauer host->cmd = NULL; 579d96be879SSascha Hauer 580d96be879SSascha Hauer if (!host->data && host->req) { 581d96be879SSascha Hauer mxcmci_finish_request(host, host->req); 582d96be879SSascha Hauer return; 583d96be879SSascha Hauer } 584d96be879SSascha Hauer 585d96be879SSascha Hauer /* For the DMA case the DMA engine handles the data transfer 586fd589a8fSAnand Gadiyar * automatically. For non DMA we have to do it ourselves. 587d96be879SSascha Hauer * Don't do it in interrupt context though. 588d96be879SSascha Hauer */ 589d96be879SSascha Hauer if (!mxcmci_use_dma(host) && host->data) 590d96be879SSascha Hauer schedule_work(&host->datawork); 591d96be879SSascha Hauer 592d96be879SSascha Hauer } 593d96be879SSascha Hauer 594d96be879SSascha Hauer static irqreturn_t mxcmci_irq(int irq, void *devid) 595d96be879SSascha Hauer { 596d96be879SSascha Hauer struct mxcmci_host *host = devid; 597f441b993SDaniel Mack unsigned long flags; 598f441b993SDaniel Mack bool sdio_irq; 599d96be879SSascha Hauer u32 stat; 600d96be879SSascha Hauer 601d96be879SSascha Hauer stat = readl(host->base + MMC_REG_STATUS); 6024a31f2efSDaniel Mack writel(stat & ~(STATUS_SDIO_INT_ACTIVE | STATUS_DATA_TRANS_DONE | 6034a31f2efSDaniel Mack STATUS_WRITE_OP_DONE), host->base + MMC_REG_STATUS); 604d96be879SSascha Hauer 605d96be879SSascha Hauer dev_dbg(mmc_dev(host->mmc), "%s: 0x%08x\n", __func__, stat); 606d96be879SSascha Hauer 607f441b993SDaniel Mack spin_lock_irqsave(&host->lock, flags); 608f441b993SDaniel Mack sdio_irq = (stat & STATUS_SDIO_INT_ACTIVE) && host->use_sdio; 609f441b993SDaniel Mack spin_unlock_irqrestore(&host->lock, flags); 610f441b993SDaniel Mack 6114a31f2efSDaniel Mack if (mxcmci_use_dma(host) && 6124a31f2efSDaniel Mack (stat & (STATUS_READ_OP_DONE | STATUS_WRITE_OP_DONE))) 6134a31f2efSDaniel Mack writel(STATUS_READ_OP_DONE | STATUS_WRITE_OP_DONE, 6144a31f2efSDaniel Mack host->base + MMC_REG_STATUS); 6154a31f2efSDaniel Mack 616f441b993SDaniel Mack if (sdio_irq) { 617f441b993SDaniel Mack writel(STATUS_SDIO_INT_ACTIVE, host->base + MMC_REG_STATUS); 618f441b993SDaniel Mack mmc_signal_sdio_irq(host->mmc); 619f441b993SDaniel Mack } 620f441b993SDaniel Mack 621d96be879SSascha Hauer if (stat & STATUS_END_CMD_RESP) 622d96be879SSascha Hauer mxcmci_cmd_done(host, stat); 623f441b993SDaniel Mack 624d96be879SSascha Hauer if (mxcmci_use_dma(host) && 625d96be879SSascha Hauer (stat & (STATUS_DATA_TRANS_DONE | STATUS_WRITE_OP_DONE))) 626d96be879SSascha Hauer mxcmci_data_done(host, stat); 627f53fbde4SSascha Hauer 62816b3bf8cSEric Bénard if (host->default_irq_mask && 62916b3bf8cSEric Bénard (stat & (STATUS_CARD_INSERTION | STATUS_CARD_REMOVAL))) 63016b3bf8cSEric Bénard mmc_detect_change(host->mmc, msecs_to_jiffies(200)); 631f53fbde4SSascha Hauer 632d96be879SSascha Hauer return IRQ_HANDLED; 633d96be879SSascha Hauer } 634d96be879SSascha Hauer 635d96be879SSascha Hauer static void mxcmci_request(struct mmc_host *mmc, struct mmc_request *req) 636d96be879SSascha Hauer { 637d96be879SSascha Hauer struct mxcmci_host *host = mmc_priv(mmc); 638d96be879SSascha Hauer unsigned int cmdat = host->cmdat; 639656217d2SMartin Fuzzey int error; 640d96be879SSascha Hauer 641d96be879SSascha Hauer WARN_ON(host->req != NULL); 642d96be879SSascha Hauer 643d96be879SSascha Hauer host->req = req; 644d96be879SSascha Hauer host->cmdat &= ~CMD_DAT_CONT_INIT; 645f53fbde4SSascha Hauer 646f53fbde4SSascha Hauer if (host->dma) 647d96be879SSascha Hauer host->do_dma = 1; 648f53fbde4SSascha Hauer 649d96be879SSascha Hauer if (req->data) { 650656217d2SMartin Fuzzey error = mxcmci_setup_data(host, req->data); 651656217d2SMartin Fuzzey if (error) { 652656217d2SMartin Fuzzey req->cmd->error = error; 653656217d2SMartin Fuzzey goto out; 654656217d2SMartin Fuzzey } 655656217d2SMartin Fuzzey 656d96be879SSascha Hauer 657d96be879SSascha Hauer cmdat |= CMD_DAT_CONT_DATA_ENABLE; 658d96be879SSascha Hauer 659d96be879SSascha Hauer if (req->data->flags & MMC_DATA_WRITE) 660d96be879SSascha Hauer cmdat |= CMD_DAT_CONT_WRITE; 661d96be879SSascha Hauer } 662d96be879SSascha Hauer 663656217d2SMartin Fuzzey error = mxcmci_start_cmd(host, req->cmd, cmdat); 664f53fbde4SSascha Hauer 665656217d2SMartin Fuzzey out: 666656217d2SMartin Fuzzey if (error) 667d96be879SSascha Hauer mxcmci_finish_request(host, req); 668d96be879SSascha Hauer } 669d96be879SSascha Hauer 670d96be879SSascha Hauer static void mxcmci_set_clk_rate(struct mxcmci_host *host, unsigned int clk_ios) 671d96be879SSascha Hauer { 672d96be879SSascha Hauer unsigned int divider; 673d96be879SSascha Hauer int prescaler = 0; 674d96be879SSascha Hauer unsigned int clk_in = clk_get_rate(host->clk); 675d96be879SSascha Hauer 676d96be879SSascha Hauer while (prescaler <= 0x800) { 677d96be879SSascha Hauer for (divider = 1; divider <= 0xF; divider++) { 678d96be879SSascha Hauer int x; 679d96be879SSascha Hauer 680d96be879SSascha Hauer x = (clk_in / (divider + 1)); 681d96be879SSascha Hauer 682d96be879SSascha Hauer if (prescaler) 683d96be879SSascha Hauer x /= (prescaler * 2); 684d96be879SSascha Hauer 685d96be879SSascha Hauer if (x <= clk_ios) 686d96be879SSascha Hauer break; 687d96be879SSascha Hauer } 688d96be879SSascha Hauer if (divider < 0x10) 689d96be879SSascha Hauer break; 690d96be879SSascha Hauer 691d96be879SSascha Hauer if (prescaler == 0) 692d96be879SSascha Hauer prescaler = 1; 693d96be879SSascha Hauer else 694d96be879SSascha Hauer prescaler <<= 1; 695d96be879SSascha Hauer } 696d96be879SSascha Hauer 697d96be879SSascha Hauer writew((prescaler << 4) | divider, host->base + MMC_REG_CLK_RATE); 698d96be879SSascha Hauer 699d96be879SSascha Hauer dev_dbg(mmc_dev(host->mmc), "scaler: %d divider: %d in: %d out: %d\n", 700d96be879SSascha Hauer prescaler, divider, clk_in, clk_ios); 701d96be879SSascha Hauer } 702d96be879SSascha Hauer 703f53fbde4SSascha Hauer static int mxcmci_setup_dma(struct mmc_host *mmc) 704f53fbde4SSascha Hauer { 705f53fbde4SSascha Hauer struct mxcmci_host *host = mmc_priv(mmc); 706f53fbde4SSascha Hauer struct dma_slave_config *config = &host->dma_slave_config; 707f53fbde4SSascha Hauer 708f53fbde4SSascha Hauer config->dst_addr = host->res->start + MMC_REG_BUFFER_ACCESS; 709f53fbde4SSascha Hauer config->src_addr = host->res->start + MMC_REG_BUFFER_ACCESS; 710f53fbde4SSascha Hauer config->dst_addr_width = 4; 711f53fbde4SSascha Hauer config->src_addr_width = 4; 712f53fbde4SSascha Hauer config->dst_maxburst = host->burstlen; 713f53fbde4SSascha Hauer config->src_maxburst = host->burstlen; 714f53fbde4SSascha Hauer 715f53fbde4SSascha Hauer return dmaengine_slave_config(host->dma, config); 716f53fbde4SSascha Hauer } 717f53fbde4SSascha Hauer 718d96be879SSascha Hauer static void mxcmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 719d96be879SSascha Hauer { 720d96be879SSascha Hauer struct mxcmci_host *host = mmc_priv(mmc); 721f53fbde4SSascha Hauer int burstlen, ret; 722f53fbde4SSascha Hauer 723d96be879SSascha Hauer /* 7246584cb88SSascha Hauer * use burstlen of 64 (16 words) in 4 bit mode (--> reg value 0) 7256584cb88SSascha Hauer * use burstlen of 16 (4 words) in 1 bit mode (--> reg value 16) 726d96be879SSascha Hauer */ 727d96be879SSascha Hauer if (ios->bus_width == MMC_BUS_WIDTH_4) 728f53fbde4SSascha Hauer burstlen = 16; 7296584cb88SSascha Hauer else 7306584cb88SSascha Hauer burstlen = 4; 731d96be879SSascha Hauer 732f53fbde4SSascha Hauer if (mxcmci_use_dma(host) && burstlen != host->burstlen) { 733f53fbde4SSascha Hauer host->burstlen = burstlen; 734f53fbde4SSascha Hauer ret = mxcmci_setup_dma(mmc); 735f53fbde4SSascha Hauer if (ret) { 736f53fbde4SSascha Hauer dev_err(mmc_dev(host->mmc), 737f53fbde4SSascha Hauer "failed to config DMA channel. Falling back to PIO\n"); 738f53fbde4SSascha Hauer dma_release_channel(host->dma); 739f53fbde4SSascha Hauer host->do_dma = 0; 740e58f516fSSascha Hauer host->dma = NULL; 741f53fbde4SSascha Hauer } 742f53fbde4SSascha Hauer } 743f53fbde4SSascha Hauer 744d96be879SSascha Hauer if (ios->bus_width == MMC_BUS_WIDTH_4) 745d96be879SSascha Hauer host->cmdat |= CMD_DAT_CONT_BUS_WIDTH_4; 746d96be879SSascha Hauer else 747d96be879SSascha Hauer host->cmdat &= ~CMD_DAT_CONT_BUS_WIDTH_4; 748d96be879SSascha Hauer 749d96be879SSascha Hauer if (host->power_mode != ios->power_mode) { 750d078d242SAlberto Panizzo mxcmci_set_power(host, ios->power_mode, ios->vdd); 751d96be879SSascha Hauer host->power_mode = ios->power_mode; 75274b66954SAlberto Panizzo 753d96be879SSascha Hauer if (ios->power_mode == MMC_POWER_ON) 754d96be879SSascha Hauer host->cmdat |= CMD_DAT_CONT_INIT; 755d96be879SSascha Hauer } 756d96be879SSascha Hauer 757d96be879SSascha Hauer if (ios->clock) { 758d96be879SSascha Hauer mxcmci_set_clk_rate(host, ios->clock); 759d96be879SSascha Hauer writew(STR_STP_CLK_START_CLK, host->base + MMC_REG_STR_STP_CLK); 760d96be879SSascha Hauer } else { 761d96be879SSascha Hauer writew(STR_STP_CLK_STOP_CLK, host->base + MMC_REG_STR_STP_CLK); 762d96be879SSascha Hauer } 763d96be879SSascha Hauer 764d96be879SSascha Hauer host->clock = ios->clock; 765d96be879SSascha Hauer } 766d96be879SSascha Hauer 767d96be879SSascha Hauer static irqreturn_t mxcmci_detect_irq(int irq, void *data) 768d96be879SSascha Hauer { 769d96be879SSascha Hauer struct mmc_host *mmc = data; 770d96be879SSascha Hauer 771d96be879SSascha Hauer dev_dbg(mmc_dev(mmc), "%s\n", __func__); 772d96be879SSascha Hauer 773d96be879SSascha Hauer mmc_detect_change(mmc, msecs_to_jiffies(250)); 774d96be879SSascha Hauer return IRQ_HANDLED; 775d96be879SSascha Hauer } 776d96be879SSascha Hauer 777d96be879SSascha Hauer static int mxcmci_get_ro(struct mmc_host *mmc) 778d96be879SSascha Hauer { 779d96be879SSascha Hauer struct mxcmci_host *host = mmc_priv(mmc); 780d96be879SSascha Hauer 781d96be879SSascha Hauer if (host->pdata && host->pdata->get_ro) 782d96be879SSascha Hauer return !!host->pdata->get_ro(mmc_dev(mmc)); 783d96be879SSascha Hauer /* 784d96be879SSascha Hauer * Board doesn't support read only detection; let the mmc core 785d96be879SSascha Hauer * decide what to do. 786d96be879SSascha Hauer */ 787d96be879SSascha Hauer return -ENOSYS; 788d96be879SSascha Hauer } 789d96be879SSascha Hauer 790f441b993SDaniel Mack static void mxcmci_enable_sdio_irq(struct mmc_host *mmc, int enable) 791f441b993SDaniel Mack { 792f441b993SDaniel Mack struct mxcmci_host *host = mmc_priv(mmc); 793f441b993SDaniel Mack unsigned long flags; 794f441b993SDaniel Mack u32 int_cntr; 795f441b993SDaniel Mack 796f441b993SDaniel Mack spin_lock_irqsave(&host->lock, flags); 797f441b993SDaniel Mack host->use_sdio = enable; 798f441b993SDaniel Mack int_cntr = readl(host->base + MMC_REG_INT_CNTR); 799f441b993SDaniel Mack 800f441b993SDaniel Mack if (enable) 801f441b993SDaniel Mack int_cntr |= INT_SDIO_IRQ_EN; 802f441b993SDaniel Mack else 803f441b993SDaniel Mack int_cntr &= ~INT_SDIO_IRQ_EN; 804f441b993SDaniel Mack 805f441b993SDaniel Mack writel(int_cntr, host->base + MMC_REG_INT_CNTR); 806f441b993SDaniel Mack spin_unlock_irqrestore(&host->lock, flags); 807f441b993SDaniel Mack } 808d96be879SSascha Hauer 8093fcb027dSDaniel Mack static void mxcmci_init_card(struct mmc_host *host, struct mmc_card *card) 8103fcb027dSDaniel Mack { 8113fcb027dSDaniel Mack /* 8123fcb027dSDaniel Mack * MX3 SoCs have a silicon bug which corrupts CRC calculation of 8133fcb027dSDaniel Mack * multi-block transfers when connected SDIO peripheral doesn't 8143fcb027dSDaniel Mack * drive the BUSY line as required by the specs. 8153fcb027dSDaniel Mack * One way to prevent this is to only allow 1-bit transfers. 8163fcb027dSDaniel Mack */ 8173fcb027dSDaniel Mack 8183fcb027dSDaniel Mack if (cpu_is_mx3() && card->type == MMC_TYPE_SDIO) 8193fcb027dSDaniel Mack host->caps &= ~MMC_CAP_4_BIT_DATA; 8203fcb027dSDaniel Mack else 8213fcb027dSDaniel Mack host->caps |= MMC_CAP_4_BIT_DATA; 8223fcb027dSDaniel Mack } 8233fcb027dSDaniel Mack 824f53fbde4SSascha Hauer static bool filter(struct dma_chan *chan, void *param) 825f53fbde4SSascha Hauer { 826f53fbde4SSascha Hauer struct mxcmci_host *host = param; 827f53fbde4SSascha Hauer 828f53fbde4SSascha Hauer if (!imx_dma_is_general_purpose(chan)) 829f53fbde4SSascha Hauer return false; 830f53fbde4SSascha Hauer 831f53fbde4SSascha Hauer chan->private = &host->dma_data; 832f53fbde4SSascha Hauer 833f53fbde4SSascha Hauer return true; 834f53fbde4SSascha Hauer } 835f53fbde4SSascha Hauer 836d96be879SSascha Hauer static const struct mmc_host_ops mxcmci_ops = { 837d96be879SSascha Hauer .request = mxcmci_request, 838d96be879SSascha Hauer .set_ios = mxcmci_set_ios, 839d96be879SSascha Hauer .get_ro = mxcmci_get_ro, 840f441b993SDaniel Mack .enable_sdio_irq = mxcmci_enable_sdio_irq, 8413fcb027dSDaniel Mack .init_card = mxcmci_init_card, 842d96be879SSascha Hauer }; 843d96be879SSascha Hauer 844d96be879SSascha Hauer static int mxcmci_probe(struct platform_device *pdev) 845d96be879SSascha Hauer { 846d96be879SSascha Hauer struct mmc_host *mmc; 847d96be879SSascha Hauer struct mxcmci_host *host = NULL; 848c0521bafSUwe Kleine-König struct resource *iores, *r; 849d96be879SSascha Hauer int ret = 0, irq; 850f53fbde4SSascha Hauer dma_cap_mask_t mask; 851d96be879SSascha Hauer 852a3c76eb9SGirish K S pr_info("i.MX SDHC driver\n"); 853d96be879SSascha Hauer 854c0521bafSUwe Kleine-König iores = platform_get_resource(pdev, IORESOURCE_MEM, 0); 855d96be879SSascha Hauer irq = platform_get_irq(pdev, 0); 856c0521bafSUwe Kleine-König if (!iores || irq < 0) 857d96be879SSascha Hauer return -EINVAL; 858d96be879SSascha Hauer 859c0521bafSUwe Kleine-König r = request_mem_region(iores->start, resource_size(iores), pdev->name); 860d96be879SSascha Hauer if (!r) 861d96be879SSascha Hauer return -EBUSY; 862d96be879SSascha Hauer 863d96be879SSascha Hauer mmc = mmc_alloc_host(sizeof(struct mxcmci_host), &pdev->dev); 864d96be879SSascha Hauer if (!mmc) { 865d96be879SSascha Hauer ret = -ENOMEM; 866d96be879SSascha Hauer goto out_release_mem; 867d96be879SSascha Hauer } 868d96be879SSascha Hauer 869d96be879SSascha Hauer mmc->ops = &mxcmci_ops; 870f441b993SDaniel Mack mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ; 871d96be879SSascha Hauer 872d96be879SSascha Hauer /* MMC core transfer sizes tunable parameters */ 873a36274e0SMartin K. Petersen mmc->max_segs = 64; 874d96be879SSascha Hauer mmc->max_blk_size = 2048; 875d96be879SSascha Hauer mmc->max_blk_count = 65535; 876d96be879SSascha Hauer mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; 877d759c374SVladimir Zapolskiy mmc->max_seg_size = mmc->max_req_size; 878d96be879SSascha Hauer 879d96be879SSascha Hauer host = mmc_priv(mmc); 880d96be879SSascha Hauer host->base = ioremap(r->start, resource_size(r)); 881d96be879SSascha Hauer if (!host->base) { 882d96be879SSascha Hauer ret = -ENOMEM; 883d96be879SSascha Hauer goto out_free; 884d96be879SSascha Hauer } 885d96be879SSascha Hauer 886d96be879SSascha Hauer host->mmc = mmc; 887d96be879SSascha Hauer host->pdata = pdev->dev.platform_data; 888f441b993SDaniel Mack spin_lock_init(&host->lock); 889d96be879SSascha Hauer 89074b66954SAlberto Panizzo mxcmci_init_ocr(host); 891d96be879SSascha Hauer 89216b3bf8cSEric Bénard if (host->pdata && host->pdata->dat3_card_detect) 89316b3bf8cSEric Bénard host->default_irq_mask = 89416b3bf8cSEric Bénard INT_CARD_INSERTION_EN | INT_CARD_REMOVAL_EN; 89516b3bf8cSEric Bénard else 89616b3bf8cSEric Bénard host->default_irq_mask = 0; 89716b3bf8cSEric Bénard 898d96be879SSascha Hauer host->res = r; 899d96be879SSascha Hauer host->irq = irq; 900d96be879SSascha Hauer 90106277b5cSSascha Hauer host->clk = clk_get(&pdev->dev, NULL); 902d96be879SSascha Hauer if (IS_ERR(host->clk)) { 903d96be879SSascha Hauer ret = PTR_ERR(host->clk); 904d96be879SSascha Hauer goto out_iounmap; 905d96be879SSascha Hauer } 906d96be879SSascha Hauer clk_enable(host->clk); 907d96be879SSascha Hauer 908d96be879SSascha Hauer mxcmci_softreset(host); 909d96be879SSascha Hauer 910d96be879SSascha Hauer host->rev_no = readw(host->base + MMC_REG_REV_NO); 911d96be879SSascha Hauer if (host->rev_no != 0x400) { 912d96be879SSascha Hauer ret = -ENODEV; 913d96be879SSascha Hauer dev_err(mmc_dev(host->mmc), "wrong rev.no. 0x%08x. aborting.\n", 914d96be879SSascha Hauer host->rev_no); 915d96be879SSascha Hauer goto out_clk_put; 916d96be879SSascha Hauer } 917d96be879SSascha Hauer 918c499b067SSascha Hauer mmc->f_min = clk_get_rate(host->clk) >> 16; 919d96be879SSascha Hauer mmc->f_max = clk_get_rate(host->clk) >> 1; 920d96be879SSascha Hauer 921d96be879SSascha Hauer /* recommended in data sheet */ 922d96be879SSascha Hauer writew(0x2db4, host->base + MMC_REG_READ_TO); 923d96be879SSascha Hauer 92416b3bf8cSEric Bénard writel(host->default_irq_mask, host->base + MMC_REG_INT_CNTR); 925d96be879SSascha Hauer 926d96be879SSascha Hauer r = platform_get_resource(pdev, IORESOURCE_DMA, 0); 927f53fbde4SSascha Hauer if (r) { 928f53fbde4SSascha Hauer host->dmareq = r->start; 929f53fbde4SSascha Hauer host->dma_data.peripheral_type = IMX_DMATYPE_SDHC; 930f53fbde4SSascha Hauer host->dma_data.priority = DMA_PRIO_LOW; 931f53fbde4SSascha Hauer host->dma_data.dma_request = host->dmareq; 932f53fbde4SSascha Hauer dma_cap_zero(mask); 933f53fbde4SSascha Hauer dma_cap_set(DMA_SLAVE, mask); 934f53fbde4SSascha Hauer host->dma = dma_request_channel(mask, filter, host); 935f53fbde4SSascha Hauer if (host->dma) 936f53fbde4SSascha Hauer mmc->max_seg_size = dma_get_max_seg_size( 937f53fbde4SSascha Hauer host->dma->device->dev); 938d96be879SSascha Hauer } 939d96be879SSascha Hauer 940f53fbde4SSascha Hauer if (!host->dma) 941f53fbde4SSascha Hauer dev_info(mmc_dev(host->mmc), "dma not available. Using PIO\n"); 942f53fbde4SSascha Hauer 943d96be879SSascha Hauer INIT_WORK(&host->datawork, mxcmci_datawork); 944d96be879SSascha Hauer 945d96be879SSascha Hauer ret = request_irq(host->irq, mxcmci_irq, 0, DRIVER_NAME, host); 946d96be879SSascha Hauer if (ret) 947d96be879SSascha Hauer goto out_free_dma; 948d96be879SSascha Hauer 949d96be879SSascha Hauer platform_set_drvdata(pdev, mmc); 950d96be879SSascha Hauer 951d96be879SSascha Hauer if (host->pdata && host->pdata->init) { 952d96be879SSascha Hauer ret = host->pdata->init(&pdev->dev, mxcmci_detect_irq, 953d96be879SSascha Hauer host->mmc); 954d96be879SSascha Hauer if (ret) 955d96be879SSascha Hauer goto out_free_irq; 956d96be879SSascha Hauer } 957d96be879SSascha Hauer 958d96be879SSascha Hauer mmc_add_host(mmc); 959d96be879SSascha Hauer 960d96be879SSascha Hauer return 0; 961d96be879SSascha Hauer 962d96be879SSascha Hauer out_free_irq: 963d96be879SSascha Hauer free_irq(host->irq, host); 964d96be879SSascha Hauer out_free_dma: 965f53fbde4SSascha Hauer if (host->dma) 966f53fbde4SSascha Hauer dma_release_channel(host->dma); 967d96be879SSascha Hauer out_clk_put: 968d96be879SSascha Hauer clk_disable(host->clk); 969d96be879SSascha Hauer clk_put(host->clk); 970d96be879SSascha Hauer out_iounmap: 971d96be879SSascha Hauer iounmap(host->base); 972d96be879SSascha Hauer out_free: 973d96be879SSascha Hauer mmc_free_host(mmc); 974d96be879SSascha Hauer out_release_mem: 975c0521bafSUwe Kleine-König release_mem_region(iores->start, resource_size(iores)); 976d96be879SSascha Hauer return ret; 977d96be879SSascha Hauer } 978d96be879SSascha Hauer 979d96be879SSascha Hauer static int mxcmci_remove(struct platform_device *pdev) 980d96be879SSascha Hauer { 981d96be879SSascha Hauer struct mmc_host *mmc = platform_get_drvdata(pdev); 982d96be879SSascha Hauer struct mxcmci_host *host = mmc_priv(mmc); 983d96be879SSascha Hauer 984d96be879SSascha Hauer platform_set_drvdata(pdev, NULL); 985d96be879SSascha Hauer 986d96be879SSascha Hauer mmc_remove_host(mmc); 987d96be879SSascha Hauer 98874b66954SAlberto Panizzo if (host->vcc) 98974b66954SAlberto Panizzo regulator_put(host->vcc); 99074b66954SAlberto Panizzo 991d96be879SSascha Hauer if (host->pdata && host->pdata->exit) 992d96be879SSascha Hauer host->pdata->exit(&pdev->dev, mmc); 993d96be879SSascha Hauer 994d96be879SSascha Hauer free_irq(host->irq, host); 995d96be879SSascha Hauer iounmap(host->base); 996f53fbde4SSascha Hauer 997f53fbde4SSascha Hauer if (host->dma) 998f53fbde4SSascha Hauer dma_release_channel(host->dma); 999f53fbde4SSascha Hauer 1000d96be879SSascha Hauer clk_disable(host->clk); 1001d96be879SSascha Hauer clk_put(host->clk); 1002d96be879SSascha Hauer 1003d96be879SSascha Hauer release_mem_region(host->res->start, resource_size(host->res)); 1004d96be879SSascha Hauer 1005d96be879SSascha Hauer mmc_free_host(mmc); 1006d96be879SSascha Hauer 1007d96be879SSascha Hauer return 0; 1008d96be879SSascha Hauer } 1009d96be879SSascha Hauer 1010d96be879SSascha Hauer #ifdef CONFIG_PM 1011a7d403cfSEric Bénard static int mxcmci_suspend(struct device *dev) 1012d96be879SSascha Hauer { 1013a7d403cfSEric Bénard struct mmc_host *mmc = dev_get_drvdata(dev); 1014a7d403cfSEric Bénard struct mxcmci_host *host = mmc_priv(mmc); 1015d96be879SSascha Hauer int ret = 0; 1016d96be879SSascha Hauer 1017d96be879SSascha Hauer if (mmc) 10181a13f8faSMatt Fleming ret = mmc_suspend_host(mmc); 1019a7d403cfSEric Bénard clk_disable(host->clk); 1020d96be879SSascha Hauer 1021d96be879SSascha Hauer return ret; 1022d96be879SSascha Hauer } 1023d96be879SSascha Hauer 1024a7d403cfSEric Bénard static int mxcmci_resume(struct device *dev) 1025d96be879SSascha Hauer { 1026a7d403cfSEric Bénard struct mmc_host *mmc = dev_get_drvdata(dev); 1027a7d403cfSEric Bénard struct mxcmci_host *host = mmc_priv(mmc); 1028d96be879SSascha Hauer int ret = 0; 1029d96be879SSascha Hauer 1030a7d403cfSEric Bénard clk_enable(host->clk); 1031a7d403cfSEric Bénard if (mmc) 1032d96be879SSascha Hauer ret = mmc_resume_host(mmc); 1033d96be879SSascha Hauer 1034d96be879SSascha Hauer return ret; 1035d96be879SSascha Hauer } 1036a7d403cfSEric Bénard 1037a7d403cfSEric Bénard static const struct dev_pm_ops mxcmci_pm_ops = { 1038a7d403cfSEric Bénard .suspend = mxcmci_suspend, 1039a7d403cfSEric Bénard .resume = mxcmci_resume, 1040a7d403cfSEric Bénard }; 1041a7d403cfSEric Bénard #endif 1042d96be879SSascha Hauer 1043d96be879SSascha Hauer static struct platform_driver mxcmci_driver = { 1044d96be879SSascha Hauer .probe = mxcmci_probe, 1045d96be879SSascha Hauer .remove = mxcmci_remove, 1046d96be879SSascha Hauer .driver = { 1047d96be879SSascha Hauer .name = DRIVER_NAME, 1048d96be879SSascha Hauer .owner = THIS_MODULE, 1049a7d403cfSEric Bénard #ifdef CONFIG_PM 1050a7d403cfSEric Bénard .pm = &mxcmci_pm_ops, 1051a7d403cfSEric Bénard #endif 1052d96be879SSascha Hauer } 1053d96be879SSascha Hauer }; 1054d96be879SSascha Hauer 1055d1f81a64SAxel Lin module_platform_driver(mxcmci_driver); 1056d96be879SSascha Hauer 1057d96be879SSascha Hauer MODULE_DESCRIPTION("i.MX Multimedia Card Interface Driver"); 1058d96be879SSascha Hauer MODULE_AUTHOR("Sascha Hauer, Pengutronix"); 1059d96be879SSascha Hauer MODULE_LICENSE("GPL"); 1060d96be879SSascha Hauer MODULE_ALIAS("platform:imx-mmc"); 1061