1d96be879SSascha Hauer /* 2d96be879SSascha Hauer * linux/drivers/mmc/host/mxcmmc.c - Freescale i.MX MMCI driver 3d96be879SSascha Hauer * 4d96be879SSascha Hauer * This is a driver for the SDHC controller found in Freescale MX2/MX3 5d96be879SSascha Hauer * SoCs. It is basically the same hardware as found on MX1 (imxmmc.c). 6d96be879SSascha Hauer * Unlike the hardware found on MX1, this hardware just works and does 73ad2f3fbSDaniel Mack * not need all the quirks found in imxmmc.c, hence the separate driver. 8d96be879SSascha Hauer * 9d96be879SSascha Hauer * Copyright (C) 2008 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de> 10d96be879SSascha Hauer * Copyright (C) 2006 Pavel Pisa, PiKRON <ppisa@pikron.com> 11d96be879SSascha Hauer * 12d96be879SSascha Hauer * derived from pxamci.c by Russell King 13d96be879SSascha Hauer * 14d96be879SSascha Hauer * This program is free software; you can redistribute it and/or modify 15d96be879SSascha Hauer * it under the terms of the GNU General Public License version 2 as 16d96be879SSascha Hauer * published by the Free Software Foundation. 17d96be879SSascha Hauer * 18d96be879SSascha Hauer */ 19d96be879SSascha Hauer 20d96be879SSascha Hauer #include <linux/module.h> 21d96be879SSascha Hauer #include <linux/init.h> 22d96be879SSascha Hauer #include <linux/ioport.h> 23d96be879SSascha Hauer #include <linux/platform_device.h> 24d96be879SSascha Hauer #include <linux/interrupt.h> 25d96be879SSascha Hauer #include <linux/irq.h> 26d96be879SSascha Hauer #include <linux/blkdev.h> 27d96be879SSascha Hauer #include <linux/dma-mapping.h> 28d96be879SSascha Hauer #include <linux/mmc/host.h> 29d96be879SSascha Hauer #include <linux/mmc/card.h> 30d96be879SSascha Hauer #include <linux/delay.h> 31d96be879SSascha Hauer #include <linux/clk.h> 32d96be879SSascha Hauer #include <linux/io.h> 33d96be879SSascha Hauer #include <linux/gpio.h> 3474b66954SAlberto Panizzo #include <linux/regulator/consumer.h> 35f53fbde4SSascha Hauer #include <linux/dmaengine.h> 36258aea76SViresh Kumar #include <linux/types.h> 37d96be879SSascha Hauer 38d96be879SSascha Hauer #include <asm/dma.h> 39d96be879SSascha Hauer #include <asm/irq.h> 40d96be879SSascha Hauer #include <asm/sizes.h> 41d96be879SSascha Hauer #include <mach/mmc.h> 42d96be879SSascha Hauer 43f53fbde4SSascha Hauer #include <mach/dma.h> 44edae8998SShawn Guo #include <mach/hardware.h> 45d96be879SSascha Hauer 469563b1dbSSascha Hauer #define DRIVER_NAME "mxc-mmc" 47d96be879SSascha Hauer 48d96be879SSascha Hauer #define MMC_REG_STR_STP_CLK 0x00 49d96be879SSascha Hauer #define MMC_REG_STATUS 0x04 50d96be879SSascha Hauer #define MMC_REG_CLK_RATE 0x08 51d96be879SSascha Hauer #define MMC_REG_CMD_DAT_CONT 0x0C 52d96be879SSascha Hauer #define MMC_REG_RES_TO 0x10 53d96be879SSascha Hauer #define MMC_REG_READ_TO 0x14 54d96be879SSascha Hauer #define MMC_REG_BLK_LEN 0x18 55d96be879SSascha Hauer #define MMC_REG_NOB 0x1C 56d96be879SSascha Hauer #define MMC_REG_REV_NO 0x20 57d96be879SSascha Hauer #define MMC_REG_INT_CNTR 0x24 58d96be879SSascha Hauer #define MMC_REG_CMD 0x28 59d96be879SSascha Hauer #define MMC_REG_ARG 0x2C 60d96be879SSascha Hauer #define MMC_REG_RES_FIFO 0x34 61d96be879SSascha Hauer #define MMC_REG_BUFFER_ACCESS 0x38 62d96be879SSascha Hauer 63d96be879SSascha Hauer #define STR_STP_CLK_RESET (1 << 3) 64d96be879SSascha Hauer #define STR_STP_CLK_START_CLK (1 << 1) 65d96be879SSascha Hauer #define STR_STP_CLK_STOP_CLK (1 << 0) 66d96be879SSascha Hauer 67d96be879SSascha Hauer #define STATUS_CARD_INSERTION (1 << 31) 68d96be879SSascha Hauer #define STATUS_CARD_REMOVAL (1 << 30) 69d96be879SSascha Hauer #define STATUS_YBUF_EMPTY (1 << 29) 70d96be879SSascha Hauer #define STATUS_XBUF_EMPTY (1 << 28) 71d96be879SSascha Hauer #define STATUS_YBUF_FULL (1 << 27) 72d96be879SSascha Hauer #define STATUS_XBUF_FULL (1 << 26) 73d96be879SSascha Hauer #define STATUS_BUF_UND_RUN (1 << 25) 74d96be879SSascha Hauer #define STATUS_BUF_OVFL (1 << 24) 75d96be879SSascha Hauer #define STATUS_SDIO_INT_ACTIVE (1 << 14) 76d96be879SSascha Hauer #define STATUS_END_CMD_RESP (1 << 13) 77d96be879SSascha Hauer #define STATUS_WRITE_OP_DONE (1 << 12) 78d96be879SSascha Hauer #define STATUS_DATA_TRANS_DONE (1 << 11) 79d96be879SSascha Hauer #define STATUS_READ_OP_DONE (1 << 11) 80d96be879SSascha Hauer #define STATUS_WR_CRC_ERROR_CODE_MASK (3 << 10) 81d96be879SSascha Hauer #define STATUS_CARD_BUS_CLK_RUN (1 << 8) 82d96be879SSascha Hauer #define STATUS_BUF_READ_RDY (1 << 7) 83d96be879SSascha Hauer #define STATUS_BUF_WRITE_RDY (1 << 6) 84d96be879SSascha Hauer #define STATUS_RESP_CRC_ERR (1 << 5) 85d96be879SSascha Hauer #define STATUS_CRC_READ_ERR (1 << 3) 86d96be879SSascha Hauer #define STATUS_CRC_WRITE_ERR (1 << 2) 87d96be879SSascha Hauer #define STATUS_TIME_OUT_RESP (1 << 1) 88d96be879SSascha Hauer #define STATUS_TIME_OUT_READ (1 << 0) 89d96be879SSascha Hauer #define STATUS_ERR_MASK 0x2f 90d96be879SSascha Hauer 91d96be879SSascha Hauer #define CMD_DAT_CONT_CMD_RESP_LONG_OFF (1 << 12) 92d96be879SSascha Hauer #define CMD_DAT_CONT_STOP_READWAIT (1 << 11) 93d96be879SSascha Hauer #define CMD_DAT_CONT_START_READWAIT (1 << 10) 94d96be879SSascha Hauer #define CMD_DAT_CONT_BUS_WIDTH_4 (2 << 8) 95d96be879SSascha Hauer #define CMD_DAT_CONT_INIT (1 << 7) 96d96be879SSascha Hauer #define CMD_DAT_CONT_WRITE (1 << 4) 97d96be879SSascha Hauer #define CMD_DAT_CONT_DATA_ENABLE (1 << 3) 98d96be879SSascha Hauer #define CMD_DAT_CONT_RESPONSE_48BIT_CRC (1 << 0) 99d96be879SSascha Hauer #define CMD_DAT_CONT_RESPONSE_136BIT (2 << 0) 100d96be879SSascha Hauer #define CMD_DAT_CONT_RESPONSE_48BIT (3 << 0) 101d96be879SSascha Hauer 102d96be879SSascha Hauer #define INT_SDIO_INT_WKP_EN (1 << 18) 103d96be879SSascha Hauer #define INT_CARD_INSERTION_WKP_EN (1 << 17) 104d96be879SSascha Hauer #define INT_CARD_REMOVAL_WKP_EN (1 << 16) 105d96be879SSascha Hauer #define INT_CARD_INSERTION_EN (1 << 15) 106d96be879SSascha Hauer #define INT_CARD_REMOVAL_EN (1 << 14) 107d96be879SSascha Hauer #define INT_SDIO_IRQ_EN (1 << 13) 108d96be879SSascha Hauer #define INT_DAT0_EN (1 << 12) 109d96be879SSascha Hauer #define INT_BUF_READ_EN (1 << 4) 110d96be879SSascha Hauer #define INT_BUF_WRITE_EN (1 << 3) 111d96be879SSascha Hauer #define INT_END_CMD_RES_EN (1 << 2) 112d96be879SSascha Hauer #define INT_WRITE_OP_DONE_EN (1 << 1) 113d96be879SSascha Hauer #define INT_READ_OP_EN (1 << 0) 114d96be879SSascha Hauer 115d96be879SSascha Hauer struct mxcmci_host { 116d96be879SSascha Hauer struct mmc_host *mmc; 117d96be879SSascha Hauer struct resource *res; 118d96be879SSascha Hauer void __iomem *base; 119d96be879SSascha Hauer int irq; 120d96be879SSascha Hauer int detect_irq; 121f53fbde4SSascha Hauer struct dma_chan *dma; 122f53fbde4SSascha Hauer struct dma_async_tx_descriptor *desc; 123d96be879SSascha Hauer int do_dma; 12416b3bf8cSEric Bénard int default_irq_mask; 125f441b993SDaniel Mack int use_sdio; 126d96be879SSascha Hauer unsigned int power_mode; 127d96be879SSascha Hauer struct imxmmc_platform_data *pdata; 128d96be879SSascha Hauer 129d96be879SSascha Hauer struct mmc_request *req; 130d96be879SSascha Hauer struct mmc_command *cmd; 131d96be879SSascha Hauer struct mmc_data *data; 132d96be879SSascha Hauer 133d96be879SSascha Hauer unsigned int datasize; 134d96be879SSascha Hauer unsigned int dma_dir; 135d96be879SSascha Hauer 136d96be879SSascha Hauer u16 rev_no; 137d96be879SSascha Hauer unsigned int cmdat; 138d96be879SSascha Hauer 139d96be879SSascha Hauer struct clk *clk; 140d96be879SSascha Hauer 141d96be879SSascha Hauer int clock; 142d96be879SSascha Hauer 143d96be879SSascha Hauer struct work_struct datawork; 144f441b993SDaniel Mack spinlock_t lock; 14574b66954SAlberto Panizzo 14674b66954SAlberto Panizzo struct regulator *vcc; 147f53fbde4SSascha Hauer 148f53fbde4SSascha Hauer int burstlen; 149f53fbde4SSascha Hauer int dmareq; 150f53fbde4SSascha Hauer struct dma_slave_config dma_slave_config; 151f53fbde4SSascha Hauer struct imx_dma_data dma_data; 152d96be879SSascha Hauer }; 153d96be879SSascha Hauer 15418489fa2SMartin Fuzzey static void mxcmci_set_clk_rate(struct mxcmci_host *host, unsigned int clk_ios); 15518489fa2SMartin Fuzzey 15674b66954SAlberto Panizzo static inline void mxcmci_init_ocr(struct mxcmci_host *host) 15774b66954SAlberto Panizzo { 15874b66954SAlberto Panizzo host->vcc = regulator_get(mmc_dev(host->mmc), "vmmc"); 15974b66954SAlberto Panizzo 16074b66954SAlberto Panizzo if (IS_ERR(host->vcc)) { 16174b66954SAlberto Panizzo host->vcc = NULL; 16274b66954SAlberto Panizzo } else { 16374b66954SAlberto Panizzo host->mmc->ocr_avail = mmc_regulator_get_ocrmask(host->vcc); 16474b66954SAlberto Panizzo if (host->pdata && host->pdata->ocr_avail) 16574b66954SAlberto Panizzo dev_warn(mmc_dev(host->mmc), 16674b66954SAlberto Panizzo "pdata->ocr_avail will not be used\n"); 16774b66954SAlberto Panizzo } 168d078d242SAlberto Panizzo 16974b66954SAlberto Panizzo if (host->vcc == NULL) { 17074b66954SAlberto Panizzo /* fall-back to platform data */ 17174b66954SAlberto Panizzo if (host->pdata && host->pdata->ocr_avail) 17274b66954SAlberto Panizzo host->mmc->ocr_avail = host->pdata->ocr_avail; 17374b66954SAlberto Panizzo else 17474b66954SAlberto Panizzo host->mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; 17574b66954SAlberto Panizzo } 17674b66954SAlberto Panizzo } 17774b66954SAlberto Panizzo 178d078d242SAlberto Panizzo static inline void mxcmci_set_power(struct mxcmci_host *host, 179d078d242SAlberto Panizzo unsigned char power_mode, 180d078d242SAlberto Panizzo unsigned int vdd) 18174b66954SAlberto Panizzo { 182d078d242SAlberto Panizzo if (host->vcc) { 183d078d242SAlberto Panizzo if (power_mode == MMC_POWER_UP) 184d078d242SAlberto Panizzo mmc_regulator_set_ocr(host->mmc, host->vcc, vdd); 185d078d242SAlberto Panizzo else if (power_mode == MMC_POWER_OFF) 186d078d242SAlberto Panizzo mmc_regulator_set_ocr(host->mmc, host->vcc, 0); 187d078d242SAlberto Panizzo } 188d078d242SAlberto Panizzo 18974b66954SAlberto Panizzo if (host->pdata && host->pdata->setpower) 19074b66954SAlberto Panizzo host->pdata->setpower(mmc_dev(host->mmc), vdd); 19174b66954SAlberto Panizzo } 19274b66954SAlberto Panizzo 193d96be879SSascha Hauer static inline int mxcmci_use_dma(struct mxcmci_host *host) 194d96be879SSascha Hauer { 195d96be879SSascha Hauer return host->do_dma; 196d96be879SSascha Hauer } 197d96be879SSascha Hauer 198d96be879SSascha Hauer static void mxcmci_softreset(struct mxcmci_host *host) 199d96be879SSascha Hauer { 200d96be879SSascha Hauer int i; 201d96be879SSascha Hauer 2024725f6f1SDaniel Mack dev_dbg(mmc_dev(host->mmc), "mxcmci_softreset\n"); 2034725f6f1SDaniel Mack 204d96be879SSascha Hauer /* reset sequence */ 205d96be879SSascha Hauer writew(STR_STP_CLK_RESET, host->base + MMC_REG_STR_STP_CLK); 206d96be879SSascha Hauer writew(STR_STP_CLK_RESET | STR_STP_CLK_START_CLK, 207d96be879SSascha Hauer host->base + MMC_REG_STR_STP_CLK); 208d96be879SSascha Hauer 209d96be879SSascha Hauer for (i = 0; i < 8; i++) 210d96be879SSascha Hauer writew(STR_STP_CLK_START_CLK, host->base + MMC_REG_STR_STP_CLK); 211d96be879SSascha Hauer 212d96be879SSascha Hauer writew(0xff, host->base + MMC_REG_RES_TO); 213d96be879SSascha Hauer } 214f53fbde4SSascha Hauer static int mxcmci_setup_dma(struct mmc_host *mmc); 215d96be879SSascha Hauer 216656217d2SMartin Fuzzey static int mxcmci_setup_data(struct mxcmci_host *host, struct mmc_data *data) 217d96be879SSascha Hauer { 218d96be879SSascha Hauer unsigned int nob = data->blocks; 219d96be879SSascha Hauer unsigned int blksz = data->blksz; 220d96be879SSascha Hauer unsigned int datasize = nob * blksz; 221d96be879SSascha Hauer struct scatterlist *sg; 22205f5799cSVinod Koul enum dma_transfer_direction slave_dirn; 223f53fbde4SSascha Hauer int i, nents; 224f53fbde4SSascha Hauer 225d96be879SSascha Hauer if (data->flags & MMC_DATA_STREAM) 226d96be879SSascha Hauer nob = 0xffff; 227d96be879SSascha Hauer 228d96be879SSascha Hauer host->data = data; 229d96be879SSascha Hauer data->bytes_xfered = 0; 230d96be879SSascha Hauer 231d96be879SSascha Hauer writew(nob, host->base + MMC_REG_NOB); 232d96be879SSascha Hauer writew(blksz, host->base + MMC_REG_BLK_LEN); 233d96be879SSascha Hauer host->datasize = datasize; 234d96be879SSascha Hauer 235f53fbde4SSascha Hauer if (!mxcmci_use_dma(host)) 236f53fbde4SSascha Hauer return 0; 237f53fbde4SSascha Hauer 238d96be879SSascha Hauer for_each_sg(data->sg, sg, data->sg_len, i) { 239d96be879SSascha Hauer if (sg->offset & 3 || sg->length & 3) { 240d96be879SSascha Hauer host->do_dma = 0; 241656217d2SMartin Fuzzey return 0; 242d96be879SSascha Hauer } 243d96be879SSascha Hauer } 244d96be879SSascha Hauer 24505f5799cSVinod Koul if (data->flags & MMC_DATA_READ) { 246d96be879SSascha Hauer host->dma_dir = DMA_FROM_DEVICE; 24705f5799cSVinod Koul slave_dirn = DMA_DEV_TO_MEM; 24805f5799cSVinod Koul } else { 249d96be879SSascha Hauer host->dma_dir = DMA_TO_DEVICE; 25005f5799cSVinod Koul slave_dirn = DMA_MEM_TO_DEV; 25105f5799cSVinod Koul } 252f53fbde4SSascha Hauer 253f53fbde4SSascha Hauer nents = dma_map_sg(host->dma->device->dev, data->sg, 254d96be879SSascha Hauer data->sg_len, host->dma_dir); 255f53fbde4SSascha Hauer if (nents != data->sg_len) 256f53fbde4SSascha Hauer return -EINVAL; 257d96be879SSascha Hauer 25816052827SAlexandre Bounine host->desc = dmaengine_prep_slave_sg(host->dma, 25905f5799cSVinod Koul data->sg, data->sg_len, slave_dirn, 260f53fbde4SSascha Hauer DMA_PREP_INTERRUPT | DMA_CTRL_ACK); 261d96be879SSascha Hauer 262f53fbde4SSascha Hauer if (!host->desc) { 263f53fbde4SSascha Hauer dma_unmap_sg(host->dma->device->dev, data->sg, data->sg_len, 264f53fbde4SSascha Hauer host->dma_dir); 265f53fbde4SSascha Hauer host->do_dma = 0; 266f53fbde4SSascha Hauer return 0; /* Fall back to PIO */ 267656217d2SMartin Fuzzey } 268d96be879SSascha Hauer wmb(); 269d96be879SSascha Hauer 270f53fbde4SSascha Hauer dmaengine_submit(host->desc); 271439aa0efSSascha Hauer dma_async_issue_pending(host->dma); 272f53fbde4SSascha Hauer 273656217d2SMartin Fuzzey return 0; 274d96be879SSascha Hauer } 275d96be879SSascha Hauer 276d96be879SSascha Hauer static int mxcmci_start_cmd(struct mxcmci_host *host, struct mmc_command *cmd, 277d96be879SSascha Hauer unsigned int cmdat) 278d96be879SSascha Hauer { 27916b3bf8cSEric Bénard u32 int_cntr = host->default_irq_mask; 280f441b993SDaniel Mack unsigned long flags; 281f441b993SDaniel Mack 282d96be879SSascha Hauer WARN_ON(host->cmd != NULL); 283d96be879SSascha Hauer host->cmd = cmd; 284d96be879SSascha Hauer 285d96be879SSascha Hauer switch (mmc_resp_type(cmd)) { 286d96be879SSascha Hauer case MMC_RSP_R1: /* short CRC, OPCODE */ 287d96be879SSascha Hauer case MMC_RSP_R1B:/* short CRC, OPCODE, BUSY */ 288d96be879SSascha Hauer cmdat |= CMD_DAT_CONT_RESPONSE_48BIT_CRC; 289d96be879SSascha Hauer break; 290d96be879SSascha Hauer case MMC_RSP_R2: /* long 136 bit + CRC */ 291d96be879SSascha Hauer cmdat |= CMD_DAT_CONT_RESPONSE_136BIT; 292d96be879SSascha Hauer break; 293d96be879SSascha Hauer case MMC_RSP_R3: /* short */ 294d96be879SSascha Hauer cmdat |= CMD_DAT_CONT_RESPONSE_48BIT; 295d96be879SSascha Hauer break; 296d96be879SSascha Hauer case MMC_RSP_NONE: 297d96be879SSascha Hauer break; 298d96be879SSascha Hauer default: 299d96be879SSascha Hauer dev_err(mmc_dev(host->mmc), "unhandled response type 0x%x\n", 300d96be879SSascha Hauer mmc_resp_type(cmd)); 301d96be879SSascha Hauer cmd->error = -EINVAL; 302d96be879SSascha Hauer return -EINVAL; 303d96be879SSascha Hauer } 304d96be879SSascha Hauer 305f441b993SDaniel Mack int_cntr = INT_END_CMD_RES_EN; 306f441b993SDaniel Mack 307d96be879SSascha Hauer if (mxcmci_use_dma(host)) 308f441b993SDaniel Mack int_cntr |= INT_READ_OP_EN | INT_WRITE_OP_DONE_EN; 309f441b993SDaniel Mack 310f441b993SDaniel Mack spin_lock_irqsave(&host->lock, flags); 311f441b993SDaniel Mack if (host->use_sdio) 312f441b993SDaniel Mack int_cntr |= INT_SDIO_IRQ_EN; 313f441b993SDaniel Mack writel(int_cntr, host->base + MMC_REG_INT_CNTR); 314f441b993SDaniel Mack spin_unlock_irqrestore(&host->lock, flags); 315d96be879SSascha Hauer 316d96be879SSascha Hauer writew(cmd->opcode, host->base + MMC_REG_CMD); 317d96be879SSascha Hauer writel(cmd->arg, host->base + MMC_REG_ARG); 318d96be879SSascha Hauer writew(cmdat, host->base + MMC_REG_CMD_DAT_CONT); 319d96be879SSascha Hauer 320d96be879SSascha Hauer return 0; 321d96be879SSascha Hauer } 322d96be879SSascha Hauer 323d96be879SSascha Hauer static void mxcmci_finish_request(struct mxcmci_host *host, 324d96be879SSascha Hauer struct mmc_request *req) 325d96be879SSascha Hauer { 32616b3bf8cSEric Bénard u32 int_cntr = host->default_irq_mask; 327f441b993SDaniel Mack unsigned long flags; 328f441b993SDaniel Mack 329f441b993SDaniel Mack spin_lock_irqsave(&host->lock, flags); 330f441b993SDaniel Mack if (host->use_sdio) 331f441b993SDaniel Mack int_cntr |= INT_SDIO_IRQ_EN; 332f441b993SDaniel Mack writel(int_cntr, host->base + MMC_REG_INT_CNTR); 333f441b993SDaniel Mack spin_unlock_irqrestore(&host->lock, flags); 334d96be879SSascha Hauer 335d96be879SSascha Hauer host->req = NULL; 336d96be879SSascha Hauer host->cmd = NULL; 337d96be879SSascha Hauer host->data = NULL; 338d96be879SSascha Hauer 339d96be879SSascha Hauer mmc_request_done(host->mmc, req); 340d96be879SSascha Hauer } 341d96be879SSascha Hauer 342d96be879SSascha Hauer static int mxcmci_finish_data(struct mxcmci_host *host, unsigned int stat) 343d96be879SSascha Hauer { 344d96be879SSascha Hauer struct mmc_data *data = host->data; 345d96be879SSascha Hauer int data_error; 346d96be879SSascha Hauer 347d96be879SSascha Hauer if (mxcmci_use_dma(host)) { 348f53fbde4SSascha Hauer dmaengine_terminate_all(host->dma); 349f53fbde4SSascha Hauer dma_unmap_sg(host->dma->device->dev, data->sg, data->sg_len, 350d96be879SSascha Hauer host->dma_dir); 351d96be879SSascha Hauer } 352d96be879SSascha Hauer 353d96be879SSascha Hauer if (stat & STATUS_ERR_MASK) { 354d96be879SSascha Hauer dev_dbg(mmc_dev(host->mmc), "request failed. status: 0x%08x\n", 355d96be879SSascha Hauer stat); 356d96be879SSascha Hauer if (stat & STATUS_CRC_READ_ERR) { 3574725f6f1SDaniel Mack dev_err(mmc_dev(host->mmc), "%s: -EILSEQ\n", __func__); 358d96be879SSascha Hauer data->error = -EILSEQ; 359d96be879SSascha Hauer } else if (stat & STATUS_CRC_WRITE_ERR) { 360d96be879SSascha Hauer u32 err_code = (stat >> 9) & 0x3; 3614725f6f1SDaniel Mack if (err_code == 2) { /* No CRC response */ 3624725f6f1SDaniel Mack dev_err(mmc_dev(host->mmc), 3634725f6f1SDaniel Mack "%s: No CRC -ETIMEDOUT\n", __func__); 364d96be879SSascha Hauer data->error = -ETIMEDOUT; 365d96be879SSascha Hauer } else { 3664725f6f1SDaniel Mack dev_err(mmc_dev(host->mmc), 3674725f6f1SDaniel Mack "%s: -EILSEQ\n", __func__); 3684725f6f1SDaniel Mack data->error = -EILSEQ; 3694725f6f1SDaniel Mack } 3704725f6f1SDaniel Mack } else if (stat & STATUS_TIME_OUT_READ) { 3714725f6f1SDaniel Mack dev_err(mmc_dev(host->mmc), 3724725f6f1SDaniel Mack "%s: read -ETIMEDOUT\n", __func__); 3734725f6f1SDaniel Mack data->error = -ETIMEDOUT; 3744725f6f1SDaniel Mack } else { 3754725f6f1SDaniel Mack dev_err(mmc_dev(host->mmc), "%s: -EIO\n", __func__); 376d96be879SSascha Hauer data->error = -EIO; 377d96be879SSascha Hauer } 378d96be879SSascha Hauer } else { 379d96be879SSascha Hauer data->bytes_xfered = host->datasize; 380d96be879SSascha Hauer } 381d96be879SSascha Hauer 382d96be879SSascha Hauer data_error = data->error; 383d96be879SSascha Hauer 384d96be879SSascha Hauer host->data = NULL; 385d96be879SSascha Hauer 386d96be879SSascha Hauer return data_error; 387d96be879SSascha Hauer } 388d96be879SSascha Hauer 389d96be879SSascha Hauer static void mxcmci_read_response(struct mxcmci_host *host, unsigned int stat) 390d96be879SSascha Hauer { 391d96be879SSascha Hauer struct mmc_command *cmd = host->cmd; 392d96be879SSascha Hauer int i; 393d96be879SSascha Hauer u32 a, b, c; 394d96be879SSascha Hauer 395d96be879SSascha Hauer if (!cmd) 396d96be879SSascha Hauer return; 397d96be879SSascha Hauer 398d96be879SSascha Hauer if (stat & STATUS_TIME_OUT_RESP) { 399d96be879SSascha Hauer dev_dbg(mmc_dev(host->mmc), "CMD TIMEOUT\n"); 400d96be879SSascha Hauer cmd->error = -ETIMEDOUT; 401d96be879SSascha Hauer } else if (stat & STATUS_RESP_CRC_ERR && cmd->flags & MMC_RSP_CRC) { 402d96be879SSascha Hauer dev_dbg(mmc_dev(host->mmc), "cmd crc error\n"); 403d96be879SSascha Hauer cmd->error = -EILSEQ; 404d96be879SSascha Hauer } 405d96be879SSascha Hauer 406d96be879SSascha Hauer if (cmd->flags & MMC_RSP_PRESENT) { 407d96be879SSascha Hauer if (cmd->flags & MMC_RSP_136) { 408d96be879SSascha Hauer for (i = 0; i < 4; i++) { 409d96be879SSascha Hauer a = readw(host->base + MMC_REG_RES_FIFO); 410d96be879SSascha Hauer b = readw(host->base + MMC_REG_RES_FIFO); 411d96be879SSascha Hauer cmd->resp[i] = a << 16 | b; 412d96be879SSascha Hauer } 413d96be879SSascha Hauer } else { 414d96be879SSascha Hauer a = readw(host->base + MMC_REG_RES_FIFO); 415d96be879SSascha Hauer b = readw(host->base + MMC_REG_RES_FIFO); 416d96be879SSascha Hauer c = readw(host->base + MMC_REG_RES_FIFO); 417d96be879SSascha Hauer cmd->resp[0] = a << 24 | b << 8 | c >> 8; 418d96be879SSascha Hauer } 419d96be879SSascha Hauer } 420d96be879SSascha Hauer } 421d96be879SSascha Hauer 422d96be879SSascha Hauer static int mxcmci_poll_status(struct mxcmci_host *host, u32 mask) 423d96be879SSascha Hauer { 424d96be879SSascha Hauer u32 stat; 425d96be879SSascha Hauer unsigned long timeout = jiffies + HZ; 426d96be879SSascha Hauer 427d96be879SSascha Hauer do { 428d96be879SSascha Hauer stat = readl(host->base + MMC_REG_STATUS); 429d96be879SSascha Hauer if (stat & STATUS_ERR_MASK) 430d96be879SSascha Hauer return stat; 43118489fa2SMartin Fuzzey if (time_after(jiffies, timeout)) { 43218489fa2SMartin Fuzzey mxcmci_softreset(host); 43318489fa2SMartin Fuzzey mxcmci_set_clk_rate(host, host->clock); 434d96be879SSascha Hauer return STATUS_TIME_OUT_READ; 43518489fa2SMartin Fuzzey } 436d96be879SSascha Hauer if (stat & mask) 437d96be879SSascha Hauer return 0; 438d96be879SSascha Hauer cpu_relax(); 439d96be879SSascha Hauer } while (1); 440d96be879SSascha Hauer } 441d96be879SSascha Hauer 442d96be879SSascha Hauer static int mxcmci_pull(struct mxcmci_host *host, void *_buf, int bytes) 443d96be879SSascha Hauer { 444d96be879SSascha Hauer unsigned int stat; 445d96be879SSascha Hauer u32 *buf = _buf; 446d96be879SSascha Hauer 447d96be879SSascha Hauer while (bytes > 3) { 448d96be879SSascha Hauer stat = mxcmci_poll_status(host, 449d96be879SSascha Hauer STATUS_BUF_READ_RDY | STATUS_READ_OP_DONE); 450d96be879SSascha Hauer if (stat) 451d96be879SSascha Hauer return stat; 452d96be879SSascha Hauer *buf++ = readl(host->base + MMC_REG_BUFFER_ACCESS); 453d96be879SSascha Hauer bytes -= 4; 454d96be879SSascha Hauer } 455d96be879SSascha Hauer 456d96be879SSascha Hauer if (bytes) { 457d96be879SSascha Hauer u8 *b = (u8 *)buf; 458d96be879SSascha Hauer u32 tmp; 459d96be879SSascha Hauer 460d96be879SSascha Hauer stat = mxcmci_poll_status(host, 461d96be879SSascha Hauer STATUS_BUF_READ_RDY | STATUS_READ_OP_DONE); 462d96be879SSascha Hauer if (stat) 463d96be879SSascha Hauer return stat; 464d96be879SSascha Hauer tmp = readl(host->base + MMC_REG_BUFFER_ACCESS); 465d96be879SSascha Hauer memcpy(b, &tmp, bytes); 466d96be879SSascha Hauer } 467d96be879SSascha Hauer 468d96be879SSascha Hauer return 0; 469d96be879SSascha Hauer } 470d96be879SSascha Hauer 471d96be879SSascha Hauer static int mxcmci_push(struct mxcmci_host *host, void *_buf, int bytes) 472d96be879SSascha Hauer { 473d96be879SSascha Hauer unsigned int stat; 474d96be879SSascha Hauer u32 *buf = _buf; 475d96be879SSascha Hauer 476d96be879SSascha Hauer while (bytes > 3) { 477d96be879SSascha Hauer stat = mxcmci_poll_status(host, STATUS_BUF_WRITE_RDY); 478d96be879SSascha Hauer if (stat) 479d96be879SSascha Hauer return stat; 480d96be879SSascha Hauer writel(*buf++, host->base + MMC_REG_BUFFER_ACCESS); 481d96be879SSascha Hauer bytes -= 4; 482d96be879SSascha Hauer } 483d96be879SSascha Hauer 484d96be879SSascha Hauer if (bytes) { 485d96be879SSascha Hauer u8 *b = (u8 *)buf; 486d96be879SSascha Hauer u32 tmp; 487d96be879SSascha Hauer 488d96be879SSascha Hauer stat = mxcmci_poll_status(host, STATUS_BUF_WRITE_RDY); 489d96be879SSascha Hauer if (stat) 490d96be879SSascha Hauer return stat; 491d96be879SSascha Hauer 492d96be879SSascha Hauer memcpy(&tmp, b, bytes); 493d96be879SSascha Hauer writel(tmp, host->base + MMC_REG_BUFFER_ACCESS); 494d96be879SSascha Hauer } 495d96be879SSascha Hauer 496d96be879SSascha Hauer stat = mxcmci_poll_status(host, STATUS_BUF_WRITE_RDY); 497d96be879SSascha Hauer if (stat) 498d96be879SSascha Hauer return stat; 499d96be879SSascha Hauer 500d96be879SSascha Hauer return 0; 501d96be879SSascha Hauer } 502d96be879SSascha Hauer 503d96be879SSascha Hauer static int mxcmci_transfer_data(struct mxcmci_host *host) 504d96be879SSascha Hauer { 505d96be879SSascha Hauer struct mmc_data *data = host->req->data; 506d96be879SSascha Hauer struct scatterlist *sg; 507d96be879SSascha Hauer int stat, i; 508d96be879SSascha Hauer 509d96be879SSascha Hauer host->data = data; 510d96be879SSascha Hauer host->datasize = 0; 511d96be879SSascha Hauer 512d96be879SSascha Hauer if (data->flags & MMC_DATA_READ) { 513d96be879SSascha Hauer for_each_sg(data->sg, sg, data->sg_len, i) { 514d96be879SSascha Hauer stat = mxcmci_pull(host, sg_virt(sg), sg->length); 515d96be879SSascha Hauer if (stat) 516d96be879SSascha Hauer return stat; 517d96be879SSascha Hauer host->datasize += sg->length; 518d96be879SSascha Hauer } 519d96be879SSascha Hauer } else { 520d96be879SSascha Hauer for_each_sg(data->sg, sg, data->sg_len, i) { 521d96be879SSascha Hauer stat = mxcmci_push(host, sg_virt(sg), sg->length); 522d96be879SSascha Hauer if (stat) 523d96be879SSascha Hauer return stat; 524d96be879SSascha Hauer host->datasize += sg->length; 525d96be879SSascha Hauer } 526d96be879SSascha Hauer stat = mxcmci_poll_status(host, STATUS_WRITE_OP_DONE); 527d96be879SSascha Hauer if (stat) 528d96be879SSascha Hauer return stat; 529d96be879SSascha Hauer } 530d96be879SSascha Hauer return 0; 531d96be879SSascha Hauer } 532d96be879SSascha Hauer 533d96be879SSascha Hauer static void mxcmci_datawork(struct work_struct *work) 534d96be879SSascha Hauer { 535d96be879SSascha Hauer struct mxcmci_host *host = container_of(work, struct mxcmci_host, 536d96be879SSascha Hauer datawork); 537d96be879SSascha Hauer int datastat = mxcmci_transfer_data(host); 5384a31f2efSDaniel Mack 5394a31f2efSDaniel Mack writel(STATUS_READ_OP_DONE | STATUS_WRITE_OP_DONE, 5404a31f2efSDaniel Mack host->base + MMC_REG_STATUS); 541d96be879SSascha Hauer mxcmci_finish_data(host, datastat); 542d96be879SSascha Hauer 543d96be879SSascha Hauer if (host->req->stop) { 544d96be879SSascha Hauer if (mxcmci_start_cmd(host, host->req->stop, 0)) { 545d96be879SSascha Hauer mxcmci_finish_request(host, host->req); 546d96be879SSascha Hauer return; 547d96be879SSascha Hauer } 548d96be879SSascha Hauer } else { 549d96be879SSascha Hauer mxcmci_finish_request(host, host->req); 550d96be879SSascha Hauer } 551d96be879SSascha Hauer } 552d96be879SSascha Hauer 553d96be879SSascha Hauer static void mxcmci_data_done(struct mxcmci_host *host, unsigned int stat) 554d96be879SSascha Hauer { 555d96be879SSascha Hauer struct mmc_data *data = host->data; 556d96be879SSascha Hauer int data_error; 557d96be879SSascha Hauer 558d96be879SSascha Hauer if (!data) 559d96be879SSascha Hauer return; 560d96be879SSascha Hauer 561d96be879SSascha Hauer data_error = mxcmci_finish_data(host, stat); 562d96be879SSascha Hauer 563d96be879SSascha Hauer mxcmci_read_response(host, stat); 564d96be879SSascha Hauer host->cmd = NULL; 565d96be879SSascha Hauer 566d96be879SSascha Hauer if (host->req->stop) { 567d96be879SSascha Hauer if (mxcmci_start_cmd(host, host->req->stop, 0)) { 568d96be879SSascha Hauer mxcmci_finish_request(host, host->req); 569d96be879SSascha Hauer return; 570d96be879SSascha Hauer } 571d96be879SSascha Hauer } else { 572d96be879SSascha Hauer mxcmci_finish_request(host, host->req); 573d96be879SSascha Hauer } 574d96be879SSascha Hauer } 575d96be879SSascha Hauer 576d96be879SSascha Hauer static void mxcmci_cmd_done(struct mxcmci_host *host, unsigned int stat) 577d96be879SSascha Hauer { 578d96be879SSascha Hauer mxcmci_read_response(host, stat); 579d96be879SSascha Hauer host->cmd = NULL; 580d96be879SSascha Hauer 581d96be879SSascha Hauer if (!host->data && host->req) { 582d96be879SSascha Hauer mxcmci_finish_request(host, host->req); 583d96be879SSascha Hauer return; 584d96be879SSascha Hauer } 585d96be879SSascha Hauer 586d96be879SSascha Hauer /* For the DMA case the DMA engine handles the data transfer 587fd589a8fSAnand Gadiyar * automatically. For non DMA we have to do it ourselves. 588d96be879SSascha Hauer * Don't do it in interrupt context though. 589d96be879SSascha Hauer */ 590d96be879SSascha Hauer if (!mxcmci_use_dma(host) && host->data) 591d96be879SSascha Hauer schedule_work(&host->datawork); 592d96be879SSascha Hauer 593d96be879SSascha Hauer } 594d96be879SSascha Hauer 595d96be879SSascha Hauer static irqreturn_t mxcmci_irq(int irq, void *devid) 596d96be879SSascha Hauer { 597d96be879SSascha Hauer struct mxcmci_host *host = devid; 598f441b993SDaniel Mack unsigned long flags; 599f441b993SDaniel Mack bool sdio_irq; 600d96be879SSascha Hauer u32 stat; 601d96be879SSascha Hauer 602d96be879SSascha Hauer stat = readl(host->base + MMC_REG_STATUS); 6034a31f2efSDaniel Mack writel(stat & ~(STATUS_SDIO_INT_ACTIVE | STATUS_DATA_TRANS_DONE | 6044a31f2efSDaniel Mack STATUS_WRITE_OP_DONE), host->base + MMC_REG_STATUS); 605d96be879SSascha Hauer 606d96be879SSascha Hauer dev_dbg(mmc_dev(host->mmc), "%s: 0x%08x\n", __func__, stat); 607d96be879SSascha Hauer 608f441b993SDaniel Mack spin_lock_irqsave(&host->lock, flags); 609f441b993SDaniel Mack sdio_irq = (stat & STATUS_SDIO_INT_ACTIVE) && host->use_sdio; 610f441b993SDaniel Mack spin_unlock_irqrestore(&host->lock, flags); 611f441b993SDaniel Mack 6124a31f2efSDaniel Mack if (mxcmci_use_dma(host) && 6134a31f2efSDaniel Mack (stat & (STATUS_READ_OP_DONE | STATUS_WRITE_OP_DONE))) 6144a31f2efSDaniel Mack writel(STATUS_READ_OP_DONE | STATUS_WRITE_OP_DONE, 6154a31f2efSDaniel Mack host->base + MMC_REG_STATUS); 6164a31f2efSDaniel Mack 617f441b993SDaniel Mack if (sdio_irq) { 618f441b993SDaniel Mack writel(STATUS_SDIO_INT_ACTIVE, host->base + MMC_REG_STATUS); 619f441b993SDaniel Mack mmc_signal_sdio_irq(host->mmc); 620f441b993SDaniel Mack } 621f441b993SDaniel Mack 622d96be879SSascha Hauer if (stat & STATUS_END_CMD_RESP) 623d96be879SSascha Hauer mxcmci_cmd_done(host, stat); 624f441b993SDaniel Mack 625d96be879SSascha Hauer if (mxcmci_use_dma(host) && 626d96be879SSascha Hauer (stat & (STATUS_DATA_TRANS_DONE | STATUS_WRITE_OP_DONE))) 627d96be879SSascha Hauer mxcmci_data_done(host, stat); 628f53fbde4SSascha Hauer 62916b3bf8cSEric Bénard if (host->default_irq_mask && 63016b3bf8cSEric Bénard (stat & (STATUS_CARD_INSERTION | STATUS_CARD_REMOVAL))) 63116b3bf8cSEric Bénard mmc_detect_change(host->mmc, msecs_to_jiffies(200)); 632f53fbde4SSascha Hauer 633d96be879SSascha Hauer return IRQ_HANDLED; 634d96be879SSascha Hauer } 635d96be879SSascha Hauer 636d96be879SSascha Hauer static void mxcmci_request(struct mmc_host *mmc, struct mmc_request *req) 637d96be879SSascha Hauer { 638d96be879SSascha Hauer struct mxcmci_host *host = mmc_priv(mmc); 639d96be879SSascha Hauer unsigned int cmdat = host->cmdat; 640656217d2SMartin Fuzzey int error; 641d96be879SSascha Hauer 642d96be879SSascha Hauer WARN_ON(host->req != NULL); 643d96be879SSascha Hauer 644d96be879SSascha Hauer host->req = req; 645d96be879SSascha Hauer host->cmdat &= ~CMD_DAT_CONT_INIT; 646f53fbde4SSascha Hauer 647f53fbde4SSascha Hauer if (host->dma) 648d96be879SSascha Hauer host->do_dma = 1; 649f53fbde4SSascha Hauer 650d96be879SSascha Hauer if (req->data) { 651656217d2SMartin Fuzzey error = mxcmci_setup_data(host, req->data); 652656217d2SMartin Fuzzey if (error) { 653656217d2SMartin Fuzzey req->cmd->error = error; 654656217d2SMartin Fuzzey goto out; 655656217d2SMartin Fuzzey } 656656217d2SMartin Fuzzey 657d96be879SSascha Hauer 658d96be879SSascha Hauer cmdat |= CMD_DAT_CONT_DATA_ENABLE; 659d96be879SSascha Hauer 660d96be879SSascha Hauer if (req->data->flags & MMC_DATA_WRITE) 661d96be879SSascha Hauer cmdat |= CMD_DAT_CONT_WRITE; 662d96be879SSascha Hauer } 663d96be879SSascha Hauer 664656217d2SMartin Fuzzey error = mxcmci_start_cmd(host, req->cmd, cmdat); 665f53fbde4SSascha Hauer 666656217d2SMartin Fuzzey out: 667656217d2SMartin Fuzzey if (error) 668d96be879SSascha Hauer mxcmci_finish_request(host, req); 669d96be879SSascha Hauer } 670d96be879SSascha Hauer 671d96be879SSascha Hauer static void mxcmci_set_clk_rate(struct mxcmci_host *host, unsigned int clk_ios) 672d96be879SSascha Hauer { 673d96be879SSascha Hauer unsigned int divider; 674d96be879SSascha Hauer int prescaler = 0; 675d96be879SSascha Hauer unsigned int clk_in = clk_get_rate(host->clk); 676d96be879SSascha Hauer 677d96be879SSascha Hauer while (prescaler <= 0x800) { 678d96be879SSascha Hauer for (divider = 1; divider <= 0xF; divider++) { 679d96be879SSascha Hauer int x; 680d96be879SSascha Hauer 681d96be879SSascha Hauer x = (clk_in / (divider + 1)); 682d96be879SSascha Hauer 683d96be879SSascha Hauer if (prescaler) 684d96be879SSascha Hauer x /= (prescaler * 2); 685d96be879SSascha Hauer 686d96be879SSascha Hauer if (x <= clk_ios) 687d96be879SSascha Hauer break; 688d96be879SSascha Hauer } 689d96be879SSascha Hauer if (divider < 0x10) 690d96be879SSascha Hauer break; 691d96be879SSascha Hauer 692d96be879SSascha Hauer if (prescaler == 0) 693d96be879SSascha Hauer prescaler = 1; 694d96be879SSascha Hauer else 695d96be879SSascha Hauer prescaler <<= 1; 696d96be879SSascha Hauer } 697d96be879SSascha Hauer 698d96be879SSascha Hauer writew((prescaler << 4) | divider, host->base + MMC_REG_CLK_RATE); 699d96be879SSascha Hauer 700d96be879SSascha Hauer dev_dbg(mmc_dev(host->mmc), "scaler: %d divider: %d in: %d out: %d\n", 701d96be879SSascha Hauer prescaler, divider, clk_in, clk_ios); 702d96be879SSascha Hauer } 703d96be879SSascha Hauer 704f53fbde4SSascha Hauer static int mxcmci_setup_dma(struct mmc_host *mmc) 705f53fbde4SSascha Hauer { 706f53fbde4SSascha Hauer struct mxcmci_host *host = mmc_priv(mmc); 707f53fbde4SSascha Hauer struct dma_slave_config *config = &host->dma_slave_config; 708f53fbde4SSascha Hauer 709f53fbde4SSascha Hauer config->dst_addr = host->res->start + MMC_REG_BUFFER_ACCESS; 710f53fbde4SSascha Hauer config->src_addr = host->res->start + MMC_REG_BUFFER_ACCESS; 711f53fbde4SSascha Hauer config->dst_addr_width = 4; 712f53fbde4SSascha Hauer config->src_addr_width = 4; 713f53fbde4SSascha Hauer config->dst_maxburst = host->burstlen; 714f53fbde4SSascha Hauer config->src_maxburst = host->burstlen; 715258aea76SViresh Kumar config->device_fc = false; 716f53fbde4SSascha Hauer 717f53fbde4SSascha Hauer return dmaengine_slave_config(host->dma, config); 718f53fbde4SSascha Hauer } 719f53fbde4SSascha Hauer 720d96be879SSascha Hauer static void mxcmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 721d96be879SSascha Hauer { 722d96be879SSascha Hauer struct mxcmci_host *host = mmc_priv(mmc); 723f53fbde4SSascha Hauer int burstlen, ret; 724f53fbde4SSascha Hauer 725d96be879SSascha Hauer /* 7266584cb88SSascha Hauer * use burstlen of 64 (16 words) in 4 bit mode (--> reg value 0) 7276584cb88SSascha Hauer * use burstlen of 16 (4 words) in 1 bit mode (--> reg value 16) 728d96be879SSascha Hauer */ 729d96be879SSascha Hauer if (ios->bus_width == MMC_BUS_WIDTH_4) 730f53fbde4SSascha Hauer burstlen = 16; 7316584cb88SSascha Hauer else 7326584cb88SSascha Hauer burstlen = 4; 733d96be879SSascha Hauer 734f53fbde4SSascha Hauer if (mxcmci_use_dma(host) && burstlen != host->burstlen) { 735f53fbde4SSascha Hauer host->burstlen = burstlen; 736f53fbde4SSascha Hauer ret = mxcmci_setup_dma(mmc); 737f53fbde4SSascha Hauer if (ret) { 738f53fbde4SSascha Hauer dev_err(mmc_dev(host->mmc), 739f53fbde4SSascha Hauer "failed to config DMA channel. Falling back to PIO\n"); 740f53fbde4SSascha Hauer dma_release_channel(host->dma); 741f53fbde4SSascha Hauer host->do_dma = 0; 742e58f516fSSascha Hauer host->dma = NULL; 743f53fbde4SSascha Hauer } 744f53fbde4SSascha Hauer } 745f53fbde4SSascha Hauer 746d96be879SSascha Hauer if (ios->bus_width == MMC_BUS_WIDTH_4) 747d96be879SSascha Hauer host->cmdat |= CMD_DAT_CONT_BUS_WIDTH_4; 748d96be879SSascha Hauer else 749d96be879SSascha Hauer host->cmdat &= ~CMD_DAT_CONT_BUS_WIDTH_4; 750d96be879SSascha Hauer 751d96be879SSascha Hauer if (host->power_mode != ios->power_mode) { 752d078d242SAlberto Panizzo mxcmci_set_power(host, ios->power_mode, ios->vdd); 753d96be879SSascha Hauer host->power_mode = ios->power_mode; 75474b66954SAlberto Panizzo 755d96be879SSascha Hauer if (ios->power_mode == MMC_POWER_ON) 756d96be879SSascha Hauer host->cmdat |= CMD_DAT_CONT_INIT; 757d96be879SSascha Hauer } 758d96be879SSascha Hauer 759d96be879SSascha Hauer if (ios->clock) { 760d96be879SSascha Hauer mxcmci_set_clk_rate(host, ios->clock); 761d96be879SSascha Hauer writew(STR_STP_CLK_START_CLK, host->base + MMC_REG_STR_STP_CLK); 762d96be879SSascha Hauer } else { 763d96be879SSascha Hauer writew(STR_STP_CLK_STOP_CLK, host->base + MMC_REG_STR_STP_CLK); 764d96be879SSascha Hauer } 765d96be879SSascha Hauer 766d96be879SSascha Hauer host->clock = ios->clock; 767d96be879SSascha Hauer } 768d96be879SSascha Hauer 769d96be879SSascha Hauer static irqreturn_t mxcmci_detect_irq(int irq, void *data) 770d96be879SSascha Hauer { 771d96be879SSascha Hauer struct mmc_host *mmc = data; 772d96be879SSascha Hauer 773d96be879SSascha Hauer dev_dbg(mmc_dev(mmc), "%s\n", __func__); 774d96be879SSascha Hauer 775d96be879SSascha Hauer mmc_detect_change(mmc, msecs_to_jiffies(250)); 776d96be879SSascha Hauer return IRQ_HANDLED; 777d96be879SSascha Hauer } 778d96be879SSascha Hauer 779d96be879SSascha Hauer static int mxcmci_get_ro(struct mmc_host *mmc) 780d96be879SSascha Hauer { 781d96be879SSascha Hauer struct mxcmci_host *host = mmc_priv(mmc); 782d96be879SSascha Hauer 783d96be879SSascha Hauer if (host->pdata && host->pdata->get_ro) 784d96be879SSascha Hauer return !!host->pdata->get_ro(mmc_dev(mmc)); 785d96be879SSascha Hauer /* 786d96be879SSascha Hauer * Board doesn't support read only detection; let the mmc core 787d96be879SSascha Hauer * decide what to do. 788d96be879SSascha Hauer */ 789d96be879SSascha Hauer return -ENOSYS; 790d96be879SSascha Hauer } 791d96be879SSascha Hauer 792f441b993SDaniel Mack static void mxcmci_enable_sdio_irq(struct mmc_host *mmc, int enable) 793f441b993SDaniel Mack { 794f441b993SDaniel Mack struct mxcmci_host *host = mmc_priv(mmc); 795f441b993SDaniel Mack unsigned long flags; 796f441b993SDaniel Mack u32 int_cntr; 797f441b993SDaniel Mack 798f441b993SDaniel Mack spin_lock_irqsave(&host->lock, flags); 799f441b993SDaniel Mack host->use_sdio = enable; 800f441b993SDaniel Mack int_cntr = readl(host->base + MMC_REG_INT_CNTR); 801f441b993SDaniel Mack 802f441b993SDaniel Mack if (enable) 803f441b993SDaniel Mack int_cntr |= INT_SDIO_IRQ_EN; 804f441b993SDaniel Mack else 805f441b993SDaniel Mack int_cntr &= ~INT_SDIO_IRQ_EN; 806f441b993SDaniel Mack 807f441b993SDaniel Mack writel(int_cntr, host->base + MMC_REG_INT_CNTR); 808f441b993SDaniel Mack spin_unlock_irqrestore(&host->lock, flags); 809f441b993SDaniel Mack } 810d96be879SSascha Hauer 8113fcb027dSDaniel Mack static void mxcmci_init_card(struct mmc_host *host, struct mmc_card *card) 8123fcb027dSDaniel Mack { 8133fcb027dSDaniel Mack /* 8143fcb027dSDaniel Mack * MX3 SoCs have a silicon bug which corrupts CRC calculation of 8153fcb027dSDaniel Mack * multi-block transfers when connected SDIO peripheral doesn't 8163fcb027dSDaniel Mack * drive the BUSY line as required by the specs. 8173fcb027dSDaniel Mack * One way to prevent this is to only allow 1-bit transfers. 8183fcb027dSDaniel Mack */ 8193fcb027dSDaniel Mack 8203fcb027dSDaniel Mack if (cpu_is_mx3() && card->type == MMC_TYPE_SDIO) 8213fcb027dSDaniel Mack host->caps &= ~MMC_CAP_4_BIT_DATA; 8223fcb027dSDaniel Mack else 8233fcb027dSDaniel Mack host->caps |= MMC_CAP_4_BIT_DATA; 8243fcb027dSDaniel Mack } 8253fcb027dSDaniel Mack 826f53fbde4SSascha Hauer static bool filter(struct dma_chan *chan, void *param) 827f53fbde4SSascha Hauer { 828f53fbde4SSascha Hauer struct mxcmci_host *host = param; 829f53fbde4SSascha Hauer 830f53fbde4SSascha Hauer if (!imx_dma_is_general_purpose(chan)) 831f53fbde4SSascha Hauer return false; 832f53fbde4SSascha Hauer 833f53fbde4SSascha Hauer chan->private = &host->dma_data; 834f53fbde4SSascha Hauer 835f53fbde4SSascha Hauer return true; 836f53fbde4SSascha Hauer } 837f53fbde4SSascha Hauer 838d96be879SSascha Hauer static const struct mmc_host_ops mxcmci_ops = { 839d96be879SSascha Hauer .request = mxcmci_request, 840d96be879SSascha Hauer .set_ios = mxcmci_set_ios, 841d96be879SSascha Hauer .get_ro = mxcmci_get_ro, 842f441b993SDaniel Mack .enable_sdio_irq = mxcmci_enable_sdio_irq, 8433fcb027dSDaniel Mack .init_card = mxcmci_init_card, 844d96be879SSascha Hauer }; 845d96be879SSascha Hauer 846d96be879SSascha Hauer static int mxcmci_probe(struct platform_device *pdev) 847d96be879SSascha Hauer { 848d96be879SSascha Hauer struct mmc_host *mmc; 849d96be879SSascha Hauer struct mxcmci_host *host = NULL; 850c0521bafSUwe Kleine-König struct resource *iores, *r; 851d96be879SSascha Hauer int ret = 0, irq; 852f53fbde4SSascha Hauer dma_cap_mask_t mask; 853d96be879SSascha Hauer 854a3c76eb9SGirish K S pr_info("i.MX SDHC driver\n"); 855d96be879SSascha Hauer 856c0521bafSUwe Kleine-König iores = platform_get_resource(pdev, IORESOURCE_MEM, 0); 857d96be879SSascha Hauer irq = platform_get_irq(pdev, 0); 858c0521bafSUwe Kleine-König if (!iores || irq < 0) 859d96be879SSascha Hauer return -EINVAL; 860d96be879SSascha Hauer 861c0521bafSUwe Kleine-König r = request_mem_region(iores->start, resource_size(iores), pdev->name); 862d96be879SSascha Hauer if (!r) 863d96be879SSascha Hauer return -EBUSY; 864d96be879SSascha Hauer 865d96be879SSascha Hauer mmc = mmc_alloc_host(sizeof(struct mxcmci_host), &pdev->dev); 866d96be879SSascha Hauer if (!mmc) { 867d96be879SSascha Hauer ret = -ENOMEM; 868d96be879SSascha Hauer goto out_release_mem; 869d96be879SSascha Hauer } 870d96be879SSascha Hauer 871d96be879SSascha Hauer mmc->ops = &mxcmci_ops; 872f441b993SDaniel Mack mmc->caps = MMC_CAP_4_BIT_DATA | MMC_CAP_SDIO_IRQ; 873d96be879SSascha Hauer 874d96be879SSascha Hauer /* MMC core transfer sizes tunable parameters */ 875a36274e0SMartin K. Petersen mmc->max_segs = 64; 876d96be879SSascha Hauer mmc->max_blk_size = 2048; 877d96be879SSascha Hauer mmc->max_blk_count = 65535; 878d96be879SSascha Hauer mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; 879d759c374SVladimir Zapolskiy mmc->max_seg_size = mmc->max_req_size; 880d96be879SSascha Hauer 881d96be879SSascha Hauer host = mmc_priv(mmc); 882d96be879SSascha Hauer host->base = ioremap(r->start, resource_size(r)); 883d96be879SSascha Hauer if (!host->base) { 884d96be879SSascha Hauer ret = -ENOMEM; 885d96be879SSascha Hauer goto out_free; 886d96be879SSascha Hauer } 887d96be879SSascha Hauer 888d96be879SSascha Hauer host->mmc = mmc; 889d96be879SSascha Hauer host->pdata = pdev->dev.platform_data; 890f441b993SDaniel Mack spin_lock_init(&host->lock); 891d96be879SSascha Hauer 89274b66954SAlberto Panizzo mxcmci_init_ocr(host); 893d96be879SSascha Hauer 89416b3bf8cSEric Bénard if (host->pdata && host->pdata->dat3_card_detect) 89516b3bf8cSEric Bénard host->default_irq_mask = 89616b3bf8cSEric Bénard INT_CARD_INSERTION_EN | INT_CARD_REMOVAL_EN; 89716b3bf8cSEric Bénard else 89816b3bf8cSEric Bénard host->default_irq_mask = 0; 89916b3bf8cSEric Bénard 900d96be879SSascha Hauer host->res = r; 901d96be879SSascha Hauer host->irq = irq; 902d96be879SSascha Hauer 90306277b5cSSascha Hauer host->clk = clk_get(&pdev->dev, NULL); 904d96be879SSascha Hauer if (IS_ERR(host->clk)) { 905d96be879SSascha Hauer ret = PTR_ERR(host->clk); 906d96be879SSascha Hauer goto out_iounmap; 907d96be879SSascha Hauer } 908d96be879SSascha Hauer clk_enable(host->clk); 909d96be879SSascha Hauer 910d96be879SSascha Hauer mxcmci_softreset(host); 911d96be879SSascha Hauer 912d96be879SSascha Hauer host->rev_no = readw(host->base + MMC_REG_REV_NO); 913d96be879SSascha Hauer if (host->rev_no != 0x400) { 914d96be879SSascha Hauer ret = -ENODEV; 915d96be879SSascha Hauer dev_err(mmc_dev(host->mmc), "wrong rev.no. 0x%08x. aborting.\n", 916d96be879SSascha Hauer host->rev_no); 917d96be879SSascha Hauer goto out_clk_put; 918d96be879SSascha Hauer } 919d96be879SSascha Hauer 920c499b067SSascha Hauer mmc->f_min = clk_get_rate(host->clk) >> 16; 921d96be879SSascha Hauer mmc->f_max = clk_get_rate(host->clk) >> 1; 922d96be879SSascha Hauer 923d96be879SSascha Hauer /* recommended in data sheet */ 924d96be879SSascha Hauer writew(0x2db4, host->base + MMC_REG_READ_TO); 925d96be879SSascha Hauer 92616b3bf8cSEric Bénard writel(host->default_irq_mask, host->base + MMC_REG_INT_CNTR); 927d96be879SSascha Hauer 928d96be879SSascha Hauer r = platform_get_resource(pdev, IORESOURCE_DMA, 0); 929f53fbde4SSascha Hauer if (r) { 930f53fbde4SSascha Hauer host->dmareq = r->start; 931f53fbde4SSascha Hauer host->dma_data.peripheral_type = IMX_DMATYPE_SDHC; 932f53fbde4SSascha Hauer host->dma_data.priority = DMA_PRIO_LOW; 933f53fbde4SSascha Hauer host->dma_data.dma_request = host->dmareq; 934f53fbde4SSascha Hauer dma_cap_zero(mask); 935f53fbde4SSascha Hauer dma_cap_set(DMA_SLAVE, mask); 936f53fbde4SSascha Hauer host->dma = dma_request_channel(mask, filter, host); 937f53fbde4SSascha Hauer if (host->dma) 938f53fbde4SSascha Hauer mmc->max_seg_size = dma_get_max_seg_size( 939f53fbde4SSascha Hauer host->dma->device->dev); 940d96be879SSascha Hauer } 941d96be879SSascha Hauer 942f53fbde4SSascha Hauer if (!host->dma) 943f53fbde4SSascha Hauer dev_info(mmc_dev(host->mmc), "dma not available. Using PIO\n"); 944f53fbde4SSascha Hauer 945d96be879SSascha Hauer INIT_WORK(&host->datawork, mxcmci_datawork); 946d96be879SSascha Hauer 947d96be879SSascha Hauer ret = request_irq(host->irq, mxcmci_irq, 0, DRIVER_NAME, host); 948d96be879SSascha Hauer if (ret) 949d96be879SSascha Hauer goto out_free_dma; 950d96be879SSascha Hauer 951d96be879SSascha Hauer platform_set_drvdata(pdev, mmc); 952d96be879SSascha Hauer 953d96be879SSascha Hauer if (host->pdata && host->pdata->init) { 954d96be879SSascha Hauer ret = host->pdata->init(&pdev->dev, mxcmci_detect_irq, 955d96be879SSascha Hauer host->mmc); 956d96be879SSascha Hauer if (ret) 957d96be879SSascha Hauer goto out_free_irq; 958d96be879SSascha Hauer } 959d96be879SSascha Hauer 960d96be879SSascha Hauer mmc_add_host(mmc); 961d96be879SSascha Hauer 962d96be879SSascha Hauer return 0; 963d96be879SSascha Hauer 964d96be879SSascha Hauer out_free_irq: 965d96be879SSascha Hauer free_irq(host->irq, host); 966d96be879SSascha Hauer out_free_dma: 967f53fbde4SSascha Hauer if (host->dma) 968f53fbde4SSascha Hauer dma_release_channel(host->dma); 969d96be879SSascha Hauer out_clk_put: 970d96be879SSascha Hauer clk_disable(host->clk); 971d96be879SSascha Hauer clk_put(host->clk); 972d96be879SSascha Hauer out_iounmap: 973d96be879SSascha Hauer iounmap(host->base); 974d96be879SSascha Hauer out_free: 975d96be879SSascha Hauer mmc_free_host(mmc); 976d96be879SSascha Hauer out_release_mem: 977c0521bafSUwe Kleine-König release_mem_region(iores->start, resource_size(iores)); 978d96be879SSascha Hauer return ret; 979d96be879SSascha Hauer } 980d96be879SSascha Hauer 981d96be879SSascha Hauer static int mxcmci_remove(struct platform_device *pdev) 982d96be879SSascha Hauer { 983d96be879SSascha Hauer struct mmc_host *mmc = platform_get_drvdata(pdev); 984d96be879SSascha Hauer struct mxcmci_host *host = mmc_priv(mmc); 985d96be879SSascha Hauer 986d96be879SSascha Hauer platform_set_drvdata(pdev, NULL); 987d96be879SSascha Hauer 988d96be879SSascha Hauer mmc_remove_host(mmc); 989d96be879SSascha Hauer 99074b66954SAlberto Panizzo if (host->vcc) 99174b66954SAlberto Panizzo regulator_put(host->vcc); 99274b66954SAlberto Panizzo 993d96be879SSascha Hauer if (host->pdata && host->pdata->exit) 994d96be879SSascha Hauer host->pdata->exit(&pdev->dev, mmc); 995d96be879SSascha Hauer 996d96be879SSascha Hauer free_irq(host->irq, host); 997d96be879SSascha Hauer iounmap(host->base); 998f53fbde4SSascha Hauer 999f53fbde4SSascha Hauer if (host->dma) 1000f53fbde4SSascha Hauer dma_release_channel(host->dma); 1001f53fbde4SSascha Hauer 1002d96be879SSascha Hauer clk_disable(host->clk); 1003d96be879SSascha Hauer clk_put(host->clk); 1004d96be879SSascha Hauer 1005d96be879SSascha Hauer release_mem_region(host->res->start, resource_size(host->res)); 1006d96be879SSascha Hauer 1007d96be879SSascha Hauer mmc_free_host(mmc); 1008d96be879SSascha Hauer 1009d96be879SSascha Hauer return 0; 1010d96be879SSascha Hauer } 1011d96be879SSascha Hauer 1012d96be879SSascha Hauer #ifdef CONFIG_PM 1013a7d403cfSEric Bénard static int mxcmci_suspend(struct device *dev) 1014d96be879SSascha Hauer { 1015a7d403cfSEric Bénard struct mmc_host *mmc = dev_get_drvdata(dev); 1016a7d403cfSEric Bénard struct mxcmci_host *host = mmc_priv(mmc); 1017d96be879SSascha Hauer int ret = 0; 1018d96be879SSascha Hauer 1019d96be879SSascha Hauer if (mmc) 10201a13f8faSMatt Fleming ret = mmc_suspend_host(mmc); 1021a7d403cfSEric Bénard clk_disable(host->clk); 1022d96be879SSascha Hauer 1023d96be879SSascha Hauer return ret; 1024d96be879SSascha Hauer } 1025d96be879SSascha Hauer 1026a7d403cfSEric Bénard static int mxcmci_resume(struct device *dev) 1027d96be879SSascha Hauer { 1028a7d403cfSEric Bénard struct mmc_host *mmc = dev_get_drvdata(dev); 1029a7d403cfSEric Bénard struct mxcmci_host *host = mmc_priv(mmc); 1030d96be879SSascha Hauer int ret = 0; 1031d96be879SSascha Hauer 1032a7d403cfSEric Bénard clk_enable(host->clk); 1033a7d403cfSEric Bénard if (mmc) 1034d96be879SSascha Hauer ret = mmc_resume_host(mmc); 1035d96be879SSascha Hauer 1036d96be879SSascha Hauer return ret; 1037d96be879SSascha Hauer } 1038a7d403cfSEric Bénard 1039a7d403cfSEric Bénard static const struct dev_pm_ops mxcmci_pm_ops = { 1040a7d403cfSEric Bénard .suspend = mxcmci_suspend, 1041a7d403cfSEric Bénard .resume = mxcmci_resume, 1042a7d403cfSEric Bénard }; 1043a7d403cfSEric Bénard #endif 1044d96be879SSascha Hauer 1045d96be879SSascha Hauer static struct platform_driver mxcmci_driver = { 1046d96be879SSascha Hauer .probe = mxcmci_probe, 1047d96be879SSascha Hauer .remove = mxcmci_remove, 1048d96be879SSascha Hauer .driver = { 1049d96be879SSascha Hauer .name = DRIVER_NAME, 1050d96be879SSascha Hauer .owner = THIS_MODULE, 1051a7d403cfSEric Bénard #ifdef CONFIG_PM 1052a7d403cfSEric Bénard .pm = &mxcmci_pm_ops, 1053a7d403cfSEric Bénard #endif 1054d96be879SSascha Hauer } 1055d96be879SSascha Hauer }; 1056d96be879SSascha Hauer 1057d1f81a64SAxel Lin module_platform_driver(mxcmci_driver); 1058d96be879SSascha Hauer 1059d96be879SSascha Hauer MODULE_DESCRIPTION("i.MX Multimedia Card Interface Driver"); 1060d96be879SSascha Hauer MODULE_AUTHOR("Sascha Hauer, Pengutronix"); 1061d96be879SSascha Hauer MODULE_LICENSE("GPL"); 1062d96be879SSascha Hauer MODULE_ALIAS("platform:imx-mmc"); 1063