11c6a0718SPierre Ossman /* 270f10482SPierre Ossman * linux/drivers/mmc/host/mmci.c - ARM PrimeCell MMCI PL180/1 driver 31c6a0718SPierre Ossman * 41c6a0718SPierre Ossman * Copyright (C) 2003 Deep Blue Solutions, Ltd, All Rights Reserved. 51c6a0718SPierre Ossman * 61c6a0718SPierre Ossman * This program is free software; you can redistribute it and/or modify 71c6a0718SPierre Ossman * it under the terms of the GNU General Public License version 2 as 81c6a0718SPierre Ossman * published by the Free Software Foundation. 91c6a0718SPierre Ossman */ 101c6a0718SPierre Ossman #include <linux/module.h> 111c6a0718SPierre Ossman #include <linux/moduleparam.h> 121c6a0718SPierre Ossman #include <linux/init.h> 131c6a0718SPierre Ossman #include <linux/ioport.h> 141c6a0718SPierre Ossman #include <linux/device.h> 151c6a0718SPierre Ossman #include <linux/interrupt.h> 161c6a0718SPierre Ossman #include <linux/delay.h> 171c6a0718SPierre Ossman #include <linux/err.h> 181c6a0718SPierre Ossman #include <linux/highmem.h> 19019a5f56SNicolas Pitre #include <linux/log2.h> 201c6a0718SPierre Ossman #include <linux/mmc/host.h> 211c6a0718SPierre Ossman #include <linux/amba/bus.h> 221c6a0718SPierre Ossman #include <linux/clk.h> 23bd6dee6fSJens Axboe #include <linux/scatterlist.h> 2489001446SRussell King #include <linux/gpio.h> 251c6a0718SPierre Ossman 261c6a0718SPierre Ossman #include <asm/cacheflush.h> 271c6a0718SPierre Ossman #include <asm/div64.h> 281c6a0718SPierre Ossman #include <asm/io.h> 291c6a0718SPierre Ossman #include <asm/sizes.h> 301c6a0718SPierre Ossman #include <asm/mach/mmc.h> 311c6a0718SPierre Ossman 321c6a0718SPierre Ossman #include "mmci.h" 331c6a0718SPierre Ossman 341c6a0718SPierre Ossman #define DRIVER_NAME "mmci-pl18x" 351c6a0718SPierre Ossman 361c6a0718SPierre Ossman #define DBG(host,fmt,args...) \ 371c6a0718SPierre Ossman pr_debug("%s: %s: " fmt, mmc_hostname(host->mmc), __func__ , args) 381c6a0718SPierre Ossman 391c6a0718SPierre Ossman static unsigned int fmax = 515633; 401c6a0718SPierre Ossman 41a6a6464aSLinus Walleij /* 42a6a6464aSLinus Walleij * This must be called with host->lock held 43a6a6464aSLinus Walleij */ 44a6a6464aSLinus Walleij static void mmci_set_clkreg(struct mmci_host *host, unsigned int desired) 45a6a6464aSLinus Walleij { 46a6a6464aSLinus Walleij u32 clk = 0; 47a6a6464aSLinus Walleij 48a6a6464aSLinus Walleij if (desired) { 49a6a6464aSLinus Walleij if (desired >= host->mclk) { 50a6a6464aSLinus Walleij clk = MCI_CLK_BYPASS; 51a6a6464aSLinus Walleij host->cclk = host->mclk; 52a6a6464aSLinus Walleij } else { 53a6a6464aSLinus Walleij clk = host->mclk / (2 * desired) - 1; 54a6a6464aSLinus Walleij if (clk >= 256) 55a6a6464aSLinus Walleij clk = 255; 56a6a6464aSLinus Walleij host->cclk = host->mclk / (2 * (clk + 1)); 57a6a6464aSLinus Walleij } 58a6a6464aSLinus Walleij if (host->hw_designer == 0x80) 59a6a6464aSLinus Walleij clk |= MCI_FCEN; /* Bug fix in ST IP block */ 60a6a6464aSLinus Walleij clk |= MCI_CLK_ENABLE; 61a6a6464aSLinus Walleij /* This hasn't proven to be worthwhile */ 62a6a6464aSLinus Walleij /* clk |= MCI_CLK_PWRSAVE; */ 63a6a6464aSLinus Walleij } 64a6a6464aSLinus Walleij 65a6a6464aSLinus Walleij writel(clk, host->base + MMCICLOCK); 66a6a6464aSLinus Walleij } 67a6a6464aSLinus Walleij 681c6a0718SPierre Ossman static void 691c6a0718SPierre Ossman mmci_request_end(struct mmci_host *host, struct mmc_request *mrq) 701c6a0718SPierre Ossman { 711c6a0718SPierre Ossman writel(0, host->base + MMCICOMMAND); 721c6a0718SPierre Ossman 731c6a0718SPierre Ossman BUG_ON(host->data); 741c6a0718SPierre Ossman 751c6a0718SPierre Ossman host->mrq = NULL; 761c6a0718SPierre Ossman host->cmd = NULL; 771c6a0718SPierre Ossman 781c6a0718SPierre Ossman if (mrq->data) 791c6a0718SPierre Ossman mrq->data->bytes_xfered = host->data_xfered; 801c6a0718SPierre Ossman 811c6a0718SPierre Ossman /* 821c6a0718SPierre Ossman * Need to drop the host lock here; mmc_request_done may call 831c6a0718SPierre Ossman * back into the driver... 841c6a0718SPierre Ossman */ 851c6a0718SPierre Ossman spin_unlock(&host->lock); 861c6a0718SPierre Ossman mmc_request_done(host->mmc, mrq); 871c6a0718SPierre Ossman spin_lock(&host->lock); 881c6a0718SPierre Ossman } 891c6a0718SPierre Ossman 901c6a0718SPierre Ossman static void mmci_stop_data(struct mmci_host *host) 911c6a0718SPierre Ossman { 921c6a0718SPierre Ossman writel(0, host->base + MMCIDATACTRL); 931c6a0718SPierre Ossman writel(0, host->base + MMCIMASK1); 941c6a0718SPierre Ossman host->data = NULL; 951c6a0718SPierre Ossman } 961c6a0718SPierre Ossman 971c6a0718SPierre Ossman static void mmci_start_data(struct mmci_host *host, struct mmc_data *data) 981c6a0718SPierre Ossman { 991c6a0718SPierre Ossman unsigned int datactrl, timeout, irqmask; 1001c6a0718SPierre Ossman unsigned long long clks; 1011c6a0718SPierre Ossman void __iomem *base; 1021c6a0718SPierre Ossman int blksz_bits; 1031c6a0718SPierre Ossman 1041c6a0718SPierre Ossman DBG(host, "blksz %04x blks %04x flags %08x\n", 1051c6a0718SPierre Ossman data->blksz, data->blocks, data->flags); 1061c6a0718SPierre Ossman 1071c6a0718SPierre Ossman host->data = data; 1081c6a0718SPierre Ossman host->size = data->blksz; 1091c6a0718SPierre Ossman host->data_xfered = 0; 1101c6a0718SPierre Ossman 1111c6a0718SPierre Ossman mmci_init_sg(host, data); 1121c6a0718SPierre Ossman 1131c6a0718SPierre Ossman clks = (unsigned long long)data->timeout_ns * host->cclk; 1141c6a0718SPierre Ossman do_div(clks, 1000000000UL); 1151c6a0718SPierre Ossman 1161c6a0718SPierre Ossman timeout = data->timeout_clks + (unsigned int)clks; 1171c6a0718SPierre Ossman 1181c6a0718SPierre Ossman base = host->base; 1191c6a0718SPierre Ossman writel(timeout, base + MMCIDATATIMER); 1201c6a0718SPierre Ossman writel(host->size, base + MMCIDATALENGTH); 1211c6a0718SPierre Ossman 1221c6a0718SPierre Ossman blksz_bits = ffs(data->blksz) - 1; 1231c6a0718SPierre Ossman BUG_ON(1 << blksz_bits != data->blksz); 1241c6a0718SPierre Ossman 1251c6a0718SPierre Ossman datactrl = MCI_DPSM_ENABLE | blksz_bits << 4; 1261c6a0718SPierre Ossman if (data->flags & MMC_DATA_READ) { 1271c6a0718SPierre Ossman datactrl |= MCI_DPSM_DIRECTION; 1281c6a0718SPierre Ossman irqmask = MCI_RXFIFOHALFFULLMASK; 1291c6a0718SPierre Ossman 1301c6a0718SPierre Ossman /* 1311c6a0718SPierre Ossman * If we have less than a FIFOSIZE of bytes to transfer, 1321c6a0718SPierre Ossman * trigger a PIO interrupt as soon as any data is available. 1331c6a0718SPierre Ossman */ 1341c6a0718SPierre Ossman if (host->size < MCI_FIFOSIZE) 1351c6a0718SPierre Ossman irqmask |= MCI_RXDATAAVLBLMASK; 1361c6a0718SPierre Ossman } else { 1371c6a0718SPierre Ossman /* 1381c6a0718SPierre Ossman * We don't actually need to include "FIFO empty" here 1391c6a0718SPierre Ossman * since its implicit in "FIFO half empty". 1401c6a0718SPierre Ossman */ 1411c6a0718SPierre Ossman irqmask = MCI_TXFIFOHALFEMPTYMASK; 1421c6a0718SPierre Ossman } 1431c6a0718SPierre Ossman 1441c6a0718SPierre Ossman writel(datactrl, base + MMCIDATACTRL); 1451c6a0718SPierre Ossman writel(readl(base + MMCIMASK0) & ~MCI_DATAENDMASK, base + MMCIMASK0); 1461c6a0718SPierre Ossman writel(irqmask, base + MMCIMASK1); 1471c6a0718SPierre Ossman } 1481c6a0718SPierre Ossman 1491c6a0718SPierre Ossman static void 1501c6a0718SPierre Ossman mmci_start_command(struct mmci_host *host, struct mmc_command *cmd, u32 c) 1511c6a0718SPierre Ossman { 1521c6a0718SPierre Ossman void __iomem *base = host->base; 1531c6a0718SPierre Ossman 1541c6a0718SPierre Ossman DBG(host, "op %02x arg %08x flags %08x\n", 1551c6a0718SPierre Ossman cmd->opcode, cmd->arg, cmd->flags); 1561c6a0718SPierre Ossman 1571c6a0718SPierre Ossman if (readl(base + MMCICOMMAND) & MCI_CPSM_ENABLE) { 1581c6a0718SPierre Ossman writel(0, base + MMCICOMMAND); 1591c6a0718SPierre Ossman udelay(1); 1601c6a0718SPierre Ossman } 1611c6a0718SPierre Ossman 1621c6a0718SPierre Ossman c |= cmd->opcode | MCI_CPSM_ENABLE; 1631c6a0718SPierre Ossman if (cmd->flags & MMC_RSP_PRESENT) { 1641c6a0718SPierre Ossman if (cmd->flags & MMC_RSP_136) 1651c6a0718SPierre Ossman c |= MCI_CPSM_LONGRSP; 1661c6a0718SPierre Ossman c |= MCI_CPSM_RESPONSE; 1671c6a0718SPierre Ossman } 1681c6a0718SPierre Ossman if (/*interrupt*/0) 1691c6a0718SPierre Ossman c |= MCI_CPSM_INTERRUPT; 1701c6a0718SPierre Ossman 1711c6a0718SPierre Ossman host->cmd = cmd; 1721c6a0718SPierre Ossman 1731c6a0718SPierre Ossman writel(cmd->arg, base + MMCIARGUMENT); 1741c6a0718SPierre Ossman writel(c, base + MMCICOMMAND); 1751c6a0718SPierre Ossman } 1761c6a0718SPierre Ossman 1771c6a0718SPierre Ossman static void 1781c6a0718SPierre Ossman mmci_data_irq(struct mmci_host *host, struct mmc_data *data, 1791c6a0718SPierre Ossman unsigned int status) 1801c6a0718SPierre Ossman { 1811c6a0718SPierre Ossman if (status & MCI_DATABLOCKEND) { 1821c6a0718SPierre Ossman host->data_xfered += data->blksz; 1831c6a0718SPierre Ossman } 1841c6a0718SPierre Ossman if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_TXUNDERRUN|MCI_RXOVERRUN)) { 1851c6a0718SPierre Ossman if (status & MCI_DATACRCFAIL) 18617b0429dSPierre Ossman data->error = -EILSEQ; 1871c6a0718SPierre Ossman else if (status & MCI_DATATIMEOUT) 18817b0429dSPierre Ossman data->error = -ETIMEDOUT; 1891c6a0718SPierre Ossman else if (status & (MCI_TXUNDERRUN|MCI_RXOVERRUN)) 19017b0429dSPierre Ossman data->error = -EIO; 1911c6a0718SPierre Ossman status |= MCI_DATAEND; 1921c6a0718SPierre Ossman 1931c6a0718SPierre Ossman /* 1941c6a0718SPierre Ossman * We hit an error condition. Ensure that any data 1951c6a0718SPierre Ossman * partially written to a page is properly coherent. 1961c6a0718SPierre Ossman */ 1971c6a0718SPierre Ossman if (host->sg_len && data->flags & MMC_DATA_READ) 198bd6dee6fSJens Axboe flush_dcache_page(sg_page(host->sg_ptr)); 1991c6a0718SPierre Ossman } 2001c6a0718SPierre Ossman if (status & MCI_DATAEND) { 2011c6a0718SPierre Ossman mmci_stop_data(host); 2021c6a0718SPierre Ossman 2031c6a0718SPierre Ossman if (!data->stop) { 2041c6a0718SPierre Ossman mmci_request_end(host, data->mrq); 2051c6a0718SPierre Ossman } else { 2061c6a0718SPierre Ossman mmci_start_command(host, data->stop, 0); 2071c6a0718SPierre Ossman } 2081c6a0718SPierre Ossman } 2091c6a0718SPierre Ossman } 2101c6a0718SPierre Ossman 2111c6a0718SPierre Ossman static void 2121c6a0718SPierre Ossman mmci_cmd_irq(struct mmci_host *host, struct mmc_command *cmd, 2131c6a0718SPierre Ossman unsigned int status) 2141c6a0718SPierre Ossman { 2151c6a0718SPierre Ossman void __iomem *base = host->base; 2161c6a0718SPierre Ossman 2171c6a0718SPierre Ossman host->cmd = NULL; 2181c6a0718SPierre Ossman 2191c6a0718SPierre Ossman cmd->resp[0] = readl(base + MMCIRESPONSE0); 2201c6a0718SPierre Ossman cmd->resp[1] = readl(base + MMCIRESPONSE1); 2211c6a0718SPierre Ossman cmd->resp[2] = readl(base + MMCIRESPONSE2); 2221c6a0718SPierre Ossman cmd->resp[3] = readl(base + MMCIRESPONSE3); 2231c6a0718SPierre Ossman 2241c6a0718SPierre Ossman if (status & MCI_CMDTIMEOUT) { 22517b0429dSPierre Ossman cmd->error = -ETIMEDOUT; 2261c6a0718SPierre Ossman } else if (status & MCI_CMDCRCFAIL && cmd->flags & MMC_RSP_CRC) { 22717b0429dSPierre Ossman cmd->error = -EILSEQ; 2281c6a0718SPierre Ossman } 2291c6a0718SPierre Ossman 23017b0429dSPierre Ossman if (!cmd->data || cmd->error) { 2311c6a0718SPierre Ossman if (host->data) 2321c6a0718SPierre Ossman mmci_stop_data(host); 2331c6a0718SPierre Ossman mmci_request_end(host, cmd->mrq); 2341c6a0718SPierre Ossman } else if (!(cmd->data->flags & MMC_DATA_READ)) { 2351c6a0718SPierre Ossman mmci_start_data(host, cmd->data); 2361c6a0718SPierre Ossman } 2371c6a0718SPierre Ossman } 2381c6a0718SPierre Ossman 2391c6a0718SPierre Ossman static int mmci_pio_read(struct mmci_host *host, char *buffer, unsigned int remain) 2401c6a0718SPierre Ossman { 2411c6a0718SPierre Ossman void __iomem *base = host->base; 2421c6a0718SPierre Ossman char *ptr = buffer; 2431c6a0718SPierre Ossman u32 status; 24426eed9a5SLinus Walleij int host_remain = host->size; 2451c6a0718SPierre Ossman 2461c6a0718SPierre Ossman do { 24726eed9a5SLinus Walleij int count = host_remain - (readl(base + MMCIFIFOCNT) << 2); 2481c6a0718SPierre Ossman 2491c6a0718SPierre Ossman if (count > remain) 2501c6a0718SPierre Ossman count = remain; 2511c6a0718SPierre Ossman 2521c6a0718SPierre Ossman if (count <= 0) 2531c6a0718SPierre Ossman break; 2541c6a0718SPierre Ossman 2551c6a0718SPierre Ossman readsl(base + MMCIFIFO, ptr, count >> 2); 2561c6a0718SPierre Ossman 2571c6a0718SPierre Ossman ptr += count; 2581c6a0718SPierre Ossman remain -= count; 25926eed9a5SLinus Walleij host_remain -= count; 2601c6a0718SPierre Ossman 2611c6a0718SPierre Ossman if (remain == 0) 2621c6a0718SPierre Ossman break; 2631c6a0718SPierre Ossman 2641c6a0718SPierre Ossman status = readl(base + MMCISTATUS); 2651c6a0718SPierre Ossman } while (status & MCI_RXDATAAVLBL); 2661c6a0718SPierre Ossman 2671c6a0718SPierre Ossman return ptr - buffer; 2681c6a0718SPierre Ossman } 2691c6a0718SPierre Ossman 2701c6a0718SPierre Ossman static int mmci_pio_write(struct mmci_host *host, char *buffer, unsigned int remain, u32 status) 2711c6a0718SPierre Ossman { 2721c6a0718SPierre Ossman void __iomem *base = host->base; 2731c6a0718SPierre Ossman char *ptr = buffer; 2741c6a0718SPierre Ossman 2751c6a0718SPierre Ossman do { 2761c6a0718SPierre Ossman unsigned int count, maxcnt; 2771c6a0718SPierre Ossman 2781c6a0718SPierre Ossman maxcnt = status & MCI_TXFIFOEMPTY ? MCI_FIFOSIZE : MCI_FIFOHALFSIZE; 2791c6a0718SPierre Ossman count = min(remain, maxcnt); 2801c6a0718SPierre Ossman 2811c6a0718SPierre Ossman writesl(base + MMCIFIFO, ptr, count >> 2); 2821c6a0718SPierre Ossman 2831c6a0718SPierre Ossman ptr += count; 2841c6a0718SPierre Ossman remain -= count; 2851c6a0718SPierre Ossman 2861c6a0718SPierre Ossman if (remain == 0) 2871c6a0718SPierre Ossman break; 2881c6a0718SPierre Ossman 2891c6a0718SPierre Ossman status = readl(base + MMCISTATUS); 2901c6a0718SPierre Ossman } while (status & MCI_TXFIFOHALFEMPTY); 2911c6a0718SPierre Ossman 2921c6a0718SPierre Ossman return ptr - buffer; 2931c6a0718SPierre Ossman } 2941c6a0718SPierre Ossman 2951c6a0718SPierre Ossman /* 2961c6a0718SPierre Ossman * PIO data transfer IRQ handler. 2971c6a0718SPierre Ossman */ 2981c6a0718SPierre Ossman static irqreturn_t mmci_pio_irq(int irq, void *dev_id) 2991c6a0718SPierre Ossman { 3001c6a0718SPierre Ossman struct mmci_host *host = dev_id; 3011c6a0718SPierre Ossman void __iomem *base = host->base; 3021c6a0718SPierre Ossman u32 status; 3031c6a0718SPierre Ossman 3041c6a0718SPierre Ossman status = readl(base + MMCISTATUS); 3051c6a0718SPierre Ossman 3061c6a0718SPierre Ossman DBG(host, "irq1 %08x\n", status); 3071c6a0718SPierre Ossman 3081c6a0718SPierre Ossman do { 3091c6a0718SPierre Ossman unsigned long flags; 3101c6a0718SPierre Ossman unsigned int remain, len; 3111c6a0718SPierre Ossman char *buffer; 3121c6a0718SPierre Ossman 3131c6a0718SPierre Ossman /* 3141c6a0718SPierre Ossman * For write, we only need to test the half-empty flag 3151c6a0718SPierre Ossman * here - if the FIFO is completely empty, then by 3161c6a0718SPierre Ossman * definition it is more than half empty. 3171c6a0718SPierre Ossman * 3181c6a0718SPierre Ossman * For read, check for data available. 3191c6a0718SPierre Ossman */ 3201c6a0718SPierre Ossman if (!(status & (MCI_TXFIFOHALFEMPTY|MCI_RXDATAAVLBL))) 3211c6a0718SPierre Ossman break; 3221c6a0718SPierre Ossman 3231c6a0718SPierre Ossman /* 3241c6a0718SPierre Ossman * Map the current scatter buffer. 3251c6a0718SPierre Ossman */ 3261c6a0718SPierre Ossman buffer = mmci_kmap_atomic(host, &flags) + host->sg_off; 3271c6a0718SPierre Ossman remain = host->sg_ptr->length - host->sg_off; 3281c6a0718SPierre Ossman 3291c6a0718SPierre Ossman len = 0; 3301c6a0718SPierre Ossman if (status & MCI_RXACTIVE) 3311c6a0718SPierre Ossman len = mmci_pio_read(host, buffer, remain); 3321c6a0718SPierre Ossman if (status & MCI_TXACTIVE) 3331c6a0718SPierre Ossman len = mmci_pio_write(host, buffer, remain, status); 3341c6a0718SPierre Ossman 3351c6a0718SPierre Ossman /* 3361c6a0718SPierre Ossman * Unmap the buffer. 3371c6a0718SPierre Ossman */ 3381c6a0718SPierre Ossman mmci_kunmap_atomic(host, buffer, &flags); 3391c6a0718SPierre Ossman 3401c6a0718SPierre Ossman host->sg_off += len; 3411c6a0718SPierre Ossman host->size -= len; 3421c6a0718SPierre Ossman remain -= len; 3431c6a0718SPierre Ossman 3441c6a0718SPierre Ossman if (remain) 3451c6a0718SPierre Ossman break; 3461c6a0718SPierre Ossman 3471c6a0718SPierre Ossman /* 3481c6a0718SPierre Ossman * If we were reading, and we have completed this 3491c6a0718SPierre Ossman * page, ensure that the data cache is coherent. 3501c6a0718SPierre Ossman */ 3511c6a0718SPierre Ossman if (status & MCI_RXACTIVE) 352bd6dee6fSJens Axboe flush_dcache_page(sg_page(host->sg_ptr)); 3531c6a0718SPierre Ossman 3541c6a0718SPierre Ossman if (!mmci_next_sg(host)) 3551c6a0718SPierre Ossman break; 3561c6a0718SPierre Ossman 3571c6a0718SPierre Ossman status = readl(base + MMCISTATUS); 3581c6a0718SPierre Ossman } while (1); 3591c6a0718SPierre Ossman 3601c6a0718SPierre Ossman /* 3611c6a0718SPierre Ossman * If we're nearing the end of the read, switch to 3621c6a0718SPierre Ossman * "any data available" mode. 3631c6a0718SPierre Ossman */ 3641c6a0718SPierre Ossman if (status & MCI_RXACTIVE && host->size < MCI_FIFOSIZE) 3651c6a0718SPierre Ossman writel(MCI_RXDATAAVLBLMASK, base + MMCIMASK1); 3661c6a0718SPierre Ossman 3671c6a0718SPierre Ossman /* 3681c6a0718SPierre Ossman * If we run out of data, disable the data IRQs; this 3691c6a0718SPierre Ossman * prevents a race where the FIFO becomes empty before 3701c6a0718SPierre Ossman * the chip itself has disabled the data path, and 3711c6a0718SPierre Ossman * stops us racing with our data end IRQ. 3721c6a0718SPierre Ossman */ 3731c6a0718SPierre Ossman if (host->size == 0) { 3741c6a0718SPierre Ossman writel(0, base + MMCIMASK1); 3751c6a0718SPierre Ossman writel(readl(base + MMCIMASK0) | MCI_DATAENDMASK, base + MMCIMASK0); 3761c6a0718SPierre Ossman } 3771c6a0718SPierre Ossman 3781c6a0718SPierre Ossman return IRQ_HANDLED; 3791c6a0718SPierre Ossman } 3801c6a0718SPierre Ossman 3811c6a0718SPierre Ossman /* 3821c6a0718SPierre Ossman * Handle completion of command and data transfers. 3831c6a0718SPierre Ossman */ 3841c6a0718SPierre Ossman static irqreturn_t mmci_irq(int irq, void *dev_id) 3851c6a0718SPierre Ossman { 3861c6a0718SPierre Ossman struct mmci_host *host = dev_id; 3871c6a0718SPierre Ossman u32 status; 3881c6a0718SPierre Ossman int ret = 0; 3891c6a0718SPierre Ossman 3901c6a0718SPierre Ossman spin_lock(&host->lock); 3911c6a0718SPierre Ossman 3921c6a0718SPierre Ossman do { 3931c6a0718SPierre Ossman struct mmc_command *cmd; 3941c6a0718SPierre Ossman struct mmc_data *data; 3951c6a0718SPierre Ossman 3961c6a0718SPierre Ossman status = readl(host->base + MMCISTATUS); 3971c6a0718SPierre Ossman status &= readl(host->base + MMCIMASK0); 3981c6a0718SPierre Ossman writel(status, host->base + MMCICLEAR); 3991c6a0718SPierre Ossman 4001c6a0718SPierre Ossman DBG(host, "irq0 %08x\n", status); 4011c6a0718SPierre Ossman 4021c6a0718SPierre Ossman data = host->data; 4031c6a0718SPierre Ossman if (status & (MCI_DATACRCFAIL|MCI_DATATIMEOUT|MCI_TXUNDERRUN| 4041c6a0718SPierre Ossman MCI_RXOVERRUN|MCI_DATAEND|MCI_DATABLOCKEND) && data) 4051c6a0718SPierre Ossman mmci_data_irq(host, data, status); 4061c6a0718SPierre Ossman 4071c6a0718SPierre Ossman cmd = host->cmd; 4081c6a0718SPierre Ossman if (status & (MCI_CMDCRCFAIL|MCI_CMDTIMEOUT|MCI_CMDSENT|MCI_CMDRESPEND) && cmd) 4091c6a0718SPierre Ossman mmci_cmd_irq(host, cmd, status); 4101c6a0718SPierre Ossman 4111c6a0718SPierre Ossman ret = 1; 4121c6a0718SPierre Ossman } while (status); 4131c6a0718SPierre Ossman 4141c6a0718SPierre Ossman spin_unlock(&host->lock); 4151c6a0718SPierre Ossman 4161c6a0718SPierre Ossman return IRQ_RETVAL(ret); 4171c6a0718SPierre Ossman } 4181c6a0718SPierre Ossman 4191c6a0718SPierre Ossman static void mmci_request(struct mmc_host *mmc, struct mmc_request *mrq) 4201c6a0718SPierre Ossman { 4211c6a0718SPierre Ossman struct mmci_host *host = mmc_priv(mmc); 4229e943021SLinus Walleij unsigned long flags; 4231c6a0718SPierre Ossman 4241c6a0718SPierre Ossman WARN_ON(host->mrq != NULL); 4251c6a0718SPierre Ossman 426019a5f56SNicolas Pitre if (mrq->data && !is_power_of_2(mrq->data->blksz)) { 427255d01afSPierre Ossman printk(KERN_ERR "%s: Unsupported block size (%d bytes)\n", 428255d01afSPierre Ossman mmc_hostname(mmc), mrq->data->blksz); 429255d01afSPierre Ossman mrq->cmd->error = -EINVAL; 430255d01afSPierre Ossman mmc_request_done(mmc, mrq); 431255d01afSPierre Ossman return; 432255d01afSPierre Ossman } 433255d01afSPierre Ossman 4349e943021SLinus Walleij spin_lock_irqsave(&host->lock, flags); 4351c6a0718SPierre Ossman 4361c6a0718SPierre Ossman host->mrq = mrq; 4371c6a0718SPierre Ossman 4381c6a0718SPierre Ossman if (mrq->data && mrq->data->flags & MMC_DATA_READ) 4391c6a0718SPierre Ossman mmci_start_data(host, mrq->data); 4401c6a0718SPierre Ossman 4411c6a0718SPierre Ossman mmci_start_command(host, mrq->cmd, 0); 4421c6a0718SPierre Ossman 4439e943021SLinus Walleij spin_unlock_irqrestore(&host->lock, flags); 4441c6a0718SPierre Ossman } 4451c6a0718SPierre Ossman 4461c6a0718SPierre Ossman static void mmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 4471c6a0718SPierre Ossman { 4481c6a0718SPierre Ossman struct mmci_host *host = mmc_priv(mmc); 449a6a6464aSLinus Walleij u32 pwr = 0; 450a6a6464aSLinus Walleij unsigned long flags; 4511c6a0718SPierre Ossman 4521c6a0718SPierre Ossman if (host->plat->translate_vdd) 4531c6a0718SPierre Ossman pwr |= host->plat->translate_vdd(mmc_dev(mmc), ios->vdd); 4541c6a0718SPierre Ossman 4551c6a0718SPierre Ossman switch (ios->power_mode) { 4561c6a0718SPierre Ossman case MMC_POWER_OFF: 4571c6a0718SPierre Ossman break; 4581c6a0718SPierre Ossman case MMC_POWER_UP: 459cc30d60eSLinus Walleij /* The ST version does not have this, fall through to POWER_ON */ 460f17a1f06SLinus Walleij if (host->hw_designer != AMBA_VENDOR_ST) { 4611c6a0718SPierre Ossman pwr |= MCI_PWR_UP; 4621c6a0718SPierre Ossman break; 463cc30d60eSLinus Walleij } 4641c6a0718SPierre Ossman case MMC_POWER_ON: 4651c6a0718SPierre Ossman pwr |= MCI_PWR_ON; 4661c6a0718SPierre Ossman break; 4671c6a0718SPierre Ossman } 4681c6a0718SPierre Ossman 469cc30d60eSLinus Walleij if (ios->bus_mode == MMC_BUSMODE_OPENDRAIN) { 470f17a1f06SLinus Walleij if (host->hw_designer != AMBA_VENDOR_ST) 4711c6a0718SPierre Ossman pwr |= MCI_ROD; 472cc30d60eSLinus Walleij else { 473cc30d60eSLinus Walleij /* 474cc30d60eSLinus Walleij * The ST Micro variant use the ROD bit for something 475cc30d60eSLinus Walleij * else and only has OD (Open Drain). 476cc30d60eSLinus Walleij */ 477cc30d60eSLinus Walleij pwr |= MCI_OD; 478cc30d60eSLinus Walleij } 479cc30d60eSLinus Walleij } 4801c6a0718SPierre Ossman 481a6a6464aSLinus Walleij spin_lock_irqsave(&host->lock, flags); 482a6a6464aSLinus Walleij 483a6a6464aSLinus Walleij mmci_set_clkreg(host, ios->clock); 4841c6a0718SPierre Ossman 4851c6a0718SPierre Ossman if (host->pwr != pwr) { 4861c6a0718SPierre Ossman host->pwr = pwr; 4871c6a0718SPierre Ossman writel(pwr, host->base + MMCIPOWER); 4881c6a0718SPierre Ossman } 489a6a6464aSLinus Walleij 490a6a6464aSLinus Walleij spin_unlock_irqrestore(&host->lock, flags); 4911c6a0718SPierre Ossman } 4921c6a0718SPierre Ossman 49389001446SRussell King static int mmci_get_ro(struct mmc_host *mmc) 49489001446SRussell King { 49589001446SRussell King struct mmci_host *host = mmc_priv(mmc); 49689001446SRussell King 49789001446SRussell King if (host->gpio_wp == -ENOSYS) 49889001446SRussell King return -ENOSYS; 49989001446SRussell King 50089001446SRussell King return gpio_get_value(host->gpio_wp); 50189001446SRussell King } 50289001446SRussell King 50389001446SRussell King static int mmci_get_cd(struct mmc_host *mmc) 50489001446SRussell King { 50589001446SRussell King struct mmci_host *host = mmc_priv(mmc); 50689001446SRussell King unsigned int status; 50789001446SRussell King 50889001446SRussell King if (host->gpio_cd == -ENOSYS) 50989001446SRussell King status = host->plat->status(mmc_dev(host->mmc)); 51089001446SRussell King else 51189001446SRussell King status = gpio_get_value(host->gpio_cd); 51289001446SRussell King 51389001446SRussell King return !status; 51489001446SRussell King } 51589001446SRussell King 5161c6a0718SPierre Ossman static const struct mmc_host_ops mmci_ops = { 5171c6a0718SPierre Ossman .request = mmci_request, 5181c6a0718SPierre Ossman .set_ios = mmci_set_ios, 51989001446SRussell King .get_ro = mmci_get_ro, 52089001446SRussell King .get_cd = mmci_get_cd, 5211c6a0718SPierre Ossman }; 5221c6a0718SPierre Ossman 5231c6a0718SPierre Ossman static void mmci_check_status(unsigned long data) 5241c6a0718SPierre Ossman { 5251c6a0718SPierre Ossman struct mmci_host *host = (struct mmci_host *)data; 52689001446SRussell King unsigned int status = mmci_get_cd(host->mmc); 5271c6a0718SPierre Ossman 5281c6a0718SPierre Ossman if (status ^ host->oldstat) 5291c6a0718SPierre Ossman mmc_detect_change(host->mmc, 0); 5301c6a0718SPierre Ossman 5311c6a0718SPierre Ossman host->oldstat = status; 5321c6a0718SPierre Ossman mod_timer(&host->timer, jiffies + HZ); 5331c6a0718SPierre Ossman } 5341c6a0718SPierre Ossman 53503fbdb15SAlessandro Rubini static int __devinit mmci_probe(struct amba_device *dev, struct amba_id *id) 5361c6a0718SPierre Ossman { 5371c6a0718SPierre Ossman struct mmc_platform_data *plat = dev->dev.platform_data; 5381c6a0718SPierre Ossman struct mmci_host *host; 5391c6a0718SPierre Ossman struct mmc_host *mmc; 5401c6a0718SPierre Ossman int ret; 5411c6a0718SPierre Ossman 5421c6a0718SPierre Ossman /* must have platform data */ 5431c6a0718SPierre Ossman if (!plat) { 5441c6a0718SPierre Ossman ret = -EINVAL; 5451c6a0718SPierre Ossman goto out; 5461c6a0718SPierre Ossman } 5471c6a0718SPierre Ossman 5481c6a0718SPierre Ossman ret = amba_request_regions(dev, DRIVER_NAME); 5491c6a0718SPierre Ossman if (ret) 5501c6a0718SPierre Ossman goto out; 5511c6a0718SPierre Ossman 5521c6a0718SPierre Ossman mmc = mmc_alloc_host(sizeof(struct mmci_host), &dev->dev); 5531c6a0718SPierre Ossman if (!mmc) { 5541c6a0718SPierre Ossman ret = -ENOMEM; 5551c6a0718SPierre Ossman goto rel_regions; 5561c6a0718SPierre Ossman } 5571c6a0718SPierre Ossman 5581c6a0718SPierre Ossman host = mmc_priv(mmc); 5594ea580f1SRabin Vincent host->mmc = mmc; 560012b7d33SRussell King 56189001446SRussell King host->gpio_wp = -ENOSYS; 56289001446SRussell King host->gpio_cd = -ENOSYS; 56389001446SRussell King 564012b7d33SRussell King host->hw_designer = amba_manf(dev); 565012b7d33SRussell King host->hw_revision = amba_rev(dev); 566cc30d60eSLinus Walleij DBG(host, "designer ID = 0x%02x\n", host->hw_designer); 567cc30d60eSLinus Walleij DBG(host, "revision = 0x%01x\n", host->hw_revision); 568012b7d33SRussell King 569ee569c43SRussell King host->clk = clk_get(&dev->dev, NULL); 5701c6a0718SPierre Ossman if (IS_ERR(host->clk)) { 5711c6a0718SPierre Ossman ret = PTR_ERR(host->clk); 5721c6a0718SPierre Ossman host->clk = NULL; 5731c6a0718SPierre Ossman goto host_free; 5741c6a0718SPierre Ossman } 5751c6a0718SPierre Ossman 5761c6a0718SPierre Ossman ret = clk_enable(host->clk); 5771c6a0718SPierre Ossman if (ret) 5781c6a0718SPierre Ossman goto clk_free; 5791c6a0718SPierre Ossman 5801c6a0718SPierre Ossman host->plat = plat; 5811c6a0718SPierre Ossman host->mclk = clk_get_rate(host->clk); 582c8df9a53SLinus Walleij /* 583c8df9a53SLinus Walleij * According to the spec, mclk is max 100 MHz, 584c8df9a53SLinus Walleij * so we try to adjust the clock down to this, 585c8df9a53SLinus Walleij * (if possible). 586c8df9a53SLinus Walleij */ 587c8df9a53SLinus Walleij if (host->mclk > 100000000) { 588c8df9a53SLinus Walleij ret = clk_set_rate(host->clk, 100000000); 589c8df9a53SLinus Walleij if (ret < 0) 590c8df9a53SLinus Walleij goto clk_disable; 591c8df9a53SLinus Walleij host->mclk = clk_get_rate(host->clk); 592c8df9a53SLinus Walleij DBG(host, "eventual mclk rate: %u Hz\n", host->mclk); 593c8df9a53SLinus Walleij } 594dc890c2dSLinus Walleij host->base = ioremap(dev->res.start, resource_size(&dev->res)); 5951c6a0718SPierre Ossman if (!host->base) { 5961c6a0718SPierre Ossman ret = -ENOMEM; 5971c6a0718SPierre Ossman goto clk_disable; 5981c6a0718SPierre Ossman } 5991c6a0718SPierre Ossman 6001c6a0718SPierre Ossman mmc->ops = &mmci_ops; 6011c6a0718SPierre Ossman mmc->f_min = (host->mclk + 511) / 512; 6021c6a0718SPierre Ossman mmc->f_max = min(host->mclk, fmax); 6031c6a0718SPierre Ossman mmc->ocr_avail = plat->ocr_mask; 6041c6a0718SPierre Ossman 6051c6a0718SPierre Ossman /* 6061c6a0718SPierre Ossman * We can do SGIO 6071c6a0718SPierre Ossman */ 6081c6a0718SPierre Ossman mmc->max_hw_segs = 16; 6091c6a0718SPierre Ossman mmc->max_phys_segs = NR_SG; 6101c6a0718SPierre Ossman 6111c6a0718SPierre Ossman /* 6121c6a0718SPierre Ossman * Since we only have a 16-bit data length register, we must 6131c6a0718SPierre Ossman * ensure that we don't exceed 2^16-1 bytes in a single request. 6141c6a0718SPierre Ossman */ 6151c6a0718SPierre Ossman mmc->max_req_size = 65535; 6161c6a0718SPierre Ossman 6171c6a0718SPierre Ossman /* 6181c6a0718SPierre Ossman * Set the maximum segment size. Since we aren't doing DMA 6191c6a0718SPierre Ossman * (yet) we are only limited by the data length register. 6201c6a0718SPierre Ossman */ 6211c6a0718SPierre Ossman mmc->max_seg_size = mmc->max_req_size; 6221c6a0718SPierre Ossman 6231c6a0718SPierre Ossman /* 6241c6a0718SPierre Ossman * Block size can be up to 2048 bytes, but must be a power of two. 6251c6a0718SPierre Ossman */ 6261c6a0718SPierre Ossman mmc->max_blk_size = 2048; 6271c6a0718SPierre Ossman 6281c6a0718SPierre Ossman /* 6291c6a0718SPierre Ossman * No limit on the number of blocks transferred. 6301c6a0718SPierre Ossman */ 6311c6a0718SPierre Ossman mmc->max_blk_count = mmc->max_req_size; 6321c6a0718SPierre Ossman 6331c6a0718SPierre Ossman spin_lock_init(&host->lock); 6341c6a0718SPierre Ossman 6351c6a0718SPierre Ossman writel(0, host->base + MMCIMASK0); 6361c6a0718SPierre Ossman writel(0, host->base + MMCIMASK1); 6371c6a0718SPierre Ossman writel(0xfff, host->base + MMCICLEAR); 6381c6a0718SPierre Ossman 6397064d209SLinus Walleij #ifdef CONFIG_GPIOLIB 64089001446SRussell King if (gpio_is_valid(plat->gpio_cd)) { 64189001446SRussell King ret = gpio_request(plat->gpio_cd, DRIVER_NAME " (cd)"); 64289001446SRussell King if (ret == 0) 64389001446SRussell King ret = gpio_direction_input(plat->gpio_cd); 64489001446SRussell King if (ret == 0) 64589001446SRussell King host->gpio_cd = plat->gpio_cd; 64689001446SRussell King else if (ret != -ENOSYS) 64789001446SRussell King goto err_gpio_cd; 64889001446SRussell King } 64989001446SRussell King if (gpio_is_valid(plat->gpio_wp)) { 65089001446SRussell King ret = gpio_request(plat->gpio_wp, DRIVER_NAME " (wp)"); 65189001446SRussell King if (ret == 0) 65289001446SRussell King ret = gpio_direction_input(plat->gpio_wp); 65389001446SRussell King if (ret == 0) 65489001446SRussell King host->gpio_wp = plat->gpio_wp; 65589001446SRussell King else if (ret != -ENOSYS) 65689001446SRussell King goto err_gpio_wp; 65789001446SRussell King } 6587064d209SLinus Walleij #endif 65989001446SRussell King 6601c6a0718SPierre Ossman ret = request_irq(dev->irq[0], mmci_irq, IRQF_SHARED, DRIVER_NAME " (cmd)", host); 6611c6a0718SPierre Ossman if (ret) 6621c6a0718SPierre Ossman goto unmap; 6631c6a0718SPierre Ossman 6641c6a0718SPierre Ossman ret = request_irq(dev->irq[1], mmci_pio_irq, IRQF_SHARED, DRIVER_NAME " (pio)", host); 6651c6a0718SPierre Ossman if (ret) 6661c6a0718SPierre Ossman goto irq0_free; 6671c6a0718SPierre Ossman 6681c6a0718SPierre Ossman writel(MCI_IRQENABLE, host->base + MMCIMASK0); 6691c6a0718SPierre Ossman 6701c6a0718SPierre Ossman amba_set_drvdata(dev, mmc); 67189001446SRussell King host->oldstat = mmci_get_cd(host->mmc); 6721c6a0718SPierre Ossman 6731c6a0718SPierre Ossman mmc_add_host(mmc); 6741c6a0718SPierre Ossman 6751c6a0718SPierre Ossman printk(KERN_INFO "%s: MMCI rev %x cfg %02x at 0x%016llx irq %d,%d\n", 6761c6a0718SPierre Ossman mmc_hostname(mmc), amba_rev(dev), amba_config(dev), 6771c6a0718SPierre Ossman (unsigned long long)dev->res.start, dev->irq[0], dev->irq[1]); 6781c6a0718SPierre Ossman 6791c6a0718SPierre Ossman init_timer(&host->timer); 6801c6a0718SPierre Ossman host->timer.data = (unsigned long)host; 6811c6a0718SPierre Ossman host->timer.function = mmci_check_status; 6821c6a0718SPierre Ossman host->timer.expires = jiffies + HZ; 6831c6a0718SPierre Ossman add_timer(&host->timer); 6841c6a0718SPierre Ossman 6851c6a0718SPierre Ossman return 0; 6861c6a0718SPierre Ossman 6871c6a0718SPierre Ossman irq0_free: 6881c6a0718SPierre Ossman free_irq(dev->irq[0], host); 6891c6a0718SPierre Ossman unmap: 69089001446SRussell King if (host->gpio_wp != -ENOSYS) 69189001446SRussell King gpio_free(host->gpio_wp); 69289001446SRussell King err_gpio_wp: 69389001446SRussell King if (host->gpio_cd != -ENOSYS) 69489001446SRussell King gpio_free(host->gpio_cd); 69589001446SRussell King err_gpio_cd: 6961c6a0718SPierre Ossman iounmap(host->base); 6971c6a0718SPierre Ossman clk_disable: 6981c6a0718SPierre Ossman clk_disable(host->clk); 6991c6a0718SPierre Ossman clk_free: 7001c6a0718SPierre Ossman clk_put(host->clk); 7011c6a0718SPierre Ossman host_free: 7021c6a0718SPierre Ossman mmc_free_host(mmc); 7031c6a0718SPierre Ossman rel_regions: 7041c6a0718SPierre Ossman amba_release_regions(dev); 7051c6a0718SPierre Ossman out: 7061c6a0718SPierre Ossman return ret; 7071c6a0718SPierre Ossman } 7081c6a0718SPierre Ossman 7096dc4a47aSLinus Walleij static int __devexit mmci_remove(struct amba_device *dev) 7101c6a0718SPierre Ossman { 7111c6a0718SPierre Ossman struct mmc_host *mmc = amba_get_drvdata(dev); 7121c6a0718SPierre Ossman 7131c6a0718SPierre Ossman amba_set_drvdata(dev, NULL); 7141c6a0718SPierre Ossman 7151c6a0718SPierre Ossman if (mmc) { 7161c6a0718SPierre Ossman struct mmci_host *host = mmc_priv(mmc); 7171c6a0718SPierre Ossman 7181c6a0718SPierre Ossman del_timer_sync(&host->timer); 7191c6a0718SPierre Ossman 7201c6a0718SPierre Ossman mmc_remove_host(mmc); 7211c6a0718SPierre Ossman 7221c6a0718SPierre Ossman writel(0, host->base + MMCIMASK0); 7231c6a0718SPierre Ossman writel(0, host->base + MMCIMASK1); 7241c6a0718SPierre Ossman 7251c6a0718SPierre Ossman writel(0, host->base + MMCICOMMAND); 7261c6a0718SPierre Ossman writel(0, host->base + MMCIDATACTRL); 7271c6a0718SPierre Ossman 7281c6a0718SPierre Ossman free_irq(dev->irq[0], host); 7291c6a0718SPierre Ossman free_irq(dev->irq[1], host); 7301c6a0718SPierre Ossman 73189001446SRussell King if (host->gpio_wp != -ENOSYS) 73289001446SRussell King gpio_free(host->gpio_wp); 73389001446SRussell King if (host->gpio_cd != -ENOSYS) 73489001446SRussell King gpio_free(host->gpio_cd); 73589001446SRussell King 7361c6a0718SPierre Ossman iounmap(host->base); 7371c6a0718SPierre Ossman clk_disable(host->clk); 7381c6a0718SPierre Ossman clk_put(host->clk); 7391c6a0718SPierre Ossman 7401c6a0718SPierre Ossman mmc_free_host(mmc); 7411c6a0718SPierre Ossman 7421c6a0718SPierre Ossman amba_release_regions(dev); 7431c6a0718SPierre Ossman } 7441c6a0718SPierre Ossman 7451c6a0718SPierre Ossman return 0; 7461c6a0718SPierre Ossman } 7471c6a0718SPierre Ossman 7481c6a0718SPierre Ossman #ifdef CONFIG_PM 7491c6a0718SPierre Ossman static int mmci_suspend(struct amba_device *dev, pm_message_t state) 7501c6a0718SPierre Ossman { 7511c6a0718SPierre Ossman struct mmc_host *mmc = amba_get_drvdata(dev); 7521c6a0718SPierre Ossman int ret = 0; 7531c6a0718SPierre Ossman 7541c6a0718SPierre Ossman if (mmc) { 7551c6a0718SPierre Ossman struct mmci_host *host = mmc_priv(mmc); 7561c6a0718SPierre Ossman 7571c6a0718SPierre Ossman ret = mmc_suspend_host(mmc, state); 7581c6a0718SPierre Ossman if (ret == 0) 7591c6a0718SPierre Ossman writel(0, host->base + MMCIMASK0); 7601c6a0718SPierre Ossman } 7611c6a0718SPierre Ossman 7621c6a0718SPierre Ossman return ret; 7631c6a0718SPierre Ossman } 7641c6a0718SPierre Ossman 7651c6a0718SPierre Ossman static int mmci_resume(struct amba_device *dev) 7661c6a0718SPierre Ossman { 7671c6a0718SPierre Ossman struct mmc_host *mmc = amba_get_drvdata(dev); 7681c6a0718SPierre Ossman int ret = 0; 7691c6a0718SPierre Ossman 7701c6a0718SPierre Ossman if (mmc) { 7711c6a0718SPierre Ossman struct mmci_host *host = mmc_priv(mmc); 7721c6a0718SPierre Ossman 7731c6a0718SPierre Ossman writel(MCI_IRQENABLE, host->base + MMCIMASK0); 7741c6a0718SPierre Ossman 7751c6a0718SPierre Ossman ret = mmc_resume_host(mmc); 7761c6a0718SPierre Ossman } 7771c6a0718SPierre Ossman 7781c6a0718SPierre Ossman return ret; 7791c6a0718SPierre Ossman } 7801c6a0718SPierre Ossman #else 7811c6a0718SPierre Ossman #define mmci_suspend NULL 7821c6a0718SPierre Ossman #define mmci_resume NULL 7831c6a0718SPierre Ossman #endif 7841c6a0718SPierre Ossman 7851c6a0718SPierre Ossman static struct amba_id mmci_ids[] = { 7861c6a0718SPierre Ossman { 7871c6a0718SPierre Ossman .id = 0x00041180, 7881c6a0718SPierre Ossman .mask = 0x000fffff, 7891c6a0718SPierre Ossman }, 7901c6a0718SPierre Ossman { 7911c6a0718SPierre Ossman .id = 0x00041181, 7921c6a0718SPierre Ossman .mask = 0x000fffff, 7931c6a0718SPierre Ossman }, 794cc30d60eSLinus Walleij /* ST Micro variants */ 795cc30d60eSLinus Walleij { 796cc30d60eSLinus Walleij .id = 0x00180180, 797cc30d60eSLinus Walleij .mask = 0x00ffffff, 798cc30d60eSLinus Walleij }, 799cc30d60eSLinus Walleij { 800cc30d60eSLinus Walleij .id = 0x00280180, 801cc30d60eSLinus Walleij .mask = 0x00ffffff, 802cc30d60eSLinus Walleij }, 8031c6a0718SPierre Ossman { 0, 0 }, 8041c6a0718SPierre Ossman }; 8051c6a0718SPierre Ossman 8061c6a0718SPierre Ossman static struct amba_driver mmci_driver = { 8071c6a0718SPierre Ossman .drv = { 8081c6a0718SPierre Ossman .name = DRIVER_NAME, 8091c6a0718SPierre Ossman }, 8101c6a0718SPierre Ossman .probe = mmci_probe, 8116dc4a47aSLinus Walleij .remove = __devexit_p(mmci_remove), 8121c6a0718SPierre Ossman .suspend = mmci_suspend, 8131c6a0718SPierre Ossman .resume = mmci_resume, 8141c6a0718SPierre Ossman .id_table = mmci_ids, 8151c6a0718SPierre Ossman }; 8161c6a0718SPierre Ossman 8171c6a0718SPierre Ossman static int __init mmci_init(void) 8181c6a0718SPierre Ossman { 8191c6a0718SPierre Ossman return amba_driver_register(&mmci_driver); 8201c6a0718SPierre Ossman } 8211c6a0718SPierre Ossman 8221c6a0718SPierre Ossman static void __exit mmci_exit(void) 8231c6a0718SPierre Ossman { 8241c6a0718SPierre Ossman amba_driver_unregister(&mmci_driver); 8251c6a0718SPierre Ossman } 8261c6a0718SPierre Ossman 8271c6a0718SPierre Ossman module_init(mmci_init); 8281c6a0718SPierre Ossman module_exit(mmci_exit); 8291c6a0718SPierre Ossman module_param(fmax, uint, 0444); 8301c6a0718SPierre Ossman 8311c6a0718SPierre Ossman MODULE_DESCRIPTION("ARM PrimeCell PL180/181 Multimedia Card Interface driver"); 8321c6a0718SPierre Ossman MODULE_LICENSE("GPL"); 833