115a0580cSDavid Brownell /* 215a0580cSDavid Brownell * mmc_spi.c - Access SD/MMC cards through SPI master controllers 315a0580cSDavid Brownell * 415a0580cSDavid Brownell * (C) Copyright 2005, Intec Automation, 515a0580cSDavid Brownell * Mike Lavender (mike@steroidmicros) 615a0580cSDavid Brownell * (C) Copyright 2006-2007, David Brownell 715a0580cSDavid Brownell * (C) Copyright 2007, Axis Communications, 815a0580cSDavid Brownell * Hans-Peter Nilsson (hp@axis.com) 915a0580cSDavid Brownell * (C) Copyright 2007, ATRON electronic GmbH, 1015a0580cSDavid Brownell * Jan Nikitenko <jan.nikitenko@gmail.com> 1115a0580cSDavid Brownell * 1215a0580cSDavid Brownell * 1315a0580cSDavid Brownell * This program is free software; you can redistribute it and/or modify 1415a0580cSDavid Brownell * it under the terms of the GNU General Public License as published by 1515a0580cSDavid Brownell * the Free Software Foundation; either version 2 of the License, or 1615a0580cSDavid Brownell * (at your option) any later version. 1715a0580cSDavid Brownell * 1815a0580cSDavid Brownell * This program is distributed in the hope that it will be useful, 1915a0580cSDavid Brownell * but WITHOUT ANY WARRANTY; without even the implied warranty of 2015a0580cSDavid Brownell * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 2115a0580cSDavid Brownell * GNU General Public License for more details. 2215a0580cSDavid Brownell * 2315a0580cSDavid Brownell * You should have received a copy of the GNU General Public License 2415a0580cSDavid Brownell * along with this program; if not, write to the Free Software 2515a0580cSDavid Brownell * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 2615a0580cSDavid Brownell */ 2756e303ebSWolfgang Muees #include <linux/sched.h> 2815a0580cSDavid Brownell #include <linux/delay.h> 295a0e3ad6STejun Heo #include <linux/slab.h> 3088b47679SPaul Gortmaker #include <linux/module.h> 3123fd5045SDavid Brownell #include <linux/bio.h> 3215a0580cSDavid Brownell #include <linux/dma-mapping.h> 3315a0580cSDavid Brownell #include <linux/crc7.h> 3415a0580cSDavid Brownell #include <linux/crc-itu-t.h> 35e5712a6aSAl Viro #include <linux/scatterlist.h> 3615a0580cSDavid Brownell 3715a0580cSDavid Brownell #include <linux/mmc/host.h> 3815a0580cSDavid Brownell #include <linux/mmc/mmc.h> /* for R1_SPI_* bit values */ 39bf287a90SLaurent Pinchart #include <linux/mmc/slot-gpio.h> 4015a0580cSDavid Brownell 4115a0580cSDavid Brownell #include <linux/spi/spi.h> 4215a0580cSDavid Brownell #include <linux/spi/mmc_spi.h> 4315a0580cSDavid Brownell 4415a0580cSDavid Brownell #include <asm/unaligned.h> 4515a0580cSDavid Brownell 4615a0580cSDavid Brownell 4715a0580cSDavid Brownell /* NOTES: 4815a0580cSDavid Brownell * 4915a0580cSDavid Brownell * - For now, we won't try to interoperate with a real mmc/sd/sdio 5015a0580cSDavid Brownell * controller, although some of them do have hardware support for 5115a0580cSDavid Brownell * SPI protocol. The main reason for such configs would be mmc-ish 5215a0580cSDavid Brownell * cards like DataFlash, which don't support that "native" protocol. 5315a0580cSDavid Brownell * 5415a0580cSDavid Brownell * We don't have a "DataFlash/MMC/SD/SDIO card slot" abstraction to 5515a0580cSDavid Brownell * switch between driver stacks, and in any case if "native" mode 5615a0580cSDavid Brownell * is available, it will be faster and hence preferable. 5715a0580cSDavid Brownell * 5815a0580cSDavid Brownell * - MMC depends on a different chipselect management policy than the 5915a0580cSDavid Brownell * SPI interface currently supports for shared bus segments: it needs 6015a0580cSDavid Brownell * to issue multiple spi_message requests with the chipselect active, 6115a0580cSDavid Brownell * using the results of one message to decide the next one to issue. 6215a0580cSDavid Brownell * 6315a0580cSDavid Brownell * Pending updates to the programming interface, this driver expects 6415a0580cSDavid Brownell * that it not share the bus with other drivers (precluding conflicts). 6515a0580cSDavid Brownell * 6615a0580cSDavid Brownell * - We tell the controller to keep the chipselect active from the 6715a0580cSDavid Brownell * beginning of an mmc_host_ops.request until the end. So beware 6815a0580cSDavid Brownell * of SPI controller drivers that mis-handle the cs_change flag! 6915a0580cSDavid Brownell * 7015a0580cSDavid Brownell * However, many cards seem OK with chipselect flapping up/down 7115a0580cSDavid Brownell * during that time ... at least on unshared bus segments. 7215a0580cSDavid Brownell */ 7315a0580cSDavid Brownell 7415a0580cSDavid Brownell 7515a0580cSDavid Brownell /* 7615a0580cSDavid Brownell * Local protocol constants, internal to data block protocols. 7715a0580cSDavid Brownell */ 7815a0580cSDavid Brownell 7915a0580cSDavid Brownell /* Response tokens used to ack each block written: */ 8015a0580cSDavid Brownell #define SPI_MMC_RESPONSE_CODE(x) ((x) & 0x1f) 8115a0580cSDavid Brownell #define SPI_RESPONSE_ACCEPTED ((2 << 1)|1) 8215a0580cSDavid Brownell #define SPI_RESPONSE_CRC_ERR ((5 << 1)|1) 8315a0580cSDavid Brownell #define SPI_RESPONSE_WRITE_ERR ((6 << 1)|1) 8415a0580cSDavid Brownell 8515a0580cSDavid Brownell /* Read and write blocks start with these tokens and end with crc; 8615a0580cSDavid Brownell * on error, read tokens act like a subset of R2_SPI_* values. 8715a0580cSDavid Brownell */ 8815a0580cSDavid Brownell #define SPI_TOKEN_SINGLE 0xfe /* single block r/w, multiblock read */ 8915a0580cSDavid Brownell #define SPI_TOKEN_MULTI_WRITE 0xfc /* multiblock write */ 9015a0580cSDavid Brownell #define SPI_TOKEN_STOP_TRAN 0xfd /* terminate multiblock write */ 9115a0580cSDavid Brownell 9215a0580cSDavid Brownell #define MMC_SPI_BLOCKSIZE 512 9315a0580cSDavid Brownell 9415a0580cSDavid Brownell 9515a0580cSDavid Brownell /* These fixed timeouts come from the latest SD specs, which say to ignore 9615a0580cSDavid Brownell * the CSD values. The R1B value is for card erase (e.g. the "I forgot the 9715a0580cSDavid Brownell * card's password" scenario); it's mostly applied to STOP_TRANSMISSION after 9815a0580cSDavid Brownell * reads which takes nowhere near that long. Older cards may be able to use 9915a0580cSDavid Brownell * shorter timeouts ... but why bother? 10015a0580cSDavid Brownell */ 10156e303ebSWolfgang Muees #define r1b_timeout (HZ * 3) 10215a0580cSDavid Brownell 1035cf20aa5SWolfgang Muees /* One of the critical speed parameters is the amount of data which may 10425985edcSLucas De Marchi * be transferred in one command. If this value is too low, the SD card 1055cf20aa5SWolfgang Muees * controller has to do multiple partial block writes (argggh!). With 1065cf20aa5SWolfgang Muees * today (2008) SD cards there is little speed gain if we transfer more 1075cf20aa5SWolfgang Muees * than 64 KBytes at a time. So use this value until there is any indication 1085cf20aa5SWolfgang Muees * that we should do more here. 1095cf20aa5SWolfgang Muees */ 1105cf20aa5SWolfgang Muees #define MMC_SPI_BLOCKSATONCE 128 11115a0580cSDavid Brownell 11215a0580cSDavid Brownell /****************************************************************************/ 11315a0580cSDavid Brownell 11415a0580cSDavid Brownell /* 11515a0580cSDavid Brownell * Local Data Structures 11615a0580cSDavid Brownell */ 11715a0580cSDavid Brownell 11815a0580cSDavid Brownell /* "scratch" is per-{command,block} data exchanged with the card */ 11915a0580cSDavid Brownell struct scratch { 12015a0580cSDavid Brownell u8 status[29]; 12115a0580cSDavid Brownell u8 data_token; 12215a0580cSDavid Brownell __be16 crc_val; 12315a0580cSDavid Brownell }; 12415a0580cSDavid Brownell 12515a0580cSDavid Brownell struct mmc_spi_host { 12615a0580cSDavid Brownell struct mmc_host *mmc; 12715a0580cSDavid Brownell struct spi_device *spi; 12815a0580cSDavid Brownell 12915a0580cSDavid Brownell unsigned char power_mode; 13015a0580cSDavid Brownell u16 powerup_msecs; 13115a0580cSDavid Brownell 13215a0580cSDavid Brownell struct mmc_spi_platform_data *pdata; 13315a0580cSDavid Brownell 13415a0580cSDavid Brownell /* for bulk data transfers */ 13515a0580cSDavid Brownell struct spi_transfer token, t, crc, early_status; 13615a0580cSDavid Brownell struct spi_message m; 13715a0580cSDavid Brownell 13815a0580cSDavid Brownell /* for status readback */ 13915a0580cSDavid Brownell struct spi_transfer status; 14015a0580cSDavid Brownell struct spi_message readback; 14115a0580cSDavid Brownell 14215a0580cSDavid Brownell /* underlying DMA-aware controller, or null */ 14315a0580cSDavid Brownell struct device *dma_dev; 14415a0580cSDavid Brownell 14515a0580cSDavid Brownell /* buffer used for commands and for message "overhead" */ 14615a0580cSDavid Brownell struct scratch *data; 14715a0580cSDavid Brownell dma_addr_t data_dma; 14815a0580cSDavid Brownell 14915a0580cSDavid Brownell /* Specs say to write ones most of the time, even when the card 15015a0580cSDavid Brownell * has no need to read its input data; and many cards won't care. 15115a0580cSDavid Brownell * This is our source of those ones. 15215a0580cSDavid Brownell */ 15315a0580cSDavid Brownell void *ones; 15415a0580cSDavid Brownell dma_addr_t ones_dma; 15515a0580cSDavid Brownell }; 15615a0580cSDavid Brownell 15715a0580cSDavid Brownell 15815a0580cSDavid Brownell /****************************************************************************/ 15915a0580cSDavid Brownell 16015a0580cSDavid Brownell /* 16115a0580cSDavid Brownell * MMC-over-SPI protocol glue, used by the MMC stack interface 16215a0580cSDavid Brownell */ 16315a0580cSDavid Brownell 16415a0580cSDavid Brownell static inline int mmc_cs_off(struct mmc_spi_host *host) 16515a0580cSDavid Brownell { 16615a0580cSDavid Brownell /* chipselect will always be inactive after setup() */ 16715a0580cSDavid Brownell return spi_setup(host->spi); 16815a0580cSDavid Brownell } 16915a0580cSDavid Brownell 17015a0580cSDavid Brownell static int 17115a0580cSDavid Brownell mmc_spi_readbytes(struct mmc_spi_host *host, unsigned len) 17215a0580cSDavid Brownell { 17315a0580cSDavid Brownell int status; 17415a0580cSDavid Brownell 17515a0580cSDavid Brownell if (len > sizeof(*host->data)) { 17615a0580cSDavid Brownell WARN_ON(1); 17715a0580cSDavid Brownell return -EIO; 17815a0580cSDavid Brownell } 17915a0580cSDavid Brownell 18015a0580cSDavid Brownell host->status.len = len; 18115a0580cSDavid Brownell 18215a0580cSDavid Brownell if (host->dma_dev) 18315a0580cSDavid Brownell dma_sync_single_for_device(host->dma_dev, 18415a0580cSDavid Brownell host->data_dma, sizeof(*host->data), 18515a0580cSDavid Brownell DMA_FROM_DEVICE); 18615a0580cSDavid Brownell 1874751c1c7SErnst Schwab status = spi_sync_locked(host->spi, &host->readback); 18815a0580cSDavid Brownell 18915a0580cSDavid Brownell if (host->dma_dev) 19015a0580cSDavid Brownell dma_sync_single_for_cpu(host->dma_dev, 19115a0580cSDavid Brownell host->data_dma, sizeof(*host->data), 19215a0580cSDavid Brownell DMA_FROM_DEVICE); 19315a0580cSDavid Brownell 19415a0580cSDavid Brownell return status; 19515a0580cSDavid Brownell } 19615a0580cSDavid Brownell 19756e303ebSWolfgang Muees static int mmc_spi_skip(struct mmc_spi_host *host, unsigned long timeout, 19856e303ebSWolfgang Muees unsigned n, u8 byte) 19915a0580cSDavid Brownell { 20015a0580cSDavid Brownell u8 *cp = host->data->status; 20156e303ebSWolfgang Muees unsigned long start = jiffies; 20215a0580cSDavid Brownell 20315a0580cSDavid Brownell while (1) { 20415a0580cSDavid Brownell int status; 20515a0580cSDavid Brownell unsigned i; 20615a0580cSDavid Brownell 20715a0580cSDavid Brownell status = mmc_spi_readbytes(host, n); 20815a0580cSDavid Brownell if (status < 0) 20915a0580cSDavid Brownell return status; 21015a0580cSDavid Brownell 21115a0580cSDavid Brownell for (i = 0; i < n; i++) { 21215a0580cSDavid Brownell if (cp[i] != byte) 21315a0580cSDavid Brownell return cp[i]; 21415a0580cSDavid Brownell } 21515a0580cSDavid Brownell 21656e303ebSWolfgang Muees if (time_is_before_jiffies(start + timeout)) 21715a0580cSDavid Brownell break; 21856e303ebSWolfgang Muees 21956e303ebSWolfgang Muees /* If we need long timeouts, we may release the CPU. 22056e303ebSWolfgang Muees * We use jiffies here because we want to have a relation 22156e303ebSWolfgang Muees * between elapsed time and the blocking of the scheduler. 22256e303ebSWolfgang Muees */ 22356e303ebSWolfgang Muees if (time_is_before_jiffies(start+1)) 22456e303ebSWolfgang Muees schedule(); 22515a0580cSDavid Brownell } 22615a0580cSDavid Brownell return -ETIMEDOUT; 22715a0580cSDavid Brownell } 22815a0580cSDavid Brownell 22915a0580cSDavid Brownell static inline int 23056e303ebSWolfgang Muees mmc_spi_wait_unbusy(struct mmc_spi_host *host, unsigned long timeout) 23115a0580cSDavid Brownell { 23215a0580cSDavid Brownell return mmc_spi_skip(host, timeout, sizeof(host->data->status), 0); 23315a0580cSDavid Brownell } 23415a0580cSDavid Brownell 23556e303ebSWolfgang Muees static int mmc_spi_readtoken(struct mmc_spi_host *host, unsigned long timeout) 23615a0580cSDavid Brownell { 237162350ebSMatthew Fleming return mmc_spi_skip(host, timeout, 1, 0xff); 23815a0580cSDavid Brownell } 23915a0580cSDavid Brownell 24015a0580cSDavid Brownell 24115a0580cSDavid Brownell /* 24215a0580cSDavid Brownell * Note that for SPI, cmd->resp[0] is not the same data as "native" protocol 24315a0580cSDavid Brownell * hosts return! The low byte holds R1_SPI bits. The next byte may hold 24415a0580cSDavid Brownell * R2_SPI bits ... for SEND_STATUS, or after data read errors. 24515a0580cSDavid Brownell * 24615a0580cSDavid Brownell * cmd->resp[1] holds any four-byte response, for R3 (READ_OCR) and on 24715a0580cSDavid Brownell * newer cards R7 (IF_COND). 24815a0580cSDavid Brownell */ 24915a0580cSDavid Brownell 25015a0580cSDavid Brownell static char *maptype(struct mmc_command *cmd) 25115a0580cSDavid Brownell { 25215a0580cSDavid Brownell switch (mmc_spi_resp_type(cmd)) { 25315a0580cSDavid Brownell case MMC_RSP_SPI_R1: return "R1"; 25415a0580cSDavid Brownell case MMC_RSP_SPI_R1B: return "R1B"; 25515a0580cSDavid Brownell case MMC_RSP_SPI_R2: return "R2/R5"; 25615a0580cSDavid Brownell case MMC_RSP_SPI_R3: return "R3/R4/R7"; 25715a0580cSDavid Brownell default: return "?"; 25815a0580cSDavid Brownell } 25915a0580cSDavid Brownell } 26015a0580cSDavid Brownell 26115a0580cSDavid Brownell /* return zero, else negative errno after setting cmd->error */ 26215a0580cSDavid Brownell static int mmc_spi_response_get(struct mmc_spi_host *host, 26315a0580cSDavid Brownell struct mmc_command *cmd, int cs_on) 26415a0580cSDavid Brownell { 26515a0580cSDavid Brownell u8 *cp = host->data->status; 26615a0580cSDavid Brownell u8 *end = cp + host->t.len; 26715a0580cSDavid Brownell int value = 0; 268ab5a643cSWolfgang Muees int bitshift; 269ab5a643cSWolfgang Muees u8 leftover = 0; 270ab5a643cSWolfgang Muees unsigned short rotator; 271ab5a643cSWolfgang Muees int i; 27215a0580cSDavid Brownell char tag[32]; 27315a0580cSDavid Brownell 27415a0580cSDavid Brownell snprintf(tag, sizeof(tag), " ... CMD%d response SPI_%s", 27515a0580cSDavid Brownell cmd->opcode, maptype(cmd)); 27615a0580cSDavid Brownell 27715a0580cSDavid Brownell /* Except for data block reads, the whole response will already 27815a0580cSDavid Brownell * be stored in the scratch buffer. It's somewhere after the 27915a0580cSDavid Brownell * command and the first byte we read after it. We ignore that 28015a0580cSDavid Brownell * first byte. After STOP_TRANSMISSION command it may include 28115a0580cSDavid Brownell * two data bits, but otherwise it's all ones. 28215a0580cSDavid Brownell */ 28315a0580cSDavid Brownell cp += 8; 28415a0580cSDavid Brownell while (cp < end && *cp == 0xff) 28515a0580cSDavid Brownell cp++; 28615a0580cSDavid Brownell 28715a0580cSDavid Brownell /* Data block reads (R1 response types) may need more data... */ 28815a0580cSDavid Brownell if (cp == end) { 28915a0580cSDavid Brownell cp = host->data->status; 290ab5a643cSWolfgang Muees end = cp+1; 29115a0580cSDavid Brownell 29215a0580cSDavid Brownell /* Card sends N(CR) (== 1..8) bytes of all-ones then one 29315a0580cSDavid Brownell * status byte ... and we already scanned 2 bytes. 29415a0580cSDavid Brownell * 29515a0580cSDavid Brownell * REVISIT block read paths use nasty byte-at-a-time I/O 29615a0580cSDavid Brownell * so it can always DMA directly into the target buffer. 29715a0580cSDavid Brownell * It'd probably be better to memcpy() the first chunk and 29815a0580cSDavid Brownell * avoid extra i/o calls... 299ea15ba5cSWolfgang Muees * 300ea15ba5cSWolfgang Muees * Note we check for more than 8 bytes, because in practice, 301ea15ba5cSWolfgang Muees * some SD cards are slow... 30215a0580cSDavid Brownell */ 303ea15ba5cSWolfgang Muees for (i = 2; i < 16; i++) { 30415a0580cSDavid Brownell value = mmc_spi_readbytes(host, 1); 30515a0580cSDavid Brownell if (value < 0) 30615a0580cSDavid Brownell goto done; 30715a0580cSDavid Brownell if (*cp != 0xff) 30815a0580cSDavid Brownell goto checkstatus; 30915a0580cSDavid Brownell } 31015a0580cSDavid Brownell value = -ETIMEDOUT; 31115a0580cSDavid Brownell goto done; 31215a0580cSDavid Brownell } 31315a0580cSDavid Brownell 31415a0580cSDavid Brownell checkstatus: 315ab5a643cSWolfgang Muees bitshift = 0; 31615a0580cSDavid Brownell if (*cp & 0x80) { 317ab5a643cSWolfgang Muees /* Houston, we have an ugly card with a bit-shifted response */ 318ab5a643cSWolfgang Muees rotator = *cp++ << 8; 319ab5a643cSWolfgang Muees /* read the next byte */ 320ab5a643cSWolfgang Muees if (cp == end) { 321ab5a643cSWolfgang Muees value = mmc_spi_readbytes(host, 1); 322ab5a643cSWolfgang Muees if (value < 0) 32315a0580cSDavid Brownell goto done; 324ab5a643cSWolfgang Muees cp = host->data->status; 325ab5a643cSWolfgang Muees end = cp+1; 32615a0580cSDavid Brownell } 327ab5a643cSWolfgang Muees rotator |= *cp++; 328ab5a643cSWolfgang Muees while (rotator & 0x8000) { 329ab5a643cSWolfgang Muees bitshift++; 330ab5a643cSWolfgang Muees rotator <<= 1; 331ab5a643cSWolfgang Muees } 332ab5a643cSWolfgang Muees cmd->resp[0] = rotator >> 8; 333ab5a643cSWolfgang Muees leftover = rotator; 334ab5a643cSWolfgang Muees } else { 33515a0580cSDavid Brownell cmd->resp[0] = *cp++; 336ab5a643cSWolfgang Muees } 33715a0580cSDavid Brownell cmd->error = 0; 33815a0580cSDavid Brownell 33915a0580cSDavid Brownell /* Status byte: the entire seven-bit R1 response. */ 34015a0580cSDavid Brownell if (cmd->resp[0] != 0) { 341fdd858dbSWolfgang Muees if ((R1_SPI_PARAMETER | R1_SPI_ADDRESS) 34215a0580cSDavid Brownell & cmd->resp[0]) 343fdd858dbSWolfgang Muees value = -EFAULT; /* Bad address */ 344fdd858dbSWolfgang Muees else if (R1_SPI_ILLEGAL_COMMAND & cmd->resp[0]) 345fdd858dbSWolfgang Muees value = -ENOSYS; /* Function not implemented */ 34615a0580cSDavid Brownell else if (R1_SPI_COM_CRC & cmd->resp[0]) 347fdd858dbSWolfgang Muees value = -EILSEQ; /* Illegal byte sequence */ 34815a0580cSDavid Brownell else if ((R1_SPI_ERASE_SEQ | R1_SPI_ERASE_RESET) 34915a0580cSDavid Brownell & cmd->resp[0]) 350fdd858dbSWolfgang Muees value = -EIO; /* I/O error */ 35115a0580cSDavid Brownell /* else R1_SPI_IDLE, "it's resetting" */ 35215a0580cSDavid Brownell } 35315a0580cSDavid Brownell 35415a0580cSDavid Brownell switch (mmc_spi_resp_type(cmd)) { 35515a0580cSDavid Brownell 35615a0580cSDavid Brownell /* SPI R1B == R1 + busy; STOP_TRANSMISSION (for multiblock reads) 35715a0580cSDavid Brownell * and less-common stuff like various erase operations. 35815a0580cSDavid Brownell */ 35915a0580cSDavid Brownell case MMC_RSP_SPI_R1B: 36015a0580cSDavid Brownell /* maybe we read all the busy tokens already */ 36115a0580cSDavid Brownell while (cp < end && *cp == 0) 36215a0580cSDavid Brownell cp++; 36315a0580cSDavid Brownell if (cp == end) 36415a0580cSDavid Brownell mmc_spi_wait_unbusy(host, r1b_timeout); 36515a0580cSDavid Brownell break; 36615a0580cSDavid Brownell 36715a0580cSDavid Brownell /* SPI R2 == R1 + second status byte; SEND_STATUS 36815a0580cSDavid Brownell * SPI R5 == R1 + data byte; IO_RW_DIRECT 36915a0580cSDavid Brownell */ 37015a0580cSDavid Brownell case MMC_RSP_SPI_R2: 371ab5a643cSWolfgang Muees /* read the next byte */ 372ab5a643cSWolfgang Muees if (cp == end) { 373ab5a643cSWolfgang Muees value = mmc_spi_readbytes(host, 1); 374ab5a643cSWolfgang Muees if (value < 0) 375ab5a643cSWolfgang Muees goto done; 376ab5a643cSWolfgang Muees cp = host->data->status; 377ab5a643cSWolfgang Muees end = cp+1; 378ab5a643cSWolfgang Muees } 379ab5a643cSWolfgang Muees if (bitshift) { 380ab5a643cSWolfgang Muees rotator = leftover << 8; 381ab5a643cSWolfgang Muees rotator |= *cp << bitshift; 382ab5a643cSWolfgang Muees cmd->resp[0] |= (rotator & 0xFF00); 383ab5a643cSWolfgang Muees } else { 38415a0580cSDavid Brownell cmd->resp[0] |= *cp << 8; 385ab5a643cSWolfgang Muees } 38615a0580cSDavid Brownell break; 38715a0580cSDavid Brownell 38815a0580cSDavid Brownell /* SPI R3, R4, or R7 == R1 + 4 bytes */ 38915a0580cSDavid Brownell case MMC_RSP_SPI_R3: 390ab5a643cSWolfgang Muees rotator = leftover << 8; 391ab5a643cSWolfgang Muees cmd->resp[1] = 0; 392ab5a643cSWolfgang Muees for (i = 0; i < 4; i++) { 393ab5a643cSWolfgang Muees cmd->resp[1] <<= 8; 394ab5a643cSWolfgang Muees /* read the next byte */ 395ab5a643cSWolfgang Muees if (cp == end) { 396ab5a643cSWolfgang Muees value = mmc_spi_readbytes(host, 1); 397ab5a643cSWolfgang Muees if (value < 0) 398ab5a643cSWolfgang Muees goto done; 399ab5a643cSWolfgang Muees cp = host->data->status; 400ab5a643cSWolfgang Muees end = cp+1; 401ab5a643cSWolfgang Muees } 402ab5a643cSWolfgang Muees if (bitshift) { 403ab5a643cSWolfgang Muees rotator |= *cp++ << bitshift; 404ab5a643cSWolfgang Muees cmd->resp[1] |= (rotator >> 8); 405ab5a643cSWolfgang Muees rotator <<= 8; 406ab5a643cSWolfgang Muees } else { 407ab5a643cSWolfgang Muees cmd->resp[1] |= *cp++; 408ab5a643cSWolfgang Muees } 409ab5a643cSWolfgang Muees } 41015a0580cSDavid Brownell break; 41115a0580cSDavid Brownell 41215a0580cSDavid Brownell /* SPI R1 == just one status byte */ 41315a0580cSDavid Brownell case MMC_RSP_SPI_R1: 41415a0580cSDavid Brownell break; 41515a0580cSDavid Brownell 41615a0580cSDavid Brownell default: 41715a0580cSDavid Brownell dev_dbg(&host->spi->dev, "bad response type %04x\n", 41815a0580cSDavid Brownell mmc_spi_resp_type(cmd)); 41915a0580cSDavid Brownell if (value >= 0) 42015a0580cSDavid Brownell value = -EINVAL; 42115a0580cSDavid Brownell goto done; 42215a0580cSDavid Brownell } 42315a0580cSDavid Brownell 42415a0580cSDavid Brownell if (value < 0) 42515a0580cSDavid Brownell dev_dbg(&host->spi->dev, "%s: resp %04x %08x\n", 42615a0580cSDavid Brownell tag, cmd->resp[0], cmd->resp[1]); 42715a0580cSDavid Brownell 42815a0580cSDavid Brownell /* disable chipselect on errors and some success cases */ 42915a0580cSDavid Brownell if (value >= 0 && cs_on) 43015a0580cSDavid Brownell return value; 43115a0580cSDavid Brownell done: 43215a0580cSDavid Brownell if (value < 0) 43315a0580cSDavid Brownell cmd->error = value; 43415a0580cSDavid Brownell mmc_cs_off(host); 43515a0580cSDavid Brownell return value; 43615a0580cSDavid Brownell } 43715a0580cSDavid Brownell 43815a0580cSDavid Brownell /* Issue command and read its response. 43915a0580cSDavid Brownell * Returns zero on success, negative for error. 44015a0580cSDavid Brownell * 44115a0580cSDavid Brownell * On error, caller must cope with mmc core retry mechanism. That 44215a0580cSDavid Brownell * means immediate low-level resubmit, which affects the bus lock... 44315a0580cSDavid Brownell */ 44415a0580cSDavid Brownell static int 44515a0580cSDavid Brownell mmc_spi_command_send(struct mmc_spi_host *host, 44615a0580cSDavid Brownell struct mmc_request *mrq, 44715a0580cSDavid Brownell struct mmc_command *cmd, int cs_on) 44815a0580cSDavid Brownell { 44915a0580cSDavid Brownell struct scratch *data = host->data; 45015a0580cSDavid Brownell u8 *cp = data->status; 45115a0580cSDavid Brownell u32 arg = cmd->arg; 45215a0580cSDavid Brownell int status; 45315a0580cSDavid Brownell struct spi_transfer *t; 45415a0580cSDavid Brownell 45515a0580cSDavid Brownell /* We can handle most commands (except block reads) in one full 45615a0580cSDavid Brownell * duplex I/O operation before either starting the next transfer 45715a0580cSDavid Brownell * (data block or command) or else deselecting the card. 45815a0580cSDavid Brownell * 45915a0580cSDavid Brownell * First, write 7 bytes: 46015a0580cSDavid Brownell * - an all-ones byte to ensure the card is ready 46115a0580cSDavid Brownell * - opcode byte (plus start and transmission bits) 46215a0580cSDavid Brownell * - four bytes of big-endian argument 46315a0580cSDavid Brownell * - crc7 (plus end bit) ... always computed, it's cheap 46415a0580cSDavid Brownell * 46515a0580cSDavid Brownell * We init the whole buffer to all-ones, which is what we need 46615a0580cSDavid Brownell * to write while we're reading (later) response data. 46715a0580cSDavid Brownell */ 46815a0580cSDavid Brownell memset(cp++, 0xff, sizeof(data->status)); 46915a0580cSDavid Brownell 47015a0580cSDavid Brownell *cp++ = 0x40 | cmd->opcode; 47115a0580cSDavid Brownell *cp++ = (u8)(arg >> 24); 47215a0580cSDavid Brownell *cp++ = (u8)(arg >> 16); 47315a0580cSDavid Brownell *cp++ = (u8)(arg >> 8); 47415a0580cSDavid Brownell *cp++ = (u8)arg; 47515a0580cSDavid Brownell *cp++ = (crc7(0, &data->status[1], 5) << 1) | 0x01; 47615a0580cSDavid Brownell 47715a0580cSDavid Brownell /* Then, read up to 13 bytes (while writing all-ones): 47815a0580cSDavid Brownell * - N(CR) (== 1..8) bytes of all-ones 47915a0580cSDavid Brownell * - status byte (for all response types) 48015a0580cSDavid Brownell * - the rest of the response, either: 48115a0580cSDavid Brownell * + nothing, for R1 or R1B responses 48215a0580cSDavid Brownell * + second status byte, for R2 responses 48315a0580cSDavid Brownell * + four data bytes, for R3 and R7 responses 48415a0580cSDavid Brownell * 48515a0580cSDavid Brownell * Finally, read some more bytes ... in the nice cases we know in 48615a0580cSDavid Brownell * advance how many, and reading 1 more is always OK: 48715a0580cSDavid Brownell * - N(EC) (== 0..N) bytes of all-ones, before deselect/finish 48815a0580cSDavid Brownell * - N(RC) (== 1..N) bytes of all-ones, before next command 48915a0580cSDavid Brownell * - N(WR) (== 1..N) bytes of all-ones, before data write 49015a0580cSDavid Brownell * 49115a0580cSDavid Brownell * So in those cases one full duplex I/O of at most 21 bytes will 49215a0580cSDavid Brownell * handle the whole command, leaving the card ready to receive a 49315a0580cSDavid Brownell * data block or new command. We do that whenever we can, shaving 49415a0580cSDavid Brownell * CPU and IRQ costs (especially when using DMA or FIFOs). 49515a0580cSDavid Brownell * 49615a0580cSDavid Brownell * There are two other cases, where it's not generally practical 49715a0580cSDavid Brownell * to rely on a single I/O: 49815a0580cSDavid Brownell * 49915a0580cSDavid Brownell * - R1B responses need at least N(EC) bytes of all-zeroes. 50015a0580cSDavid Brownell * 50115a0580cSDavid Brownell * In this case we can *try* to fit it into one I/O, then 50215a0580cSDavid Brownell * maybe read more data later. 50315a0580cSDavid Brownell * 50415a0580cSDavid Brownell * - Data block reads are more troublesome, since a variable 50515a0580cSDavid Brownell * number of padding bytes precede the token and data. 50615a0580cSDavid Brownell * + N(CX) (== 0..8) bytes of all-ones, before CSD or CID 50715a0580cSDavid Brownell * + N(AC) (== 1..many) bytes of all-ones 50815a0580cSDavid Brownell * 50915a0580cSDavid Brownell * In this case we currently only have minimal speedups here: 51015a0580cSDavid Brownell * when N(CR) == 1 we can avoid I/O in response_get(). 51115a0580cSDavid Brownell */ 51215a0580cSDavid Brownell if (cs_on && (mrq->data->flags & MMC_DATA_READ)) { 51315a0580cSDavid Brownell cp += 2; /* min(N(CR)) + status */ 51415a0580cSDavid Brownell /* R1 */ 51515a0580cSDavid Brownell } else { 51615a0580cSDavid Brownell cp += 10; /* max(N(CR)) + status + min(N(RC),N(WR)) */ 51715a0580cSDavid Brownell if (cmd->flags & MMC_RSP_SPI_S2) /* R2/R5 */ 51815a0580cSDavid Brownell cp++; 51915a0580cSDavid Brownell else if (cmd->flags & MMC_RSP_SPI_B4) /* R3/R4/R7 */ 52015a0580cSDavid Brownell cp += 4; 52115a0580cSDavid Brownell else if (cmd->flags & MMC_RSP_BUSY) /* R1B */ 52215a0580cSDavid Brownell cp = data->status + sizeof(data->status); 52315a0580cSDavid Brownell /* else: R1 (most commands) */ 52415a0580cSDavid Brownell } 52515a0580cSDavid Brownell 52615a0580cSDavid Brownell dev_dbg(&host->spi->dev, " mmc_spi: CMD%d, resp %s\n", 52715a0580cSDavid Brownell cmd->opcode, maptype(cmd)); 52815a0580cSDavid Brownell 52915a0580cSDavid Brownell /* send command, leaving chipselect active */ 53015a0580cSDavid Brownell spi_message_init(&host->m); 53115a0580cSDavid Brownell 53215a0580cSDavid Brownell t = &host->t; 53315a0580cSDavid Brownell memset(t, 0, sizeof(*t)); 53415a0580cSDavid Brownell t->tx_buf = t->rx_buf = data->status; 53515a0580cSDavid Brownell t->tx_dma = t->rx_dma = host->data_dma; 53615a0580cSDavid Brownell t->len = cp - data->status; 53715a0580cSDavid Brownell t->cs_change = 1; 53815a0580cSDavid Brownell spi_message_add_tail(t, &host->m); 53915a0580cSDavid Brownell 54015a0580cSDavid Brownell if (host->dma_dev) { 54115a0580cSDavid Brownell host->m.is_dma_mapped = 1; 54215a0580cSDavid Brownell dma_sync_single_for_device(host->dma_dev, 54315a0580cSDavid Brownell host->data_dma, sizeof(*host->data), 54415a0580cSDavid Brownell DMA_BIDIRECTIONAL); 54515a0580cSDavid Brownell } 5464751c1c7SErnst Schwab status = spi_sync_locked(host->spi, &host->m); 54715a0580cSDavid Brownell 54815a0580cSDavid Brownell if (host->dma_dev) 54915a0580cSDavid Brownell dma_sync_single_for_cpu(host->dma_dev, 55015a0580cSDavid Brownell host->data_dma, sizeof(*host->data), 55115a0580cSDavid Brownell DMA_BIDIRECTIONAL); 55215a0580cSDavid Brownell if (status < 0) { 55315a0580cSDavid Brownell dev_dbg(&host->spi->dev, " ... write returned %d\n", status); 55415a0580cSDavid Brownell cmd->error = status; 55515a0580cSDavid Brownell return status; 55615a0580cSDavid Brownell } 55715a0580cSDavid Brownell 55815a0580cSDavid Brownell /* after no-data commands and STOP_TRANSMISSION, chipselect off */ 55915a0580cSDavid Brownell return mmc_spi_response_get(host, cmd, cs_on); 56015a0580cSDavid Brownell } 56115a0580cSDavid Brownell 56215a0580cSDavid Brownell /* Build data message with up to four separate transfers. For TX, we 56315a0580cSDavid Brownell * start by writing the data token. And in most cases, we finish with 56415a0580cSDavid Brownell * a status transfer. 56515a0580cSDavid Brownell * 56615a0580cSDavid Brownell * We always provide TX data for data and CRC. The MMC/SD protocol 56715a0580cSDavid Brownell * requires us to write ones; but Linux defaults to writing zeroes; 56815a0580cSDavid Brownell * so we explicitly initialize it to all ones on RX paths. 56915a0580cSDavid Brownell * 57015a0580cSDavid Brownell * We also handle DMA mapping, so the underlying SPI controller does 57115a0580cSDavid Brownell * not need to (re)do it for each message. 57215a0580cSDavid Brownell */ 57315a0580cSDavid Brownell static void 57415a0580cSDavid Brownell mmc_spi_setup_data_message( 57515a0580cSDavid Brownell struct mmc_spi_host *host, 57615a0580cSDavid Brownell int multiple, 57715a0580cSDavid Brownell enum dma_data_direction direction) 57815a0580cSDavid Brownell { 57915a0580cSDavid Brownell struct spi_transfer *t; 58015a0580cSDavid Brownell struct scratch *scratch = host->data; 58115a0580cSDavid Brownell dma_addr_t dma = host->data_dma; 58215a0580cSDavid Brownell 58315a0580cSDavid Brownell spi_message_init(&host->m); 58415a0580cSDavid Brownell if (dma) 58515a0580cSDavid Brownell host->m.is_dma_mapped = 1; 58615a0580cSDavid Brownell 58715a0580cSDavid Brownell /* for reads, readblock() skips 0xff bytes before finding 58815a0580cSDavid Brownell * the token; for writes, this transfer issues that token. 58915a0580cSDavid Brownell */ 59015a0580cSDavid Brownell if (direction == DMA_TO_DEVICE) { 59115a0580cSDavid Brownell t = &host->token; 59215a0580cSDavid Brownell memset(t, 0, sizeof(*t)); 59315a0580cSDavid Brownell t->len = 1; 59415a0580cSDavid Brownell if (multiple) 59515a0580cSDavid Brownell scratch->data_token = SPI_TOKEN_MULTI_WRITE; 59615a0580cSDavid Brownell else 59715a0580cSDavid Brownell scratch->data_token = SPI_TOKEN_SINGLE; 59815a0580cSDavid Brownell t->tx_buf = &scratch->data_token; 59915a0580cSDavid Brownell if (dma) 60015a0580cSDavid Brownell t->tx_dma = dma + offsetof(struct scratch, data_token); 60115a0580cSDavid Brownell spi_message_add_tail(t, &host->m); 60215a0580cSDavid Brownell } 60315a0580cSDavid Brownell 60415a0580cSDavid Brownell /* Body of transfer is buffer, then CRC ... 60515a0580cSDavid Brownell * either TX-only, or RX with TX-ones. 60615a0580cSDavid Brownell */ 60715a0580cSDavid Brownell t = &host->t; 60815a0580cSDavid Brownell memset(t, 0, sizeof(*t)); 60915a0580cSDavid Brownell t->tx_buf = host->ones; 61015a0580cSDavid Brownell t->tx_dma = host->ones_dma; 61115a0580cSDavid Brownell /* length and actual buffer info are written later */ 61215a0580cSDavid Brownell spi_message_add_tail(t, &host->m); 61315a0580cSDavid Brownell 61415a0580cSDavid Brownell t = &host->crc; 61515a0580cSDavid Brownell memset(t, 0, sizeof(*t)); 61615a0580cSDavid Brownell t->len = 2; 61715a0580cSDavid Brownell if (direction == DMA_TO_DEVICE) { 61815a0580cSDavid Brownell /* the actual CRC may get written later */ 61915a0580cSDavid Brownell t->tx_buf = &scratch->crc_val; 62015a0580cSDavid Brownell if (dma) 62115a0580cSDavid Brownell t->tx_dma = dma + offsetof(struct scratch, crc_val); 62215a0580cSDavid Brownell } else { 62315a0580cSDavid Brownell t->tx_buf = host->ones; 62415a0580cSDavid Brownell t->tx_dma = host->ones_dma; 62515a0580cSDavid Brownell t->rx_buf = &scratch->crc_val; 62615a0580cSDavid Brownell if (dma) 62715a0580cSDavid Brownell t->rx_dma = dma + offsetof(struct scratch, crc_val); 62815a0580cSDavid Brownell } 62915a0580cSDavid Brownell spi_message_add_tail(t, &host->m); 63015a0580cSDavid Brownell 63115a0580cSDavid Brownell /* 63215a0580cSDavid Brownell * A single block read is followed by N(EC) [0+] all-ones bytes 63315a0580cSDavid Brownell * before deselect ... don't bother. 63415a0580cSDavid Brownell * 63515a0580cSDavid Brownell * Multiblock reads are followed by N(AC) [1+] all-ones bytes before 63615a0580cSDavid Brownell * the next block is read, or a STOP_TRANSMISSION is issued. We'll 63715a0580cSDavid Brownell * collect that single byte, so readblock() doesn't need to. 63815a0580cSDavid Brownell * 63915a0580cSDavid Brownell * For a write, the one-byte data response follows immediately, then 64015a0580cSDavid Brownell * come zero or more busy bytes, then N(WR) [1+] all-ones bytes. 64115a0580cSDavid Brownell * Then single block reads may deselect, and multiblock ones issue 64215a0580cSDavid Brownell * the next token (next data block, or STOP_TRAN). We can try to 64315a0580cSDavid Brownell * minimize I/O ops by using a single read to collect end-of-busy. 64415a0580cSDavid Brownell */ 64515a0580cSDavid Brownell if (multiple || direction == DMA_TO_DEVICE) { 64615a0580cSDavid Brownell t = &host->early_status; 64715a0580cSDavid Brownell memset(t, 0, sizeof(*t)); 64815a0580cSDavid Brownell t->len = (direction == DMA_TO_DEVICE) 64915a0580cSDavid Brownell ? sizeof(scratch->status) 65015a0580cSDavid Brownell : 1; 65115a0580cSDavid Brownell t->tx_buf = host->ones; 65215a0580cSDavid Brownell t->tx_dma = host->ones_dma; 65315a0580cSDavid Brownell t->rx_buf = scratch->status; 65415a0580cSDavid Brownell if (dma) 65515a0580cSDavid Brownell t->rx_dma = dma + offsetof(struct scratch, status); 65615a0580cSDavid Brownell t->cs_change = 1; 65715a0580cSDavid Brownell spi_message_add_tail(t, &host->m); 65815a0580cSDavid Brownell } 65915a0580cSDavid Brownell } 66015a0580cSDavid Brownell 66115a0580cSDavid Brownell /* 66215a0580cSDavid Brownell * Write one block: 66315a0580cSDavid Brownell * - caller handled preceding N(WR) [1+] all-ones bytes 66415a0580cSDavid Brownell * - data block 66515a0580cSDavid Brownell * + token 66615a0580cSDavid Brownell * + data bytes 66715a0580cSDavid Brownell * + crc16 66815a0580cSDavid Brownell * - an all-ones byte ... card writes a data-response byte 66915a0580cSDavid Brownell * - followed by N(EC) [0+] all-ones bytes, card writes zero/'busy' 67015a0580cSDavid Brownell * 67115a0580cSDavid Brownell * Return negative errno, else success. 67215a0580cSDavid Brownell */ 67315a0580cSDavid Brownell static int 674162350ebSMatthew Fleming mmc_spi_writeblock(struct mmc_spi_host *host, struct spi_transfer *t, 67556e303ebSWolfgang Muees unsigned long timeout) 67615a0580cSDavid Brownell { 67715a0580cSDavid Brownell struct spi_device *spi = host->spi; 67815a0580cSDavid Brownell int status, i; 67915a0580cSDavid Brownell struct scratch *scratch = host->data; 680f079a8fcSWolfgang Muees u32 pattern; 68115a0580cSDavid Brownell 68215a0580cSDavid Brownell if (host->mmc->use_spi_crc) 68315a0580cSDavid Brownell scratch->crc_val = cpu_to_be16( 68415a0580cSDavid Brownell crc_itu_t(0, t->tx_buf, t->len)); 68515a0580cSDavid Brownell if (host->dma_dev) 68615a0580cSDavid Brownell dma_sync_single_for_device(host->dma_dev, 68715a0580cSDavid Brownell host->data_dma, sizeof(*scratch), 68815a0580cSDavid Brownell DMA_BIDIRECTIONAL); 68915a0580cSDavid Brownell 6904751c1c7SErnst Schwab status = spi_sync_locked(spi, &host->m); 69115a0580cSDavid Brownell 69215a0580cSDavid Brownell if (status != 0) { 69315a0580cSDavid Brownell dev_dbg(&spi->dev, "write error (%d)\n", status); 69415a0580cSDavid Brownell return status; 69515a0580cSDavid Brownell } 69615a0580cSDavid Brownell 69715a0580cSDavid Brownell if (host->dma_dev) 69815a0580cSDavid Brownell dma_sync_single_for_cpu(host->dma_dev, 69915a0580cSDavid Brownell host->data_dma, sizeof(*scratch), 70015a0580cSDavid Brownell DMA_BIDIRECTIONAL); 70115a0580cSDavid Brownell 70215a0580cSDavid Brownell /* 70315a0580cSDavid Brownell * Get the transmission data-response reply. It must follow 70415a0580cSDavid Brownell * immediately after the data block we transferred. This reply 70515a0580cSDavid Brownell * doesn't necessarily tell whether the write operation succeeded; 70615a0580cSDavid Brownell * it just says if the transmission was ok and whether *earlier* 70715a0580cSDavid Brownell * writes succeeded; see the standard. 708f079a8fcSWolfgang Muees * 709f079a8fcSWolfgang Muees * In practice, there are (even modern SDHC-)cards which are late 710f079a8fcSWolfgang Muees * in sending the response, and miss the time frame by a few bits, 711f079a8fcSWolfgang Muees * so we have to cope with this situation and check the response 712f079a8fcSWolfgang Muees * bit-by-bit. Arggh!!! 71315a0580cSDavid Brownell */ 714f079a8fcSWolfgang Muees pattern = scratch->status[0] << 24; 715f079a8fcSWolfgang Muees pattern |= scratch->status[1] << 16; 716f079a8fcSWolfgang Muees pattern |= scratch->status[2] << 8; 717f079a8fcSWolfgang Muees pattern |= scratch->status[3]; 718f079a8fcSWolfgang Muees 719f079a8fcSWolfgang Muees /* First 3 bit of pattern are undefined */ 720f079a8fcSWolfgang Muees pattern |= 0xE0000000; 721f079a8fcSWolfgang Muees 722f079a8fcSWolfgang Muees /* left-adjust to leading 0 bit */ 723f079a8fcSWolfgang Muees while (pattern & 0x80000000) 724f079a8fcSWolfgang Muees pattern <<= 1; 725f079a8fcSWolfgang Muees /* right-adjust for pattern matching. Code is in bit 4..0 now. */ 726f079a8fcSWolfgang Muees pattern >>= 27; 727f079a8fcSWolfgang Muees 728f079a8fcSWolfgang Muees switch (pattern) { 72915a0580cSDavid Brownell case SPI_RESPONSE_ACCEPTED: 73015a0580cSDavid Brownell status = 0; 73115a0580cSDavid Brownell break; 73215a0580cSDavid Brownell case SPI_RESPONSE_CRC_ERR: 73315a0580cSDavid Brownell /* host shall then issue MMC_STOP_TRANSMISSION */ 73415a0580cSDavid Brownell status = -EILSEQ; 73515a0580cSDavid Brownell break; 73615a0580cSDavid Brownell case SPI_RESPONSE_WRITE_ERR: 73715a0580cSDavid Brownell /* host shall then issue MMC_STOP_TRANSMISSION, 73815a0580cSDavid Brownell * and should MMC_SEND_STATUS to sort it out 73915a0580cSDavid Brownell */ 74015a0580cSDavid Brownell status = -EIO; 74115a0580cSDavid Brownell break; 74215a0580cSDavid Brownell default: 74315a0580cSDavid Brownell status = -EPROTO; 74415a0580cSDavid Brownell break; 74515a0580cSDavid Brownell } 74615a0580cSDavid Brownell if (status != 0) { 74715a0580cSDavid Brownell dev_dbg(&spi->dev, "write error %02x (%d)\n", 74815a0580cSDavid Brownell scratch->status[0], status); 74915a0580cSDavid Brownell return status; 75015a0580cSDavid Brownell } 75115a0580cSDavid Brownell 75215a0580cSDavid Brownell t->tx_buf += t->len; 75315a0580cSDavid Brownell if (host->dma_dev) 75415a0580cSDavid Brownell t->tx_dma += t->len; 75515a0580cSDavid Brownell 75615a0580cSDavid Brownell /* Return when not busy. If we didn't collect that status yet, 75715a0580cSDavid Brownell * we'll need some more I/O. 75815a0580cSDavid Brownell */ 759f079a8fcSWolfgang Muees for (i = 4; i < sizeof(scratch->status); i++) { 760f079a8fcSWolfgang Muees /* card is non-busy if the most recent bit is 1 */ 761f079a8fcSWolfgang Muees if (scratch->status[i] & 0x01) 76215a0580cSDavid Brownell return 0; 76315a0580cSDavid Brownell } 764162350ebSMatthew Fleming return mmc_spi_wait_unbusy(host, timeout); 76515a0580cSDavid Brownell } 76615a0580cSDavid Brownell 76715a0580cSDavid Brownell /* 76815a0580cSDavid Brownell * Read one block: 76915a0580cSDavid Brownell * - skip leading all-ones bytes ... either 77015a0580cSDavid Brownell * + N(AC) [1..f(clock,CSD)] usually, else 77115a0580cSDavid Brownell * + N(CX) [0..8] when reading CSD or CID 77215a0580cSDavid Brownell * - data block 77315a0580cSDavid Brownell * + token ... if error token, no data or crc 77415a0580cSDavid Brownell * + data bytes 77515a0580cSDavid Brownell * + crc16 77615a0580cSDavid Brownell * 77715a0580cSDavid Brownell * After single block reads, we're done; N(EC) [0+] all-ones bytes follow 77815a0580cSDavid Brownell * before dropping chipselect. 77915a0580cSDavid Brownell * 78015a0580cSDavid Brownell * For multiblock reads, caller either reads the next block or issues a 78115a0580cSDavid Brownell * STOP_TRANSMISSION command. 78215a0580cSDavid Brownell */ 78315a0580cSDavid Brownell static int 784162350ebSMatthew Fleming mmc_spi_readblock(struct mmc_spi_host *host, struct spi_transfer *t, 78556e303ebSWolfgang Muees unsigned long timeout) 78615a0580cSDavid Brownell { 78715a0580cSDavid Brownell struct spi_device *spi = host->spi; 78815a0580cSDavid Brownell int status; 78915a0580cSDavid Brownell struct scratch *scratch = host->data; 790ab5a643cSWolfgang Muees unsigned int bitshift; 791ab5a643cSWolfgang Muees u8 leftover; 79215a0580cSDavid Brownell 79315a0580cSDavid Brownell /* At least one SD card sends an all-zeroes byte when N(CX) 79415a0580cSDavid Brownell * applies, before the all-ones bytes ... just cope with that. 79515a0580cSDavid Brownell */ 79615a0580cSDavid Brownell status = mmc_spi_readbytes(host, 1); 79715a0580cSDavid Brownell if (status < 0) 79815a0580cSDavid Brownell return status; 79915a0580cSDavid Brownell status = scratch->status[0]; 80015a0580cSDavid Brownell if (status == 0xff || status == 0) 801162350ebSMatthew Fleming status = mmc_spi_readtoken(host, timeout); 80215a0580cSDavid Brownell 803ab5a643cSWolfgang Muees if (status < 0) { 804ab5a643cSWolfgang Muees dev_dbg(&spi->dev, "read error %02x (%d)\n", status, status); 805ab5a643cSWolfgang Muees return status; 806ab5a643cSWolfgang Muees } 807ab5a643cSWolfgang Muees 808ab5a643cSWolfgang Muees /* The token may be bit-shifted... 809ab5a643cSWolfgang Muees * the first 0-bit precedes the data stream. 810ab5a643cSWolfgang Muees */ 811ab5a643cSWolfgang Muees bitshift = 7; 812ab5a643cSWolfgang Muees while (status & 0x80) { 813ab5a643cSWolfgang Muees status <<= 1; 814ab5a643cSWolfgang Muees bitshift--; 815ab5a643cSWolfgang Muees } 816ab5a643cSWolfgang Muees leftover = status << 1; 817ab5a643cSWolfgang Muees 81815a0580cSDavid Brownell if (host->dma_dev) { 81915a0580cSDavid Brownell dma_sync_single_for_device(host->dma_dev, 82015a0580cSDavid Brownell host->data_dma, sizeof(*scratch), 82115a0580cSDavid Brownell DMA_BIDIRECTIONAL); 82215a0580cSDavid Brownell dma_sync_single_for_device(host->dma_dev, 82315a0580cSDavid Brownell t->rx_dma, t->len, 82415a0580cSDavid Brownell DMA_FROM_DEVICE); 82515a0580cSDavid Brownell } 82615a0580cSDavid Brownell 8274751c1c7SErnst Schwab status = spi_sync_locked(spi, &host->m); 82815a0580cSDavid Brownell 82915a0580cSDavid Brownell if (host->dma_dev) { 83015a0580cSDavid Brownell dma_sync_single_for_cpu(host->dma_dev, 83115a0580cSDavid Brownell host->data_dma, sizeof(*scratch), 83215a0580cSDavid Brownell DMA_BIDIRECTIONAL); 83315a0580cSDavid Brownell dma_sync_single_for_cpu(host->dma_dev, 83415a0580cSDavid Brownell t->rx_dma, t->len, 83515a0580cSDavid Brownell DMA_FROM_DEVICE); 83615a0580cSDavid Brownell } 83715a0580cSDavid Brownell 838ab5a643cSWolfgang Muees if (bitshift) { 839ab5a643cSWolfgang Muees /* Walk through the data and the crc and do 840ab5a643cSWolfgang Muees * all the magic to get byte-aligned data. 84115a0580cSDavid Brownell */ 842ab5a643cSWolfgang Muees u8 *cp = t->rx_buf; 843ab5a643cSWolfgang Muees unsigned int len; 844ab5a643cSWolfgang Muees unsigned int bitright = 8 - bitshift; 845ab5a643cSWolfgang Muees u8 temp; 846ab5a643cSWolfgang Muees for (len = t->len; len; len--) { 847ab5a643cSWolfgang Muees temp = *cp; 848ab5a643cSWolfgang Muees *cp++ = leftover | (temp >> bitshift); 849ab5a643cSWolfgang Muees leftover = temp << bitright; 850ab5a643cSWolfgang Muees } 851ab5a643cSWolfgang Muees cp = (u8 *) &scratch->crc_val; 852ab5a643cSWolfgang Muees temp = *cp; 853ab5a643cSWolfgang Muees *cp++ = leftover | (temp >> bitshift); 854ab5a643cSWolfgang Muees leftover = temp << bitright; 855ab5a643cSWolfgang Muees temp = *cp; 856ab5a643cSWolfgang Muees *cp = leftover | (temp >> bitshift); 85715a0580cSDavid Brownell } 85815a0580cSDavid Brownell 85915a0580cSDavid Brownell if (host->mmc->use_spi_crc) { 86015a0580cSDavid Brownell u16 crc = crc_itu_t(0, t->rx_buf, t->len); 86115a0580cSDavid Brownell 86215a0580cSDavid Brownell be16_to_cpus(&scratch->crc_val); 86315a0580cSDavid Brownell if (scratch->crc_val != crc) { 86415a0580cSDavid Brownell dev_dbg(&spi->dev, "read - crc error: crc_val=0x%04x, " 86515a0580cSDavid Brownell "computed=0x%04x len=%d\n", 86615a0580cSDavid Brownell scratch->crc_val, crc, t->len); 86715a0580cSDavid Brownell return -EILSEQ; 86815a0580cSDavid Brownell } 86915a0580cSDavid Brownell } 87015a0580cSDavid Brownell 87115a0580cSDavid Brownell t->rx_buf += t->len; 87215a0580cSDavid Brownell if (host->dma_dev) 87315a0580cSDavid Brownell t->rx_dma += t->len; 87415a0580cSDavid Brownell 87515a0580cSDavid Brownell return 0; 87615a0580cSDavid Brownell } 87715a0580cSDavid Brownell 87815a0580cSDavid Brownell /* 87915a0580cSDavid Brownell * An MMC/SD data stage includes one or more blocks, optional CRCs, 88015a0580cSDavid Brownell * and inline handshaking. That handhaking makes it unlike most 88115a0580cSDavid Brownell * other SPI protocol stacks. 88215a0580cSDavid Brownell */ 88315a0580cSDavid Brownell static void 88415a0580cSDavid Brownell mmc_spi_data_do(struct mmc_spi_host *host, struct mmc_command *cmd, 88515a0580cSDavid Brownell struct mmc_data *data, u32 blk_size) 88615a0580cSDavid Brownell { 88715a0580cSDavid Brownell struct spi_device *spi = host->spi; 88815a0580cSDavid Brownell struct device *dma_dev = host->dma_dev; 88915a0580cSDavid Brownell struct spi_transfer *t; 89015a0580cSDavid Brownell enum dma_data_direction direction; 89115a0580cSDavid Brownell struct scatterlist *sg; 89215a0580cSDavid Brownell unsigned n_sg; 89315a0580cSDavid Brownell int multiple = (data->blocks > 1); 894162350ebSMatthew Fleming u32 clock_rate; 89556e303ebSWolfgang Muees unsigned long timeout; 89615a0580cSDavid Brownell 89715a0580cSDavid Brownell if (data->flags & MMC_DATA_READ) 89815a0580cSDavid Brownell direction = DMA_FROM_DEVICE; 89915a0580cSDavid Brownell else 90015a0580cSDavid Brownell direction = DMA_TO_DEVICE; 90115a0580cSDavid Brownell mmc_spi_setup_data_message(host, multiple, direction); 90215a0580cSDavid Brownell t = &host->t; 90315a0580cSDavid Brownell 904162350ebSMatthew Fleming if (t->speed_hz) 905162350ebSMatthew Fleming clock_rate = t->speed_hz; 906162350ebSMatthew Fleming else 907162350ebSMatthew Fleming clock_rate = spi->max_speed_hz; 908162350ebSMatthew Fleming 90956e303ebSWolfgang Muees timeout = data->timeout_ns + 91056e303ebSWolfgang Muees data->timeout_clks * 1000000 / clock_rate; 91156e303ebSWolfgang Muees timeout = usecs_to_jiffies((unsigned int)(timeout / 1000)) + 1; 912162350ebSMatthew Fleming 91315a0580cSDavid Brownell /* Handle scatterlist segments one at a time, with synch for 91415a0580cSDavid Brownell * each 512-byte block 91515a0580cSDavid Brownell */ 91615a0580cSDavid Brownell for (sg = data->sg, n_sg = data->sg_len; n_sg; n_sg--, sg++) { 91715a0580cSDavid Brownell int status = 0; 91815a0580cSDavid Brownell dma_addr_t dma_addr = 0; 91915a0580cSDavid Brownell void *kmap_addr; 92015a0580cSDavid Brownell unsigned length = sg->length; 92115a0580cSDavid Brownell enum dma_data_direction dir = direction; 92215a0580cSDavid Brownell 92315a0580cSDavid Brownell /* set up dma mapping for controller drivers that might 92415a0580cSDavid Brownell * use DMA ... though they may fall back to PIO 92515a0580cSDavid Brownell */ 92615a0580cSDavid Brownell if (dma_dev) { 92715a0580cSDavid Brownell /* never invalidate whole *shared* pages ... */ 92815a0580cSDavid Brownell if ((sg->offset != 0 || length != PAGE_SIZE) 92915a0580cSDavid Brownell && dir == DMA_FROM_DEVICE) 93015a0580cSDavid Brownell dir = DMA_BIDIRECTIONAL; 93115a0580cSDavid Brownell 93245711f1aSJens Axboe dma_addr = dma_map_page(dma_dev, sg_page(sg), 0, 93315a0580cSDavid Brownell PAGE_SIZE, dir); 93415a0580cSDavid Brownell if (direction == DMA_TO_DEVICE) 93515a0580cSDavid Brownell t->tx_dma = dma_addr + sg->offset; 93615a0580cSDavid Brownell else 93715a0580cSDavid Brownell t->rx_dma = dma_addr + sg->offset; 93815a0580cSDavid Brownell } 93915a0580cSDavid Brownell 94015a0580cSDavid Brownell /* allow pio too; we don't allow highmem */ 94145711f1aSJens Axboe kmap_addr = kmap(sg_page(sg)); 94215a0580cSDavid Brownell if (direction == DMA_TO_DEVICE) 94315a0580cSDavid Brownell t->tx_buf = kmap_addr + sg->offset; 94415a0580cSDavid Brownell else 94515a0580cSDavid Brownell t->rx_buf = kmap_addr + sg->offset; 94615a0580cSDavid Brownell 94715a0580cSDavid Brownell /* transfer each block, and update request status */ 94815a0580cSDavid Brownell while (length) { 94915a0580cSDavid Brownell t->len = min(length, blk_size); 95015a0580cSDavid Brownell 95115a0580cSDavid Brownell dev_dbg(&host->spi->dev, 95215a0580cSDavid Brownell " mmc_spi: %s block, %d bytes\n", 95315a0580cSDavid Brownell (direction == DMA_TO_DEVICE) 95415a0580cSDavid Brownell ? "write" 95515a0580cSDavid Brownell : "read", 95615a0580cSDavid Brownell t->len); 95715a0580cSDavid Brownell 95815a0580cSDavid Brownell if (direction == DMA_TO_DEVICE) 959162350ebSMatthew Fleming status = mmc_spi_writeblock(host, t, timeout); 96015a0580cSDavid Brownell else 961162350ebSMatthew Fleming status = mmc_spi_readblock(host, t, timeout); 96215a0580cSDavid Brownell if (status < 0) 96315a0580cSDavid Brownell break; 96415a0580cSDavid Brownell 96515a0580cSDavid Brownell data->bytes_xfered += t->len; 96615a0580cSDavid Brownell length -= t->len; 96715a0580cSDavid Brownell 96815a0580cSDavid Brownell if (!multiple) 96915a0580cSDavid Brownell break; 97015a0580cSDavid Brownell } 97115a0580cSDavid Brownell 97215a0580cSDavid Brownell /* discard mappings */ 97315a0580cSDavid Brownell if (direction == DMA_FROM_DEVICE) 97445711f1aSJens Axboe flush_kernel_dcache_page(sg_page(sg)); 97545711f1aSJens Axboe kunmap(sg_page(sg)); 97615a0580cSDavid Brownell if (dma_dev) 97715a0580cSDavid Brownell dma_unmap_page(dma_dev, dma_addr, PAGE_SIZE, dir); 97815a0580cSDavid Brownell 97915a0580cSDavid Brownell if (status < 0) { 98015a0580cSDavid Brownell data->error = status; 98115a0580cSDavid Brownell dev_dbg(&spi->dev, "%s status %d\n", 98215a0580cSDavid Brownell (direction == DMA_TO_DEVICE) 98315a0580cSDavid Brownell ? "write" : "read", 98415a0580cSDavid Brownell status); 98515a0580cSDavid Brownell break; 98615a0580cSDavid Brownell } 98715a0580cSDavid Brownell } 98815a0580cSDavid Brownell 98915a0580cSDavid Brownell /* NOTE some docs describe an MMC-only SET_BLOCK_COUNT (CMD23) that 99015a0580cSDavid Brownell * can be issued before multiblock writes. Unlike its more widely 99115a0580cSDavid Brownell * documented analogue for SD cards (SET_WR_BLK_ERASE_COUNT, ACMD23), 99215a0580cSDavid Brownell * that can affect the STOP_TRAN logic. Complete (and current) 99315a0580cSDavid Brownell * MMC specs should sort that out before Linux starts using CMD23. 99415a0580cSDavid Brownell */ 99515a0580cSDavid Brownell if (direction == DMA_TO_DEVICE && multiple) { 99615a0580cSDavid Brownell struct scratch *scratch = host->data; 99715a0580cSDavid Brownell int tmp; 99815a0580cSDavid Brownell const unsigned statlen = sizeof(scratch->status); 99915a0580cSDavid Brownell 100015a0580cSDavid Brownell dev_dbg(&spi->dev, " mmc_spi: STOP_TRAN\n"); 100115a0580cSDavid Brownell 100215a0580cSDavid Brownell /* Tweak the per-block message we set up earlier by morphing 100315a0580cSDavid Brownell * it to hold single buffer with the token followed by some 100415a0580cSDavid Brownell * all-ones bytes ... skip N(BR) (0..1), scan the rest for 100515a0580cSDavid Brownell * "not busy any longer" status, and leave chip selected. 100615a0580cSDavid Brownell */ 100715a0580cSDavid Brownell INIT_LIST_HEAD(&host->m.transfers); 100815a0580cSDavid Brownell list_add(&host->early_status.transfer_list, 100915a0580cSDavid Brownell &host->m.transfers); 101015a0580cSDavid Brownell 101115a0580cSDavid Brownell memset(scratch->status, 0xff, statlen); 101215a0580cSDavid Brownell scratch->status[0] = SPI_TOKEN_STOP_TRAN; 101315a0580cSDavid Brownell 101415a0580cSDavid Brownell host->early_status.tx_buf = host->early_status.rx_buf; 101515a0580cSDavid Brownell host->early_status.tx_dma = host->early_status.rx_dma; 101615a0580cSDavid Brownell host->early_status.len = statlen; 101715a0580cSDavid Brownell 101815a0580cSDavid Brownell if (host->dma_dev) 101915a0580cSDavid Brownell dma_sync_single_for_device(host->dma_dev, 102015a0580cSDavid Brownell host->data_dma, sizeof(*scratch), 102115a0580cSDavid Brownell DMA_BIDIRECTIONAL); 102215a0580cSDavid Brownell 10234751c1c7SErnst Schwab tmp = spi_sync_locked(spi, &host->m); 102415a0580cSDavid Brownell 102515a0580cSDavid Brownell if (host->dma_dev) 102615a0580cSDavid Brownell dma_sync_single_for_cpu(host->dma_dev, 102715a0580cSDavid Brownell host->data_dma, sizeof(*scratch), 102815a0580cSDavid Brownell DMA_BIDIRECTIONAL); 102915a0580cSDavid Brownell 103015a0580cSDavid Brownell if (tmp < 0) { 103115a0580cSDavid Brownell if (!data->error) 103215a0580cSDavid Brownell data->error = tmp; 103315a0580cSDavid Brownell return; 103415a0580cSDavid Brownell } 103515a0580cSDavid Brownell 103615a0580cSDavid Brownell /* Ideally we collected "not busy" status with one I/O, 103715a0580cSDavid Brownell * avoiding wasteful byte-at-a-time scanning... but more 103815a0580cSDavid Brownell * I/O is often needed. 103915a0580cSDavid Brownell */ 104015a0580cSDavid Brownell for (tmp = 2; tmp < statlen; tmp++) { 104115a0580cSDavid Brownell if (scratch->status[tmp] != 0) 104215a0580cSDavid Brownell return; 104315a0580cSDavid Brownell } 1044162350ebSMatthew Fleming tmp = mmc_spi_wait_unbusy(host, timeout); 104515a0580cSDavid Brownell if (tmp < 0 && !data->error) 104615a0580cSDavid Brownell data->error = tmp; 104715a0580cSDavid Brownell } 104815a0580cSDavid Brownell } 104915a0580cSDavid Brownell 105015a0580cSDavid Brownell /****************************************************************************/ 105115a0580cSDavid Brownell 105215a0580cSDavid Brownell /* 105315a0580cSDavid Brownell * MMC driver implementation -- the interface to the MMC stack 105415a0580cSDavid Brownell */ 105515a0580cSDavid Brownell 105615a0580cSDavid Brownell static void mmc_spi_request(struct mmc_host *mmc, struct mmc_request *mrq) 105715a0580cSDavid Brownell { 105815a0580cSDavid Brownell struct mmc_spi_host *host = mmc_priv(mmc); 105915a0580cSDavid Brownell int status = -EINVAL; 1060061c6c84SSonic Zhang int crc_retry = 5; 1061061c6c84SSonic Zhang struct mmc_command stop; 106215a0580cSDavid Brownell 106315a0580cSDavid Brownell #ifdef DEBUG 106415a0580cSDavid Brownell /* MMC core and layered drivers *MUST* issue SPI-aware commands */ 106515a0580cSDavid Brownell { 106615a0580cSDavid Brownell struct mmc_command *cmd; 106715a0580cSDavid Brownell int invalid = 0; 106815a0580cSDavid Brownell 106915a0580cSDavid Brownell cmd = mrq->cmd; 107015a0580cSDavid Brownell if (!mmc_spi_resp_type(cmd)) { 107115a0580cSDavid Brownell dev_dbg(&host->spi->dev, "bogus command\n"); 107215a0580cSDavid Brownell cmd->error = -EINVAL; 107315a0580cSDavid Brownell invalid = 1; 107415a0580cSDavid Brownell } 107515a0580cSDavid Brownell 107615a0580cSDavid Brownell cmd = mrq->stop; 107715a0580cSDavid Brownell if (cmd && !mmc_spi_resp_type(cmd)) { 107815a0580cSDavid Brownell dev_dbg(&host->spi->dev, "bogus STOP command\n"); 107915a0580cSDavid Brownell cmd->error = -EINVAL; 108015a0580cSDavid Brownell invalid = 1; 108115a0580cSDavid Brownell } 108215a0580cSDavid Brownell 108315a0580cSDavid Brownell if (invalid) { 108415a0580cSDavid Brownell dump_stack(); 108515a0580cSDavid Brownell mmc_request_done(host->mmc, mrq); 108615a0580cSDavid Brownell return; 108715a0580cSDavid Brownell } 108815a0580cSDavid Brownell } 108915a0580cSDavid Brownell #endif 109015a0580cSDavid Brownell 10914751c1c7SErnst Schwab /* request exclusive bus access */ 10924751c1c7SErnst Schwab spi_bus_lock(host->spi->master); 10934751c1c7SErnst Schwab 1094061c6c84SSonic Zhang crc_recover: 109515a0580cSDavid Brownell /* issue command; then optionally data and stop */ 109615a0580cSDavid Brownell status = mmc_spi_command_send(host, mrq, mrq->cmd, mrq->data != NULL); 109715a0580cSDavid Brownell if (status == 0 && mrq->data) { 109815a0580cSDavid Brownell mmc_spi_data_do(host, mrq->cmd, mrq->data, mrq->data->blksz); 1099061c6c84SSonic Zhang 1100061c6c84SSonic Zhang /* 1101061c6c84SSonic Zhang * The SPI bus is not always reliable for large data transfers. 1102061c6c84SSonic Zhang * If an occasional crc error is reported by the SD device with 1103061c6c84SSonic Zhang * data read/write over SPI, it may be recovered by repeating 1104061c6c84SSonic Zhang * the last SD command again. The retry count is set to 5 to 1105061c6c84SSonic Zhang * ensure the driver passes stress tests. 1106061c6c84SSonic Zhang */ 1107061c6c84SSonic Zhang if (mrq->data->error == -EILSEQ && crc_retry) { 1108061c6c84SSonic Zhang stop.opcode = MMC_STOP_TRANSMISSION; 1109061c6c84SSonic Zhang stop.arg = 0; 1110061c6c84SSonic Zhang stop.flags = MMC_RSP_SPI_R1B | MMC_RSP_R1B | MMC_CMD_AC; 1111061c6c84SSonic Zhang status = mmc_spi_command_send(host, mrq, &stop, 0); 1112061c6c84SSonic Zhang crc_retry--; 1113061c6c84SSonic Zhang mrq->data->error = 0; 1114061c6c84SSonic Zhang goto crc_recover; 1115061c6c84SSonic Zhang } 1116061c6c84SSonic Zhang 111715a0580cSDavid Brownell if (mrq->stop) 111815a0580cSDavid Brownell status = mmc_spi_command_send(host, mrq, mrq->stop, 0); 111915a0580cSDavid Brownell else 112015a0580cSDavid Brownell mmc_cs_off(host); 112115a0580cSDavid Brownell } 112215a0580cSDavid Brownell 11234751c1c7SErnst Schwab /* release the bus */ 11244751c1c7SErnst Schwab spi_bus_unlock(host->spi->master); 11254751c1c7SErnst Schwab 112615a0580cSDavid Brownell mmc_request_done(host->mmc, mrq); 112715a0580cSDavid Brownell } 112815a0580cSDavid Brownell 112915a0580cSDavid Brownell /* See Section 6.4.1, in SD "Simplified Physical Layer Specification 2.0" 113015a0580cSDavid Brownell * 113115a0580cSDavid Brownell * NOTE that here we can't know that the card has just been powered up; 113215a0580cSDavid Brownell * not all MMC/SD sockets support power switching. 113315a0580cSDavid Brownell * 113415a0580cSDavid Brownell * FIXME when the card is still in SPI mode, e.g. from a previous kernel, 113515a0580cSDavid Brownell * this doesn't seem to do the right thing at all... 113615a0580cSDavid Brownell */ 113715a0580cSDavid Brownell static void mmc_spi_initsequence(struct mmc_spi_host *host) 113815a0580cSDavid Brownell { 113915a0580cSDavid Brownell /* Try to be very sure any previous command has completed; 114015a0580cSDavid Brownell * wait till not-busy, skip debris from any old commands. 114115a0580cSDavid Brownell */ 114215a0580cSDavid Brownell mmc_spi_wait_unbusy(host, r1b_timeout); 114315a0580cSDavid Brownell mmc_spi_readbytes(host, 10); 114415a0580cSDavid Brownell 114515a0580cSDavid Brownell /* 114615a0580cSDavid Brownell * Do a burst with chipselect active-high. We need to do this to 114715a0580cSDavid Brownell * meet the requirement of 74 clock cycles with both chipselect 114815a0580cSDavid Brownell * and CMD (MOSI) high before CMD0 ... after the card has been 114915a0580cSDavid Brownell * powered up to Vdd(min), and so is ready to take commands. 115015a0580cSDavid Brownell * 115115a0580cSDavid Brownell * Some cards are particularly needy of this (e.g. Viking "SD256") 115215a0580cSDavid Brownell * while most others don't seem to care. 115315a0580cSDavid Brownell * 115415a0580cSDavid Brownell * Note that this is one of the places MMC/SD plays games with the 115515a0580cSDavid Brownell * SPI protocol. Another is that when chipselect is released while 115615a0580cSDavid Brownell * the card returns BUSY status, the clock must issue several cycles 115715a0580cSDavid Brownell * with chipselect high before the card will stop driving its output. 115815a0580cSDavid Brownell */ 115915a0580cSDavid Brownell host->spi->mode |= SPI_CS_HIGH; 116015a0580cSDavid Brownell if (spi_setup(host->spi) != 0) { 116115a0580cSDavid Brownell /* Just warn; most cards work without it. */ 116215a0580cSDavid Brownell dev_warn(&host->spi->dev, 116315a0580cSDavid Brownell "can't change chip-select polarity\n"); 116415a0580cSDavid Brownell host->spi->mode &= ~SPI_CS_HIGH; 116515a0580cSDavid Brownell } else { 116615a0580cSDavid Brownell mmc_spi_readbytes(host, 18); 116715a0580cSDavid Brownell 116815a0580cSDavid Brownell host->spi->mode &= ~SPI_CS_HIGH; 116915a0580cSDavid Brownell if (spi_setup(host->spi) != 0) { 117015a0580cSDavid Brownell /* Wot, we can't get the same setup we had before? */ 117115a0580cSDavid Brownell dev_err(&host->spi->dev, 117215a0580cSDavid Brownell "can't restore chip-select polarity\n"); 117315a0580cSDavid Brownell } 117415a0580cSDavid Brownell } 117515a0580cSDavid Brownell } 117615a0580cSDavid Brownell 117715a0580cSDavid Brownell static char *mmc_powerstring(u8 power_mode) 117815a0580cSDavid Brownell { 117915a0580cSDavid Brownell switch (power_mode) { 118015a0580cSDavid Brownell case MMC_POWER_OFF: return "off"; 118115a0580cSDavid Brownell case MMC_POWER_UP: return "up"; 118215a0580cSDavid Brownell case MMC_POWER_ON: return "on"; 118315a0580cSDavid Brownell } 118415a0580cSDavid Brownell return "?"; 118515a0580cSDavid Brownell } 118615a0580cSDavid Brownell 118715a0580cSDavid Brownell static void mmc_spi_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 118815a0580cSDavid Brownell { 118915a0580cSDavid Brownell struct mmc_spi_host *host = mmc_priv(mmc); 119015a0580cSDavid Brownell 119115a0580cSDavid Brownell if (host->power_mode != ios->power_mode) { 119215a0580cSDavid Brownell int canpower; 119315a0580cSDavid Brownell 119415a0580cSDavid Brownell canpower = host->pdata && host->pdata->setpower; 119515a0580cSDavid Brownell 119615a0580cSDavid Brownell dev_dbg(&host->spi->dev, "mmc_spi: power %s (%d)%s\n", 119715a0580cSDavid Brownell mmc_powerstring(ios->power_mode), 119815a0580cSDavid Brownell ios->vdd, 119915a0580cSDavid Brownell canpower ? ", can switch" : ""); 120015a0580cSDavid Brownell 120115a0580cSDavid Brownell /* switch power on/off if possible, accounting for 120215a0580cSDavid Brownell * max 250msec powerup time if needed. 120315a0580cSDavid Brownell */ 120415a0580cSDavid Brownell if (canpower) { 120515a0580cSDavid Brownell switch (ios->power_mode) { 120615a0580cSDavid Brownell case MMC_POWER_OFF: 120715a0580cSDavid Brownell case MMC_POWER_UP: 120815a0580cSDavid Brownell host->pdata->setpower(&host->spi->dev, 120915a0580cSDavid Brownell ios->vdd); 121015a0580cSDavid Brownell if (ios->power_mode == MMC_POWER_UP) 121115a0580cSDavid Brownell msleep(host->powerup_msecs); 121215a0580cSDavid Brownell } 121315a0580cSDavid Brownell } 121415a0580cSDavid Brownell 121515a0580cSDavid Brownell /* See 6.4.1 in the simplified SD card physical spec 2.0 */ 121615a0580cSDavid Brownell if (ios->power_mode == MMC_POWER_ON) 121715a0580cSDavid Brownell mmc_spi_initsequence(host); 121815a0580cSDavid Brownell 121915a0580cSDavid Brownell /* If powering down, ground all card inputs to avoid power 122015a0580cSDavid Brownell * delivery from data lines! On a shared SPI bus, this 122115a0580cSDavid Brownell * will probably be temporary; 6.4.2 of the simplified SD 122215a0580cSDavid Brownell * spec says this must last at least 1msec. 122315a0580cSDavid Brownell * 122415a0580cSDavid Brownell * - Clock low means CPOL 0, e.g. mode 0 122515a0580cSDavid Brownell * - MOSI low comes from writing zero 122615a0580cSDavid Brownell * - Chipselect is usually active low... 122715a0580cSDavid Brownell */ 122815a0580cSDavid Brownell if (canpower && ios->power_mode == MMC_POWER_OFF) { 122915a0580cSDavid Brownell int mres; 12301685a03eSJan Nikitenko u8 nullbyte = 0; 123115a0580cSDavid Brownell 123215a0580cSDavid Brownell host->spi->mode &= ~(SPI_CPOL|SPI_CPHA); 123315a0580cSDavid Brownell mres = spi_setup(host->spi); 123415a0580cSDavid Brownell if (mres < 0) 123515a0580cSDavid Brownell dev_dbg(&host->spi->dev, 123615a0580cSDavid Brownell "switch to SPI mode 0 failed\n"); 123715a0580cSDavid Brownell 12381685a03eSJan Nikitenko if (spi_write(host->spi, &nullbyte, 1) < 0) 123915a0580cSDavid Brownell dev_dbg(&host->spi->dev, 124015a0580cSDavid Brownell "put spi signals to low failed\n"); 124115a0580cSDavid Brownell 124215a0580cSDavid Brownell /* 124315a0580cSDavid Brownell * Now clock should be low due to spi mode 0; 124415a0580cSDavid Brownell * MOSI should be low because of written 0x00; 124515a0580cSDavid Brownell * chipselect should be low (it is active low) 124615a0580cSDavid Brownell * power supply is off, so now MMC is off too! 124715a0580cSDavid Brownell * 124815a0580cSDavid Brownell * FIXME no, chipselect can be high since the 124915a0580cSDavid Brownell * device is inactive and SPI_CS_HIGH is clear... 125015a0580cSDavid Brownell */ 125115a0580cSDavid Brownell msleep(10); 125215a0580cSDavid Brownell if (mres == 0) { 125315a0580cSDavid Brownell host->spi->mode |= (SPI_CPOL|SPI_CPHA); 125415a0580cSDavid Brownell mres = spi_setup(host->spi); 125515a0580cSDavid Brownell if (mres < 0) 125615a0580cSDavid Brownell dev_dbg(&host->spi->dev, 125715a0580cSDavid Brownell "switch back to SPI mode 3" 125815a0580cSDavid Brownell " failed\n"); 125915a0580cSDavid Brownell } 126015a0580cSDavid Brownell } 126115a0580cSDavid Brownell 126215a0580cSDavid Brownell host->power_mode = ios->power_mode; 126315a0580cSDavid Brownell } 126415a0580cSDavid Brownell 126515a0580cSDavid Brownell if (host->spi->max_speed_hz != ios->clock && ios->clock != 0) { 126615a0580cSDavid Brownell int status; 126715a0580cSDavid Brownell 126815a0580cSDavid Brownell host->spi->max_speed_hz = ios->clock; 126915a0580cSDavid Brownell status = spi_setup(host->spi); 127015a0580cSDavid Brownell dev_dbg(&host->spi->dev, 127115a0580cSDavid Brownell "mmc_spi: clock to %d Hz, %d\n", 127215a0580cSDavid Brownell host->spi->max_speed_hz, status); 127315a0580cSDavid Brownell } 127415a0580cSDavid Brownell } 127515a0580cSDavid Brownell 127615a0580cSDavid Brownell static int mmc_spi_get_ro(struct mmc_host *mmc) 127715a0580cSDavid Brownell { 127815a0580cSDavid Brownell struct mmc_spi_host *host = mmc_priv(mmc); 127915a0580cSDavid Brownell 128015a0580cSDavid Brownell if (host->pdata && host->pdata->get_ro) 128108f80bb5SAnton Vorontsov return !!host->pdata->get_ro(mmc->parent); 1282bf287a90SLaurent Pinchart else 1283bf287a90SLaurent Pinchart return mmc_gpio_get_ro(mmc); 128415a0580cSDavid Brownell } 128515a0580cSDavid Brownell 1286619ef4b4SAnton Vorontsov static int mmc_spi_get_cd(struct mmc_host *mmc) 1287619ef4b4SAnton Vorontsov { 1288619ef4b4SAnton Vorontsov struct mmc_spi_host *host = mmc_priv(mmc); 1289619ef4b4SAnton Vorontsov 1290619ef4b4SAnton Vorontsov if (host->pdata && host->pdata->get_cd) 1291619ef4b4SAnton Vorontsov return !!host->pdata->get_cd(mmc->parent); 1292bf287a90SLaurent Pinchart else 1293bf287a90SLaurent Pinchart return mmc_gpio_get_cd(mmc); 1294619ef4b4SAnton Vorontsov } 129515a0580cSDavid Brownell 129615a0580cSDavid Brownell static const struct mmc_host_ops mmc_spi_ops = { 129715a0580cSDavid Brownell .request = mmc_spi_request, 129815a0580cSDavid Brownell .set_ios = mmc_spi_set_ios, 129915a0580cSDavid Brownell .get_ro = mmc_spi_get_ro, 1300619ef4b4SAnton Vorontsov .get_cd = mmc_spi_get_cd, 130115a0580cSDavid Brownell }; 130215a0580cSDavid Brownell 130315a0580cSDavid Brownell 130415a0580cSDavid Brownell /****************************************************************************/ 130515a0580cSDavid Brownell 130615a0580cSDavid Brownell /* 130715a0580cSDavid Brownell * SPI driver implementation 130815a0580cSDavid Brownell */ 130915a0580cSDavid Brownell 131015a0580cSDavid Brownell static irqreturn_t 131115a0580cSDavid Brownell mmc_spi_detect_irq(int irq, void *mmc) 131215a0580cSDavid Brownell { 131315a0580cSDavid Brownell struct mmc_spi_host *host = mmc_priv(mmc); 131415a0580cSDavid Brownell u16 delay_msec = max(host->pdata->detect_delay, (u16)100); 131515a0580cSDavid Brownell 131615a0580cSDavid Brownell mmc_detect_change(mmc, msecs_to_jiffies(delay_msec)); 131715a0580cSDavid Brownell return IRQ_HANDLED; 131815a0580cSDavid Brownell } 131915a0580cSDavid Brownell 132015a0580cSDavid Brownell static int mmc_spi_probe(struct spi_device *spi) 132115a0580cSDavid Brownell { 132215a0580cSDavid Brownell void *ones; 132315a0580cSDavid Brownell struct mmc_host *mmc; 132415a0580cSDavid Brownell struct mmc_spi_host *host; 132515a0580cSDavid Brownell int status; 1326bf287a90SLaurent Pinchart bool has_ro = false; 132715a0580cSDavid Brownell 132870d6027fSDavid Brownell /* We rely on full duplex transfers, mostly to reduce 132970d6027fSDavid Brownell * per-transfer overheads (by making fewer transfers). 133070d6027fSDavid Brownell */ 133170d6027fSDavid Brownell if (spi->master->flags & SPI_MASTER_HALF_DUPLEX) 133270d6027fSDavid Brownell return -EINVAL; 133370d6027fSDavid Brownell 133415a0580cSDavid Brownell /* MMC and SD specs only seem to care that sampling is on the 133515a0580cSDavid Brownell * rising edge ... meaning SPI modes 0 or 3. So either SPI mode 133648881caeSWolfgang Muees * should be legit. We'll use mode 0 since the steady state is 0, 133748881caeSWolfgang Muees * which is appropriate for hotplugging, unless the platform data 133848881caeSWolfgang Muees * specify mode 3 (if hardware is not compatible to mode 0). 133915a0580cSDavid Brownell */ 134048881caeSWolfgang Muees if (spi->mode != SPI_MODE_3) 134115a0580cSDavid Brownell spi->mode = SPI_MODE_0; 134215a0580cSDavid Brownell spi->bits_per_word = 8; 134315a0580cSDavid Brownell 134415a0580cSDavid Brownell status = spi_setup(spi); 134515a0580cSDavid Brownell if (status < 0) { 134615a0580cSDavid Brownell dev_dbg(&spi->dev, "needs SPI mode %02x, %d KHz; %d\n", 134715a0580cSDavid Brownell spi->mode, spi->max_speed_hz / 1000, 134815a0580cSDavid Brownell status); 134915a0580cSDavid Brownell return status; 135015a0580cSDavid Brownell } 135115a0580cSDavid Brownell 135215a0580cSDavid Brownell /* We need a supply of ones to transmit. This is the only time 135315a0580cSDavid Brownell * the CPU touches these, so cache coherency isn't a concern. 135415a0580cSDavid Brownell * 135515a0580cSDavid Brownell * NOTE if many systems use more than one MMC-over-SPI connector 135615a0580cSDavid Brownell * it'd save some memory to share this. That's evidently rare. 135715a0580cSDavid Brownell */ 135815a0580cSDavid Brownell status = -ENOMEM; 135915a0580cSDavid Brownell ones = kmalloc(MMC_SPI_BLOCKSIZE, GFP_KERNEL); 136015a0580cSDavid Brownell if (!ones) 136115a0580cSDavid Brownell goto nomem; 136215a0580cSDavid Brownell memset(ones, 0xff, MMC_SPI_BLOCKSIZE); 136315a0580cSDavid Brownell 136415a0580cSDavid Brownell mmc = mmc_alloc_host(sizeof(*host), &spi->dev); 136515a0580cSDavid Brownell if (!mmc) 136615a0580cSDavid Brownell goto nomem; 136715a0580cSDavid Brownell 136815a0580cSDavid Brownell mmc->ops = &mmc_spi_ops; 136915a0580cSDavid Brownell mmc->max_blk_size = MMC_SPI_BLOCKSIZE; 1370a36274e0SMartin K. Petersen mmc->max_segs = MMC_SPI_BLOCKSATONCE; 13715cf20aa5SWolfgang Muees mmc->max_req_size = MMC_SPI_BLOCKSATONCE * MMC_SPI_BLOCKSIZE; 13725cf20aa5SWolfgang Muees mmc->max_blk_count = MMC_SPI_BLOCKSATONCE; 137315a0580cSDavid Brownell 137423af6039SPierre Ossman mmc->caps = MMC_CAP_SPI; 137515a0580cSDavid Brownell 137615a0580cSDavid Brownell /* SPI doesn't need the lowspeed device identification thing for 137715a0580cSDavid Brownell * MMC or SD cards, since it never comes up in open drain mode. 137815a0580cSDavid Brownell * That's good; some SPI masters can't handle very low speeds! 137915a0580cSDavid Brownell * 138015a0580cSDavid Brownell * However, low speed SDIO cards need not handle over 400 KHz; 138115a0580cSDavid Brownell * that's the only reason not to use a few MHz for f_min (until 138215a0580cSDavid Brownell * the upper layer reads the target frequency from the CSD). 138315a0580cSDavid Brownell */ 138415a0580cSDavid Brownell mmc->f_min = 400000; 138515a0580cSDavid Brownell mmc->f_max = spi->max_speed_hz; 138615a0580cSDavid Brownell 138715a0580cSDavid Brownell host = mmc_priv(mmc); 138815a0580cSDavid Brownell host->mmc = mmc; 138915a0580cSDavid Brownell host->spi = spi; 139015a0580cSDavid Brownell 139115a0580cSDavid Brownell host->ones = ones; 139215a0580cSDavid Brownell 139315a0580cSDavid Brownell /* Platform data is used to hook up things like card sensing 139415a0580cSDavid Brownell * and power switching gpios. 139515a0580cSDavid Brownell */ 13969c43df57SAnton Vorontsov host->pdata = mmc_spi_get_pdata(spi); 139715a0580cSDavid Brownell if (host->pdata) 139815a0580cSDavid Brownell mmc->ocr_avail = host->pdata->ocr_mask; 139915a0580cSDavid Brownell if (!mmc->ocr_avail) { 140015a0580cSDavid Brownell dev_warn(&spi->dev, "ASSUMING 3.2-3.4 V slot power\n"); 140115a0580cSDavid Brownell mmc->ocr_avail = MMC_VDD_32_33|MMC_VDD_33_34; 140215a0580cSDavid Brownell } 140315a0580cSDavid Brownell if (host->pdata && host->pdata->setpower) { 140415a0580cSDavid Brownell host->powerup_msecs = host->pdata->powerup_msecs; 140515a0580cSDavid Brownell if (!host->powerup_msecs || host->powerup_msecs > 250) 140615a0580cSDavid Brownell host->powerup_msecs = 250; 140715a0580cSDavid Brownell } 140815a0580cSDavid Brownell 140915a0580cSDavid Brownell dev_set_drvdata(&spi->dev, mmc); 141015a0580cSDavid Brownell 141115a0580cSDavid Brownell /* preallocate dma buffers */ 141215a0580cSDavid Brownell host->data = kmalloc(sizeof(*host->data), GFP_KERNEL); 141315a0580cSDavid Brownell if (!host->data) 141415a0580cSDavid Brownell goto fail_nobuf1; 141515a0580cSDavid Brownell 141649dce689STony Jones if (spi->master->dev.parent->dma_mask) { 141749dce689STony Jones struct device *dev = spi->master->dev.parent; 141815a0580cSDavid Brownell 141915a0580cSDavid Brownell host->dma_dev = dev; 142015a0580cSDavid Brownell host->ones_dma = dma_map_single(dev, ones, 142115a0580cSDavid Brownell MMC_SPI_BLOCKSIZE, DMA_TO_DEVICE); 142215a0580cSDavid Brownell host->data_dma = dma_map_single(dev, host->data, 142315a0580cSDavid Brownell sizeof(*host->data), DMA_BIDIRECTIONAL); 142415a0580cSDavid Brownell 142515a0580cSDavid Brownell /* REVISIT in theory those map operations can fail... */ 142615a0580cSDavid Brownell 142715a0580cSDavid Brownell dma_sync_single_for_cpu(host->dma_dev, 142815a0580cSDavid Brownell host->data_dma, sizeof(*host->data), 142915a0580cSDavid Brownell DMA_BIDIRECTIONAL); 143015a0580cSDavid Brownell } 143115a0580cSDavid Brownell 143215a0580cSDavid Brownell /* setup message for status/busy readback */ 143315a0580cSDavid Brownell spi_message_init(&host->readback); 143415a0580cSDavid Brownell host->readback.is_dma_mapped = (host->dma_dev != NULL); 143515a0580cSDavid Brownell 143615a0580cSDavid Brownell spi_message_add_tail(&host->status, &host->readback); 143715a0580cSDavid Brownell host->status.tx_buf = host->ones; 143815a0580cSDavid Brownell host->status.tx_dma = host->ones_dma; 143915a0580cSDavid Brownell host->status.rx_buf = &host->data->status; 144015a0580cSDavid Brownell host->status.rx_dma = host->data_dma + offsetof(struct scratch, status); 144115a0580cSDavid Brownell host->status.cs_change = 1; 144215a0580cSDavid Brownell 144315a0580cSDavid Brownell /* register card detect irq */ 144415a0580cSDavid Brownell if (host->pdata && host->pdata->init) { 144515a0580cSDavid Brownell status = host->pdata->init(&spi->dev, mmc_spi_detect_irq, mmc); 144615a0580cSDavid Brownell if (status != 0) 144715a0580cSDavid Brownell goto fail_glue_init; 144815a0580cSDavid Brownell } 144915a0580cSDavid Brownell 1450619ef4b4SAnton Vorontsov /* pass platform capabilities, if any */ 1451bf287a90SLaurent Pinchart if (host->pdata) { 1452619ef4b4SAnton Vorontsov mmc->caps |= host->pdata->caps; 1453bf287a90SLaurent Pinchart mmc->caps2 |= host->pdata->caps2; 1454bf287a90SLaurent Pinchart } 1455619ef4b4SAnton Vorontsov 145615a0580cSDavid Brownell status = mmc_add_host(mmc); 145715a0580cSDavid Brownell if (status != 0) 145815a0580cSDavid Brownell goto fail_add_host; 145915a0580cSDavid Brownell 1460bf287a90SLaurent Pinchart if (host->pdata && host->pdata->flags & MMC_SPI_USE_CD_GPIO) { 1461bf287a90SLaurent Pinchart status = mmc_gpio_request_cd(mmc, host->pdata->cd_gpio, 1462bf287a90SLaurent Pinchart host->pdata->cd_debounce); 1463bf287a90SLaurent Pinchart if (status != 0) 1464bf287a90SLaurent Pinchart goto fail_add_host; 1465bf287a90SLaurent Pinchart } 1466bf287a90SLaurent Pinchart 1467bf287a90SLaurent Pinchart if (host->pdata && host->pdata->flags & MMC_SPI_USE_RO_GPIO) { 1468bf287a90SLaurent Pinchart has_ro = true; 1469bf287a90SLaurent Pinchart status = mmc_gpio_request_ro(mmc, host->pdata->ro_gpio); 1470bf287a90SLaurent Pinchart if (status != 0) 1471bf287a90SLaurent Pinchart goto fail_add_host; 1472bf287a90SLaurent Pinchart } 1473bf287a90SLaurent Pinchart 1474619ef4b4SAnton Vorontsov dev_info(&spi->dev, "SD/MMC host %s%s%s%s%s\n", 1475d1b26863SKay Sievers dev_name(&mmc->class_dev), 147615a0580cSDavid Brownell host->dma_dev ? "" : ", no DMA", 1477bf287a90SLaurent Pinchart has_ro ? "" : ", no WP", 147815a0580cSDavid Brownell (host->pdata && host->pdata->setpower) 1479619ef4b4SAnton Vorontsov ? "" : ", no poweroff", 1480619ef4b4SAnton Vorontsov (mmc->caps & MMC_CAP_NEEDS_POLL) 1481619ef4b4SAnton Vorontsov ? ", cd polling" : ""); 148215a0580cSDavid Brownell return 0; 148315a0580cSDavid Brownell 148415a0580cSDavid Brownell fail_add_host: 148515a0580cSDavid Brownell mmc_remove_host (mmc); 148615a0580cSDavid Brownell fail_glue_init: 148715a0580cSDavid Brownell if (host->dma_dev) 148815a0580cSDavid Brownell dma_unmap_single(host->dma_dev, host->data_dma, 148915a0580cSDavid Brownell sizeof(*host->data), DMA_BIDIRECTIONAL); 149015a0580cSDavid Brownell kfree(host->data); 149115a0580cSDavid Brownell 149215a0580cSDavid Brownell fail_nobuf1: 149315a0580cSDavid Brownell mmc_free_host(mmc); 14949c43df57SAnton Vorontsov mmc_spi_put_pdata(spi); 149515a0580cSDavid Brownell dev_set_drvdata(&spi->dev, NULL); 149615a0580cSDavid Brownell 149715a0580cSDavid Brownell nomem: 149815a0580cSDavid Brownell kfree(ones); 149915a0580cSDavid Brownell return status; 150015a0580cSDavid Brownell } 150115a0580cSDavid Brownell 150215a0580cSDavid Brownell 15036e0ee714SBill Pemberton static int mmc_spi_remove(struct spi_device *spi) 150415a0580cSDavid Brownell { 150515a0580cSDavid Brownell struct mmc_host *mmc = dev_get_drvdata(&spi->dev); 150615a0580cSDavid Brownell struct mmc_spi_host *host; 150715a0580cSDavid Brownell 150815a0580cSDavid Brownell if (mmc) { 150915a0580cSDavid Brownell host = mmc_priv(mmc); 151015a0580cSDavid Brownell 151115a0580cSDavid Brownell /* prevent new mmc_detect_change() calls */ 151215a0580cSDavid Brownell if (host->pdata && host->pdata->exit) 151315a0580cSDavid Brownell host->pdata->exit(&spi->dev, mmc); 151415a0580cSDavid Brownell 151515a0580cSDavid Brownell mmc_remove_host(mmc); 151615a0580cSDavid Brownell 151715a0580cSDavid Brownell if (host->dma_dev) { 151815a0580cSDavid Brownell dma_unmap_single(host->dma_dev, host->ones_dma, 151915a0580cSDavid Brownell MMC_SPI_BLOCKSIZE, DMA_TO_DEVICE); 152015a0580cSDavid Brownell dma_unmap_single(host->dma_dev, host->data_dma, 152115a0580cSDavid Brownell sizeof(*host->data), DMA_BIDIRECTIONAL); 152215a0580cSDavid Brownell } 152315a0580cSDavid Brownell 152415a0580cSDavid Brownell kfree(host->data); 152515a0580cSDavid Brownell kfree(host->ones); 152615a0580cSDavid Brownell 152715a0580cSDavid Brownell spi->max_speed_hz = mmc->f_max; 152815a0580cSDavid Brownell mmc_free_host(mmc); 15299c43df57SAnton Vorontsov mmc_spi_put_pdata(spi); 153015a0580cSDavid Brownell dev_set_drvdata(&spi->dev, NULL); 153115a0580cSDavid Brownell } 153215a0580cSDavid Brownell return 0; 153315a0580cSDavid Brownell } 153415a0580cSDavid Brownell 1535498d83e7SBill Pemberton static struct of_device_id mmc_spi_of_match_table[] = { 15362ffe8c5fSGrant Likely { .compatible = "mmc-spi-slot", }, 1537fbe0f834SAnton Vorontsov {}, 15382ffe8c5fSGrant Likely }; 153915a0580cSDavid Brownell 154015a0580cSDavid Brownell static struct spi_driver mmc_spi_driver = { 154115a0580cSDavid Brownell .driver = { 154215a0580cSDavid Brownell .name = "mmc_spi", 154315a0580cSDavid Brownell .owner = THIS_MODULE, 15442ffe8c5fSGrant Likely .of_match_table = mmc_spi_of_match_table, 154515a0580cSDavid Brownell }, 154615a0580cSDavid Brownell .probe = mmc_spi_probe, 15470433c143SBill Pemberton .remove = mmc_spi_remove, 154815a0580cSDavid Brownell }; 154915a0580cSDavid Brownell 15506f478825SSachin Kamat module_spi_driver(mmc_spi_driver); 155115a0580cSDavid Brownell 155215a0580cSDavid Brownell MODULE_AUTHOR("Mike Lavender, David Brownell, " 155315a0580cSDavid Brownell "Hans-Peter Nilsson, Jan Nikitenko"); 155415a0580cSDavid Brownell MODULE_DESCRIPTION("SPI SD/MMC host driver"); 155515a0580cSDavid Brownell MODULE_LICENSE("GPL"); 1556e0626e38SAnton Vorontsov MODULE_ALIAS("spi:mmc_spi"); 1557