115a0580cSDavid Brownell /* 215a0580cSDavid Brownell * mmc_spi.c - Access SD/MMC cards through SPI master controllers 315a0580cSDavid Brownell * 415a0580cSDavid Brownell * (C) Copyright 2005, Intec Automation, 515a0580cSDavid Brownell * Mike Lavender (mike@steroidmicros) 615a0580cSDavid Brownell * (C) Copyright 2006-2007, David Brownell 715a0580cSDavid Brownell * (C) Copyright 2007, Axis Communications, 815a0580cSDavid Brownell * Hans-Peter Nilsson (hp@axis.com) 915a0580cSDavid Brownell * (C) Copyright 2007, ATRON electronic GmbH, 1015a0580cSDavid Brownell * Jan Nikitenko <jan.nikitenko@gmail.com> 1115a0580cSDavid Brownell * 1215a0580cSDavid Brownell * 1315a0580cSDavid Brownell * This program is free software; you can redistribute it and/or modify 1415a0580cSDavid Brownell * it under the terms of the GNU General Public License as published by 1515a0580cSDavid Brownell * the Free Software Foundation; either version 2 of the License, or 1615a0580cSDavid Brownell * (at your option) any later version. 1715a0580cSDavid Brownell * 1815a0580cSDavid Brownell * This program is distributed in the hope that it will be useful, 1915a0580cSDavid Brownell * but WITHOUT ANY WARRANTY; without even the implied warranty of 2015a0580cSDavid Brownell * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 2115a0580cSDavid Brownell * GNU General Public License for more details. 2215a0580cSDavid Brownell * 2315a0580cSDavid Brownell * You should have received a copy of the GNU General Public License 2415a0580cSDavid Brownell * along with this program; if not, write to the Free Software 2515a0580cSDavid Brownell * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. 2615a0580cSDavid Brownell */ 2756e303ebSWolfgang Muees #include <linux/sched.h> 2815a0580cSDavid Brownell #include <linux/delay.h> 2923fd5045SDavid Brownell #include <linux/bio.h> 3015a0580cSDavid Brownell #include <linux/dma-mapping.h> 3115a0580cSDavid Brownell #include <linux/crc7.h> 3215a0580cSDavid Brownell #include <linux/crc-itu-t.h> 33e5712a6aSAl Viro #include <linux/scatterlist.h> 3415a0580cSDavid Brownell 3515a0580cSDavid Brownell #include <linux/mmc/host.h> 3615a0580cSDavid Brownell #include <linux/mmc/mmc.h> /* for R1_SPI_* bit values */ 3715a0580cSDavid Brownell 3815a0580cSDavid Brownell #include <linux/spi/spi.h> 3915a0580cSDavid Brownell #include <linux/spi/mmc_spi.h> 4015a0580cSDavid Brownell 4115a0580cSDavid Brownell #include <asm/unaligned.h> 4215a0580cSDavid Brownell 4315a0580cSDavid Brownell 4415a0580cSDavid Brownell /* NOTES: 4515a0580cSDavid Brownell * 4615a0580cSDavid Brownell * - For now, we won't try to interoperate with a real mmc/sd/sdio 4715a0580cSDavid Brownell * controller, although some of them do have hardware support for 4815a0580cSDavid Brownell * SPI protocol. The main reason for such configs would be mmc-ish 4915a0580cSDavid Brownell * cards like DataFlash, which don't support that "native" protocol. 5015a0580cSDavid Brownell * 5115a0580cSDavid Brownell * We don't have a "DataFlash/MMC/SD/SDIO card slot" abstraction to 5215a0580cSDavid Brownell * switch between driver stacks, and in any case if "native" mode 5315a0580cSDavid Brownell * is available, it will be faster and hence preferable. 5415a0580cSDavid Brownell * 5515a0580cSDavid Brownell * - MMC depends on a different chipselect management policy than the 5615a0580cSDavid Brownell * SPI interface currently supports for shared bus segments: it needs 5715a0580cSDavid Brownell * to issue multiple spi_message requests with the chipselect active, 5815a0580cSDavid Brownell * using the results of one message to decide the next one to issue. 5915a0580cSDavid Brownell * 6015a0580cSDavid Brownell * Pending updates to the programming interface, this driver expects 6115a0580cSDavid Brownell * that it not share the bus with other drivers (precluding conflicts). 6215a0580cSDavid Brownell * 6315a0580cSDavid Brownell * - We tell the controller to keep the chipselect active from the 6415a0580cSDavid Brownell * beginning of an mmc_host_ops.request until the end. So beware 6515a0580cSDavid Brownell * of SPI controller drivers that mis-handle the cs_change flag! 6615a0580cSDavid Brownell * 6715a0580cSDavid Brownell * However, many cards seem OK with chipselect flapping up/down 6815a0580cSDavid Brownell * during that time ... at least on unshared bus segments. 6915a0580cSDavid Brownell */ 7015a0580cSDavid Brownell 7115a0580cSDavid Brownell 7215a0580cSDavid Brownell /* 7315a0580cSDavid Brownell * Local protocol constants, internal to data block protocols. 7415a0580cSDavid Brownell */ 7515a0580cSDavid Brownell 7615a0580cSDavid Brownell /* Response tokens used to ack each block written: */ 7715a0580cSDavid Brownell #define SPI_MMC_RESPONSE_CODE(x) ((x) & 0x1f) 7815a0580cSDavid Brownell #define SPI_RESPONSE_ACCEPTED ((2 << 1)|1) 7915a0580cSDavid Brownell #define SPI_RESPONSE_CRC_ERR ((5 << 1)|1) 8015a0580cSDavid Brownell #define SPI_RESPONSE_WRITE_ERR ((6 << 1)|1) 8115a0580cSDavid Brownell 8215a0580cSDavid Brownell /* Read and write blocks start with these tokens and end with crc; 8315a0580cSDavid Brownell * on error, read tokens act like a subset of R2_SPI_* values. 8415a0580cSDavid Brownell */ 8515a0580cSDavid Brownell #define SPI_TOKEN_SINGLE 0xfe /* single block r/w, multiblock read */ 8615a0580cSDavid Brownell #define SPI_TOKEN_MULTI_WRITE 0xfc /* multiblock write */ 8715a0580cSDavid Brownell #define SPI_TOKEN_STOP_TRAN 0xfd /* terminate multiblock write */ 8815a0580cSDavid Brownell 8915a0580cSDavid Brownell #define MMC_SPI_BLOCKSIZE 512 9015a0580cSDavid Brownell 9115a0580cSDavid Brownell 9215a0580cSDavid Brownell /* These fixed timeouts come from the latest SD specs, which say to ignore 9315a0580cSDavid Brownell * the CSD values. The R1B value is for card erase (e.g. the "I forgot the 9415a0580cSDavid Brownell * card's password" scenario); it's mostly applied to STOP_TRANSMISSION after 9515a0580cSDavid Brownell * reads which takes nowhere near that long. Older cards may be able to use 9615a0580cSDavid Brownell * shorter timeouts ... but why bother? 9715a0580cSDavid Brownell */ 9856e303ebSWolfgang Muees #define r1b_timeout (HZ * 3) 9915a0580cSDavid Brownell 10015a0580cSDavid Brownell 10115a0580cSDavid Brownell /****************************************************************************/ 10215a0580cSDavid Brownell 10315a0580cSDavid Brownell /* 10415a0580cSDavid Brownell * Local Data Structures 10515a0580cSDavid Brownell */ 10615a0580cSDavid Brownell 10715a0580cSDavid Brownell /* "scratch" is per-{command,block} data exchanged with the card */ 10815a0580cSDavid Brownell struct scratch { 10915a0580cSDavid Brownell u8 status[29]; 11015a0580cSDavid Brownell u8 data_token; 11115a0580cSDavid Brownell __be16 crc_val; 11215a0580cSDavid Brownell }; 11315a0580cSDavid Brownell 11415a0580cSDavid Brownell struct mmc_spi_host { 11515a0580cSDavid Brownell struct mmc_host *mmc; 11615a0580cSDavid Brownell struct spi_device *spi; 11715a0580cSDavid Brownell 11815a0580cSDavid Brownell unsigned char power_mode; 11915a0580cSDavid Brownell u16 powerup_msecs; 12015a0580cSDavid Brownell 12115a0580cSDavid Brownell struct mmc_spi_platform_data *pdata; 12215a0580cSDavid Brownell 12315a0580cSDavid Brownell /* for bulk data transfers */ 12415a0580cSDavid Brownell struct spi_transfer token, t, crc, early_status; 12515a0580cSDavid Brownell struct spi_message m; 12615a0580cSDavid Brownell 12715a0580cSDavid Brownell /* for status readback */ 12815a0580cSDavid Brownell struct spi_transfer status; 12915a0580cSDavid Brownell struct spi_message readback; 13015a0580cSDavid Brownell 13115a0580cSDavid Brownell /* underlying DMA-aware controller, or null */ 13215a0580cSDavid Brownell struct device *dma_dev; 13315a0580cSDavid Brownell 13415a0580cSDavid Brownell /* buffer used for commands and for message "overhead" */ 13515a0580cSDavid Brownell struct scratch *data; 13615a0580cSDavid Brownell dma_addr_t data_dma; 13715a0580cSDavid Brownell 13815a0580cSDavid Brownell /* Specs say to write ones most of the time, even when the card 13915a0580cSDavid Brownell * has no need to read its input data; and many cards won't care. 14015a0580cSDavid Brownell * This is our source of those ones. 14115a0580cSDavid Brownell */ 14215a0580cSDavid Brownell void *ones; 14315a0580cSDavid Brownell dma_addr_t ones_dma; 14415a0580cSDavid Brownell }; 14515a0580cSDavid Brownell 14615a0580cSDavid Brownell 14715a0580cSDavid Brownell /****************************************************************************/ 14815a0580cSDavid Brownell 14915a0580cSDavid Brownell /* 15015a0580cSDavid Brownell * MMC-over-SPI protocol glue, used by the MMC stack interface 15115a0580cSDavid Brownell */ 15215a0580cSDavid Brownell 15315a0580cSDavid Brownell static inline int mmc_cs_off(struct mmc_spi_host *host) 15415a0580cSDavid Brownell { 15515a0580cSDavid Brownell /* chipselect will always be inactive after setup() */ 15615a0580cSDavid Brownell return spi_setup(host->spi); 15715a0580cSDavid Brownell } 15815a0580cSDavid Brownell 15915a0580cSDavid Brownell static int 16015a0580cSDavid Brownell mmc_spi_readbytes(struct mmc_spi_host *host, unsigned len) 16115a0580cSDavid Brownell { 16215a0580cSDavid Brownell int status; 16315a0580cSDavid Brownell 16415a0580cSDavid Brownell if (len > sizeof(*host->data)) { 16515a0580cSDavid Brownell WARN_ON(1); 16615a0580cSDavid Brownell return -EIO; 16715a0580cSDavid Brownell } 16815a0580cSDavid Brownell 16915a0580cSDavid Brownell host->status.len = len; 17015a0580cSDavid Brownell 17115a0580cSDavid Brownell if (host->dma_dev) 17215a0580cSDavid Brownell dma_sync_single_for_device(host->dma_dev, 17315a0580cSDavid Brownell host->data_dma, sizeof(*host->data), 17415a0580cSDavid Brownell DMA_FROM_DEVICE); 17515a0580cSDavid Brownell 17615a0580cSDavid Brownell status = spi_sync(host->spi, &host->readback); 17715a0580cSDavid Brownell 17815a0580cSDavid Brownell if (host->dma_dev) 17915a0580cSDavid Brownell dma_sync_single_for_cpu(host->dma_dev, 18015a0580cSDavid Brownell host->data_dma, sizeof(*host->data), 18115a0580cSDavid Brownell DMA_FROM_DEVICE); 18215a0580cSDavid Brownell 18315a0580cSDavid Brownell return status; 18415a0580cSDavid Brownell } 18515a0580cSDavid Brownell 18656e303ebSWolfgang Muees static int mmc_spi_skip(struct mmc_spi_host *host, unsigned long timeout, 18756e303ebSWolfgang Muees unsigned n, u8 byte) 18815a0580cSDavid Brownell { 18915a0580cSDavid Brownell u8 *cp = host->data->status; 19056e303ebSWolfgang Muees unsigned long start = jiffies; 19115a0580cSDavid Brownell 19215a0580cSDavid Brownell while (1) { 19315a0580cSDavid Brownell int status; 19415a0580cSDavid Brownell unsigned i; 19515a0580cSDavid Brownell 19615a0580cSDavid Brownell status = mmc_spi_readbytes(host, n); 19715a0580cSDavid Brownell if (status < 0) 19815a0580cSDavid Brownell return status; 19915a0580cSDavid Brownell 20015a0580cSDavid Brownell for (i = 0; i < n; i++) { 20115a0580cSDavid Brownell if (cp[i] != byte) 20215a0580cSDavid Brownell return cp[i]; 20315a0580cSDavid Brownell } 20415a0580cSDavid Brownell 20556e303ebSWolfgang Muees if (time_is_before_jiffies(start + timeout)) 20615a0580cSDavid Brownell break; 20756e303ebSWolfgang Muees 20856e303ebSWolfgang Muees /* If we need long timeouts, we may release the CPU. 20956e303ebSWolfgang Muees * We use jiffies here because we want to have a relation 21056e303ebSWolfgang Muees * between elapsed time and the blocking of the scheduler. 21156e303ebSWolfgang Muees */ 21256e303ebSWolfgang Muees if (time_is_before_jiffies(start+1)) 21356e303ebSWolfgang Muees schedule(); 21415a0580cSDavid Brownell } 21515a0580cSDavid Brownell return -ETIMEDOUT; 21615a0580cSDavid Brownell } 21715a0580cSDavid Brownell 21815a0580cSDavid Brownell static inline int 21956e303ebSWolfgang Muees mmc_spi_wait_unbusy(struct mmc_spi_host *host, unsigned long timeout) 22015a0580cSDavid Brownell { 22115a0580cSDavid Brownell return mmc_spi_skip(host, timeout, sizeof(host->data->status), 0); 22215a0580cSDavid Brownell } 22315a0580cSDavid Brownell 22456e303ebSWolfgang Muees static int mmc_spi_readtoken(struct mmc_spi_host *host, unsigned long timeout) 22515a0580cSDavid Brownell { 226162350ebSMatthew Fleming return mmc_spi_skip(host, timeout, 1, 0xff); 22715a0580cSDavid Brownell } 22815a0580cSDavid Brownell 22915a0580cSDavid Brownell 23015a0580cSDavid Brownell /* 23115a0580cSDavid Brownell * Note that for SPI, cmd->resp[0] is not the same data as "native" protocol 23215a0580cSDavid Brownell * hosts return! The low byte holds R1_SPI bits. The next byte may hold 23315a0580cSDavid Brownell * R2_SPI bits ... for SEND_STATUS, or after data read errors. 23415a0580cSDavid Brownell * 23515a0580cSDavid Brownell * cmd->resp[1] holds any four-byte response, for R3 (READ_OCR) and on 23615a0580cSDavid Brownell * newer cards R7 (IF_COND). 23715a0580cSDavid Brownell */ 23815a0580cSDavid Brownell 23915a0580cSDavid Brownell static char *maptype(struct mmc_command *cmd) 24015a0580cSDavid Brownell { 24115a0580cSDavid Brownell switch (mmc_spi_resp_type(cmd)) { 24215a0580cSDavid Brownell case MMC_RSP_SPI_R1: return "R1"; 24315a0580cSDavid Brownell case MMC_RSP_SPI_R1B: return "R1B"; 24415a0580cSDavid Brownell case MMC_RSP_SPI_R2: return "R2/R5"; 24515a0580cSDavid Brownell case MMC_RSP_SPI_R3: return "R3/R4/R7"; 24615a0580cSDavid Brownell default: return "?"; 24715a0580cSDavid Brownell } 24815a0580cSDavid Brownell } 24915a0580cSDavid Brownell 25015a0580cSDavid Brownell /* return zero, else negative errno after setting cmd->error */ 25115a0580cSDavid Brownell static int mmc_spi_response_get(struct mmc_spi_host *host, 25215a0580cSDavid Brownell struct mmc_command *cmd, int cs_on) 25315a0580cSDavid Brownell { 25415a0580cSDavid Brownell u8 *cp = host->data->status; 25515a0580cSDavid Brownell u8 *end = cp + host->t.len; 25615a0580cSDavid Brownell int value = 0; 257ab5a643cSWolfgang Muees int bitshift; 258ab5a643cSWolfgang Muees u8 leftover = 0; 259ab5a643cSWolfgang Muees unsigned short rotator; 260ab5a643cSWolfgang Muees int i; 26115a0580cSDavid Brownell char tag[32]; 26215a0580cSDavid Brownell 26315a0580cSDavid Brownell snprintf(tag, sizeof(tag), " ... CMD%d response SPI_%s", 26415a0580cSDavid Brownell cmd->opcode, maptype(cmd)); 26515a0580cSDavid Brownell 26615a0580cSDavid Brownell /* Except for data block reads, the whole response will already 26715a0580cSDavid Brownell * be stored in the scratch buffer. It's somewhere after the 26815a0580cSDavid Brownell * command and the first byte we read after it. We ignore that 26915a0580cSDavid Brownell * first byte. After STOP_TRANSMISSION command it may include 27015a0580cSDavid Brownell * two data bits, but otherwise it's all ones. 27115a0580cSDavid Brownell */ 27215a0580cSDavid Brownell cp += 8; 27315a0580cSDavid Brownell while (cp < end && *cp == 0xff) 27415a0580cSDavid Brownell cp++; 27515a0580cSDavid Brownell 27615a0580cSDavid Brownell /* Data block reads (R1 response types) may need more data... */ 27715a0580cSDavid Brownell if (cp == end) { 27815a0580cSDavid Brownell cp = host->data->status; 279ab5a643cSWolfgang Muees end = cp+1; 28015a0580cSDavid Brownell 28115a0580cSDavid Brownell /* Card sends N(CR) (== 1..8) bytes of all-ones then one 28215a0580cSDavid Brownell * status byte ... and we already scanned 2 bytes. 28315a0580cSDavid Brownell * 28415a0580cSDavid Brownell * REVISIT block read paths use nasty byte-at-a-time I/O 28515a0580cSDavid Brownell * so it can always DMA directly into the target buffer. 28615a0580cSDavid Brownell * It'd probably be better to memcpy() the first chunk and 28715a0580cSDavid Brownell * avoid extra i/o calls... 288ea15ba5cSWolfgang Muees * 289ea15ba5cSWolfgang Muees * Note we check for more than 8 bytes, because in practice, 290ea15ba5cSWolfgang Muees * some SD cards are slow... 29115a0580cSDavid Brownell */ 292ea15ba5cSWolfgang Muees for (i = 2; i < 16; i++) { 29315a0580cSDavid Brownell value = mmc_spi_readbytes(host, 1); 29415a0580cSDavid Brownell if (value < 0) 29515a0580cSDavid Brownell goto done; 29615a0580cSDavid Brownell if (*cp != 0xff) 29715a0580cSDavid Brownell goto checkstatus; 29815a0580cSDavid Brownell } 29915a0580cSDavid Brownell value = -ETIMEDOUT; 30015a0580cSDavid Brownell goto done; 30115a0580cSDavid Brownell } 30215a0580cSDavid Brownell 30315a0580cSDavid Brownell checkstatus: 304ab5a643cSWolfgang Muees bitshift = 0; 30515a0580cSDavid Brownell if (*cp & 0x80) { 306ab5a643cSWolfgang Muees /* Houston, we have an ugly card with a bit-shifted response */ 307ab5a643cSWolfgang Muees rotator = *cp++ << 8; 308ab5a643cSWolfgang Muees /* read the next byte */ 309ab5a643cSWolfgang Muees if (cp == end) { 310ab5a643cSWolfgang Muees value = mmc_spi_readbytes(host, 1); 311ab5a643cSWolfgang Muees if (value < 0) 31215a0580cSDavid Brownell goto done; 313ab5a643cSWolfgang Muees cp = host->data->status; 314ab5a643cSWolfgang Muees end = cp+1; 31515a0580cSDavid Brownell } 316ab5a643cSWolfgang Muees rotator |= *cp++; 317ab5a643cSWolfgang Muees while (rotator & 0x8000) { 318ab5a643cSWolfgang Muees bitshift++; 319ab5a643cSWolfgang Muees rotator <<= 1; 320ab5a643cSWolfgang Muees } 321ab5a643cSWolfgang Muees cmd->resp[0] = rotator >> 8; 322ab5a643cSWolfgang Muees leftover = rotator; 323ab5a643cSWolfgang Muees } else { 32415a0580cSDavid Brownell cmd->resp[0] = *cp++; 325ab5a643cSWolfgang Muees } 32615a0580cSDavid Brownell cmd->error = 0; 32715a0580cSDavid Brownell 32815a0580cSDavid Brownell /* Status byte: the entire seven-bit R1 response. */ 32915a0580cSDavid Brownell if (cmd->resp[0] != 0) { 33015a0580cSDavid Brownell if ((R1_SPI_PARAMETER | R1_SPI_ADDRESS 33115a0580cSDavid Brownell | R1_SPI_ILLEGAL_COMMAND) 33215a0580cSDavid Brownell & cmd->resp[0]) 33315a0580cSDavid Brownell value = -EINVAL; 33415a0580cSDavid Brownell else if (R1_SPI_COM_CRC & cmd->resp[0]) 33515a0580cSDavid Brownell value = -EILSEQ; 33615a0580cSDavid Brownell else if ((R1_SPI_ERASE_SEQ | R1_SPI_ERASE_RESET) 33715a0580cSDavid Brownell & cmd->resp[0]) 33815a0580cSDavid Brownell value = -EIO; 33915a0580cSDavid Brownell /* else R1_SPI_IDLE, "it's resetting" */ 34015a0580cSDavid Brownell } 34115a0580cSDavid Brownell 34215a0580cSDavid Brownell switch (mmc_spi_resp_type(cmd)) { 34315a0580cSDavid Brownell 34415a0580cSDavid Brownell /* SPI R1B == R1 + busy; STOP_TRANSMISSION (for multiblock reads) 34515a0580cSDavid Brownell * and less-common stuff like various erase operations. 34615a0580cSDavid Brownell */ 34715a0580cSDavid Brownell case MMC_RSP_SPI_R1B: 34815a0580cSDavid Brownell /* maybe we read all the busy tokens already */ 34915a0580cSDavid Brownell while (cp < end && *cp == 0) 35015a0580cSDavid Brownell cp++; 35115a0580cSDavid Brownell if (cp == end) 35215a0580cSDavid Brownell mmc_spi_wait_unbusy(host, r1b_timeout); 35315a0580cSDavid Brownell break; 35415a0580cSDavid Brownell 35515a0580cSDavid Brownell /* SPI R2 == R1 + second status byte; SEND_STATUS 35615a0580cSDavid Brownell * SPI R5 == R1 + data byte; IO_RW_DIRECT 35715a0580cSDavid Brownell */ 35815a0580cSDavid Brownell case MMC_RSP_SPI_R2: 359ab5a643cSWolfgang Muees /* read the next byte */ 360ab5a643cSWolfgang Muees if (cp == end) { 361ab5a643cSWolfgang Muees value = mmc_spi_readbytes(host, 1); 362ab5a643cSWolfgang Muees if (value < 0) 363ab5a643cSWolfgang Muees goto done; 364ab5a643cSWolfgang Muees cp = host->data->status; 365ab5a643cSWolfgang Muees end = cp+1; 366ab5a643cSWolfgang Muees } 367ab5a643cSWolfgang Muees if (bitshift) { 368ab5a643cSWolfgang Muees rotator = leftover << 8; 369ab5a643cSWolfgang Muees rotator |= *cp << bitshift; 370ab5a643cSWolfgang Muees cmd->resp[0] |= (rotator & 0xFF00); 371ab5a643cSWolfgang Muees } else { 37215a0580cSDavid Brownell cmd->resp[0] |= *cp << 8; 373ab5a643cSWolfgang Muees } 37415a0580cSDavid Brownell break; 37515a0580cSDavid Brownell 37615a0580cSDavid Brownell /* SPI R3, R4, or R7 == R1 + 4 bytes */ 37715a0580cSDavid Brownell case MMC_RSP_SPI_R3: 378ab5a643cSWolfgang Muees rotator = leftover << 8; 379ab5a643cSWolfgang Muees cmd->resp[1] = 0; 380ab5a643cSWolfgang Muees for (i = 0; i < 4; i++) { 381ab5a643cSWolfgang Muees cmd->resp[1] <<= 8; 382ab5a643cSWolfgang Muees /* read the next byte */ 383ab5a643cSWolfgang Muees if (cp == end) { 384ab5a643cSWolfgang Muees value = mmc_spi_readbytes(host, 1); 385ab5a643cSWolfgang Muees if (value < 0) 386ab5a643cSWolfgang Muees goto done; 387ab5a643cSWolfgang Muees cp = host->data->status; 388ab5a643cSWolfgang Muees end = cp+1; 389ab5a643cSWolfgang Muees } 390ab5a643cSWolfgang Muees if (bitshift) { 391ab5a643cSWolfgang Muees rotator |= *cp++ << bitshift; 392ab5a643cSWolfgang Muees cmd->resp[1] |= (rotator >> 8); 393ab5a643cSWolfgang Muees rotator <<= 8; 394ab5a643cSWolfgang Muees } else { 395ab5a643cSWolfgang Muees cmd->resp[1] |= *cp++; 396ab5a643cSWolfgang Muees } 397ab5a643cSWolfgang Muees } 39815a0580cSDavid Brownell break; 39915a0580cSDavid Brownell 40015a0580cSDavid Brownell /* SPI R1 == just one status byte */ 40115a0580cSDavid Brownell case MMC_RSP_SPI_R1: 40215a0580cSDavid Brownell break; 40315a0580cSDavid Brownell 40415a0580cSDavid Brownell default: 40515a0580cSDavid Brownell dev_dbg(&host->spi->dev, "bad response type %04x\n", 40615a0580cSDavid Brownell mmc_spi_resp_type(cmd)); 40715a0580cSDavid Brownell if (value >= 0) 40815a0580cSDavid Brownell value = -EINVAL; 40915a0580cSDavid Brownell goto done; 41015a0580cSDavid Brownell } 41115a0580cSDavid Brownell 41215a0580cSDavid Brownell if (value < 0) 41315a0580cSDavid Brownell dev_dbg(&host->spi->dev, "%s: resp %04x %08x\n", 41415a0580cSDavid Brownell tag, cmd->resp[0], cmd->resp[1]); 41515a0580cSDavid Brownell 41615a0580cSDavid Brownell /* disable chipselect on errors and some success cases */ 41715a0580cSDavid Brownell if (value >= 0 && cs_on) 41815a0580cSDavid Brownell return value; 41915a0580cSDavid Brownell done: 42015a0580cSDavid Brownell if (value < 0) 42115a0580cSDavid Brownell cmd->error = value; 42215a0580cSDavid Brownell mmc_cs_off(host); 42315a0580cSDavid Brownell return value; 42415a0580cSDavid Brownell } 42515a0580cSDavid Brownell 42615a0580cSDavid Brownell /* Issue command and read its response. 42715a0580cSDavid Brownell * Returns zero on success, negative for error. 42815a0580cSDavid Brownell * 42915a0580cSDavid Brownell * On error, caller must cope with mmc core retry mechanism. That 43015a0580cSDavid Brownell * means immediate low-level resubmit, which affects the bus lock... 43115a0580cSDavid Brownell */ 43215a0580cSDavid Brownell static int 43315a0580cSDavid Brownell mmc_spi_command_send(struct mmc_spi_host *host, 43415a0580cSDavid Brownell struct mmc_request *mrq, 43515a0580cSDavid Brownell struct mmc_command *cmd, int cs_on) 43615a0580cSDavid Brownell { 43715a0580cSDavid Brownell struct scratch *data = host->data; 43815a0580cSDavid Brownell u8 *cp = data->status; 43915a0580cSDavid Brownell u32 arg = cmd->arg; 44015a0580cSDavid Brownell int status; 44115a0580cSDavid Brownell struct spi_transfer *t; 44215a0580cSDavid Brownell 44315a0580cSDavid Brownell /* We can handle most commands (except block reads) in one full 44415a0580cSDavid Brownell * duplex I/O operation before either starting the next transfer 44515a0580cSDavid Brownell * (data block or command) or else deselecting the card. 44615a0580cSDavid Brownell * 44715a0580cSDavid Brownell * First, write 7 bytes: 44815a0580cSDavid Brownell * - an all-ones byte to ensure the card is ready 44915a0580cSDavid Brownell * - opcode byte (plus start and transmission bits) 45015a0580cSDavid Brownell * - four bytes of big-endian argument 45115a0580cSDavid Brownell * - crc7 (plus end bit) ... always computed, it's cheap 45215a0580cSDavid Brownell * 45315a0580cSDavid Brownell * We init the whole buffer to all-ones, which is what we need 45415a0580cSDavid Brownell * to write while we're reading (later) response data. 45515a0580cSDavid Brownell */ 45615a0580cSDavid Brownell memset(cp++, 0xff, sizeof(data->status)); 45715a0580cSDavid Brownell 45815a0580cSDavid Brownell *cp++ = 0x40 | cmd->opcode; 45915a0580cSDavid Brownell *cp++ = (u8)(arg >> 24); 46015a0580cSDavid Brownell *cp++ = (u8)(arg >> 16); 46115a0580cSDavid Brownell *cp++ = (u8)(arg >> 8); 46215a0580cSDavid Brownell *cp++ = (u8)arg; 46315a0580cSDavid Brownell *cp++ = (crc7(0, &data->status[1], 5) << 1) | 0x01; 46415a0580cSDavid Brownell 46515a0580cSDavid Brownell /* Then, read up to 13 bytes (while writing all-ones): 46615a0580cSDavid Brownell * - N(CR) (== 1..8) bytes of all-ones 46715a0580cSDavid Brownell * - status byte (for all response types) 46815a0580cSDavid Brownell * - the rest of the response, either: 46915a0580cSDavid Brownell * + nothing, for R1 or R1B responses 47015a0580cSDavid Brownell * + second status byte, for R2 responses 47115a0580cSDavid Brownell * + four data bytes, for R3 and R7 responses 47215a0580cSDavid Brownell * 47315a0580cSDavid Brownell * Finally, read some more bytes ... in the nice cases we know in 47415a0580cSDavid Brownell * advance how many, and reading 1 more is always OK: 47515a0580cSDavid Brownell * - N(EC) (== 0..N) bytes of all-ones, before deselect/finish 47615a0580cSDavid Brownell * - N(RC) (== 1..N) bytes of all-ones, before next command 47715a0580cSDavid Brownell * - N(WR) (== 1..N) bytes of all-ones, before data write 47815a0580cSDavid Brownell * 47915a0580cSDavid Brownell * So in those cases one full duplex I/O of at most 21 bytes will 48015a0580cSDavid Brownell * handle the whole command, leaving the card ready to receive a 48115a0580cSDavid Brownell * data block or new command. We do that whenever we can, shaving 48215a0580cSDavid Brownell * CPU and IRQ costs (especially when using DMA or FIFOs). 48315a0580cSDavid Brownell * 48415a0580cSDavid Brownell * There are two other cases, where it's not generally practical 48515a0580cSDavid Brownell * to rely on a single I/O: 48615a0580cSDavid Brownell * 48715a0580cSDavid Brownell * - R1B responses need at least N(EC) bytes of all-zeroes. 48815a0580cSDavid Brownell * 48915a0580cSDavid Brownell * In this case we can *try* to fit it into one I/O, then 49015a0580cSDavid Brownell * maybe read more data later. 49115a0580cSDavid Brownell * 49215a0580cSDavid Brownell * - Data block reads are more troublesome, since a variable 49315a0580cSDavid Brownell * number of padding bytes precede the token and data. 49415a0580cSDavid Brownell * + N(CX) (== 0..8) bytes of all-ones, before CSD or CID 49515a0580cSDavid Brownell * + N(AC) (== 1..many) bytes of all-ones 49615a0580cSDavid Brownell * 49715a0580cSDavid Brownell * In this case we currently only have minimal speedups here: 49815a0580cSDavid Brownell * when N(CR) == 1 we can avoid I/O in response_get(). 49915a0580cSDavid Brownell */ 50015a0580cSDavid Brownell if (cs_on && (mrq->data->flags & MMC_DATA_READ)) { 50115a0580cSDavid Brownell cp += 2; /* min(N(CR)) + status */ 50215a0580cSDavid Brownell /* R1 */ 50315a0580cSDavid Brownell } else { 50415a0580cSDavid Brownell cp += 10; /* max(N(CR)) + status + min(N(RC),N(WR)) */ 50515a0580cSDavid Brownell if (cmd->flags & MMC_RSP_SPI_S2) /* R2/R5 */ 50615a0580cSDavid Brownell cp++; 50715a0580cSDavid Brownell else if (cmd->flags & MMC_RSP_SPI_B4) /* R3/R4/R7 */ 50815a0580cSDavid Brownell cp += 4; 50915a0580cSDavid Brownell else if (cmd->flags & MMC_RSP_BUSY) /* R1B */ 51015a0580cSDavid Brownell cp = data->status + sizeof(data->status); 51115a0580cSDavid Brownell /* else: R1 (most commands) */ 51215a0580cSDavid Brownell } 51315a0580cSDavid Brownell 51415a0580cSDavid Brownell dev_dbg(&host->spi->dev, " mmc_spi: CMD%d, resp %s\n", 51515a0580cSDavid Brownell cmd->opcode, maptype(cmd)); 51615a0580cSDavid Brownell 51715a0580cSDavid Brownell /* send command, leaving chipselect active */ 51815a0580cSDavid Brownell spi_message_init(&host->m); 51915a0580cSDavid Brownell 52015a0580cSDavid Brownell t = &host->t; 52115a0580cSDavid Brownell memset(t, 0, sizeof(*t)); 52215a0580cSDavid Brownell t->tx_buf = t->rx_buf = data->status; 52315a0580cSDavid Brownell t->tx_dma = t->rx_dma = host->data_dma; 52415a0580cSDavid Brownell t->len = cp - data->status; 52515a0580cSDavid Brownell t->cs_change = 1; 52615a0580cSDavid Brownell spi_message_add_tail(t, &host->m); 52715a0580cSDavid Brownell 52815a0580cSDavid Brownell if (host->dma_dev) { 52915a0580cSDavid Brownell host->m.is_dma_mapped = 1; 53015a0580cSDavid Brownell dma_sync_single_for_device(host->dma_dev, 53115a0580cSDavid Brownell host->data_dma, sizeof(*host->data), 53215a0580cSDavid Brownell DMA_BIDIRECTIONAL); 53315a0580cSDavid Brownell } 53415a0580cSDavid Brownell status = spi_sync(host->spi, &host->m); 53515a0580cSDavid Brownell 53615a0580cSDavid Brownell if (host->dma_dev) 53715a0580cSDavid Brownell dma_sync_single_for_cpu(host->dma_dev, 53815a0580cSDavid Brownell host->data_dma, sizeof(*host->data), 53915a0580cSDavid Brownell DMA_BIDIRECTIONAL); 54015a0580cSDavid Brownell if (status < 0) { 54115a0580cSDavid Brownell dev_dbg(&host->spi->dev, " ... write returned %d\n", status); 54215a0580cSDavid Brownell cmd->error = status; 54315a0580cSDavid Brownell return status; 54415a0580cSDavid Brownell } 54515a0580cSDavid Brownell 54615a0580cSDavid Brownell /* after no-data commands and STOP_TRANSMISSION, chipselect off */ 54715a0580cSDavid Brownell return mmc_spi_response_get(host, cmd, cs_on); 54815a0580cSDavid Brownell } 54915a0580cSDavid Brownell 55015a0580cSDavid Brownell /* Build data message with up to four separate transfers. For TX, we 55115a0580cSDavid Brownell * start by writing the data token. And in most cases, we finish with 55215a0580cSDavid Brownell * a status transfer. 55315a0580cSDavid Brownell * 55415a0580cSDavid Brownell * We always provide TX data for data and CRC. The MMC/SD protocol 55515a0580cSDavid Brownell * requires us to write ones; but Linux defaults to writing zeroes; 55615a0580cSDavid Brownell * so we explicitly initialize it to all ones on RX paths. 55715a0580cSDavid Brownell * 55815a0580cSDavid Brownell * We also handle DMA mapping, so the underlying SPI controller does 55915a0580cSDavid Brownell * not need to (re)do it for each message. 56015a0580cSDavid Brownell */ 56115a0580cSDavid Brownell static void 56215a0580cSDavid Brownell mmc_spi_setup_data_message( 56315a0580cSDavid Brownell struct mmc_spi_host *host, 56415a0580cSDavid Brownell int multiple, 56515a0580cSDavid Brownell enum dma_data_direction direction) 56615a0580cSDavid Brownell { 56715a0580cSDavid Brownell struct spi_transfer *t; 56815a0580cSDavid Brownell struct scratch *scratch = host->data; 56915a0580cSDavid Brownell dma_addr_t dma = host->data_dma; 57015a0580cSDavid Brownell 57115a0580cSDavid Brownell spi_message_init(&host->m); 57215a0580cSDavid Brownell if (dma) 57315a0580cSDavid Brownell host->m.is_dma_mapped = 1; 57415a0580cSDavid Brownell 57515a0580cSDavid Brownell /* for reads, readblock() skips 0xff bytes before finding 57615a0580cSDavid Brownell * the token; for writes, this transfer issues that token. 57715a0580cSDavid Brownell */ 57815a0580cSDavid Brownell if (direction == DMA_TO_DEVICE) { 57915a0580cSDavid Brownell t = &host->token; 58015a0580cSDavid Brownell memset(t, 0, sizeof(*t)); 58115a0580cSDavid Brownell t->len = 1; 58215a0580cSDavid Brownell if (multiple) 58315a0580cSDavid Brownell scratch->data_token = SPI_TOKEN_MULTI_WRITE; 58415a0580cSDavid Brownell else 58515a0580cSDavid Brownell scratch->data_token = SPI_TOKEN_SINGLE; 58615a0580cSDavid Brownell t->tx_buf = &scratch->data_token; 58715a0580cSDavid Brownell if (dma) 58815a0580cSDavid Brownell t->tx_dma = dma + offsetof(struct scratch, data_token); 58915a0580cSDavid Brownell spi_message_add_tail(t, &host->m); 59015a0580cSDavid Brownell } 59115a0580cSDavid Brownell 59215a0580cSDavid Brownell /* Body of transfer is buffer, then CRC ... 59315a0580cSDavid Brownell * either TX-only, or RX with TX-ones. 59415a0580cSDavid Brownell */ 59515a0580cSDavid Brownell t = &host->t; 59615a0580cSDavid Brownell memset(t, 0, sizeof(*t)); 59715a0580cSDavid Brownell t->tx_buf = host->ones; 59815a0580cSDavid Brownell t->tx_dma = host->ones_dma; 59915a0580cSDavid Brownell /* length and actual buffer info are written later */ 60015a0580cSDavid Brownell spi_message_add_tail(t, &host->m); 60115a0580cSDavid Brownell 60215a0580cSDavid Brownell t = &host->crc; 60315a0580cSDavid Brownell memset(t, 0, sizeof(*t)); 60415a0580cSDavid Brownell t->len = 2; 60515a0580cSDavid Brownell if (direction == DMA_TO_DEVICE) { 60615a0580cSDavid Brownell /* the actual CRC may get written later */ 60715a0580cSDavid Brownell t->tx_buf = &scratch->crc_val; 60815a0580cSDavid Brownell if (dma) 60915a0580cSDavid Brownell t->tx_dma = dma + offsetof(struct scratch, crc_val); 61015a0580cSDavid Brownell } else { 61115a0580cSDavid Brownell t->tx_buf = host->ones; 61215a0580cSDavid Brownell t->tx_dma = host->ones_dma; 61315a0580cSDavid Brownell t->rx_buf = &scratch->crc_val; 61415a0580cSDavid Brownell if (dma) 61515a0580cSDavid Brownell t->rx_dma = dma + offsetof(struct scratch, crc_val); 61615a0580cSDavid Brownell } 61715a0580cSDavid Brownell spi_message_add_tail(t, &host->m); 61815a0580cSDavid Brownell 61915a0580cSDavid Brownell /* 62015a0580cSDavid Brownell * A single block read is followed by N(EC) [0+] all-ones bytes 62115a0580cSDavid Brownell * before deselect ... don't bother. 62215a0580cSDavid Brownell * 62315a0580cSDavid Brownell * Multiblock reads are followed by N(AC) [1+] all-ones bytes before 62415a0580cSDavid Brownell * the next block is read, or a STOP_TRANSMISSION is issued. We'll 62515a0580cSDavid Brownell * collect that single byte, so readblock() doesn't need to. 62615a0580cSDavid Brownell * 62715a0580cSDavid Brownell * For a write, the one-byte data response follows immediately, then 62815a0580cSDavid Brownell * come zero or more busy bytes, then N(WR) [1+] all-ones bytes. 62915a0580cSDavid Brownell * Then single block reads may deselect, and multiblock ones issue 63015a0580cSDavid Brownell * the next token (next data block, or STOP_TRAN). We can try to 63115a0580cSDavid Brownell * minimize I/O ops by using a single read to collect end-of-busy. 63215a0580cSDavid Brownell */ 63315a0580cSDavid Brownell if (multiple || direction == DMA_TO_DEVICE) { 63415a0580cSDavid Brownell t = &host->early_status; 63515a0580cSDavid Brownell memset(t, 0, sizeof(*t)); 63615a0580cSDavid Brownell t->len = (direction == DMA_TO_DEVICE) 63715a0580cSDavid Brownell ? sizeof(scratch->status) 63815a0580cSDavid Brownell : 1; 63915a0580cSDavid Brownell t->tx_buf = host->ones; 64015a0580cSDavid Brownell t->tx_dma = host->ones_dma; 64115a0580cSDavid Brownell t->rx_buf = scratch->status; 64215a0580cSDavid Brownell if (dma) 64315a0580cSDavid Brownell t->rx_dma = dma + offsetof(struct scratch, status); 64415a0580cSDavid Brownell t->cs_change = 1; 64515a0580cSDavid Brownell spi_message_add_tail(t, &host->m); 64615a0580cSDavid Brownell } 64715a0580cSDavid Brownell } 64815a0580cSDavid Brownell 64915a0580cSDavid Brownell /* 65015a0580cSDavid Brownell * Write one block: 65115a0580cSDavid Brownell * - caller handled preceding N(WR) [1+] all-ones bytes 65215a0580cSDavid Brownell * - data block 65315a0580cSDavid Brownell * + token 65415a0580cSDavid Brownell * + data bytes 65515a0580cSDavid Brownell * + crc16 65615a0580cSDavid Brownell * - an all-ones byte ... card writes a data-response byte 65715a0580cSDavid Brownell * - followed by N(EC) [0+] all-ones bytes, card writes zero/'busy' 65815a0580cSDavid Brownell * 65915a0580cSDavid Brownell * Return negative errno, else success. 66015a0580cSDavid Brownell */ 66115a0580cSDavid Brownell static int 662162350ebSMatthew Fleming mmc_spi_writeblock(struct mmc_spi_host *host, struct spi_transfer *t, 66356e303ebSWolfgang Muees unsigned long timeout) 66415a0580cSDavid Brownell { 66515a0580cSDavid Brownell struct spi_device *spi = host->spi; 66615a0580cSDavid Brownell int status, i; 66715a0580cSDavid Brownell struct scratch *scratch = host->data; 668f079a8fcSWolfgang Muees u32 pattern; 66915a0580cSDavid Brownell 67015a0580cSDavid Brownell if (host->mmc->use_spi_crc) 67115a0580cSDavid Brownell scratch->crc_val = cpu_to_be16( 67215a0580cSDavid Brownell crc_itu_t(0, t->tx_buf, t->len)); 67315a0580cSDavid Brownell if (host->dma_dev) 67415a0580cSDavid Brownell dma_sync_single_for_device(host->dma_dev, 67515a0580cSDavid Brownell host->data_dma, sizeof(*scratch), 67615a0580cSDavid Brownell DMA_BIDIRECTIONAL); 67715a0580cSDavid Brownell 67815a0580cSDavid Brownell status = spi_sync(spi, &host->m); 67915a0580cSDavid Brownell 68015a0580cSDavid Brownell if (status != 0) { 68115a0580cSDavid Brownell dev_dbg(&spi->dev, "write error (%d)\n", status); 68215a0580cSDavid Brownell return status; 68315a0580cSDavid Brownell } 68415a0580cSDavid Brownell 68515a0580cSDavid Brownell if (host->dma_dev) 68615a0580cSDavid Brownell dma_sync_single_for_cpu(host->dma_dev, 68715a0580cSDavid Brownell host->data_dma, sizeof(*scratch), 68815a0580cSDavid Brownell DMA_BIDIRECTIONAL); 68915a0580cSDavid Brownell 69015a0580cSDavid Brownell /* 69115a0580cSDavid Brownell * Get the transmission data-response reply. It must follow 69215a0580cSDavid Brownell * immediately after the data block we transferred. This reply 69315a0580cSDavid Brownell * doesn't necessarily tell whether the write operation succeeded; 69415a0580cSDavid Brownell * it just says if the transmission was ok and whether *earlier* 69515a0580cSDavid Brownell * writes succeeded; see the standard. 696f079a8fcSWolfgang Muees * 697f079a8fcSWolfgang Muees * In practice, there are (even modern SDHC-)cards which are late 698f079a8fcSWolfgang Muees * in sending the response, and miss the time frame by a few bits, 699f079a8fcSWolfgang Muees * so we have to cope with this situation and check the response 700f079a8fcSWolfgang Muees * bit-by-bit. Arggh!!! 70115a0580cSDavid Brownell */ 702f079a8fcSWolfgang Muees pattern = scratch->status[0] << 24; 703f079a8fcSWolfgang Muees pattern |= scratch->status[1] << 16; 704f079a8fcSWolfgang Muees pattern |= scratch->status[2] << 8; 705f079a8fcSWolfgang Muees pattern |= scratch->status[3]; 706f079a8fcSWolfgang Muees 707f079a8fcSWolfgang Muees /* First 3 bit of pattern are undefined */ 708f079a8fcSWolfgang Muees pattern |= 0xE0000000; 709f079a8fcSWolfgang Muees 710f079a8fcSWolfgang Muees /* left-adjust to leading 0 bit */ 711f079a8fcSWolfgang Muees while (pattern & 0x80000000) 712f079a8fcSWolfgang Muees pattern <<= 1; 713f079a8fcSWolfgang Muees /* right-adjust for pattern matching. Code is in bit 4..0 now. */ 714f079a8fcSWolfgang Muees pattern >>= 27; 715f079a8fcSWolfgang Muees 716f079a8fcSWolfgang Muees switch (pattern) { 71715a0580cSDavid Brownell case SPI_RESPONSE_ACCEPTED: 71815a0580cSDavid Brownell status = 0; 71915a0580cSDavid Brownell break; 72015a0580cSDavid Brownell case SPI_RESPONSE_CRC_ERR: 72115a0580cSDavid Brownell /* host shall then issue MMC_STOP_TRANSMISSION */ 72215a0580cSDavid Brownell status = -EILSEQ; 72315a0580cSDavid Brownell break; 72415a0580cSDavid Brownell case SPI_RESPONSE_WRITE_ERR: 72515a0580cSDavid Brownell /* host shall then issue MMC_STOP_TRANSMISSION, 72615a0580cSDavid Brownell * and should MMC_SEND_STATUS to sort it out 72715a0580cSDavid Brownell */ 72815a0580cSDavid Brownell status = -EIO; 72915a0580cSDavid Brownell break; 73015a0580cSDavid Brownell default: 73115a0580cSDavid Brownell status = -EPROTO; 73215a0580cSDavid Brownell break; 73315a0580cSDavid Brownell } 73415a0580cSDavid Brownell if (status != 0) { 73515a0580cSDavid Brownell dev_dbg(&spi->dev, "write error %02x (%d)\n", 73615a0580cSDavid Brownell scratch->status[0], status); 73715a0580cSDavid Brownell return status; 73815a0580cSDavid Brownell } 73915a0580cSDavid Brownell 74015a0580cSDavid Brownell t->tx_buf += t->len; 74115a0580cSDavid Brownell if (host->dma_dev) 74215a0580cSDavid Brownell t->tx_dma += t->len; 74315a0580cSDavid Brownell 74415a0580cSDavid Brownell /* Return when not busy. If we didn't collect that status yet, 74515a0580cSDavid Brownell * we'll need some more I/O. 74615a0580cSDavid Brownell */ 747f079a8fcSWolfgang Muees for (i = 4; i < sizeof(scratch->status); i++) { 748f079a8fcSWolfgang Muees /* card is non-busy if the most recent bit is 1 */ 749f079a8fcSWolfgang Muees if (scratch->status[i] & 0x01) 75015a0580cSDavid Brownell return 0; 75115a0580cSDavid Brownell } 752162350ebSMatthew Fleming return mmc_spi_wait_unbusy(host, timeout); 75315a0580cSDavid Brownell } 75415a0580cSDavid Brownell 75515a0580cSDavid Brownell /* 75615a0580cSDavid Brownell * Read one block: 75715a0580cSDavid Brownell * - skip leading all-ones bytes ... either 75815a0580cSDavid Brownell * + N(AC) [1..f(clock,CSD)] usually, else 75915a0580cSDavid Brownell * + N(CX) [0..8] when reading CSD or CID 76015a0580cSDavid Brownell * - data block 76115a0580cSDavid Brownell * + token ... if error token, no data or crc 76215a0580cSDavid Brownell * + data bytes 76315a0580cSDavid Brownell * + crc16 76415a0580cSDavid Brownell * 76515a0580cSDavid Brownell * After single block reads, we're done; N(EC) [0+] all-ones bytes follow 76615a0580cSDavid Brownell * before dropping chipselect. 76715a0580cSDavid Brownell * 76815a0580cSDavid Brownell * For multiblock reads, caller either reads the next block or issues a 76915a0580cSDavid Brownell * STOP_TRANSMISSION command. 77015a0580cSDavid Brownell */ 77115a0580cSDavid Brownell static int 772162350ebSMatthew Fleming mmc_spi_readblock(struct mmc_spi_host *host, struct spi_transfer *t, 77356e303ebSWolfgang Muees unsigned long timeout) 77415a0580cSDavid Brownell { 77515a0580cSDavid Brownell struct spi_device *spi = host->spi; 77615a0580cSDavid Brownell int status; 77715a0580cSDavid Brownell struct scratch *scratch = host->data; 778ab5a643cSWolfgang Muees unsigned int bitshift; 779ab5a643cSWolfgang Muees u8 leftover; 78015a0580cSDavid Brownell 78115a0580cSDavid Brownell /* At least one SD card sends an all-zeroes byte when N(CX) 78215a0580cSDavid Brownell * applies, before the all-ones bytes ... just cope with that. 78315a0580cSDavid Brownell */ 78415a0580cSDavid Brownell status = mmc_spi_readbytes(host, 1); 78515a0580cSDavid Brownell if (status < 0) 78615a0580cSDavid Brownell return status; 78715a0580cSDavid Brownell status = scratch->status[0]; 78815a0580cSDavid Brownell if (status == 0xff || status == 0) 789162350ebSMatthew Fleming status = mmc_spi_readtoken(host, timeout); 79015a0580cSDavid Brownell 791ab5a643cSWolfgang Muees if (status < 0) { 792ab5a643cSWolfgang Muees dev_dbg(&spi->dev, "read error %02x (%d)\n", status, status); 793ab5a643cSWolfgang Muees return status; 794ab5a643cSWolfgang Muees } 795ab5a643cSWolfgang Muees 796ab5a643cSWolfgang Muees /* The token may be bit-shifted... 797ab5a643cSWolfgang Muees * the first 0-bit precedes the data stream. 798ab5a643cSWolfgang Muees */ 799ab5a643cSWolfgang Muees bitshift = 7; 800ab5a643cSWolfgang Muees while (status & 0x80) { 801ab5a643cSWolfgang Muees status <<= 1; 802ab5a643cSWolfgang Muees bitshift--; 803ab5a643cSWolfgang Muees } 804ab5a643cSWolfgang Muees leftover = status << 1; 805ab5a643cSWolfgang Muees 80615a0580cSDavid Brownell if (host->dma_dev) { 80715a0580cSDavid Brownell dma_sync_single_for_device(host->dma_dev, 80815a0580cSDavid Brownell host->data_dma, sizeof(*scratch), 80915a0580cSDavid Brownell DMA_BIDIRECTIONAL); 81015a0580cSDavid Brownell dma_sync_single_for_device(host->dma_dev, 81115a0580cSDavid Brownell t->rx_dma, t->len, 81215a0580cSDavid Brownell DMA_FROM_DEVICE); 81315a0580cSDavid Brownell } 81415a0580cSDavid Brownell 81515a0580cSDavid Brownell status = spi_sync(spi, &host->m); 81615a0580cSDavid Brownell 81715a0580cSDavid Brownell if (host->dma_dev) { 81815a0580cSDavid Brownell dma_sync_single_for_cpu(host->dma_dev, 81915a0580cSDavid Brownell host->data_dma, sizeof(*scratch), 82015a0580cSDavid Brownell DMA_BIDIRECTIONAL); 82115a0580cSDavid Brownell dma_sync_single_for_cpu(host->dma_dev, 82215a0580cSDavid Brownell t->rx_dma, t->len, 82315a0580cSDavid Brownell DMA_FROM_DEVICE); 82415a0580cSDavid Brownell } 82515a0580cSDavid Brownell 826ab5a643cSWolfgang Muees if (bitshift) { 827ab5a643cSWolfgang Muees /* Walk through the data and the crc and do 828ab5a643cSWolfgang Muees * all the magic to get byte-aligned data. 82915a0580cSDavid Brownell */ 830ab5a643cSWolfgang Muees u8 *cp = t->rx_buf; 831ab5a643cSWolfgang Muees unsigned int len; 832ab5a643cSWolfgang Muees unsigned int bitright = 8 - bitshift; 833ab5a643cSWolfgang Muees u8 temp; 834ab5a643cSWolfgang Muees for (len = t->len; len; len--) { 835ab5a643cSWolfgang Muees temp = *cp; 836ab5a643cSWolfgang Muees *cp++ = leftover | (temp >> bitshift); 837ab5a643cSWolfgang Muees leftover = temp << bitright; 838ab5a643cSWolfgang Muees } 839ab5a643cSWolfgang Muees cp = (u8 *) &scratch->crc_val; 840ab5a643cSWolfgang Muees temp = *cp; 841ab5a643cSWolfgang Muees *cp++ = leftover | (temp >> bitshift); 842ab5a643cSWolfgang Muees leftover = temp << bitright; 843ab5a643cSWolfgang Muees temp = *cp; 844ab5a643cSWolfgang Muees *cp = leftover | (temp >> bitshift); 84515a0580cSDavid Brownell } 84615a0580cSDavid Brownell 84715a0580cSDavid Brownell if (host->mmc->use_spi_crc) { 84815a0580cSDavid Brownell u16 crc = crc_itu_t(0, t->rx_buf, t->len); 84915a0580cSDavid Brownell 85015a0580cSDavid Brownell be16_to_cpus(&scratch->crc_val); 85115a0580cSDavid Brownell if (scratch->crc_val != crc) { 85215a0580cSDavid Brownell dev_dbg(&spi->dev, "read - crc error: crc_val=0x%04x, " 85315a0580cSDavid Brownell "computed=0x%04x len=%d\n", 85415a0580cSDavid Brownell scratch->crc_val, crc, t->len); 85515a0580cSDavid Brownell return -EILSEQ; 85615a0580cSDavid Brownell } 85715a0580cSDavid Brownell } 85815a0580cSDavid Brownell 85915a0580cSDavid Brownell t->rx_buf += t->len; 86015a0580cSDavid Brownell if (host->dma_dev) 86115a0580cSDavid Brownell t->rx_dma += t->len; 86215a0580cSDavid Brownell 86315a0580cSDavid Brownell return 0; 86415a0580cSDavid Brownell } 86515a0580cSDavid Brownell 86615a0580cSDavid Brownell /* 86715a0580cSDavid Brownell * An MMC/SD data stage includes one or more blocks, optional CRCs, 86815a0580cSDavid Brownell * and inline handshaking. That handhaking makes it unlike most 86915a0580cSDavid Brownell * other SPI protocol stacks. 87015a0580cSDavid Brownell */ 87115a0580cSDavid Brownell static void 87215a0580cSDavid Brownell mmc_spi_data_do(struct mmc_spi_host *host, struct mmc_command *cmd, 87315a0580cSDavid Brownell struct mmc_data *data, u32 blk_size) 87415a0580cSDavid Brownell { 87515a0580cSDavid Brownell struct spi_device *spi = host->spi; 87615a0580cSDavid Brownell struct device *dma_dev = host->dma_dev; 87715a0580cSDavid Brownell struct spi_transfer *t; 87815a0580cSDavid Brownell enum dma_data_direction direction; 87915a0580cSDavid Brownell struct scatterlist *sg; 88015a0580cSDavid Brownell unsigned n_sg; 88115a0580cSDavid Brownell int multiple = (data->blocks > 1); 882162350ebSMatthew Fleming u32 clock_rate; 88356e303ebSWolfgang Muees unsigned long timeout; 88415a0580cSDavid Brownell 88515a0580cSDavid Brownell if (data->flags & MMC_DATA_READ) 88615a0580cSDavid Brownell direction = DMA_FROM_DEVICE; 88715a0580cSDavid Brownell else 88815a0580cSDavid Brownell direction = DMA_TO_DEVICE; 88915a0580cSDavid Brownell mmc_spi_setup_data_message(host, multiple, direction); 89015a0580cSDavid Brownell t = &host->t; 89115a0580cSDavid Brownell 892162350ebSMatthew Fleming if (t->speed_hz) 893162350ebSMatthew Fleming clock_rate = t->speed_hz; 894162350ebSMatthew Fleming else 895162350ebSMatthew Fleming clock_rate = spi->max_speed_hz; 896162350ebSMatthew Fleming 89756e303ebSWolfgang Muees timeout = data->timeout_ns + 89856e303ebSWolfgang Muees data->timeout_clks * 1000000 / clock_rate; 89956e303ebSWolfgang Muees timeout = usecs_to_jiffies((unsigned int)(timeout / 1000)) + 1; 900162350ebSMatthew Fleming 90115a0580cSDavid Brownell /* Handle scatterlist segments one at a time, with synch for 90215a0580cSDavid Brownell * each 512-byte block 90315a0580cSDavid Brownell */ 90415a0580cSDavid Brownell for (sg = data->sg, n_sg = data->sg_len; n_sg; n_sg--, sg++) { 90515a0580cSDavid Brownell int status = 0; 90615a0580cSDavid Brownell dma_addr_t dma_addr = 0; 90715a0580cSDavid Brownell void *kmap_addr; 90815a0580cSDavid Brownell unsigned length = sg->length; 90915a0580cSDavid Brownell enum dma_data_direction dir = direction; 91015a0580cSDavid Brownell 91115a0580cSDavid Brownell /* set up dma mapping for controller drivers that might 91215a0580cSDavid Brownell * use DMA ... though they may fall back to PIO 91315a0580cSDavid Brownell */ 91415a0580cSDavid Brownell if (dma_dev) { 91515a0580cSDavid Brownell /* never invalidate whole *shared* pages ... */ 91615a0580cSDavid Brownell if ((sg->offset != 0 || length != PAGE_SIZE) 91715a0580cSDavid Brownell && dir == DMA_FROM_DEVICE) 91815a0580cSDavid Brownell dir = DMA_BIDIRECTIONAL; 91915a0580cSDavid Brownell 92045711f1aSJens Axboe dma_addr = dma_map_page(dma_dev, sg_page(sg), 0, 92115a0580cSDavid Brownell PAGE_SIZE, dir); 92215a0580cSDavid Brownell if (direction == DMA_TO_DEVICE) 92315a0580cSDavid Brownell t->tx_dma = dma_addr + sg->offset; 92415a0580cSDavid Brownell else 92515a0580cSDavid Brownell t->rx_dma = dma_addr + sg->offset; 92615a0580cSDavid Brownell } 92715a0580cSDavid Brownell 92815a0580cSDavid Brownell /* allow pio too; we don't allow highmem */ 92945711f1aSJens Axboe kmap_addr = kmap(sg_page(sg)); 93015a0580cSDavid Brownell if (direction == DMA_TO_DEVICE) 93115a0580cSDavid Brownell t->tx_buf = kmap_addr + sg->offset; 93215a0580cSDavid Brownell else 93315a0580cSDavid Brownell t->rx_buf = kmap_addr + sg->offset; 93415a0580cSDavid Brownell 93515a0580cSDavid Brownell /* transfer each block, and update request status */ 93615a0580cSDavid Brownell while (length) { 93715a0580cSDavid Brownell t->len = min(length, blk_size); 93815a0580cSDavid Brownell 93915a0580cSDavid Brownell dev_dbg(&host->spi->dev, 94015a0580cSDavid Brownell " mmc_spi: %s block, %d bytes\n", 94115a0580cSDavid Brownell (direction == DMA_TO_DEVICE) 94215a0580cSDavid Brownell ? "write" 94315a0580cSDavid Brownell : "read", 94415a0580cSDavid Brownell t->len); 94515a0580cSDavid Brownell 94615a0580cSDavid Brownell if (direction == DMA_TO_DEVICE) 947162350ebSMatthew Fleming status = mmc_spi_writeblock(host, t, timeout); 94815a0580cSDavid Brownell else 949162350ebSMatthew Fleming status = mmc_spi_readblock(host, t, timeout); 95015a0580cSDavid Brownell if (status < 0) 95115a0580cSDavid Brownell break; 95215a0580cSDavid Brownell 95315a0580cSDavid Brownell data->bytes_xfered += t->len; 95415a0580cSDavid Brownell length -= t->len; 95515a0580cSDavid Brownell 95615a0580cSDavid Brownell if (!multiple) 95715a0580cSDavid Brownell break; 95815a0580cSDavid Brownell } 95915a0580cSDavid Brownell 96015a0580cSDavid Brownell /* discard mappings */ 96115a0580cSDavid Brownell if (direction == DMA_FROM_DEVICE) 96245711f1aSJens Axboe flush_kernel_dcache_page(sg_page(sg)); 96345711f1aSJens Axboe kunmap(sg_page(sg)); 96415a0580cSDavid Brownell if (dma_dev) 96515a0580cSDavid Brownell dma_unmap_page(dma_dev, dma_addr, PAGE_SIZE, dir); 96615a0580cSDavid Brownell 96715a0580cSDavid Brownell if (status < 0) { 96815a0580cSDavid Brownell data->error = status; 96915a0580cSDavid Brownell dev_dbg(&spi->dev, "%s status %d\n", 97015a0580cSDavid Brownell (direction == DMA_TO_DEVICE) 97115a0580cSDavid Brownell ? "write" : "read", 97215a0580cSDavid Brownell status); 97315a0580cSDavid Brownell break; 97415a0580cSDavid Brownell } 97515a0580cSDavid Brownell } 97615a0580cSDavid Brownell 97715a0580cSDavid Brownell /* NOTE some docs describe an MMC-only SET_BLOCK_COUNT (CMD23) that 97815a0580cSDavid Brownell * can be issued before multiblock writes. Unlike its more widely 97915a0580cSDavid Brownell * documented analogue for SD cards (SET_WR_BLK_ERASE_COUNT, ACMD23), 98015a0580cSDavid Brownell * that can affect the STOP_TRAN logic. Complete (and current) 98115a0580cSDavid Brownell * MMC specs should sort that out before Linux starts using CMD23. 98215a0580cSDavid Brownell */ 98315a0580cSDavid Brownell if (direction == DMA_TO_DEVICE && multiple) { 98415a0580cSDavid Brownell struct scratch *scratch = host->data; 98515a0580cSDavid Brownell int tmp; 98615a0580cSDavid Brownell const unsigned statlen = sizeof(scratch->status); 98715a0580cSDavid Brownell 98815a0580cSDavid Brownell dev_dbg(&spi->dev, " mmc_spi: STOP_TRAN\n"); 98915a0580cSDavid Brownell 99015a0580cSDavid Brownell /* Tweak the per-block message we set up earlier by morphing 99115a0580cSDavid Brownell * it to hold single buffer with the token followed by some 99215a0580cSDavid Brownell * all-ones bytes ... skip N(BR) (0..1), scan the rest for 99315a0580cSDavid Brownell * "not busy any longer" status, and leave chip selected. 99415a0580cSDavid Brownell */ 99515a0580cSDavid Brownell INIT_LIST_HEAD(&host->m.transfers); 99615a0580cSDavid Brownell list_add(&host->early_status.transfer_list, 99715a0580cSDavid Brownell &host->m.transfers); 99815a0580cSDavid Brownell 99915a0580cSDavid Brownell memset(scratch->status, 0xff, statlen); 100015a0580cSDavid Brownell scratch->status[0] = SPI_TOKEN_STOP_TRAN; 100115a0580cSDavid Brownell 100215a0580cSDavid Brownell host->early_status.tx_buf = host->early_status.rx_buf; 100315a0580cSDavid Brownell host->early_status.tx_dma = host->early_status.rx_dma; 100415a0580cSDavid Brownell host->early_status.len = statlen; 100515a0580cSDavid Brownell 100615a0580cSDavid Brownell if (host->dma_dev) 100715a0580cSDavid Brownell dma_sync_single_for_device(host->dma_dev, 100815a0580cSDavid Brownell host->data_dma, sizeof(*scratch), 100915a0580cSDavid Brownell DMA_BIDIRECTIONAL); 101015a0580cSDavid Brownell 101115a0580cSDavid Brownell tmp = spi_sync(spi, &host->m); 101215a0580cSDavid Brownell 101315a0580cSDavid Brownell if (host->dma_dev) 101415a0580cSDavid Brownell dma_sync_single_for_cpu(host->dma_dev, 101515a0580cSDavid Brownell host->data_dma, sizeof(*scratch), 101615a0580cSDavid Brownell DMA_BIDIRECTIONAL); 101715a0580cSDavid Brownell 101815a0580cSDavid Brownell if (tmp < 0) { 101915a0580cSDavid Brownell if (!data->error) 102015a0580cSDavid Brownell data->error = tmp; 102115a0580cSDavid Brownell return; 102215a0580cSDavid Brownell } 102315a0580cSDavid Brownell 102415a0580cSDavid Brownell /* Ideally we collected "not busy" status with one I/O, 102515a0580cSDavid Brownell * avoiding wasteful byte-at-a-time scanning... but more 102615a0580cSDavid Brownell * I/O is often needed. 102715a0580cSDavid Brownell */ 102815a0580cSDavid Brownell for (tmp = 2; tmp < statlen; tmp++) { 102915a0580cSDavid Brownell if (scratch->status[tmp] != 0) 103015a0580cSDavid Brownell return; 103115a0580cSDavid Brownell } 1032162350ebSMatthew Fleming tmp = mmc_spi_wait_unbusy(host, timeout); 103315a0580cSDavid Brownell if (tmp < 0 && !data->error) 103415a0580cSDavid Brownell data->error = tmp; 103515a0580cSDavid Brownell } 103615a0580cSDavid Brownell } 103715a0580cSDavid Brownell 103815a0580cSDavid Brownell /****************************************************************************/ 103915a0580cSDavid Brownell 104015a0580cSDavid Brownell /* 104115a0580cSDavid Brownell * MMC driver implementation -- the interface to the MMC stack 104215a0580cSDavid Brownell */ 104315a0580cSDavid Brownell 104415a0580cSDavid Brownell static void mmc_spi_request(struct mmc_host *mmc, struct mmc_request *mrq) 104515a0580cSDavid Brownell { 104615a0580cSDavid Brownell struct mmc_spi_host *host = mmc_priv(mmc); 104715a0580cSDavid Brownell int status = -EINVAL; 104815a0580cSDavid Brownell 104915a0580cSDavid Brownell #ifdef DEBUG 105015a0580cSDavid Brownell /* MMC core and layered drivers *MUST* issue SPI-aware commands */ 105115a0580cSDavid Brownell { 105215a0580cSDavid Brownell struct mmc_command *cmd; 105315a0580cSDavid Brownell int invalid = 0; 105415a0580cSDavid Brownell 105515a0580cSDavid Brownell cmd = mrq->cmd; 105615a0580cSDavid Brownell if (!mmc_spi_resp_type(cmd)) { 105715a0580cSDavid Brownell dev_dbg(&host->spi->dev, "bogus command\n"); 105815a0580cSDavid Brownell cmd->error = -EINVAL; 105915a0580cSDavid Brownell invalid = 1; 106015a0580cSDavid Brownell } 106115a0580cSDavid Brownell 106215a0580cSDavid Brownell cmd = mrq->stop; 106315a0580cSDavid Brownell if (cmd && !mmc_spi_resp_type(cmd)) { 106415a0580cSDavid Brownell dev_dbg(&host->spi->dev, "bogus STOP command\n"); 106515a0580cSDavid Brownell cmd->error = -EINVAL; 106615a0580cSDavid Brownell invalid = 1; 106715a0580cSDavid Brownell } 106815a0580cSDavid Brownell 106915a0580cSDavid Brownell if (invalid) { 107015a0580cSDavid Brownell dump_stack(); 107115a0580cSDavid Brownell mmc_request_done(host->mmc, mrq); 107215a0580cSDavid Brownell return; 107315a0580cSDavid Brownell } 107415a0580cSDavid Brownell } 107515a0580cSDavid Brownell #endif 107615a0580cSDavid Brownell 107715a0580cSDavid Brownell /* issue command; then optionally data and stop */ 107815a0580cSDavid Brownell status = mmc_spi_command_send(host, mrq, mrq->cmd, mrq->data != NULL); 107915a0580cSDavid Brownell if (status == 0 && mrq->data) { 108015a0580cSDavid Brownell mmc_spi_data_do(host, mrq->cmd, mrq->data, mrq->data->blksz); 108115a0580cSDavid Brownell if (mrq->stop) 108215a0580cSDavid Brownell status = mmc_spi_command_send(host, mrq, mrq->stop, 0); 108315a0580cSDavid Brownell else 108415a0580cSDavid Brownell mmc_cs_off(host); 108515a0580cSDavid Brownell } 108615a0580cSDavid Brownell 108715a0580cSDavid Brownell mmc_request_done(host->mmc, mrq); 108815a0580cSDavid Brownell } 108915a0580cSDavid Brownell 109015a0580cSDavid Brownell /* See Section 6.4.1, in SD "Simplified Physical Layer Specification 2.0" 109115a0580cSDavid Brownell * 109215a0580cSDavid Brownell * NOTE that here we can't know that the card has just been powered up; 109315a0580cSDavid Brownell * not all MMC/SD sockets support power switching. 109415a0580cSDavid Brownell * 109515a0580cSDavid Brownell * FIXME when the card is still in SPI mode, e.g. from a previous kernel, 109615a0580cSDavid Brownell * this doesn't seem to do the right thing at all... 109715a0580cSDavid Brownell */ 109815a0580cSDavid Brownell static void mmc_spi_initsequence(struct mmc_spi_host *host) 109915a0580cSDavid Brownell { 110015a0580cSDavid Brownell /* Try to be very sure any previous command has completed; 110115a0580cSDavid Brownell * wait till not-busy, skip debris from any old commands. 110215a0580cSDavid Brownell */ 110315a0580cSDavid Brownell mmc_spi_wait_unbusy(host, r1b_timeout); 110415a0580cSDavid Brownell mmc_spi_readbytes(host, 10); 110515a0580cSDavid Brownell 110615a0580cSDavid Brownell /* 110715a0580cSDavid Brownell * Do a burst with chipselect active-high. We need to do this to 110815a0580cSDavid Brownell * meet the requirement of 74 clock cycles with both chipselect 110915a0580cSDavid Brownell * and CMD (MOSI) high before CMD0 ... after the card has been 111015a0580cSDavid Brownell * powered up to Vdd(min), and so is ready to take commands. 111115a0580cSDavid Brownell * 111215a0580cSDavid Brownell * Some cards are particularly needy of this (e.g. Viking "SD256") 111315a0580cSDavid Brownell * while most others don't seem to care. 111415a0580cSDavid Brownell * 111515a0580cSDavid Brownell * Note that this is one of the places MMC/SD plays games with the 111615a0580cSDavid Brownell * SPI protocol. Another is that when chipselect is released while 111715a0580cSDavid Brownell * the card returns BUSY status, the clock must issue several cycles 111815a0580cSDavid Brownell * with chipselect high before the card will stop driving its output. 111915a0580cSDavid Brownell */ 112015a0580cSDavid Brownell host->spi->mode |= SPI_CS_HIGH; 112115a0580cSDavid Brownell if (spi_setup(host->spi) != 0) { 112215a0580cSDavid Brownell /* Just warn; most cards work without it. */ 112315a0580cSDavid Brownell dev_warn(&host->spi->dev, 112415a0580cSDavid Brownell "can't change chip-select polarity\n"); 112515a0580cSDavid Brownell host->spi->mode &= ~SPI_CS_HIGH; 112615a0580cSDavid Brownell } else { 112715a0580cSDavid Brownell mmc_spi_readbytes(host, 18); 112815a0580cSDavid Brownell 112915a0580cSDavid Brownell host->spi->mode &= ~SPI_CS_HIGH; 113015a0580cSDavid Brownell if (spi_setup(host->spi) != 0) { 113115a0580cSDavid Brownell /* Wot, we can't get the same setup we had before? */ 113215a0580cSDavid Brownell dev_err(&host->spi->dev, 113315a0580cSDavid Brownell "can't restore chip-select polarity\n"); 113415a0580cSDavid Brownell } 113515a0580cSDavid Brownell } 113615a0580cSDavid Brownell } 113715a0580cSDavid Brownell 113815a0580cSDavid Brownell static char *mmc_powerstring(u8 power_mode) 113915a0580cSDavid Brownell { 114015a0580cSDavid Brownell switch (power_mode) { 114115a0580cSDavid Brownell case MMC_POWER_OFF: return "off"; 114215a0580cSDavid Brownell case MMC_POWER_UP: return "up"; 114315a0580cSDavid Brownell case MMC_POWER_ON: return "on"; 114415a0580cSDavid Brownell } 114515a0580cSDavid Brownell return "?"; 114615a0580cSDavid Brownell } 114715a0580cSDavid Brownell 114815a0580cSDavid Brownell static void mmc_spi_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 114915a0580cSDavid Brownell { 115015a0580cSDavid Brownell struct mmc_spi_host *host = mmc_priv(mmc); 115115a0580cSDavid Brownell 115215a0580cSDavid Brownell if (host->power_mode != ios->power_mode) { 115315a0580cSDavid Brownell int canpower; 115415a0580cSDavid Brownell 115515a0580cSDavid Brownell canpower = host->pdata && host->pdata->setpower; 115615a0580cSDavid Brownell 115715a0580cSDavid Brownell dev_dbg(&host->spi->dev, "mmc_spi: power %s (%d)%s\n", 115815a0580cSDavid Brownell mmc_powerstring(ios->power_mode), 115915a0580cSDavid Brownell ios->vdd, 116015a0580cSDavid Brownell canpower ? ", can switch" : ""); 116115a0580cSDavid Brownell 116215a0580cSDavid Brownell /* switch power on/off if possible, accounting for 116315a0580cSDavid Brownell * max 250msec powerup time if needed. 116415a0580cSDavid Brownell */ 116515a0580cSDavid Brownell if (canpower) { 116615a0580cSDavid Brownell switch (ios->power_mode) { 116715a0580cSDavid Brownell case MMC_POWER_OFF: 116815a0580cSDavid Brownell case MMC_POWER_UP: 116915a0580cSDavid Brownell host->pdata->setpower(&host->spi->dev, 117015a0580cSDavid Brownell ios->vdd); 117115a0580cSDavid Brownell if (ios->power_mode == MMC_POWER_UP) 117215a0580cSDavid Brownell msleep(host->powerup_msecs); 117315a0580cSDavid Brownell } 117415a0580cSDavid Brownell } 117515a0580cSDavid Brownell 117615a0580cSDavid Brownell /* See 6.4.1 in the simplified SD card physical spec 2.0 */ 117715a0580cSDavid Brownell if (ios->power_mode == MMC_POWER_ON) 117815a0580cSDavid Brownell mmc_spi_initsequence(host); 117915a0580cSDavid Brownell 118015a0580cSDavid Brownell /* If powering down, ground all card inputs to avoid power 118115a0580cSDavid Brownell * delivery from data lines! On a shared SPI bus, this 118215a0580cSDavid Brownell * will probably be temporary; 6.4.2 of the simplified SD 118315a0580cSDavid Brownell * spec says this must last at least 1msec. 118415a0580cSDavid Brownell * 118515a0580cSDavid Brownell * - Clock low means CPOL 0, e.g. mode 0 118615a0580cSDavid Brownell * - MOSI low comes from writing zero 118715a0580cSDavid Brownell * - Chipselect is usually active low... 118815a0580cSDavid Brownell */ 118915a0580cSDavid Brownell if (canpower && ios->power_mode == MMC_POWER_OFF) { 119015a0580cSDavid Brownell int mres; 11911685a03eSJan Nikitenko u8 nullbyte = 0; 119215a0580cSDavid Brownell 119315a0580cSDavid Brownell host->spi->mode &= ~(SPI_CPOL|SPI_CPHA); 119415a0580cSDavid Brownell mres = spi_setup(host->spi); 119515a0580cSDavid Brownell if (mres < 0) 119615a0580cSDavid Brownell dev_dbg(&host->spi->dev, 119715a0580cSDavid Brownell "switch to SPI mode 0 failed\n"); 119815a0580cSDavid Brownell 11991685a03eSJan Nikitenko if (spi_write(host->spi, &nullbyte, 1) < 0) 120015a0580cSDavid Brownell dev_dbg(&host->spi->dev, 120115a0580cSDavid Brownell "put spi signals to low failed\n"); 120215a0580cSDavid Brownell 120315a0580cSDavid Brownell /* 120415a0580cSDavid Brownell * Now clock should be low due to spi mode 0; 120515a0580cSDavid Brownell * MOSI should be low because of written 0x00; 120615a0580cSDavid Brownell * chipselect should be low (it is active low) 120715a0580cSDavid Brownell * power supply is off, so now MMC is off too! 120815a0580cSDavid Brownell * 120915a0580cSDavid Brownell * FIXME no, chipselect can be high since the 121015a0580cSDavid Brownell * device is inactive and SPI_CS_HIGH is clear... 121115a0580cSDavid Brownell */ 121215a0580cSDavid Brownell msleep(10); 121315a0580cSDavid Brownell if (mres == 0) { 121415a0580cSDavid Brownell host->spi->mode |= (SPI_CPOL|SPI_CPHA); 121515a0580cSDavid Brownell mres = spi_setup(host->spi); 121615a0580cSDavid Brownell if (mres < 0) 121715a0580cSDavid Brownell dev_dbg(&host->spi->dev, 121815a0580cSDavid Brownell "switch back to SPI mode 3" 121915a0580cSDavid Brownell " failed\n"); 122015a0580cSDavid Brownell } 122115a0580cSDavid Brownell } 122215a0580cSDavid Brownell 122315a0580cSDavid Brownell host->power_mode = ios->power_mode; 122415a0580cSDavid Brownell } 122515a0580cSDavid Brownell 122615a0580cSDavid Brownell if (host->spi->max_speed_hz != ios->clock && ios->clock != 0) { 122715a0580cSDavid Brownell int status; 122815a0580cSDavid Brownell 122915a0580cSDavid Brownell host->spi->max_speed_hz = ios->clock; 123015a0580cSDavid Brownell status = spi_setup(host->spi); 123115a0580cSDavid Brownell dev_dbg(&host->spi->dev, 123215a0580cSDavid Brownell "mmc_spi: clock to %d Hz, %d\n", 123315a0580cSDavid Brownell host->spi->max_speed_hz, status); 123415a0580cSDavid Brownell } 123515a0580cSDavid Brownell } 123615a0580cSDavid Brownell 123715a0580cSDavid Brownell static int mmc_spi_get_ro(struct mmc_host *mmc) 123815a0580cSDavid Brownell { 123915a0580cSDavid Brownell struct mmc_spi_host *host = mmc_priv(mmc); 124015a0580cSDavid Brownell 124115a0580cSDavid Brownell if (host->pdata && host->pdata->get_ro) 124208f80bb5SAnton Vorontsov return !!host->pdata->get_ro(mmc->parent); 124308f80bb5SAnton Vorontsov /* 124408f80bb5SAnton Vorontsov * Board doesn't support read only detection; let the mmc core 124508f80bb5SAnton Vorontsov * decide what to do. 124608f80bb5SAnton Vorontsov */ 124708f80bb5SAnton Vorontsov return -ENOSYS; 124815a0580cSDavid Brownell } 124915a0580cSDavid Brownell 1250619ef4b4SAnton Vorontsov static int mmc_spi_get_cd(struct mmc_host *mmc) 1251619ef4b4SAnton Vorontsov { 1252619ef4b4SAnton Vorontsov struct mmc_spi_host *host = mmc_priv(mmc); 1253619ef4b4SAnton Vorontsov 1254619ef4b4SAnton Vorontsov if (host->pdata && host->pdata->get_cd) 1255619ef4b4SAnton Vorontsov return !!host->pdata->get_cd(mmc->parent); 1256619ef4b4SAnton Vorontsov return -ENOSYS; 1257619ef4b4SAnton Vorontsov } 125815a0580cSDavid Brownell 125915a0580cSDavid Brownell static const struct mmc_host_ops mmc_spi_ops = { 126015a0580cSDavid Brownell .request = mmc_spi_request, 126115a0580cSDavid Brownell .set_ios = mmc_spi_set_ios, 126215a0580cSDavid Brownell .get_ro = mmc_spi_get_ro, 1263619ef4b4SAnton Vorontsov .get_cd = mmc_spi_get_cd, 126415a0580cSDavid Brownell }; 126515a0580cSDavid Brownell 126615a0580cSDavid Brownell 126715a0580cSDavid Brownell /****************************************************************************/ 126815a0580cSDavid Brownell 126915a0580cSDavid Brownell /* 127015a0580cSDavid Brownell * SPI driver implementation 127115a0580cSDavid Brownell */ 127215a0580cSDavid Brownell 127315a0580cSDavid Brownell static irqreturn_t 127415a0580cSDavid Brownell mmc_spi_detect_irq(int irq, void *mmc) 127515a0580cSDavid Brownell { 127615a0580cSDavid Brownell struct mmc_spi_host *host = mmc_priv(mmc); 127715a0580cSDavid Brownell u16 delay_msec = max(host->pdata->detect_delay, (u16)100); 127815a0580cSDavid Brownell 127915a0580cSDavid Brownell mmc_detect_change(mmc, msecs_to_jiffies(delay_msec)); 128015a0580cSDavid Brownell return IRQ_HANDLED; 128115a0580cSDavid Brownell } 128215a0580cSDavid Brownell 1283460cd058SDavid Brownell struct count_children { 1284460cd058SDavid Brownell unsigned n; 1285460cd058SDavid Brownell struct bus_type *bus; 1286460cd058SDavid Brownell }; 1287460cd058SDavid Brownell 1288460cd058SDavid Brownell static int maybe_count_child(struct device *dev, void *c) 1289460cd058SDavid Brownell { 1290460cd058SDavid Brownell struct count_children *ccp = c; 1291460cd058SDavid Brownell 1292460cd058SDavid Brownell if (dev->bus == ccp->bus) { 1293460cd058SDavid Brownell if (ccp->n) 1294460cd058SDavid Brownell return -EBUSY; 1295460cd058SDavid Brownell ccp->n++; 1296460cd058SDavid Brownell } 1297460cd058SDavid Brownell return 0; 1298460cd058SDavid Brownell } 1299460cd058SDavid Brownell 130015a0580cSDavid Brownell static int mmc_spi_probe(struct spi_device *spi) 130115a0580cSDavid Brownell { 130215a0580cSDavid Brownell void *ones; 130315a0580cSDavid Brownell struct mmc_host *mmc; 130415a0580cSDavid Brownell struct mmc_spi_host *host; 130515a0580cSDavid Brownell int status; 130615a0580cSDavid Brownell 130715a0580cSDavid Brownell /* MMC and SD specs only seem to care that sampling is on the 130815a0580cSDavid Brownell * rising edge ... meaning SPI modes 0 or 3. So either SPI mode 130948881caeSWolfgang Muees * should be legit. We'll use mode 0 since the steady state is 0, 131048881caeSWolfgang Muees * which is appropriate for hotplugging, unless the platform data 131148881caeSWolfgang Muees * specify mode 3 (if hardware is not compatible to mode 0). 131215a0580cSDavid Brownell */ 131348881caeSWolfgang Muees if (spi->mode != SPI_MODE_3) 131415a0580cSDavid Brownell spi->mode = SPI_MODE_0; 131515a0580cSDavid Brownell spi->bits_per_word = 8; 131615a0580cSDavid Brownell 131715a0580cSDavid Brownell status = spi_setup(spi); 131815a0580cSDavid Brownell if (status < 0) { 131915a0580cSDavid Brownell dev_dbg(&spi->dev, "needs SPI mode %02x, %d KHz; %d\n", 132015a0580cSDavid Brownell spi->mode, spi->max_speed_hz / 1000, 132115a0580cSDavid Brownell status); 132215a0580cSDavid Brownell return status; 132315a0580cSDavid Brownell } 132415a0580cSDavid Brownell 1325460cd058SDavid Brownell /* We can use the bus safely iff nobody else will interfere with us. 1326460cd058SDavid Brownell * Most commands consist of one SPI message to issue a command, then 1327460cd058SDavid Brownell * several more to collect its response, then possibly more for data 1328460cd058SDavid Brownell * transfer. Clocking access to other devices during that period will 1329460cd058SDavid Brownell * corrupt the command execution. 1330460cd058SDavid Brownell * 1331460cd058SDavid Brownell * Until we have software primitives which guarantee non-interference, 1332460cd058SDavid Brownell * we'll aim for a hardware-level guarantee. 1333460cd058SDavid Brownell * 1334460cd058SDavid Brownell * REVISIT we can't guarantee another device won't be added later... 133515a0580cSDavid Brownell */ 133615a0580cSDavid Brownell if (spi->master->num_chipselect > 1) { 1337460cd058SDavid Brownell struct count_children cc; 133815a0580cSDavid Brownell 1339460cd058SDavid Brownell cc.n = 0; 1340460cd058SDavid Brownell cc.bus = spi->dev.bus; 1341460cd058SDavid Brownell status = device_for_each_child(spi->dev.parent, &cc, 1342460cd058SDavid Brownell maybe_count_child); 134315a0580cSDavid Brownell if (status < 0) { 134415a0580cSDavid Brownell dev_err(&spi->dev, "can't share SPI bus\n"); 134515a0580cSDavid Brownell return status; 134615a0580cSDavid Brownell } 134715a0580cSDavid Brownell 1348460cd058SDavid Brownell dev_warn(&spi->dev, "ASSUMING SPI bus stays unshared!\n"); 134915a0580cSDavid Brownell } 135015a0580cSDavid Brownell 135115a0580cSDavid Brownell /* We need a supply of ones to transmit. This is the only time 135215a0580cSDavid Brownell * the CPU touches these, so cache coherency isn't a concern. 135315a0580cSDavid Brownell * 135415a0580cSDavid Brownell * NOTE if many systems use more than one MMC-over-SPI connector 135515a0580cSDavid Brownell * it'd save some memory to share this. That's evidently rare. 135615a0580cSDavid Brownell */ 135715a0580cSDavid Brownell status = -ENOMEM; 135815a0580cSDavid Brownell ones = kmalloc(MMC_SPI_BLOCKSIZE, GFP_KERNEL); 135915a0580cSDavid Brownell if (!ones) 136015a0580cSDavid Brownell goto nomem; 136115a0580cSDavid Brownell memset(ones, 0xff, MMC_SPI_BLOCKSIZE); 136215a0580cSDavid Brownell 136315a0580cSDavid Brownell mmc = mmc_alloc_host(sizeof(*host), &spi->dev); 136415a0580cSDavid Brownell if (!mmc) 136515a0580cSDavid Brownell goto nomem; 136615a0580cSDavid Brownell 136715a0580cSDavid Brownell mmc->ops = &mmc_spi_ops; 136815a0580cSDavid Brownell mmc->max_blk_size = MMC_SPI_BLOCKSIZE; 136915a0580cSDavid Brownell 137023af6039SPierre Ossman mmc->caps = MMC_CAP_SPI; 137115a0580cSDavid Brownell 137215a0580cSDavid Brownell /* SPI doesn't need the lowspeed device identification thing for 137315a0580cSDavid Brownell * MMC or SD cards, since it never comes up in open drain mode. 137415a0580cSDavid Brownell * That's good; some SPI masters can't handle very low speeds! 137515a0580cSDavid Brownell * 137615a0580cSDavid Brownell * However, low speed SDIO cards need not handle over 400 KHz; 137715a0580cSDavid Brownell * that's the only reason not to use a few MHz for f_min (until 137815a0580cSDavid Brownell * the upper layer reads the target frequency from the CSD). 137915a0580cSDavid Brownell */ 138015a0580cSDavid Brownell mmc->f_min = 400000; 138115a0580cSDavid Brownell mmc->f_max = spi->max_speed_hz; 138215a0580cSDavid Brownell 138315a0580cSDavid Brownell host = mmc_priv(mmc); 138415a0580cSDavid Brownell host->mmc = mmc; 138515a0580cSDavid Brownell host->spi = spi; 138615a0580cSDavid Brownell 138715a0580cSDavid Brownell host->ones = ones; 138815a0580cSDavid Brownell 138915a0580cSDavid Brownell /* Platform data is used to hook up things like card sensing 139015a0580cSDavid Brownell * and power switching gpios. 139115a0580cSDavid Brownell */ 13929c43df57SAnton Vorontsov host->pdata = mmc_spi_get_pdata(spi); 139315a0580cSDavid Brownell if (host->pdata) 139415a0580cSDavid Brownell mmc->ocr_avail = host->pdata->ocr_mask; 139515a0580cSDavid Brownell if (!mmc->ocr_avail) { 139615a0580cSDavid Brownell dev_warn(&spi->dev, "ASSUMING 3.2-3.4 V slot power\n"); 139715a0580cSDavid Brownell mmc->ocr_avail = MMC_VDD_32_33|MMC_VDD_33_34; 139815a0580cSDavid Brownell } 139915a0580cSDavid Brownell if (host->pdata && host->pdata->setpower) { 140015a0580cSDavid Brownell host->powerup_msecs = host->pdata->powerup_msecs; 140115a0580cSDavid Brownell if (!host->powerup_msecs || host->powerup_msecs > 250) 140215a0580cSDavid Brownell host->powerup_msecs = 250; 140315a0580cSDavid Brownell } 140415a0580cSDavid Brownell 140515a0580cSDavid Brownell dev_set_drvdata(&spi->dev, mmc); 140615a0580cSDavid Brownell 140715a0580cSDavid Brownell /* preallocate dma buffers */ 140815a0580cSDavid Brownell host->data = kmalloc(sizeof(*host->data), GFP_KERNEL); 140915a0580cSDavid Brownell if (!host->data) 141015a0580cSDavid Brownell goto fail_nobuf1; 141115a0580cSDavid Brownell 141249dce689STony Jones if (spi->master->dev.parent->dma_mask) { 141349dce689STony Jones struct device *dev = spi->master->dev.parent; 141415a0580cSDavid Brownell 141515a0580cSDavid Brownell host->dma_dev = dev; 141615a0580cSDavid Brownell host->ones_dma = dma_map_single(dev, ones, 141715a0580cSDavid Brownell MMC_SPI_BLOCKSIZE, DMA_TO_DEVICE); 141815a0580cSDavid Brownell host->data_dma = dma_map_single(dev, host->data, 141915a0580cSDavid Brownell sizeof(*host->data), DMA_BIDIRECTIONAL); 142015a0580cSDavid Brownell 142115a0580cSDavid Brownell /* REVISIT in theory those map operations can fail... */ 142215a0580cSDavid Brownell 142315a0580cSDavid Brownell dma_sync_single_for_cpu(host->dma_dev, 142415a0580cSDavid Brownell host->data_dma, sizeof(*host->data), 142515a0580cSDavid Brownell DMA_BIDIRECTIONAL); 142615a0580cSDavid Brownell } 142715a0580cSDavid Brownell 142815a0580cSDavid Brownell /* setup message for status/busy readback */ 142915a0580cSDavid Brownell spi_message_init(&host->readback); 143015a0580cSDavid Brownell host->readback.is_dma_mapped = (host->dma_dev != NULL); 143115a0580cSDavid Brownell 143215a0580cSDavid Brownell spi_message_add_tail(&host->status, &host->readback); 143315a0580cSDavid Brownell host->status.tx_buf = host->ones; 143415a0580cSDavid Brownell host->status.tx_dma = host->ones_dma; 143515a0580cSDavid Brownell host->status.rx_buf = &host->data->status; 143615a0580cSDavid Brownell host->status.rx_dma = host->data_dma + offsetof(struct scratch, status); 143715a0580cSDavid Brownell host->status.cs_change = 1; 143815a0580cSDavid Brownell 143915a0580cSDavid Brownell /* register card detect irq */ 144015a0580cSDavid Brownell if (host->pdata && host->pdata->init) { 144115a0580cSDavid Brownell status = host->pdata->init(&spi->dev, mmc_spi_detect_irq, mmc); 144215a0580cSDavid Brownell if (status != 0) 144315a0580cSDavid Brownell goto fail_glue_init; 144415a0580cSDavid Brownell } 144515a0580cSDavid Brownell 1446619ef4b4SAnton Vorontsov /* pass platform capabilities, if any */ 1447619ef4b4SAnton Vorontsov if (host->pdata) 1448619ef4b4SAnton Vorontsov mmc->caps |= host->pdata->caps; 1449619ef4b4SAnton Vorontsov 145015a0580cSDavid Brownell status = mmc_add_host(mmc); 145115a0580cSDavid Brownell if (status != 0) 145215a0580cSDavid Brownell goto fail_add_host; 145315a0580cSDavid Brownell 1454619ef4b4SAnton Vorontsov dev_info(&spi->dev, "SD/MMC host %s%s%s%s%s\n", 1455d1b26863SKay Sievers dev_name(&mmc->class_dev), 145615a0580cSDavid Brownell host->dma_dev ? "" : ", no DMA", 145715a0580cSDavid Brownell (host->pdata && host->pdata->get_ro) 145815a0580cSDavid Brownell ? "" : ", no WP", 145915a0580cSDavid Brownell (host->pdata && host->pdata->setpower) 1460619ef4b4SAnton Vorontsov ? "" : ", no poweroff", 1461619ef4b4SAnton Vorontsov (mmc->caps & MMC_CAP_NEEDS_POLL) 1462619ef4b4SAnton Vorontsov ? ", cd polling" : ""); 146315a0580cSDavid Brownell return 0; 146415a0580cSDavid Brownell 146515a0580cSDavid Brownell fail_add_host: 146615a0580cSDavid Brownell mmc_remove_host (mmc); 146715a0580cSDavid Brownell fail_glue_init: 146815a0580cSDavid Brownell if (host->dma_dev) 146915a0580cSDavid Brownell dma_unmap_single(host->dma_dev, host->data_dma, 147015a0580cSDavid Brownell sizeof(*host->data), DMA_BIDIRECTIONAL); 147115a0580cSDavid Brownell kfree(host->data); 147215a0580cSDavid Brownell 147315a0580cSDavid Brownell fail_nobuf1: 147415a0580cSDavid Brownell mmc_free_host(mmc); 14759c43df57SAnton Vorontsov mmc_spi_put_pdata(spi); 147615a0580cSDavid Brownell dev_set_drvdata(&spi->dev, NULL); 147715a0580cSDavid Brownell 147815a0580cSDavid Brownell nomem: 147915a0580cSDavid Brownell kfree(ones); 148015a0580cSDavid Brownell return status; 148115a0580cSDavid Brownell } 148215a0580cSDavid Brownell 148315a0580cSDavid Brownell 148415a0580cSDavid Brownell static int __devexit mmc_spi_remove(struct spi_device *spi) 148515a0580cSDavid Brownell { 148615a0580cSDavid Brownell struct mmc_host *mmc = dev_get_drvdata(&spi->dev); 148715a0580cSDavid Brownell struct mmc_spi_host *host; 148815a0580cSDavid Brownell 148915a0580cSDavid Brownell if (mmc) { 149015a0580cSDavid Brownell host = mmc_priv(mmc); 149115a0580cSDavid Brownell 149215a0580cSDavid Brownell /* prevent new mmc_detect_change() calls */ 149315a0580cSDavid Brownell if (host->pdata && host->pdata->exit) 149415a0580cSDavid Brownell host->pdata->exit(&spi->dev, mmc); 149515a0580cSDavid Brownell 149615a0580cSDavid Brownell mmc_remove_host(mmc); 149715a0580cSDavid Brownell 149815a0580cSDavid Brownell if (host->dma_dev) { 149915a0580cSDavid Brownell dma_unmap_single(host->dma_dev, host->ones_dma, 150015a0580cSDavid Brownell MMC_SPI_BLOCKSIZE, DMA_TO_DEVICE); 150115a0580cSDavid Brownell dma_unmap_single(host->dma_dev, host->data_dma, 150215a0580cSDavid Brownell sizeof(*host->data), DMA_BIDIRECTIONAL); 150315a0580cSDavid Brownell } 150415a0580cSDavid Brownell 150515a0580cSDavid Brownell kfree(host->data); 150615a0580cSDavid Brownell kfree(host->ones); 150715a0580cSDavid Brownell 150815a0580cSDavid Brownell spi->max_speed_hz = mmc->f_max; 150915a0580cSDavid Brownell mmc_free_host(mmc); 15109c43df57SAnton Vorontsov mmc_spi_put_pdata(spi); 151115a0580cSDavid Brownell dev_set_drvdata(&spi->dev, NULL); 151215a0580cSDavid Brownell } 151315a0580cSDavid Brownell return 0; 151415a0580cSDavid Brownell } 151515a0580cSDavid Brownell 151615a0580cSDavid Brownell 151715a0580cSDavid Brownell static struct spi_driver mmc_spi_driver = { 151815a0580cSDavid Brownell .driver = { 151915a0580cSDavid Brownell .name = "mmc_spi", 152015a0580cSDavid Brownell .bus = &spi_bus_type, 152115a0580cSDavid Brownell .owner = THIS_MODULE, 152215a0580cSDavid Brownell }, 152315a0580cSDavid Brownell .probe = mmc_spi_probe, 152415a0580cSDavid Brownell .remove = __devexit_p(mmc_spi_remove), 152515a0580cSDavid Brownell }; 152615a0580cSDavid Brownell 152715a0580cSDavid Brownell 152815a0580cSDavid Brownell static int __init mmc_spi_init(void) 152915a0580cSDavid Brownell { 153015a0580cSDavid Brownell return spi_register_driver(&mmc_spi_driver); 153115a0580cSDavid Brownell } 153215a0580cSDavid Brownell module_init(mmc_spi_init); 153315a0580cSDavid Brownell 153415a0580cSDavid Brownell 153515a0580cSDavid Brownell static void __exit mmc_spi_exit(void) 153615a0580cSDavid Brownell { 153715a0580cSDavid Brownell spi_unregister_driver(&mmc_spi_driver); 153815a0580cSDavid Brownell } 153915a0580cSDavid Brownell module_exit(mmc_spi_exit); 154015a0580cSDavid Brownell 154115a0580cSDavid Brownell 154215a0580cSDavid Brownell MODULE_AUTHOR("Mike Lavender, David Brownell, " 154315a0580cSDavid Brownell "Hans-Peter Nilsson, Jan Nikitenko"); 154415a0580cSDavid Brownell MODULE_DESCRIPTION("SPI SD/MMC host driver"); 154515a0580cSDavid Brownell MODULE_LICENSE("GPL"); 1546