1f95f3850SWill Newton /* 2f95f3850SWill Newton * Synopsys DesignWare Multimedia Card Interface driver 3f95f3850SWill Newton * (Based on NXP driver for lpc 31xx) 4f95f3850SWill Newton * 5f95f3850SWill Newton * Copyright (C) 2009 NXP Semiconductors 6f95f3850SWill Newton * Copyright (C) 2009, 2010 Imagination Technologies Ltd. 7f95f3850SWill Newton * 8f95f3850SWill Newton * This program is free software; you can redistribute it and/or modify 9f95f3850SWill Newton * it under the terms of the GNU General Public License as published by 10f95f3850SWill Newton * the Free Software Foundation; either version 2 of the License, or 11f95f3850SWill Newton * (at your option) any later version. 12f95f3850SWill Newton */ 13f95f3850SWill Newton 14f95f3850SWill Newton #include <linux/blkdev.h> 15f95f3850SWill Newton #include <linux/clk.h> 16f95f3850SWill Newton #include <linux/debugfs.h> 17f95f3850SWill Newton #include <linux/device.h> 18f95f3850SWill Newton #include <linux/dma-mapping.h> 19f95f3850SWill Newton #include <linux/err.h> 20f95f3850SWill Newton #include <linux/init.h> 21f95f3850SWill Newton #include <linux/interrupt.h> 22f95f3850SWill Newton #include <linux/ioport.h> 23f95f3850SWill Newton #include <linux/module.h> 24f95f3850SWill Newton #include <linux/platform_device.h> 25f95f3850SWill Newton #include <linux/seq_file.h> 26f95f3850SWill Newton #include <linux/slab.h> 27f95f3850SWill Newton #include <linux/stat.h> 28f95f3850SWill Newton #include <linux/delay.h> 29f95f3850SWill Newton #include <linux/irq.h> 30f95f3850SWill Newton #include <linux/mmc/host.h> 31f95f3850SWill Newton #include <linux/mmc/mmc.h> 32f95f3850SWill Newton #include <linux/mmc/dw_mmc.h> 33f95f3850SWill Newton #include <linux/bitops.h> 34c07946a3SJaehoon Chung #include <linux/regulator/consumer.h> 351791b13eSJames Hogan #include <linux/workqueue.h> 36f95f3850SWill Newton 37f95f3850SWill Newton #include "dw_mmc.h" 38f95f3850SWill Newton 39f95f3850SWill Newton /* Common flag combinations */ 40f95f3850SWill Newton #define DW_MCI_DATA_ERROR_FLAGS (SDMMC_INT_DTO | SDMMC_INT_DCRC | \ 41f95f3850SWill Newton SDMMC_INT_HTO | SDMMC_INT_SBE | \ 42f95f3850SWill Newton SDMMC_INT_EBE) 43f95f3850SWill Newton #define DW_MCI_CMD_ERROR_FLAGS (SDMMC_INT_RTO | SDMMC_INT_RCRC | \ 44f95f3850SWill Newton SDMMC_INT_RESP_ERR) 45f95f3850SWill Newton #define DW_MCI_ERROR_FLAGS (DW_MCI_DATA_ERROR_FLAGS | \ 46f95f3850SWill Newton DW_MCI_CMD_ERROR_FLAGS | SDMMC_INT_HLE) 47f95f3850SWill Newton #define DW_MCI_SEND_STATUS 1 48f95f3850SWill Newton #define DW_MCI_RECV_STATUS 2 49f95f3850SWill Newton #define DW_MCI_DMA_THRESHOLD 16 50f95f3850SWill Newton 51f95f3850SWill Newton #ifdef CONFIG_MMC_DW_IDMAC 52f95f3850SWill Newton struct idmac_desc { 53f95f3850SWill Newton u32 des0; /* Control Descriptor */ 54f95f3850SWill Newton #define IDMAC_DES0_DIC BIT(1) 55f95f3850SWill Newton #define IDMAC_DES0_LD BIT(2) 56f95f3850SWill Newton #define IDMAC_DES0_FD BIT(3) 57f95f3850SWill Newton #define IDMAC_DES0_CH BIT(4) 58f95f3850SWill Newton #define IDMAC_DES0_ER BIT(5) 59f95f3850SWill Newton #define IDMAC_DES0_CES BIT(30) 60f95f3850SWill Newton #define IDMAC_DES0_OWN BIT(31) 61f95f3850SWill Newton 62f95f3850SWill Newton u32 des1; /* Buffer sizes */ 63f95f3850SWill Newton #define IDMAC_SET_BUFFER1_SIZE(d, s) \ 649b7bbe10SShashidhar Hiremath ((d)->des1 = ((d)->des1 & 0x03ffe000) | ((s) & 0x1fff)) 65f95f3850SWill Newton 66f95f3850SWill Newton u32 des2; /* buffer 1 physical address */ 67f95f3850SWill Newton 68f95f3850SWill Newton u32 des3; /* buffer 2 physical address */ 69f95f3850SWill Newton }; 70f95f3850SWill Newton #endif /* CONFIG_MMC_DW_IDMAC */ 71f95f3850SWill Newton 72f95f3850SWill Newton /** 73f95f3850SWill Newton * struct dw_mci_slot - MMC slot state 74f95f3850SWill Newton * @mmc: The mmc_host representing this slot. 75f95f3850SWill Newton * @host: The MMC controller this slot is using. 76f95f3850SWill Newton * @ctype: Card type for this slot. 77f95f3850SWill Newton * @mrq: mmc_request currently being processed or waiting to be 78f95f3850SWill Newton * processed, or NULL when the slot is idle. 79f95f3850SWill Newton * @queue_node: List node for placing this node in the @queue list of 80f95f3850SWill Newton * &struct dw_mci. 81f95f3850SWill Newton * @clock: Clock rate configured by set_ios(). Protected by host->lock. 82f95f3850SWill Newton * @flags: Random state bits associated with the slot. 83f95f3850SWill Newton * @id: Number of this slot. 84f95f3850SWill Newton * @last_detect_state: Most recently observed card detect state. 85f95f3850SWill Newton */ 86f95f3850SWill Newton struct dw_mci_slot { 87f95f3850SWill Newton struct mmc_host *mmc; 88f95f3850SWill Newton struct dw_mci *host; 89f95f3850SWill Newton 90f95f3850SWill Newton u32 ctype; 91f95f3850SWill Newton 92f95f3850SWill Newton struct mmc_request *mrq; 93f95f3850SWill Newton struct list_head queue_node; 94f95f3850SWill Newton 95f95f3850SWill Newton unsigned int clock; 96f95f3850SWill Newton unsigned long flags; 97f95f3850SWill Newton #define DW_MMC_CARD_PRESENT 0 98f95f3850SWill Newton #define DW_MMC_CARD_NEED_INIT 1 99f95f3850SWill Newton int id; 100f95f3850SWill Newton int last_detect_state; 101f95f3850SWill Newton }; 102f95f3850SWill Newton 1031791b13eSJames Hogan static struct workqueue_struct *dw_mci_card_workqueue; 1041791b13eSJames Hogan 105f95f3850SWill Newton #if defined(CONFIG_DEBUG_FS) 106f95f3850SWill Newton static int dw_mci_req_show(struct seq_file *s, void *v) 107f95f3850SWill Newton { 108f95f3850SWill Newton struct dw_mci_slot *slot = s->private; 109f95f3850SWill Newton struct mmc_request *mrq; 110f95f3850SWill Newton struct mmc_command *cmd; 111f95f3850SWill Newton struct mmc_command *stop; 112f95f3850SWill Newton struct mmc_data *data; 113f95f3850SWill Newton 114f95f3850SWill Newton /* Make sure we get a consistent snapshot */ 115f95f3850SWill Newton spin_lock_bh(&slot->host->lock); 116f95f3850SWill Newton mrq = slot->mrq; 117f95f3850SWill Newton 118f95f3850SWill Newton if (mrq) { 119f95f3850SWill Newton cmd = mrq->cmd; 120f95f3850SWill Newton data = mrq->data; 121f95f3850SWill Newton stop = mrq->stop; 122f95f3850SWill Newton 123f95f3850SWill Newton if (cmd) 124f95f3850SWill Newton seq_printf(s, 125f95f3850SWill Newton "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n", 126f95f3850SWill Newton cmd->opcode, cmd->arg, cmd->flags, 127f95f3850SWill Newton cmd->resp[0], cmd->resp[1], cmd->resp[2], 128f95f3850SWill Newton cmd->resp[2], cmd->error); 129f95f3850SWill Newton if (data) 130f95f3850SWill Newton seq_printf(s, "DATA %u / %u * %u flg %x err %d\n", 131f95f3850SWill Newton data->bytes_xfered, data->blocks, 132f95f3850SWill Newton data->blksz, data->flags, data->error); 133f95f3850SWill Newton if (stop) 134f95f3850SWill Newton seq_printf(s, 135f95f3850SWill Newton "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n", 136f95f3850SWill Newton stop->opcode, stop->arg, stop->flags, 137f95f3850SWill Newton stop->resp[0], stop->resp[1], stop->resp[2], 138f95f3850SWill Newton stop->resp[2], stop->error); 139f95f3850SWill Newton } 140f95f3850SWill Newton 141f95f3850SWill Newton spin_unlock_bh(&slot->host->lock); 142f95f3850SWill Newton 143f95f3850SWill Newton return 0; 144f95f3850SWill Newton } 145f95f3850SWill Newton 146f95f3850SWill Newton static int dw_mci_req_open(struct inode *inode, struct file *file) 147f95f3850SWill Newton { 148f95f3850SWill Newton return single_open(file, dw_mci_req_show, inode->i_private); 149f95f3850SWill Newton } 150f95f3850SWill Newton 151f95f3850SWill Newton static const struct file_operations dw_mci_req_fops = { 152f95f3850SWill Newton .owner = THIS_MODULE, 153f95f3850SWill Newton .open = dw_mci_req_open, 154f95f3850SWill Newton .read = seq_read, 155f95f3850SWill Newton .llseek = seq_lseek, 156f95f3850SWill Newton .release = single_release, 157f95f3850SWill Newton }; 158f95f3850SWill Newton 159f95f3850SWill Newton static int dw_mci_regs_show(struct seq_file *s, void *v) 160f95f3850SWill Newton { 161f95f3850SWill Newton seq_printf(s, "STATUS:\t0x%08x\n", SDMMC_STATUS); 162f95f3850SWill Newton seq_printf(s, "RINTSTS:\t0x%08x\n", SDMMC_RINTSTS); 163f95f3850SWill Newton seq_printf(s, "CMD:\t0x%08x\n", SDMMC_CMD); 164f95f3850SWill Newton seq_printf(s, "CTRL:\t0x%08x\n", SDMMC_CTRL); 165f95f3850SWill Newton seq_printf(s, "INTMASK:\t0x%08x\n", SDMMC_INTMASK); 166f95f3850SWill Newton seq_printf(s, "CLKENA:\t0x%08x\n", SDMMC_CLKENA); 167f95f3850SWill Newton 168f95f3850SWill Newton return 0; 169f95f3850SWill Newton } 170f95f3850SWill Newton 171f95f3850SWill Newton static int dw_mci_regs_open(struct inode *inode, struct file *file) 172f95f3850SWill Newton { 173f95f3850SWill Newton return single_open(file, dw_mci_regs_show, inode->i_private); 174f95f3850SWill Newton } 175f95f3850SWill Newton 176f95f3850SWill Newton static const struct file_operations dw_mci_regs_fops = { 177f95f3850SWill Newton .owner = THIS_MODULE, 178f95f3850SWill Newton .open = dw_mci_regs_open, 179f95f3850SWill Newton .read = seq_read, 180f95f3850SWill Newton .llseek = seq_lseek, 181f95f3850SWill Newton .release = single_release, 182f95f3850SWill Newton }; 183f95f3850SWill Newton 184f95f3850SWill Newton static void dw_mci_init_debugfs(struct dw_mci_slot *slot) 185f95f3850SWill Newton { 186f95f3850SWill Newton struct mmc_host *mmc = slot->mmc; 187f95f3850SWill Newton struct dw_mci *host = slot->host; 188f95f3850SWill Newton struct dentry *root; 189f95f3850SWill Newton struct dentry *node; 190f95f3850SWill Newton 191f95f3850SWill Newton root = mmc->debugfs_root; 192f95f3850SWill Newton if (!root) 193f95f3850SWill Newton return; 194f95f3850SWill Newton 195f95f3850SWill Newton node = debugfs_create_file("regs", S_IRUSR, root, host, 196f95f3850SWill Newton &dw_mci_regs_fops); 197f95f3850SWill Newton if (!node) 198f95f3850SWill Newton goto err; 199f95f3850SWill Newton 200f95f3850SWill Newton node = debugfs_create_file("req", S_IRUSR, root, slot, 201f95f3850SWill Newton &dw_mci_req_fops); 202f95f3850SWill Newton if (!node) 203f95f3850SWill Newton goto err; 204f95f3850SWill Newton 205f95f3850SWill Newton node = debugfs_create_u32("state", S_IRUSR, root, (u32 *)&host->state); 206f95f3850SWill Newton if (!node) 207f95f3850SWill Newton goto err; 208f95f3850SWill Newton 209f95f3850SWill Newton node = debugfs_create_x32("pending_events", S_IRUSR, root, 210f95f3850SWill Newton (u32 *)&host->pending_events); 211f95f3850SWill Newton if (!node) 212f95f3850SWill Newton goto err; 213f95f3850SWill Newton 214f95f3850SWill Newton node = debugfs_create_x32("completed_events", S_IRUSR, root, 215f95f3850SWill Newton (u32 *)&host->completed_events); 216f95f3850SWill Newton if (!node) 217f95f3850SWill Newton goto err; 218f95f3850SWill Newton 219f95f3850SWill Newton return; 220f95f3850SWill Newton 221f95f3850SWill Newton err: 222f95f3850SWill Newton dev_err(&mmc->class_dev, "failed to initialize debugfs for slot\n"); 223f95f3850SWill Newton } 224f95f3850SWill Newton #endif /* defined(CONFIG_DEBUG_FS) */ 225f95f3850SWill Newton 226f95f3850SWill Newton static void dw_mci_set_timeout(struct dw_mci *host) 227f95f3850SWill Newton { 228f95f3850SWill Newton /* timeout (maximum) */ 229f95f3850SWill Newton mci_writel(host, TMOUT, 0xffffffff); 230f95f3850SWill Newton } 231f95f3850SWill Newton 232f95f3850SWill Newton static u32 dw_mci_prepare_command(struct mmc_host *mmc, struct mmc_command *cmd) 233f95f3850SWill Newton { 234f95f3850SWill Newton struct mmc_data *data; 235f95f3850SWill Newton u32 cmdr; 236f95f3850SWill Newton cmd->error = -EINPROGRESS; 237f95f3850SWill Newton 238f95f3850SWill Newton cmdr = cmd->opcode; 239f95f3850SWill Newton 240f95f3850SWill Newton if (cmdr == MMC_STOP_TRANSMISSION) 241f95f3850SWill Newton cmdr |= SDMMC_CMD_STOP; 242f95f3850SWill Newton else 243f95f3850SWill Newton cmdr |= SDMMC_CMD_PRV_DAT_WAIT; 244f95f3850SWill Newton 245f95f3850SWill Newton if (cmd->flags & MMC_RSP_PRESENT) { 246f95f3850SWill Newton /* We expect a response, so set this bit */ 247f95f3850SWill Newton cmdr |= SDMMC_CMD_RESP_EXP; 248f95f3850SWill Newton if (cmd->flags & MMC_RSP_136) 249f95f3850SWill Newton cmdr |= SDMMC_CMD_RESP_LONG; 250f95f3850SWill Newton } 251f95f3850SWill Newton 252f95f3850SWill Newton if (cmd->flags & MMC_RSP_CRC) 253f95f3850SWill Newton cmdr |= SDMMC_CMD_RESP_CRC; 254f95f3850SWill Newton 255f95f3850SWill Newton data = cmd->data; 256f95f3850SWill Newton if (data) { 257f95f3850SWill Newton cmdr |= SDMMC_CMD_DAT_EXP; 258f95f3850SWill Newton if (data->flags & MMC_DATA_STREAM) 259f95f3850SWill Newton cmdr |= SDMMC_CMD_STRM_MODE; 260f95f3850SWill Newton if (data->flags & MMC_DATA_WRITE) 261f95f3850SWill Newton cmdr |= SDMMC_CMD_DAT_WR; 262f95f3850SWill Newton } 263f95f3850SWill Newton 264f95f3850SWill Newton return cmdr; 265f95f3850SWill Newton } 266f95f3850SWill Newton 267f95f3850SWill Newton static void dw_mci_start_command(struct dw_mci *host, 268f95f3850SWill Newton struct mmc_command *cmd, u32 cmd_flags) 269f95f3850SWill Newton { 270f95f3850SWill Newton host->cmd = cmd; 27162ca8034SShashidhar Hiremath dev_vdbg(&host->dev, 272f95f3850SWill Newton "start command: ARGR=0x%08x CMDR=0x%08x\n", 273f95f3850SWill Newton cmd->arg, cmd_flags); 274f95f3850SWill Newton 275f95f3850SWill Newton mci_writel(host, CMDARG, cmd->arg); 276f95f3850SWill Newton wmb(); 277f95f3850SWill Newton 278f95f3850SWill Newton mci_writel(host, CMD, cmd_flags | SDMMC_CMD_START); 279f95f3850SWill Newton } 280f95f3850SWill Newton 281f95f3850SWill Newton static void send_stop_cmd(struct dw_mci *host, struct mmc_data *data) 282f95f3850SWill Newton { 283f95f3850SWill Newton dw_mci_start_command(host, data->stop, host->stop_cmdr); 284f95f3850SWill Newton } 285f95f3850SWill Newton 286f95f3850SWill Newton /* DMA interface functions */ 287f95f3850SWill Newton static void dw_mci_stop_dma(struct dw_mci *host) 288f95f3850SWill Newton { 28903e8cb53SJames Hogan if (host->using_dma) { 290f95f3850SWill Newton host->dma_ops->stop(host); 291f95f3850SWill Newton host->dma_ops->cleanup(host); 292f95f3850SWill Newton } else { 293f95f3850SWill Newton /* Data transfer was stopped by the interrupt handler */ 294f95f3850SWill Newton set_bit(EVENT_XFER_COMPLETE, &host->pending_events); 295f95f3850SWill Newton } 296f95f3850SWill Newton } 297f95f3850SWill Newton 298f95f3850SWill Newton #ifdef CONFIG_MMC_DW_IDMAC 2999aa51408SSeungwon Jeon static int dw_mci_get_dma_dir(struct mmc_data *data) 3009aa51408SSeungwon Jeon { 3019aa51408SSeungwon Jeon if (data->flags & MMC_DATA_WRITE) 3029aa51408SSeungwon Jeon return DMA_TO_DEVICE; 3039aa51408SSeungwon Jeon else 3049aa51408SSeungwon Jeon return DMA_FROM_DEVICE; 3059aa51408SSeungwon Jeon } 3069aa51408SSeungwon Jeon 307f95f3850SWill Newton static void dw_mci_dma_cleanup(struct dw_mci *host) 308f95f3850SWill Newton { 309f95f3850SWill Newton struct mmc_data *data = host->data; 310f95f3850SWill Newton 311f95f3850SWill Newton if (data) 3129aa51408SSeungwon Jeon if (!data->host_cookie) 3139aa51408SSeungwon Jeon dma_unmap_sg(&host->dev, 3149aa51408SSeungwon Jeon data->sg, 3159aa51408SSeungwon Jeon data->sg_len, 3169aa51408SSeungwon Jeon dw_mci_get_dma_dir(data)); 317f95f3850SWill Newton } 318f95f3850SWill Newton 319f95f3850SWill Newton static void dw_mci_idmac_stop_dma(struct dw_mci *host) 320f95f3850SWill Newton { 321f95f3850SWill Newton u32 temp; 322f95f3850SWill Newton 323f95f3850SWill Newton /* Disable and reset the IDMAC interface */ 324f95f3850SWill Newton temp = mci_readl(host, CTRL); 325f95f3850SWill Newton temp &= ~SDMMC_CTRL_USE_IDMAC; 326f95f3850SWill Newton temp |= SDMMC_CTRL_DMA_RESET; 327f95f3850SWill Newton mci_writel(host, CTRL, temp); 328f95f3850SWill Newton 329f95f3850SWill Newton /* Stop the IDMAC running */ 330f95f3850SWill Newton temp = mci_readl(host, BMOD); 331a5289a43SJaehoon Chung temp &= ~(SDMMC_IDMAC_ENABLE | SDMMC_IDMAC_FB); 332f95f3850SWill Newton mci_writel(host, BMOD, temp); 333f95f3850SWill Newton } 334f95f3850SWill Newton 335f95f3850SWill Newton static void dw_mci_idmac_complete_dma(struct dw_mci *host) 336f95f3850SWill Newton { 337f95f3850SWill Newton struct mmc_data *data = host->data; 338f95f3850SWill Newton 33962ca8034SShashidhar Hiremath dev_vdbg(&host->dev, "DMA complete\n"); 340f95f3850SWill Newton 341f95f3850SWill Newton host->dma_ops->cleanup(host); 342f95f3850SWill Newton 343f95f3850SWill Newton /* 344f95f3850SWill Newton * If the card was removed, data will be NULL. No point in trying to 345f95f3850SWill Newton * send the stop command or waiting for NBUSY in this case. 346f95f3850SWill Newton */ 347f95f3850SWill Newton if (data) { 348f95f3850SWill Newton set_bit(EVENT_XFER_COMPLETE, &host->pending_events); 349f95f3850SWill Newton tasklet_schedule(&host->tasklet); 350f95f3850SWill Newton } 351f95f3850SWill Newton } 352f95f3850SWill Newton 353f95f3850SWill Newton static void dw_mci_translate_sglist(struct dw_mci *host, struct mmc_data *data, 354f95f3850SWill Newton unsigned int sg_len) 355f95f3850SWill Newton { 356f95f3850SWill Newton int i; 357f95f3850SWill Newton struct idmac_desc *desc = host->sg_cpu; 358f95f3850SWill Newton 359f95f3850SWill Newton for (i = 0; i < sg_len; i++, desc++) { 360f95f3850SWill Newton unsigned int length = sg_dma_len(&data->sg[i]); 361f95f3850SWill Newton u32 mem_addr = sg_dma_address(&data->sg[i]); 362f95f3850SWill Newton 363f95f3850SWill Newton /* Set the OWN bit and disable interrupts for this descriptor */ 364f95f3850SWill Newton desc->des0 = IDMAC_DES0_OWN | IDMAC_DES0_DIC | IDMAC_DES0_CH; 365f95f3850SWill Newton 366f95f3850SWill Newton /* Buffer length */ 367f95f3850SWill Newton IDMAC_SET_BUFFER1_SIZE(desc, length); 368f95f3850SWill Newton 369f95f3850SWill Newton /* Physical address to DMA to/from */ 370f95f3850SWill Newton desc->des2 = mem_addr; 371f95f3850SWill Newton } 372f95f3850SWill Newton 373f95f3850SWill Newton /* Set first descriptor */ 374f95f3850SWill Newton desc = host->sg_cpu; 375f95f3850SWill Newton desc->des0 |= IDMAC_DES0_FD; 376f95f3850SWill Newton 377f95f3850SWill Newton /* Set last descriptor */ 378f95f3850SWill Newton desc = host->sg_cpu + (i - 1) * sizeof(struct idmac_desc); 379f95f3850SWill Newton desc->des0 &= ~(IDMAC_DES0_CH | IDMAC_DES0_DIC); 380f95f3850SWill Newton desc->des0 |= IDMAC_DES0_LD; 381f95f3850SWill Newton 382f95f3850SWill Newton wmb(); 383f95f3850SWill Newton } 384f95f3850SWill Newton 385f95f3850SWill Newton static void dw_mci_idmac_start_dma(struct dw_mci *host, unsigned int sg_len) 386f95f3850SWill Newton { 387f95f3850SWill Newton u32 temp; 388f95f3850SWill Newton 389f95f3850SWill Newton dw_mci_translate_sglist(host, host->data, sg_len); 390f95f3850SWill Newton 391f95f3850SWill Newton /* Select IDMAC interface */ 392f95f3850SWill Newton temp = mci_readl(host, CTRL); 393f95f3850SWill Newton temp |= SDMMC_CTRL_USE_IDMAC; 394f95f3850SWill Newton mci_writel(host, CTRL, temp); 395f95f3850SWill Newton 396f95f3850SWill Newton wmb(); 397f95f3850SWill Newton 398f95f3850SWill Newton /* Enable the IDMAC */ 399f95f3850SWill Newton temp = mci_readl(host, BMOD); 400a5289a43SJaehoon Chung temp |= SDMMC_IDMAC_ENABLE | SDMMC_IDMAC_FB; 401f95f3850SWill Newton mci_writel(host, BMOD, temp); 402f95f3850SWill Newton 403f95f3850SWill Newton /* Start it running */ 404f95f3850SWill Newton mci_writel(host, PLDMND, 1); 405f95f3850SWill Newton } 406f95f3850SWill Newton 407f95f3850SWill Newton static int dw_mci_idmac_init(struct dw_mci *host) 408f95f3850SWill Newton { 409f95f3850SWill Newton struct idmac_desc *p; 410f95f3850SWill Newton int i; 411f95f3850SWill Newton 412f95f3850SWill Newton /* Number of descriptors in the ring buffer */ 413f95f3850SWill Newton host->ring_size = PAGE_SIZE / sizeof(struct idmac_desc); 414f95f3850SWill Newton 415f95f3850SWill Newton /* Forward link the descriptor list */ 416f95f3850SWill Newton for (i = 0, p = host->sg_cpu; i < host->ring_size - 1; i++, p++) 417f95f3850SWill Newton p->des3 = host->sg_dma + (sizeof(struct idmac_desc) * (i + 1)); 418f95f3850SWill Newton 419f95f3850SWill Newton /* Set the last descriptor as the end-of-ring descriptor */ 420f95f3850SWill Newton p->des3 = host->sg_dma; 421f95f3850SWill Newton p->des0 = IDMAC_DES0_ER; 422f95f3850SWill Newton 423f95f3850SWill Newton /* Mask out interrupts - get Tx & Rx complete only */ 424f95f3850SWill Newton mci_writel(host, IDINTEN, SDMMC_IDMAC_INT_NI | SDMMC_IDMAC_INT_RI | 425f95f3850SWill Newton SDMMC_IDMAC_INT_TI); 426f95f3850SWill Newton 427f95f3850SWill Newton /* Set the descriptor base address */ 428f95f3850SWill Newton mci_writel(host, DBADDR, host->sg_dma); 429f95f3850SWill Newton return 0; 430f95f3850SWill Newton } 431f95f3850SWill Newton 4329aa51408SSeungwon Jeon static int dw_mci_pre_dma_transfer(struct dw_mci *host, 4339aa51408SSeungwon Jeon struct mmc_data *data, 4349aa51408SSeungwon Jeon bool next) 435f95f3850SWill Newton { 436f95f3850SWill Newton struct scatterlist *sg; 4379aa51408SSeungwon Jeon unsigned int i, sg_len; 438f95f3850SWill Newton 4399aa51408SSeungwon Jeon if (!next && data->host_cookie) 4409aa51408SSeungwon Jeon return data->host_cookie; 441f95f3850SWill Newton 442f95f3850SWill Newton /* 443f95f3850SWill Newton * We don't do DMA on "complex" transfers, i.e. with 444f95f3850SWill Newton * non-word-aligned buffers or lengths. Also, we don't bother 445f95f3850SWill Newton * with all the DMA setup overhead for short transfers. 446f95f3850SWill Newton */ 447f95f3850SWill Newton if (data->blocks * data->blksz < DW_MCI_DMA_THRESHOLD) 448f95f3850SWill Newton return -EINVAL; 4499aa51408SSeungwon Jeon 450f95f3850SWill Newton if (data->blksz & 3) 451f95f3850SWill Newton return -EINVAL; 452f95f3850SWill Newton 453f95f3850SWill Newton for_each_sg(data->sg, sg, data->sg_len, i) { 454f95f3850SWill Newton if (sg->offset & 3 || sg->length & 3) 455f95f3850SWill Newton return -EINVAL; 456f95f3850SWill Newton } 457f95f3850SWill Newton 4589aa51408SSeungwon Jeon sg_len = dma_map_sg(&host->dev, 4599aa51408SSeungwon Jeon data->sg, 4609aa51408SSeungwon Jeon data->sg_len, 4619aa51408SSeungwon Jeon dw_mci_get_dma_dir(data)); 4629aa51408SSeungwon Jeon if (sg_len == 0) 4639aa51408SSeungwon Jeon return -EINVAL; 4649aa51408SSeungwon Jeon 4659aa51408SSeungwon Jeon if (next) 4669aa51408SSeungwon Jeon data->host_cookie = sg_len; 4679aa51408SSeungwon Jeon 4689aa51408SSeungwon Jeon return sg_len; 4699aa51408SSeungwon Jeon } 4709aa51408SSeungwon Jeon 4719aa51408SSeungwon Jeon static struct dw_mci_dma_ops dw_mci_idmac_ops = { 4729aa51408SSeungwon Jeon .init = dw_mci_idmac_init, 4739aa51408SSeungwon Jeon .start = dw_mci_idmac_start_dma, 4749aa51408SSeungwon Jeon .stop = dw_mci_idmac_stop_dma, 4759aa51408SSeungwon Jeon .complete = dw_mci_idmac_complete_dma, 4769aa51408SSeungwon Jeon .cleanup = dw_mci_dma_cleanup, 4779aa51408SSeungwon Jeon }; 4789aa51408SSeungwon Jeon #else 4799aa51408SSeungwon Jeon static int dw_mci_pre_dma_transfer(struct dw_mci *host, 4809aa51408SSeungwon Jeon struct mmc_data *data, 4819aa51408SSeungwon Jeon bool next) 4829aa51408SSeungwon Jeon { 4839aa51408SSeungwon Jeon return -ENOSYS; 4849aa51408SSeungwon Jeon } 4859aa51408SSeungwon Jeon #endif /* CONFIG_MMC_DW_IDMAC */ 4869aa51408SSeungwon Jeon 4879aa51408SSeungwon Jeon static void dw_mci_pre_req(struct mmc_host *mmc, 4889aa51408SSeungwon Jeon struct mmc_request *mrq, 4899aa51408SSeungwon Jeon bool is_first_req) 4909aa51408SSeungwon Jeon { 4919aa51408SSeungwon Jeon struct dw_mci_slot *slot = mmc_priv(mmc); 4929aa51408SSeungwon Jeon struct mmc_data *data = mrq->data; 4939aa51408SSeungwon Jeon 4949aa51408SSeungwon Jeon if (!slot->host->use_dma || !data) 4959aa51408SSeungwon Jeon return; 4969aa51408SSeungwon Jeon 4979aa51408SSeungwon Jeon if (data->host_cookie) { 4989aa51408SSeungwon Jeon data->host_cookie = 0; 4999aa51408SSeungwon Jeon return; 5009aa51408SSeungwon Jeon } 5019aa51408SSeungwon Jeon 5029aa51408SSeungwon Jeon if (dw_mci_pre_dma_transfer(slot->host, mrq->data, 1) < 0) 5039aa51408SSeungwon Jeon data->host_cookie = 0; 5049aa51408SSeungwon Jeon } 5059aa51408SSeungwon Jeon 5069aa51408SSeungwon Jeon static void dw_mci_post_req(struct mmc_host *mmc, 5079aa51408SSeungwon Jeon struct mmc_request *mrq, 5089aa51408SSeungwon Jeon int err) 5099aa51408SSeungwon Jeon { 5109aa51408SSeungwon Jeon struct dw_mci_slot *slot = mmc_priv(mmc); 5119aa51408SSeungwon Jeon struct mmc_data *data = mrq->data; 5129aa51408SSeungwon Jeon 5139aa51408SSeungwon Jeon if (!slot->host->use_dma || !data) 5149aa51408SSeungwon Jeon return; 5159aa51408SSeungwon Jeon 5169aa51408SSeungwon Jeon if (data->host_cookie) 5179aa51408SSeungwon Jeon dma_unmap_sg(&slot->host->dev, 5189aa51408SSeungwon Jeon data->sg, 5199aa51408SSeungwon Jeon data->sg_len, 5209aa51408SSeungwon Jeon dw_mci_get_dma_dir(data)); 5219aa51408SSeungwon Jeon data->host_cookie = 0; 5229aa51408SSeungwon Jeon } 5239aa51408SSeungwon Jeon 5249aa51408SSeungwon Jeon static int dw_mci_submit_data_dma(struct dw_mci *host, struct mmc_data *data) 5259aa51408SSeungwon Jeon { 5269aa51408SSeungwon Jeon int sg_len; 5279aa51408SSeungwon Jeon u32 temp; 5289aa51408SSeungwon Jeon 5299aa51408SSeungwon Jeon host->using_dma = 0; 5309aa51408SSeungwon Jeon 5319aa51408SSeungwon Jeon /* If we don't have a channel, we can't do DMA */ 5329aa51408SSeungwon Jeon if (!host->use_dma) 5339aa51408SSeungwon Jeon return -ENODEV; 5349aa51408SSeungwon Jeon 5359aa51408SSeungwon Jeon sg_len = dw_mci_pre_dma_transfer(host, data, 0); 5369aa51408SSeungwon Jeon if (sg_len < 0) 5379aa51408SSeungwon Jeon return sg_len; 5389aa51408SSeungwon Jeon 53903e8cb53SJames Hogan host->using_dma = 1; 54003e8cb53SJames Hogan 54162ca8034SShashidhar Hiremath dev_vdbg(&host->dev, 542f95f3850SWill Newton "sd sg_cpu: %#lx sg_dma: %#lx sg_len: %d\n", 543f95f3850SWill Newton (unsigned long)host->sg_cpu, (unsigned long)host->sg_dma, 544f95f3850SWill Newton sg_len); 545f95f3850SWill Newton 546f95f3850SWill Newton /* Enable the DMA interface */ 547f95f3850SWill Newton temp = mci_readl(host, CTRL); 548f95f3850SWill Newton temp |= SDMMC_CTRL_DMA_ENABLE; 549f95f3850SWill Newton mci_writel(host, CTRL, temp); 550f95f3850SWill Newton 551f95f3850SWill Newton /* Disable RX/TX IRQs, let DMA handle it */ 552f95f3850SWill Newton temp = mci_readl(host, INTMASK); 553f95f3850SWill Newton temp &= ~(SDMMC_INT_RXDR | SDMMC_INT_TXDR); 554f95f3850SWill Newton mci_writel(host, INTMASK, temp); 555f95f3850SWill Newton 556f95f3850SWill Newton host->dma_ops->start(host, sg_len); 557f95f3850SWill Newton 558f95f3850SWill Newton return 0; 559f95f3850SWill Newton } 560f95f3850SWill Newton 561f95f3850SWill Newton static void dw_mci_submit_data(struct dw_mci *host, struct mmc_data *data) 562f95f3850SWill Newton { 563f95f3850SWill Newton u32 temp; 564f95f3850SWill Newton 565f95f3850SWill Newton data->error = -EINPROGRESS; 566f95f3850SWill Newton 567f95f3850SWill Newton WARN_ON(host->data); 568f95f3850SWill Newton host->sg = NULL; 569f95f3850SWill Newton host->data = data; 570f95f3850SWill Newton 57155c5efbcSJames Hogan if (data->flags & MMC_DATA_READ) 57255c5efbcSJames Hogan host->dir_status = DW_MCI_RECV_STATUS; 57355c5efbcSJames Hogan else 57455c5efbcSJames Hogan host->dir_status = DW_MCI_SEND_STATUS; 57555c5efbcSJames Hogan 576f95f3850SWill Newton if (dw_mci_submit_data_dma(host, data)) { 577f9c2a0dcSSeungwon Jeon int flags = SG_MITER_ATOMIC; 578f9c2a0dcSSeungwon Jeon if (host->data->flags & MMC_DATA_READ) 579f9c2a0dcSSeungwon Jeon flags |= SG_MITER_TO_SG; 580f9c2a0dcSSeungwon Jeon else 581f9c2a0dcSSeungwon Jeon flags |= SG_MITER_FROM_SG; 582f9c2a0dcSSeungwon Jeon 583f9c2a0dcSSeungwon Jeon sg_miter_start(&host->sg_miter, data->sg, data->sg_len, flags); 584f95f3850SWill Newton host->sg = data->sg; 58534b664a2SJames Hogan host->part_buf_start = 0; 58634b664a2SJames Hogan host->part_buf_count = 0; 587f95f3850SWill Newton 588b40af3aaSJames Hogan mci_writel(host, RINTSTS, SDMMC_INT_TXDR | SDMMC_INT_RXDR); 589f95f3850SWill Newton temp = mci_readl(host, INTMASK); 590f95f3850SWill Newton temp |= SDMMC_INT_TXDR | SDMMC_INT_RXDR; 591f95f3850SWill Newton mci_writel(host, INTMASK, temp); 592f95f3850SWill Newton 593f95f3850SWill Newton temp = mci_readl(host, CTRL); 594f95f3850SWill Newton temp &= ~SDMMC_CTRL_DMA_ENABLE; 595f95f3850SWill Newton mci_writel(host, CTRL, temp); 596f95f3850SWill Newton } 597f95f3850SWill Newton } 598f95f3850SWill Newton 599f95f3850SWill Newton static void mci_send_cmd(struct dw_mci_slot *slot, u32 cmd, u32 arg) 600f95f3850SWill Newton { 601f95f3850SWill Newton struct dw_mci *host = slot->host; 602f95f3850SWill Newton unsigned long timeout = jiffies + msecs_to_jiffies(500); 603f95f3850SWill Newton unsigned int cmd_status = 0; 604f95f3850SWill Newton 605f95f3850SWill Newton mci_writel(host, CMDARG, arg); 606f95f3850SWill Newton wmb(); 607f95f3850SWill Newton mci_writel(host, CMD, SDMMC_CMD_START | cmd); 608f95f3850SWill Newton 609f95f3850SWill Newton while (time_before(jiffies, timeout)) { 610f95f3850SWill Newton cmd_status = mci_readl(host, CMD); 611f95f3850SWill Newton if (!(cmd_status & SDMMC_CMD_START)) 612f95f3850SWill Newton return; 613f95f3850SWill Newton } 614f95f3850SWill Newton dev_err(&slot->mmc->class_dev, 615f95f3850SWill Newton "Timeout sending command (cmd %#x arg %#x status %#x)\n", 616f95f3850SWill Newton cmd, arg, cmd_status); 617f95f3850SWill Newton } 618f95f3850SWill Newton 619f95f3850SWill Newton static void dw_mci_setup_bus(struct dw_mci_slot *slot) 620f95f3850SWill Newton { 621f95f3850SWill Newton struct dw_mci *host = slot->host; 622f95f3850SWill Newton u32 div; 623f95f3850SWill Newton 624f95f3850SWill Newton if (slot->clock != host->current_speed) { 625f95f3850SWill Newton if (host->bus_hz % slot->clock) 626f95f3850SWill Newton /* 627f95f3850SWill Newton * move the + 1 after the divide to prevent 628f95f3850SWill Newton * over-clocking the card. 629f95f3850SWill Newton */ 630f95f3850SWill Newton div = ((host->bus_hz / slot->clock) >> 1) + 1; 631f95f3850SWill Newton else 632f95f3850SWill Newton div = (host->bus_hz / slot->clock) >> 1; 633f95f3850SWill Newton 634f95f3850SWill Newton dev_info(&slot->mmc->class_dev, 635f95f3850SWill Newton "Bus speed (slot %d) = %dHz (slot req %dHz, actual %dHZ" 636f95f3850SWill Newton " div = %d)\n", slot->id, host->bus_hz, slot->clock, 637f95f3850SWill Newton div ? ((host->bus_hz / div) >> 1) : host->bus_hz, div); 638f95f3850SWill Newton 639f95f3850SWill Newton /* disable clock */ 640f95f3850SWill Newton mci_writel(host, CLKENA, 0); 641f95f3850SWill Newton mci_writel(host, CLKSRC, 0); 642f95f3850SWill Newton 643f95f3850SWill Newton /* inform CIU */ 644f95f3850SWill Newton mci_send_cmd(slot, 645f95f3850SWill Newton SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0); 646f95f3850SWill Newton 647f95f3850SWill Newton /* set clock to desired speed */ 648f95f3850SWill Newton mci_writel(host, CLKDIV, div); 649f95f3850SWill Newton 650f95f3850SWill Newton /* inform CIU */ 651f95f3850SWill Newton mci_send_cmd(slot, 652f95f3850SWill Newton SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0); 653f95f3850SWill Newton 654f95f3850SWill Newton /* enable clock */ 655aadb9f41SWill Newton mci_writel(host, CLKENA, SDMMC_CLKEN_ENABLE | 656aadb9f41SWill Newton SDMMC_CLKEN_LOW_PWR); 657f95f3850SWill Newton 658f95f3850SWill Newton /* inform CIU */ 659f95f3850SWill Newton mci_send_cmd(slot, 660f95f3850SWill Newton SDMMC_CMD_UPD_CLK | SDMMC_CMD_PRV_DAT_WAIT, 0); 661f95f3850SWill Newton 662f95f3850SWill Newton host->current_speed = slot->clock; 663f95f3850SWill Newton } 664f95f3850SWill Newton 665f95f3850SWill Newton /* Set the current slot bus width */ 6661d56c453SSeungwon Jeon mci_writel(host, CTYPE, (slot->ctype << slot->id)); 667f95f3850SWill Newton } 668f95f3850SWill Newton 669053b3ce6SSeungwon Jeon static void __dw_mci_start_request(struct dw_mci *host, 670053b3ce6SSeungwon Jeon struct dw_mci_slot *slot, 671053b3ce6SSeungwon Jeon struct mmc_command *cmd) 672f95f3850SWill Newton { 673f95f3850SWill Newton struct mmc_request *mrq; 674f95f3850SWill Newton struct mmc_data *data; 675f95f3850SWill Newton u32 cmdflags; 676f95f3850SWill Newton 677f95f3850SWill Newton mrq = slot->mrq; 678f95f3850SWill Newton if (host->pdata->select_slot) 679f95f3850SWill Newton host->pdata->select_slot(slot->id); 680f95f3850SWill Newton 681f95f3850SWill Newton /* Slot specific timing and width adjustment */ 682f95f3850SWill Newton dw_mci_setup_bus(slot); 683f95f3850SWill Newton 684f95f3850SWill Newton host->cur_slot = slot; 685f95f3850SWill Newton host->mrq = mrq; 686f95f3850SWill Newton 687f95f3850SWill Newton host->pending_events = 0; 688f95f3850SWill Newton host->completed_events = 0; 689f95f3850SWill Newton host->data_status = 0; 690f95f3850SWill Newton 691053b3ce6SSeungwon Jeon data = cmd->data; 692f95f3850SWill Newton if (data) { 693f95f3850SWill Newton dw_mci_set_timeout(host); 694f95f3850SWill Newton mci_writel(host, BYTCNT, data->blksz*data->blocks); 695f95f3850SWill Newton mci_writel(host, BLKSIZ, data->blksz); 696f95f3850SWill Newton } 697f95f3850SWill Newton 698f95f3850SWill Newton cmdflags = dw_mci_prepare_command(slot->mmc, cmd); 699f95f3850SWill Newton 700f95f3850SWill Newton /* this is the first command, send the initialization clock */ 701f95f3850SWill Newton if (test_and_clear_bit(DW_MMC_CARD_NEED_INIT, &slot->flags)) 702f95f3850SWill Newton cmdflags |= SDMMC_CMD_INIT; 703f95f3850SWill Newton 704f95f3850SWill Newton if (data) { 705f95f3850SWill Newton dw_mci_submit_data(host, data); 706f95f3850SWill Newton wmb(); 707f95f3850SWill Newton } 708f95f3850SWill Newton 709f95f3850SWill Newton dw_mci_start_command(host, cmd, cmdflags); 710f95f3850SWill Newton 711f95f3850SWill Newton if (mrq->stop) 712f95f3850SWill Newton host->stop_cmdr = dw_mci_prepare_command(slot->mmc, mrq->stop); 713f95f3850SWill Newton } 714f95f3850SWill Newton 715053b3ce6SSeungwon Jeon static void dw_mci_start_request(struct dw_mci *host, 716053b3ce6SSeungwon Jeon struct dw_mci_slot *slot) 717053b3ce6SSeungwon Jeon { 718053b3ce6SSeungwon Jeon struct mmc_request *mrq = slot->mrq; 719053b3ce6SSeungwon Jeon struct mmc_command *cmd; 720053b3ce6SSeungwon Jeon 721053b3ce6SSeungwon Jeon cmd = mrq->sbc ? mrq->sbc : mrq->cmd; 722053b3ce6SSeungwon Jeon __dw_mci_start_request(host, slot, cmd); 723053b3ce6SSeungwon Jeon } 724053b3ce6SSeungwon Jeon 7257456caaeSJames Hogan /* must be called with host->lock held */ 726f95f3850SWill Newton static void dw_mci_queue_request(struct dw_mci *host, struct dw_mci_slot *slot, 727f95f3850SWill Newton struct mmc_request *mrq) 728f95f3850SWill Newton { 729f95f3850SWill Newton dev_vdbg(&slot->mmc->class_dev, "queue request: state=%d\n", 730f95f3850SWill Newton host->state); 731f95f3850SWill Newton 732f95f3850SWill Newton slot->mrq = mrq; 733f95f3850SWill Newton 734f95f3850SWill Newton if (host->state == STATE_IDLE) { 735f95f3850SWill Newton host->state = STATE_SENDING_CMD; 736f95f3850SWill Newton dw_mci_start_request(host, slot); 737f95f3850SWill Newton } else { 738f95f3850SWill Newton list_add_tail(&slot->queue_node, &host->queue); 739f95f3850SWill Newton } 740f95f3850SWill Newton } 741f95f3850SWill Newton 742f95f3850SWill Newton static void dw_mci_request(struct mmc_host *mmc, struct mmc_request *mrq) 743f95f3850SWill Newton { 744f95f3850SWill Newton struct dw_mci_slot *slot = mmc_priv(mmc); 745f95f3850SWill Newton struct dw_mci *host = slot->host; 746f95f3850SWill Newton 747f95f3850SWill Newton WARN_ON(slot->mrq); 748f95f3850SWill Newton 7497456caaeSJames Hogan /* 7507456caaeSJames Hogan * The check for card presence and queueing of the request must be 7517456caaeSJames Hogan * atomic, otherwise the card could be removed in between and the 7527456caaeSJames Hogan * request wouldn't fail until another card was inserted. 7537456caaeSJames Hogan */ 7547456caaeSJames Hogan spin_lock_bh(&host->lock); 7557456caaeSJames Hogan 756f95f3850SWill Newton if (!test_bit(DW_MMC_CARD_PRESENT, &slot->flags)) { 7577456caaeSJames Hogan spin_unlock_bh(&host->lock); 758f95f3850SWill Newton mrq->cmd->error = -ENOMEDIUM; 759f95f3850SWill Newton mmc_request_done(mmc, mrq); 760f95f3850SWill Newton return; 761f95f3850SWill Newton } 762f95f3850SWill Newton 763f95f3850SWill Newton dw_mci_queue_request(host, slot, mrq); 7647456caaeSJames Hogan 7657456caaeSJames Hogan spin_unlock_bh(&host->lock); 766f95f3850SWill Newton } 767f95f3850SWill Newton 768f95f3850SWill Newton static void dw_mci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 769f95f3850SWill Newton { 770f95f3850SWill Newton struct dw_mci_slot *slot = mmc_priv(mmc); 77141babf75SJaehoon Chung u32 regs; 772f95f3850SWill Newton 773f95f3850SWill Newton /* set default 1 bit mode */ 774f95f3850SWill Newton slot->ctype = SDMMC_CTYPE_1BIT; 775f95f3850SWill Newton 776f95f3850SWill Newton switch (ios->bus_width) { 777f95f3850SWill Newton case MMC_BUS_WIDTH_1: 778f95f3850SWill Newton slot->ctype = SDMMC_CTYPE_1BIT; 779f95f3850SWill Newton break; 780f95f3850SWill Newton case MMC_BUS_WIDTH_4: 781f95f3850SWill Newton slot->ctype = SDMMC_CTYPE_4BIT; 782f95f3850SWill Newton break; 783c9b2a06fSJaehoon Chung case MMC_BUS_WIDTH_8: 784c9b2a06fSJaehoon Chung slot->ctype = SDMMC_CTYPE_8BIT; 785c9b2a06fSJaehoon Chung break; 786f95f3850SWill Newton } 787f95f3850SWill Newton 78841babf75SJaehoon Chung regs = mci_readl(slot->host, UHS_REG); 7893f514291SSeungwon Jeon 7903f514291SSeungwon Jeon /* DDR mode set */ 7913f514291SSeungwon Jeon if (ios->timing == MMC_TIMING_UHS_DDR50) 79241babf75SJaehoon Chung regs |= (0x1 << slot->id) << 16; 7933f514291SSeungwon Jeon else 7943f514291SSeungwon Jeon regs &= ~(0x1 << slot->id) << 16; 7953f514291SSeungwon Jeon 79641babf75SJaehoon Chung mci_writel(slot->host, UHS_REG, regs); 79741babf75SJaehoon Chung 798f95f3850SWill Newton if (ios->clock) { 799f95f3850SWill Newton /* 800f95f3850SWill Newton * Use mirror of ios->clock to prevent race with mmc 801f95f3850SWill Newton * core ios update when finding the minimum. 802f95f3850SWill Newton */ 803f95f3850SWill Newton slot->clock = ios->clock; 804f95f3850SWill Newton } 805f95f3850SWill Newton 806f95f3850SWill Newton switch (ios->power_mode) { 807f95f3850SWill Newton case MMC_POWER_UP: 808f95f3850SWill Newton set_bit(DW_MMC_CARD_NEED_INIT, &slot->flags); 809f95f3850SWill Newton break; 810f95f3850SWill Newton default: 811f95f3850SWill Newton break; 812f95f3850SWill Newton } 813f95f3850SWill Newton } 814f95f3850SWill Newton 815f95f3850SWill Newton static int dw_mci_get_ro(struct mmc_host *mmc) 816f95f3850SWill Newton { 817f95f3850SWill Newton int read_only; 818f95f3850SWill Newton struct dw_mci_slot *slot = mmc_priv(mmc); 819f95f3850SWill Newton struct dw_mci_board *brd = slot->host->pdata; 820f95f3850SWill Newton 821f95f3850SWill Newton /* Use platform get_ro function, else try on board write protect */ 822f95f3850SWill Newton if (brd->get_ro) 823f95f3850SWill Newton read_only = brd->get_ro(slot->id); 824f95f3850SWill Newton else 825f95f3850SWill Newton read_only = 826f95f3850SWill Newton mci_readl(slot->host, WRTPRT) & (1 << slot->id) ? 1 : 0; 827f95f3850SWill Newton 828f95f3850SWill Newton dev_dbg(&mmc->class_dev, "card is %s\n", 829f95f3850SWill Newton read_only ? "read-only" : "read-write"); 830f95f3850SWill Newton 831f95f3850SWill Newton return read_only; 832f95f3850SWill Newton } 833f95f3850SWill Newton 834f95f3850SWill Newton static int dw_mci_get_cd(struct mmc_host *mmc) 835f95f3850SWill Newton { 836f95f3850SWill Newton int present; 837f95f3850SWill Newton struct dw_mci_slot *slot = mmc_priv(mmc); 838f95f3850SWill Newton struct dw_mci_board *brd = slot->host->pdata; 839f95f3850SWill Newton 840f95f3850SWill Newton /* Use platform get_cd function, else try onboard card detect */ 841fc3d7720SJaehoon Chung if (brd->quirks & DW_MCI_QUIRK_BROKEN_CARD_DETECTION) 842fc3d7720SJaehoon Chung present = 1; 843fc3d7720SJaehoon Chung else if (brd->get_cd) 844f95f3850SWill Newton present = !brd->get_cd(slot->id); 845f95f3850SWill Newton else 846f95f3850SWill Newton present = (mci_readl(slot->host, CDETECT) & (1 << slot->id)) 847f95f3850SWill Newton == 0 ? 1 : 0; 848f95f3850SWill Newton 849f95f3850SWill Newton if (present) 850f95f3850SWill Newton dev_dbg(&mmc->class_dev, "card is present\n"); 851f95f3850SWill Newton else 852f95f3850SWill Newton dev_dbg(&mmc->class_dev, "card is not present\n"); 853f95f3850SWill Newton 854f95f3850SWill Newton return present; 855f95f3850SWill Newton } 856f95f3850SWill Newton 8571a5c8e1fSShashidhar Hiremath static void dw_mci_enable_sdio_irq(struct mmc_host *mmc, int enb) 8581a5c8e1fSShashidhar Hiremath { 8591a5c8e1fSShashidhar Hiremath struct dw_mci_slot *slot = mmc_priv(mmc); 8601a5c8e1fSShashidhar Hiremath struct dw_mci *host = slot->host; 8611a5c8e1fSShashidhar Hiremath u32 int_mask; 8621a5c8e1fSShashidhar Hiremath 8631a5c8e1fSShashidhar Hiremath /* Enable/disable Slot Specific SDIO interrupt */ 8641a5c8e1fSShashidhar Hiremath int_mask = mci_readl(host, INTMASK); 8651a5c8e1fSShashidhar Hiremath if (enb) { 8661a5c8e1fSShashidhar Hiremath mci_writel(host, INTMASK, 8671a5c8e1fSShashidhar Hiremath (int_mask | (1 << SDMMC_INT_SDIO(slot->id)))); 8681a5c8e1fSShashidhar Hiremath } else { 8691a5c8e1fSShashidhar Hiremath mci_writel(host, INTMASK, 8701a5c8e1fSShashidhar Hiremath (int_mask & ~(1 << SDMMC_INT_SDIO(slot->id)))); 8711a5c8e1fSShashidhar Hiremath } 8721a5c8e1fSShashidhar Hiremath } 8731a5c8e1fSShashidhar Hiremath 874f95f3850SWill Newton static const struct mmc_host_ops dw_mci_ops = { 875f95f3850SWill Newton .request = dw_mci_request, 8769aa51408SSeungwon Jeon .pre_req = dw_mci_pre_req, 8779aa51408SSeungwon Jeon .post_req = dw_mci_post_req, 878f95f3850SWill Newton .set_ios = dw_mci_set_ios, 879f95f3850SWill Newton .get_ro = dw_mci_get_ro, 880f95f3850SWill Newton .get_cd = dw_mci_get_cd, 8811a5c8e1fSShashidhar Hiremath .enable_sdio_irq = dw_mci_enable_sdio_irq, 882f95f3850SWill Newton }; 883f95f3850SWill Newton 884f95f3850SWill Newton static void dw_mci_request_end(struct dw_mci *host, struct mmc_request *mrq) 885f95f3850SWill Newton __releases(&host->lock) 886f95f3850SWill Newton __acquires(&host->lock) 887f95f3850SWill Newton { 888f95f3850SWill Newton struct dw_mci_slot *slot; 889f95f3850SWill Newton struct mmc_host *prev_mmc = host->cur_slot->mmc; 890f95f3850SWill Newton 891f95f3850SWill Newton WARN_ON(host->cmd || host->data); 892f95f3850SWill Newton 893f95f3850SWill Newton host->cur_slot->mrq = NULL; 894f95f3850SWill Newton host->mrq = NULL; 895f95f3850SWill Newton if (!list_empty(&host->queue)) { 896f95f3850SWill Newton slot = list_entry(host->queue.next, 897f95f3850SWill Newton struct dw_mci_slot, queue_node); 898f95f3850SWill Newton list_del(&slot->queue_node); 89962ca8034SShashidhar Hiremath dev_vdbg(&host->dev, "list not empty: %s is next\n", 900f95f3850SWill Newton mmc_hostname(slot->mmc)); 901f95f3850SWill Newton host->state = STATE_SENDING_CMD; 902f95f3850SWill Newton dw_mci_start_request(host, slot); 903f95f3850SWill Newton } else { 90462ca8034SShashidhar Hiremath dev_vdbg(&host->dev, "list empty\n"); 905f95f3850SWill Newton host->state = STATE_IDLE; 906f95f3850SWill Newton } 907f95f3850SWill Newton 908f95f3850SWill Newton spin_unlock(&host->lock); 909f95f3850SWill Newton mmc_request_done(prev_mmc, mrq); 910f95f3850SWill Newton spin_lock(&host->lock); 911f95f3850SWill Newton } 912f95f3850SWill Newton 913f95f3850SWill Newton static void dw_mci_command_complete(struct dw_mci *host, struct mmc_command *cmd) 914f95f3850SWill Newton { 915f95f3850SWill Newton u32 status = host->cmd_status; 916f95f3850SWill Newton 917f95f3850SWill Newton host->cmd_status = 0; 918f95f3850SWill Newton 919f95f3850SWill Newton /* Read the response from the card (up to 16 bytes) */ 920f95f3850SWill Newton if (cmd->flags & MMC_RSP_PRESENT) { 921f95f3850SWill Newton if (cmd->flags & MMC_RSP_136) { 922f95f3850SWill Newton cmd->resp[3] = mci_readl(host, RESP0); 923f95f3850SWill Newton cmd->resp[2] = mci_readl(host, RESP1); 924f95f3850SWill Newton cmd->resp[1] = mci_readl(host, RESP2); 925f95f3850SWill Newton cmd->resp[0] = mci_readl(host, RESP3); 926f95f3850SWill Newton } else { 927f95f3850SWill Newton cmd->resp[0] = mci_readl(host, RESP0); 928f95f3850SWill Newton cmd->resp[1] = 0; 929f95f3850SWill Newton cmd->resp[2] = 0; 930f95f3850SWill Newton cmd->resp[3] = 0; 931f95f3850SWill Newton } 932f95f3850SWill Newton } 933f95f3850SWill Newton 934f95f3850SWill Newton if (status & SDMMC_INT_RTO) 935f95f3850SWill Newton cmd->error = -ETIMEDOUT; 936f95f3850SWill Newton else if ((cmd->flags & MMC_RSP_CRC) && (status & SDMMC_INT_RCRC)) 937f95f3850SWill Newton cmd->error = -EILSEQ; 938f95f3850SWill Newton else if (status & SDMMC_INT_RESP_ERR) 939f95f3850SWill Newton cmd->error = -EIO; 940f95f3850SWill Newton else 941f95f3850SWill Newton cmd->error = 0; 942f95f3850SWill Newton 943f95f3850SWill Newton if (cmd->error) { 944f95f3850SWill Newton /* newer ip versions need a delay between retries */ 945f95f3850SWill Newton if (host->quirks & DW_MCI_QUIRK_RETRY_DELAY) 946f95f3850SWill Newton mdelay(20); 947f95f3850SWill Newton 948f95f3850SWill Newton if (cmd->data) { 949f95f3850SWill Newton host->data = NULL; 950f95f3850SWill Newton dw_mci_stop_dma(host); 951f95f3850SWill Newton } 952f95f3850SWill Newton } 953f95f3850SWill Newton } 954f95f3850SWill Newton 955f95f3850SWill Newton static void dw_mci_tasklet_func(unsigned long priv) 956f95f3850SWill Newton { 957f95f3850SWill Newton struct dw_mci *host = (struct dw_mci *)priv; 958f95f3850SWill Newton struct mmc_data *data; 959f95f3850SWill Newton struct mmc_command *cmd; 960f95f3850SWill Newton enum dw_mci_state state; 961f95f3850SWill Newton enum dw_mci_state prev_state; 96294dd5b33SJames Hogan u32 status, ctrl; 963f95f3850SWill Newton 964f95f3850SWill Newton spin_lock(&host->lock); 965f95f3850SWill Newton 966f95f3850SWill Newton state = host->state; 967f95f3850SWill Newton data = host->data; 968f95f3850SWill Newton 969f95f3850SWill Newton do { 970f95f3850SWill Newton prev_state = state; 971f95f3850SWill Newton 972f95f3850SWill Newton switch (state) { 973f95f3850SWill Newton case STATE_IDLE: 974f95f3850SWill Newton break; 975f95f3850SWill Newton 976f95f3850SWill Newton case STATE_SENDING_CMD: 977f95f3850SWill Newton if (!test_and_clear_bit(EVENT_CMD_COMPLETE, 978f95f3850SWill Newton &host->pending_events)) 979f95f3850SWill Newton break; 980f95f3850SWill Newton 981f95f3850SWill Newton cmd = host->cmd; 982f95f3850SWill Newton host->cmd = NULL; 983f95f3850SWill Newton set_bit(EVENT_CMD_COMPLETE, &host->completed_events); 984053b3ce6SSeungwon Jeon dw_mci_command_complete(host, cmd); 985053b3ce6SSeungwon Jeon if (cmd == host->mrq->sbc && !cmd->error) { 986053b3ce6SSeungwon Jeon prev_state = state = STATE_SENDING_CMD; 987053b3ce6SSeungwon Jeon __dw_mci_start_request(host, host->cur_slot, 988053b3ce6SSeungwon Jeon host->mrq->cmd); 989053b3ce6SSeungwon Jeon goto unlock; 990053b3ce6SSeungwon Jeon } 991053b3ce6SSeungwon Jeon 992f95f3850SWill Newton if (!host->mrq->data || cmd->error) { 993f95f3850SWill Newton dw_mci_request_end(host, host->mrq); 994f95f3850SWill Newton goto unlock; 995f95f3850SWill Newton } 996f95f3850SWill Newton 997f95f3850SWill Newton prev_state = state = STATE_SENDING_DATA; 998f95f3850SWill Newton /* fall through */ 999f95f3850SWill Newton 1000f95f3850SWill Newton case STATE_SENDING_DATA: 1001f95f3850SWill Newton if (test_and_clear_bit(EVENT_DATA_ERROR, 1002f95f3850SWill Newton &host->pending_events)) { 1003f95f3850SWill Newton dw_mci_stop_dma(host); 1004f95f3850SWill Newton if (data->stop) 1005f95f3850SWill Newton send_stop_cmd(host, data); 1006f95f3850SWill Newton state = STATE_DATA_ERROR; 1007f95f3850SWill Newton break; 1008f95f3850SWill Newton } 1009f95f3850SWill Newton 1010f95f3850SWill Newton if (!test_and_clear_bit(EVENT_XFER_COMPLETE, 1011f95f3850SWill Newton &host->pending_events)) 1012f95f3850SWill Newton break; 1013f95f3850SWill Newton 1014f95f3850SWill Newton set_bit(EVENT_XFER_COMPLETE, &host->completed_events); 1015f95f3850SWill Newton prev_state = state = STATE_DATA_BUSY; 1016f95f3850SWill Newton /* fall through */ 1017f95f3850SWill Newton 1018f95f3850SWill Newton case STATE_DATA_BUSY: 1019f95f3850SWill Newton if (!test_and_clear_bit(EVENT_DATA_COMPLETE, 1020f95f3850SWill Newton &host->pending_events)) 1021f95f3850SWill Newton break; 1022f95f3850SWill Newton 1023f95f3850SWill Newton host->data = NULL; 1024f95f3850SWill Newton set_bit(EVENT_DATA_COMPLETE, &host->completed_events); 1025f95f3850SWill Newton status = host->data_status; 1026f95f3850SWill Newton 1027f95f3850SWill Newton if (status & DW_MCI_DATA_ERROR_FLAGS) { 1028f95f3850SWill Newton if (status & SDMMC_INT_DTO) { 1029f95f3850SWill Newton data->error = -ETIMEDOUT; 1030f95f3850SWill Newton } else if (status & SDMMC_INT_DCRC) { 1031f95f3850SWill Newton data->error = -EILSEQ; 103255c5efbcSJames Hogan } else if (status & SDMMC_INT_EBE && 103355c5efbcSJames Hogan host->dir_status == 103455c5efbcSJames Hogan DW_MCI_SEND_STATUS) { 103555c5efbcSJames Hogan /* 103655c5efbcSJames Hogan * No data CRC status was returned. 103755c5efbcSJames Hogan * The number of bytes transferred will 103855c5efbcSJames Hogan * be exaggerated in PIO mode. 103955c5efbcSJames Hogan */ 104055c5efbcSJames Hogan data->bytes_xfered = 0; 104155c5efbcSJames Hogan data->error = -ETIMEDOUT; 1042f95f3850SWill Newton } else { 104362ca8034SShashidhar Hiremath dev_err(&host->dev, 1044f95f3850SWill Newton "data FIFO error " 1045f95f3850SWill Newton "(status=%08x)\n", 1046f95f3850SWill Newton status); 1047f95f3850SWill Newton data->error = -EIO; 1048f95f3850SWill Newton } 104994dd5b33SJames Hogan /* 105094dd5b33SJames Hogan * After an error, there may be data lingering 105194dd5b33SJames Hogan * in the FIFO, so reset it - doing so 105294dd5b33SJames Hogan * generates a block interrupt, hence setting 105394dd5b33SJames Hogan * the scatter-gather pointer to NULL. 105494dd5b33SJames Hogan */ 1055f9c2a0dcSSeungwon Jeon sg_miter_stop(&host->sg_miter); 105694dd5b33SJames Hogan host->sg = NULL; 105794dd5b33SJames Hogan ctrl = mci_readl(host, CTRL); 105894dd5b33SJames Hogan ctrl |= SDMMC_CTRL_FIFO_RESET; 105994dd5b33SJames Hogan mci_writel(host, CTRL, ctrl); 1060f95f3850SWill Newton } else { 1061f95f3850SWill Newton data->bytes_xfered = data->blocks * data->blksz; 1062f95f3850SWill Newton data->error = 0; 1063f95f3850SWill Newton } 1064f95f3850SWill Newton 1065f95f3850SWill Newton if (!data->stop) { 1066f95f3850SWill Newton dw_mci_request_end(host, host->mrq); 1067f95f3850SWill Newton goto unlock; 1068f95f3850SWill Newton } 1069f95f3850SWill Newton 1070053b3ce6SSeungwon Jeon if (host->mrq->sbc && !data->error) { 1071053b3ce6SSeungwon Jeon data->stop->error = 0; 1072053b3ce6SSeungwon Jeon dw_mci_request_end(host, host->mrq); 1073053b3ce6SSeungwon Jeon goto unlock; 1074053b3ce6SSeungwon Jeon } 1075053b3ce6SSeungwon Jeon 1076f95f3850SWill Newton prev_state = state = STATE_SENDING_STOP; 1077f95f3850SWill Newton if (!data->error) 1078f95f3850SWill Newton send_stop_cmd(host, data); 1079f95f3850SWill Newton /* fall through */ 1080f95f3850SWill Newton 1081f95f3850SWill Newton case STATE_SENDING_STOP: 1082f95f3850SWill Newton if (!test_and_clear_bit(EVENT_CMD_COMPLETE, 1083f95f3850SWill Newton &host->pending_events)) 1084f95f3850SWill Newton break; 1085f95f3850SWill Newton 1086f95f3850SWill Newton host->cmd = NULL; 1087f95f3850SWill Newton dw_mci_command_complete(host, host->mrq->stop); 1088f95f3850SWill Newton dw_mci_request_end(host, host->mrq); 1089f95f3850SWill Newton goto unlock; 1090f95f3850SWill Newton 1091f95f3850SWill Newton case STATE_DATA_ERROR: 1092f95f3850SWill Newton if (!test_and_clear_bit(EVENT_XFER_COMPLETE, 1093f95f3850SWill Newton &host->pending_events)) 1094f95f3850SWill Newton break; 1095f95f3850SWill Newton 1096f95f3850SWill Newton state = STATE_DATA_BUSY; 1097f95f3850SWill Newton break; 1098f95f3850SWill Newton } 1099f95f3850SWill Newton } while (state != prev_state); 1100f95f3850SWill Newton 1101f95f3850SWill Newton host->state = state; 1102f95f3850SWill Newton unlock: 1103f95f3850SWill Newton spin_unlock(&host->lock); 1104f95f3850SWill Newton 1105f95f3850SWill Newton } 1106f95f3850SWill Newton 110734b664a2SJames Hogan /* push final bytes to part_buf, only use during push */ 110834b664a2SJames Hogan static void dw_mci_set_part_bytes(struct dw_mci *host, void *buf, int cnt) 110934b664a2SJames Hogan { 111034b664a2SJames Hogan memcpy((void *)&host->part_buf, buf, cnt); 111134b664a2SJames Hogan host->part_buf_count = cnt; 111234b664a2SJames Hogan } 111334b664a2SJames Hogan 111434b664a2SJames Hogan /* append bytes to part_buf, only use during push */ 111534b664a2SJames Hogan static int dw_mci_push_part_bytes(struct dw_mci *host, void *buf, int cnt) 111634b664a2SJames Hogan { 111734b664a2SJames Hogan cnt = min(cnt, (1 << host->data_shift) - host->part_buf_count); 111834b664a2SJames Hogan memcpy((void *)&host->part_buf + host->part_buf_count, buf, cnt); 111934b664a2SJames Hogan host->part_buf_count += cnt; 112034b664a2SJames Hogan return cnt; 112134b664a2SJames Hogan } 112234b664a2SJames Hogan 112334b664a2SJames Hogan /* pull first bytes from part_buf, only use during pull */ 112434b664a2SJames Hogan static int dw_mci_pull_part_bytes(struct dw_mci *host, void *buf, int cnt) 112534b664a2SJames Hogan { 112634b664a2SJames Hogan cnt = min(cnt, (int)host->part_buf_count); 112734b664a2SJames Hogan if (cnt) { 112834b664a2SJames Hogan memcpy(buf, (void *)&host->part_buf + host->part_buf_start, 112934b664a2SJames Hogan cnt); 113034b664a2SJames Hogan host->part_buf_count -= cnt; 113134b664a2SJames Hogan host->part_buf_start += cnt; 113234b664a2SJames Hogan } 113334b664a2SJames Hogan return cnt; 113434b664a2SJames Hogan } 113534b664a2SJames Hogan 113634b664a2SJames Hogan /* pull final bytes from the part_buf, assuming it's just been filled */ 113734b664a2SJames Hogan static void dw_mci_pull_final_bytes(struct dw_mci *host, void *buf, int cnt) 113834b664a2SJames Hogan { 113934b664a2SJames Hogan memcpy(buf, &host->part_buf, cnt); 114034b664a2SJames Hogan host->part_buf_start = cnt; 114134b664a2SJames Hogan host->part_buf_count = (1 << host->data_shift) - cnt; 114234b664a2SJames Hogan } 114334b664a2SJames Hogan 1144f95f3850SWill Newton static void dw_mci_push_data16(struct dw_mci *host, void *buf, int cnt) 1145f95f3850SWill Newton { 114634b664a2SJames Hogan /* try and push anything in the part_buf */ 114734b664a2SJames Hogan if (unlikely(host->part_buf_count)) { 114834b664a2SJames Hogan int len = dw_mci_push_part_bytes(host, buf, cnt); 114934b664a2SJames Hogan buf += len; 115034b664a2SJames Hogan cnt -= len; 115134b664a2SJames Hogan if (!sg_next(host->sg) || host->part_buf_count == 2) { 11524e0a5adfSJaehoon Chung mci_writew(host, DATA(host->data_offset), 11534e0a5adfSJaehoon Chung host->part_buf16); 115434b664a2SJames Hogan host->part_buf_count = 0; 115534b664a2SJames Hogan } 115634b664a2SJames Hogan } 115734b664a2SJames Hogan #ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS 115834b664a2SJames Hogan if (unlikely((unsigned long)buf & 0x1)) { 115934b664a2SJames Hogan while (cnt >= 2) { 116034b664a2SJames Hogan u16 aligned_buf[64]; 116134b664a2SJames Hogan int len = min(cnt & -2, (int)sizeof(aligned_buf)); 116234b664a2SJames Hogan int items = len >> 1; 116334b664a2SJames Hogan int i; 116434b664a2SJames Hogan /* memcpy from input buffer into aligned buffer */ 116534b664a2SJames Hogan memcpy(aligned_buf, buf, len); 116634b664a2SJames Hogan buf += len; 116734b664a2SJames Hogan cnt -= len; 116834b664a2SJames Hogan /* push data from aligned buffer into fifo */ 116934b664a2SJames Hogan for (i = 0; i < items; ++i) 11704e0a5adfSJaehoon Chung mci_writew(host, DATA(host->data_offset), 11714e0a5adfSJaehoon Chung aligned_buf[i]); 117234b664a2SJames Hogan } 117334b664a2SJames Hogan } else 117434b664a2SJames Hogan #endif 117534b664a2SJames Hogan { 117634b664a2SJames Hogan u16 *pdata = buf; 117734b664a2SJames Hogan for (; cnt >= 2; cnt -= 2) 11784e0a5adfSJaehoon Chung mci_writew(host, DATA(host->data_offset), *pdata++); 117934b664a2SJames Hogan buf = pdata; 118034b664a2SJames Hogan } 118134b664a2SJames Hogan /* put anything remaining in the part_buf */ 118234b664a2SJames Hogan if (cnt) { 118334b664a2SJames Hogan dw_mci_set_part_bytes(host, buf, cnt); 118434b664a2SJames Hogan if (!sg_next(host->sg)) 11854e0a5adfSJaehoon Chung mci_writew(host, DATA(host->data_offset), 11864e0a5adfSJaehoon Chung host->part_buf16); 1187f95f3850SWill Newton } 1188f95f3850SWill Newton } 1189f95f3850SWill Newton 1190f95f3850SWill Newton static void dw_mci_pull_data16(struct dw_mci *host, void *buf, int cnt) 1191f95f3850SWill Newton { 119234b664a2SJames Hogan #ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS 119334b664a2SJames Hogan if (unlikely((unsigned long)buf & 0x1)) { 119434b664a2SJames Hogan while (cnt >= 2) { 119534b664a2SJames Hogan /* pull data from fifo into aligned buffer */ 119634b664a2SJames Hogan u16 aligned_buf[64]; 119734b664a2SJames Hogan int len = min(cnt & -2, (int)sizeof(aligned_buf)); 119834b664a2SJames Hogan int items = len >> 1; 119934b664a2SJames Hogan int i; 120034b664a2SJames Hogan for (i = 0; i < items; ++i) 12014e0a5adfSJaehoon Chung aligned_buf[i] = mci_readw(host, 12024e0a5adfSJaehoon Chung DATA(host->data_offset)); 120334b664a2SJames Hogan /* memcpy from aligned buffer into output buffer */ 120434b664a2SJames Hogan memcpy(buf, aligned_buf, len); 120534b664a2SJames Hogan buf += len; 120634b664a2SJames Hogan cnt -= len; 120734b664a2SJames Hogan } 120834b664a2SJames Hogan } else 120934b664a2SJames Hogan #endif 121034b664a2SJames Hogan { 121134b664a2SJames Hogan u16 *pdata = buf; 121234b664a2SJames Hogan for (; cnt >= 2; cnt -= 2) 12134e0a5adfSJaehoon Chung *pdata++ = mci_readw(host, DATA(host->data_offset)); 121434b664a2SJames Hogan buf = pdata; 121534b664a2SJames Hogan } 121634b664a2SJames Hogan if (cnt) { 12174e0a5adfSJaehoon Chung host->part_buf16 = mci_readw(host, DATA(host->data_offset)); 121834b664a2SJames Hogan dw_mci_pull_final_bytes(host, buf, cnt); 1219f95f3850SWill Newton } 1220f95f3850SWill Newton } 1221f95f3850SWill Newton 1222f95f3850SWill Newton static void dw_mci_push_data32(struct dw_mci *host, void *buf, int cnt) 1223f95f3850SWill Newton { 122434b664a2SJames Hogan /* try and push anything in the part_buf */ 122534b664a2SJames Hogan if (unlikely(host->part_buf_count)) { 122634b664a2SJames Hogan int len = dw_mci_push_part_bytes(host, buf, cnt); 122734b664a2SJames Hogan buf += len; 122834b664a2SJames Hogan cnt -= len; 122934b664a2SJames Hogan if (!sg_next(host->sg) || host->part_buf_count == 4) { 12304e0a5adfSJaehoon Chung mci_writel(host, DATA(host->data_offset), 12314e0a5adfSJaehoon Chung host->part_buf32); 123234b664a2SJames Hogan host->part_buf_count = 0; 123334b664a2SJames Hogan } 123434b664a2SJames Hogan } 123534b664a2SJames Hogan #ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS 123634b664a2SJames Hogan if (unlikely((unsigned long)buf & 0x3)) { 123734b664a2SJames Hogan while (cnt >= 4) { 123834b664a2SJames Hogan u32 aligned_buf[32]; 123934b664a2SJames Hogan int len = min(cnt & -4, (int)sizeof(aligned_buf)); 124034b664a2SJames Hogan int items = len >> 2; 124134b664a2SJames Hogan int i; 124234b664a2SJames Hogan /* memcpy from input buffer into aligned buffer */ 124334b664a2SJames Hogan memcpy(aligned_buf, buf, len); 124434b664a2SJames Hogan buf += len; 124534b664a2SJames Hogan cnt -= len; 124634b664a2SJames Hogan /* push data from aligned buffer into fifo */ 124734b664a2SJames Hogan for (i = 0; i < items; ++i) 12484e0a5adfSJaehoon Chung mci_writel(host, DATA(host->data_offset), 12494e0a5adfSJaehoon Chung aligned_buf[i]); 125034b664a2SJames Hogan } 125134b664a2SJames Hogan } else 125234b664a2SJames Hogan #endif 125334b664a2SJames Hogan { 125434b664a2SJames Hogan u32 *pdata = buf; 125534b664a2SJames Hogan for (; cnt >= 4; cnt -= 4) 12564e0a5adfSJaehoon Chung mci_writel(host, DATA(host->data_offset), *pdata++); 125734b664a2SJames Hogan buf = pdata; 125834b664a2SJames Hogan } 125934b664a2SJames Hogan /* put anything remaining in the part_buf */ 126034b664a2SJames Hogan if (cnt) { 126134b664a2SJames Hogan dw_mci_set_part_bytes(host, buf, cnt); 126234b664a2SJames Hogan if (!sg_next(host->sg)) 12634e0a5adfSJaehoon Chung mci_writel(host, DATA(host->data_offset), 12644e0a5adfSJaehoon Chung host->part_buf32); 1265f95f3850SWill Newton } 1266f95f3850SWill Newton } 1267f95f3850SWill Newton 1268f95f3850SWill Newton static void dw_mci_pull_data32(struct dw_mci *host, void *buf, int cnt) 1269f95f3850SWill Newton { 127034b664a2SJames Hogan #ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS 127134b664a2SJames Hogan if (unlikely((unsigned long)buf & 0x3)) { 127234b664a2SJames Hogan while (cnt >= 4) { 127334b664a2SJames Hogan /* pull data from fifo into aligned buffer */ 127434b664a2SJames Hogan u32 aligned_buf[32]; 127534b664a2SJames Hogan int len = min(cnt & -4, (int)sizeof(aligned_buf)); 127634b664a2SJames Hogan int items = len >> 2; 127734b664a2SJames Hogan int i; 127834b664a2SJames Hogan for (i = 0; i < items; ++i) 12794e0a5adfSJaehoon Chung aligned_buf[i] = mci_readl(host, 12804e0a5adfSJaehoon Chung DATA(host->data_offset)); 128134b664a2SJames Hogan /* memcpy from aligned buffer into output buffer */ 128234b664a2SJames Hogan memcpy(buf, aligned_buf, len); 128334b664a2SJames Hogan buf += len; 128434b664a2SJames Hogan cnt -= len; 128534b664a2SJames Hogan } 128634b664a2SJames Hogan } else 128734b664a2SJames Hogan #endif 128834b664a2SJames Hogan { 128934b664a2SJames Hogan u32 *pdata = buf; 129034b664a2SJames Hogan for (; cnt >= 4; cnt -= 4) 12914e0a5adfSJaehoon Chung *pdata++ = mci_readl(host, DATA(host->data_offset)); 129234b664a2SJames Hogan buf = pdata; 129334b664a2SJames Hogan } 129434b664a2SJames Hogan if (cnt) { 12954e0a5adfSJaehoon Chung host->part_buf32 = mci_readl(host, DATA(host->data_offset)); 129634b664a2SJames Hogan dw_mci_pull_final_bytes(host, buf, cnt); 1297f95f3850SWill Newton } 1298f95f3850SWill Newton } 1299f95f3850SWill Newton 1300f95f3850SWill Newton static void dw_mci_push_data64(struct dw_mci *host, void *buf, int cnt) 1301f95f3850SWill Newton { 130234b664a2SJames Hogan /* try and push anything in the part_buf */ 130334b664a2SJames Hogan if (unlikely(host->part_buf_count)) { 130434b664a2SJames Hogan int len = dw_mci_push_part_bytes(host, buf, cnt); 130534b664a2SJames Hogan buf += len; 130634b664a2SJames Hogan cnt -= len; 130734b664a2SJames Hogan if (!sg_next(host->sg) || host->part_buf_count == 8) { 13084e0a5adfSJaehoon Chung mci_writew(host, DATA(host->data_offset), 13094e0a5adfSJaehoon Chung host->part_buf); 131034b664a2SJames Hogan host->part_buf_count = 0; 131134b664a2SJames Hogan } 131234b664a2SJames Hogan } 131334b664a2SJames Hogan #ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS 131434b664a2SJames Hogan if (unlikely((unsigned long)buf & 0x7)) { 131534b664a2SJames Hogan while (cnt >= 8) { 131634b664a2SJames Hogan u64 aligned_buf[16]; 131734b664a2SJames Hogan int len = min(cnt & -8, (int)sizeof(aligned_buf)); 131834b664a2SJames Hogan int items = len >> 3; 131934b664a2SJames Hogan int i; 132034b664a2SJames Hogan /* memcpy from input buffer into aligned buffer */ 132134b664a2SJames Hogan memcpy(aligned_buf, buf, len); 132234b664a2SJames Hogan buf += len; 132334b664a2SJames Hogan cnt -= len; 132434b664a2SJames Hogan /* push data from aligned buffer into fifo */ 132534b664a2SJames Hogan for (i = 0; i < items; ++i) 13264e0a5adfSJaehoon Chung mci_writeq(host, DATA(host->data_offset), 13274e0a5adfSJaehoon Chung aligned_buf[i]); 132834b664a2SJames Hogan } 132934b664a2SJames Hogan } else 133034b664a2SJames Hogan #endif 133134b664a2SJames Hogan { 133234b664a2SJames Hogan u64 *pdata = buf; 133334b664a2SJames Hogan for (; cnt >= 8; cnt -= 8) 13344e0a5adfSJaehoon Chung mci_writeq(host, DATA(host->data_offset), *pdata++); 133534b664a2SJames Hogan buf = pdata; 133634b664a2SJames Hogan } 133734b664a2SJames Hogan /* put anything remaining in the part_buf */ 133834b664a2SJames Hogan if (cnt) { 133934b664a2SJames Hogan dw_mci_set_part_bytes(host, buf, cnt); 134034b664a2SJames Hogan if (!sg_next(host->sg)) 13414e0a5adfSJaehoon Chung mci_writeq(host, DATA(host->data_offset), 13424e0a5adfSJaehoon Chung host->part_buf); 1343f95f3850SWill Newton } 1344f95f3850SWill Newton } 1345f95f3850SWill Newton 1346f95f3850SWill Newton static void dw_mci_pull_data64(struct dw_mci *host, void *buf, int cnt) 1347f95f3850SWill Newton { 134834b664a2SJames Hogan #ifndef CONFIG_HAVE_EFFICIENT_UNALIGNED_ACCESS 134934b664a2SJames Hogan if (unlikely((unsigned long)buf & 0x7)) { 135034b664a2SJames Hogan while (cnt >= 8) { 135134b664a2SJames Hogan /* pull data from fifo into aligned buffer */ 135234b664a2SJames Hogan u64 aligned_buf[16]; 135334b664a2SJames Hogan int len = min(cnt & -8, (int)sizeof(aligned_buf)); 135434b664a2SJames Hogan int items = len >> 3; 135534b664a2SJames Hogan int i; 135634b664a2SJames Hogan for (i = 0; i < items; ++i) 13574e0a5adfSJaehoon Chung aligned_buf[i] = mci_readq(host, 13584e0a5adfSJaehoon Chung DATA(host->data_offset)); 135934b664a2SJames Hogan /* memcpy from aligned buffer into output buffer */ 136034b664a2SJames Hogan memcpy(buf, aligned_buf, len); 136134b664a2SJames Hogan buf += len; 136234b664a2SJames Hogan cnt -= len; 1363f95f3850SWill Newton } 136434b664a2SJames Hogan } else 136534b664a2SJames Hogan #endif 136634b664a2SJames Hogan { 136734b664a2SJames Hogan u64 *pdata = buf; 136834b664a2SJames Hogan for (; cnt >= 8; cnt -= 8) 13694e0a5adfSJaehoon Chung *pdata++ = mci_readq(host, DATA(host->data_offset)); 137034b664a2SJames Hogan buf = pdata; 137134b664a2SJames Hogan } 137234b664a2SJames Hogan if (cnt) { 13734e0a5adfSJaehoon Chung host->part_buf = mci_readq(host, DATA(host->data_offset)); 137434b664a2SJames Hogan dw_mci_pull_final_bytes(host, buf, cnt); 137534b664a2SJames Hogan } 137634b664a2SJames Hogan } 137734b664a2SJames Hogan 137834b664a2SJames Hogan static void dw_mci_pull_data(struct dw_mci *host, void *buf, int cnt) 137934b664a2SJames Hogan { 138034b664a2SJames Hogan int len; 138134b664a2SJames Hogan 138234b664a2SJames Hogan /* get remaining partial bytes */ 138334b664a2SJames Hogan len = dw_mci_pull_part_bytes(host, buf, cnt); 138434b664a2SJames Hogan if (unlikely(len == cnt)) 138534b664a2SJames Hogan return; 138634b664a2SJames Hogan buf += len; 138734b664a2SJames Hogan cnt -= len; 138834b664a2SJames Hogan 138934b664a2SJames Hogan /* get the rest of the data */ 139034b664a2SJames Hogan host->pull_data(host, buf, cnt); 1391f95f3850SWill Newton } 1392f95f3850SWill Newton 1393f95f3850SWill Newton static void dw_mci_read_data_pio(struct dw_mci *host) 1394f95f3850SWill Newton { 1395f9c2a0dcSSeungwon Jeon struct sg_mapping_iter *sg_miter = &host->sg_miter; 1396f9c2a0dcSSeungwon Jeon void *buf; 1397f9c2a0dcSSeungwon Jeon unsigned int offset; 1398f95f3850SWill Newton struct mmc_data *data = host->data; 1399f95f3850SWill Newton int shift = host->data_shift; 1400f95f3850SWill Newton u32 status; 1401ba6a902dSChris Ball unsigned int nbytes = 0, len; 1402f9c2a0dcSSeungwon Jeon unsigned int remain, fcnt; 1403f95f3850SWill Newton 1404f95f3850SWill Newton do { 1405f9c2a0dcSSeungwon Jeon if (!sg_miter_next(sg_miter)) 1406f9c2a0dcSSeungwon Jeon goto done; 1407f95f3850SWill Newton 1408f9c2a0dcSSeungwon Jeon host->sg = sg_miter->__sg; 1409f9c2a0dcSSeungwon Jeon buf = sg_miter->addr; 1410f9c2a0dcSSeungwon Jeon remain = sg_miter->length; 1411f9c2a0dcSSeungwon Jeon offset = 0; 1412f9c2a0dcSSeungwon Jeon 1413f9c2a0dcSSeungwon Jeon do { 1414f9c2a0dcSSeungwon Jeon fcnt = (SDMMC_GET_FCNT(mci_readl(host, STATUS)) 1415f9c2a0dcSSeungwon Jeon << shift) + host->part_buf_count; 1416f9c2a0dcSSeungwon Jeon len = min(remain, fcnt); 1417f9c2a0dcSSeungwon Jeon if (!len) 1418f9c2a0dcSSeungwon Jeon break; 1419f9c2a0dcSSeungwon Jeon dw_mci_pull_data(host, (void *)(buf + offset), len); 1420f95f3850SWill Newton offset += len; 1421f95f3850SWill Newton nbytes += len; 1422f9c2a0dcSSeungwon Jeon remain -= len; 1423f9c2a0dcSSeungwon Jeon } while (remain); 1424f9c2a0dcSSeungwon Jeon sg_miter->consumed = offset; 1425f95f3850SWill Newton 1426f95f3850SWill Newton status = mci_readl(host, MINTSTS); 1427f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_RXDR); 1428f95f3850SWill Newton if (status & DW_MCI_DATA_ERROR_FLAGS) { 1429f95f3850SWill Newton host->data_status = status; 1430f95f3850SWill Newton data->bytes_xfered += nbytes; 1431f9c2a0dcSSeungwon Jeon sg_miter_stop(sg_miter); 1432f9c2a0dcSSeungwon Jeon host->sg = NULL; 1433f95f3850SWill Newton smp_wmb(); 1434f95f3850SWill Newton 1435f95f3850SWill Newton set_bit(EVENT_DATA_ERROR, &host->pending_events); 1436f95f3850SWill Newton 1437f95f3850SWill Newton tasklet_schedule(&host->tasklet); 1438f95f3850SWill Newton return; 1439f95f3850SWill Newton } 1440f95f3850SWill Newton } while (status & SDMMC_INT_RXDR); /*if the RXDR is ready read again*/ 1441f95f3850SWill Newton data->bytes_xfered += nbytes; 1442f9c2a0dcSSeungwon Jeon 1443f9c2a0dcSSeungwon Jeon if (!remain) { 1444f9c2a0dcSSeungwon Jeon if (!sg_miter_next(sg_miter)) 1445f9c2a0dcSSeungwon Jeon goto done; 1446f9c2a0dcSSeungwon Jeon sg_miter->consumed = 0; 1447f9c2a0dcSSeungwon Jeon } 1448f9c2a0dcSSeungwon Jeon sg_miter_stop(sg_miter); 1449f95f3850SWill Newton return; 1450f95f3850SWill Newton 1451f95f3850SWill Newton done: 1452f95f3850SWill Newton data->bytes_xfered += nbytes; 1453f9c2a0dcSSeungwon Jeon sg_miter_stop(sg_miter); 1454f9c2a0dcSSeungwon Jeon host->sg = NULL; 1455f95f3850SWill Newton smp_wmb(); 1456f95f3850SWill Newton set_bit(EVENT_XFER_COMPLETE, &host->pending_events); 1457f95f3850SWill Newton } 1458f95f3850SWill Newton 1459f95f3850SWill Newton static void dw_mci_write_data_pio(struct dw_mci *host) 1460f95f3850SWill Newton { 1461f9c2a0dcSSeungwon Jeon struct sg_mapping_iter *sg_miter = &host->sg_miter; 1462f9c2a0dcSSeungwon Jeon void *buf; 1463f9c2a0dcSSeungwon Jeon unsigned int offset; 1464f95f3850SWill Newton struct mmc_data *data = host->data; 1465f95f3850SWill Newton int shift = host->data_shift; 1466f95f3850SWill Newton u32 status; 1467f95f3850SWill Newton unsigned int nbytes = 0, len; 1468f9c2a0dcSSeungwon Jeon unsigned int fifo_depth = host->fifo_depth; 1469f9c2a0dcSSeungwon Jeon unsigned int remain, fcnt; 1470f95f3850SWill Newton 1471f95f3850SWill Newton do { 1472f9c2a0dcSSeungwon Jeon if (!sg_miter_next(sg_miter)) 1473f9c2a0dcSSeungwon Jeon goto done; 1474f95f3850SWill Newton 1475f9c2a0dcSSeungwon Jeon host->sg = sg_miter->__sg; 1476f9c2a0dcSSeungwon Jeon buf = sg_miter->addr; 1477f9c2a0dcSSeungwon Jeon remain = sg_miter->length; 1478f9c2a0dcSSeungwon Jeon offset = 0; 1479f9c2a0dcSSeungwon Jeon 1480f9c2a0dcSSeungwon Jeon do { 1481f9c2a0dcSSeungwon Jeon fcnt = ((fifo_depth - 1482f9c2a0dcSSeungwon Jeon SDMMC_GET_FCNT(mci_readl(host, STATUS))) 1483f9c2a0dcSSeungwon Jeon << shift) - host->part_buf_count; 1484f9c2a0dcSSeungwon Jeon len = min(remain, fcnt); 1485f9c2a0dcSSeungwon Jeon if (!len) 1486f9c2a0dcSSeungwon Jeon break; 1487f9c2a0dcSSeungwon Jeon host->push_data(host, (void *)(buf + offset), len); 1488f95f3850SWill Newton offset += len; 1489f95f3850SWill Newton nbytes += len; 1490f9c2a0dcSSeungwon Jeon remain -= len; 1491f9c2a0dcSSeungwon Jeon } while (remain); 1492f9c2a0dcSSeungwon Jeon sg_miter->consumed = offset; 1493f95f3850SWill Newton 1494f95f3850SWill Newton status = mci_readl(host, MINTSTS); 1495f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_TXDR); 1496f95f3850SWill Newton if (status & DW_MCI_DATA_ERROR_FLAGS) { 1497f95f3850SWill Newton host->data_status = status; 1498f95f3850SWill Newton data->bytes_xfered += nbytes; 1499f9c2a0dcSSeungwon Jeon sg_miter_stop(sg_miter); 1500f9c2a0dcSSeungwon Jeon host->sg = NULL; 1501f95f3850SWill Newton 1502f95f3850SWill Newton smp_wmb(); 1503f95f3850SWill Newton 1504f95f3850SWill Newton set_bit(EVENT_DATA_ERROR, &host->pending_events); 1505f95f3850SWill Newton 1506f95f3850SWill Newton tasklet_schedule(&host->tasklet); 1507f95f3850SWill Newton return; 1508f95f3850SWill Newton } 1509f95f3850SWill Newton } while (status & SDMMC_INT_TXDR); /* if TXDR write again */ 1510f95f3850SWill Newton data->bytes_xfered += nbytes; 1511f9c2a0dcSSeungwon Jeon 1512f9c2a0dcSSeungwon Jeon if (!remain) { 1513f9c2a0dcSSeungwon Jeon if (!sg_miter_next(sg_miter)) 1514f9c2a0dcSSeungwon Jeon goto done; 1515f9c2a0dcSSeungwon Jeon sg_miter->consumed = 0; 1516f9c2a0dcSSeungwon Jeon } 1517f9c2a0dcSSeungwon Jeon sg_miter_stop(sg_miter); 1518f95f3850SWill Newton return; 1519f95f3850SWill Newton 1520f95f3850SWill Newton done: 1521f95f3850SWill Newton data->bytes_xfered += nbytes; 1522f9c2a0dcSSeungwon Jeon sg_miter_stop(sg_miter); 1523f9c2a0dcSSeungwon Jeon host->sg = NULL; 1524f95f3850SWill Newton smp_wmb(); 1525f95f3850SWill Newton set_bit(EVENT_XFER_COMPLETE, &host->pending_events); 1526f95f3850SWill Newton } 1527f95f3850SWill Newton 1528f95f3850SWill Newton static void dw_mci_cmd_interrupt(struct dw_mci *host, u32 status) 1529f95f3850SWill Newton { 1530f95f3850SWill Newton if (!host->cmd_status) 1531f95f3850SWill Newton host->cmd_status = status; 1532f95f3850SWill Newton 1533f95f3850SWill Newton smp_wmb(); 1534f95f3850SWill Newton 1535f95f3850SWill Newton set_bit(EVENT_CMD_COMPLETE, &host->pending_events); 1536f95f3850SWill Newton tasklet_schedule(&host->tasklet); 1537f95f3850SWill Newton } 1538f95f3850SWill Newton 1539f95f3850SWill Newton static irqreturn_t dw_mci_interrupt(int irq, void *dev_id) 1540f95f3850SWill Newton { 1541f95f3850SWill Newton struct dw_mci *host = dev_id; 1542f95f3850SWill Newton u32 status, pending; 1543f95f3850SWill Newton unsigned int pass_count = 0; 15441a5c8e1fSShashidhar Hiremath int i; 1545f95f3850SWill Newton 1546f95f3850SWill Newton do { 1547f95f3850SWill Newton status = mci_readl(host, RINTSTS); 1548f95f3850SWill Newton pending = mci_readl(host, MINTSTS); /* read-only mask reg */ 1549f95f3850SWill Newton 1550f95f3850SWill Newton /* 1551f95f3850SWill Newton * DTO fix - version 2.10a and below, and only if internal DMA 1552f95f3850SWill Newton * is configured. 1553f95f3850SWill Newton */ 1554f95f3850SWill Newton if (host->quirks & DW_MCI_QUIRK_IDMAC_DTO) { 1555f95f3850SWill Newton if (!pending && 1556f95f3850SWill Newton ((mci_readl(host, STATUS) >> 17) & 0x1fff)) 1557f95f3850SWill Newton pending |= SDMMC_INT_DATA_OVER; 1558f95f3850SWill Newton } 1559f95f3850SWill Newton 1560f95f3850SWill Newton if (!pending) 1561f95f3850SWill Newton break; 1562f95f3850SWill Newton 1563f95f3850SWill Newton if (pending & DW_MCI_CMD_ERROR_FLAGS) { 1564f95f3850SWill Newton mci_writel(host, RINTSTS, DW_MCI_CMD_ERROR_FLAGS); 1565f95f3850SWill Newton host->cmd_status = status; 1566f95f3850SWill Newton smp_wmb(); 1567f95f3850SWill Newton set_bit(EVENT_CMD_COMPLETE, &host->pending_events); 1568f95f3850SWill Newton } 1569f95f3850SWill Newton 1570f95f3850SWill Newton if (pending & DW_MCI_DATA_ERROR_FLAGS) { 1571f95f3850SWill Newton /* if there is an error report DATA_ERROR */ 1572f95f3850SWill Newton mci_writel(host, RINTSTS, DW_MCI_DATA_ERROR_FLAGS); 1573f95f3850SWill Newton host->data_status = status; 1574f95f3850SWill Newton smp_wmb(); 1575f95f3850SWill Newton set_bit(EVENT_DATA_ERROR, &host->pending_events); 15766e83e10dSSeungwon Jeon if (!(pending & (SDMMC_INT_DTO | SDMMC_INT_DCRC | 15776e83e10dSSeungwon Jeon SDMMC_INT_SBE | SDMMC_INT_EBE))) 1578f95f3850SWill Newton tasklet_schedule(&host->tasklet); 1579f95f3850SWill Newton } 1580f95f3850SWill Newton 1581f95f3850SWill Newton if (pending & SDMMC_INT_DATA_OVER) { 1582f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_DATA_OVER); 1583f95f3850SWill Newton if (!host->data_status) 1584f95f3850SWill Newton host->data_status = status; 1585f95f3850SWill Newton smp_wmb(); 1586f95f3850SWill Newton if (host->dir_status == DW_MCI_RECV_STATUS) { 1587f95f3850SWill Newton if (host->sg != NULL) 1588f95f3850SWill Newton dw_mci_read_data_pio(host); 1589f95f3850SWill Newton } 1590f95f3850SWill Newton set_bit(EVENT_DATA_COMPLETE, &host->pending_events); 1591f95f3850SWill Newton tasklet_schedule(&host->tasklet); 1592f95f3850SWill Newton } 1593f95f3850SWill Newton 1594f95f3850SWill Newton if (pending & SDMMC_INT_RXDR) { 1595f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_RXDR); 1596b40af3aaSJames Hogan if (host->dir_status == DW_MCI_RECV_STATUS && host->sg) 1597f95f3850SWill Newton dw_mci_read_data_pio(host); 1598f95f3850SWill Newton } 1599f95f3850SWill Newton 1600f95f3850SWill Newton if (pending & SDMMC_INT_TXDR) { 1601f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_TXDR); 1602b40af3aaSJames Hogan if (host->dir_status == DW_MCI_SEND_STATUS && host->sg) 1603f95f3850SWill Newton dw_mci_write_data_pio(host); 1604f95f3850SWill Newton } 1605f95f3850SWill Newton 1606f95f3850SWill Newton if (pending & SDMMC_INT_CMD_DONE) { 1607f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_CMD_DONE); 1608f95f3850SWill Newton dw_mci_cmd_interrupt(host, status); 1609f95f3850SWill Newton } 1610f95f3850SWill Newton 1611f95f3850SWill Newton if (pending & SDMMC_INT_CD) { 1612f95f3850SWill Newton mci_writel(host, RINTSTS, SDMMC_INT_CD); 16131791b13eSJames Hogan queue_work(dw_mci_card_workqueue, &host->card_work); 1614f95f3850SWill Newton } 1615f95f3850SWill Newton 16161a5c8e1fSShashidhar Hiremath /* Handle SDIO Interrupts */ 16171a5c8e1fSShashidhar Hiremath for (i = 0; i < host->num_slots; i++) { 16181a5c8e1fSShashidhar Hiremath struct dw_mci_slot *slot = host->slot[i]; 16191a5c8e1fSShashidhar Hiremath if (pending & SDMMC_INT_SDIO(i)) { 16201a5c8e1fSShashidhar Hiremath mci_writel(host, RINTSTS, SDMMC_INT_SDIO(i)); 16211a5c8e1fSShashidhar Hiremath mmc_signal_sdio_irq(slot->mmc); 16221a5c8e1fSShashidhar Hiremath } 16231a5c8e1fSShashidhar Hiremath } 16241a5c8e1fSShashidhar Hiremath 1625f95f3850SWill Newton } while (pass_count++ < 5); 1626f95f3850SWill Newton 1627f95f3850SWill Newton #ifdef CONFIG_MMC_DW_IDMAC 1628f95f3850SWill Newton /* Handle DMA interrupts */ 1629f95f3850SWill Newton pending = mci_readl(host, IDSTS); 1630f95f3850SWill Newton if (pending & (SDMMC_IDMAC_INT_TI | SDMMC_IDMAC_INT_RI)) { 1631f95f3850SWill Newton mci_writel(host, IDSTS, SDMMC_IDMAC_INT_TI | SDMMC_IDMAC_INT_RI); 1632f95f3850SWill Newton mci_writel(host, IDSTS, SDMMC_IDMAC_INT_NI); 1633f95f3850SWill Newton set_bit(EVENT_DATA_COMPLETE, &host->pending_events); 1634f95f3850SWill Newton host->dma_ops->complete(host); 1635f95f3850SWill Newton } 1636f95f3850SWill Newton #endif 1637f95f3850SWill Newton 1638f95f3850SWill Newton return IRQ_HANDLED; 1639f95f3850SWill Newton } 1640f95f3850SWill Newton 16411791b13eSJames Hogan static void dw_mci_work_routine_card(struct work_struct *work) 1642f95f3850SWill Newton { 16431791b13eSJames Hogan struct dw_mci *host = container_of(work, struct dw_mci, card_work); 1644f95f3850SWill Newton int i; 1645f95f3850SWill Newton 1646f95f3850SWill Newton for (i = 0; i < host->num_slots; i++) { 1647f95f3850SWill Newton struct dw_mci_slot *slot = host->slot[i]; 1648f95f3850SWill Newton struct mmc_host *mmc = slot->mmc; 1649f95f3850SWill Newton struct mmc_request *mrq; 1650f95f3850SWill Newton int present; 1651f95f3850SWill Newton u32 ctrl; 1652f95f3850SWill Newton 1653f95f3850SWill Newton present = dw_mci_get_cd(mmc); 1654f95f3850SWill Newton while (present != slot->last_detect_state) { 1655f95f3850SWill Newton dev_dbg(&slot->mmc->class_dev, "card %s\n", 1656f95f3850SWill Newton present ? "inserted" : "removed"); 1657f95f3850SWill Newton 16581791b13eSJames Hogan /* Power up slot (before spin_lock, may sleep) */ 16591791b13eSJames Hogan if (present != 0 && host->pdata->setpower) 16601791b13eSJames Hogan host->pdata->setpower(slot->id, mmc->ocr_avail); 16611791b13eSJames Hogan 16621791b13eSJames Hogan spin_lock_bh(&host->lock); 16631791b13eSJames Hogan 1664f95f3850SWill Newton /* Card change detected */ 1665f95f3850SWill Newton slot->last_detect_state = present; 1666f95f3850SWill Newton 16671791b13eSJames Hogan /* Mark card as present if applicable */ 16681791b13eSJames Hogan if (present != 0) 1669f95f3850SWill Newton set_bit(DW_MMC_CARD_PRESENT, &slot->flags); 1670f95f3850SWill Newton 1671f95f3850SWill Newton /* Clean up queue if present */ 1672f95f3850SWill Newton mrq = slot->mrq; 1673f95f3850SWill Newton if (mrq) { 1674f95f3850SWill Newton if (mrq == host->mrq) { 1675f95f3850SWill Newton host->data = NULL; 1676f95f3850SWill Newton host->cmd = NULL; 1677f95f3850SWill Newton 1678f95f3850SWill Newton switch (host->state) { 1679f95f3850SWill Newton case STATE_IDLE: 1680f95f3850SWill Newton break; 1681f95f3850SWill Newton case STATE_SENDING_CMD: 1682f95f3850SWill Newton mrq->cmd->error = -ENOMEDIUM; 1683f95f3850SWill Newton if (!mrq->data) 1684f95f3850SWill Newton break; 1685f95f3850SWill Newton /* fall through */ 1686f95f3850SWill Newton case STATE_SENDING_DATA: 1687f95f3850SWill Newton mrq->data->error = -ENOMEDIUM; 1688f95f3850SWill Newton dw_mci_stop_dma(host); 1689f95f3850SWill Newton break; 1690f95f3850SWill Newton case STATE_DATA_BUSY: 1691f95f3850SWill Newton case STATE_DATA_ERROR: 1692f95f3850SWill Newton if (mrq->data->error == -EINPROGRESS) 1693f95f3850SWill Newton mrq->data->error = -ENOMEDIUM; 1694f95f3850SWill Newton if (!mrq->stop) 1695f95f3850SWill Newton break; 1696f95f3850SWill Newton /* fall through */ 1697f95f3850SWill Newton case STATE_SENDING_STOP: 1698f95f3850SWill Newton mrq->stop->error = -ENOMEDIUM; 1699f95f3850SWill Newton break; 1700f95f3850SWill Newton } 1701f95f3850SWill Newton 1702f95f3850SWill Newton dw_mci_request_end(host, mrq); 1703f95f3850SWill Newton } else { 1704f95f3850SWill Newton list_del(&slot->queue_node); 1705f95f3850SWill Newton mrq->cmd->error = -ENOMEDIUM; 1706f95f3850SWill Newton if (mrq->data) 1707f95f3850SWill Newton mrq->data->error = -ENOMEDIUM; 1708f95f3850SWill Newton if (mrq->stop) 1709f95f3850SWill Newton mrq->stop->error = -ENOMEDIUM; 1710f95f3850SWill Newton 1711f95f3850SWill Newton spin_unlock(&host->lock); 1712f95f3850SWill Newton mmc_request_done(slot->mmc, mrq); 1713f95f3850SWill Newton spin_lock(&host->lock); 1714f95f3850SWill Newton } 1715f95f3850SWill Newton } 1716f95f3850SWill Newton 1717f95f3850SWill Newton /* Power down slot */ 1718f95f3850SWill Newton if (present == 0) { 1719f95f3850SWill Newton clear_bit(DW_MMC_CARD_PRESENT, &slot->flags); 1720f95f3850SWill Newton 1721f95f3850SWill Newton /* 1722f95f3850SWill Newton * Clear down the FIFO - doing so generates a 1723f95f3850SWill Newton * block interrupt, hence setting the 1724f95f3850SWill Newton * scatter-gather pointer to NULL. 1725f95f3850SWill Newton */ 1726f9c2a0dcSSeungwon Jeon sg_miter_stop(&host->sg_miter); 1727f95f3850SWill Newton host->sg = NULL; 1728f95f3850SWill Newton 1729f95f3850SWill Newton ctrl = mci_readl(host, CTRL); 1730f95f3850SWill Newton ctrl |= SDMMC_CTRL_FIFO_RESET; 1731f95f3850SWill Newton mci_writel(host, CTRL, ctrl); 1732f95f3850SWill Newton 1733f95f3850SWill Newton #ifdef CONFIG_MMC_DW_IDMAC 1734f95f3850SWill Newton ctrl = mci_readl(host, BMOD); 1735f95f3850SWill Newton ctrl |= 0x01; /* Software reset of DMA */ 1736f95f3850SWill Newton mci_writel(host, BMOD, ctrl); 1737f95f3850SWill Newton #endif 1738f95f3850SWill Newton 1739f95f3850SWill Newton } 1740f95f3850SWill Newton 17411791b13eSJames Hogan spin_unlock_bh(&host->lock); 17421791b13eSJames Hogan 17431791b13eSJames Hogan /* Power down slot (after spin_unlock, may sleep) */ 17441791b13eSJames Hogan if (present == 0 && host->pdata->setpower) 17451791b13eSJames Hogan host->pdata->setpower(slot->id, 0); 17461791b13eSJames Hogan 1747f95f3850SWill Newton present = dw_mci_get_cd(mmc); 1748f95f3850SWill Newton } 1749f95f3850SWill Newton 1750f95f3850SWill Newton mmc_detect_change(slot->mmc, 1751f95f3850SWill Newton msecs_to_jiffies(host->pdata->detect_delay_ms)); 1752f95f3850SWill Newton } 1753f95f3850SWill Newton } 1754f95f3850SWill Newton 1755f95f3850SWill Newton static int __init dw_mci_init_slot(struct dw_mci *host, unsigned int id) 1756f95f3850SWill Newton { 1757f95f3850SWill Newton struct mmc_host *mmc; 1758f95f3850SWill Newton struct dw_mci_slot *slot; 1759f95f3850SWill Newton 176062ca8034SShashidhar Hiremath mmc = mmc_alloc_host(sizeof(struct dw_mci_slot), &host->dev); 1761f95f3850SWill Newton if (!mmc) 1762f95f3850SWill Newton return -ENOMEM; 1763f95f3850SWill Newton 1764f95f3850SWill Newton slot = mmc_priv(mmc); 1765f95f3850SWill Newton slot->id = id; 1766f95f3850SWill Newton slot->mmc = mmc; 1767f95f3850SWill Newton slot->host = host; 1768f95f3850SWill Newton 1769f95f3850SWill Newton mmc->ops = &dw_mci_ops; 1770f95f3850SWill Newton mmc->f_min = DIV_ROUND_UP(host->bus_hz, 510); 1771f95f3850SWill Newton mmc->f_max = host->bus_hz; 1772f95f3850SWill Newton 1773f95f3850SWill Newton if (host->pdata->get_ocr) 1774f95f3850SWill Newton mmc->ocr_avail = host->pdata->get_ocr(id); 1775f95f3850SWill Newton else 1776f95f3850SWill Newton mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; 1777f95f3850SWill Newton 1778f95f3850SWill Newton /* 1779f95f3850SWill Newton * Start with slot power disabled, it will be enabled when a card 1780f95f3850SWill Newton * is detected. 1781f95f3850SWill Newton */ 1782f95f3850SWill Newton if (host->pdata->setpower) 1783f95f3850SWill Newton host->pdata->setpower(id, 0); 1784f95f3850SWill Newton 1785fc3d7720SJaehoon Chung if (host->pdata->caps) 1786fc3d7720SJaehoon Chung mmc->caps = host->pdata->caps; 1787fc3d7720SJaehoon Chung 17884f408cc6SSeungwon Jeon if (host->pdata->caps2) 17894f408cc6SSeungwon Jeon mmc->caps2 = host->pdata->caps2; 17904f408cc6SSeungwon Jeon 1791f95f3850SWill Newton if (host->pdata->get_bus_wd) 1792f95f3850SWill Newton if (host->pdata->get_bus_wd(slot->id) >= 4) 1793f95f3850SWill Newton mmc->caps |= MMC_CAP_4_BIT_DATA; 1794f95f3850SWill Newton 1795f95f3850SWill Newton if (host->pdata->quirks & DW_MCI_QUIRK_HIGHSPEED) 17966daa7778SSeungwon Jeon mmc->caps |= MMC_CAP_SD_HIGHSPEED | MMC_CAP_MMC_HIGHSPEED; 1797f95f3850SWill Newton 1798356ac2cfSJaehoon Chung if (mmc->caps2 & MMC_CAP2_POWEROFF_NOTIFY) 1799356ac2cfSJaehoon Chung mmc->power_notify_type = MMC_HOST_PW_NOTIFY_SHORT; 1800356ac2cfSJaehoon Chung else 1801356ac2cfSJaehoon Chung mmc->power_notify_type = MMC_HOST_PW_NOTIFY_NONE; 1802356ac2cfSJaehoon Chung 1803f95f3850SWill Newton if (host->pdata->blk_settings) { 1804f95f3850SWill Newton mmc->max_segs = host->pdata->blk_settings->max_segs; 1805f95f3850SWill Newton mmc->max_blk_size = host->pdata->blk_settings->max_blk_size; 1806f95f3850SWill Newton mmc->max_blk_count = host->pdata->blk_settings->max_blk_count; 1807f95f3850SWill Newton mmc->max_req_size = host->pdata->blk_settings->max_req_size; 1808f95f3850SWill Newton mmc->max_seg_size = host->pdata->blk_settings->max_seg_size; 1809f95f3850SWill Newton } else { 1810f95f3850SWill Newton /* Useful defaults if platform data is unset. */ 1811a39e5746SJaehoon Chung #ifdef CONFIG_MMC_DW_IDMAC 1812a39e5746SJaehoon Chung mmc->max_segs = host->ring_size; 1813a39e5746SJaehoon Chung mmc->max_blk_size = 65536; 1814a39e5746SJaehoon Chung mmc->max_blk_count = host->ring_size; 1815a39e5746SJaehoon Chung mmc->max_seg_size = 0x1000; 1816a39e5746SJaehoon Chung mmc->max_req_size = mmc->max_seg_size * mmc->max_blk_count; 1817a39e5746SJaehoon Chung #else 1818f95f3850SWill Newton mmc->max_segs = 64; 1819f95f3850SWill Newton mmc->max_blk_size = 65536; /* BLKSIZ is 16 bits */ 1820f95f3850SWill Newton mmc->max_blk_count = 512; 1821f95f3850SWill Newton mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; 1822f95f3850SWill Newton mmc->max_seg_size = mmc->max_req_size; 1823f95f3850SWill Newton #endif /* CONFIG_MMC_DW_IDMAC */ 1824a39e5746SJaehoon Chung } 1825f95f3850SWill Newton 1826c07946a3SJaehoon Chung host->vmmc = regulator_get(mmc_dev(mmc), "vmmc"); 1827c07946a3SJaehoon Chung if (IS_ERR(host->vmmc)) { 1828a3c76eb9SGirish K S pr_info("%s: no vmmc regulator found\n", mmc_hostname(mmc)); 1829c07946a3SJaehoon Chung host->vmmc = NULL; 1830c07946a3SJaehoon Chung } else 1831c07946a3SJaehoon Chung regulator_enable(host->vmmc); 1832c07946a3SJaehoon Chung 1833f95f3850SWill Newton if (dw_mci_get_cd(mmc)) 1834f95f3850SWill Newton set_bit(DW_MMC_CARD_PRESENT, &slot->flags); 1835f95f3850SWill Newton else 1836f95f3850SWill Newton clear_bit(DW_MMC_CARD_PRESENT, &slot->flags); 1837f95f3850SWill Newton 1838f95f3850SWill Newton host->slot[id] = slot; 1839f95f3850SWill Newton mmc_add_host(mmc); 1840f95f3850SWill Newton 1841f95f3850SWill Newton #if defined(CONFIG_DEBUG_FS) 1842f95f3850SWill Newton dw_mci_init_debugfs(slot); 1843f95f3850SWill Newton #endif 1844f95f3850SWill Newton 1845f95f3850SWill Newton /* Card initially undetected */ 1846f95f3850SWill Newton slot->last_detect_state = 0; 1847f95f3850SWill Newton 1848dd6c4b98SWill Newton /* 1849dd6c4b98SWill Newton * Card may have been plugged in prior to boot so we 1850dd6c4b98SWill Newton * need to run the detect tasklet 1851dd6c4b98SWill Newton */ 18521791b13eSJames Hogan queue_work(dw_mci_card_workqueue, &host->card_work); 1853dd6c4b98SWill Newton 1854f95f3850SWill Newton return 0; 1855f95f3850SWill Newton } 1856f95f3850SWill Newton 1857f95f3850SWill Newton static void dw_mci_cleanup_slot(struct dw_mci_slot *slot, unsigned int id) 1858f95f3850SWill Newton { 1859f95f3850SWill Newton /* Shutdown detect IRQ */ 1860f95f3850SWill Newton if (slot->host->pdata->exit) 1861f95f3850SWill Newton slot->host->pdata->exit(id); 1862f95f3850SWill Newton 1863f95f3850SWill Newton /* Debugfs stuff is cleaned up by mmc core */ 1864f95f3850SWill Newton mmc_remove_host(slot->mmc); 1865f95f3850SWill Newton slot->host->slot[id] = NULL; 1866f95f3850SWill Newton mmc_free_host(slot->mmc); 1867f95f3850SWill Newton } 1868f95f3850SWill Newton 1869f95f3850SWill Newton static void dw_mci_init_dma(struct dw_mci *host) 1870f95f3850SWill Newton { 1871f95f3850SWill Newton /* Alloc memory for sg translation */ 187262ca8034SShashidhar Hiremath host->sg_cpu = dma_alloc_coherent(&host->dev, PAGE_SIZE, 1873f95f3850SWill Newton &host->sg_dma, GFP_KERNEL); 1874f95f3850SWill Newton if (!host->sg_cpu) { 187562ca8034SShashidhar Hiremath dev_err(&host->dev, "%s: could not alloc DMA memory\n", 1876f95f3850SWill Newton __func__); 1877f95f3850SWill Newton goto no_dma; 1878f95f3850SWill Newton } 1879f95f3850SWill Newton 1880f95f3850SWill Newton /* Determine which DMA interface to use */ 1881f95f3850SWill Newton #ifdef CONFIG_MMC_DW_IDMAC 1882f95f3850SWill Newton host->dma_ops = &dw_mci_idmac_ops; 188362ca8034SShashidhar Hiremath dev_info(&host->dev, "Using internal DMA controller.\n"); 1884f95f3850SWill Newton #endif 1885f95f3850SWill Newton 1886f95f3850SWill Newton if (!host->dma_ops) 1887f95f3850SWill Newton goto no_dma; 1888f95f3850SWill Newton 1889f95f3850SWill Newton if (host->dma_ops->init) { 1890f95f3850SWill Newton if (host->dma_ops->init(host)) { 189162ca8034SShashidhar Hiremath dev_err(&host->dev, "%s: Unable to initialize " 1892f95f3850SWill Newton "DMA Controller.\n", __func__); 1893f95f3850SWill Newton goto no_dma; 1894f95f3850SWill Newton } 1895f95f3850SWill Newton } else { 189662ca8034SShashidhar Hiremath dev_err(&host->dev, "DMA initialization not found.\n"); 1897f95f3850SWill Newton goto no_dma; 1898f95f3850SWill Newton } 1899f95f3850SWill Newton 1900f95f3850SWill Newton host->use_dma = 1; 1901f95f3850SWill Newton return; 1902f95f3850SWill Newton 1903f95f3850SWill Newton no_dma: 190462ca8034SShashidhar Hiremath dev_info(&host->dev, "Using PIO mode.\n"); 1905f95f3850SWill Newton host->use_dma = 0; 1906f95f3850SWill Newton return; 1907f95f3850SWill Newton } 1908f95f3850SWill Newton 1909f95f3850SWill Newton static bool mci_wait_reset(struct device *dev, struct dw_mci *host) 1910f95f3850SWill Newton { 1911f95f3850SWill Newton unsigned long timeout = jiffies + msecs_to_jiffies(500); 1912f95f3850SWill Newton unsigned int ctrl; 1913f95f3850SWill Newton 1914f95f3850SWill Newton mci_writel(host, CTRL, (SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | 1915f95f3850SWill Newton SDMMC_CTRL_DMA_RESET)); 1916f95f3850SWill Newton 1917f95f3850SWill Newton /* wait till resets clear */ 1918f95f3850SWill Newton do { 1919f95f3850SWill Newton ctrl = mci_readl(host, CTRL); 1920f95f3850SWill Newton if (!(ctrl & (SDMMC_CTRL_RESET | SDMMC_CTRL_FIFO_RESET | 1921f95f3850SWill Newton SDMMC_CTRL_DMA_RESET))) 1922f95f3850SWill Newton return true; 1923f95f3850SWill Newton } while (time_before(jiffies, timeout)); 1924f95f3850SWill Newton 1925f95f3850SWill Newton dev_err(dev, "Timeout resetting block (ctrl %#x)\n", ctrl); 1926f95f3850SWill Newton 1927f95f3850SWill Newton return false; 1928f95f3850SWill Newton } 1929f95f3850SWill Newton 193062ca8034SShashidhar Hiremath int dw_mci_probe(struct dw_mci *host) 1931f95f3850SWill Newton { 193262ca8034SShashidhar Hiremath int width, i, ret = 0; 1933f95f3850SWill Newton u32 fifo_size; 1934f95f3850SWill Newton 193562ca8034SShashidhar Hiremath if (!host->pdata || !host->pdata->init) { 193662ca8034SShashidhar Hiremath dev_err(&host->dev, 1937f95f3850SWill Newton "Platform data must supply init function\n"); 193862ca8034SShashidhar Hiremath return -ENODEV; 1939f95f3850SWill Newton } 1940f95f3850SWill Newton 194162ca8034SShashidhar Hiremath if (!host->pdata->select_slot && host->pdata->num_slots > 1) { 194262ca8034SShashidhar Hiremath dev_err(&host->dev, 1943f95f3850SWill Newton "Platform data must supply select_slot function\n"); 194462ca8034SShashidhar Hiremath return -ENODEV; 1945f95f3850SWill Newton } 1946f95f3850SWill Newton 194762ca8034SShashidhar Hiremath if (!host->pdata->bus_hz) { 194862ca8034SShashidhar Hiremath dev_err(&host->dev, 1949f95f3850SWill Newton "Platform data must supply bus speed\n"); 195062ca8034SShashidhar Hiremath return -ENODEV; 1951f95f3850SWill Newton } 1952f95f3850SWill Newton 195362ca8034SShashidhar Hiremath host->bus_hz = host->pdata->bus_hz; 195462ca8034SShashidhar Hiremath host->quirks = host->pdata->quirks; 1955f95f3850SWill Newton 1956f95f3850SWill Newton spin_lock_init(&host->lock); 1957f95f3850SWill Newton INIT_LIST_HEAD(&host->queue); 1958f95f3850SWill Newton 1959f95f3850SWill Newton 196062ca8034SShashidhar Hiremath host->dma_ops = host->pdata->dma_ops; 1961f95f3850SWill Newton dw_mci_init_dma(host); 1962f95f3850SWill Newton 1963f95f3850SWill Newton /* 1964f95f3850SWill Newton * Get the host data width - this assumes that HCON has been set with 1965f95f3850SWill Newton * the correct values. 1966f95f3850SWill Newton */ 1967f95f3850SWill Newton i = (mci_readl(host, HCON) >> 7) & 0x7; 1968f95f3850SWill Newton if (!i) { 1969f95f3850SWill Newton host->push_data = dw_mci_push_data16; 1970f95f3850SWill Newton host->pull_data = dw_mci_pull_data16; 1971f95f3850SWill Newton width = 16; 1972f95f3850SWill Newton host->data_shift = 1; 1973f95f3850SWill Newton } else if (i == 2) { 1974f95f3850SWill Newton host->push_data = dw_mci_push_data64; 1975f95f3850SWill Newton host->pull_data = dw_mci_pull_data64; 1976f95f3850SWill Newton width = 64; 1977f95f3850SWill Newton host->data_shift = 3; 1978f95f3850SWill Newton } else { 1979f95f3850SWill Newton /* Check for a reserved value, and warn if it is */ 1980f95f3850SWill Newton WARN((i != 1), 1981f95f3850SWill Newton "HCON reports a reserved host data width!\n" 1982f95f3850SWill Newton "Defaulting to 32-bit access.\n"); 1983f95f3850SWill Newton host->push_data = dw_mci_push_data32; 1984f95f3850SWill Newton host->pull_data = dw_mci_pull_data32; 1985f95f3850SWill Newton width = 32; 1986f95f3850SWill Newton host->data_shift = 2; 1987f95f3850SWill Newton } 1988f95f3850SWill Newton 1989f95f3850SWill Newton /* Reset all blocks */ 199062ca8034SShashidhar Hiremath if (!mci_wait_reset(&host->dev, host)) { 1991f95f3850SWill Newton ret = -ENODEV; 1992f95f3850SWill Newton goto err_dmaunmap; 1993f95f3850SWill Newton } 1994f95f3850SWill Newton 1995f95f3850SWill Newton /* Clear the interrupts for the host controller */ 1996f95f3850SWill Newton mci_writel(host, RINTSTS, 0xFFFFFFFF); 1997f95f3850SWill Newton mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */ 1998f95f3850SWill Newton 1999f95f3850SWill Newton /* Put in max timeout */ 2000f95f3850SWill Newton mci_writel(host, TMOUT, 0xFFFFFFFF); 2001f95f3850SWill Newton 2002f95f3850SWill Newton /* 2003f95f3850SWill Newton * FIFO threshold settings RxMark = fifo_size / 2 - 1, 2004f95f3850SWill Newton * Tx Mark = fifo_size / 2 DMA Size = 8 2005f95f3850SWill Newton */ 2006b86d8253SJames Hogan if (!host->pdata->fifo_depth) { 2007b86d8253SJames Hogan /* 2008b86d8253SJames Hogan * Power-on value of RX_WMark is FIFO_DEPTH-1, but this may 2009b86d8253SJames Hogan * have been overwritten by the bootloader, just like we're 2010b86d8253SJames Hogan * about to do, so if you know the value for your hardware, you 2011b86d8253SJames Hogan * should put it in the platform data. 2012b86d8253SJames Hogan */ 2013f95f3850SWill Newton fifo_size = mci_readl(host, FIFOTH); 20148234e869SJaehoon Chung fifo_size = 1 + ((fifo_size >> 16) & 0xfff); 2015b86d8253SJames Hogan } else { 2016b86d8253SJames Hogan fifo_size = host->pdata->fifo_depth; 2017b86d8253SJames Hogan } 2018b86d8253SJames Hogan host->fifo_depth = fifo_size; 2019e61cf118SJaehoon Chung host->fifoth_val = ((0x2 << 28) | ((fifo_size/2 - 1) << 16) | 2020e61cf118SJaehoon Chung ((fifo_size/2) << 0)); 2021e61cf118SJaehoon Chung mci_writel(host, FIFOTH, host->fifoth_val); 2022f95f3850SWill Newton 2023f95f3850SWill Newton /* disable clock to CIU */ 2024f95f3850SWill Newton mci_writel(host, CLKENA, 0); 2025f95f3850SWill Newton mci_writel(host, CLKSRC, 0); 2026f95f3850SWill Newton 2027f95f3850SWill Newton tasklet_init(&host->tasklet, dw_mci_tasklet_func, (unsigned long)host); 20281791b13eSJames Hogan dw_mci_card_workqueue = alloc_workqueue("dw-mci-card", 20291791b13eSJames Hogan WQ_MEM_RECLAIM | WQ_NON_REENTRANT, 1); 20301791b13eSJames Hogan if (!dw_mci_card_workqueue) 20311791b13eSJames Hogan goto err_dmaunmap; 20321791b13eSJames Hogan INIT_WORK(&host->card_work, dw_mci_work_routine_card); 203362ca8034SShashidhar Hiremath ret = request_irq(host->irq, dw_mci_interrupt, host->irq_flags, "dw-mci", host); 2034f95f3850SWill Newton if (ret) 20351791b13eSJames Hogan goto err_workqueue; 2036f95f3850SWill Newton 2037f95f3850SWill Newton if (host->pdata->num_slots) 2038f95f3850SWill Newton host->num_slots = host->pdata->num_slots; 2039f95f3850SWill Newton else 2040f95f3850SWill Newton host->num_slots = ((mci_readl(host, HCON) >> 1) & 0x1F) + 1; 2041f95f3850SWill Newton 2042f95f3850SWill Newton /* We need at least one slot to succeed */ 2043f95f3850SWill Newton for (i = 0; i < host->num_slots; i++) { 2044f95f3850SWill Newton ret = dw_mci_init_slot(host, i); 2045f95f3850SWill Newton if (ret) { 2046f95f3850SWill Newton ret = -ENODEV; 2047f95f3850SWill Newton goto err_init_slot; 2048f95f3850SWill Newton } 2049f95f3850SWill Newton } 2050f95f3850SWill Newton 2051f95f3850SWill Newton /* 20524e0a5adfSJaehoon Chung * In 2.40a spec, Data offset is changed. 20534e0a5adfSJaehoon Chung * Need to check the version-id and set data-offset for DATA register. 20544e0a5adfSJaehoon Chung */ 20554e0a5adfSJaehoon Chung host->verid = SDMMC_GET_VERID(mci_readl(host, VERID)); 205662ca8034SShashidhar Hiremath dev_info(&host->dev, "Version ID is %04x\n", host->verid); 20574e0a5adfSJaehoon Chung 20584e0a5adfSJaehoon Chung if (host->verid < DW_MMC_240A) 20594e0a5adfSJaehoon Chung host->data_offset = DATA_OFFSET; 20604e0a5adfSJaehoon Chung else 20614e0a5adfSJaehoon Chung host->data_offset = DATA_240A_OFFSET; 20624e0a5adfSJaehoon Chung 20634e0a5adfSJaehoon Chung /* 2064f95f3850SWill Newton * Enable interrupts for command done, data over, data empty, card det, 2065f95f3850SWill Newton * receive ready and error such as transmit, receive timeout, crc error 2066f95f3850SWill Newton */ 2067f95f3850SWill Newton mci_writel(host, RINTSTS, 0xFFFFFFFF); 2068f95f3850SWill Newton mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER | 2069f95f3850SWill Newton SDMMC_INT_TXDR | SDMMC_INT_RXDR | 2070f95f3850SWill Newton DW_MCI_ERROR_FLAGS | SDMMC_INT_CD); 2071f95f3850SWill Newton mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); /* Enable mci interrupt */ 2072f95f3850SWill Newton 207362ca8034SShashidhar Hiremath dev_info(&host->dev, "DW MMC controller at irq %d, " 2074b86d8253SJames Hogan "%d bit host data width, " 2075b86d8253SJames Hogan "%u deep fifo\n", 207662ca8034SShashidhar Hiremath host->irq, width, fifo_size); 2077f95f3850SWill Newton if (host->quirks & DW_MCI_QUIRK_IDMAC_DTO) 207862ca8034SShashidhar Hiremath dev_info(&host->dev, "Internal DMAC interrupt fix enabled.\n"); 2079f95f3850SWill Newton 2080f95f3850SWill Newton return 0; 2081f95f3850SWill Newton 2082f95f3850SWill Newton err_init_slot: 2083f95f3850SWill Newton /* De-init any initialized slots */ 2084f95f3850SWill Newton while (i > 0) { 2085f95f3850SWill Newton if (host->slot[i]) 2086f95f3850SWill Newton dw_mci_cleanup_slot(host->slot[i], i); 2087f95f3850SWill Newton i--; 2088f95f3850SWill Newton } 208962ca8034SShashidhar Hiremath free_irq(host->irq, host); 2090f95f3850SWill Newton 20911791b13eSJames Hogan err_workqueue: 20921791b13eSJames Hogan destroy_workqueue(dw_mci_card_workqueue); 20931791b13eSJames Hogan 2094f95f3850SWill Newton err_dmaunmap: 2095f95f3850SWill Newton if (host->use_dma && host->dma_ops->exit) 2096f95f3850SWill Newton host->dma_ops->exit(host); 209762ca8034SShashidhar Hiremath dma_free_coherent(&host->dev, PAGE_SIZE, 2098f95f3850SWill Newton host->sg_cpu, host->sg_dma); 2099f95f3850SWill Newton 2100c07946a3SJaehoon Chung if (host->vmmc) { 2101c07946a3SJaehoon Chung regulator_disable(host->vmmc); 2102c07946a3SJaehoon Chung regulator_put(host->vmmc); 2103c07946a3SJaehoon Chung } 2104f95f3850SWill Newton return ret; 2105f95f3850SWill Newton } 210662ca8034SShashidhar Hiremath EXPORT_SYMBOL(dw_mci_probe); 2107f95f3850SWill Newton 210862ca8034SShashidhar Hiremath void dw_mci_remove(struct dw_mci *host) 2109f95f3850SWill Newton { 2110f95f3850SWill Newton int i; 2111f95f3850SWill Newton 2112f95f3850SWill Newton mci_writel(host, RINTSTS, 0xFFFFFFFF); 2113f95f3850SWill Newton mci_writel(host, INTMASK, 0); /* disable all mmc interrupt first */ 2114f95f3850SWill Newton 2115f95f3850SWill Newton for (i = 0; i < host->num_slots; i++) { 211662ca8034SShashidhar Hiremath dev_dbg(&host->dev, "remove slot %d\n", i); 2117f95f3850SWill Newton if (host->slot[i]) 2118f95f3850SWill Newton dw_mci_cleanup_slot(host->slot[i], i); 2119f95f3850SWill Newton } 2120f95f3850SWill Newton 2121f95f3850SWill Newton /* disable clock to CIU */ 2122f95f3850SWill Newton mci_writel(host, CLKENA, 0); 2123f95f3850SWill Newton mci_writel(host, CLKSRC, 0); 2124f95f3850SWill Newton 212562ca8034SShashidhar Hiremath free_irq(host->irq, host); 21261791b13eSJames Hogan destroy_workqueue(dw_mci_card_workqueue); 212762ca8034SShashidhar Hiremath dma_free_coherent(&host->dev, PAGE_SIZE, host->sg_cpu, host->sg_dma); 2128f95f3850SWill Newton 2129f95f3850SWill Newton if (host->use_dma && host->dma_ops->exit) 2130f95f3850SWill Newton host->dma_ops->exit(host); 2131f95f3850SWill Newton 2132c07946a3SJaehoon Chung if (host->vmmc) { 2133c07946a3SJaehoon Chung regulator_disable(host->vmmc); 2134c07946a3SJaehoon Chung regulator_put(host->vmmc); 2135c07946a3SJaehoon Chung } 2136c07946a3SJaehoon Chung 2137f95f3850SWill Newton } 213862ca8034SShashidhar Hiremath EXPORT_SYMBOL(dw_mci_remove); 213962ca8034SShashidhar Hiremath 214062ca8034SShashidhar Hiremath 2141f95f3850SWill Newton 21426fe8890dSJaehoon Chung #ifdef CONFIG_PM_SLEEP 2143f95f3850SWill Newton /* 2144f95f3850SWill Newton * TODO: we should probably disable the clock to the card in the suspend path. 2145f95f3850SWill Newton */ 214662ca8034SShashidhar Hiremath int dw_mci_suspend(struct dw_mci *host) 2147f95f3850SWill Newton { 214862ca8034SShashidhar Hiremath int i, ret = 0; 2149f95f3850SWill Newton 2150f95f3850SWill Newton for (i = 0; i < host->num_slots; i++) { 2151f95f3850SWill Newton struct dw_mci_slot *slot = host->slot[i]; 2152f95f3850SWill Newton if (!slot) 2153f95f3850SWill Newton continue; 2154f95f3850SWill Newton ret = mmc_suspend_host(slot->mmc); 2155f95f3850SWill Newton if (ret < 0) { 2156f95f3850SWill Newton while (--i >= 0) { 2157f95f3850SWill Newton slot = host->slot[i]; 2158f95f3850SWill Newton if (slot) 2159f95f3850SWill Newton mmc_resume_host(host->slot[i]->mmc); 2160f95f3850SWill Newton } 2161f95f3850SWill Newton return ret; 2162f95f3850SWill Newton } 2163f95f3850SWill Newton } 2164f95f3850SWill Newton 2165c07946a3SJaehoon Chung if (host->vmmc) 2166c07946a3SJaehoon Chung regulator_disable(host->vmmc); 2167c07946a3SJaehoon Chung 2168f95f3850SWill Newton return 0; 2169f95f3850SWill Newton } 217062ca8034SShashidhar Hiremath EXPORT_SYMBOL(dw_mci_suspend); 2171f95f3850SWill Newton 217262ca8034SShashidhar Hiremath int dw_mci_resume(struct dw_mci *host) 2173f95f3850SWill Newton { 2174f95f3850SWill Newton int i, ret; 2175f95f3850SWill Newton 21761d6c4e0aSJaehoon Chung if (host->vmmc) 21771d6c4e0aSJaehoon Chung regulator_enable(host->vmmc); 21781d6c4e0aSJaehoon Chung 2179e61cf118SJaehoon Chung if (host->dma_ops->init) 2180e61cf118SJaehoon Chung host->dma_ops->init(host); 2181e61cf118SJaehoon Chung 218262ca8034SShashidhar Hiremath if (!mci_wait_reset(&host->dev, host)) { 2183e61cf118SJaehoon Chung ret = -ENODEV; 2184e61cf118SJaehoon Chung return ret; 2185e61cf118SJaehoon Chung } 2186e61cf118SJaehoon Chung 2187e61cf118SJaehoon Chung /* Restore the old value at FIFOTH register */ 2188e61cf118SJaehoon Chung mci_writel(host, FIFOTH, host->fifoth_val); 2189e61cf118SJaehoon Chung 2190e61cf118SJaehoon Chung mci_writel(host, RINTSTS, 0xFFFFFFFF); 2191e61cf118SJaehoon Chung mci_writel(host, INTMASK, SDMMC_INT_CMD_DONE | SDMMC_INT_DATA_OVER | 2192e61cf118SJaehoon Chung SDMMC_INT_TXDR | SDMMC_INT_RXDR | 2193e61cf118SJaehoon Chung DW_MCI_ERROR_FLAGS | SDMMC_INT_CD); 2194e61cf118SJaehoon Chung mci_writel(host, CTRL, SDMMC_CTRL_INT_ENABLE); 2195e61cf118SJaehoon Chung 2196f95f3850SWill Newton for (i = 0; i < host->num_slots; i++) { 2197f95f3850SWill Newton struct dw_mci_slot *slot = host->slot[i]; 2198f95f3850SWill Newton if (!slot) 2199f95f3850SWill Newton continue; 2200f95f3850SWill Newton ret = mmc_resume_host(host->slot[i]->mmc); 2201f95f3850SWill Newton if (ret < 0) 2202f95f3850SWill Newton return ret; 2203f95f3850SWill Newton } 2204f95f3850SWill Newton return 0; 2205f95f3850SWill Newton } 220662ca8034SShashidhar Hiremath EXPORT_SYMBOL(dw_mci_resume); 22076fe8890dSJaehoon Chung #endif /* CONFIG_PM_SLEEP */ 22086fe8890dSJaehoon Chung 2209f95f3850SWill Newton static int __init dw_mci_init(void) 2210f95f3850SWill Newton { 221162ca8034SShashidhar Hiremath printk(KERN_INFO "Synopsys Designware Multimedia Card Interface Driver"); 221262ca8034SShashidhar Hiremath return 0; 2213f95f3850SWill Newton } 2214f95f3850SWill Newton 2215f95f3850SWill Newton static void __exit dw_mci_exit(void) 2216f95f3850SWill Newton { 2217f95f3850SWill Newton } 2218f95f3850SWill Newton 2219f95f3850SWill Newton module_init(dw_mci_init); 2220f95f3850SWill Newton module_exit(dw_mci_exit); 2221f95f3850SWill Newton 2222f95f3850SWill Newton MODULE_DESCRIPTION("DW Multimedia Card Interface driver"); 2223f95f3850SWill Newton MODULE_AUTHOR("NXP Semiconductor VietNam"); 2224f95f3850SWill Newton MODULE_AUTHOR("Imagination Technologies Ltd"); 2225f95f3850SWill Newton MODULE_LICENSE("GPL v2"); 2226