1 /* 2 * cb710/mmc.c 3 * 4 * Copyright by Michał Mirosław, 2008-2009 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 */ 10 #include <linux/kernel.h> 11 #include <linux/module.h> 12 #include <linux/slab.h> 13 #include <linux/pci.h> 14 #include <linux/delay.h> 15 #include "cb710-mmc.h" 16 17 static const u8 cb710_clock_divider_log2[8] = { 18 /* 1, 2, 4, 8, 16, 32, 128, 512 */ 19 0, 1, 2, 3, 4, 5, 7, 9 20 }; 21 #define CB710_MAX_DIVIDER_IDX \ 22 (ARRAY_SIZE(cb710_clock_divider_log2) - 1) 23 24 static const u8 cb710_src_freq_mhz[16] = { 25 33, 10, 20, 25, 30, 35, 40, 45, 26 50, 55, 60, 65, 70, 75, 80, 85 27 }; 28 29 static void cb710_mmc_set_clock(struct mmc_host *mmc, int hz) 30 { 31 struct cb710_slot *slot = cb710_mmc_to_slot(mmc); 32 struct pci_dev *pdev = cb710_slot_to_chip(slot)->pdev; 33 u32 src_freq_idx; 34 u32 divider_idx; 35 int src_hz; 36 37 /* this is magic, unverifiable for me, unless I get 38 * MMC card with cables connected to bus signals */ 39 pci_read_config_dword(pdev, 0x48, &src_freq_idx); 40 src_freq_idx = (src_freq_idx >> 16) & 0xF; 41 src_hz = cb710_src_freq_mhz[src_freq_idx] * 1000000; 42 43 for (divider_idx = 0; divider_idx < CB710_MAX_DIVIDER_IDX; ++divider_idx) { 44 if (hz >= src_hz >> cb710_clock_divider_log2[divider_idx]) 45 break; 46 } 47 48 if (src_freq_idx) 49 divider_idx |= 0x8; 50 51 cb710_pci_update_config_reg(pdev, 0x40, ~0xF0000000, divider_idx << 28); 52 53 dev_dbg(cb710_slot_dev(slot), 54 "clock set to %d Hz, wanted %d Hz; flag = %d\n", 55 src_hz >> cb710_clock_divider_log2[divider_idx & 7], 56 hz, (divider_idx & 8) != 0); 57 } 58 59 static void __cb710_mmc_enable_irq(struct cb710_slot *slot, 60 unsigned short enable, unsigned short mask) 61 { 62 /* clear global IE 63 * - it gets set later if any interrupt sources are enabled */ 64 mask |= CB710_MMC_IE_IRQ_ENABLE; 65 66 /* look like interrupt is fired whenever 67 * WORD[0x0C] & WORD[0x10] != 0; 68 * -> bit 15 port 0x0C seems to be global interrupt enable 69 */ 70 71 enable = (cb710_read_port_16(slot, CB710_MMC_IRQ_ENABLE_PORT) 72 & ~mask) | enable; 73 74 if (enable) 75 enable |= CB710_MMC_IE_IRQ_ENABLE; 76 77 cb710_write_port_16(slot, CB710_MMC_IRQ_ENABLE_PORT, enable); 78 } 79 80 static void cb710_mmc_enable_irq(struct cb710_slot *slot, 81 unsigned short enable, unsigned short mask) 82 { 83 struct cb710_mmc_reader *reader = mmc_priv(cb710_slot_to_mmc(slot)); 84 unsigned long flags; 85 86 spin_lock_irqsave(&reader->irq_lock, flags); 87 /* this is the only thing irq_lock protects */ 88 __cb710_mmc_enable_irq(slot, enable, mask); 89 spin_unlock_irqrestore(&reader->irq_lock, flags); 90 } 91 92 static void cb710_mmc_reset_events(struct cb710_slot *slot) 93 { 94 cb710_write_port_8(slot, CB710_MMC_STATUS0_PORT, 0xFF); 95 cb710_write_port_8(slot, CB710_MMC_STATUS1_PORT, 0xFF); 96 cb710_write_port_8(slot, CB710_MMC_STATUS2_PORT, 0xFF); 97 } 98 99 static int cb710_mmc_is_card_inserted(struct cb710_slot *slot) 100 { 101 return cb710_read_port_8(slot, CB710_MMC_STATUS3_PORT) 102 & CB710_MMC_S3_CARD_DETECTED; 103 } 104 105 static void cb710_mmc_enable_4bit_data(struct cb710_slot *slot, int enable) 106 { 107 dev_dbg(cb710_slot_dev(slot), "configuring %d-data-line%s mode\n", 108 enable ? 4 : 1, enable ? "s" : ""); 109 if (enable) 110 cb710_modify_port_8(slot, CB710_MMC_CONFIG1_PORT, 111 CB710_MMC_C1_4BIT_DATA_BUS, 0); 112 else 113 cb710_modify_port_8(slot, CB710_MMC_CONFIG1_PORT, 114 0, CB710_MMC_C1_4BIT_DATA_BUS); 115 } 116 117 static int cb710_check_event(struct cb710_slot *slot, u8 what) 118 { 119 u16 status; 120 121 status = cb710_read_port_16(slot, CB710_MMC_STATUS_PORT); 122 123 if (status & CB710_MMC_S0_FIFO_UNDERFLOW) { 124 /* it is just a guess, so log it */ 125 dev_dbg(cb710_slot_dev(slot), 126 "CHECK : ignoring bit 6 in status %04X\n", status); 127 cb710_write_port_8(slot, CB710_MMC_STATUS0_PORT, 128 CB710_MMC_S0_FIFO_UNDERFLOW); 129 status &= ~CB710_MMC_S0_FIFO_UNDERFLOW; 130 } 131 132 if (status & CB710_MMC_STATUS_ERROR_EVENTS) { 133 dev_dbg(cb710_slot_dev(slot), 134 "CHECK : returning EIO on status %04X\n", status); 135 cb710_write_port_8(slot, CB710_MMC_STATUS0_PORT, status & 0xFF); 136 cb710_write_port_8(slot, CB710_MMC_STATUS1_PORT, 137 CB710_MMC_S1_RESET); 138 return -EIO; 139 } 140 141 /* 'what' is a bit in MMC_STATUS1 */ 142 if ((status >> 8) & what) { 143 cb710_write_port_8(slot, CB710_MMC_STATUS1_PORT, what); 144 return 1; 145 } 146 147 return 0; 148 } 149 150 static int cb710_wait_for_event(struct cb710_slot *slot, u8 what) 151 { 152 int err = 0; 153 unsigned limit = 2000000; /* FIXME: real timeout */ 154 155 #ifdef CONFIG_CB710_DEBUG 156 u32 e, x; 157 e = cb710_read_port_32(slot, CB710_MMC_STATUS_PORT); 158 #endif 159 160 while (!(err = cb710_check_event(slot, what))) { 161 if (!--limit) { 162 cb710_dump_regs(cb710_slot_to_chip(slot), 163 CB710_DUMP_REGS_MMC); 164 err = -ETIMEDOUT; 165 break; 166 } 167 udelay(1); 168 } 169 170 #ifdef CONFIG_CB710_DEBUG 171 x = cb710_read_port_32(slot, CB710_MMC_STATUS_PORT); 172 173 limit = 2000000 - limit; 174 if (limit > 100) 175 dev_dbg(cb710_slot_dev(slot), 176 "WAIT10: waited %d loops, what %d, entry val %08X, exit val %08X\n", 177 limit, what, e, x); 178 #endif 179 return err < 0 ? err : 0; 180 } 181 182 183 static int cb710_wait_while_busy(struct cb710_slot *slot, uint8_t mask) 184 { 185 unsigned limit = 500000; /* FIXME: real timeout */ 186 int err = 0; 187 188 #ifdef CONFIG_CB710_DEBUG 189 u32 e, x; 190 e = cb710_read_port_32(slot, CB710_MMC_STATUS_PORT); 191 #endif 192 193 while (cb710_read_port_8(slot, CB710_MMC_STATUS2_PORT) & mask) { 194 if (!--limit) { 195 cb710_dump_regs(cb710_slot_to_chip(slot), 196 CB710_DUMP_REGS_MMC); 197 err = -ETIMEDOUT; 198 break; 199 } 200 udelay(1); 201 } 202 203 #ifdef CONFIG_CB710_DEBUG 204 x = cb710_read_port_32(slot, CB710_MMC_STATUS_PORT); 205 206 limit = 500000 - limit; 207 if (limit > 100) 208 dev_dbg(cb710_slot_dev(slot), 209 "WAIT12: waited %d loops, mask %02X, entry val %08X, exit val %08X\n", 210 limit, mask, e, x); 211 #endif 212 return 0; 213 } 214 215 static void cb710_mmc_set_transfer_size(struct cb710_slot *slot, 216 size_t count, size_t blocksize) 217 { 218 cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20); 219 cb710_write_port_32(slot, CB710_MMC_TRANSFER_SIZE_PORT, 220 ((count - 1) << 16)|(blocksize - 1)); 221 222 dev_vdbg(cb710_slot_dev(slot), "set up for %d block%s of %d bytes\n", 223 count, count == 1 ? "" : "s", blocksize); 224 } 225 226 static void cb710_mmc_fifo_hack(struct cb710_slot *slot) 227 { 228 /* without this, received data is prepended with 8-bytes of zeroes */ 229 u32 r1, r2; 230 int ok = 0; 231 232 r1 = cb710_read_port_32(slot, CB710_MMC_DATA_PORT); 233 r2 = cb710_read_port_32(slot, CB710_MMC_DATA_PORT); 234 if (cb710_read_port_8(slot, CB710_MMC_STATUS0_PORT) 235 & CB710_MMC_S0_FIFO_UNDERFLOW) { 236 cb710_write_port_8(slot, CB710_MMC_STATUS0_PORT, 237 CB710_MMC_S0_FIFO_UNDERFLOW); 238 ok = 1; 239 } 240 241 dev_dbg(cb710_slot_dev(slot), 242 "FIFO-read-hack: expected STATUS0 bit was %s\n", 243 ok ? "set." : "NOT SET!"); 244 dev_dbg(cb710_slot_dev(slot), 245 "FIFO-read-hack: dwords ignored: %08X %08X - %s\n", 246 r1, r2, (r1|r2) ? "BAD (NOT ZERO)!" : "ok"); 247 } 248 249 static int cb710_mmc_receive_pio(struct cb710_slot *slot, 250 struct sg_mapping_iter *miter, size_t dw_count) 251 { 252 if (!(cb710_read_port_8(slot, CB710_MMC_STATUS2_PORT) & CB710_MMC_S2_FIFO_READY)) { 253 int err = cb710_wait_for_event(slot, 254 CB710_MMC_S1_PIO_TRANSFER_DONE); 255 if (err) 256 return err; 257 } 258 259 cb710_sg_dwiter_write_from_io(miter, 260 slot->iobase + CB710_MMC_DATA_PORT, dw_count); 261 262 return 0; 263 } 264 265 static bool cb710_is_transfer_size_supported(struct mmc_data *data) 266 { 267 return !(data->blksz & 15 && (data->blocks != 1 || data->blksz != 8)); 268 } 269 270 static int cb710_mmc_receive(struct cb710_slot *slot, struct mmc_data *data) 271 { 272 struct sg_mapping_iter miter; 273 size_t len, blocks = data->blocks; 274 int err = 0; 275 276 /* TODO: I don't know how/if the hardware handles non-16B-boundary blocks 277 * except single 8B block */ 278 if (unlikely(data->blksz & 15 && (data->blocks != 1 || data->blksz != 8))) 279 return -EINVAL; 280 281 sg_miter_start(&miter, data->sg, data->sg_len, 0); 282 283 cb710_modify_port_8(slot, CB710_MMC_CONFIG2_PORT, 284 15, CB710_MMC_C2_READ_PIO_SIZE_MASK); 285 286 cb710_mmc_fifo_hack(slot); 287 288 while (blocks-- > 0) { 289 len = data->blksz; 290 291 while (len >= 16) { 292 err = cb710_mmc_receive_pio(slot, &miter, 4); 293 if (err) 294 goto out; 295 len -= 16; 296 } 297 298 if (!len) 299 continue; 300 301 cb710_modify_port_8(slot, CB710_MMC_CONFIG2_PORT, 302 len - 1, CB710_MMC_C2_READ_PIO_SIZE_MASK); 303 304 len = (len >= 8) ? 4 : 2; 305 err = cb710_mmc_receive_pio(slot, &miter, len); 306 if (err) 307 goto out; 308 } 309 out: 310 cb710_sg_miter_stop_writing(&miter); 311 return err; 312 } 313 314 static int cb710_mmc_send(struct cb710_slot *slot, struct mmc_data *data) 315 { 316 struct sg_mapping_iter miter; 317 size_t len, blocks = data->blocks; 318 int err = 0; 319 320 /* TODO: I don't know how/if the hardware handles multiple 321 * non-16B-boundary blocks */ 322 if (unlikely(data->blocks > 1 && data->blksz & 15)) 323 return -EINVAL; 324 325 sg_miter_start(&miter, data->sg, data->sg_len, 0); 326 327 cb710_modify_port_8(slot, CB710_MMC_CONFIG2_PORT, 328 0, CB710_MMC_C2_READ_PIO_SIZE_MASK); 329 330 while (blocks-- > 0) { 331 len = (data->blksz + 15) >> 4; 332 do { 333 if (!(cb710_read_port_8(slot, CB710_MMC_STATUS2_PORT) 334 & CB710_MMC_S2_FIFO_EMPTY)) { 335 err = cb710_wait_for_event(slot, 336 CB710_MMC_S1_PIO_TRANSFER_DONE); 337 if (err) 338 goto out; 339 } 340 cb710_sg_dwiter_read_to_io(&miter, 341 slot->iobase + CB710_MMC_DATA_PORT, 4); 342 } while (--len); 343 } 344 out: 345 sg_miter_stop(&miter); 346 return err; 347 } 348 349 static u16 cb710_encode_cmd_flags(struct cb710_mmc_reader *reader, 350 struct mmc_command *cmd) 351 { 352 unsigned int flags = cmd->flags; 353 u16 cb_flags = 0; 354 355 /* Windows driver returned 0 for commands for which no response 356 * is expected. It happened that there were only two such commands 357 * used: MMC_GO_IDLE_STATE and MMC_GO_INACTIVE_STATE so it might 358 * as well be a bug in that driver. 359 * 360 * Original driver set bit 14 for MMC/SD application 361 * commands. There's no difference 'on the wire' and 362 * it apparently works without it anyway. 363 */ 364 365 switch (flags & MMC_CMD_MASK) { 366 case MMC_CMD_AC: cb_flags = CB710_MMC_CMD_AC; break; 367 case MMC_CMD_ADTC: cb_flags = CB710_MMC_CMD_ADTC; break; 368 case MMC_CMD_BC: cb_flags = CB710_MMC_CMD_BC; break; 369 case MMC_CMD_BCR: cb_flags = CB710_MMC_CMD_BCR; break; 370 } 371 372 if (flags & MMC_RSP_BUSY) 373 cb_flags |= CB710_MMC_RSP_BUSY; 374 375 cb_flags |= cmd->opcode << CB710_MMC_CMD_CODE_SHIFT; 376 377 if (cmd->data && (cmd->data->flags & MMC_DATA_READ)) 378 cb_flags |= CB710_MMC_DATA_READ; 379 380 if (flags & MMC_RSP_PRESENT) { 381 /* Windows driver set 01 at bits 4,3 except for 382 * MMC_SET_BLOCKLEN where it set 10. Maybe the 383 * hardware can do something special about this 384 * command? The original driver looks buggy/incomplete 385 * anyway so we ignore this for now. 386 * 387 * I assume that 00 here means no response is expected. 388 */ 389 cb_flags |= CB710_MMC_RSP_PRESENT; 390 391 if (flags & MMC_RSP_136) 392 cb_flags |= CB710_MMC_RSP_136; 393 if (!(flags & MMC_RSP_CRC)) 394 cb_flags |= CB710_MMC_RSP_NO_CRC; 395 } 396 397 return cb_flags; 398 } 399 400 static void cb710_receive_response(struct cb710_slot *slot, 401 struct mmc_command *cmd) 402 { 403 unsigned rsp_opcode, wanted_opcode; 404 405 /* Looks like final byte with CRC is always stripped (same as SDHCI) */ 406 if (cmd->flags & MMC_RSP_136) { 407 u32 resp[4]; 408 409 resp[0] = cb710_read_port_32(slot, CB710_MMC_RESPONSE3_PORT); 410 resp[1] = cb710_read_port_32(slot, CB710_MMC_RESPONSE2_PORT); 411 resp[2] = cb710_read_port_32(slot, CB710_MMC_RESPONSE1_PORT); 412 resp[3] = cb710_read_port_32(slot, CB710_MMC_RESPONSE0_PORT); 413 rsp_opcode = resp[0] >> 24; 414 415 cmd->resp[0] = (resp[0] << 8)|(resp[1] >> 24); 416 cmd->resp[1] = (resp[1] << 8)|(resp[2] >> 24); 417 cmd->resp[2] = (resp[2] << 8)|(resp[3] >> 24); 418 cmd->resp[3] = (resp[3] << 8); 419 } else { 420 rsp_opcode = cb710_read_port_32(slot, CB710_MMC_RESPONSE1_PORT) & 0x3F; 421 cmd->resp[0] = cb710_read_port_32(slot, CB710_MMC_RESPONSE0_PORT); 422 } 423 424 wanted_opcode = (cmd->flags & MMC_RSP_OPCODE) ? cmd->opcode : 0x3F; 425 if (rsp_opcode != wanted_opcode) 426 cmd->error = -EILSEQ; 427 } 428 429 static int cb710_mmc_transfer_data(struct cb710_slot *slot, 430 struct mmc_data *data) 431 { 432 int error, to; 433 434 if (data->flags & MMC_DATA_READ) 435 error = cb710_mmc_receive(slot, data); 436 else 437 error = cb710_mmc_send(slot, data); 438 439 to = cb710_wait_for_event(slot, CB710_MMC_S1_DATA_TRANSFER_DONE); 440 if (!error) 441 error = to; 442 443 if (!error) 444 data->bytes_xfered = data->blksz * data->blocks; 445 return error; 446 } 447 448 static int cb710_mmc_command(struct mmc_host *mmc, struct mmc_command *cmd) 449 { 450 struct cb710_slot *slot = cb710_mmc_to_slot(mmc); 451 struct cb710_mmc_reader *reader = mmc_priv(mmc); 452 struct mmc_data *data = cmd->data; 453 454 u16 cb_cmd = cb710_encode_cmd_flags(reader, cmd); 455 dev_dbg(cb710_slot_dev(slot), "cmd request: 0x%04X\n", cb_cmd); 456 457 if (data) { 458 if (!cb710_is_transfer_size_supported(data)) { 459 data->error = -EINVAL; 460 return -1; 461 } 462 cb710_mmc_set_transfer_size(slot, data->blocks, data->blksz); 463 } 464 465 cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20|CB710_MMC_S2_BUSY_10); 466 cb710_write_port_16(slot, CB710_MMC_CMD_TYPE_PORT, cb_cmd); 467 cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20); 468 cb710_write_port_32(slot, CB710_MMC_CMD_PARAM_PORT, cmd->arg); 469 cb710_mmc_reset_events(slot); 470 cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20); 471 cb710_modify_port_8(slot, CB710_MMC_CONFIG0_PORT, 0x01, 0); 472 473 cmd->error = cb710_wait_for_event(slot, CB710_MMC_S1_COMMAND_SENT); 474 if (cmd->error) 475 return -1; 476 477 if (cmd->flags & MMC_RSP_PRESENT) { 478 cb710_receive_response(slot, cmd); 479 if (cmd->error) 480 return -1; 481 } 482 483 if (data) 484 data->error = cb710_mmc_transfer_data(slot, data); 485 return 0; 486 } 487 488 static void cb710_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq) 489 { 490 struct cb710_slot *slot = cb710_mmc_to_slot(mmc); 491 struct cb710_mmc_reader *reader = mmc_priv(mmc); 492 493 WARN_ON(reader->mrq != NULL); 494 495 reader->mrq = mrq; 496 cb710_mmc_enable_irq(slot, CB710_MMC_IE_TEST_MASK, 0); 497 498 if (cb710_mmc_is_card_inserted(slot)) { 499 if (!cb710_mmc_command(mmc, mrq->cmd) && mrq->stop) 500 cb710_mmc_command(mmc, mrq->stop); 501 mdelay(1); 502 } else { 503 mrq->cmd->error = -ENOMEDIUM; 504 } 505 506 tasklet_schedule(&reader->finish_req_tasklet); 507 } 508 509 static int cb710_mmc_powerup(struct cb710_slot *slot) 510 { 511 #ifdef CONFIG_CB710_DEBUG 512 struct cb710_chip *chip = cb710_slot_to_chip(slot); 513 #endif 514 int err; 515 516 /* a lot of magic; see comment in cb710_mmc_set_clock() */ 517 dev_dbg(cb710_slot_dev(slot), "bus powerup\n"); 518 cb710_dump_regs(chip, CB710_DUMP_REGS_MMC); 519 err = cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20); 520 if (unlikely(err)) 521 return err; 522 cb710_modify_port_8(slot, CB710_MMC_CONFIG1_PORT, 0x80, 0); 523 cb710_modify_port_8(slot, CB710_MMC_CONFIG3_PORT, 0x80, 0); 524 cb710_dump_regs(chip, CB710_DUMP_REGS_MMC); 525 mdelay(1); 526 dev_dbg(cb710_slot_dev(slot), "after delay 1\n"); 527 cb710_dump_regs(chip, CB710_DUMP_REGS_MMC); 528 err = cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20); 529 if (unlikely(err)) 530 return err; 531 cb710_modify_port_8(slot, CB710_MMC_CONFIG1_PORT, 0x09, 0); 532 cb710_dump_regs(chip, CB710_DUMP_REGS_MMC); 533 mdelay(1); 534 dev_dbg(cb710_slot_dev(slot), "after delay 2\n"); 535 cb710_dump_regs(chip, CB710_DUMP_REGS_MMC); 536 err = cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20); 537 if (unlikely(err)) 538 return err; 539 cb710_modify_port_8(slot, CB710_MMC_CONFIG1_PORT, 0, 0x08); 540 cb710_dump_regs(chip, CB710_DUMP_REGS_MMC); 541 mdelay(2); 542 dev_dbg(cb710_slot_dev(slot), "after delay 3\n"); 543 cb710_dump_regs(chip, CB710_DUMP_REGS_MMC); 544 cb710_modify_port_8(slot, CB710_MMC_CONFIG0_PORT, 0x06, 0); 545 cb710_modify_port_8(slot, CB710_MMC_CONFIG1_PORT, 0x70, 0); 546 cb710_modify_port_8(slot, CB710_MMC_CONFIG2_PORT, 0x80, 0); 547 cb710_modify_port_8(slot, CB710_MMC_CONFIG3_PORT, 0x03, 0); 548 cb710_dump_regs(chip, CB710_DUMP_REGS_MMC); 549 err = cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20); 550 if (unlikely(err)) 551 return err; 552 /* This port behaves weird: quick byte reads of 0x08,0x09 return 553 * 0xFF,0x00 after writing 0xFFFF to 0x08; it works correctly when 554 * read/written from userspace... What am I missing here? 555 * (it doesn't depend on write-to-read delay) */ 556 cb710_write_port_16(slot, CB710_MMC_CONFIGB_PORT, 0xFFFF); 557 cb710_modify_port_8(slot, CB710_MMC_CONFIG0_PORT, 0x06, 0); 558 cb710_dump_regs(chip, CB710_DUMP_REGS_MMC); 559 dev_dbg(cb710_slot_dev(slot), "bus powerup finished\n"); 560 561 return cb710_check_event(slot, 0); 562 } 563 564 static void cb710_mmc_powerdown(struct cb710_slot *slot) 565 { 566 cb710_modify_port_8(slot, CB710_MMC_CONFIG1_PORT, 0, 0x81); 567 cb710_modify_port_8(slot, CB710_MMC_CONFIG3_PORT, 0, 0x80); 568 } 569 570 static void cb710_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 571 { 572 struct cb710_slot *slot = cb710_mmc_to_slot(mmc); 573 struct cb710_mmc_reader *reader = mmc_priv(mmc); 574 int err; 575 576 cb710_mmc_set_clock(mmc, ios->clock); 577 578 if (!cb710_mmc_is_card_inserted(slot)) { 579 dev_dbg(cb710_slot_dev(slot), 580 "no card inserted - ignoring bus powerup request\n"); 581 ios->power_mode = MMC_POWER_OFF; 582 } 583 584 if (ios->power_mode != reader->last_power_mode) 585 switch (ios->power_mode) { 586 case MMC_POWER_ON: 587 err = cb710_mmc_powerup(slot); 588 if (err) { 589 dev_warn(cb710_slot_dev(slot), 590 "powerup failed (%d)- retrying\n", err); 591 cb710_mmc_powerdown(slot); 592 udelay(1); 593 err = cb710_mmc_powerup(slot); 594 if (err) 595 dev_warn(cb710_slot_dev(slot), 596 "powerup retry failed (%d) - expect errors\n", 597 err); 598 } 599 reader->last_power_mode = MMC_POWER_ON; 600 break; 601 case MMC_POWER_OFF: 602 cb710_mmc_powerdown(slot); 603 reader->last_power_mode = MMC_POWER_OFF; 604 break; 605 case MMC_POWER_UP: 606 default: 607 /* ignore */; 608 } 609 610 cb710_mmc_enable_4bit_data(slot, ios->bus_width != MMC_BUS_WIDTH_1); 611 612 cb710_mmc_enable_irq(slot, CB710_MMC_IE_TEST_MASK, 0); 613 } 614 615 static int cb710_mmc_get_ro(struct mmc_host *mmc) 616 { 617 struct cb710_slot *slot = cb710_mmc_to_slot(mmc); 618 619 return cb710_read_port_8(slot, CB710_MMC_STATUS3_PORT) 620 & CB710_MMC_S3_WRITE_PROTECTED; 621 } 622 623 static int cb710_mmc_irq_handler(struct cb710_slot *slot) 624 { 625 struct mmc_host *mmc = cb710_slot_to_mmc(slot); 626 struct cb710_mmc_reader *reader = mmc_priv(mmc); 627 u32 status, config1, config2, irqen; 628 629 status = cb710_read_port_32(slot, CB710_MMC_STATUS_PORT); 630 irqen = cb710_read_port_32(slot, CB710_MMC_IRQ_ENABLE_PORT); 631 config2 = cb710_read_port_32(slot, CB710_MMC_CONFIGB_PORT); 632 config1 = cb710_read_port_32(slot, CB710_MMC_CONFIG_PORT); 633 634 dev_dbg(cb710_slot_dev(slot), "interrupt; status: %08X, " 635 "ie: %08X, c2: %08X, c1: %08X\n", 636 status, irqen, config2, config1); 637 638 if (status & (CB710_MMC_S1_CARD_CHANGED << 8)) { 639 /* ack the event */ 640 cb710_write_port_8(slot, CB710_MMC_STATUS1_PORT, 641 CB710_MMC_S1_CARD_CHANGED); 642 if ((irqen & CB710_MMC_IE_CISTATUS_MASK) 643 == CB710_MMC_IE_CISTATUS_MASK) 644 mmc_detect_change(mmc, HZ/5); 645 } else { 646 dev_dbg(cb710_slot_dev(slot), "unknown interrupt (test)\n"); 647 spin_lock(&reader->irq_lock); 648 __cb710_mmc_enable_irq(slot, 0, CB710_MMC_IE_TEST_MASK); 649 spin_unlock(&reader->irq_lock); 650 } 651 652 return 1; 653 } 654 655 static void cb710_mmc_finish_request_tasklet(unsigned long data) 656 { 657 struct mmc_host *mmc = (void *)data; 658 struct cb710_mmc_reader *reader = mmc_priv(mmc); 659 struct mmc_request *mrq = reader->mrq; 660 661 reader->mrq = NULL; 662 mmc_request_done(mmc, mrq); 663 } 664 665 static const struct mmc_host_ops cb710_mmc_host = { 666 .request = cb710_mmc_request, 667 .set_ios = cb710_mmc_set_ios, 668 .get_ro = cb710_mmc_get_ro 669 }; 670 671 #ifdef CONFIG_PM 672 673 static int cb710_mmc_suspend(struct platform_device *pdev, pm_message_t state) 674 { 675 struct cb710_slot *slot = cb710_pdev_to_slot(pdev); 676 struct mmc_host *mmc = cb710_slot_to_mmc(slot); 677 int err; 678 679 err = mmc_suspend_host(mmc, state); 680 if (err) 681 return err; 682 683 cb710_mmc_enable_irq(slot, 0, ~0); 684 return 0; 685 } 686 687 static int cb710_mmc_resume(struct platform_device *pdev) 688 { 689 struct cb710_slot *slot = cb710_pdev_to_slot(pdev); 690 struct mmc_host *mmc = cb710_slot_to_mmc(slot); 691 692 cb710_mmc_enable_irq(slot, 0, ~0); 693 694 return mmc_resume_host(mmc); 695 } 696 697 #endif /* CONFIG_PM */ 698 699 static int __devinit cb710_mmc_init(struct platform_device *pdev) 700 { 701 struct cb710_slot *slot = cb710_pdev_to_slot(pdev); 702 struct cb710_chip *chip = cb710_slot_to_chip(slot); 703 struct mmc_host *mmc; 704 struct cb710_mmc_reader *reader; 705 int err; 706 u32 val; 707 708 mmc = mmc_alloc_host(sizeof(*reader), cb710_slot_dev(slot)); 709 if (!mmc) 710 return -ENOMEM; 711 712 dev_set_drvdata(&pdev->dev, mmc); 713 714 /* harmless (maybe) magic */ 715 pci_read_config_dword(chip->pdev, 0x48, &val); 716 val = cb710_src_freq_mhz[(val >> 16) & 0xF]; 717 dev_dbg(cb710_slot_dev(slot), "source frequency: %dMHz\n", val); 718 val *= 1000000; 719 720 mmc->ops = &cb710_mmc_host; 721 mmc->f_max = val; 722 mmc->f_min = val >> cb710_clock_divider_log2[CB710_MAX_DIVIDER_IDX]; 723 mmc->ocr_avail = MMC_VDD_32_33|MMC_VDD_33_34; 724 mmc->caps = MMC_CAP_4_BIT_DATA; 725 726 reader = mmc_priv(mmc); 727 728 tasklet_init(&reader->finish_req_tasklet, 729 cb710_mmc_finish_request_tasklet, (unsigned long)mmc); 730 spin_lock_init(&reader->irq_lock); 731 cb710_dump_regs(chip, CB710_DUMP_REGS_MMC); 732 733 cb710_mmc_enable_irq(slot, 0, ~0); 734 cb710_set_irq_handler(slot, cb710_mmc_irq_handler); 735 736 err = mmc_add_host(mmc); 737 if (unlikely(err)) 738 goto err_free_mmc; 739 740 dev_dbg(cb710_slot_dev(slot), "mmc_hostname is %s\n", 741 mmc_hostname(mmc)); 742 743 cb710_mmc_enable_irq(slot, CB710_MMC_IE_CARD_INSERTION_STATUS, 0); 744 745 return 0; 746 747 err_free_mmc: 748 dev_dbg(cb710_slot_dev(slot), "mmc_add_host() failed: %d\n", err); 749 750 mmc_free_host(mmc); 751 return err; 752 } 753 754 static int __devexit cb710_mmc_exit(struct platform_device *pdev) 755 { 756 struct cb710_slot *slot = cb710_pdev_to_slot(pdev); 757 struct mmc_host *mmc = cb710_slot_to_mmc(slot); 758 struct cb710_mmc_reader *reader = mmc_priv(mmc); 759 760 cb710_mmc_enable_irq(slot, 0, CB710_MMC_IE_CARD_INSERTION_STATUS); 761 762 mmc_remove_host(mmc); 763 764 /* IRQs should be disabled now, but let's stay on the safe side */ 765 cb710_mmc_enable_irq(slot, 0, ~0); 766 cb710_set_irq_handler(slot, NULL); 767 768 /* clear config ports - just in case */ 769 cb710_write_port_32(slot, CB710_MMC_CONFIG_PORT, 0); 770 cb710_write_port_16(slot, CB710_MMC_CONFIGB_PORT, 0); 771 772 tasklet_kill(&reader->finish_req_tasklet); 773 774 mmc_free_host(mmc); 775 return 0; 776 } 777 778 static struct platform_driver cb710_mmc_driver = { 779 .driver.name = "cb710-mmc", 780 .probe = cb710_mmc_init, 781 .remove = __devexit_p(cb710_mmc_exit), 782 #ifdef CONFIG_PM 783 .suspend = cb710_mmc_suspend, 784 .resume = cb710_mmc_resume, 785 #endif 786 }; 787 788 static int __init cb710_mmc_init_module(void) 789 { 790 return platform_driver_register(&cb710_mmc_driver); 791 } 792 793 static void __exit cb710_mmc_cleanup_module(void) 794 { 795 platform_driver_unregister(&cb710_mmc_driver); 796 } 797 798 module_init(cb710_mmc_init_module); 799 module_exit(cb710_mmc_cleanup_module); 800 801 MODULE_AUTHOR("Michał Mirosław <mirq-linux@rere.qmqm.pl>"); 802 MODULE_DESCRIPTION("ENE CB710 memory card reader driver - MMC/SD part"); 803 MODULE_LICENSE("GPL"); 804 MODULE_ALIAS("platform:cb710-mmc"); 805