1 /* 2 * cb710/mmc.c 3 * 4 * Copyright by Michał Mirosław, 2008-2009 5 * 6 * This program is free software; you can redistribute it and/or modify 7 * it under the terms of the GNU General Public License version 2 as 8 * published by the Free Software Foundation. 9 */ 10 #include <linux/kernel.h> 11 #include <linux/module.h> 12 #include <linux/pci.h> 13 #include <linux/delay.h> 14 #include "cb710-mmc.h" 15 16 static const u8 cb710_clock_divider_log2[8] = { 17 /* 1, 2, 4, 8, 16, 32, 128, 512 */ 18 0, 1, 2, 3, 4, 5, 7, 9 19 }; 20 #define CB710_MAX_DIVIDER_IDX \ 21 (ARRAY_SIZE(cb710_clock_divider_log2) - 1) 22 23 static const u8 cb710_src_freq_mhz[16] = { 24 33, 10, 20, 25, 30, 35, 40, 45, 25 50, 55, 60, 65, 70, 75, 80, 85 26 }; 27 28 static void cb710_mmc_select_clock_divider(struct mmc_host *mmc, int hz) 29 { 30 struct cb710_slot *slot = cb710_mmc_to_slot(mmc); 31 struct pci_dev *pdev = cb710_slot_to_chip(slot)->pdev; 32 u32 src_freq_idx; 33 u32 divider_idx; 34 int src_hz; 35 36 /* on CB710 in HP nx9500: 37 * src_freq_idx == 0 38 * indexes 1-7 work as written in the table 39 * indexes 0,8-15 give no clock output 40 */ 41 pci_read_config_dword(pdev, 0x48, &src_freq_idx); 42 src_freq_idx = (src_freq_idx >> 16) & 0xF; 43 src_hz = cb710_src_freq_mhz[src_freq_idx] * 1000000; 44 45 for (divider_idx = 0; divider_idx < CB710_MAX_DIVIDER_IDX; ++divider_idx) { 46 if (hz >= src_hz >> cb710_clock_divider_log2[divider_idx]) 47 break; 48 } 49 50 if (src_freq_idx) 51 divider_idx |= 0x8; 52 else if (divider_idx == 0) 53 divider_idx = 1; 54 55 cb710_pci_update_config_reg(pdev, 0x40, ~0xF0000000, divider_idx << 28); 56 57 dev_dbg(cb710_slot_dev(slot), 58 "clock set to %d Hz, wanted %d Hz; src_freq_idx = %d, divider_idx = %d|%d\n", 59 src_hz >> cb710_clock_divider_log2[divider_idx & 7], 60 hz, src_freq_idx, divider_idx & 7, divider_idx & 8); 61 } 62 63 static void __cb710_mmc_enable_irq(struct cb710_slot *slot, 64 unsigned short enable, unsigned short mask) 65 { 66 /* clear global IE 67 * - it gets set later if any interrupt sources are enabled */ 68 mask |= CB710_MMC_IE_IRQ_ENABLE; 69 70 /* look like interrupt is fired whenever 71 * WORD[0x0C] & WORD[0x10] != 0; 72 * -> bit 15 port 0x0C seems to be global interrupt enable 73 */ 74 75 enable = (cb710_read_port_16(slot, CB710_MMC_IRQ_ENABLE_PORT) 76 & ~mask) | enable; 77 78 if (enable) 79 enable |= CB710_MMC_IE_IRQ_ENABLE; 80 81 cb710_write_port_16(slot, CB710_MMC_IRQ_ENABLE_PORT, enable); 82 } 83 84 static void cb710_mmc_enable_irq(struct cb710_slot *slot, 85 unsigned short enable, unsigned short mask) 86 { 87 struct cb710_mmc_reader *reader = mmc_priv(cb710_slot_to_mmc(slot)); 88 unsigned long flags; 89 90 spin_lock_irqsave(&reader->irq_lock, flags); 91 /* this is the only thing irq_lock protects */ 92 __cb710_mmc_enable_irq(slot, enable, mask); 93 spin_unlock_irqrestore(&reader->irq_lock, flags); 94 } 95 96 static void cb710_mmc_reset_events(struct cb710_slot *slot) 97 { 98 cb710_write_port_8(slot, CB710_MMC_STATUS0_PORT, 0xFF); 99 cb710_write_port_8(slot, CB710_MMC_STATUS1_PORT, 0xFF); 100 cb710_write_port_8(slot, CB710_MMC_STATUS2_PORT, 0xFF); 101 } 102 103 static int cb710_mmc_is_card_inserted(struct cb710_slot *slot) 104 { 105 return cb710_read_port_8(slot, CB710_MMC_STATUS3_PORT) 106 & CB710_MMC_S3_CARD_DETECTED; 107 } 108 109 static void cb710_mmc_enable_4bit_data(struct cb710_slot *slot, int enable) 110 { 111 dev_dbg(cb710_slot_dev(slot), "configuring %d-data-line%s mode\n", 112 enable ? 4 : 1, enable ? "s" : ""); 113 if (enable) 114 cb710_modify_port_8(slot, CB710_MMC_CONFIG1_PORT, 115 CB710_MMC_C1_4BIT_DATA_BUS, 0); 116 else 117 cb710_modify_port_8(slot, CB710_MMC_CONFIG1_PORT, 118 0, CB710_MMC_C1_4BIT_DATA_BUS); 119 } 120 121 static int cb710_check_event(struct cb710_slot *slot, u8 what) 122 { 123 u16 status; 124 125 status = cb710_read_port_16(slot, CB710_MMC_STATUS_PORT); 126 127 if (status & CB710_MMC_S0_FIFO_UNDERFLOW) { 128 /* it is just a guess, so log it */ 129 dev_dbg(cb710_slot_dev(slot), 130 "CHECK : ignoring bit 6 in status %04X\n", status); 131 cb710_write_port_8(slot, CB710_MMC_STATUS0_PORT, 132 CB710_MMC_S0_FIFO_UNDERFLOW); 133 status &= ~CB710_MMC_S0_FIFO_UNDERFLOW; 134 } 135 136 if (status & CB710_MMC_STATUS_ERROR_EVENTS) { 137 dev_dbg(cb710_slot_dev(slot), 138 "CHECK : returning EIO on status %04X\n", status); 139 cb710_write_port_8(slot, CB710_MMC_STATUS0_PORT, status & 0xFF); 140 cb710_write_port_8(slot, CB710_MMC_STATUS1_PORT, 141 CB710_MMC_S1_RESET); 142 return -EIO; 143 } 144 145 /* 'what' is a bit in MMC_STATUS1 */ 146 if ((status >> 8) & what) { 147 cb710_write_port_8(slot, CB710_MMC_STATUS1_PORT, what); 148 return 1; 149 } 150 151 return 0; 152 } 153 154 static int cb710_wait_for_event(struct cb710_slot *slot, u8 what) 155 { 156 int err = 0; 157 unsigned limit = 2000000; /* FIXME: real timeout */ 158 159 #ifdef CONFIG_CB710_DEBUG 160 u32 e, x; 161 e = cb710_read_port_32(slot, CB710_MMC_STATUS_PORT); 162 #endif 163 164 while (!(err = cb710_check_event(slot, what))) { 165 if (!--limit) { 166 cb710_dump_regs(cb710_slot_to_chip(slot), 167 CB710_DUMP_REGS_MMC); 168 err = -ETIMEDOUT; 169 break; 170 } 171 udelay(1); 172 } 173 174 #ifdef CONFIG_CB710_DEBUG 175 x = cb710_read_port_32(slot, CB710_MMC_STATUS_PORT); 176 177 limit = 2000000 - limit; 178 if (limit > 100) 179 dev_dbg(cb710_slot_dev(slot), 180 "WAIT10: waited %d loops, what %d, entry val %08X, exit val %08X\n", 181 limit, what, e, x); 182 #endif 183 return err < 0 ? err : 0; 184 } 185 186 187 static int cb710_wait_while_busy(struct cb710_slot *slot, uint8_t mask) 188 { 189 unsigned limit = 500000; /* FIXME: real timeout */ 190 int err = 0; 191 192 #ifdef CONFIG_CB710_DEBUG 193 u32 e, x; 194 e = cb710_read_port_32(slot, CB710_MMC_STATUS_PORT); 195 #endif 196 197 while (cb710_read_port_8(slot, CB710_MMC_STATUS2_PORT) & mask) { 198 if (!--limit) { 199 cb710_dump_regs(cb710_slot_to_chip(slot), 200 CB710_DUMP_REGS_MMC); 201 err = -ETIMEDOUT; 202 break; 203 } 204 udelay(1); 205 } 206 207 #ifdef CONFIG_CB710_DEBUG 208 x = cb710_read_port_32(slot, CB710_MMC_STATUS_PORT); 209 210 limit = 500000 - limit; 211 if (limit > 100) 212 dev_dbg(cb710_slot_dev(slot), 213 "WAIT12: waited %d loops, mask %02X, entry val %08X, exit val %08X\n", 214 limit, mask, e, x); 215 #endif 216 return 0; 217 } 218 219 static void cb710_mmc_set_transfer_size(struct cb710_slot *slot, 220 size_t count, size_t blocksize) 221 { 222 cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20); 223 cb710_write_port_32(slot, CB710_MMC_TRANSFER_SIZE_PORT, 224 ((count - 1) << 16)|(blocksize - 1)); 225 226 dev_vdbg(cb710_slot_dev(slot), "set up for %zu block%s of %zu bytes\n", 227 count, count == 1 ? "" : "s", blocksize); 228 } 229 230 static void cb710_mmc_fifo_hack(struct cb710_slot *slot) 231 { 232 /* without this, received data is prepended with 8-bytes of zeroes */ 233 u32 r1, r2; 234 int ok = 0; 235 236 r1 = cb710_read_port_32(slot, CB710_MMC_DATA_PORT); 237 r2 = cb710_read_port_32(slot, CB710_MMC_DATA_PORT); 238 if (cb710_read_port_8(slot, CB710_MMC_STATUS0_PORT) 239 & CB710_MMC_S0_FIFO_UNDERFLOW) { 240 cb710_write_port_8(slot, CB710_MMC_STATUS0_PORT, 241 CB710_MMC_S0_FIFO_UNDERFLOW); 242 ok = 1; 243 } 244 245 dev_dbg(cb710_slot_dev(slot), 246 "FIFO-read-hack: expected STATUS0 bit was %s\n", 247 ok ? "set." : "NOT SET!"); 248 dev_dbg(cb710_slot_dev(slot), 249 "FIFO-read-hack: dwords ignored: %08X %08X - %s\n", 250 r1, r2, (r1|r2) ? "BAD (NOT ZERO)!" : "ok"); 251 } 252 253 static int cb710_mmc_receive_pio(struct cb710_slot *slot, 254 struct sg_mapping_iter *miter, size_t dw_count) 255 { 256 if (!(cb710_read_port_8(slot, CB710_MMC_STATUS2_PORT) & CB710_MMC_S2_FIFO_READY)) { 257 int err = cb710_wait_for_event(slot, 258 CB710_MMC_S1_PIO_TRANSFER_DONE); 259 if (err) 260 return err; 261 } 262 263 cb710_sg_dwiter_write_from_io(miter, 264 slot->iobase + CB710_MMC_DATA_PORT, dw_count); 265 266 return 0; 267 } 268 269 static bool cb710_is_transfer_size_supported(struct mmc_data *data) 270 { 271 return !(data->blksz & 15 && (data->blocks != 1 || data->blksz != 8)); 272 } 273 274 static int cb710_mmc_receive(struct cb710_slot *slot, struct mmc_data *data) 275 { 276 struct sg_mapping_iter miter; 277 size_t len, blocks = data->blocks; 278 int err = 0; 279 280 /* TODO: I don't know how/if the hardware handles non-16B-boundary blocks 281 * except single 8B block */ 282 if (unlikely(data->blksz & 15 && (data->blocks != 1 || data->blksz != 8))) 283 return -EINVAL; 284 285 sg_miter_start(&miter, data->sg, data->sg_len, SG_MITER_TO_SG); 286 287 cb710_modify_port_8(slot, CB710_MMC_CONFIG2_PORT, 288 15, CB710_MMC_C2_READ_PIO_SIZE_MASK); 289 290 cb710_mmc_fifo_hack(slot); 291 292 while (blocks-- > 0) { 293 len = data->blksz; 294 295 while (len >= 16) { 296 err = cb710_mmc_receive_pio(slot, &miter, 4); 297 if (err) 298 goto out; 299 len -= 16; 300 } 301 302 if (!len) 303 continue; 304 305 cb710_modify_port_8(slot, CB710_MMC_CONFIG2_PORT, 306 len - 1, CB710_MMC_C2_READ_PIO_SIZE_MASK); 307 308 len = (len >= 8) ? 4 : 2; 309 err = cb710_mmc_receive_pio(slot, &miter, len); 310 if (err) 311 goto out; 312 } 313 out: 314 sg_miter_stop(&miter); 315 return err; 316 } 317 318 static int cb710_mmc_send(struct cb710_slot *slot, struct mmc_data *data) 319 { 320 struct sg_mapping_iter miter; 321 size_t len, blocks = data->blocks; 322 int err = 0; 323 324 /* TODO: I don't know how/if the hardware handles multiple 325 * non-16B-boundary blocks */ 326 if (unlikely(data->blocks > 1 && data->blksz & 15)) 327 return -EINVAL; 328 329 sg_miter_start(&miter, data->sg, data->sg_len, SG_MITER_FROM_SG); 330 331 cb710_modify_port_8(slot, CB710_MMC_CONFIG2_PORT, 332 0, CB710_MMC_C2_READ_PIO_SIZE_MASK); 333 334 while (blocks-- > 0) { 335 len = (data->blksz + 15) >> 4; 336 do { 337 if (!(cb710_read_port_8(slot, CB710_MMC_STATUS2_PORT) 338 & CB710_MMC_S2_FIFO_EMPTY)) { 339 err = cb710_wait_for_event(slot, 340 CB710_MMC_S1_PIO_TRANSFER_DONE); 341 if (err) 342 goto out; 343 } 344 cb710_sg_dwiter_read_to_io(&miter, 345 slot->iobase + CB710_MMC_DATA_PORT, 4); 346 } while (--len); 347 } 348 out: 349 sg_miter_stop(&miter); 350 return err; 351 } 352 353 static u16 cb710_encode_cmd_flags(struct cb710_mmc_reader *reader, 354 struct mmc_command *cmd) 355 { 356 unsigned int flags = cmd->flags; 357 u16 cb_flags = 0; 358 359 /* Windows driver returned 0 for commands for which no response 360 * is expected. It happened that there were only two such commands 361 * used: MMC_GO_IDLE_STATE and MMC_GO_INACTIVE_STATE so it might 362 * as well be a bug in that driver. 363 * 364 * Original driver set bit 14 for MMC/SD application 365 * commands. There's no difference 'on the wire' and 366 * it apparently works without it anyway. 367 */ 368 369 switch (flags & MMC_CMD_MASK) { 370 case MMC_CMD_AC: cb_flags = CB710_MMC_CMD_AC; break; 371 case MMC_CMD_ADTC: cb_flags = CB710_MMC_CMD_ADTC; break; 372 case MMC_CMD_BC: cb_flags = CB710_MMC_CMD_BC; break; 373 case MMC_CMD_BCR: cb_flags = CB710_MMC_CMD_BCR; break; 374 } 375 376 if (flags & MMC_RSP_BUSY) 377 cb_flags |= CB710_MMC_RSP_BUSY; 378 379 cb_flags |= cmd->opcode << CB710_MMC_CMD_CODE_SHIFT; 380 381 if (cmd->data && (cmd->data->flags & MMC_DATA_READ)) 382 cb_flags |= CB710_MMC_DATA_READ; 383 384 if (flags & MMC_RSP_PRESENT) { 385 /* Windows driver set 01 at bits 4,3 except for 386 * MMC_SET_BLOCKLEN where it set 10. Maybe the 387 * hardware can do something special about this 388 * command? The original driver looks buggy/incomplete 389 * anyway so we ignore this for now. 390 * 391 * I assume that 00 here means no response is expected. 392 */ 393 cb_flags |= CB710_MMC_RSP_PRESENT; 394 395 if (flags & MMC_RSP_136) 396 cb_flags |= CB710_MMC_RSP_136; 397 if (!(flags & MMC_RSP_CRC)) 398 cb_flags |= CB710_MMC_RSP_NO_CRC; 399 } 400 401 return cb_flags; 402 } 403 404 static void cb710_receive_response(struct cb710_slot *slot, 405 struct mmc_command *cmd) 406 { 407 unsigned rsp_opcode, wanted_opcode; 408 409 /* Looks like final byte with CRC is always stripped (same as SDHCI) */ 410 if (cmd->flags & MMC_RSP_136) { 411 u32 resp[4]; 412 413 resp[0] = cb710_read_port_32(slot, CB710_MMC_RESPONSE3_PORT); 414 resp[1] = cb710_read_port_32(slot, CB710_MMC_RESPONSE2_PORT); 415 resp[2] = cb710_read_port_32(slot, CB710_MMC_RESPONSE1_PORT); 416 resp[3] = cb710_read_port_32(slot, CB710_MMC_RESPONSE0_PORT); 417 rsp_opcode = resp[0] >> 24; 418 419 cmd->resp[0] = (resp[0] << 8)|(resp[1] >> 24); 420 cmd->resp[1] = (resp[1] << 8)|(resp[2] >> 24); 421 cmd->resp[2] = (resp[2] << 8)|(resp[3] >> 24); 422 cmd->resp[3] = (resp[3] << 8); 423 } else { 424 rsp_opcode = cb710_read_port_32(slot, CB710_MMC_RESPONSE1_PORT) & 0x3F; 425 cmd->resp[0] = cb710_read_port_32(slot, CB710_MMC_RESPONSE0_PORT); 426 } 427 428 wanted_opcode = (cmd->flags & MMC_RSP_OPCODE) ? cmd->opcode : 0x3F; 429 if (rsp_opcode != wanted_opcode) 430 cmd->error = -EILSEQ; 431 } 432 433 static int cb710_mmc_transfer_data(struct cb710_slot *slot, 434 struct mmc_data *data) 435 { 436 int error, to; 437 438 if (data->flags & MMC_DATA_READ) 439 error = cb710_mmc_receive(slot, data); 440 else 441 error = cb710_mmc_send(slot, data); 442 443 to = cb710_wait_for_event(slot, CB710_MMC_S1_DATA_TRANSFER_DONE); 444 if (!error) 445 error = to; 446 447 if (!error) 448 data->bytes_xfered = data->blksz * data->blocks; 449 return error; 450 } 451 452 static int cb710_mmc_command(struct mmc_host *mmc, struct mmc_command *cmd) 453 { 454 struct cb710_slot *slot = cb710_mmc_to_slot(mmc); 455 struct cb710_mmc_reader *reader = mmc_priv(mmc); 456 struct mmc_data *data = cmd->data; 457 458 u16 cb_cmd = cb710_encode_cmd_flags(reader, cmd); 459 dev_dbg(cb710_slot_dev(slot), "cmd request: 0x%04X\n", cb_cmd); 460 461 if (data) { 462 if (!cb710_is_transfer_size_supported(data)) { 463 data->error = -EINVAL; 464 return -1; 465 } 466 cb710_mmc_set_transfer_size(slot, data->blocks, data->blksz); 467 } 468 469 cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20|CB710_MMC_S2_BUSY_10); 470 cb710_write_port_16(slot, CB710_MMC_CMD_TYPE_PORT, cb_cmd); 471 cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20); 472 cb710_write_port_32(slot, CB710_MMC_CMD_PARAM_PORT, cmd->arg); 473 cb710_mmc_reset_events(slot); 474 cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20); 475 cb710_modify_port_8(slot, CB710_MMC_CONFIG0_PORT, 0x01, 0); 476 477 cmd->error = cb710_wait_for_event(slot, CB710_MMC_S1_COMMAND_SENT); 478 if (cmd->error) 479 return -1; 480 481 if (cmd->flags & MMC_RSP_PRESENT) { 482 cb710_receive_response(slot, cmd); 483 if (cmd->error) 484 return -1; 485 } 486 487 if (data) 488 data->error = cb710_mmc_transfer_data(slot, data); 489 return 0; 490 } 491 492 static void cb710_mmc_request(struct mmc_host *mmc, struct mmc_request *mrq) 493 { 494 struct cb710_slot *slot = cb710_mmc_to_slot(mmc); 495 struct cb710_mmc_reader *reader = mmc_priv(mmc); 496 497 WARN_ON(reader->mrq != NULL); 498 499 reader->mrq = mrq; 500 cb710_mmc_enable_irq(slot, CB710_MMC_IE_TEST_MASK, 0); 501 502 if (cb710_mmc_is_card_inserted(slot)) { 503 if (!cb710_mmc_command(mmc, mrq->cmd) && mrq->stop) 504 cb710_mmc_command(mmc, mrq->stop); 505 mdelay(1); 506 } else { 507 mrq->cmd->error = -ENOMEDIUM; 508 } 509 510 tasklet_schedule(&reader->finish_req_tasklet); 511 } 512 513 static int cb710_mmc_powerup(struct cb710_slot *slot) 514 { 515 #ifdef CONFIG_CB710_DEBUG 516 struct cb710_chip *chip = cb710_slot_to_chip(slot); 517 #endif 518 int err; 519 520 /* a lot of magic for now */ 521 dev_dbg(cb710_slot_dev(slot), "bus powerup\n"); 522 cb710_dump_regs(chip, CB710_DUMP_REGS_MMC); 523 err = cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20); 524 if (unlikely(err)) 525 return err; 526 cb710_modify_port_8(slot, CB710_MMC_CONFIG1_PORT, 0x80, 0); 527 cb710_modify_port_8(slot, CB710_MMC_CONFIG3_PORT, 0x80, 0); 528 cb710_dump_regs(chip, CB710_DUMP_REGS_MMC); 529 mdelay(1); 530 dev_dbg(cb710_slot_dev(slot), "after delay 1\n"); 531 cb710_dump_regs(chip, CB710_DUMP_REGS_MMC); 532 err = cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20); 533 if (unlikely(err)) 534 return err; 535 cb710_modify_port_8(slot, CB710_MMC_CONFIG1_PORT, 0x09, 0); 536 cb710_dump_regs(chip, CB710_DUMP_REGS_MMC); 537 mdelay(1); 538 dev_dbg(cb710_slot_dev(slot), "after delay 2\n"); 539 cb710_dump_regs(chip, CB710_DUMP_REGS_MMC); 540 err = cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20); 541 if (unlikely(err)) 542 return err; 543 cb710_modify_port_8(slot, CB710_MMC_CONFIG1_PORT, 0, 0x08); 544 cb710_dump_regs(chip, CB710_DUMP_REGS_MMC); 545 mdelay(2); 546 dev_dbg(cb710_slot_dev(slot), "after delay 3\n"); 547 cb710_dump_regs(chip, CB710_DUMP_REGS_MMC); 548 cb710_modify_port_8(slot, CB710_MMC_CONFIG0_PORT, 0x06, 0); 549 cb710_modify_port_8(slot, CB710_MMC_CONFIG1_PORT, 0x70, 0); 550 cb710_modify_port_8(slot, CB710_MMC_CONFIG2_PORT, 0x80, 0); 551 cb710_modify_port_8(slot, CB710_MMC_CONFIG3_PORT, 0x03, 0); 552 cb710_dump_regs(chip, CB710_DUMP_REGS_MMC); 553 err = cb710_wait_while_busy(slot, CB710_MMC_S2_BUSY_20); 554 if (unlikely(err)) 555 return err; 556 /* This port behaves weird: quick byte reads of 0x08,0x09 return 557 * 0xFF,0x00 after writing 0xFFFF to 0x08; it works correctly when 558 * read/written from userspace... What am I missing here? 559 * (it doesn't depend on write-to-read delay) */ 560 cb710_write_port_16(slot, CB710_MMC_CONFIGB_PORT, 0xFFFF); 561 cb710_modify_port_8(slot, CB710_MMC_CONFIG0_PORT, 0x06, 0); 562 cb710_dump_regs(chip, CB710_DUMP_REGS_MMC); 563 dev_dbg(cb710_slot_dev(slot), "bus powerup finished\n"); 564 565 return cb710_check_event(slot, 0); 566 } 567 568 static void cb710_mmc_powerdown(struct cb710_slot *slot) 569 { 570 cb710_modify_port_8(slot, CB710_MMC_CONFIG1_PORT, 0, 0x81); 571 cb710_modify_port_8(slot, CB710_MMC_CONFIG3_PORT, 0, 0x80); 572 } 573 574 static void cb710_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 575 { 576 struct cb710_slot *slot = cb710_mmc_to_slot(mmc); 577 struct cb710_mmc_reader *reader = mmc_priv(mmc); 578 int err; 579 580 cb710_mmc_select_clock_divider(mmc, ios->clock); 581 582 if (!cb710_mmc_is_card_inserted(slot)) { 583 dev_dbg(cb710_slot_dev(slot), 584 "no card inserted - ignoring bus powerup request\n"); 585 ios->power_mode = MMC_POWER_OFF; 586 } 587 588 if (ios->power_mode != reader->last_power_mode) 589 switch (ios->power_mode) { 590 case MMC_POWER_ON: 591 err = cb710_mmc_powerup(slot); 592 if (err) { 593 dev_warn(cb710_slot_dev(slot), 594 "powerup failed (%d)- retrying\n", err); 595 cb710_mmc_powerdown(slot); 596 udelay(1); 597 err = cb710_mmc_powerup(slot); 598 if (err) 599 dev_warn(cb710_slot_dev(slot), 600 "powerup retry failed (%d) - expect errors\n", 601 err); 602 } 603 reader->last_power_mode = MMC_POWER_ON; 604 break; 605 case MMC_POWER_OFF: 606 cb710_mmc_powerdown(slot); 607 reader->last_power_mode = MMC_POWER_OFF; 608 break; 609 case MMC_POWER_UP: 610 default: 611 /* ignore */; 612 } 613 614 cb710_mmc_enable_4bit_data(slot, ios->bus_width != MMC_BUS_WIDTH_1); 615 616 cb710_mmc_enable_irq(slot, CB710_MMC_IE_TEST_MASK, 0); 617 } 618 619 static int cb710_mmc_get_ro(struct mmc_host *mmc) 620 { 621 struct cb710_slot *slot = cb710_mmc_to_slot(mmc); 622 623 return cb710_read_port_8(slot, CB710_MMC_STATUS3_PORT) 624 & CB710_MMC_S3_WRITE_PROTECTED; 625 } 626 627 static int cb710_mmc_irq_handler(struct cb710_slot *slot) 628 { 629 struct mmc_host *mmc = cb710_slot_to_mmc(slot); 630 struct cb710_mmc_reader *reader = mmc_priv(mmc); 631 u32 status, config1, config2, irqen; 632 633 status = cb710_read_port_32(slot, CB710_MMC_STATUS_PORT); 634 irqen = cb710_read_port_32(slot, CB710_MMC_IRQ_ENABLE_PORT); 635 config2 = cb710_read_port_32(slot, CB710_MMC_CONFIGB_PORT); 636 config1 = cb710_read_port_32(slot, CB710_MMC_CONFIG_PORT); 637 638 dev_dbg(cb710_slot_dev(slot), "interrupt; status: %08X, " 639 "ie: %08X, c2: %08X, c1: %08X\n", 640 status, irqen, config2, config1); 641 642 if (status & (CB710_MMC_S1_CARD_CHANGED << 8)) { 643 /* ack the event */ 644 cb710_write_port_8(slot, CB710_MMC_STATUS1_PORT, 645 CB710_MMC_S1_CARD_CHANGED); 646 if ((irqen & CB710_MMC_IE_CISTATUS_MASK) 647 == CB710_MMC_IE_CISTATUS_MASK) 648 mmc_detect_change(mmc, HZ/5); 649 } else { 650 dev_dbg(cb710_slot_dev(slot), "unknown interrupt (test)\n"); 651 spin_lock(&reader->irq_lock); 652 __cb710_mmc_enable_irq(slot, 0, CB710_MMC_IE_TEST_MASK); 653 spin_unlock(&reader->irq_lock); 654 } 655 656 return 1; 657 } 658 659 static void cb710_mmc_finish_request_tasklet(unsigned long data) 660 { 661 struct mmc_host *mmc = (void *)data; 662 struct cb710_mmc_reader *reader = mmc_priv(mmc); 663 struct mmc_request *mrq = reader->mrq; 664 665 reader->mrq = NULL; 666 mmc_request_done(mmc, mrq); 667 } 668 669 static const struct mmc_host_ops cb710_mmc_host = { 670 .request = cb710_mmc_request, 671 .set_ios = cb710_mmc_set_ios, 672 .get_ro = cb710_mmc_get_ro 673 }; 674 675 #ifdef CONFIG_PM 676 677 static int cb710_mmc_suspend(struct platform_device *pdev, pm_message_t state) 678 { 679 struct cb710_slot *slot = cb710_pdev_to_slot(pdev); 680 struct mmc_host *mmc = cb710_slot_to_mmc(slot); 681 int err; 682 683 err = mmc_suspend_host(mmc); 684 if (err) 685 return err; 686 687 cb710_mmc_enable_irq(slot, 0, ~0); 688 return 0; 689 } 690 691 static int cb710_mmc_resume(struct platform_device *pdev) 692 { 693 struct cb710_slot *slot = cb710_pdev_to_slot(pdev); 694 struct mmc_host *mmc = cb710_slot_to_mmc(slot); 695 696 cb710_mmc_enable_irq(slot, 0, ~0); 697 698 return mmc_resume_host(mmc); 699 } 700 701 #endif /* CONFIG_PM */ 702 703 static int __devinit cb710_mmc_init(struct platform_device *pdev) 704 { 705 struct cb710_slot *slot = cb710_pdev_to_slot(pdev); 706 struct cb710_chip *chip = cb710_slot_to_chip(slot); 707 struct mmc_host *mmc; 708 struct cb710_mmc_reader *reader; 709 int err; 710 u32 val; 711 712 mmc = mmc_alloc_host(sizeof(*reader), cb710_slot_dev(slot)); 713 if (!mmc) 714 return -ENOMEM; 715 716 dev_set_drvdata(&pdev->dev, mmc); 717 718 /* harmless (maybe) magic */ 719 pci_read_config_dword(chip->pdev, 0x48, &val); 720 val = cb710_src_freq_mhz[(val >> 16) & 0xF]; 721 dev_dbg(cb710_slot_dev(slot), "source frequency: %dMHz\n", val); 722 val *= 1000000; 723 724 mmc->ops = &cb710_mmc_host; 725 mmc->f_max = val; 726 mmc->f_min = val >> cb710_clock_divider_log2[CB710_MAX_DIVIDER_IDX]; 727 mmc->ocr_avail = MMC_VDD_32_33|MMC_VDD_33_34; 728 mmc->caps = MMC_CAP_4_BIT_DATA; 729 730 reader = mmc_priv(mmc); 731 732 tasklet_init(&reader->finish_req_tasklet, 733 cb710_mmc_finish_request_tasklet, (unsigned long)mmc); 734 spin_lock_init(&reader->irq_lock); 735 cb710_dump_regs(chip, CB710_DUMP_REGS_MMC); 736 737 cb710_mmc_enable_irq(slot, 0, ~0); 738 cb710_set_irq_handler(slot, cb710_mmc_irq_handler); 739 740 err = mmc_add_host(mmc); 741 if (unlikely(err)) 742 goto err_free_mmc; 743 744 dev_dbg(cb710_slot_dev(slot), "mmc_hostname is %s\n", 745 mmc_hostname(mmc)); 746 747 cb710_mmc_enable_irq(slot, CB710_MMC_IE_CARD_INSERTION_STATUS, 0); 748 749 return 0; 750 751 err_free_mmc: 752 dev_dbg(cb710_slot_dev(slot), "mmc_add_host() failed: %d\n", err); 753 754 mmc_free_host(mmc); 755 return err; 756 } 757 758 static int __devexit cb710_mmc_exit(struct platform_device *pdev) 759 { 760 struct cb710_slot *slot = cb710_pdev_to_slot(pdev); 761 struct mmc_host *mmc = cb710_slot_to_mmc(slot); 762 struct cb710_mmc_reader *reader = mmc_priv(mmc); 763 764 cb710_mmc_enable_irq(slot, 0, CB710_MMC_IE_CARD_INSERTION_STATUS); 765 766 mmc_remove_host(mmc); 767 768 /* IRQs should be disabled now, but let's stay on the safe side */ 769 cb710_mmc_enable_irq(slot, 0, ~0); 770 cb710_set_irq_handler(slot, NULL); 771 772 /* clear config ports - just in case */ 773 cb710_write_port_32(slot, CB710_MMC_CONFIG_PORT, 0); 774 cb710_write_port_16(slot, CB710_MMC_CONFIGB_PORT, 0); 775 776 tasklet_kill(&reader->finish_req_tasklet); 777 778 mmc_free_host(mmc); 779 return 0; 780 } 781 782 static struct platform_driver cb710_mmc_driver = { 783 .driver.name = "cb710-mmc", 784 .probe = cb710_mmc_init, 785 .remove = __devexit_p(cb710_mmc_exit), 786 #ifdef CONFIG_PM 787 .suspend = cb710_mmc_suspend, 788 .resume = cb710_mmc_resume, 789 #endif 790 }; 791 792 static int __init cb710_mmc_init_module(void) 793 { 794 return platform_driver_register(&cb710_mmc_driver); 795 } 796 797 static void __exit cb710_mmc_cleanup_module(void) 798 { 799 platform_driver_unregister(&cb710_mmc_driver); 800 } 801 802 module_init(cb710_mmc_init_module); 803 module_exit(cb710_mmc_cleanup_module); 804 805 MODULE_AUTHOR("Michał Mirosław <mirq-linux@rere.qmqm.pl>"); 806 MODULE_DESCRIPTION("ENE CB710 memory card reader driver - MMC/SD part"); 807 MODULE_LICENSE("GPL"); 808 MODULE_ALIAS("platform:cb710-mmc"); 809