17d2be074SHaavard Skinnemoen /* 27d2be074SHaavard Skinnemoen * Atmel MultiMedia Card Interface driver 37d2be074SHaavard Skinnemoen * 47d2be074SHaavard Skinnemoen * Copyright (C) 2004-2008 Atmel Corporation 57d2be074SHaavard Skinnemoen * 67d2be074SHaavard Skinnemoen * This program is free software; you can redistribute it and/or modify 77d2be074SHaavard Skinnemoen * it under the terms of the GNU General Public License version 2 as 87d2be074SHaavard Skinnemoen * published by the Free Software Foundation. 97d2be074SHaavard Skinnemoen */ 107d2be074SHaavard Skinnemoen #include <linux/blkdev.h> 117d2be074SHaavard Skinnemoen #include <linux/clk.h> 12deec9ae3SHaavard Skinnemoen #include <linux/debugfs.h> 137d2be074SHaavard Skinnemoen #include <linux/device.h> 1465e8b083SHaavard Skinnemoen #include <linux/dmaengine.h> 1565e8b083SHaavard Skinnemoen #include <linux/dma-mapping.h> 16fbfca4b8SBen Nizette #include <linux/err.h> 173c26e170SDavid Brownell #include <linux/gpio.h> 187d2be074SHaavard Skinnemoen #include <linux/init.h> 197d2be074SHaavard Skinnemoen #include <linux/interrupt.h> 207d2be074SHaavard Skinnemoen #include <linux/ioport.h> 217d2be074SHaavard Skinnemoen #include <linux/module.h> 227d2be074SHaavard Skinnemoen #include <linux/platform_device.h> 237d2be074SHaavard Skinnemoen #include <linux/scatterlist.h> 24deec9ae3SHaavard Skinnemoen #include <linux/seq_file.h> 255a0e3ad6STejun Heo #include <linux/slab.h> 26deec9ae3SHaavard Skinnemoen #include <linux/stat.h> 27e2b35f3dSViresh Kumar #include <linux/types.h> 287d2be074SHaavard Skinnemoen 297d2be074SHaavard Skinnemoen #include <linux/mmc/host.h> 302f1d7918SNicolas Ferre #include <linux/mmc/sdio.h> 312635d1baSNicolas Ferre 322635d1baSNicolas Ferre #include <mach/atmel-mci.h> 33c42aa775SNicolas Ferre #include <linux/atmel-mci.h> 34796211b7SLudovic Desroches #include <linux/atmel_pdc.h> 357d2be074SHaavard Skinnemoen 367d2be074SHaavard Skinnemoen #include <asm/io.h> 377d2be074SHaavard Skinnemoen #include <asm/unaligned.h> 387d2be074SHaavard Skinnemoen 3904d699c3SRob Emanuele #include <mach/cpu.h> 403663b736SHaavard Skinnemoen #include <mach/board.h> 417d2be074SHaavard Skinnemoen 427d2be074SHaavard Skinnemoen #include "atmel-mci-regs.h" 437d2be074SHaavard Skinnemoen 442c96a293SLudovic Desroches #define ATMCI_DATA_ERROR_FLAGS (ATMCI_DCRCE | ATMCI_DTOE | ATMCI_OVRE | ATMCI_UNRE) 4565e8b083SHaavard Skinnemoen #define ATMCI_DMA_THRESHOLD 16 467d2be074SHaavard Skinnemoen 477d2be074SHaavard Skinnemoen enum { 48f5177547SLudovic Desroches EVENT_CMD_RDY = 0, 497d2be074SHaavard Skinnemoen EVENT_XFER_COMPLETE, 50f5177547SLudovic Desroches EVENT_NOTBUSY, 51c06ad258SHaavard Skinnemoen EVENT_DATA_ERROR, 52c06ad258SHaavard Skinnemoen }; 53c06ad258SHaavard Skinnemoen 54c06ad258SHaavard Skinnemoen enum atmel_mci_state { 55965ebf33SHaavard Skinnemoen STATE_IDLE = 0, 56965ebf33SHaavard Skinnemoen STATE_SENDING_CMD, 57f5177547SLudovic Desroches STATE_DATA_XFER, 58f5177547SLudovic Desroches STATE_WAITING_NOTBUSY, 59c06ad258SHaavard Skinnemoen STATE_SENDING_STOP, 60f5177547SLudovic Desroches STATE_END_REQUEST, 617d2be074SHaavard Skinnemoen }; 627d2be074SHaavard Skinnemoen 63796211b7SLudovic Desroches enum atmci_xfer_dir { 64796211b7SLudovic Desroches XFER_RECEIVE = 0, 65796211b7SLudovic Desroches XFER_TRANSMIT, 66796211b7SLudovic Desroches }; 67796211b7SLudovic Desroches 68796211b7SLudovic Desroches enum atmci_pdc_buf { 69796211b7SLudovic Desroches PDC_FIRST_BUF = 0, 70796211b7SLudovic Desroches PDC_SECOND_BUF, 71796211b7SLudovic Desroches }; 72796211b7SLudovic Desroches 73796211b7SLudovic Desroches struct atmel_mci_caps { 74796211b7SLudovic Desroches bool has_dma; 75796211b7SLudovic Desroches bool has_pdc; 76796211b7SLudovic Desroches bool has_cfg_reg; 77796211b7SLudovic Desroches bool has_cstor_reg; 78796211b7SLudovic Desroches bool has_highspeed; 79796211b7SLudovic Desroches bool has_rwproof; 80faf8180bSLudovic Desroches bool has_odd_clk_div; 81796211b7SLudovic Desroches }; 82796211b7SLudovic Desroches 8365e8b083SHaavard Skinnemoen struct atmel_mci_dma { 8465e8b083SHaavard Skinnemoen struct dma_chan *chan; 8565e8b083SHaavard Skinnemoen struct dma_async_tx_descriptor *data_desc; 8665e8b083SHaavard Skinnemoen }; 8765e8b083SHaavard Skinnemoen 88965ebf33SHaavard Skinnemoen /** 89965ebf33SHaavard Skinnemoen * struct atmel_mci - MMC controller state shared between all slots 90965ebf33SHaavard Skinnemoen * @lock: Spinlock protecting the queue and associated data. 91965ebf33SHaavard Skinnemoen * @regs: Pointer to MMIO registers. 92796211b7SLudovic Desroches * @sg: Scatterlist entry currently being processed by PIO or PDC code. 93965ebf33SHaavard Skinnemoen * @pio_offset: Offset into the current scatterlist entry. 947a90dcc2SLudovic Desroches * @buffer: Buffer used if we don't have the r/w proof capability. We 957a90dcc2SLudovic Desroches * don't have the time to switch pdc buffers so we have to use only 967a90dcc2SLudovic Desroches * one buffer for the full transaction. 977a90dcc2SLudovic Desroches * @buf_size: size of the buffer. 987a90dcc2SLudovic Desroches * @phys_buf_addr: buffer address needed for pdc. 99965ebf33SHaavard Skinnemoen * @cur_slot: The slot which is currently using the controller. 100965ebf33SHaavard Skinnemoen * @mrq: The request currently being processed on @cur_slot, 101965ebf33SHaavard Skinnemoen * or NULL if the controller is idle. 102965ebf33SHaavard Skinnemoen * @cmd: The command currently being sent to the card, or NULL. 103965ebf33SHaavard Skinnemoen * @data: The data currently being transferred, or NULL if no data 104965ebf33SHaavard Skinnemoen * transfer is in progress. 105796211b7SLudovic Desroches * @data_size: just data->blocks * data->blksz. 10665e8b083SHaavard Skinnemoen * @dma: DMA client state. 10765e8b083SHaavard Skinnemoen * @data_chan: DMA channel being used for the current data transfer. 108965ebf33SHaavard Skinnemoen * @cmd_status: Snapshot of SR taken upon completion of the current 109965ebf33SHaavard Skinnemoen * command. Only valid when EVENT_CMD_COMPLETE is pending. 110965ebf33SHaavard Skinnemoen * @data_status: Snapshot of SR taken upon completion of the current 111965ebf33SHaavard Skinnemoen * data transfer. Only valid when EVENT_DATA_COMPLETE or 112965ebf33SHaavard Skinnemoen * EVENT_DATA_ERROR is pending. 113965ebf33SHaavard Skinnemoen * @stop_cmdr: Value to be loaded into CMDR when the stop command is 114965ebf33SHaavard Skinnemoen * to be sent. 115965ebf33SHaavard Skinnemoen * @tasklet: Tasklet running the request state machine. 116965ebf33SHaavard Skinnemoen * @pending_events: Bitmask of events flagged by the interrupt handler 117965ebf33SHaavard Skinnemoen * to be processed by the tasklet. 118965ebf33SHaavard Skinnemoen * @completed_events: Bitmask of events which the state machine has 119965ebf33SHaavard Skinnemoen * processed. 120965ebf33SHaavard Skinnemoen * @state: Tasklet state. 121965ebf33SHaavard Skinnemoen * @queue: List of slots waiting for access to the controller. 122965ebf33SHaavard Skinnemoen * @need_clock_update: Update the clock rate before the next request. 123965ebf33SHaavard Skinnemoen * @need_reset: Reset controller before next request. 124965ebf33SHaavard Skinnemoen * @mode_reg: Value of the MR register. 12574791a2dSNicolas Ferre * @cfg_reg: Value of the CFG register. 126965ebf33SHaavard Skinnemoen * @bus_hz: The rate of @mck in Hz. This forms the basis for MMC bus 127965ebf33SHaavard Skinnemoen * rate and timeout calculations. 128965ebf33SHaavard Skinnemoen * @mapbase: Physical address of the MMIO registers. 129965ebf33SHaavard Skinnemoen * @mck: The peripheral bus clock hooked up to the MMC controller. 130965ebf33SHaavard Skinnemoen * @pdev: Platform device associated with the MMC controller. 131965ebf33SHaavard Skinnemoen * @slot: Slots sharing this MMC controller. 132796211b7SLudovic Desroches * @caps: MCI capabilities depending on MCI version. 133796211b7SLudovic Desroches * @prepare_data: function to setup MCI before data transfer which 134796211b7SLudovic Desroches * depends on MCI capabilities. 135796211b7SLudovic Desroches * @submit_data: function to start data transfer which depends on MCI 136796211b7SLudovic Desroches * capabilities. 137796211b7SLudovic Desroches * @stop_transfer: function to stop data transfer which depends on MCI 138796211b7SLudovic Desroches * capabilities. 139965ebf33SHaavard Skinnemoen * 140965ebf33SHaavard Skinnemoen * Locking 141965ebf33SHaavard Skinnemoen * ======= 142965ebf33SHaavard Skinnemoen * 143965ebf33SHaavard Skinnemoen * @lock is a softirq-safe spinlock protecting @queue as well as 144965ebf33SHaavard Skinnemoen * @cur_slot, @mrq and @state. These must always be updated 145965ebf33SHaavard Skinnemoen * at the same time while holding @lock. 146965ebf33SHaavard Skinnemoen * 147965ebf33SHaavard Skinnemoen * @lock also protects mode_reg and need_clock_update since these are 148965ebf33SHaavard Skinnemoen * used to synchronize mode register updates with the queue 149965ebf33SHaavard Skinnemoen * processing. 150965ebf33SHaavard Skinnemoen * 151965ebf33SHaavard Skinnemoen * The @mrq field of struct atmel_mci_slot is also protected by @lock, 152965ebf33SHaavard Skinnemoen * and must always be written at the same time as the slot is added to 153965ebf33SHaavard Skinnemoen * @queue. 154965ebf33SHaavard Skinnemoen * 155965ebf33SHaavard Skinnemoen * @pending_events and @completed_events are accessed using atomic bit 156965ebf33SHaavard Skinnemoen * operations, so they don't need any locking. 157965ebf33SHaavard Skinnemoen * 158965ebf33SHaavard Skinnemoen * None of the fields touched by the interrupt handler need any 159965ebf33SHaavard Skinnemoen * locking. However, ordering is important: Before EVENT_DATA_ERROR or 160965ebf33SHaavard Skinnemoen * EVENT_DATA_COMPLETE is set in @pending_events, all data-related 161965ebf33SHaavard Skinnemoen * interrupts must be disabled and @data_status updated with a 162965ebf33SHaavard Skinnemoen * snapshot of SR. Similarly, before EVENT_CMD_COMPLETE is set, the 16325985edcSLucas De Marchi * CMDRDY interrupt must be disabled and @cmd_status updated with a 164965ebf33SHaavard Skinnemoen * snapshot of SR, and before EVENT_XFER_COMPLETE can be set, the 165965ebf33SHaavard Skinnemoen * bytes_xfered field of @data must be written. This is ensured by 166965ebf33SHaavard Skinnemoen * using barriers. 167965ebf33SHaavard Skinnemoen */ 1687d2be074SHaavard Skinnemoen struct atmel_mci { 169965ebf33SHaavard Skinnemoen spinlock_t lock; 1707d2be074SHaavard Skinnemoen void __iomem *regs; 1717d2be074SHaavard Skinnemoen 1727d2be074SHaavard Skinnemoen struct scatterlist *sg; 1737d2be074SHaavard Skinnemoen unsigned int pio_offset; 1747a90dcc2SLudovic Desroches unsigned int *buffer; 1757a90dcc2SLudovic Desroches unsigned int buf_size; 1767a90dcc2SLudovic Desroches dma_addr_t buf_phys_addr; 1777d2be074SHaavard Skinnemoen 178965ebf33SHaavard Skinnemoen struct atmel_mci_slot *cur_slot; 1797d2be074SHaavard Skinnemoen struct mmc_request *mrq; 1807d2be074SHaavard Skinnemoen struct mmc_command *cmd; 1817d2be074SHaavard Skinnemoen struct mmc_data *data; 182796211b7SLudovic Desroches unsigned int data_size; 1837d2be074SHaavard Skinnemoen 18465e8b083SHaavard Skinnemoen struct atmel_mci_dma dma; 18565e8b083SHaavard Skinnemoen struct dma_chan *data_chan; 186e2b35f3dSViresh Kumar struct dma_slave_config dma_conf; 18765e8b083SHaavard Skinnemoen 1887d2be074SHaavard Skinnemoen u32 cmd_status; 1897d2be074SHaavard Skinnemoen u32 data_status; 1907d2be074SHaavard Skinnemoen u32 stop_cmdr; 1917d2be074SHaavard Skinnemoen 1927d2be074SHaavard Skinnemoen struct tasklet_struct tasklet; 1937d2be074SHaavard Skinnemoen unsigned long pending_events; 1947d2be074SHaavard Skinnemoen unsigned long completed_events; 195c06ad258SHaavard Skinnemoen enum atmel_mci_state state; 196965ebf33SHaavard Skinnemoen struct list_head queue; 1977d2be074SHaavard Skinnemoen 198965ebf33SHaavard Skinnemoen bool need_clock_update; 199965ebf33SHaavard Skinnemoen bool need_reset; 200965ebf33SHaavard Skinnemoen u32 mode_reg; 20174791a2dSNicolas Ferre u32 cfg_reg; 2027d2be074SHaavard Skinnemoen unsigned long bus_hz; 2037d2be074SHaavard Skinnemoen unsigned long mapbase; 2047d2be074SHaavard Skinnemoen struct clk *mck; 2057d2be074SHaavard Skinnemoen struct platform_device *pdev; 206965ebf33SHaavard Skinnemoen 2072c96a293SLudovic Desroches struct atmel_mci_slot *slot[ATMCI_MAX_NR_SLOTS]; 208796211b7SLudovic Desroches 209796211b7SLudovic Desroches struct atmel_mci_caps caps; 210796211b7SLudovic Desroches 211796211b7SLudovic Desroches u32 (*prepare_data)(struct atmel_mci *host, struct mmc_data *data); 212796211b7SLudovic Desroches void (*submit_data)(struct atmel_mci *host, struct mmc_data *data); 213796211b7SLudovic Desroches void (*stop_transfer)(struct atmel_mci *host); 214965ebf33SHaavard Skinnemoen }; 215965ebf33SHaavard Skinnemoen 216965ebf33SHaavard Skinnemoen /** 217965ebf33SHaavard Skinnemoen * struct atmel_mci_slot - MMC slot state 218965ebf33SHaavard Skinnemoen * @mmc: The mmc_host representing this slot. 219965ebf33SHaavard Skinnemoen * @host: The MMC controller this slot is using. 220965ebf33SHaavard Skinnemoen * @sdc_reg: Value of SDCR to be written before using this slot. 22188ff82edSAnders Grahn * @sdio_irq: SDIO irq mask for this slot. 222965ebf33SHaavard Skinnemoen * @mrq: mmc_request currently being processed or waiting to be 223965ebf33SHaavard Skinnemoen * processed, or NULL when the slot is idle. 224965ebf33SHaavard Skinnemoen * @queue_node: List node for placing this node in the @queue list of 225965ebf33SHaavard Skinnemoen * &struct atmel_mci. 226965ebf33SHaavard Skinnemoen * @clock: Clock rate configured by set_ios(). Protected by host->lock. 227965ebf33SHaavard Skinnemoen * @flags: Random state bits associated with the slot. 228965ebf33SHaavard Skinnemoen * @detect_pin: GPIO pin used for card detection, or negative if not 229965ebf33SHaavard Skinnemoen * available. 230965ebf33SHaavard Skinnemoen * @wp_pin: GPIO pin used for card write protect sending, or negative 231965ebf33SHaavard Skinnemoen * if not available. 2321c1452beSJonas Larsson * @detect_is_active_high: The state of the detect pin when it is active. 233965ebf33SHaavard Skinnemoen * @detect_timer: Timer used for debouncing @detect_pin interrupts. 234965ebf33SHaavard Skinnemoen */ 235965ebf33SHaavard Skinnemoen struct atmel_mci_slot { 236965ebf33SHaavard Skinnemoen struct mmc_host *mmc; 237965ebf33SHaavard Skinnemoen struct atmel_mci *host; 238965ebf33SHaavard Skinnemoen 239965ebf33SHaavard Skinnemoen u32 sdc_reg; 24088ff82edSAnders Grahn u32 sdio_irq; 241965ebf33SHaavard Skinnemoen 242965ebf33SHaavard Skinnemoen struct mmc_request *mrq; 243965ebf33SHaavard Skinnemoen struct list_head queue_node; 244965ebf33SHaavard Skinnemoen 245965ebf33SHaavard Skinnemoen unsigned int clock; 246965ebf33SHaavard Skinnemoen unsigned long flags; 247965ebf33SHaavard Skinnemoen #define ATMCI_CARD_PRESENT 0 248965ebf33SHaavard Skinnemoen #define ATMCI_CARD_NEED_INIT 1 249965ebf33SHaavard Skinnemoen #define ATMCI_SHUTDOWN 2 2505c2f2b9bSNicolas Ferre #define ATMCI_SUSPENDED 3 251965ebf33SHaavard Skinnemoen 252965ebf33SHaavard Skinnemoen int detect_pin; 253965ebf33SHaavard Skinnemoen int wp_pin; 2541c1452beSJonas Larsson bool detect_is_active_high; 255965ebf33SHaavard Skinnemoen 256965ebf33SHaavard Skinnemoen struct timer_list detect_timer; 2577d2be074SHaavard Skinnemoen }; 2587d2be074SHaavard Skinnemoen 2597d2be074SHaavard Skinnemoen #define atmci_test_and_clear_pending(host, event) \ 2607d2be074SHaavard Skinnemoen test_and_clear_bit(event, &host->pending_events) 2617d2be074SHaavard Skinnemoen #define atmci_set_completed(host, event) \ 2627d2be074SHaavard Skinnemoen set_bit(event, &host->completed_events) 2637d2be074SHaavard Skinnemoen #define atmci_set_pending(host, event) \ 2647d2be074SHaavard Skinnemoen set_bit(event, &host->pending_events) 2657d2be074SHaavard Skinnemoen 266deec9ae3SHaavard Skinnemoen /* 267deec9ae3SHaavard Skinnemoen * The debugfs stuff below is mostly optimized away when 268deec9ae3SHaavard Skinnemoen * CONFIG_DEBUG_FS is not set. 269deec9ae3SHaavard Skinnemoen */ 270deec9ae3SHaavard Skinnemoen static int atmci_req_show(struct seq_file *s, void *v) 271deec9ae3SHaavard Skinnemoen { 272965ebf33SHaavard Skinnemoen struct atmel_mci_slot *slot = s->private; 273965ebf33SHaavard Skinnemoen struct mmc_request *mrq; 274deec9ae3SHaavard Skinnemoen struct mmc_command *cmd; 275deec9ae3SHaavard Skinnemoen struct mmc_command *stop; 276deec9ae3SHaavard Skinnemoen struct mmc_data *data; 277deec9ae3SHaavard Skinnemoen 278deec9ae3SHaavard Skinnemoen /* Make sure we get a consistent snapshot */ 279965ebf33SHaavard Skinnemoen spin_lock_bh(&slot->host->lock); 280965ebf33SHaavard Skinnemoen mrq = slot->mrq; 281deec9ae3SHaavard Skinnemoen 282deec9ae3SHaavard Skinnemoen if (mrq) { 283deec9ae3SHaavard Skinnemoen cmd = mrq->cmd; 284deec9ae3SHaavard Skinnemoen data = mrq->data; 285deec9ae3SHaavard Skinnemoen stop = mrq->stop; 286deec9ae3SHaavard Skinnemoen 287deec9ae3SHaavard Skinnemoen if (cmd) 288deec9ae3SHaavard Skinnemoen seq_printf(s, 289deec9ae3SHaavard Skinnemoen "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n", 290deec9ae3SHaavard Skinnemoen cmd->opcode, cmd->arg, cmd->flags, 291deec9ae3SHaavard Skinnemoen cmd->resp[0], cmd->resp[1], cmd->resp[2], 292d586ebbbSNicolas Ferre cmd->resp[3], cmd->error); 293deec9ae3SHaavard Skinnemoen if (data) 294deec9ae3SHaavard Skinnemoen seq_printf(s, "DATA %u / %u * %u flg %x err %d\n", 295deec9ae3SHaavard Skinnemoen data->bytes_xfered, data->blocks, 296deec9ae3SHaavard Skinnemoen data->blksz, data->flags, data->error); 297deec9ae3SHaavard Skinnemoen if (stop) 298deec9ae3SHaavard Skinnemoen seq_printf(s, 299deec9ae3SHaavard Skinnemoen "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n", 300deec9ae3SHaavard Skinnemoen stop->opcode, stop->arg, stop->flags, 301deec9ae3SHaavard Skinnemoen stop->resp[0], stop->resp[1], stop->resp[2], 302d586ebbbSNicolas Ferre stop->resp[3], stop->error); 303deec9ae3SHaavard Skinnemoen } 304deec9ae3SHaavard Skinnemoen 305965ebf33SHaavard Skinnemoen spin_unlock_bh(&slot->host->lock); 306deec9ae3SHaavard Skinnemoen 307deec9ae3SHaavard Skinnemoen return 0; 308deec9ae3SHaavard Skinnemoen } 309deec9ae3SHaavard Skinnemoen 310deec9ae3SHaavard Skinnemoen static int atmci_req_open(struct inode *inode, struct file *file) 311deec9ae3SHaavard Skinnemoen { 312deec9ae3SHaavard Skinnemoen return single_open(file, atmci_req_show, inode->i_private); 313deec9ae3SHaavard Skinnemoen } 314deec9ae3SHaavard Skinnemoen 315deec9ae3SHaavard Skinnemoen static const struct file_operations atmci_req_fops = { 316deec9ae3SHaavard Skinnemoen .owner = THIS_MODULE, 317deec9ae3SHaavard Skinnemoen .open = atmci_req_open, 318deec9ae3SHaavard Skinnemoen .read = seq_read, 319deec9ae3SHaavard Skinnemoen .llseek = seq_lseek, 320deec9ae3SHaavard Skinnemoen .release = single_release, 321deec9ae3SHaavard Skinnemoen }; 322deec9ae3SHaavard Skinnemoen 323deec9ae3SHaavard Skinnemoen static void atmci_show_status_reg(struct seq_file *s, 324deec9ae3SHaavard Skinnemoen const char *regname, u32 value) 325deec9ae3SHaavard Skinnemoen { 326deec9ae3SHaavard Skinnemoen static const char *sr_bit[] = { 327deec9ae3SHaavard Skinnemoen [0] = "CMDRDY", 328deec9ae3SHaavard Skinnemoen [1] = "RXRDY", 329deec9ae3SHaavard Skinnemoen [2] = "TXRDY", 330deec9ae3SHaavard Skinnemoen [3] = "BLKE", 331deec9ae3SHaavard Skinnemoen [4] = "DTIP", 332deec9ae3SHaavard Skinnemoen [5] = "NOTBUSY", 33304d699c3SRob Emanuele [6] = "ENDRX", 33404d699c3SRob Emanuele [7] = "ENDTX", 335deec9ae3SHaavard Skinnemoen [8] = "SDIOIRQA", 336deec9ae3SHaavard Skinnemoen [9] = "SDIOIRQB", 33704d699c3SRob Emanuele [12] = "SDIOWAIT", 33804d699c3SRob Emanuele [14] = "RXBUFF", 33904d699c3SRob Emanuele [15] = "TXBUFE", 340deec9ae3SHaavard Skinnemoen [16] = "RINDE", 341deec9ae3SHaavard Skinnemoen [17] = "RDIRE", 342deec9ae3SHaavard Skinnemoen [18] = "RCRCE", 343deec9ae3SHaavard Skinnemoen [19] = "RENDE", 344deec9ae3SHaavard Skinnemoen [20] = "RTOE", 345deec9ae3SHaavard Skinnemoen [21] = "DCRCE", 346deec9ae3SHaavard Skinnemoen [22] = "DTOE", 34704d699c3SRob Emanuele [23] = "CSTOE", 34804d699c3SRob Emanuele [24] = "BLKOVRE", 34904d699c3SRob Emanuele [25] = "DMADONE", 35004d699c3SRob Emanuele [26] = "FIFOEMPTY", 35104d699c3SRob Emanuele [27] = "XFRDONE", 352deec9ae3SHaavard Skinnemoen [30] = "OVRE", 353deec9ae3SHaavard Skinnemoen [31] = "UNRE", 354deec9ae3SHaavard Skinnemoen }; 355deec9ae3SHaavard Skinnemoen unsigned int i; 356deec9ae3SHaavard Skinnemoen 357deec9ae3SHaavard Skinnemoen seq_printf(s, "%s:\t0x%08x", regname, value); 358deec9ae3SHaavard Skinnemoen for (i = 0; i < ARRAY_SIZE(sr_bit); i++) { 359deec9ae3SHaavard Skinnemoen if (value & (1 << i)) { 360deec9ae3SHaavard Skinnemoen if (sr_bit[i]) 361deec9ae3SHaavard Skinnemoen seq_printf(s, " %s", sr_bit[i]); 362deec9ae3SHaavard Skinnemoen else 363deec9ae3SHaavard Skinnemoen seq_puts(s, " UNKNOWN"); 364deec9ae3SHaavard Skinnemoen } 365deec9ae3SHaavard Skinnemoen } 366deec9ae3SHaavard Skinnemoen seq_putc(s, '\n'); 367deec9ae3SHaavard Skinnemoen } 368deec9ae3SHaavard Skinnemoen 369deec9ae3SHaavard Skinnemoen static int atmci_regs_show(struct seq_file *s, void *v) 370deec9ae3SHaavard Skinnemoen { 371deec9ae3SHaavard Skinnemoen struct atmel_mci *host = s->private; 372deec9ae3SHaavard Skinnemoen u32 *buf; 373deec9ae3SHaavard Skinnemoen 3742c96a293SLudovic Desroches buf = kmalloc(ATMCI_REGS_SIZE, GFP_KERNEL); 375deec9ae3SHaavard Skinnemoen if (!buf) 376deec9ae3SHaavard Skinnemoen return -ENOMEM; 377deec9ae3SHaavard Skinnemoen 378965ebf33SHaavard Skinnemoen /* 379965ebf33SHaavard Skinnemoen * Grab a more or less consistent snapshot. Note that we're 380965ebf33SHaavard Skinnemoen * not disabling interrupts, so IMR and SR may not be 381965ebf33SHaavard Skinnemoen * consistent. 382965ebf33SHaavard Skinnemoen */ 383965ebf33SHaavard Skinnemoen spin_lock_bh(&host->lock); 38487e60f2bSHaavard Skinnemoen clk_enable(host->mck); 3852c96a293SLudovic Desroches memcpy_fromio(buf, host->regs, ATMCI_REGS_SIZE); 38687e60f2bSHaavard Skinnemoen clk_disable(host->mck); 387965ebf33SHaavard Skinnemoen spin_unlock_bh(&host->lock); 388deec9ae3SHaavard Skinnemoen 389deec9ae3SHaavard Skinnemoen seq_printf(s, "MR:\t0x%08x%s%s CLKDIV=%u\n", 3902c96a293SLudovic Desroches buf[ATMCI_MR / 4], 3912c96a293SLudovic Desroches buf[ATMCI_MR / 4] & ATMCI_MR_RDPROOF ? " RDPROOF" : "", 3922c96a293SLudovic Desroches buf[ATMCI_MR / 4] & ATMCI_MR_WRPROOF ? " WRPROOF" : "", 3932c96a293SLudovic Desroches buf[ATMCI_MR / 4] & 0xff); 3942c96a293SLudovic Desroches seq_printf(s, "DTOR:\t0x%08x\n", buf[ATMCI_DTOR / 4]); 3952c96a293SLudovic Desroches seq_printf(s, "SDCR:\t0x%08x\n", buf[ATMCI_SDCR / 4]); 3962c96a293SLudovic Desroches seq_printf(s, "ARGR:\t0x%08x\n", buf[ATMCI_ARGR / 4]); 397deec9ae3SHaavard Skinnemoen seq_printf(s, "BLKR:\t0x%08x BCNT=%u BLKLEN=%u\n", 3982c96a293SLudovic Desroches buf[ATMCI_BLKR / 4], 3992c96a293SLudovic Desroches buf[ATMCI_BLKR / 4] & 0xffff, 4002c96a293SLudovic Desroches (buf[ATMCI_BLKR / 4] >> 16) & 0xffff); 401796211b7SLudovic Desroches if (host->caps.has_cstor_reg) 4022c96a293SLudovic Desroches seq_printf(s, "CSTOR:\t0x%08x\n", buf[ATMCI_CSTOR / 4]); 403deec9ae3SHaavard Skinnemoen 404deec9ae3SHaavard Skinnemoen /* Don't read RSPR and RDR; it will consume the data there */ 405deec9ae3SHaavard Skinnemoen 4062c96a293SLudovic Desroches atmci_show_status_reg(s, "SR", buf[ATMCI_SR / 4]); 4072c96a293SLudovic Desroches atmci_show_status_reg(s, "IMR", buf[ATMCI_IMR / 4]); 408deec9ae3SHaavard Skinnemoen 409796211b7SLudovic Desroches if (host->caps.has_dma) { 41074791a2dSNicolas Ferre u32 val; 41174791a2dSNicolas Ferre 4122c96a293SLudovic Desroches val = buf[ATMCI_DMA / 4]; 41374791a2dSNicolas Ferre seq_printf(s, "DMA:\t0x%08x OFFSET=%u CHKSIZE=%u%s\n", 41474791a2dSNicolas Ferre val, val & 3, 41574791a2dSNicolas Ferre ((val >> 4) & 3) ? 41674791a2dSNicolas Ferre 1 << (((val >> 4) & 3) + 1) : 1, 4172c96a293SLudovic Desroches val & ATMCI_DMAEN ? " DMAEN" : ""); 418796211b7SLudovic Desroches } 419796211b7SLudovic Desroches if (host->caps.has_cfg_reg) { 420796211b7SLudovic Desroches u32 val; 42174791a2dSNicolas Ferre 4222c96a293SLudovic Desroches val = buf[ATMCI_CFG / 4]; 42374791a2dSNicolas Ferre seq_printf(s, "CFG:\t0x%08x%s%s%s%s\n", 42474791a2dSNicolas Ferre val, 4252c96a293SLudovic Desroches val & ATMCI_CFG_FIFOMODE_1DATA ? " FIFOMODE_ONE_DATA" : "", 4262c96a293SLudovic Desroches val & ATMCI_CFG_FERRCTRL_COR ? " FERRCTRL_CLEAR_ON_READ" : "", 4272c96a293SLudovic Desroches val & ATMCI_CFG_HSMODE ? " HSMODE" : "", 4282c96a293SLudovic Desroches val & ATMCI_CFG_LSYNC ? " LSYNC" : ""); 42974791a2dSNicolas Ferre } 43074791a2dSNicolas Ferre 431b17339a1SHaavard Skinnemoen kfree(buf); 432b17339a1SHaavard Skinnemoen 433deec9ae3SHaavard Skinnemoen return 0; 434deec9ae3SHaavard Skinnemoen } 435deec9ae3SHaavard Skinnemoen 436deec9ae3SHaavard Skinnemoen static int atmci_regs_open(struct inode *inode, struct file *file) 437deec9ae3SHaavard Skinnemoen { 438deec9ae3SHaavard Skinnemoen return single_open(file, atmci_regs_show, inode->i_private); 439deec9ae3SHaavard Skinnemoen } 440deec9ae3SHaavard Skinnemoen 441deec9ae3SHaavard Skinnemoen static const struct file_operations atmci_regs_fops = { 442deec9ae3SHaavard Skinnemoen .owner = THIS_MODULE, 443deec9ae3SHaavard Skinnemoen .open = atmci_regs_open, 444deec9ae3SHaavard Skinnemoen .read = seq_read, 445deec9ae3SHaavard Skinnemoen .llseek = seq_lseek, 446deec9ae3SHaavard Skinnemoen .release = single_release, 447deec9ae3SHaavard Skinnemoen }; 448deec9ae3SHaavard Skinnemoen 449965ebf33SHaavard Skinnemoen static void atmci_init_debugfs(struct atmel_mci_slot *slot) 450deec9ae3SHaavard Skinnemoen { 451965ebf33SHaavard Skinnemoen struct mmc_host *mmc = slot->mmc; 452965ebf33SHaavard Skinnemoen struct atmel_mci *host = slot->host; 453deec9ae3SHaavard Skinnemoen struct dentry *root; 454deec9ae3SHaavard Skinnemoen struct dentry *node; 455deec9ae3SHaavard Skinnemoen 456deec9ae3SHaavard Skinnemoen root = mmc->debugfs_root; 457deec9ae3SHaavard Skinnemoen if (!root) 458deec9ae3SHaavard Skinnemoen return; 459deec9ae3SHaavard Skinnemoen 460deec9ae3SHaavard Skinnemoen node = debugfs_create_file("regs", S_IRUSR, root, host, 461deec9ae3SHaavard Skinnemoen &atmci_regs_fops); 462deec9ae3SHaavard Skinnemoen if (IS_ERR(node)) 463deec9ae3SHaavard Skinnemoen return; 464deec9ae3SHaavard Skinnemoen if (!node) 465deec9ae3SHaavard Skinnemoen goto err; 466deec9ae3SHaavard Skinnemoen 467965ebf33SHaavard Skinnemoen node = debugfs_create_file("req", S_IRUSR, root, slot, &atmci_req_fops); 468deec9ae3SHaavard Skinnemoen if (!node) 469deec9ae3SHaavard Skinnemoen goto err; 470deec9ae3SHaavard Skinnemoen 471c06ad258SHaavard Skinnemoen node = debugfs_create_u32("state", S_IRUSR, root, (u32 *)&host->state); 472c06ad258SHaavard Skinnemoen if (!node) 473c06ad258SHaavard Skinnemoen goto err; 474c06ad258SHaavard Skinnemoen 475deec9ae3SHaavard Skinnemoen node = debugfs_create_x32("pending_events", S_IRUSR, root, 476deec9ae3SHaavard Skinnemoen (u32 *)&host->pending_events); 477deec9ae3SHaavard Skinnemoen if (!node) 478deec9ae3SHaavard Skinnemoen goto err; 479deec9ae3SHaavard Skinnemoen 480deec9ae3SHaavard Skinnemoen node = debugfs_create_x32("completed_events", S_IRUSR, root, 481deec9ae3SHaavard Skinnemoen (u32 *)&host->completed_events); 482deec9ae3SHaavard Skinnemoen if (!node) 483deec9ae3SHaavard Skinnemoen goto err; 484deec9ae3SHaavard Skinnemoen 485deec9ae3SHaavard Skinnemoen return; 486deec9ae3SHaavard Skinnemoen 487deec9ae3SHaavard Skinnemoen err: 488965ebf33SHaavard Skinnemoen dev_err(&mmc->class_dev, "failed to initialize debugfs for slot\n"); 489deec9ae3SHaavard Skinnemoen } 4907d2be074SHaavard Skinnemoen 4917a90dcc2SLudovic Desroches static inline unsigned int atmci_get_version(struct atmel_mci *host) 4927a90dcc2SLudovic Desroches { 4937a90dcc2SLudovic Desroches return atmci_readl(host, ATMCI_VERSION) & 0x00000fff; 4947a90dcc2SLudovic Desroches } 4957a90dcc2SLudovic Desroches 4962c96a293SLudovic Desroches static inline unsigned int atmci_ns_to_clocks(struct atmel_mci *host, 4977d2be074SHaavard Skinnemoen unsigned int ns) 4987d2be074SHaavard Skinnemoen { 49966292ad9SLudovic Desroches /* 50066292ad9SLudovic Desroches * It is easier here to use us instead of ns for the timeout, 50166292ad9SLudovic Desroches * it prevents from overflows during calculation. 50266292ad9SLudovic Desroches */ 50366292ad9SLudovic Desroches unsigned int us = DIV_ROUND_UP(ns, 1000); 50466292ad9SLudovic Desroches 50566292ad9SLudovic Desroches /* Maximum clock frequency is host->bus_hz/2 */ 50666292ad9SLudovic Desroches return us * (DIV_ROUND_UP(host->bus_hz, 2000000)); 5077d2be074SHaavard Skinnemoen } 5087d2be074SHaavard Skinnemoen 5097d2be074SHaavard Skinnemoen static void atmci_set_timeout(struct atmel_mci *host, 510965ebf33SHaavard Skinnemoen struct atmel_mci_slot *slot, struct mmc_data *data) 5117d2be074SHaavard Skinnemoen { 5127d2be074SHaavard Skinnemoen static unsigned dtomul_to_shift[] = { 5137d2be074SHaavard Skinnemoen 0, 4, 7, 8, 10, 12, 16, 20 5147d2be074SHaavard Skinnemoen }; 5157d2be074SHaavard Skinnemoen unsigned timeout; 5167d2be074SHaavard Skinnemoen unsigned dtocyc; 5177d2be074SHaavard Skinnemoen unsigned dtomul; 5187d2be074SHaavard Skinnemoen 5192c96a293SLudovic Desroches timeout = atmci_ns_to_clocks(host, data->timeout_ns) 5202c96a293SLudovic Desroches + data->timeout_clks; 5217d2be074SHaavard Skinnemoen 5227d2be074SHaavard Skinnemoen for (dtomul = 0; dtomul < 8; dtomul++) { 5237d2be074SHaavard Skinnemoen unsigned shift = dtomul_to_shift[dtomul]; 5247d2be074SHaavard Skinnemoen dtocyc = (timeout + (1 << shift) - 1) >> shift; 5257d2be074SHaavard Skinnemoen if (dtocyc < 15) 5267d2be074SHaavard Skinnemoen break; 5277d2be074SHaavard Skinnemoen } 5287d2be074SHaavard Skinnemoen 5297d2be074SHaavard Skinnemoen if (dtomul >= 8) { 5307d2be074SHaavard Skinnemoen dtomul = 7; 5317d2be074SHaavard Skinnemoen dtocyc = 15; 5327d2be074SHaavard Skinnemoen } 5337d2be074SHaavard Skinnemoen 534965ebf33SHaavard Skinnemoen dev_vdbg(&slot->mmc->class_dev, "setting timeout to %u cycles\n", 5357d2be074SHaavard Skinnemoen dtocyc << dtomul_to_shift[dtomul]); 53603fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_DTOR, (ATMCI_DTOMUL(dtomul) | ATMCI_DTOCYC(dtocyc))); 5377d2be074SHaavard Skinnemoen } 5387d2be074SHaavard Skinnemoen 5397d2be074SHaavard Skinnemoen /* 5407d2be074SHaavard Skinnemoen * Return mask with command flags to be enabled for this command. 5417d2be074SHaavard Skinnemoen */ 5427d2be074SHaavard Skinnemoen static u32 atmci_prepare_command(struct mmc_host *mmc, 5437d2be074SHaavard Skinnemoen struct mmc_command *cmd) 5447d2be074SHaavard Skinnemoen { 5457d2be074SHaavard Skinnemoen struct mmc_data *data; 5467d2be074SHaavard Skinnemoen u32 cmdr; 5477d2be074SHaavard Skinnemoen 5487d2be074SHaavard Skinnemoen cmd->error = -EINPROGRESS; 5497d2be074SHaavard Skinnemoen 5502c96a293SLudovic Desroches cmdr = ATMCI_CMDR_CMDNB(cmd->opcode); 5517d2be074SHaavard Skinnemoen 5527d2be074SHaavard Skinnemoen if (cmd->flags & MMC_RSP_PRESENT) { 5537d2be074SHaavard Skinnemoen if (cmd->flags & MMC_RSP_136) 5542c96a293SLudovic Desroches cmdr |= ATMCI_CMDR_RSPTYP_136BIT; 5557d2be074SHaavard Skinnemoen else 5562c96a293SLudovic Desroches cmdr |= ATMCI_CMDR_RSPTYP_48BIT; 5577d2be074SHaavard Skinnemoen } 5587d2be074SHaavard Skinnemoen 5597d2be074SHaavard Skinnemoen /* 5607d2be074SHaavard Skinnemoen * This should really be MAXLAT_5 for CMD2 and ACMD41, but 5617d2be074SHaavard Skinnemoen * it's too difficult to determine whether this is an ACMD or 5627d2be074SHaavard Skinnemoen * not. Better make it 64. 5637d2be074SHaavard Skinnemoen */ 5642c96a293SLudovic Desroches cmdr |= ATMCI_CMDR_MAXLAT_64CYC; 5657d2be074SHaavard Skinnemoen 5667d2be074SHaavard Skinnemoen if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN) 5672c96a293SLudovic Desroches cmdr |= ATMCI_CMDR_OPDCMD; 5687d2be074SHaavard Skinnemoen 5697d2be074SHaavard Skinnemoen data = cmd->data; 5707d2be074SHaavard Skinnemoen if (data) { 5712c96a293SLudovic Desroches cmdr |= ATMCI_CMDR_START_XFER; 5722f1d7918SNicolas Ferre 5732f1d7918SNicolas Ferre if (cmd->opcode == SD_IO_RW_EXTENDED) { 5742c96a293SLudovic Desroches cmdr |= ATMCI_CMDR_SDIO_BLOCK; 5752f1d7918SNicolas Ferre } else { 5767d2be074SHaavard Skinnemoen if (data->flags & MMC_DATA_STREAM) 5772c96a293SLudovic Desroches cmdr |= ATMCI_CMDR_STREAM; 5787d2be074SHaavard Skinnemoen else if (data->blocks > 1) 5792c96a293SLudovic Desroches cmdr |= ATMCI_CMDR_MULTI_BLOCK; 5807d2be074SHaavard Skinnemoen else 5812c96a293SLudovic Desroches cmdr |= ATMCI_CMDR_BLOCK; 5822f1d7918SNicolas Ferre } 5837d2be074SHaavard Skinnemoen 5847d2be074SHaavard Skinnemoen if (data->flags & MMC_DATA_READ) 5852c96a293SLudovic Desroches cmdr |= ATMCI_CMDR_TRDIR_READ; 5867d2be074SHaavard Skinnemoen } 5877d2be074SHaavard Skinnemoen 5887d2be074SHaavard Skinnemoen return cmdr; 5897d2be074SHaavard Skinnemoen } 5907d2be074SHaavard Skinnemoen 59111d1488bSLudovic Desroches static void atmci_send_command(struct atmel_mci *host, 592965ebf33SHaavard Skinnemoen struct mmc_command *cmd, u32 cmd_flags) 5937d2be074SHaavard Skinnemoen { 5947d2be074SHaavard Skinnemoen WARN_ON(host->cmd); 5957d2be074SHaavard Skinnemoen host->cmd = cmd; 5967d2be074SHaavard Skinnemoen 597965ebf33SHaavard Skinnemoen dev_vdbg(&host->pdev->dev, 5987d2be074SHaavard Skinnemoen "start command: ARGR=0x%08x CMDR=0x%08x\n", 5997d2be074SHaavard Skinnemoen cmd->arg, cmd_flags); 6007d2be074SHaavard Skinnemoen 60103fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_ARGR, cmd->arg); 60203fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CMDR, cmd_flags); 6037d2be074SHaavard Skinnemoen } 6047d2be074SHaavard Skinnemoen 6052c96a293SLudovic Desroches static void atmci_send_stop_cmd(struct atmel_mci *host, struct mmc_data *data) 6067d2be074SHaavard Skinnemoen { 60711d1488bSLudovic Desroches atmci_send_command(host, data->stop, host->stop_cmdr); 60803fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_CMDRDY); 6097d2be074SHaavard Skinnemoen } 6107d2be074SHaavard Skinnemoen 611796211b7SLudovic Desroches /* 612796211b7SLudovic Desroches * Configure given PDC buffer taking care of alignement issues. 613796211b7SLudovic Desroches * Update host->data_size and host->sg. 614796211b7SLudovic Desroches */ 615796211b7SLudovic Desroches static void atmci_pdc_set_single_buf(struct atmel_mci *host, 616796211b7SLudovic Desroches enum atmci_xfer_dir dir, enum atmci_pdc_buf buf_nb) 617796211b7SLudovic Desroches { 618796211b7SLudovic Desroches u32 pointer_reg, counter_reg; 6197a90dcc2SLudovic Desroches unsigned int buf_size; 620796211b7SLudovic Desroches 621796211b7SLudovic Desroches if (dir == XFER_RECEIVE) { 622796211b7SLudovic Desroches pointer_reg = ATMEL_PDC_RPR; 623796211b7SLudovic Desroches counter_reg = ATMEL_PDC_RCR; 624796211b7SLudovic Desroches } else { 625796211b7SLudovic Desroches pointer_reg = ATMEL_PDC_TPR; 626796211b7SLudovic Desroches counter_reg = ATMEL_PDC_TCR; 627796211b7SLudovic Desroches } 628796211b7SLudovic Desroches 629796211b7SLudovic Desroches if (buf_nb == PDC_SECOND_BUF) { 6301ebbe3d3SLudovic Desroches pointer_reg += ATMEL_PDC_SCND_BUF_OFF; 6311ebbe3d3SLudovic Desroches counter_reg += ATMEL_PDC_SCND_BUF_OFF; 632796211b7SLudovic Desroches } 633796211b7SLudovic Desroches 6347a90dcc2SLudovic Desroches if (!host->caps.has_rwproof) { 6357a90dcc2SLudovic Desroches buf_size = host->buf_size; 6367a90dcc2SLudovic Desroches atmci_writel(host, pointer_reg, host->buf_phys_addr); 6377a90dcc2SLudovic Desroches } else { 6387a90dcc2SLudovic Desroches buf_size = sg_dma_len(host->sg); 639796211b7SLudovic Desroches atmci_writel(host, pointer_reg, sg_dma_address(host->sg)); 6407a90dcc2SLudovic Desroches } 6417a90dcc2SLudovic Desroches 6427a90dcc2SLudovic Desroches if (host->data_size <= buf_size) { 643796211b7SLudovic Desroches if (host->data_size & 0x3) { 644796211b7SLudovic Desroches /* If size is different from modulo 4, transfer bytes */ 645796211b7SLudovic Desroches atmci_writel(host, counter_reg, host->data_size); 646796211b7SLudovic Desroches atmci_writel(host, ATMCI_MR, host->mode_reg | ATMCI_MR_PDCFBYTE); 647796211b7SLudovic Desroches } else { 648796211b7SLudovic Desroches /* Else transfer 32-bits words */ 649796211b7SLudovic Desroches atmci_writel(host, counter_reg, host->data_size / 4); 650796211b7SLudovic Desroches } 651796211b7SLudovic Desroches host->data_size = 0; 652796211b7SLudovic Desroches } else { 653796211b7SLudovic Desroches /* We assume the size of a page is 32-bits aligned */ 654341fa4c3SLudovic Desroches atmci_writel(host, counter_reg, sg_dma_len(host->sg) / 4); 655341fa4c3SLudovic Desroches host->data_size -= sg_dma_len(host->sg); 656796211b7SLudovic Desroches if (host->data_size) 657796211b7SLudovic Desroches host->sg = sg_next(host->sg); 658796211b7SLudovic Desroches } 659796211b7SLudovic Desroches } 660796211b7SLudovic Desroches 661796211b7SLudovic Desroches /* 662796211b7SLudovic Desroches * Configure PDC buffer according to the data size ie configuring one or two 663796211b7SLudovic Desroches * buffers. Don't use this function if you want to configure only the second 664796211b7SLudovic Desroches * buffer. In this case, use atmci_pdc_set_single_buf. 665796211b7SLudovic Desroches */ 666796211b7SLudovic Desroches static void atmci_pdc_set_both_buf(struct atmel_mci *host, int dir) 667796211b7SLudovic Desroches { 668796211b7SLudovic Desroches atmci_pdc_set_single_buf(host, dir, PDC_FIRST_BUF); 669796211b7SLudovic Desroches if (host->data_size) 670796211b7SLudovic Desroches atmci_pdc_set_single_buf(host, dir, PDC_SECOND_BUF); 671796211b7SLudovic Desroches } 672796211b7SLudovic Desroches 673796211b7SLudovic Desroches /* 674796211b7SLudovic Desroches * Unmap sg lists, called when transfer is finished. 675796211b7SLudovic Desroches */ 676796211b7SLudovic Desroches static void atmci_pdc_cleanup(struct atmel_mci *host) 677796211b7SLudovic Desroches { 678796211b7SLudovic Desroches struct mmc_data *data = host->data; 679796211b7SLudovic Desroches 680796211b7SLudovic Desroches if (data) 681796211b7SLudovic Desroches dma_unmap_sg(&host->pdev->dev, 682796211b7SLudovic Desroches data->sg, data->sg_len, 683796211b7SLudovic Desroches ((data->flags & MMC_DATA_WRITE) 684796211b7SLudovic Desroches ? DMA_TO_DEVICE : DMA_FROM_DEVICE)); 685796211b7SLudovic Desroches } 686796211b7SLudovic Desroches 687796211b7SLudovic Desroches /* 688796211b7SLudovic Desroches * Disable PDC transfers. Update pending flags to EVENT_XFER_COMPLETE after 689796211b7SLudovic Desroches * having received ATMCI_TXBUFE or ATMCI_RXBUFF interrupt. Enable ATMCI_NOTBUSY 690796211b7SLudovic Desroches * interrupt needed for both transfer directions. 691796211b7SLudovic Desroches */ 692796211b7SLudovic Desroches static void atmci_pdc_complete(struct atmel_mci *host) 693796211b7SLudovic Desroches { 6947a90dcc2SLudovic Desroches int transfer_size = host->data->blocks * host->data->blksz; 6957a90dcc2SLudovic Desroches 696796211b7SLudovic Desroches atmci_writel(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS); 6977a90dcc2SLudovic Desroches 6987a90dcc2SLudovic Desroches if ((!host->caps.has_rwproof) 6997a90dcc2SLudovic Desroches && (host->data->flags & MMC_DATA_READ)) 7007a90dcc2SLudovic Desroches sg_copy_from_buffer(host->data->sg, host->data->sg_len, 7017a90dcc2SLudovic Desroches host->buffer, transfer_size); 7027a90dcc2SLudovic Desroches 703796211b7SLudovic Desroches atmci_pdc_cleanup(host); 704796211b7SLudovic Desroches 705796211b7SLudovic Desroches /* 706796211b7SLudovic Desroches * If the card was removed, data will be NULL. No point trying 707796211b7SLudovic Desroches * to send the stop command or waiting for NBUSY in this case. 708796211b7SLudovic Desroches */ 709796211b7SLudovic Desroches if (host->data) { 710796211b7SLudovic Desroches atmci_set_pending(host, EVENT_XFER_COMPLETE); 711796211b7SLudovic Desroches tasklet_schedule(&host->tasklet); 712796211b7SLudovic Desroches } 713796211b7SLudovic Desroches } 714796211b7SLudovic Desroches 71565e8b083SHaavard Skinnemoen static void atmci_dma_cleanup(struct atmel_mci *host) 71665e8b083SHaavard Skinnemoen { 71765e8b083SHaavard Skinnemoen struct mmc_data *data = host->data; 71865e8b083SHaavard Skinnemoen 719009a891bSNicolas Ferre if (data) 720266ac3f2SLinus Walleij dma_unmap_sg(host->dma.chan->device->dev, 721266ac3f2SLinus Walleij data->sg, data->sg_len, 72265e8b083SHaavard Skinnemoen ((data->flags & MMC_DATA_WRITE) 72365e8b083SHaavard Skinnemoen ? DMA_TO_DEVICE : DMA_FROM_DEVICE)); 72465e8b083SHaavard Skinnemoen } 72565e8b083SHaavard Skinnemoen 726796211b7SLudovic Desroches /* 727796211b7SLudovic Desroches * This function is called by the DMA driver from tasklet context. 728796211b7SLudovic Desroches */ 72965e8b083SHaavard Skinnemoen static void atmci_dma_complete(void *arg) 73065e8b083SHaavard Skinnemoen { 73165e8b083SHaavard Skinnemoen struct atmel_mci *host = arg; 73265e8b083SHaavard Skinnemoen struct mmc_data *data = host->data; 73365e8b083SHaavard Skinnemoen 73465e8b083SHaavard Skinnemoen dev_vdbg(&host->pdev->dev, "DMA complete\n"); 73565e8b083SHaavard Skinnemoen 736796211b7SLudovic Desroches if (host->caps.has_dma) 73774791a2dSNicolas Ferre /* Disable DMA hardware handshaking on MCI */ 73803fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_DMA, atmci_readl(host, ATMCI_DMA) & ~ATMCI_DMAEN); 73974791a2dSNicolas Ferre 74065e8b083SHaavard Skinnemoen atmci_dma_cleanup(host); 74165e8b083SHaavard Skinnemoen 74265e8b083SHaavard Skinnemoen /* 74365e8b083SHaavard Skinnemoen * If the card was removed, data will be NULL. No point trying 74465e8b083SHaavard Skinnemoen * to send the stop command or waiting for NBUSY in this case. 74565e8b083SHaavard Skinnemoen */ 74665e8b083SHaavard Skinnemoen if (data) { 74765e8b083SHaavard Skinnemoen atmci_set_pending(host, EVENT_XFER_COMPLETE); 74865e8b083SHaavard Skinnemoen tasklet_schedule(&host->tasklet); 74965e8b083SHaavard Skinnemoen 75065e8b083SHaavard Skinnemoen /* 75165e8b083SHaavard Skinnemoen * Regardless of what the documentation says, we have 75265e8b083SHaavard Skinnemoen * to wait for NOTBUSY even after block read 75365e8b083SHaavard Skinnemoen * operations. 75465e8b083SHaavard Skinnemoen * 75565e8b083SHaavard Skinnemoen * When the DMA transfer is complete, the controller 75665e8b083SHaavard Skinnemoen * may still be reading the CRC from the card, i.e. 75765e8b083SHaavard Skinnemoen * the data transfer is still in progress and we 75865e8b083SHaavard Skinnemoen * haven't seen all the potential error bits yet. 75965e8b083SHaavard Skinnemoen * 76065e8b083SHaavard Skinnemoen * The interrupt handler will schedule a different 76165e8b083SHaavard Skinnemoen * tasklet to finish things up when the data transfer 76265e8b083SHaavard Skinnemoen * is completely done. 76365e8b083SHaavard Skinnemoen * 76465e8b083SHaavard Skinnemoen * We may not complete the mmc request here anyway 76565e8b083SHaavard Skinnemoen * because the mmc layer may call back and cause us to 76665e8b083SHaavard Skinnemoen * violate the "don't submit new operations from the 76765e8b083SHaavard Skinnemoen * completion callback" rule of the dma engine 76865e8b083SHaavard Skinnemoen * framework. 76965e8b083SHaavard Skinnemoen */ 77003fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY); 77165e8b083SHaavard Skinnemoen } 77265e8b083SHaavard Skinnemoen } 77365e8b083SHaavard Skinnemoen 774796211b7SLudovic Desroches /* 775796211b7SLudovic Desroches * Returns a mask of interrupt flags to be enabled after the whole 776796211b7SLudovic Desroches * request has been prepared. 777796211b7SLudovic Desroches */ 778796211b7SLudovic Desroches static u32 atmci_prepare_data(struct atmel_mci *host, struct mmc_data *data) 779796211b7SLudovic Desroches { 780796211b7SLudovic Desroches u32 iflags; 781796211b7SLudovic Desroches 782796211b7SLudovic Desroches data->error = -EINPROGRESS; 783796211b7SLudovic Desroches 784796211b7SLudovic Desroches host->sg = data->sg; 785796211b7SLudovic Desroches host->data = data; 786796211b7SLudovic Desroches host->data_chan = NULL; 787796211b7SLudovic Desroches 788796211b7SLudovic Desroches iflags = ATMCI_DATA_ERROR_FLAGS; 789796211b7SLudovic Desroches 790796211b7SLudovic Desroches /* 791796211b7SLudovic Desroches * Errata: MMC data write operation with less than 12 792796211b7SLudovic Desroches * bytes is impossible. 793796211b7SLudovic Desroches * 794796211b7SLudovic Desroches * Errata: MCI Transmit Data Register (TDR) FIFO 795796211b7SLudovic Desroches * corruption when length is not multiple of 4. 796796211b7SLudovic Desroches */ 797796211b7SLudovic Desroches if (data->blocks * data->blksz < 12 798796211b7SLudovic Desroches || (data->blocks * data->blksz) & 3) 799796211b7SLudovic Desroches host->need_reset = true; 800796211b7SLudovic Desroches 801796211b7SLudovic Desroches host->pio_offset = 0; 802796211b7SLudovic Desroches if (data->flags & MMC_DATA_READ) 803796211b7SLudovic Desroches iflags |= ATMCI_RXRDY; 804796211b7SLudovic Desroches else 805796211b7SLudovic Desroches iflags |= ATMCI_TXRDY; 806796211b7SLudovic Desroches 807796211b7SLudovic Desroches return iflags; 808796211b7SLudovic Desroches } 809796211b7SLudovic Desroches 810796211b7SLudovic Desroches /* 811796211b7SLudovic Desroches * Set interrupt flags and set block length into the MCI mode register even 812796211b7SLudovic Desroches * if this value is also accessible in the MCI block register. It seems to be 813796211b7SLudovic Desroches * necessary before the High Speed MCI version. It also map sg and configure 814796211b7SLudovic Desroches * PDC registers. 815796211b7SLudovic Desroches */ 816796211b7SLudovic Desroches static u32 817796211b7SLudovic Desroches atmci_prepare_data_pdc(struct atmel_mci *host, struct mmc_data *data) 818796211b7SLudovic Desroches { 819796211b7SLudovic Desroches u32 iflags, tmp; 820796211b7SLudovic Desroches unsigned int sg_len; 821796211b7SLudovic Desroches enum dma_data_direction dir; 822796211b7SLudovic Desroches 823796211b7SLudovic Desroches data->error = -EINPROGRESS; 824796211b7SLudovic Desroches 825796211b7SLudovic Desroches host->data = data; 826796211b7SLudovic Desroches host->sg = data->sg; 827796211b7SLudovic Desroches iflags = ATMCI_DATA_ERROR_FLAGS; 828796211b7SLudovic Desroches 829796211b7SLudovic Desroches /* Enable pdc mode */ 830796211b7SLudovic Desroches atmci_writel(host, ATMCI_MR, host->mode_reg | ATMCI_MR_PDCMODE); 831796211b7SLudovic Desroches 832796211b7SLudovic Desroches if (data->flags & MMC_DATA_READ) { 833796211b7SLudovic Desroches dir = DMA_FROM_DEVICE; 834796211b7SLudovic Desroches iflags |= ATMCI_ENDRX | ATMCI_RXBUFF; 835796211b7SLudovic Desroches } else { 836796211b7SLudovic Desroches dir = DMA_TO_DEVICE; 837f5177547SLudovic Desroches iflags |= ATMCI_ENDTX | ATMCI_TXBUFE | ATMCI_BLKE; 838796211b7SLudovic Desroches } 839796211b7SLudovic Desroches 840796211b7SLudovic Desroches /* Set BLKLEN */ 841796211b7SLudovic Desroches tmp = atmci_readl(host, ATMCI_MR); 842796211b7SLudovic Desroches tmp &= 0x0000ffff; 843796211b7SLudovic Desroches tmp |= ATMCI_BLKLEN(data->blksz); 844796211b7SLudovic Desroches atmci_writel(host, ATMCI_MR, tmp); 845796211b7SLudovic Desroches 846796211b7SLudovic Desroches /* Configure PDC */ 847796211b7SLudovic Desroches host->data_size = data->blocks * data->blksz; 848796211b7SLudovic Desroches sg_len = dma_map_sg(&host->pdev->dev, data->sg, data->sg_len, dir); 8497a90dcc2SLudovic Desroches 8507a90dcc2SLudovic Desroches if ((!host->caps.has_rwproof) 8517a90dcc2SLudovic Desroches && (host->data->flags & MMC_DATA_WRITE)) 8527a90dcc2SLudovic Desroches sg_copy_to_buffer(host->data->sg, host->data->sg_len, 8537a90dcc2SLudovic Desroches host->buffer, host->data_size); 8547a90dcc2SLudovic Desroches 855796211b7SLudovic Desroches if (host->data_size) 856796211b7SLudovic Desroches atmci_pdc_set_both_buf(host, 857796211b7SLudovic Desroches ((dir == DMA_FROM_DEVICE) ? XFER_RECEIVE : XFER_TRANSMIT)); 858796211b7SLudovic Desroches 859796211b7SLudovic Desroches return iflags; 860796211b7SLudovic Desroches } 861796211b7SLudovic Desroches 862796211b7SLudovic Desroches static u32 86374791a2dSNicolas Ferre atmci_prepare_data_dma(struct atmel_mci *host, struct mmc_data *data) 86465e8b083SHaavard Skinnemoen { 86565e8b083SHaavard Skinnemoen struct dma_chan *chan; 86665e8b083SHaavard Skinnemoen struct dma_async_tx_descriptor *desc; 86765e8b083SHaavard Skinnemoen struct scatterlist *sg; 86865e8b083SHaavard Skinnemoen unsigned int i; 86965e8b083SHaavard Skinnemoen enum dma_data_direction direction; 87005f5799cSVinod Koul enum dma_transfer_direction slave_dirn; 871657a77faSAtsushi Nemoto unsigned int sglen; 872796211b7SLudovic Desroches u32 iflags; 873796211b7SLudovic Desroches 874796211b7SLudovic Desroches data->error = -EINPROGRESS; 875796211b7SLudovic Desroches 876796211b7SLudovic Desroches WARN_ON(host->data); 877796211b7SLudovic Desroches host->sg = NULL; 878796211b7SLudovic Desroches host->data = data; 879796211b7SLudovic Desroches 880796211b7SLudovic Desroches iflags = ATMCI_DATA_ERROR_FLAGS; 88165e8b083SHaavard Skinnemoen 88265e8b083SHaavard Skinnemoen /* 88365e8b083SHaavard Skinnemoen * We don't do DMA on "complex" transfers, i.e. with 88465e8b083SHaavard Skinnemoen * non-word-aligned buffers or lengths. Also, we don't bother 88565e8b083SHaavard Skinnemoen * with all the DMA setup overhead for short transfers. 88665e8b083SHaavard Skinnemoen */ 887796211b7SLudovic Desroches if (data->blocks * data->blksz < ATMCI_DMA_THRESHOLD) 888796211b7SLudovic Desroches return atmci_prepare_data(host, data); 88965e8b083SHaavard Skinnemoen if (data->blksz & 3) 890796211b7SLudovic Desroches return atmci_prepare_data(host, data); 89165e8b083SHaavard Skinnemoen 89265e8b083SHaavard Skinnemoen for_each_sg(data->sg, sg, data->sg_len, i) { 89365e8b083SHaavard Skinnemoen if (sg->offset & 3 || sg->length & 3) 894796211b7SLudovic Desroches return atmci_prepare_data(host, data); 89565e8b083SHaavard Skinnemoen } 89665e8b083SHaavard Skinnemoen 89765e8b083SHaavard Skinnemoen /* If we don't have a channel, we can't do DMA */ 89865e8b083SHaavard Skinnemoen chan = host->dma.chan; 8996f49a57aSDan Williams if (chan) 90065e8b083SHaavard Skinnemoen host->data_chan = chan; 90165e8b083SHaavard Skinnemoen 90265e8b083SHaavard Skinnemoen if (!chan) 90365e8b083SHaavard Skinnemoen return -ENODEV; 90465e8b083SHaavard Skinnemoen 905796211b7SLudovic Desroches if (host->caps.has_dma) 90603fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_DMA, ATMCI_DMA_CHKSIZE(3) | ATMCI_DMAEN); 90774791a2dSNicolas Ferre 90805f5799cSVinod Koul if (data->flags & MMC_DATA_READ) { 90965e8b083SHaavard Skinnemoen direction = DMA_FROM_DEVICE; 910e2b35f3dSViresh Kumar host->dma_conf.direction = slave_dirn = DMA_DEV_TO_MEM; 91105f5799cSVinod Koul } else { 91265e8b083SHaavard Skinnemoen direction = DMA_TO_DEVICE; 913e2b35f3dSViresh Kumar host->dma_conf.direction = slave_dirn = DMA_MEM_TO_DEV; 91405f5799cSVinod Koul } 91565e8b083SHaavard Skinnemoen 916266ac3f2SLinus Walleij sglen = dma_map_sg(chan->device->dev, data->sg, 917266ac3f2SLinus Walleij data->sg_len, direction); 91888ce4db3SLinus Walleij 919e2b35f3dSViresh Kumar dmaengine_slave_config(chan, &host->dma_conf); 92016052827SAlexandre Bounine desc = dmaengine_prep_slave_sg(chan, 92105f5799cSVinod Koul data->sg, sglen, slave_dirn, 92265e8b083SHaavard Skinnemoen DMA_PREP_INTERRUPT | DMA_CTRL_ACK); 92365e8b083SHaavard Skinnemoen if (!desc) 924657a77faSAtsushi Nemoto goto unmap_exit; 92565e8b083SHaavard Skinnemoen 92665e8b083SHaavard Skinnemoen host->dma.data_desc = desc; 92765e8b083SHaavard Skinnemoen desc->callback = atmci_dma_complete; 92865e8b083SHaavard Skinnemoen desc->callback_param = host; 92965e8b083SHaavard Skinnemoen 930796211b7SLudovic Desroches return iflags; 931657a77faSAtsushi Nemoto unmap_exit: 93288ce4db3SLinus Walleij dma_unmap_sg(chan->device->dev, data->sg, data->sg_len, direction); 933657a77faSAtsushi Nemoto return -ENOMEM; 93465e8b083SHaavard Skinnemoen } 93565e8b083SHaavard Skinnemoen 936796211b7SLudovic Desroches static void 937796211b7SLudovic Desroches atmci_submit_data(struct atmel_mci *host, struct mmc_data *data) 938796211b7SLudovic Desroches { 939796211b7SLudovic Desroches return; 940796211b7SLudovic Desroches } 941796211b7SLudovic Desroches 942796211b7SLudovic Desroches /* 943796211b7SLudovic Desroches * Start PDC according to transfer direction. 944796211b7SLudovic Desroches */ 945796211b7SLudovic Desroches static void 946796211b7SLudovic Desroches atmci_submit_data_pdc(struct atmel_mci *host, struct mmc_data *data) 947796211b7SLudovic Desroches { 948796211b7SLudovic Desroches if (data->flags & MMC_DATA_READ) 949796211b7SLudovic Desroches atmci_writel(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTEN); 950796211b7SLudovic Desroches else 951796211b7SLudovic Desroches atmci_writel(host, ATMEL_PDC_PTCR, ATMEL_PDC_TXTEN); 952796211b7SLudovic Desroches } 953796211b7SLudovic Desroches 954796211b7SLudovic Desroches static void 955796211b7SLudovic Desroches atmci_submit_data_dma(struct atmel_mci *host, struct mmc_data *data) 95674791a2dSNicolas Ferre { 95774791a2dSNicolas Ferre struct dma_chan *chan = host->data_chan; 95874791a2dSNicolas Ferre struct dma_async_tx_descriptor *desc = host->dma.data_desc; 95974791a2dSNicolas Ferre 96074791a2dSNicolas Ferre if (chan) { 9615328906aSLinus Walleij dmaengine_submit(desc); 9625328906aSLinus Walleij dma_async_issue_pending(chan); 96374791a2dSNicolas Ferre } 96474791a2dSNicolas Ferre } 96574791a2dSNicolas Ferre 966796211b7SLudovic Desroches static void atmci_stop_transfer(struct atmel_mci *host) 96765e8b083SHaavard Skinnemoen { 96865e8b083SHaavard Skinnemoen atmci_set_pending(host, EVENT_XFER_COMPLETE); 96903fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY); 97065e8b083SHaavard Skinnemoen } 97165e8b083SHaavard Skinnemoen 9727d2be074SHaavard Skinnemoen /* 973796211b7SLudovic Desroches * Stop data transfer because error(s) occured. 9747d2be074SHaavard Skinnemoen */ 975796211b7SLudovic Desroches static void atmci_stop_transfer_pdc(struct atmel_mci *host) 9767d2be074SHaavard Skinnemoen { 977f5177547SLudovic Desroches atmci_writel(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS); 978796211b7SLudovic Desroches } 9797d2be074SHaavard Skinnemoen 980796211b7SLudovic Desroches static void atmci_stop_transfer_dma(struct atmel_mci *host) 981796211b7SLudovic Desroches { 982796211b7SLudovic Desroches struct dma_chan *chan = host->data_chan; 9837d2be074SHaavard Skinnemoen 984796211b7SLudovic Desroches if (chan) { 985796211b7SLudovic Desroches dmaengine_terminate_all(chan); 986796211b7SLudovic Desroches atmci_dma_cleanup(host); 987796211b7SLudovic Desroches } else { 988796211b7SLudovic Desroches /* Data transfer was stopped by the interrupt handler */ 989796211b7SLudovic Desroches atmci_set_pending(host, EVENT_XFER_COMPLETE); 990796211b7SLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY); 991796211b7SLudovic Desroches } 992796211b7SLudovic Desroches } 993965ebf33SHaavard Skinnemoen 994965ebf33SHaavard Skinnemoen /* 995796211b7SLudovic Desroches * Start a request: prepare data if needed, prepare the command and activate 996796211b7SLudovic Desroches * interrupts. 997965ebf33SHaavard Skinnemoen */ 998965ebf33SHaavard Skinnemoen static void atmci_start_request(struct atmel_mci *host, 999965ebf33SHaavard Skinnemoen struct atmel_mci_slot *slot) 10007d2be074SHaavard Skinnemoen { 1001965ebf33SHaavard Skinnemoen struct mmc_request *mrq; 10027d2be074SHaavard Skinnemoen struct mmc_command *cmd; 1003965ebf33SHaavard Skinnemoen struct mmc_data *data; 10047d2be074SHaavard Skinnemoen u32 iflags; 1005965ebf33SHaavard Skinnemoen u32 cmdflags; 1006965ebf33SHaavard Skinnemoen 1007965ebf33SHaavard Skinnemoen mrq = slot->mrq; 1008965ebf33SHaavard Skinnemoen host->cur_slot = slot; 1009965ebf33SHaavard Skinnemoen host->mrq = mrq; 1010965ebf33SHaavard Skinnemoen 1011965ebf33SHaavard Skinnemoen host->pending_events = 0; 1012965ebf33SHaavard Skinnemoen host->completed_events = 0; 1013f5177547SLudovic Desroches host->cmd_status = 0; 1014ca55f46eSHaavard Skinnemoen host->data_status = 0; 1015965ebf33SHaavard Skinnemoen 1016965ebf33SHaavard Skinnemoen if (host->need_reset) { 101718ee684bSLudovic Desroches iflags = atmci_readl(host, ATMCI_IMR); 101818ee684bSLudovic Desroches iflags &= (ATMCI_SDIOIRQA | ATMCI_SDIOIRQB); 101903fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST); 102003fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIEN); 102103fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_MR, host->mode_reg); 1022796211b7SLudovic Desroches if (host->caps.has_cfg_reg) 102303fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CFG, host->cfg_reg); 102418ee684bSLudovic Desroches atmci_writel(host, ATMCI_IER, iflags); 1025965ebf33SHaavard Skinnemoen host->need_reset = false; 1026965ebf33SHaavard Skinnemoen } 102703fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_SDCR, slot->sdc_reg); 10287d2be074SHaavard Skinnemoen 102903fc9a7fSLudovic Desroches iflags = atmci_readl(host, ATMCI_IMR); 10302c96a293SLudovic Desroches if (iflags & ~(ATMCI_SDIOIRQA | ATMCI_SDIOIRQB)) 1031f5177547SLudovic Desroches dev_dbg(&slot->mmc->class_dev, "WARNING: IMR=0x%08x\n", 1032965ebf33SHaavard Skinnemoen iflags); 10337d2be074SHaavard Skinnemoen 1034965ebf33SHaavard Skinnemoen if (unlikely(test_and_clear_bit(ATMCI_CARD_NEED_INIT, &slot->flags))) { 1035965ebf33SHaavard Skinnemoen /* Send init sequence (74 clock cycles) */ 103603fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CMDR, ATMCI_CMDR_SPCMD_INIT); 103703fc9a7fSLudovic Desroches while (!(atmci_readl(host, ATMCI_SR) & ATMCI_CMDRDY)) 1038965ebf33SHaavard Skinnemoen cpu_relax(); 10397d2be074SHaavard Skinnemoen } 104074791a2dSNicolas Ferre iflags = 0; 10417d2be074SHaavard Skinnemoen data = mrq->data; 10427d2be074SHaavard Skinnemoen if (data) { 1043965ebf33SHaavard Skinnemoen atmci_set_timeout(host, slot, data); 1044a252e3e3SHaavard Skinnemoen 1045a252e3e3SHaavard Skinnemoen /* Must set block count/size before sending command */ 104603fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_BLKR, ATMCI_BCNT(data->blocks) 10472c96a293SLudovic Desroches | ATMCI_BLKLEN(data->blksz)); 1048965ebf33SHaavard Skinnemoen dev_vdbg(&slot->mmc->class_dev, "BLKR=0x%08x\n", 10492c96a293SLudovic Desroches ATMCI_BCNT(data->blocks) | ATMCI_BLKLEN(data->blksz)); 105074791a2dSNicolas Ferre 1051796211b7SLudovic Desroches iflags |= host->prepare_data(host, data); 10527d2be074SHaavard Skinnemoen } 10537d2be074SHaavard Skinnemoen 10542c96a293SLudovic Desroches iflags |= ATMCI_CMDRDY; 10557d2be074SHaavard Skinnemoen cmd = mrq->cmd; 1056965ebf33SHaavard Skinnemoen cmdflags = atmci_prepare_command(slot->mmc, cmd); 105711d1488bSLudovic Desroches atmci_send_command(host, cmd, cmdflags); 10587d2be074SHaavard Skinnemoen 10597d2be074SHaavard Skinnemoen if (data) 1060796211b7SLudovic Desroches host->submit_data(host, data); 10617d2be074SHaavard Skinnemoen 10627d2be074SHaavard Skinnemoen if (mrq->stop) { 1063965ebf33SHaavard Skinnemoen host->stop_cmdr = atmci_prepare_command(slot->mmc, mrq->stop); 10642c96a293SLudovic Desroches host->stop_cmdr |= ATMCI_CMDR_STOP_XFER; 10657d2be074SHaavard Skinnemoen if (!(data->flags & MMC_DATA_WRITE)) 10662c96a293SLudovic Desroches host->stop_cmdr |= ATMCI_CMDR_TRDIR_READ; 10677d2be074SHaavard Skinnemoen if (data->flags & MMC_DATA_STREAM) 10682c96a293SLudovic Desroches host->stop_cmdr |= ATMCI_CMDR_STREAM; 10697d2be074SHaavard Skinnemoen else 10702c96a293SLudovic Desroches host->stop_cmdr |= ATMCI_CMDR_MULTI_BLOCK; 10717d2be074SHaavard Skinnemoen } 10727d2be074SHaavard Skinnemoen 10737d2be074SHaavard Skinnemoen /* 10747d2be074SHaavard Skinnemoen * We could have enabled interrupts earlier, but I suspect 10757d2be074SHaavard Skinnemoen * that would open up a nice can of interesting race 10767d2be074SHaavard Skinnemoen * conditions (e.g. command and data complete, but stop not 10777d2be074SHaavard Skinnemoen * prepared yet.) 10787d2be074SHaavard Skinnemoen */ 107903fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_IER, iflags); 1080965ebf33SHaavard Skinnemoen } 10817d2be074SHaavard Skinnemoen 1082965ebf33SHaavard Skinnemoen static void atmci_queue_request(struct atmel_mci *host, 1083965ebf33SHaavard Skinnemoen struct atmel_mci_slot *slot, struct mmc_request *mrq) 1084965ebf33SHaavard Skinnemoen { 1085965ebf33SHaavard Skinnemoen dev_vdbg(&slot->mmc->class_dev, "queue request: state=%d\n", 1086965ebf33SHaavard Skinnemoen host->state); 1087965ebf33SHaavard Skinnemoen 1088965ebf33SHaavard Skinnemoen spin_lock_bh(&host->lock); 1089965ebf33SHaavard Skinnemoen slot->mrq = mrq; 1090965ebf33SHaavard Skinnemoen if (host->state == STATE_IDLE) { 1091965ebf33SHaavard Skinnemoen host->state = STATE_SENDING_CMD; 1092965ebf33SHaavard Skinnemoen atmci_start_request(host, slot); 1093965ebf33SHaavard Skinnemoen } else { 1094965ebf33SHaavard Skinnemoen list_add_tail(&slot->queue_node, &host->queue); 1095965ebf33SHaavard Skinnemoen } 1096965ebf33SHaavard Skinnemoen spin_unlock_bh(&host->lock); 1097965ebf33SHaavard Skinnemoen } 1098965ebf33SHaavard Skinnemoen 1099965ebf33SHaavard Skinnemoen static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq) 1100965ebf33SHaavard Skinnemoen { 1101965ebf33SHaavard Skinnemoen struct atmel_mci_slot *slot = mmc_priv(mmc); 1102965ebf33SHaavard Skinnemoen struct atmel_mci *host = slot->host; 1103965ebf33SHaavard Skinnemoen struct mmc_data *data; 1104965ebf33SHaavard Skinnemoen 1105965ebf33SHaavard Skinnemoen WARN_ON(slot->mrq); 1106965ebf33SHaavard Skinnemoen 1107965ebf33SHaavard Skinnemoen /* 1108965ebf33SHaavard Skinnemoen * We may "know" the card is gone even though there's still an 1109965ebf33SHaavard Skinnemoen * electrical connection. If so, we really need to communicate 1110965ebf33SHaavard Skinnemoen * this to the MMC core since there won't be any more 1111965ebf33SHaavard Skinnemoen * interrupts as the card is completely removed. Otherwise, 1112965ebf33SHaavard Skinnemoen * the MMC core might believe the card is still there even 1113965ebf33SHaavard Skinnemoen * though the card was just removed very slowly. 1114965ebf33SHaavard Skinnemoen */ 1115965ebf33SHaavard Skinnemoen if (!test_bit(ATMCI_CARD_PRESENT, &slot->flags)) { 1116965ebf33SHaavard Skinnemoen mrq->cmd->error = -ENOMEDIUM; 1117965ebf33SHaavard Skinnemoen mmc_request_done(mmc, mrq); 11187d2be074SHaavard Skinnemoen return; 1119965ebf33SHaavard Skinnemoen } 11207d2be074SHaavard Skinnemoen 1121965ebf33SHaavard Skinnemoen /* We don't support multiple blocks of weird lengths. */ 1122965ebf33SHaavard Skinnemoen data = mrq->data; 1123965ebf33SHaavard Skinnemoen if (data && data->blocks > 1 && data->blksz & 3) { 11247d2be074SHaavard Skinnemoen mrq->cmd->error = -EINVAL; 11257d2be074SHaavard Skinnemoen mmc_request_done(mmc, mrq); 11267d2be074SHaavard Skinnemoen } 11277d2be074SHaavard Skinnemoen 1128965ebf33SHaavard Skinnemoen atmci_queue_request(host, slot, mrq); 1129965ebf33SHaavard Skinnemoen } 1130965ebf33SHaavard Skinnemoen 11317d2be074SHaavard Skinnemoen static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 11327d2be074SHaavard Skinnemoen { 1133965ebf33SHaavard Skinnemoen struct atmel_mci_slot *slot = mmc_priv(mmc); 1134965ebf33SHaavard Skinnemoen struct atmel_mci *host = slot->host; 1135965ebf33SHaavard Skinnemoen unsigned int i; 11367d2be074SHaavard Skinnemoen 11372c96a293SLudovic Desroches slot->sdc_reg &= ~ATMCI_SDCBUS_MASK; 1138945533b5SHaavard Skinnemoen switch (ios->bus_width) { 1139945533b5SHaavard Skinnemoen case MMC_BUS_WIDTH_1: 11402c96a293SLudovic Desroches slot->sdc_reg |= ATMCI_SDCBUS_1BIT; 1141945533b5SHaavard Skinnemoen break; 1142945533b5SHaavard Skinnemoen case MMC_BUS_WIDTH_4: 11432c96a293SLudovic Desroches slot->sdc_reg |= ATMCI_SDCBUS_4BIT; 1144945533b5SHaavard Skinnemoen break; 1145945533b5SHaavard Skinnemoen } 1146945533b5SHaavard Skinnemoen 11477d2be074SHaavard Skinnemoen if (ios->clock) { 1148965ebf33SHaavard Skinnemoen unsigned int clock_min = ~0U; 11497d2be074SHaavard Skinnemoen u32 clkdiv; 11507d2be074SHaavard Skinnemoen 1151965ebf33SHaavard Skinnemoen spin_lock_bh(&host->lock); 1152965ebf33SHaavard Skinnemoen if (!host->mode_reg) { 1153945533b5SHaavard Skinnemoen clk_enable(host->mck); 115403fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST); 115503fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIEN); 1156796211b7SLudovic Desroches if (host->caps.has_cfg_reg) 115703fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CFG, host->cfg_reg); 1158965ebf33SHaavard Skinnemoen } 1159945533b5SHaavard Skinnemoen 1160965ebf33SHaavard Skinnemoen /* 1161965ebf33SHaavard Skinnemoen * Use mirror of ios->clock to prevent race with mmc 1162965ebf33SHaavard Skinnemoen * core ios update when finding the minimum. 1163965ebf33SHaavard Skinnemoen */ 1164965ebf33SHaavard Skinnemoen slot->clock = ios->clock; 11652c96a293SLudovic Desroches for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) { 1166965ebf33SHaavard Skinnemoen if (host->slot[i] && host->slot[i]->clock 1167965ebf33SHaavard Skinnemoen && host->slot[i]->clock < clock_min) 1168965ebf33SHaavard Skinnemoen clock_min = host->slot[i]->clock; 1169965ebf33SHaavard Skinnemoen } 1170965ebf33SHaavard Skinnemoen 1171965ebf33SHaavard Skinnemoen /* Calculate clock divider */ 1172faf8180bSLudovic Desroches if (host->caps.has_odd_clk_div) { 1173faf8180bSLudovic Desroches clkdiv = DIV_ROUND_UP(host->bus_hz, clock_min) - 2; 1174faf8180bSLudovic Desroches if (clkdiv > 511) { 1175faf8180bSLudovic Desroches dev_warn(&mmc->class_dev, 1176faf8180bSLudovic Desroches "clock %u too slow; using %lu\n", 1177faf8180bSLudovic Desroches clock_min, host->bus_hz / (511 + 2)); 1178faf8180bSLudovic Desroches clkdiv = 511; 1179faf8180bSLudovic Desroches } 1180faf8180bSLudovic Desroches host->mode_reg = ATMCI_MR_CLKDIV(clkdiv >> 1) 1181faf8180bSLudovic Desroches | ATMCI_MR_CLKODD(clkdiv & 1); 1182faf8180bSLudovic Desroches } else { 1183965ebf33SHaavard Skinnemoen clkdiv = DIV_ROUND_UP(host->bus_hz, 2 * clock_min) - 1; 11847d2be074SHaavard Skinnemoen if (clkdiv > 255) { 11857d2be074SHaavard Skinnemoen dev_warn(&mmc->class_dev, 11867d2be074SHaavard Skinnemoen "clock %u too slow; using %lu\n", 1187965ebf33SHaavard Skinnemoen clock_min, host->bus_hz / (2 * 256)); 11887d2be074SHaavard Skinnemoen clkdiv = 255; 11897d2be074SHaavard Skinnemoen } 11902c96a293SLudovic Desroches host->mode_reg = ATMCI_MR_CLKDIV(clkdiv); 1191faf8180bSLudovic Desroches } 119204d699c3SRob Emanuele 1193965ebf33SHaavard Skinnemoen /* 1194965ebf33SHaavard Skinnemoen * WRPROOF and RDPROOF prevent overruns/underruns by 1195965ebf33SHaavard Skinnemoen * stopping the clock when the FIFO is full/empty. 1196965ebf33SHaavard Skinnemoen * This state is not expected to last for long. 1197965ebf33SHaavard Skinnemoen */ 1198796211b7SLudovic Desroches if (host->caps.has_rwproof) 11992c96a293SLudovic Desroches host->mode_reg |= (ATMCI_MR_WRPROOF | ATMCI_MR_RDPROOF); 12007d2be074SHaavard Skinnemoen 1201796211b7SLudovic Desroches if (host->caps.has_cfg_reg) { 120299ddffd8SNicolas Ferre /* setup High Speed mode in relation with card capacity */ 120399ddffd8SNicolas Ferre if (ios->timing == MMC_TIMING_SD_HS) 12042c96a293SLudovic Desroches host->cfg_reg |= ATMCI_CFG_HSMODE; 1205965ebf33SHaavard Skinnemoen else 12062c96a293SLudovic Desroches host->cfg_reg &= ~ATMCI_CFG_HSMODE; 120799ddffd8SNicolas Ferre } 120899ddffd8SNicolas Ferre 120999ddffd8SNicolas Ferre if (list_empty(&host->queue)) { 121003fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_MR, host->mode_reg); 1211796211b7SLudovic Desroches if (host->caps.has_cfg_reg) 121203fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CFG, host->cfg_reg); 121399ddffd8SNicolas Ferre } else { 1214965ebf33SHaavard Skinnemoen host->need_clock_update = true; 121599ddffd8SNicolas Ferre } 1216965ebf33SHaavard Skinnemoen 1217965ebf33SHaavard Skinnemoen spin_unlock_bh(&host->lock); 1218945533b5SHaavard Skinnemoen } else { 1219965ebf33SHaavard Skinnemoen bool any_slot_active = false; 1220965ebf33SHaavard Skinnemoen 1221965ebf33SHaavard Skinnemoen spin_lock_bh(&host->lock); 1222965ebf33SHaavard Skinnemoen slot->clock = 0; 12232c96a293SLudovic Desroches for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) { 1224965ebf33SHaavard Skinnemoen if (host->slot[i] && host->slot[i]->clock) { 1225965ebf33SHaavard Skinnemoen any_slot_active = true; 1226965ebf33SHaavard Skinnemoen break; 1227965ebf33SHaavard Skinnemoen } 1228965ebf33SHaavard Skinnemoen } 1229965ebf33SHaavard Skinnemoen if (!any_slot_active) { 123003fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIDIS); 1231945533b5SHaavard Skinnemoen if (host->mode_reg) { 123203fc9a7fSLudovic Desroches atmci_readl(host, ATMCI_MR); 1233945533b5SHaavard Skinnemoen clk_disable(host->mck); 1234945533b5SHaavard Skinnemoen } 1235945533b5SHaavard Skinnemoen host->mode_reg = 0; 12367d2be074SHaavard Skinnemoen } 1237965ebf33SHaavard Skinnemoen spin_unlock_bh(&host->lock); 1238965ebf33SHaavard Skinnemoen } 12397d2be074SHaavard Skinnemoen 12407d2be074SHaavard Skinnemoen switch (ios->power_mode) { 1241965ebf33SHaavard Skinnemoen case MMC_POWER_UP: 1242965ebf33SHaavard Skinnemoen set_bit(ATMCI_CARD_NEED_INIT, &slot->flags); 1243965ebf33SHaavard Skinnemoen break; 12447d2be074SHaavard Skinnemoen default: 12457d2be074SHaavard Skinnemoen /* 12467d2be074SHaavard Skinnemoen * TODO: None of the currently available AVR32-based 12477d2be074SHaavard Skinnemoen * boards allow MMC power to be turned off. Implement 12487d2be074SHaavard Skinnemoen * power control when this can be tested properly. 1249965ebf33SHaavard Skinnemoen * 1250965ebf33SHaavard Skinnemoen * We also need to hook this into the clock management 1251965ebf33SHaavard Skinnemoen * somehow so that newly inserted cards aren't 1252965ebf33SHaavard Skinnemoen * subjected to a fast clock before we have a chance 1253965ebf33SHaavard Skinnemoen * to figure out what the maximum rate is. Currently, 1254965ebf33SHaavard Skinnemoen * there's no way to avoid this, and there never will 1255965ebf33SHaavard Skinnemoen * be for boards that don't support power control. 12567d2be074SHaavard Skinnemoen */ 12577d2be074SHaavard Skinnemoen break; 12587d2be074SHaavard Skinnemoen } 12597d2be074SHaavard Skinnemoen } 12607d2be074SHaavard Skinnemoen 12617d2be074SHaavard Skinnemoen static int atmci_get_ro(struct mmc_host *mmc) 12627d2be074SHaavard Skinnemoen { 1263965ebf33SHaavard Skinnemoen int read_only = -ENOSYS; 1264965ebf33SHaavard Skinnemoen struct atmel_mci_slot *slot = mmc_priv(mmc); 12657d2be074SHaavard Skinnemoen 1266965ebf33SHaavard Skinnemoen if (gpio_is_valid(slot->wp_pin)) { 1267965ebf33SHaavard Skinnemoen read_only = gpio_get_value(slot->wp_pin); 12687d2be074SHaavard Skinnemoen dev_dbg(&mmc->class_dev, "card is %s\n", 12697d2be074SHaavard Skinnemoen read_only ? "read-only" : "read-write"); 12707d2be074SHaavard Skinnemoen } 12717d2be074SHaavard Skinnemoen 12727d2be074SHaavard Skinnemoen return read_only; 12737d2be074SHaavard Skinnemoen } 12747d2be074SHaavard Skinnemoen 1275965ebf33SHaavard Skinnemoen static int atmci_get_cd(struct mmc_host *mmc) 1276965ebf33SHaavard Skinnemoen { 1277965ebf33SHaavard Skinnemoen int present = -ENOSYS; 1278965ebf33SHaavard Skinnemoen struct atmel_mci_slot *slot = mmc_priv(mmc); 1279965ebf33SHaavard Skinnemoen 1280965ebf33SHaavard Skinnemoen if (gpio_is_valid(slot->detect_pin)) { 12811c1452beSJonas Larsson present = !(gpio_get_value(slot->detect_pin) ^ 12821c1452beSJonas Larsson slot->detect_is_active_high); 1283965ebf33SHaavard Skinnemoen dev_dbg(&mmc->class_dev, "card is %spresent\n", 1284965ebf33SHaavard Skinnemoen present ? "" : "not "); 1285965ebf33SHaavard Skinnemoen } 1286965ebf33SHaavard Skinnemoen 1287965ebf33SHaavard Skinnemoen return present; 1288965ebf33SHaavard Skinnemoen } 1289965ebf33SHaavard Skinnemoen 129088ff82edSAnders Grahn static void atmci_enable_sdio_irq(struct mmc_host *mmc, int enable) 129188ff82edSAnders Grahn { 129288ff82edSAnders Grahn struct atmel_mci_slot *slot = mmc_priv(mmc); 129388ff82edSAnders Grahn struct atmel_mci *host = slot->host; 129488ff82edSAnders Grahn 129588ff82edSAnders Grahn if (enable) 129603fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_IER, slot->sdio_irq); 129788ff82edSAnders Grahn else 129803fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_IDR, slot->sdio_irq); 129988ff82edSAnders Grahn } 130088ff82edSAnders Grahn 1301965ebf33SHaavard Skinnemoen static const struct mmc_host_ops atmci_ops = { 13027d2be074SHaavard Skinnemoen .request = atmci_request, 13037d2be074SHaavard Skinnemoen .set_ios = atmci_set_ios, 13047d2be074SHaavard Skinnemoen .get_ro = atmci_get_ro, 1305965ebf33SHaavard Skinnemoen .get_cd = atmci_get_cd, 130688ff82edSAnders Grahn .enable_sdio_irq = atmci_enable_sdio_irq, 13077d2be074SHaavard Skinnemoen }; 13087d2be074SHaavard Skinnemoen 1309965ebf33SHaavard Skinnemoen /* Called with host->lock held */ 1310965ebf33SHaavard Skinnemoen static void atmci_request_end(struct atmel_mci *host, struct mmc_request *mrq) 1311965ebf33SHaavard Skinnemoen __releases(&host->lock) 1312965ebf33SHaavard Skinnemoen __acquires(&host->lock) 1313965ebf33SHaavard Skinnemoen { 1314965ebf33SHaavard Skinnemoen struct atmel_mci_slot *slot = NULL; 1315965ebf33SHaavard Skinnemoen struct mmc_host *prev_mmc = host->cur_slot->mmc; 1316965ebf33SHaavard Skinnemoen 1317965ebf33SHaavard Skinnemoen WARN_ON(host->cmd || host->data); 1318965ebf33SHaavard Skinnemoen 1319965ebf33SHaavard Skinnemoen /* 1320965ebf33SHaavard Skinnemoen * Update the MMC clock rate if necessary. This may be 1321965ebf33SHaavard Skinnemoen * necessary if set_ios() is called when a different slot is 132225985edcSLucas De Marchi * busy transferring data. 1323965ebf33SHaavard Skinnemoen */ 132499ddffd8SNicolas Ferre if (host->need_clock_update) { 132503fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_MR, host->mode_reg); 1326796211b7SLudovic Desroches if (host->caps.has_cfg_reg) 132703fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CFG, host->cfg_reg); 132899ddffd8SNicolas Ferre } 1329965ebf33SHaavard Skinnemoen 1330965ebf33SHaavard Skinnemoen host->cur_slot->mrq = NULL; 1331965ebf33SHaavard Skinnemoen host->mrq = NULL; 1332965ebf33SHaavard Skinnemoen if (!list_empty(&host->queue)) { 1333965ebf33SHaavard Skinnemoen slot = list_entry(host->queue.next, 1334965ebf33SHaavard Skinnemoen struct atmel_mci_slot, queue_node); 1335965ebf33SHaavard Skinnemoen list_del(&slot->queue_node); 1336965ebf33SHaavard Skinnemoen dev_vdbg(&host->pdev->dev, "list not empty: %s is next\n", 1337965ebf33SHaavard Skinnemoen mmc_hostname(slot->mmc)); 1338965ebf33SHaavard Skinnemoen host->state = STATE_SENDING_CMD; 1339965ebf33SHaavard Skinnemoen atmci_start_request(host, slot); 1340965ebf33SHaavard Skinnemoen } else { 1341965ebf33SHaavard Skinnemoen dev_vdbg(&host->pdev->dev, "list empty\n"); 1342965ebf33SHaavard Skinnemoen host->state = STATE_IDLE; 1343965ebf33SHaavard Skinnemoen } 1344965ebf33SHaavard Skinnemoen 1345965ebf33SHaavard Skinnemoen spin_unlock(&host->lock); 1346965ebf33SHaavard Skinnemoen mmc_request_done(prev_mmc, mrq); 1347965ebf33SHaavard Skinnemoen spin_lock(&host->lock); 1348965ebf33SHaavard Skinnemoen } 1349965ebf33SHaavard Skinnemoen 13507d2be074SHaavard Skinnemoen static void atmci_command_complete(struct atmel_mci *host, 1351c06ad258SHaavard Skinnemoen struct mmc_command *cmd) 13527d2be074SHaavard Skinnemoen { 1353c06ad258SHaavard Skinnemoen u32 status = host->cmd_status; 1354c06ad258SHaavard Skinnemoen 13557d2be074SHaavard Skinnemoen /* Read the response from the card (up to 16 bytes) */ 135603fc9a7fSLudovic Desroches cmd->resp[0] = atmci_readl(host, ATMCI_RSPR); 135703fc9a7fSLudovic Desroches cmd->resp[1] = atmci_readl(host, ATMCI_RSPR); 135803fc9a7fSLudovic Desroches cmd->resp[2] = atmci_readl(host, ATMCI_RSPR); 135903fc9a7fSLudovic Desroches cmd->resp[3] = atmci_readl(host, ATMCI_RSPR); 13607d2be074SHaavard Skinnemoen 13612c96a293SLudovic Desroches if (status & ATMCI_RTOE) 13627d2be074SHaavard Skinnemoen cmd->error = -ETIMEDOUT; 13632c96a293SLudovic Desroches else if ((cmd->flags & MMC_RSP_CRC) && (status & ATMCI_RCRCE)) 13647d2be074SHaavard Skinnemoen cmd->error = -EILSEQ; 13652c96a293SLudovic Desroches else if (status & (ATMCI_RINDE | ATMCI_RDIRE | ATMCI_RENDE)) 13667d2be074SHaavard Skinnemoen cmd->error = -EIO; 13677d2be074SHaavard Skinnemoen else 13687d2be074SHaavard Skinnemoen cmd->error = 0; 13697d2be074SHaavard Skinnemoen } 13707d2be074SHaavard Skinnemoen 13717d2be074SHaavard Skinnemoen static void atmci_detect_change(unsigned long data) 13727d2be074SHaavard Skinnemoen { 1373965ebf33SHaavard Skinnemoen struct atmel_mci_slot *slot = (struct atmel_mci_slot *)data; 1374965ebf33SHaavard Skinnemoen bool present; 1375965ebf33SHaavard Skinnemoen bool present_old; 13767d2be074SHaavard Skinnemoen 13777d2be074SHaavard Skinnemoen /* 1378965ebf33SHaavard Skinnemoen * atmci_cleanup_slot() sets the ATMCI_SHUTDOWN flag before 1379965ebf33SHaavard Skinnemoen * freeing the interrupt. We must not re-enable the interrupt 1380965ebf33SHaavard Skinnemoen * if it has been freed, and if we're shutting down, it 1381965ebf33SHaavard Skinnemoen * doesn't really matter whether the card is present or not. 13827d2be074SHaavard Skinnemoen */ 13837d2be074SHaavard Skinnemoen smp_rmb(); 1384965ebf33SHaavard Skinnemoen if (test_bit(ATMCI_SHUTDOWN, &slot->flags)) 13857d2be074SHaavard Skinnemoen return; 13867d2be074SHaavard Skinnemoen 1387965ebf33SHaavard Skinnemoen enable_irq(gpio_to_irq(slot->detect_pin)); 13881c1452beSJonas Larsson present = !(gpio_get_value(slot->detect_pin) ^ 13891c1452beSJonas Larsson slot->detect_is_active_high); 1390965ebf33SHaavard Skinnemoen present_old = test_bit(ATMCI_CARD_PRESENT, &slot->flags); 13917d2be074SHaavard Skinnemoen 1392965ebf33SHaavard Skinnemoen dev_vdbg(&slot->mmc->class_dev, "detect change: %d (was %d)\n", 1393965ebf33SHaavard Skinnemoen present, present_old); 13947d2be074SHaavard Skinnemoen 1395965ebf33SHaavard Skinnemoen if (present != present_old) { 1396965ebf33SHaavard Skinnemoen struct atmel_mci *host = slot->host; 1397965ebf33SHaavard Skinnemoen struct mmc_request *mrq; 1398965ebf33SHaavard Skinnemoen 1399965ebf33SHaavard Skinnemoen dev_dbg(&slot->mmc->class_dev, "card %s\n", 14007d2be074SHaavard Skinnemoen present ? "inserted" : "removed"); 14017d2be074SHaavard Skinnemoen 1402965ebf33SHaavard Skinnemoen spin_lock(&host->lock); 1403965ebf33SHaavard Skinnemoen 1404965ebf33SHaavard Skinnemoen if (!present) 1405965ebf33SHaavard Skinnemoen clear_bit(ATMCI_CARD_PRESENT, &slot->flags); 1406965ebf33SHaavard Skinnemoen else 1407965ebf33SHaavard Skinnemoen set_bit(ATMCI_CARD_PRESENT, &slot->flags); 14087d2be074SHaavard Skinnemoen 14097d2be074SHaavard Skinnemoen /* Clean up queue if present */ 1410965ebf33SHaavard Skinnemoen mrq = slot->mrq; 14117d2be074SHaavard Skinnemoen if (mrq) { 1412965ebf33SHaavard Skinnemoen if (mrq == host->mrq) { 14137d2be074SHaavard Skinnemoen /* 14147d2be074SHaavard Skinnemoen * Reset controller to terminate any ongoing 14157d2be074SHaavard Skinnemoen * commands or data transfers. 14167d2be074SHaavard Skinnemoen */ 141703fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST); 141803fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIEN); 141903fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_MR, host->mode_reg); 1420796211b7SLudovic Desroches if (host->caps.has_cfg_reg) 142103fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CFG, host->cfg_reg); 14227d2be074SHaavard Skinnemoen 14237d2be074SHaavard Skinnemoen host->data = NULL; 14247d2be074SHaavard Skinnemoen host->cmd = NULL; 1425c06ad258SHaavard Skinnemoen 1426c06ad258SHaavard Skinnemoen switch (host->state) { 1427965ebf33SHaavard Skinnemoen case STATE_IDLE: 1428965ebf33SHaavard Skinnemoen break; 1429c06ad258SHaavard Skinnemoen case STATE_SENDING_CMD: 1430c06ad258SHaavard Skinnemoen mrq->cmd->error = -ENOMEDIUM; 1431f5177547SLudovic Desroches if (mrq->data) 1432f5177547SLudovic Desroches host->stop_transfer(host); 1433c06ad258SHaavard Skinnemoen break; 1434f5177547SLudovic Desroches case STATE_DATA_XFER: 1435c06ad258SHaavard Skinnemoen mrq->data->error = -ENOMEDIUM; 1436796211b7SLudovic Desroches host->stop_transfer(host); 1437c06ad258SHaavard Skinnemoen break; 1438f5177547SLudovic Desroches case STATE_WAITING_NOTBUSY: 1439c06ad258SHaavard Skinnemoen mrq->data->error = -ENOMEDIUM; 1440c06ad258SHaavard Skinnemoen break; 1441c06ad258SHaavard Skinnemoen case STATE_SENDING_STOP: 1442c06ad258SHaavard Skinnemoen mrq->stop->error = -ENOMEDIUM; 1443c06ad258SHaavard Skinnemoen break; 1444f5177547SLudovic Desroches case STATE_END_REQUEST: 1445f5177547SLudovic Desroches break; 1446c06ad258SHaavard Skinnemoen } 1447c06ad258SHaavard Skinnemoen 1448965ebf33SHaavard Skinnemoen atmci_request_end(host, mrq); 1449965ebf33SHaavard Skinnemoen } else { 1450965ebf33SHaavard Skinnemoen list_del(&slot->queue_node); 1451965ebf33SHaavard Skinnemoen mrq->cmd->error = -ENOMEDIUM; 1452965ebf33SHaavard Skinnemoen if (mrq->data) 1453965ebf33SHaavard Skinnemoen mrq->data->error = -ENOMEDIUM; 1454965ebf33SHaavard Skinnemoen if (mrq->stop) 1455965ebf33SHaavard Skinnemoen mrq->stop->error = -ENOMEDIUM; 14567d2be074SHaavard Skinnemoen 1457965ebf33SHaavard Skinnemoen spin_unlock(&host->lock); 1458965ebf33SHaavard Skinnemoen mmc_request_done(slot->mmc, mrq); 1459965ebf33SHaavard Skinnemoen spin_lock(&host->lock); 1460965ebf33SHaavard Skinnemoen } 1461965ebf33SHaavard Skinnemoen } 1462965ebf33SHaavard Skinnemoen spin_unlock(&host->lock); 1463965ebf33SHaavard Skinnemoen 1464965ebf33SHaavard Skinnemoen mmc_detect_change(slot->mmc, 0); 14657d2be074SHaavard Skinnemoen } 14667d2be074SHaavard Skinnemoen } 14677d2be074SHaavard Skinnemoen 14687d2be074SHaavard Skinnemoen static void atmci_tasklet_func(unsigned long priv) 14697d2be074SHaavard Skinnemoen { 1470965ebf33SHaavard Skinnemoen struct atmel_mci *host = (struct atmel_mci *)priv; 14717d2be074SHaavard Skinnemoen struct mmc_request *mrq = host->mrq; 14727d2be074SHaavard Skinnemoen struct mmc_data *data = host->data; 1473c06ad258SHaavard Skinnemoen enum atmel_mci_state state = host->state; 1474c06ad258SHaavard Skinnemoen enum atmel_mci_state prev_state; 1475c06ad258SHaavard Skinnemoen u32 status; 1476c06ad258SHaavard Skinnemoen 1477965ebf33SHaavard Skinnemoen spin_lock(&host->lock); 1478965ebf33SHaavard Skinnemoen 1479c06ad258SHaavard Skinnemoen state = host->state; 14807d2be074SHaavard Skinnemoen 1481965ebf33SHaavard Skinnemoen dev_vdbg(&host->pdev->dev, 1482c06ad258SHaavard Skinnemoen "tasklet: state %u pending/completed/mask %lx/%lx/%x\n", 1483c06ad258SHaavard Skinnemoen state, host->pending_events, host->completed_events, 148403fc9a7fSLudovic Desroches atmci_readl(host, ATMCI_IMR)); 14857d2be074SHaavard Skinnemoen 1486c06ad258SHaavard Skinnemoen do { 1487c06ad258SHaavard Skinnemoen prev_state = state; 1488c06ad258SHaavard Skinnemoen 1489c06ad258SHaavard Skinnemoen switch (state) { 1490965ebf33SHaavard Skinnemoen case STATE_IDLE: 1491965ebf33SHaavard Skinnemoen break; 1492965ebf33SHaavard Skinnemoen 1493c06ad258SHaavard Skinnemoen case STATE_SENDING_CMD: 1494f5177547SLudovic Desroches /* 1495f5177547SLudovic Desroches * Command has been sent, we are waiting for command 1496f5177547SLudovic Desroches * ready. Then we have three next states possible: 1497f5177547SLudovic Desroches * END_REQUEST by default, WAITING_NOTBUSY if it's a 1498f5177547SLudovic Desroches * command needing it or DATA_XFER if there is data. 1499f5177547SLudovic Desroches */ 1500c06ad258SHaavard Skinnemoen if (!atmci_test_and_clear_pending(host, 1501f5177547SLudovic Desroches EVENT_CMD_RDY)) 1502c06ad258SHaavard Skinnemoen break; 1503c06ad258SHaavard Skinnemoen 15047d2be074SHaavard Skinnemoen host->cmd = NULL; 1505f5177547SLudovic Desroches atmci_set_completed(host, EVENT_CMD_RDY); 1506c06ad258SHaavard Skinnemoen atmci_command_complete(host, mrq->cmd); 1507f5177547SLudovic Desroches if (mrq->data) { 1508f5177547SLudovic Desroches /* 1509f5177547SLudovic Desroches * If there is a command error don't start 1510f5177547SLudovic Desroches * data transfer. 1511f5177547SLudovic Desroches */ 1512f5177547SLudovic Desroches if (mrq->cmd->error) { 1513f5177547SLudovic Desroches host->stop_transfer(host); 1514f5177547SLudovic Desroches host->data = NULL; 1515f5177547SLudovic Desroches atmci_writel(host, ATMCI_IDR, 1516f5177547SLudovic Desroches ATMCI_TXRDY | ATMCI_RXRDY 1517f5177547SLudovic Desroches | ATMCI_DATA_ERROR_FLAGS); 1518f5177547SLudovic Desroches state = STATE_END_REQUEST; 1519f5177547SLudovic Desroches } else 1520f5177547SLudovic Desroches state = STATE_DATA_XFER; 1521f5177547SLudovic Desroches } else if ((!mrq->data) && (mrq->cmd->flags & MMC_RSP_BUSY)) { 1522f5177547SLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY); 1523f5177547SLudovic Desroches state = STATE_WAITING_NOTBUSY; 1524f5177547SLudovic Desroches } else 1525f5177547SLudovic Desroches state = STATE_END_REQUEST; 1526c06ad258SHaavard Skinnemoen 1527f5177547SLudovic Desroches break; 1528c06ad258SHaavard Skinnemoen 1529f5177547SLudovic Desroches case STATE_DATA_XFER: 1530c06ad258SHaavard Skinnemoen if (atmci_test_and_clear_pending(host, 1531c06ad258SHaavard Skinnemoen EVENT_DATA_ERROR)) { 1532f5177547SLudovic Desroches atmci_set_completed(host, EVENT_DATA_ERROR); 1533f5177547SLudovic Desroches state = STATE_END_REQUEST; 1534c06ad258SHaavard Skinnemoen break; 15357d2be074SHaavard Skinnemoen } 15367d2be074SHaavard Skinnemoen 1537f5177547SLudovic Desroches /* 1538f5177547SLudovic Desroches * A data transfer is in progress. The event expected 1539f5177547SLudovic Desroches * to move to the next state depends of data transfer 1540f5177547SLudovic Desroches * type (PDC or DMA). Once transfer done we can move 1541f5177547SLudovic Desroches * to the next step which is WAITING_NOTBUSY in write 1542f5177547SLudovic Desroches * case and directly SENDING_STOP in read case. 1543f5177547SLudovic Desroches */ 1544c06ad258SHaavard Skinnemoen if (!atmci_test_and_clear_pending(host, 1545c06ad258SHaavard Skinnemoen EVENT_XFER_COMPLETE)) 1546c06ad258SHaavard Skinnemoen break; 15477d2be074SHaavard Skinnemoen 1548c06ad258SHaavard Skinnemoen atmci_set_completed(host, EVENT_XFER_COMPLETE); 1549c06ad258SHaavard Skinnemoen 1550f5177547SLudovic Desroches if (host->data->flags & MMC_DATA_WRITE) { 1551f5177547SLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY); 1552f5177547SLudovic Desroches state = STATE_WAITING_NOTBUSY; 1553f5177547SLudovic Desroches } else if (host->mrq->stop) { 1554f5177547SLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_CMDRDY); 1555f5177547SLudovic Desroches atmci_send_stop_cmd(host, data); 1556f5177547SLudovic Desroches state = STATE_SENDING_STOP; 1557f5177547SLudovic Desroches } else { 1558c06ad258SHaavard Skinnemoen host->data = NULL; 15597d2be074SHaavard Skinnemoen data->bytes_xfered = data->blocks * data->blksz; 15607d2be074SHaavard Skinnemoen data->error = 0; 1561f5177547SLudovic Desroches state = STATE_END_REQUEST; 15627d2be074SHaavard Skinnemoen } 1563f5177547SLudovic Desroches break; 15647d2be074SHaavard Skinnemoen 1565f5177547SLudovic Desroches case STATE_WAITING_NOTBUSY: 1566f5177547SLudovic Desroches /* 1567f5177547SLudovic Desroches * We can be in the state for two reasons: a command 1568f5177547SLudovic Desroches * requiring waiting not busy signal (stop command 1569f5177547SLudovic Desroches * included) or a write operation. In the latest case, 1570f5177547SLudovic Desroches * we need to send a stop command. 1571f5177547SLudovic Desroches */ 1572f5177547SLudovic Desroches if (!atmci_test_and_clear_pending(host, 1573f5177547SLudovic Desroches EVENT_NOTBUSY)) 1574f5177547SLudovic Desroches break; 15757d2be074SHaavard Skinnemoen 1576f5177547SLudovic Desroches atmci_set_completed(host, EVENT_NOTBUSY); 1577f5177547SLudovic Desroches 1578f5177547SLudovic Desroches if (host->data) { 1579f5177547SLudovic Desroches /* 1580f5177547SLudovic Desroches * For some commands such as CMD53, even if 1581f5177547SLudovic Desroches * there is data transfer, there is no stop 1582f5177547SLudovic Desroches * command to send. 1583f5177547SLudovic Desroches */ 1584f5177547SLudovic Desroches if (host->mrq->stop) { 1585f5177547SLudovic Desroches atmci_writel(host, ATMCI_IER, 1586f5177547SLudovic Desroches ATMCI_CMDRDY); 15872c96a293SLudovic Desroches atmci_send_stop_cmd(host, data); 1588f5177547SLudovic Desroches state = STATE_SENDING_STOP; 1589f5177547SLudovic Desroches } else { 1590f5177547SLudovic Desroches host->data = NULL; 1591f5177547SLudovic Desroches data->bytes_xfered = data->blocks 1592f5177547SLudovic Desroches * data->blksz; 1593f5177547SLudovic Desroches data->error = 0; 1594f5177547SLudovic Desroches state = STATE_END_REQUEST; 1595f5177547SLudovic Desroches } 1596f5177547SLudovic Desroches } else 1597f5177547SLudovic Desroches state = STATE_END_REQUEST; 1598f5177547SLudovic Desroches break; 1599c06ad258SHaavard Skinnemoen 1600c06ad258SHaavard Skinnemoen case STATE_SENDING_STOP: 1601f5177547SLudovic Desroches /* 1602f5177547SLudovic Desroches * In this state, it is important to set host->data to 1603f5177547SLudovic Desroches * NULL (which is tested in the waiting notbusy state) 1604f5177547SLudovic Desroches * in order to go to the end request state instead of 1605f5177547SLudovic Desroches * sending stop again. 1606f5177547SLudovic Desroches */ 1607c06ad258SHaavard Skinnemoen if (!atmci_test_and_clear_pending(host, 1608f5177547SLudovic Desroches EVENT_CMD_RDY)) 1609c06ad258SHaavard Skinnemoen break; 1610c06ad258SHaavard Skinnemoen 1611c06ad258SHaavard Skinnemoen host->cmd = NULL; 1612f5177547SLudovic Desroches host->data = NULL; 1613f5177547SLudovic Desroches data->bytes_xfered = data->blocks * data->blksz; 1614f5177547SLudovic Desroches data->error = 0; 1615c06ad258SHaavard Skinnemoen atmci_command_complete(host, mrq->stop); 1616f5177547SLudovic Desroches if (mrq->stop->error) { 1617f5177547SLudovic Desroches host->stop_transfer(host); 1618f5177547SLudovic Desroches atmci_writel(host, ATMCI_IDR, 1619f5177547SLudovic Desroches ATMCI_TXRDY | ATMCI_RXRDY 1620f5177547SLudovic Desroches | ATMCI_DATA_ERROR_FLAGS); 1621f5177547SLudovic Desroches state = STATE_END_REQUEST; 1622f5177547SLudovic Desroches } else { 1623f5177547SLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY); 1624f5177547SLudovic Desroches state = STATE_WAITING_NOTBUSY; 1625f5177547SLudovic Desroches } 1626c06ad258SHaavard Skinnemoen break; 1627c06ad258SHaavard Skinnemoen 1628f5177547SLudovic Desroches case STATE_END_REQUEST: 1629f5177547SLudovic Desroches atmci_writel(host, ATMCI_IDR, ATMCI_TXRDY | ATMCI_RXRDY 1630f5177547SLudovic Desroches | ATMCI_DATA_ERROR_FLAGS); 1631f5177547SLudovic Desroches status = host->data_status; 1632f5177547SLudovic Desroches if (unlikely(status)) { 1633f5177547SLudovic Desroches host->stop_transfer(host); 1634f5177547SLudovic Desroches host->data = NULL; 1635f5177547SLudovic Desroches if (status & ATMCI_DTOE) { 1636f5177547SLudovic Desroches data->error = -ETIMEDOUT; 1637f5177547SLudovic Desroches } else if (status & ATMCI_DCRCE) { 1638f5177547SLudovic Desroches data->error = -EILSEQ; 1639f5177547SLudovic Desroches } else { 1640f5177547SLudovic Desroches data->error = -EIO; 1641f5177547SLudovic Desroches } 1642f5177547SLudovic Desroches } 1643f5177547SLudovic Desroches 1644f5177547SLudovic Desroches atmci_request_end(host, host->mrq); 1645f5177547SLudovic Desroches state = STATE_IDLE; 1646c06ad258SHaavard Skinnemoen break; 1647c06ad258SHaavard Skinnemoen } 1648c06ad258SHaavard Skinnemoen } while (state != prev_state); 1649c06ad258SHaavard Skinnemoen 1650c06ad258SHaavard Skinnemoen host->state = state; 1651965ebf33SHaavard Skinnemoen 1652965ebf33SHaavard Skinnemoen spin_unlock(&host->lock); 16537d2be074SHaavard Skinnemoen } 16547d2be074SHaavard Skinnemoen 16557d2be074SHaavard Skinnemoen static void atmci_read_data_pio(struct atmel_mci *host) 16567d2be074SHaavard Skinnemoen { 16577d2be074SHaavard Skinnemoen struct scatterlist *sg = host->sg; 16587d2be074SHaavard Skinnemoen void *buf = sg_virt(sg); 16597d2be074SHaavard Skinnemoen unsigned int offset = host->pio_offset; 16607d2be074SHaavard Skinnemoen struct mmc_data *data = host->data; 16617d2be074SHaavard Skinnemoen u32 value; 16627d2be074SHaavard Skinnemoen u32 status; 16637d2be074SHaavard Skinnemoen unsigned int nbytes = 0; 16647d2be074SHaavard Skinnemoen 16657d2be074SHaavard Skinnemoen do { 166603fc9a7fSLudovic Desroches value = atmci_readl(host, ATMCI_RDR); 16677d2be074SHaavard Skinnemoen if (likely(offset + 4 <= sg->length)) { 16687d2be074SHaavard Skinnemoen put_unaligned(value, (u32 *)(buf + offset)); 16697d2be074SHaavard Skinnemoen 16707d2be074SHaavard Skinnemoen offset += 4; 16717d2be074SHaavard Skinnemoen nbytes += 4; 16727d2be074SHaavard Skinnemoen 16737d2be074SHaavard Skinnemoen if (offset == sg->length) { 16745e7184aeSHaavard Skinnemoen flush_dcache_page(sg_page(sg)); 16757d2be074SHaavard Skinnemoen host->sg = sg = sg_next(sg); 16767d2be074SHaavard Skinnemoen if (!sg) 16777d2be074SHaavard Skinnemoen goto done; 16787d2be074SHaavard Skinnemoen 16797d2be074SHaavard Skinnemoen offset = 0; 16807d2be074SHaavard Skinnemoen buf = sg_virt(sg); 16817d2be074SHaavard Skinnemoen } 16827d2be074SHaavard Skinnemoen } else { 16837d2be074SHaavard Skinnemoen unsigned int remaining = sg->length - offset; 16847d2be074SHaavard Skinnemoen memcpy(buf + offset, &value, remaining); 16857d2be074SHaavard Skinnemoen nbytes += remaining; 16867d2be074SHaavard Skinnemoen 16877d2be074SHaavard Skinnemoen flush_dcache_page(sg_page(sg)); 16887d2be074SHaavard Skinnemoen host->sg = sg = sg_next(sg); 16897d2be074SHaavard Skinnemoen if (!sg) 16907d2be074SHaavard Skinnemoen goto done; 16917d2be074SHaavard Skinnemoen 16927d2be074SHaavard Skinnemoen offset = 4 - remaining; 16937d2be074SHaavard Skinnemoen buf = sg_virt(sg); 16947d2be074SHaavard Skinnemoen memcpy(buf, (u8 *)&value + remaining, offset); 16957d2be074SHaavard Skinnemoen nbytes += offset; 16967d2be074SHaavard Skinnemoen } 16977d2be074SHaavard Skinnemoen 169803fc9a7fSLudovic Desroches status = atmci_readl(host, ATMCI_SR); 16997d2be074SHaavard Skinnemoen if (status & ATMCI_DATA_ERROR_FLAGS) { 170003fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_IDR, (ATMCI_NOTBUSY | ATMCI_RXRDY 17017d2be074SHaavard Skinnemoen | ATMCI_DATA_ERROR_FLAGS)); 17027d2be074SHaavard Skinnemoen host->data_status = status; 1703965ebf33SHaavard Skinnemoen data->bytes_xfered += nbytes; 1704965ebf33SHaavard Skinnemoen return; 17057d2be074SHaavard Skinnemoen } 17062c96a293SLudovic Desroches } while (status & ATMCI_RXRDY); 17077d2be074SHaavard Skinnemoen 17087d2be074SHaavard Skinnemoen host->pio_offset = offset; 17097d2be074SHaavard Skinnemoen data->bytes_xfered += nbytes; 17107d2be074SHaavard Skinnemoen 17117d2be074SHaavard Skinnemoen return; 17127d2be074SHaavard Skinnemoen 17137d2be074SHaavard Skinnemoen done: 171403fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_IDR, ATMCI_RXRDY); 171503fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY); 17167d2be074SHaavard Skinnemoen data->bytes_xfered += nbytes; 1717965ebf33SHaavard Skinnemoen smp_wmb(); 1718c06ad258SHaavard Skinnemoen atmci_set_pending(host, EVENT_XFER_COMPLETE); 17197d2be074SHaavard Skinnemoen } 17207d2be074SHaavard Skinnemoen 17217d2be074SHaavard Skinnemoen static void atmci_write_data_pio(struct atmel_mci *host) 17227d2be074SHaavard Skinnemoen { 17237d2be074SHaavard Skinnemoen struct scatterlist *sg = host->sg; 17247d2be074SHaavard Skinnemoen void *buf = sg_virt(sg); 17257d2be074SHaavard Skinnemoen unsigned int offset = host->pio_offset; 17267d2be074SHaavard Skinnemoen struct mmc_data *data = host->data; 17277d2be074SHaavard Skinnemoen u32 value; 17287d2be074SHaavard Skinnemoen u32 status; 17297d2be074SHaavard Skinnemoen unsigned int nbytes = 0; 17307d2be074SHaavard Skinnemoen 17317d2be074SHaavard Skinnemoen do { 17327d2be074SHaavard Skinnemoen if (likely(offset + 4 <= sg->length)) { 17337d2be074SHaavard Skinnemoen value = get_unaligned((u32 *)(buf + offset)); 173403fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_TDR, value); 17357d2be074SHaavard Skinnemoen 17367d2be074SHaavard Skinnemoen offset += 4; 17377d2be074SHaavard Skinnemoen nbytes += 4; 17387d2be074SHaavard Skinnemoen if (offset == sg->length) { 17397d2be074SHaavard Skinnemoen host->sg = sg = sg_next(sg); 17407d2be074SHaavard Skinnemoen if (!sg) 17417d2be074SHaavard Skinnemoen goto done; 17427d2be074SHaavard Skinnemoen 17437d2be074SHaavard Skinnemoen offset = 0; 17447d2be074SHaavard Skinnemoen buf = sg_virt(sg); 17457d2be074SHaavard Skinnemoen } 17467d2be074SHaavard Skinnemoen } else { 17477d2be074SHaavard Skinnemoen unsigned int remaining = sg->length - offset; 17487d2be074SHaavard Skinnemoen 17497d2be074SHaavard Skinnemoen value = 0; 17507d2be074SHaavard Skinnemoen memcpy(&value, buf + offset, remaining); 17517d2be074SHaavard Skinnemoen nbytes += remaining; 17527d2be074SHaavard Skinnemoen 17537d2be074SHaavard Skinnemoen host->sg = sg = sg_next(sg); 17547d2be074SHaavard Skinnemoen if (!sg) { 175503fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_TDR, value); 17567d2be074SHaavard Skinnemoen goto done; 17577d2be074SHaavard Skinnemoen } 17587d2be074SHaavard Skinnemoen 17597d2be074SHaavard Skinnemoen offset = 4 - remaining; 17607d2be074SHaavard Skinnemoen buf = sg_virt(sg); 17617d2be074SHaavard Skinnemoen memcpy((u8 *)&value + remaining, buf, offset); 176203fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_TDR, value); 17637d2be074SHaavard Skinnemoen nbytes += offset; 17647d2be074SHaavard Skinnemoen } 17657d2be074SHaavard Skinnemoen 176603fc9a7fSLudovic Desroches status = atmci_readl(host, ATMCI_SR); 17677d2be074SHaavard Skinnemoen if (status & ATMCI_DATA_ERROR_FLAGS) { 176803fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_IDR, (ATMCI_NOTBUSY | ATMCI_TXRDY 17697d2be074SHaavard Skinnemoen | ATMCI_DATA_ERROR_FLAGS)); 17707d2be074SHaavard Skinnemoen host->data_status = status; 1771965ebf33SHaavard Skinnemoen data->bytes_xfered += nbytes; 1772965ebf33SHaavard Skinnemoen return; 17737d2be074SHaavard Skinnemoen } 17742c96a293SLudovic Desroches } while (status & ATMCI_TXRDY); 17757d2be074SHaavard Skinnemoen 17767d2be074SHaavard Skinnemoen host->pio_offset = offset; 17777d2be074SHaavard Skinnemoen data->bytes_xfered += nbytes; 17787d2be074SHaavard Skinnemoen 17797d2be074SHaavard Skinnemoen return; 17807d2be074SHaavard Skinnemoen 17817d2be074SHaavard Skinnemoen done: 178203fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_IDR, ATMCI_TXRDY); 178303fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY); 17847d2be074SHaavard Skinnemoen data->bytes_xfered += nbytes; 1785965ebf33SHaavard Skinnemoen smp_wmb(); 1786c06ad258SHaavard Skinnemoen atmci_set_pending(host, EVENT_XFER_COMPLETE); 17877d2be074SHaavard Skinnemoen } 17887d2be074SHaavard Skinnemoen 178988ff82edSAnders Grahn static void atmci_sdio_interrupt(struct atmel_mci *host, u32 status) 179088ff82edSAnders Grahn { 179188ff82edSAnders Grahn int i; 179288ff82edSAnders Grahn 17932c96a293SLudovic Desroches for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) { 179488ff82edSAnders Grahn struct atmel_mci_slot *slot = host->slot[i]; 179588ff82edSAnders Grahn if (slot && (status & slot->sdio_irq)) { 179688ff82edSAnders Grahn mmc_signal_sdio_irq(slot->mmc); 179788ff82edSAnders Grahn } 179888ff82edSAnders Grahn } 179988ff82edSAnders Grahn } 180088ff82edSAnders Grahn 180188ff82edSAnders Grahn 18027d2be074SHaavard Skinnemoen static irqreturn_t atmci_interrupt(int irq, void *dev_id) 18037d2be074SHaavard Skinnemoen { 1804965ebf33SHaavard Skinnemoen struct atmel_mci *host = dev_id; 18057d2be074SHaavard Skinnemoen u32 status, mask, pending; 18067d2be074SHaavard Skinnemoen unsigned int pass_count = 0; 18077d2be074SHaavard Skinnemoen 18087d2be074SHaavard Skinnemoen do { 180903fc9a7fSLudovic Desroches status = atmci_readl(host, ATMCI_SR); 181003fc9a7fSLudovic Desroches mask = atmci_readl(host, ATMCI_IMR); 18117d2be074SHaavard Skinnemoen pending = status & mask; 18127d2be074SHaavard Skinnemoen if (!pending) 18137d2be074SHaavard Skinnemoen break; 18147d2be074SHaavard Skinnemoen 18157d2be074SHaavard Skinnemoen if (pending & ATMCI_DATA_ERROR_FLAGS) { 181603fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_IDR, ATMCI_DATA_ERROR_FLAGS 1817f5177547SLudovic Desroches | ATMCI_RXRDY | ATMCI_TXRDY 1818f5177547SLudovic Desroches | ATMCI_ENDRX | ATMCI_ENDTX 1819f5177547SLudovic Desroches | ATMCI_RXBUFF | ATMCI_TXBUFE); 1820965ebf33SHaavard Skinnemoen 18217d2be074SHaavard Skinnemoen host->data_status = status; 1822965ebf33SHaavard Skinnemoen smp_wmb(); 18237d2be074SHaavard Skinnemoen atmci_set_pending(host, EVENT_DATA_ERROR); 18247d2be074SHaavard Skinnemoen tasklet_schedule(&host->tasklet); 18257d2be074SHaavard Skinnemoen } 1826796211b7SLudovic Desroches 1827796211b7SLudovic Desroches if (pending & ATMCI_TXBUFE) { 1828796211b7SLudovic Desroches atmci_writel(host, ATMCI_IDR, ATMCI_TXBUFE); 18297e8ba228SLudovic Desroches atmci_writel(host, ATMCI_IDR, ATMCI_ENDTX); 1830796211b7SLudovic Desroches /* 1831796211b7SLudovic Desroches * We can receive this interruption before having configured 1832796211b7SLudovic Desroches * the second pdc buffer, so we need to reconfigure first and 1833796211b7SLudovic Desroches * second buffers again 1834796211b7SLudovic Desroches */ 1835796211b7SLudovic Desroches if (host->data_size) { 1836796211b7SLudovic Desroches atmci_pdc_set_both_buf(host, XFER_TRANSMIT); 18377e8ba228SLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_ENDTX); 1838796211b7SLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_TXBUFE); 1839796211b7SLudovic Desroches } else { 1840796211b7SLudovic Desroches atmci_pdc_complete(host); 1841796211b7SLudovic Desroches } 18427e8ba228SLudovic Desroches } else if (pending & ATMCI_ENDTX) { 18437e8ba228SLudovic Desroches atmci_writel(host, ATMCI_IDR, ATMCI_ENDTX); 18447e8ba228SLudovic Desroches 18457e8ba228SLudovic Desroches if (host->data_size) { 18467e8ba228SLudovic Desroches atmci_pdc_set_single_buf(host, 18477e8ba228SLudovic Desroches XFER_TRANSMIT, PDC_SECOND_BUF); 18487e8ba228SLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_ENDTX); 18497e8ba228SLudovic Desroches } 1850796211b7SLudovic Desroches } 1851796211b7SLudovic Desroches 18527e8ba228SLudovic Desroches if (pending & ATMCI_RXBUFF) { 18537e8ba228SLudovic Desroches atmci_writel(host, ATMCI_IDR, ATMCI_RXBUFF); 18547e8ba228SLudovic Desroches atmci_writel(host, ATMCI_IDR, ATMCI_ENDRX); 18557e8ba228SLudovic Desroches /* 18567e8ba228SLudovic Desroches * We can receive this interruption before having configured 18577e8ba228SLudovic Desroches * the second pdc buffer, so we need to reconfigure first and 18587e8ba228SLudovic Desroches * second buffers again 18597e8ba228SLudovic Desroches */ 18607e8ba228SLudovic Desroches if (host->data_size) { 18617e8ba228SLudovic Desroches atmci_pdc_set_both_buf(host, XFER_RECEIVE); 18627e8ba228SLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_ENDRX); 18637e8ba228SLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_RXBUFF); 18647e8ba228SLudovic Desroches } else { 18657e8ba228SLudovic Desroches atmci_pdc_complete(host); 18667e8ba228SLudovic Desroches } 18677e8ba228SLudovic Desroches } else if (pending & ATMCI_ENDRX) { 1868796211b7SLudovic Desroches atmci_writel(host, ATMCI_IDR, ATMCI_ENDRX); 1869796211b7SLudovic Desroches 1870796211b7SLudovic Desroches if (host->data_size) { 1871796211b7SLudovic Desroches atmci_pdc_set_single_buf(host, 1872796211b7SLudovic Desroches XFER_RECEIVE, PDC_SECOND_BUF); 1873796211b7SLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_ENDRX); 1874796211b7SLudovic Desroches } 1875796211b7SLudovic Desroches } 1876796211b7SLudovic Desroches 1877f5177547SLudovic Desroches /* 1878f5177547SLudovic Desroches * First mci IPs, so mainly the ones having pdc, have some 1879f5177547SLudovic Desroches * issues with the notbusy signal. You can't get it after 1880f5177547SLudovic Desroches * data transmission if you have not sent a stop command. 1881f5177547SLudovic Desroches * The appropriate workaround is to use the BLKE signal. 1882f5177547SLudovic Desroches */ 1883f5177547SLudovic Desroches if (pending & ATMCI_BLKE) { 1884f5177547SLudovic Desroches atmci_writel(host, ATMCI_IDR, ATMCI_BLKE); 1885965ebf33SHaavard Skinnemoen smp_wmb(); 1886f5177547SLudovic Desroches atmci_set_pending(host, EVENT_NOTBUSY); 18877d2be074SHaavard Skinnemoen tasklet_schedule(&host->tasklet); 18887d2be074SHaavard Skinnemoen } 1889f5177547SLudovic Desroches 1890f5177547SLudovic Desroches if (pending & ATMCI_NOTBUSY) { 1891f5177547SLudovic Desroches atmci_writel(host, ATMCI_IDR, ATMCI_NOTBUSY); 1892f5177547SLudovic Desroches smp_wmb(); 1893f5177547SLudovic Desroches atmci_set_pending(host, EVENT_NOTBUSY); 1894f5177547SLudovic Desroches tasklet_schedule(&host->tasklet); 1895f5177547SLudovic Desroches } 1896f5177547SLudovic Desroches 18972c96a293SLudovic Desroches if (pending & ATMCI_RXRDY) 18987d2be074SHaavard Skinnemoen atmci_read_data_pio(host); 18992c96a293SLudovic Desroches if (pending & ATMCI_TXRDY) 19007d2be074SHaavard Skinnemoen atmci_write_data_pio(host); 19017d2be074SHaavard Skinnemoen 1902f5177547SLudovic Desroches if (pending & ATMCI_CMDRDY) { 1903f5177547SLudovic Desroches atmci_writel(host, ATMCI_IDR, ATMCI_CMDRDY); 1904f5177547SLudovic Desroches host->cmd_status = status; 1905f5177547SLudovic Desroches smp_wmb(); 1906f5177547SLudovic Desroches atmci_set_pending(host, EVENT_CMD_RDY); 1907f5177547SLudovic Desroches tasklet_schedule(&host->tasklet); 1908f5177547SLudovic Desroches } 190988ff82edSAnders Grahn 19102c96a293SLudovic Desroches if (pending & (ATMCI_SDIOIRQA | ATMCI_SDIOIRQB)) 191188ff82edSAnders Grahn atmci_sdio_interrupt(host, status); 191288ff82edSAnders Grahn 19137d2be074SHaavard Skinnemoen } while (pass_count++ < 5); 19147d2be074SHaavard Skinnemoen 19157d2be074SHaavard Skinnemoen return pass_count ? IRQ_HANDLED : IRQ_NONE; 19167d2be074SHaavard Skinnemoen } 19177d2be074SHaavard Skinnemoen 19187d2be074SHaavard Skinnemoen static irqreturn_t atmci_detect_interrupt(int irq, void *dev_id) 19197d2be074SHaavard Skinnemoen { 1920965ebf33SHaavard Skinnemoen struct atmel_mci_slot *slot = dev_id; 19217d2be074SHaavard Skinnemoen 19227d2be074SHaavard Skinnemoen /* 19237d2be074SHaavard Skinnemoen * Disable interrupts until the pin has stabilized and check 19247d2be074SHaavard Skinnemoen * the state then. Use mod_timer() since we may be in the 19257d2be074SHaavard Skinnemoen * middle of the timer routine when this interrupt triggers. 19267d2be074SHaavard Skinnemoen */ 19277d2be074SHaavard Skinnemoen disable_irq_nosync(irq); 1928965ebf33SHaavard Skinnemoen mod_timer(&slot->detect_timer, jiffies + msecs_to_jiffies(20)); 19297d2be074SHaavard Skinnemoen 19307d2be074SHaavard Skinnemoen return IRQ_HANDLED; 19317d2be074SHaavard Skinnemoen } 19327d2be074SHaavard Skinnemoen 1933965ebf33SHaavard Skinnemoen static int __init atmci_init_slot(struct atmel_mci *host, 1934965ebf33SHaavard Skinnemoen struct mci_slot_pdata *slot_data, unsigned int id, 193588ff82edSAnders Grahn u32 sdc_reg, u32 sdio_irq) 1936965ebf33SHaavard Skinnemoen { 1937965ebf33SHaavard Skinnemoen struct mmc_host *mmc; 1938965ebf33SHaavard Skinnemoen struct atmel_mci_slot *slot; 1939965ebf33SHaavard Skinnemoen 1940965ebf33SHaavard Skinnemoen mmc = mmc_alloc_host(sizeof(struct atmel_mci_slot), &host->pdev->dev); 1941965ebf33SHaavard Skinnemoen if (!mmc) 1942965ebf33SHaavard Skinnemoen return -ENOMEM; 1943965ebf33SHaavard Skinnemoen 1944965ebf33SHaavard Skinnemoen slot = mmc_priv(mmc); 1945965ebf33SHaavard Skinnemoen slot->mmc = mmc; 1946965ebf33SHaavard Skinnemoen slot->host = host; 1947965ebf33SHaavard Skinnemoen slot->detect_pin = slot_data->detect_pin; 1948965ebf33SHaavard Skinnemoen slot->wp_pin = slot_data->wp_pin; 19491c1452beSJonas Larsson slot->detect_is_active_high = slot_data->detect_is_active_high; 1950965ebf33SHaavard Skinnemoen slot->sdc_reg = sdc_reg; 195188ff82edSAnders Grahn slot->sdio_irq = sdio_irq; 1952965ebf33SHaavard Skinnemoen 1953965ebf33SHaavard Skinnemoen mmc->ops = &atmci_ops; 1954965ebf33SHaavard Skinnemoen mmc->f_min = DIV_ROUND_UP(host->bus_hz, 512); 1955965ebf33SHaavard Skinnemoen mmc->f_max = host->bus_hz / 2; 1956965ebf33SHaavard Skinnemoen mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; 195788ff82edSAnders Grahn if (sdio_irq) 195888ff82edSAnders Grahn mmc->caps |= MMC_CAP_SDIO_IRQ; 1959796211b7SLudovic Desroches if (host->caps.has_highspeed) 196099ddffd8SNicolas Ferre mmc->caps |= MMC_CAP_SD_HIGHSPEED; 19617a90dcc2SLudovic Desroches /* 19627a90dcc2SLudovic Desroches * Without the read/write proof capability, it is strongly suggested to 19637a90dcc2SLudovic Desroches * use only one bit for data to prevent fifo underruns and overruns 19647a90dcc2SLudovic Desroches * which will corrupt data. 19657a90dcc2SLudovic Desroches */ 19667a90dcc2SLudovic Desroches if ((slot_data->bus_width >= 4) && host->caps.has_rwproof) 1967965ebf33SHaavard Skinnemoen mmc->caps |= MMC_CAP_4_BIT_DATA; 1968965ebf33SHaavard Skinnemoen 19697a90dcc2SLudovic Desroches if (atmci_get_version(host) < 0x200) { 19707a90dcc2SLudovic Desroches mmc->max_segs = 256; 19717a90dcc2SLudovic Desroches mmc->max_blk_size = 4095; 19727a90dcc2SLudovic Desroches mmc->max_blk_count = 256; 19737a90dcc2SLudovic Desroches mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; 19747a90dcc2SLudovic Desroches mmc->max_seg_size = mmc->max_blk_size * mmc->max_segs; 19757a90dcc2SLudovic Desroches } else { 1976a36274e0SMartin K. Petersen mmc->max_segs = 64; 1977965ebf33SHaavard Skinnemoen mmc->max_req_size = 32768 * 512; 1978965ebf33SHaavard Skinnemoen mmc->max_blk_size = 32768; 1979965ebf33SHaavard Skinnemoen mmc->max_blk_count = 512; 19807a90dcc2SLudovic Desroches } 1981965ebf33SHaavard Skinnemoen 1982965ebf33SHaavard Skinnemoen /* Assume card is present initially */ 1983965ebf33SHaavard Skinnemoen set_bit(ATMCI_CARD_PRESENT, &slot->flags); 1984965ebf33SHaavard Skinnemoen if (gpio_is_valid(slot->detect_pin)) { 1985965ebf33SHaavard Skinnemoen if (gpio_request(slot->detect_pin, "mmc_detect")) { 1986965ebf33SHaavard Skinnemoen dev_dbg(&mmc->class_dev, "no detect pin available\n"); 1987965ebf33SHaavard Skinnemoen slot->detect_pin = -EBUSY; 19881c1452beSJonas Larsson } else if (gpio_get_value(slot->detect_pin) ^ 19891c1452beSJonas Larsson slot->detect_is_active_high) { 1990965ebf33SHaavard Skinnemoen clear_bit(ATMCI_CARD_PRESENT, &slot->flags); 1991965ebf33SHaavard Skinnemoen } 1992965ebf33SHaavard Skinnemoen } 1993965ebf33SHaavard Skinnemoen 1994965ebf33SHaavard Skinnemoen if (!gpio_is_valid(slot->detect_pin)) 1995965ebf33SHaavard Skinnemoen mmc->caps |= MMC_CAP_NEEDS_POLL; 1996965ebf33SHaavard Skinnemoen 1997965ebf33SHaavard Skinnemoen if (gpio_is_valid(slot->wp_pin)) { 1998965ebf33SHaavard Skinnemoen if (gpio_request(slot->wp_pin, "mmc_wp")) { 1999965ebf33SHaavard Skinnemoen dev_dbg(&mmc->class_dev, "no WP pin available\n"); 2000965ebf33SHaavard Skinnemoen slot->wp_pin = -EBUSY; 2001965ebf33SHaavard Skinnemoen } 2002965ebf33SHaavard Skinnemoen } 2003965ebf33SHaavard Skinnemoen 2004965ebf33SHaavard Skinnemoen host->slot[id] = slot; 2005965ebf33SHaavard Skinnemoen mmc_add_host(mmc); 2006965ebf33SHaavard Skinnemoen 2007965ebf33SHaavard Skinnemoen if (gpio_is_valid(slot->detect_pin)) { 2008965ebf33SHaavard Skinnemoen int ret; 2009965ebf33SHaavard Skinnemoen 2010965ebf33SHaavard Skinnemoen setup_timer(&slot->detect_timer, atmci_detect_change, 2011965ebf33SHaavard Skinnemoen (unsigned long)slot); 2012965ebf33SHaavard Skinnemoen 2013965ebf33SHaavard Skinnemoen ret = request_irq(gpio_to_irq(slot->detect_pin), 2014965ebf33SHaavard Skinnemoen atmci_detect_interrupt, 2015965ebf33SHaavard Skinnemoen IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, 2016965ebf33SHaavard Skinnemoen "mmc-detect", slot); 2017965ebf33SHaavard Skinnemoen if (ret) { 2018965ebf33SHaavard Skinnemoen dev_dbg(&mmc->class_dev, 2019965ebf33SHaavard Skinnemoen "could not request IRQ %d for detect pin\n", 2020965ebf33SHaavard Skinnemoen gpio_to_irq(slot->detect_pin)); 2021965ebf33SHaavard Skinnemoen gpio_free(slot->detect_pin); 2022965ebf33SHaavard Skinnemoen slot->detect_pin = -EBUSY; 2023965ebf33SHaavard Skinnemoen } 2024965ebf33SHaavard Skinnemoen } 2025965ebf33SHaavard Skinnemoen 2026965ebf33SHaavard Skinnemoen atmci_init_debugfs(slot); 2027965ebf33SHaavard Skinnemoen 2028965ebf33SHaavard Skinnemoen return 0; 2029965ebf33SHaavard Skinnemoen } 2030965ebf33SHaavard Skinnemoen 2031965ebf33SHaavard Skinnemoen static void __exit atmci_cleanup_slot(struct atmel_mci_slot *slot, 2032965ebf33SHaavard Skinnemoen unsigned int id) 2033965ebf33SHaavard Skinnemoen { 2034965ebf33SHaavard Skinnemoen /* Debugfs stuff is cleaned up by mmc core */ 2035965ebf33SHaavard Skinnemoen 2036965ebf33SHaavard Skinnemoen set_bit(ATMCI_SHUTDOWN, &slot->flags); 2037965ebf33SHaavard Skinnemoen smp_wmb(); 2038965ebf33SHaavard Skinnemoen 2039965ebf33SHaavard Skinnemoen mmc_remove_host(slot->mmc); 2040965ebf33SHaavard Skinnemoen 2041965ebf33SHaavard Skinnemoen if (gpio_is_valid(slot->detect_pin)) { 2042965ebf33SHaavard Skinnemoen int pin = slot->detect_pin; 2043965ebf33SHaavard Skinnemoen 2044965ebf33SHaavard Skinnemoen free_irq(gpio_to_irq(pin), slot); 2045965ebf33SHaavard Skinnemoen del_timer_sync(&slot->detect_timer); 2046965ebf33SHaavard Skinnemoen gpio_free(pin); 2047965ebf33SHaavard Skinnemoen } 2048965ebf33SHaavard Skinnemoen if (gpio_is_valid(slot->wp_pin)) 2049965ebf33SHaavard Skinnemoen gpio_free(slot->wp_pin); 2050965ebf33SHaavard Skinnemoen 2051965ebf33SHaavard Skinnemoen slot->host->slot[id] = NULL; 2052965ebf33SHaavard Skinnemoen mmc_free_host(slot->mmc); 2053965ebf33SHaavard Skinnemoen } 2054965ebf33SHaavard Skinnemoen 20552c96a293SLudovic Desroches static bool atmci_filter(struct dma_chan *chan, void *slave) 205674465b4fSDan Williams { 20572635d1baSNicolas Ferre struct mci_dma_data *sl = slave; 205874465b4fSDan Williams 20592635d1baSNicolas Ferre if (sl && find_slave_dev(sl) == chan->device->dev) { 20602635d1baSNicolas Ferre chan->private = slave_data_ptr(sl); 20617dd60251SDan Williams return true; 20622635d1baSNicolas Ferre } else { 20637dd60251SDan Williams return false; 206474465b4fSDan Williams } 20652635d1baSNicolas Ferre } 20662635d1baSNicolas Ferre 2067ef878198SLudovic Desroches static bool atmci_configure_dma(struct atmel_mci *host) 20682635d1baSNicolas Ferre { 20692635d1baSNicolas Ferre struct mci_platform_data *pdata; 20702635d1baSNicolas Ferre 20712635d1baSNicolas Ferre if (host == NULL) 2072ef878198SLudovic Desroches return false; 20732635d1baSNicolas Ferre 20742635d1baSNicolas Ferre pdata = host->pdev->dev.platform_data; 20752635d1baSNicolas Ferre 20762635d1baSNicolas Ferre if (pdata && find_slave_dev(pdata->dma_slave)) { 20772635d1baSNicolas Ferre dma_cap_mask_t mask; 20782635d1baSNicolas Ferre 20792635d1baSNicolas Ferre /* Try to grab a DMA channel */ 20802635d1baSNicolas Ferre dma_cap_zero(mask); 20812635d1baSNicolas Ferre dma_cap_set(DMA_SLAVE, mask); 20822635d1baSNicolas Ferre host->dma.chan = 20832c96a293SLudovic Desroches dma_request_channel(mask, atmci_filter, pdata->dma_slave); 20842635d1baSNicolas Ferre } 2085ef878198SLudovic Desroches if (!host->dma.chan) { 2086ef878198SLudovic Desroches dev_warn(&host->pdev->dev, "no DMA channel available\n"); 2087ef878198SLudovic Desroches return false; 2088ef878198SLudovic Desroches } else { 208974791a2dSNicolas Ferre dev_info(&host->pdev->dev, 2090b81cfc41SLudovic Desroches "using %s for DMA transfers\n", 209174791a2dSNicolas Ferre dma_chan_name(host->dma.chan)); 2092e2b35f3dSViresh Kumar 2093e2b35f3dSViresh Kumar host->dma_conf.src_addr = host->mapbase + ATMCI_RDR; 2094e2b35f3dSViresh Kumar host->dma_conf.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; 2095e2b35f3dSViresh Kumar host->dma_conf.src_maxburst = 1; 2096e2b35f3dSViresh Kumar host->dma_conf.dst_addr = host->mapbase + ATMCI_TDR; 2097e2b35f3dSViresh Kumar host->dma_conf.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; 2098e2b35f3dSViresh Kumar host->dma_conf.dst_maxburst = 1; 2099e2b35f3dSViresh Kumar host->dma_conf.device_fc = false; 2100ef878198SLudovic Desroches return true; 2101ef878198SLudovic Desroches } 21022635d1baSNicolas Ferre } 2103796211b7SLudovic Desroches 2104796211b7SLudovic Desroches /* 2105796211b7SLudovic Desroches * HSMCI (High Speed MCI) module is not fully compatible with MCI module. 2106796211b7SLudovic Desroches * HSMCI provides DMA support and a new config register but no more supports 2107796211b7SLudovic Desroches * PDC. 2108796211b7SLudovic Desroches */ 2109796211b7SLudovic Desroches static void __init atmci_get_cap(struct atmel_mci *host) 2110796211b7SLudovic Desroches { 2111796211b7SLudovic Desroches unsigned int version; 2112796211b7SLudovic Desroches 2113796211b7SLudovic Desroches version = atmci_get_version(host); 2114796211b7SLudovic Desroches dev_info(&host->pdev->dev, 2115796211b7SLudovic Desroches "version: 0x%x\n", version); 2116796211b7SLudovic Desroches 2117796211b7SLudovic Desroches host->caps.has_dma = 0; 2118faf8180bSLudovic Desroches host->caps.has_pdc = 1; 2119796211b7SLudovic Desroches host->caps.has_cfg_reg = 0; 2120796211b7SLudovic Desroches host->caps.has_cstor_reg = 0; 2121796211b7SLudovic Desroches host->caps.has_highspeed = 0; 2122796211b7SLudovic Desroches host->caps.has_rwproof = 0; 2123faf8180bSLudovic Desroches host->caps.has_odd_clk_div = 0; 2124796211b7SLudovic Desroches 2125796211b7SLudovic Desroches /* keep only major version number */ 2126796211b7SLudovic Desroches switch (version & 0xf00) { 2127796211b7SLudovic Desroches case 0x500: 2128faf8180bSLudovic Desroches host->caps.has_odd_clk_div = 1; 2129faf8180bSLudovic Desroches case 0x400: 2130faf8180bSLudovic Desroches case 0x300: 2131796211b7SLudovic Desroches #ifdef CONFIG_AT_HDMAC 2132796211b7SLudovic Desroches host->caps.has_dma = 1; 21332635d1baSNicolas Ferre #else 2134796211b7SLudovic Desroches dev_info(&host->pdev->dev, 2135796211b7SLudovic Desroches "has dma capability but dma engine is not selected, then use pio\n"); 213674465b4fSDan Williams #endif 2137faf8180bSLudovic Desroches host->caps.has_pdc = 0; 2138796211b7SLudovic Desroches host->caps.has_cfg_reg = 1; 2139796211b7SLudovic Desroches host->caps.has_cstor_reg = 1; 2140796211b7SLudovic Desroches host->caps.has_highspeed = 1; 2141faf8180bSLudovic Desroches case 0x200: 2142796211b7SLudovic Desroches host->caps.has_rwproof = 1; 2143faf8180bSLudovic Desroches case 0x100: 2144796211b7SLudovic Desroches break; 2145796211b7SLudovic Desroches default: 2146faf8180bSLudovic Desroches host->caps.has_pdc = 0; 2147796211b7SLudovic Desroches dev_warn(&host->pdev->dev, 2148796211b7SLudovic Desroches "Unmanaged mci version, set minimum capabilities\n"); 2149796211b7SLudovic Desroches break; 2150796211b7SLudovic Desroches } 2151796211b7SLudovic Desroches } 215274465b4fSDan Williams 21537d2be074SHaavard Skinnemoen static int __init atmci_probe(struct platform_device *pdev) 21547d2be074SHaavard Skinnemoen { 21557d2be074SHaavard Skinnemoen struct mci_platform_data *pdata; 21567d2be074SHaavard Skinnemoen struct atmel_mci *host; 21577d2be074SHaavard Skinnemoen struct resource *regs; 2158965ebf33SHaavard Skinnemoen unsigned int nr_slots; 21597d2be074SHaavard Skinnemoen int irq; 21607d2be074SHaavard Skinnemoen int ret; 21617d2be074SHaavard Skinnemoen 21627d2be074SHaavard Skinnemoen regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); 21637d2be074SHaavard Skinnemoen if (!regs) 21647d2be074SHaavard Skinnemoen return -ENXIO; 21657d2be074SHaavard Skinnemoen pdata = pdev->dev.platform_data; 21667d2be074SHaavard Skinnemoen if (!pdata) 21677d2be074SHaavard Skinnemoen return -ENXIO; 21687d2be074SHaavard Skinnemoen irq = platform_get_irq(pdev, 0); 21697d2be074SHaavard Skinnemoen if (irq < 0) 21707d2be074SHaavard Skinnemoen return irq; 21717d2be074SHaavard Skinnemoen 2172965ebf33SHaavard Skinnemoen host = kzalloc(sizeof(struct atmel_mci), GFP_KERNEL); 2173965ebf33SHaavard Skinnemoen if (!host) 21747d2be074SHaavard Skinnemoen return -ENOMEM; 21757d2be074SHaavard Skinnemoen 21767d2be074SHaavard Skinnemoen host->pdev = pdev; 2177965ebf33SHaavard Skinnemoen spin_lock_init(&host->lock); 2178965ebf33SHaavard Skinnemoen INIT_LIST_HEAD(&host->queue); 21797d2be074SHaavard Skinnemoen 21807d2be074SHaavard Skinnemoen host->mck = clk_get(&pdev->dev, "mci_clk"); 21817d2be074SHaavard Skinnemoen if (IS_ERR(host->mck)) { 21827d2be074SHaavard Skinnemoen ret = PTR_ERR(host->mck); 21837d2be074SHaavard Skinnemoen goto err_clk_get; 21847d2be074SHaavard Skinnemoen } 21857d2be074SHaavard Skinnemoen 21867d2be074SHaavard Skinnemoen ret = -ENOMEM; 2187e8e3f6caSH Hartley Sweeten host->regs = ioremap(regs->start, resource_size(regs)); 21887d2be074SHaavard Skinnemoen if (!host->regs) 21897d2be074SHaavard Skinnemoen goto err_ioremap; 21907d2be074SHaavard Skinnemoen 21917d2be074SHaavard Skinnemoen clk_enable(host->mck); 219203fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST); 21937d2be074SHaavard Skinnemoen host->bus_hz = clk_get_rate(host->mck); 21947d2be074SHaavard Skinnemoen clk_disable(host->mck); 21957d2be074SHaavard Skinnemoen 21967d2be074SHaavard Skinnemoen host->mapbase = regs->start; 21977d2be074SHaavard Skinnemoen 2198965ebf33SHaavard Skinnemoen tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)host); 21997d2be074SHaavard Skinnemoen 220089c8aa20SKay Sievers ret = request_irq(irq, atmci_interrupt, 0, dev_name(&pdev->dev), host); 22017d2be074SHaavard Skinnemoen if (ret) 22027d2be074SHaavard Skinnemoen goto err_request_irq; 22037d2be074SHaavard Skinnemoen 2204796211b7SLudovic Desroches /* Get MCI capabilities and set operations according to it */ 2205796211b7SLudovic Desroches atmci_get_cap(host); 2206ef878198SLudovic Desroches if (host->caps.has_dma && atmci_configure_dma(host)) { 2207796211b7SLudovic Desroches host->prepare_data = &atmci_prepare_data_dma; 2208796211b7SLudovic Desroches host->submit_data = &atmci_submit_data_dma; 2209796211b7SLudovic Desroches host->stop_transfer = &atmci_stop_transfer_dma; 2210796211b7SLudovic Desroches } else if (host->caps.has_pdc) { 2211796211b7SLudovic Desroches dev_info(&pdev->dev, "using PDC\n"); 2212796211b7SLudovic Desroches host->prepare_data = &atmci_prepare_data_pdc; 2213796211b7SLudovic Desroches host->submit_data = &atmci_submit_data_pdc; 2214796211b7SLudovic Desroches host->stop_transfer = &atmci_stop_transfer_pdc; 2215796211b7SLudovic Desroches } else { 2216ef878198SLudovic Desroches dev_info(&pdev->dev, "using PIO\n"); 2217796211b7SLudovic Desroches host->prepare_data = &atmci_prepare_data; 2218796211b7SLudovic Desroches host->submit_data = &atmci_submit_data; 2219796211b7SLudovic Desroches host->stop_transfer = &atmci_stop_transfer; 2220796211b7SLudovic Desroches } 2221796211b7SLudovic Desroches 22227d2be074SHaavard Skinnemoen platform_set_drvdata(pdev, host); 22237d2be074SHaavard Skinnemoen 2224965ebf33SHaavard Skinnemoen /* We need at least one slot to succeed */ 2225965ebf33SHaavard Skinnemoen nr_slots = 0; 2226965ebf33SHaavard Skinnemoen ret = -ENODEV; 2227965ebf33SHaavard Skinnemoen if (pdata->slot[0].bus_width) { 2228965ebf33SHaavard Skinnemoen ret = atmci_init_slot(host, &pdata->slot[0], 22292c96a293SLudovic Desroches 0, ATMCI_SDCSEL_SLOT_A, ATMCI_SDIOIRQA); 22307a90dcc2SLudovic Desroches if (!ret) { 2231965ebf33SHaavard Skinnemoen nr_slots++; 22327a90dcc2SLudovic Desroches host->buf_size = host->slot[0]->mmc->max_req_size; 22337a90dcc2SLudovic Desroches } 22347d2be074SHaavard Skinnemoen } 2235965ebf33SHaavard Skinnemoen if (pdata->slot[1].bus_width) { 2236965ebf33SHaavard Skinnemoen ret = atmci_init_slot(host, &pdata->slot[1], 22372c96a293SLudovic Desroches 1, ATMCI_SDCSEL_SLOT_B, ATMCI_SDIOIRQB); 22387a90dcc2SLudovic Desroches if (!ret) { 2239965ebf33SHaavard Skinnemoen nr_slots++; 22407a90dcc2SLudovic Desroches if (host->slot[1]->mmc->max_req_size > host->buf_size) 22417a90dcc2SLudovic Desroches host->buf_size = 22427a90dcc2SLudovic Desroches host->slot[1]->mmc->max_req_size; 22437a90dcc2SLudovic Desroches } 22447d2be074SHaavard Skinnemoen } 22457d2be074SHaavard Skinnemoen 224604d699c3SRob Emanuele if (!nr_slots) { 224704d699c3SRob Emanuele dev_err(&pdev->dev, "init failed: no slot defined\n"); 2248965ebf33SHaavard Skinnemoen goto err_init_slot; 224904d699c3SRob Emanuele } 22507d2be074SHaavard Skinnemoen 22517a90dcc2SLudovic Desroches if (!host->caps.has_rwproof) { 22527a90dcc2SLudovic Desroches host->buffer = dma_alloc_coherent(&pdev->dev, host->buf_size, 22537a90dcc2SLudovic Desroches &host->buf_phys_addr, 22547a90dcc2SLudovic Desroches GFP_KERNEL); 22557a90dcc2SLudovic Desroches if (!host->buffer) { 22567a90dcc2SLudovic Desroches ret = -ENOMEM; 22577a90dcc2SLudovic Desroches dev_err(&pdev->dev, "buffer allocation failed\n"); 22587a90dcc2SLudovic Desroches goto err_init_slot; 22597a90dcc2SLudovic Desroches } 22607a90dcc2SLudovic Desroches } 22617a90dcc2SLudovic Desroches 2262965ebf33SHaavard Skinnemoen dev_info(&pdev->dev, 2263965ebf33SHaavard Skinnemoen "Atmel MCI controller at 0x%08lx irq %d, %u slots\n", 2264965ebf33SHaavard Skinnemoen host->mapbase, irq, nr_slots); 2265deec9ae3SHaavard Skinnemoen 22667d2be074SHaavard Skinnemoen return 0; 22677d2be074SHaavard Skinnemoen 2268965ebf33SHaavard Skinnemoen err_init_slot: 226974465b4fSDan Williams if (host->dma.chan) 227074465b4fSDan Williams dma_release_channel(host->dma.chan); 2271965ebf33SHaavard Skinnemoen free_irq(irq, host); 22727d2be074SHaavard Skinnemoen err_request_irq: 22737d2be074SHaavard Skinnemoen iounmap(host->regs); 22747d2be074SHaavard Skinnemoen err_ioremap: 22757d2be074SHaavard Skinnemoen clk_put(host->mck); 22767d2be074SHaavard Skinnemoen err_clk_get: 2277965ebf33SHaavard Skinnemoen kfree(host); 22787d2be074SHaavard Skinnemoen return ret; 22797d2be074SHaavard Skinnemoen } 22807d2be074SHaavard Skinnemoen 22817d2be074SHaavard Skinnemoen static int __exit atmci_remove(struct platform_device *pdev) 22827d2be074SHaavard Skinnemoen { 22837d2be074SHaavard Skinnemoen struct atmel_mci *host = platform_get_drvdata(pdev); 2284965ebf33SHaavard Skinnemoen unsigned int i; 22857d2be074SHaavard Skinnemoen 22867d2be074SHaavard Skinnemoen platform_set_drvdata(pdev, NULL); 22877d2be074SHaavard Skinnemoen 22887a90dcc2SLudovic Desroches if (host->buffer) 22897a90dcc2SLudovic Desroches dma_free_coherent(&pdev->dev, host->buf_size, 22907a90dcc2SLudovic Desroches host->buffer, host->buf_phys_addr); 22917a90dcc2SLudovic Desroches 22922c96a293SLudovic Desroches for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) { 2293965ebf33SHaavard Skinnemoen if (host->slot[i]) 2294965ebf33SHaavard Skinnemoen atmci_cleanup_slot(host->slot[i], i); 22957d2be074SHaavard Skinnemoen } 22967d2be074SHaavard Skinnemoen 22977d2be074SHaavard Skinnemoen clk_enable(host->mck); 229803fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_IDR, ~0UL); 229903fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIDIS); 230003fc9a7fSLudovic Desroches atmci_readl(host, ATMCI_SR); 23017d2be074SHaavard Skinnemoen clk_disable(host->mck); 23027d2be074SHaavard Skinnemoen 230365e8b083SHaavard Skinnemoen #ifdef CONFIG_MMC_ATMELMCI_DMA 230474465b4fSDan Williams if (host->dma.chan) 230574465b4fSDan Williams dma_release_channel(host->dma.chan); 230665e8b083SHaavard Skinnemoen #endif 230765e8b083SHaavard Skinnemoen 2308965ebf33SHaavard Skinnemoen free_irq(platform_get_irq(pdev, 0), host); 23097d2be074SHaavard Skinnemoen iounmap(host->regs); 23107d2be074SHaavard Skinnemoen 23117d2be074SHaavard Skinnemoen clk_put(host->mck); 2312965ebf33SHaavard Skinnemoen kfree(host); 23137d2be074SHaavard Skinnemoen 23147d2be074SHaavard Skinnemoen return 0; 23157d2be074SHaavard Skinnemoen } 23167d2be074SHaavard Skinnemoen 23175c2f2b9bSNicolas Ferre #ifdef CONFIG_PM 23185c2f2b9bSNicolas Ferre static int atmci_suspend(struct device *dev) 23195c2f2b9bSNicolas Ferre { 23205c2f2b9bSNicolas Ferre struct atmel_mci *host = dev_get_drvdata(dev); 23215c2f2b9bSNicolas Ferre int i; 23225c2f2b9bSNicolas Ferre 23232c96a293SLudovic Desroches for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) { 23245c2f2b9bSNicolas Ferre struct atmel_mci_slot *slot = host->slot[i]; 23255c2f2b9bSNicolas Ferre int ret; 23265c2f2b9bSNicolas Ferre 23275c2f2b9bSNicolas Ferre if (!slot) 23285c2f2b9bSNicolas Ferre continue; 23295c2f2b9bSNicolas Ferre ret = mmc_suspend_host(slot->mmc); 23305c2f2b9bSNicolas Ferre if (ret < 0) { 23315c2f2b9bSNicolas Ferre while (--i >= 0) { 23325c2f2b9bSNicolas Ferre slot = host->slot[i]; 23335c2f2b9bSNicolas Ferre if (slot 23345c2f2b9bSNicolas Ferre && test_bit(ATMCI_SUSPENDED, &slot->flags)) { 23355c2f2b9bSNicolas Ferre mmc_resume_host(host->slot[i]->mmc); 23365c2f2b9bSNicolas Ferre clear_bit(ATMCI_SUSPENDED, &slot->flags); 23375c2f2b9bSNicolas Ferre } 23385c2f2b9bSNicolas Ferre } 23395c2f2b9bSNicolas Ferre return ret; 23405c2f2b9bSNicolas Ferre } else { 23415c2f2b9bSNicolas Ferre set_bit(ATMCI_SUSPENDED, &slot->flags); 23425c2f2b9bSNicolas Ferre } 23435c2f2b9bSNicolas Ferre } 23445c2f2b9bSNicolas Ferre 23455c2f2b9bSNicolas Ferre return 0; 23465c2f2b9bSNicolas Ferre } 23475c2f2b9bSNicolas Ferre 23485c2f2b9bSNicolas Ferre static int atmci_resume(struct device *dev) 23495c2f2b9bSNicolas Ferre { 23505c2f2b9bSNicolas Ferre struct atmel_mci *host = dev_get_drvdata(dev); 23515c2f2b9bSNicolas Ferre int i; 23525c2f2b9bSNicolas Ferre int ret = 0; 23535c2f2b9bSNicolas Ferre 23542c96a293SLudovic Desroches for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) { 23555c2f2b9bSNicolas Ferre struct atmel_mci_slot *slot = host->slot[i]; 23565c2f2b9bSNicolas Ferre int err; 23575c2f2b9bSNicolas Ferre 23585c2f2b9bSNicolas Ferre slot = host->slot[i]; 23595c2f2b9bSNicolas Ferre if (!slot) 23605c2f2b9bSNicolas Ferre continue; 23615c2f2b9bSNicolas Ferre if (!test_bit(ATMCI_SUSPENDED, &slot->flags)) 23625c2f2b9bSNicolas Ferre continue; 23635c2f2b9bSNicolas Ferre err = mmc_resume_host(slot->mmc); 23645c2f2b9bSNicolas Ferre if (err < 0) 23655c2f2b9bSNicolas Ferre ret = err; 23665c2f2b9bSNicolas Ferre else 23675c2f2b9bSNicolas Ferre clear_bit(ATMCI_SUSPENDED, &slot->flags); 23685c2f2b9bSNicolas Ferre } 23695c2f2b9bSNicolas Ferre 23705c2f2b9bSNicolas Ferre return ret; 23715c2f2b9bSNicolas Ferre } 23725c2f2b9bSNicolas Ferre static SIMPLE_DEV_PM_OPS(atmci_pm, atmci_suspend, atmci_resume); 23735c2f2b9bSNicolas Ferre #define ATMCI_PM_OPS (&atmci_pm) 23745c2f2b9bSNicolas Ferre #else 23755c2f2b9bSNicolas Ferre #define ATMCI_PM_OPS NULL 23765c2f2b9bSNicolas Ferre #endif 23775c2f2b9bSNicolas Ferre 23787d2be074SHaavard Skinnemoen static struct platform_driver atmci_driver = { 23797d2be074SHaavard Skinnemoen .remove = __exit_p(atmci_remove), 23807d2be074SHaavard Skinnemoen .driver = { 23817d2be074SHaavard Skinnemoen .name = "atmel_mci", 23825c2f2b9bSNicolas Ferre .pm = ATMCI_PM_OPS, 23837d2be074SHaavard Skinnemoen }, 23847d2be074SHaavard Skinnemoen }; 23857d2be074SHaavard Skinnemoen 23867d2be074SHaavard Skinnemoen static int __init atmci_init(void) 23877d2be074SHaavard Skinnemoen { 23887d2be074SHaavard Skinnemoen return platform_driver_probe(&atmci_driver, atmci_probe); 23897d2be074SHaavard Skinnemoen } 23907d2be074SHaavard Skinnemoen 23917d2be074SHaavard Skinnemoen static void __exit atmci_exit(void) 23927d2be074SHaavard Skinnemoen { 23937d2be074SHaavard Skinnemoen platform_driver_unregister(&atmci_driver); 23947d2be074SHaavard Skinnemoen } 23957d2be074SHaavard Skinnemoen 239674465b4fSDan Williams late_initcall(atmci_init); /* try to load after dma driver when built-in */ 23977d2be074SHaavard Skinnemoen module_exit(atmci_exit); 23987d2be074SHaavard Skinnemoen 23997d2be074SHaavard Skinnemoen MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver"); 2400e05503efSJean Delvare MODULE_AUTHOR("Haavard Skinnemoen (Atmel)"); 24017d2be074SHaavard Skinnemoen MODULE_LICENSE("GPL v2"); 2402