17d2be074SHaavard Skinnemoen /* 27d2be074SHaavard Skinnemoen * Atmel MultiMedia Card Interface driver 37d2be074SHaavard Skinnemoen * 47d2be074SHaavard Skinnemoen * Copyright (C) 2004-2008 Atmel Corporation 57d2be074SHaavard Skinnemoen * 67d2be074SHaavard Skinnemoen * This program is free software; you can redistribute it and/or modify 77d2be074SHaavard Skinnemoen * it under the terms of the GNU General Public License version 2 as 87d2be074SHaavard Skinnemoen * published by the Free Software Foundation. 97d2be074SHaavard Skinnemoen */ 107d2be074SHaavard Skinnemoen #include <linux/blkdev.h> 117d2be074SHaavard Skinnemoen #include <linux/clk.h> 12deec9ae3SHaavard Skinnemoen #include <linux/debugfs.h> 137d2be074SHaavard Skinnemoen #include <linux/device.h> 1465e8b083SHaavard Skinnemoen #include <linux/dmaengine.h> 1565e8b083SHaavard Skinnemoen #include <linux/dma-mapping.h> 16fbfca4b8SBen Nizette #include <linux/err.h> 173c26e170SDavid Brownell #include <linux/gpio.h> 187d2be074SHaavard Skinnemoen #include <linux/init.h> 197d2be074SHaavard Skinnemoen #include <linux/interrupt.h> 207d2be074SHaavard Skinnemoen #include <linux/ioport.h> 217d2be074SHaavard Skinnemoen #include <linux/module.h> 22e919fd20SLudovic Desroches #include <linux/of.h> 23e919fd20SLudovic Desroches #include <linux/of_device.h> 24e919fd20SLudovic Desroches #include <linux/of_gpio.h> 257d2be074SHaavard Skinnemoen #include <linux/platform_device.h> 267d2be074SHaavard Skinnemoen #include <linux/scatterlist.h> 27deec9ae3SHaavard Skinnemoen #include <linux/seq_file.h> 285a0e3ad6STejun Heo #include <linux/slab.h> 29deec9ae3SHaavard Skinnemoen #include <linux/stat.h> 30e2b35f3dSViresh Kumar #include <linux/types.h> 317d2be074SHaavard Skinnemoen 327d2be074SHaavard Skinnemoen #include <linux/mmc/host.h> 332f1d7918SNicolas Ferre #include <linux/mmc/sdio.h> 342635d1baSNicolas Ferre 352635d1baSNicolas Ferre #include <mach/atmel-mci.h> 36c42aa775SNicolas Ferre #include <linux/atmel-mci.h> 37796211b7SLudovic Desroches #include <linux/atmel_pdc.h> 387d2be074SHaavard Skinnemoen 397d2be074SHaavard Skinnemoen #include <asm/io.h> 407d2be074SHaavard Skinnemoen #include <asm/unaligned.h> 417d2be074SHaavard Skinnemoen 4204d699c3SRob Emanuele #include <mach/cpu.h> 433663b736SHaavard Skinnemoen #include <mach/board.h> 447d2be074SHaavard Skinnemoen 457d2be074SHaavard Skinnemoen #include "atmel-mci-regs.h" 467d2be074SHaavard Skinnemoen 472c96a293SLudovic Desroches #define ATMCI_DATA_ERROR_FLAGS (ATMCI_DCRCE | ATMCI_DTOE | ATMCI_OVRE | ATMCI_UNRE) 4865e8b083SHaavard Skinnemoen #define ATMCI_DMA_THRESHOLD 16 497d2be074SHaavard Skinnemoen 507d2be074SHaavard Skinnemoen enum { 51f5177547SLudovic Desroches EVENT_CMD_RDY = 0, 527d2be074SHaavard Skinnemoen EVENT_XFER_COMPLETE, 53f5177547SLudovic Desroches EVENT_NOTBUSY, 54c06ad258SHaavard Skinnemoen EVENT_DATA_ERROR, 55c06ad258SHaavard Skinnemoen }; 56c06ad258SHaavard Skinnemoen 57c06ad258SHaavard Skinnemoen enum atmel_mci_state { 58965ebf33SHaavard Skinnemoen STATE_IDLE = 0, 59965ebf33SHaavard Skinnemoen STATE_SENDING_CMD, 60f5177547SLudovic Desroches STATE_DATA_XFER, 61f5177547SLudovic Desroches STATE_WAITING_NOTBUSY, 62c06ad258SHaavard Skinnemoen STATE_SENDING_STOP, 63f5177547SLudovic Desroches STATE_END_REQUEST, 647d2be074SHaavard Skinnemoen }; 657d2be074SHaavard Skinnemoen 66796211b7SLudovic Desroches enum atmci_xfer_dir { 67796211b7SLudovic Desroches XFER_RECEIVE = 0, 68796211b7SLudovic Desroches XFER_TRANSMIT, 69796211b7SLudovic Desroches }; 70796211b7SLudovic Desroches 71796211b7SLudovic Desroches enum atmci_pdc_buf { 72796211b7SLudovic Desroches PDC_FIRST_BUF = 0, 73796211b7SLudovic Desroches PDC_SECOND_BUF, 74796211b7SLudovic Desroches }; 75796211b7SLudovic Desroches 76796211b7SLudovic Desroches struct atmel_mci_caps { 77796211b7SLudovic Desroches bool has_dma; 78796211b7SLudovic Desroches bool has_pdc; 79796211b7SLudovic Desroches bool has_cfg_reg; 80796211b7SLudovic Desroches bool has_cstor_reg; 81796211b7SLudovic Desroches bool has_highspeed; 82796211b7SLudovic Desroches bool has_rwproof; 83faf8180bSLudovic Desroches bool has_odd_clk_div; 8424011f34SLudovic Desroches bool has_bad_data_ordering; 8524011f34SLudovic Desroches bool need_reset_after_xfer; 8624011f34SLudovic Desroches bool need_blksz_mul_4; 87077d4073SLudovic Desroches bool need_notbusy_for_read_ops; 88796211b7SLudovic Desroches }; 89796211b7SLudovic Desroches 9065e8b083SHaavard Skinnemoen struct atmel_mci_dma { 9165e8b083SHaavard Skinnemoen struct dma_chan *chan; 9265e8b083SHaavard Skinnemoen struct dma_async_tx_descriptor *data_desc; 9365e8b083SHaavard Skinnemoen }; 9465e8b083SHaavard Skinnemoen 95965ebf33SHaavard Skinnemoen /** 96965ebf33SHaavard Skinnemoen * struct atmel_mci - MMC controller state shared between all slots 97965ebf33SHaavard Skinnemoen * @lock: Spinlock protecting the queue and associated data. 98965ebf33SHaavard Skinnemoen * @regs: Pointer to MMIO registers. 99796211b7SLudovic Desroches * @sg: Scatterlist entry currently being processed by PIO or PDC code. 100965ebf33SHaavard Skinnemoen * @pio_offset: Offset into the current scatterlist entry. 1017a90dcc2SLudovic Desroches * @buffer: Buffer used if we don't have the r/w proof capability. We 1027a90dcc2SLudovic Desroches * don't have the time to switch pdc buffers so we have to use only 1037a90dcc2SLudovic Desroches * one buffer for the full transaction. 1047a90dcc2SLudovic Desroches * @buf_size: size of the buffer. 1057a90dcc2SLudovic Desroches * @phys_buf_addr: buffer address needed for pdc. 106965ebf33SHaavard Skinnemoen * @cur_slot: The slot which is currently using the controller. 107965ebf33SHaavard Skinnemoen * @mrq: The request currently being processed on @cur_slot, 108965ebf33SHaavard Skinnemoen * or NULL if the controller is idle. 109965ebf33SHaavard Skinnemoen * @cmd: The command currently being sent to the card, or NULL. 110965ebf33SHaavard Skinnemoen * @data: The data currently being transferred, or NULL if no data 111965ebf33SHaavard Skinnemoen * transfer is in progress. 112796211b7SLudovic Desroches * @data_size: just data->blocks * data->blksz. 11365e8b083SHaavard Skinnemoen * @dma: DMA client state. 11465e8b083SHaavard Skinnemoen * @data_chan: DMA channel being used for the current data transfer. 115965ebf33SHaavard Skinnemoen * @cmd_status: Snapshot of SR taken upon completion of the current 116965ebf33SHaavard Skinnemoen * command. Only valid when EVENT_CMD_COMPLETE is pending. 117965ebf33SHaavard Skinnemoen * @data_status: Snapshot of SR taken upon completion of the current 118965ebf33SHaavard Skinnemoen * data transfer. Only valid when EVENT_DATA_COMPLETE or 119965ebf33SHaavard Skinnemoen * EVENT_DATA_ERROR is pending. 120965ebf33SHaavard Skinnemoen * @stop_cmdr: Value to be loaded into CMDR when the stop command is 121965ebf33SHaavard Skinnemoen * to be sent. 122965ebf33SHaavard Skinnemoen * @tasklet: Tasklet running the request state machine. 123965ebf33SHaavard Skinnemoen * @pending_events: Bitmask of events flagged by the interrupt handler 124965ebf33SHaavard Skinnemoen * to be processed by the tasklet. 125965ebf33SHaavard Skinnemoen * @completed_events: Bitmask of events which the state machine has 126965ebf33SHaavard Skinnemoen * processed. 127965ebf33SHaavard Skinnemoen * @state: Tasklet state. 128965ebf33SHaavard Skinnemoen * @queue: List of slots waiting for access to the controller. 129965ebf33SHaavard Skinnemoen * @need_clock_update: Update the clock rate before the next request. 130965ebf33SHaavard Skinnemoen * @need_reset: Reset controller before next request. 13124011f34SLudovic Desroches * @timer: Timer to balance the data timeout error flag which cannot rise. 132965ebf33SHaavard Skinnemoen * @mode_reg: Value of the MR register. 13374791a2dSNicolas Ferre * @cfg_reg: Value of the CFG register. 134965ebf33SHaavard Skinnemoen * @bus_hz: The rate of @mck in Hz. This forms the basis for MMC bus 135965ebf33SHaavard Skinnemoen * rate and timeout calculations. 136965ebf33SHaavard Skinnemoen * @mapbase: Physical address of the MMIO registers. 137965ebf33SHaavard Skinnemoen * @mck: The peripheral bus clock hooked up to the MMC controller. 138965ebf33SHaavard Skinnemoen * @pdev: Platform device associated with the MMC controller. 139965ebf33SHaavard Skinnemoen * @slot: Slots sharing this MMC controller. 140796211b7SLudovic Desroches * @caps: MCI capabilities depending on MCI version. 141796211b7SLudovic Desroches * @prepare_data: function to setup MCI before data transfer which 142796211b7SLudovic Desroches * depends on MCI capabilities. 143796211b7SLudovic Desroches * @submit_data: function to start data transfer which depends on MCI 144796211b7SLudovic Desroches * capabilities. 145796211b7SLudovic Desroches * @stop_transfer: function to stop data transfer which depends on MCI 146796211b7SLudovic Desroches * capabilities. 147965ebf33SHaavard Skinnemoen * 148965ebf33SHaavard Skinnemoen * Locking 149965ebf33SHaavard Skinnemoen * ======= 150965ebf33SHaavard Skinnemoen * 151965ebf33SHaavard Skinnemoen * @lock is a softirq-safe spinlock protecting @queue as well as 152965ebf33SHaavard Skinnemoen * @cur_slot, @mrq and @state. These must always be updated 153965ebf33SHaavard Skinnemoen * at the same time while holding @lock. 154965ebf33SHaavard Skinnemoen * 155965ebf33SHaavard Skinnemoen * @lock also protects mode_reg and need_clock_update since these are 156965ebf33SHaavard Skinnemoen * used to synchronize mode register updates with the queue 157965ebf33SHaavard Skinnemoen * processing. 158965ebf33SHaavard Skinnemoen * 159965ebf33SHaavard Skinnemoen * The @mrq field of struct atmel_mci_slot is also protected by @lock, 160965ebf33SHaavard Skinnemoen * and must always be written at the same time as the slot is added to 161965ebf33SHaavard Skinnemoen * @queue. 162965ebf33SHaavard Skinnemoen * 163965ebf33SHaavard Skinnemoen * @pending_events and @completed_events are accessed using atomic bit 164965ebf33SHaavard Skinnemoen * operations, so they don't need any locking. 165965ebf33SHaavard Skinnemoen * 166965ebf33SHaavard Skinnemoen * None of the fields touched by the interrupt handler need any 167965ebf33SHaavard Skinnemoen * locking. However, ordering is important: Before EVENT_DATA_ERROR or 168965ebf33SHaavard Skinnemoen * EVENT_DATA_COMPLETE is set in @pending_events, all data-related 169965ebf33SHaavard Skinnemoen * interrupts must be disabled and @data_status updated with a 170965ebf33SHaavard Skinnemoen * snapshot of SR. Similarly, before EVENT_CMD_COMPLETE is set, the 17125985edcSLucas De Marchi * CMDRDY interrupt must be disabled and @cmd_status updated with a 172965ebf33SHaavard Skinnemoen * snapshot of SR, and before EVENT_XFER_COMPLETE can be set, the 173965ebf33SHaavard Skinnemoen * bytes_xfered field of @data must be written. This is ensured by 174965ebf33SHaavard Skinnemoen * using barriers. 175965ebf33SHaavard Skinnemoen */ 1767d2be074SHaavard Skinnemoen struct atmel_mci { 177965ebf33SHaavard Skinnemoen spinlock_t lock; 1787d2be074SHaavard Skinnemoen void __iomem *regs; 1797d2be074SHaavard Skinnemoen 1807d2be074SHaavard Skinnemoen struct scatterlist *sg; 1817d2be074SHaavard Skinnemoen unsigned int pio_offset; 1827a90dcc2SLudovic Desroches unsigned int *buffer; 1837a90dcc2SLudovic Desroches unsigned int buf_size; 1847a90dcc2SLudovic Desroches dma_addr_t buf_phys_addr; 1857d2be074SHaavard Skinnemoen 186965ebf33SHaavard Skinnemoen struct atmel_mci_slot *cur_slot; 1877d2be074SHaavard Skinnemoen struct mmc_request *mrq; 1887d2be074SHaavard Skinnemoen struct mmc_command *cmd; 1897d2be074SHaavard Skinnemoen struct mmc_data *data; 190796211b7SLudovic Desroches unsigned int data_size; 1917d2be074SHaavard Skinnemoen 19265e8b083SHaavard Skinnemoen struct atmel_mci_dma dma; 19365e8b083SHaavard Skinnemoen struct dma_chan *data_chan; 194e2b35f3dSViresh Kumar struct dma_slave_config dma_conf; 19565e8b083SHaavard Skinnemoen 1967d2be074SHaavard Skinnemoen u32 cmd_status; 1977d2be074SHaavard Skinnemoen u32 data_status; 1987d2be074SHaavard Skinnemoen u32 stop_cmdr; 1997d2be074SHaavard Skinnemoen 2007d2be074SHaavard Skinnemoen struct tasklet_struct tasklet; 2017d2be074SHaavard Skinnemoen unsigned long pending_events; 2027d2be074SHaavard Skinnemoen unsigned long completed_events; 203c06ad258SHaavard Skinnemoen enum atmel_mci_state state; 204965ebf33SHaavard Skinnemoen struct list_head queue; 2057d2be074SHaavard Skinnemoen 206965ebf33SHaavard Skinnemoen bool need_clock_update; 207965ebf33SHaavard Skinnemoen bool need_reset; 20824011f34SLudovic Desroches struct timer_list timer; 209965ebf33SHaavard Skinnemoen u32 mode_reg; 21074791a2dSNicolas Ferre u32 cfg_reg; 2117d2be074SHaavard Skinnemoen unsigned long bus_hz; 2127d2be074SHaavard Skinnemoen unsigned long mapbase; 2137d2be074SHaavard Skinnemoen struct clk *mck; 2147d2be074SHaavard Skinnemoen struct platform_device *pdev; 215965ebf33SHaavard Skinnemoen 2162c96a293SLudovic Desroches struct atmel_mci_slot *slot[ATMCI_MAX_NR_SLOTS]; 217796211b7SLudovic Desroches 218796211b7SLudovic Desroches struct atmel_mci_caps caps; 219796211b7SLudovic Desroches 220796211b7SLudovic Desroches u32 (*prepare_data)(struct atmel_mci *host, struct mmc_data *data); 221796211b7SLudovic Desroches void (*submit_data)(struct atmel_mci *host, struct mmc_data *data); 222796211b7SLudovic Desroches void (*stop_transfer)(struct atmel_mci *host); 223965ebf33SHaavard Skinnemoen }; 224965ebf33SHaavard Skinnemoen 225965ebf33SHaavard Skinnemoen /** 226965ebf33SHaavard Skinnemoen * struct atmel_mci_slot - MMC slot state 227965ebf33SHaavard Skinnemoen * @mmc: The mmc_host representing this slot. 228965ebf33SHaavard Skinnemoen * @host: The MMC controller this slot is using. 229965ebf33SHaavard Skinnemoen * @sdc_reg: Value of SDCR to be written before using this slot. 23088ff82edSAnders Grahn * @sdio_irq: SDIO irq mask for this slot. 231965ebf33SHaavard Skinnemoen * @mrq: mmc_request currently being processed or waiting to be 232965ebf33SHaavard Skinnemoen * processed, or NULL when the slot is idle. 233965ebf33SHaavard Skinnemoen * @queue_node: List node for placing this node in the @queue list of 234965ebf33SHaavard Skinnemoen * &struct atmel_mci. 235965ebf33SHaavard Skinnemoen * @clock: Clock rate configured by set_ios(). Protected by host->lock. 236965ebf33SHaavard Skinnemoen * @flags: Random state bits associated with the slot. 237965ebf33SHaavard Skinnemoen * @detect_pin: GPIO pin used for card detection, or negative if not 238965ebf33SHaavard Skinnemoen * available. 239965ebf33SHaavard Skinnemoen * @wp_pin: GPIO pin used for card write protect sending, or negative 240965ebf33SHaavard Skinnemoen * if not available. 2411c1452beSJonas Larsson * @detect_is_active_high: The state of the detect pin when it is active. 242965ebf33SHaavard Skinnemoen * @detect_timer: Timer used for debouncing @detect_pin interrupts. 243965ebf33SHaavard Skinnemoen */ 244965ebf33SHaavard Skinnemoen struct atmel_mci_slot { 245965ebf33SHaavard Skinnemoen struct mmc_host *mmc; 246965ebf33SHaavard Skinnemoen struct atmel_mci *host; 247965ebf33SHaavard Skinnemoen 248965ebf33SHaavard Skinnemoen u32 sdc_reg; 24988ff82edSAnders Grahn u32 sdio_irq; 250965ebf33SHaavard Skinnemoen 251965ebf33SHaavard Skinnemoen struct mmc_request *mrq; 252965ebf33SHaavard Skinnemoen struct list_head queue_node; 253965ebf33SHaavard Skinnemoen 254965ebf33SHaavard Skinnemoen unsigned int clock; 255965ebf33SHaavard Skinnemoen unsigned long flags; 256965ebf33SHaavard Skinnemoen #define ATMCI_CARD_PRESENT 0 257965ebf33SHaavard Skinnemoen #define ATMCI_CARD_NEED_INIT 1 258965ebf33SHaavard Skinnemoen #define ATMCI_SHUTDOWN 2 2595c2f2b9bSNicolas Ferre #define ATMCI_SUSPENDED 3 260965ebf33SHaavard Skinnemoen 261965ebf33SHaavard Skinnemoen int detect_pin; 262965ebf33SHaavard Skinnemoen int wp_pin; 2631c1452beSJonas Larsson bool detect_is_active_high; 264965ebf33SHaavard Skinnemoen 265965ebf33SHaavard Skinnemoen struct timer_list detect_timer; 2667d2be074SHaavard Skinnemoen }; 2677d2be074SHaavard Skinnemoen 2687d2be074SHaavard Skinnemoen #define atmci_test_and_clear_pending(host, event) \ 2697d2be074SHaavard Skinnemoen test_and_clear_bit(event, &host->pending_events) 2707d2be074SHaavard Skinnemoen #define atmci_set_completed(host, event) \ 2717d2be074SHaavard Skinnemoen set_bit(event, &host->completed_events) 2727d2be074SHaavard Skinnemoen #define atmci_set_pending(host, event) \ 2737d2be074SHaavard Skinnemoen set_bit(event, &host->pending_events) 2747d2be074SHaavard Skinnemoen 275deec9ae3SHaavard Skinnemoen /* 276deec9ae3SHaavard Skinnemoen * The debugfs stuff below is mostly optimized away when 277deec9ae3SHaavard Skinnemoen * CONFIG_DEBUG_FS is not set. 278deec9ae3SHaavard Skinnemoen */ 279deec9ae3SHaavard Skinnemoen static int atmci_req_show(struct seq_file *s, void *v) 280deec9ae3SHaavard Skinnemoen { 281965ebf33SHaavard Skinnemoen struct atmel_mci_slot *slot = s->private; 282965ebf33SHaavard Skinnemoen struct mmc_request *mrq; 283deec9ae3SHaavard Skinnemoen struct mmc_command *cmd; 284deec9ae3SHaavard Skinnemoen struct mmc_command *stop; 285deec9ae3SHaavard Skinnemoen struct mmc_data *data; 286deec9ae3SHaavard Skinnemoen 287deec9ae3SHaavard Skinnemoen /* Make sure we get a consistent snapshot */ 288965ebf33SHaavard Skinnemoen spin_lock_bh(&slot->host->lock); 289965ebf33SHaavard Skinnemoen mrq = slot->mrq; 290deec9ae3SHaavard Skinnemoen 291deec9ae3SHaavard Skinnemoen if (mrq) { 292deec9ae3SHaavard Skinnemoen cmd = mrq->cmd; 293deec9ae3SHaavard Skinnemoen data = mrq->data; 294deec9ae3SHaavard Skinnemoen stop = mrq->stop; 295deec9ae3SHaavard Skinnemoen 296deec9ae3SHaavard Skinnemoen if (cmd) 297deec9ae3SHaavard Skinnemoen seq_printf(s, 298deec9ae3SHaavard Skinnemoen "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n", 299deec9ae3SHaavard Skinnemoen cmd->opcode, cmd->arg, cmd->flags, 300deec9ae3SHaavard Skinnemoen cmd->resp[0], cmd->resp[1], cmd->resp[2], 301d586ebbbSNicolas Ferre cmd->resp[3], cmd->error); 302deec9ae3SHaavard Skinnemoen if (data) 303deec9ae3SHaavard Skinnemoen seq_printf(s, "DATA %u / %u * %u flg %x err %d\n", 304deec9ae3SHaavard Skinnemoen data->bytes_xfered, data->blocks, 305deec9ae3SHaavard Skinnemoen data->blksz, data->flags, data->error); 306deec9ae3SHaavard Skinnemoen if (stop) 307deec9ae3SHaavard Skinnemoen seq_printf(s, 308deec9ae3SHaavard Skinnemoen "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n", 309deec9ae3SHaavard Skinnemoen stop->opcode, stop->arg, stop->flags, 310deec9ae3SHaavard Skinnemoen stop->resp[0], stop->resp[1], stop->resp[2], 311d586ebbbSNicolas Ferre stop->resp[3], stop->error); 312deec9ae3SHaavard Skinnemoen } 313deec9ae3SHaavard Skinnemoen 314965ebf33SHaavard Skinnemoen spin_unlock_bh(&slot->host->lock); 315deec9ae3SHaavard Skinnemoen 316deec9ae3SHaavard Skinnemoen return 0; 317deec9ae3SHaavard Skinnemoen } 318deec9ae3SHaavard Skinnemoen 319deec9ae3SHaavard Skinnemoen static int atmci_req_open(struct inode *inode, struct file *file) 320deec9ae3SHaavard Skinnemoen { 321deec9ae3SHaavard Skinnemoen return single_open(file, atmci_req_show, inode->i_private); 322deec9ae3SHaavard Skinnemoen } 323deec9ae3SHaavard Skinnemoen 324deec9ae3SHaavard Skinnemoen static const struct file_operations atmci_req_fops = { 325deec9ae3SHaavard Skinnemoen .owner = THIS_MODULE, 326deec9ae3SHaavard Skinnemoen .open = atmci_req_open, 327deec9ae3SHaavard Skinnemoen .read = seq_read, 328deec9ae3SHaavard Skinnemoen .llseek = seq_lseek, 329deec9ae3SHaavard Skinnemoen .release = single_release, 330deec9ae3SHaavard Skinnemoen }; 331deec9ae3SHaavard Skinnemoen 332deec9ae3SHaavard Skinnemoen static void atmci_show_status_reg(struct seq_file *s, 333deec9ae3SHaavard Skinnemoen const char *regname, u32 value) 334deec9ae3SHaavard Skinnemoen { 335deec9ae3SHaavard Skinnemoen static const char *sr_bit[] = { 336deec9ae3SHaavard Skinnemoen [0] = "CMDRDY", 337deec9ae3SHaavard Skinnemoen [1] = "RXRDY", 338deec9ae3SHaavard Skinnemoen [2] = "TXRDY", 339deec9ae3SHaavard Skinnemoen [3] = "BLKE", 340deec9ae3SHaavard Skinnemoen [4] = "DTIP", 341deec9ae3SHaavard Skinnemoen [5] = "NOTBUSY", 34204d699c3SRob Emanuele [6] = "ENDRX", 34304d699c3SRob Emanuele [7] = "ENDTX", 344deec9ae3SHaavard Skinnemoen [8] = "SDIOIRQA", 345deec9ae3SHaavard Skinnemoen [9] = "SDIOIRQB", 34604d699c3SRob Emanuele [12] = "SDIOWAIT", 34704d699c3SRob Emanuele [14] = "RXBUFF", 34804d699c3SRob Emanuele [15] = "TXBUFE", 349deec9ae3SHaavard Skinnemoen [16] = "RINDE", 350deec9ae3SHaavard Skinnemoen [17] = "RDIRE", 351deec9ae3SHaavard Skinnemoen [18] = "RCRCE", 352deec9ae3SHaavard Skinnemoen [19] = "RENDE", 353deec9ae3SHaavard Skinnemoen [20] = "RTOE", 354deec9ae3SHaavard Skinnemoen [21] = "DCRCE", 355deec9ae3SHaavard Skinnemoen [22] = "DTOE", 35604d699c3SRob Emanuele [23] = "CSTOE", 35704d699c3SRob Emanuele [24] = "BLKOVRE", 35804d699c3SRob Emanuele [25] = "DMADONE", 35904d699c3SRob Emanuele [26] = "FIFOEMPTY", 36004d699c3SRob Emanuele [27] = "XFRDONE", 361deec9ae3SHaavard Skinnemoen [30] = "OVRE", 362deec9ae3SHaavard Skinnemoen [31] = "UNRE", 363deec9ae3SHaavard Skinnemoen }; 364deec9ae3SHaavard Skinnemoen unsigned int i; 365deec9ae3SHaavard Skinnemoen 366deec9ae3SHaavard Skinnemoen seq_printf(s, "%s:\t0x%08x", regname, value); 367deec9ae3SHaavard Skinnemoen for (i = 0; i < ARRAY_SIZE(sr_bit); i++) { 368deec9ae3SHaavard Skinnemoen if (value & (1 << i)) { 369deec9ae3SHaavard Skinnemoen if (sr_bit[i]) 370deec9ae3SHaavard Skinnemoen seq_printf(s, " %s", sr_bit[i]); 371deec9ae3SHaavard Skinnemoen else 372deec9ae3SHaavard Skinnemoen seq_puts(s, " UNKNOWN"); 373deec9ae3SHaavard Skinnemoen } 374deec9ae3SHaavard Skinnemoen } 375deec9ae3SHaavard Skinnemoen seq_putc(s, '\n'); 376deec9ae3SHaavard Skinnemoen } 377deec9ae3SHaavard Skinnemoen 378deec9ae3SHaavard Skinnemoen static int atmci_regs_show(struct seq_file *s, void *v) 379deec9ae3SHaavard Skinnemoen { 380deec9ae3SHaavard Skinnemoen struct atmel_mci *host = s->private; 381deec9ae3SHaavard Skinnemoen u32 *buf; 382deec9ae3SHaavard Skinnemoen 3832c96a293SLudovic Desroches buf = kmalloc(ATMCI_REGS_SIZE, GFP_KERNEL); 384deec9ae3SHaavard Skinnemoen if (!buf) 385deec9ae3SHaavard Skinnemoen return -ENOMEM; 386deec9ae3SHaavard Skinnemoen 387965ebf33SHaavard Skinnemoen /* 388965ebf33SHaavard Skinnemoen * Grab a more or less consistent snapshot. Note that we're 389965ebf33SHaavard Skinnemoen * not disabling interrupts, so IMR and SR may not be 390965ebf33SHaavard Skinnemoen * consistent. 391965ebf33SHaavard Skinnemoen */ 392965ebf33SHaavard Skinnemoen spin_lock_bh(&host->lock); 39387e60f2bSHaavard Skinnemoen clk_enable(host->mck); 3942c96a293SLudovic Desroches memcpy_fromio(buf, host->regs, ATMCI_REGS_SIZE); 39587e60f2bSHaavard Skinnemoen clk_disable(host->mck); 396965ebf33SHaavard Skinnemoen spin_unlock_bh(&host->lock); 397deec9ae3SHaavard Skinnemoen 3988a4de07eSNicolas Ferre seq_printf(s, "MR:\t0x%08x%s%s ", 3992c96a293SLudovic Desroches buf[ATMCI_MR / 4], 4002c96a293SLudovic Desroches buf[ATMCI_MR / 4] & ATMCI_MR_RDPROOF ? " RDPROOF" : "", 4018a4de07eSNicolas Ferre buf[ATMCI_MR / 4] & ATMCI_MR_WRPROOF ? " WRPROOF" : ""); 4028a4de07eSNicolas Ferre if (host->caps.has_odd_clk_div) 4038a4de07eSNicolas Ferre seq_printf(s, "{CLKDIV,CLKODD}=%u\n", 4048a4de07eSNicolas Ferre ((buf[ATMCI_MR / 4] & 0xff) << 1) 4058a4de07eSNicolas Ferre | ((buf[ATMCI_MR / 4] >> 16) & 1)); 4068a4de07eSNicolas Ferre else 4078a4de07eSNicolas Ferre seq_printf(s, "CLKDIV=%u\n", 4088a4de07eSNicolas Ferre (buf[ATMCI_MR / 4] & 0xff)); 4092c96a293SLudovic Desroches seq_printf(s, "DTOR:\t0x%08x\n", buf[ATMCI_DTOR / 4]); 4102c96a293SLudovic Desroches seq_printf(s, "SDCR:\t0x%08x\n", buf[ATMCI_SDCR / 4]); 4112c96a293SLudovic Desroches seq_printf(s, "ARGR:\t0x%08x\n", buf[ATMCI_ARGR / 4]); 412deec9ae3SHaavard Skinnemoen seq_printf(s, "BLKR:\t0x%08x BCNT=%u BLKLEN=%u\n", 4132c96a293SLudovic Desroches buf[ATMCI_BLKR / 4], 4142c96a293SLudovic Desroches buf[ATMCI_BLKR / 4] & 0xffff, 4152c96a293SLudovic Desroches (buf[ATMCI_BLKR / 4] >> 16) & 0xffff); 416796211b7SLudovic Desroches if (host->caps.has_cstor_reg) 4172c96a293SLudovic Desroches seq_printf(s, "CSTOR:\t0x%08x\n", buf[ATMCI_CSTOR / 4]); 418deec9ae3SHaavard Skinnemoen 419deec9ae3SHaavard Skinnemoen /* Don't read RSPR and RDR; it will consume the data there */ 420deec9ae3SHaavard Skinnemoen 4212c96a293SLudovic Desroches atmci_show_status_reg(s, "SR", buf[ATMCI_SR / 4]); 4222c96a293SLudovic Desroches atmci_show_status_reg(s, "IMR", buf[ATMCI_IMR / 4]); 423deec9ae3SHaavard Skinnemoen 424796211b7SLudovic Desroches if (host->caps.has_dma) { 42574791a2dSNicolas Ferre u32 val; 42674791a2dSNicolas Ferre 4272c96a293SLudovic Desroches val = buf[ATMCI_DMA / 4]; 42874791a2dSNicolas Ferre seq_printf(s, "DMA:\t0x%08x OFFSET=%u CHKSIZE=%u%s\n", 42974791a2dSNicolas Ferre val, val & 3, 43074791a2dSNicolas Ferre ((val >> 4) & 3) ? 43174791a2dSNicolas Ferre 1 << (((val >> 4) & 3) + 1) : 1, 4322c96a293SLudovic Desroches val & ATMCI_DMAEN ? " DMAEN" : ""); 433796211b7SLudovic Desroches } 434796211b7SLudovic Desroches if (host->caps.has_cfg_reg) { 435796211b7SLudovic Desroches u32 val; 43674791a2dSNicolas Ferre 4372c96a293SLudovic Desroches val = buf[ATMCI_CFG / 4]; 43874791a2dSNicolas Ferre seq_printf(s, "CFG:\t0x%08x%s%s%s%s\n", 43974791a2dSNicolas Ferre val, 4402c96a293SLudovic Desroches val & ATMCI_CFG_FIFOMODE_1DATA ? " FIFOMODE_ONE_DATA" : "", 4412c96a293SLudovic Desroches val & ATMCI_CFG_FERRCTRL_COR ? " FERRCTRL_CLEAR_ON_READ" : "", 4422c96a293SLudovic Desroches val & ATMCI_CFG_HSMODE ? " HSMODE" : "", 4432c96a293SLudovic Desroches val & ATMCI_CFG_LSYNC ? " LSYNC" : ""); 44474791a2dSNicolas Ferre } 44574791a2dSNicolas Ferre 446b17339a1SHaavard Skinnemoen kfree(buf); 447b17339a1SHaavard Skinnemoen 448deec9ae3SHaavard Skinnemoen return 0; 449deec9ae3SHaavard Skinnemoen } 450deec9ae3SHaavard Skinnemoen 451deec9ae3SHaavard Skinnemoen static int atmci_regs_open(struct inode *inode, struct file *file) 452deec9ae3SHaavard Skinnemoen { 453deec9ae3SHaavard Skinnemoen return single_open(file, atmci_regs_show, inode->i_private); 454deec9ae3SHaavard Skinnemoen } 455deec9ae3SHaavard Skinnemoen 456deec9ae3SHaavard Skinnemoen static const struct file_operations atmci_regs_fops = { 457deec9ae3SHaavard Skinnemoen .owner = THIS_MODULE, 458deec9ae3SHaavard Skinnemoen .open = atmci_regs_open, 459deec9ae3SHaavard Skinnemoen .read = seq_read, 460deec9ae3SHaavard Skinnemoen .llseek = seq_lseek, 461deec9ae3SHaavard Skinnemoen .release = single_release, 462deec9ae3SHaavard Skinnemoen }; 463deec9ae3SHaavard Skinnemoen 464965ebf33SHaavard Skinnemoen static void atmci_init_debugfs(struct atmel_mci_slot *slot) 465deec9ae3SHaavard Skinnemoen { 466965ebf33SHaavard Skinnemoen struct mmc_host *mmc = slot->mmc; 467965ebf33SHaavard Skinnemoen struct atmel_mci *host = slot->host; 468deec9ae3SHaavard Skinnemoen struct dentry *root; 469deec9ae3SHaavard Skinnemoen struct dentry *node; 470deec9ae3SHaavard Skinnemoen 471deec9ae3SHaavard Skinnemoen root = mmc->debugfs_root; 472deec9ae3SHaavard Skinnemoen if (!root) 473deec9ae3SHaavard Skinnemoen return; 474deec9ae3SHaavard Skinnemoen 475deec9ae3SHaavard Skinnemoen node = debugfs_create_file("regs", S_IRUSR, root, host, 476deec9ae3SHaavard Skinnemoen &atmci_regs_fops); 477deec9ae3SHaavard Skinnemoen if (IS_ERR(node)) 478deec9ae3SHaavard Skinnemoen return; 479deec9ae3SHaavard Skinnemoen if (!node) 480deec9ae3SHaavard Skinnemoen goto err; 481deec9ae3SHaavard Skinnemoen 482965ebf33SHaavard Skinnemoen node = debugfs_create_file("req", S_IRUSR, root, slot, &atmci_req_fops); 483deec9ae3SHaavard Skinnemoen if (!node) 484deec9ae3SHaavard Skinnemoen goto err; 485deec9ae3SHaavard Skinnemoen 486c06ad258SHaavard Skinnemoen node = debugfs_create_u32("state", S_IRUSR, root, (u32 *)&host->state); 487c06ad258SHaavard Skinnemoen if (!node) 488c06ad258SHaavard Skinnemoen goto err; 489c06ad258SHaavard Skinnemoen 490deec9ae3SHaavard Skinnemoen node = debugfs_create_x32("pending_events", S_IRUSR, root, 491deec9ae3SHaavard Skinnemoen (u32 *)&host->pending_events); 492deec9ae3SHaavard Skinnemoen if (!node) 493deec9ae3SHaavard Skinnemoen goto err; 494deec9ae3SHaavard Skinnemoen 495deec9ae3SHaavard Skinnemoen node = debugfs_create_x32("completed_events", S_IRUSR, root, 496deec9ae3SHaavard Skinnemoen (u32 *)&host->completed_events); 497deec9ae3SHaavard Skinnemoen if (!node) 498deec9ae3SHaavard Skinnemoen goto err; 499deec9ae3SHaavard Skinnemoen 500deec9ae3SHaavard Skinnemoen return; 501deec9ae3SHaavard Skinnemoen 502deec9ae3SHaavard Skinnemoen err: 503965ebf33SHaavard Skinnemoen dev_err(&mmc->class_dev, "failed to initialize debugfs for slot\n"); 504deec9ae3SHaavard Skinnemoen } 5057d2be074SHaavard Skinnemoen 506e919fd20SLudovic Desroches #if defined(CONFIG_OF) 507e919fd20SLudovic Desroches static const struct of_device_id atmci_dt_ids[] = { 508e919fd20SLudovic Desroches { .compatible = "atmel,hsmci" }, 509e919fd20SLudovic Desroches { /* sentinel */ } 510e919fd20SLudovic Desroches }; 511e919fd20SLudovic Desroches 512e919fd20SLudovic Desroches MODULE_DEVICE_TABLE(of, atmci_dt_ids); 513e919fd20SLudovic Desroches 514e919fd20SLudovic Desroches static struct mci_platform_data __devinit* 515e919fd20SLudovic Desroches atmci_of_init(struct platform_device *pdev) 516e919fd20SLudovic Desroches { 517e919fd20SLudovic Desroches struct device_node *np = pdev->dev.of_node; 518e919fd20SLudovic Desroches struct device_node *cnp; 519e919fd20SLudovic Desroches struct mci_platform_data *pdata; 520e919fd20SLudovic Desroches u32 slot_id; 521e919fd20SLudovic Desroches 522e919fd20SLudovic Desroches if (!np) { 523e919fd20SLudovic Desroches dev_err(&pdev->dev, "device node not found\n"); 524e919fd20SLudovic Desroches return ERR_PTR(-EINVAL); 525e919fd20SLudovic Desroches } 526e919fd20SLudovic Desroches 527e919fd20SLudovic Desroches pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); 528e919fd20SLudovic Desroches if (!pdata) { 529e919fd20SLudovic Desroches dev_err(&pdev->dev, "could not allocate memory for pdata\n"); 530e919fd20SLudovic Desroches return ERR_PTR(-ENOMEM); 531e919fd20SLudovic Desroches } 532e919fd20SLudovic Desroches 533e919fd20SLudovic Desroches for_each_child_of_node(np, cnp) { 534e919fd20SLudovic Desroches if (of_property_read_u32(cnp, "reg", &slot_id)) { 535e919fd20SLudovic Desroches dev_warn(&pdev->dev, "reg property is missing for %s\n", 536e919fd20SLudovic Desroches cnp->full_name); 537e919fd20SLudovic Desroches continue; 538e919fd20SLudovic Desroches } 539e919fd20SLudovic Desroches 540e919fd20SLudovic Desroches if (slot_id >= ATMCI_MAX_NR_SLOTS) { 541e919fd20SLudovic Desroches dev_warn(&pdev->dev, "can't have more than %d slots\n", 542e919fd20SLudovic Desroches ATMCI_MAX_NR_SLOTS); 543e919fd20SLudovic Desroches break; 544e919fd20SLudovic Desroches } 545e919fd20SLudovic Desroches 546e919fd20SLudovic Desroches if (of_property_read_u32(cnp, "bus-width", 547e919fd20SLudovic Desroches &pdata->slot[slot_id].bus_width)) 548e919fd20SLudovic Desroches pdata->slot[slot_id].bus_width = 1; 549e919fd20SLudovic Desroches 550e919fd20SLudovic Desroches pdata->slot[slot_id].detect_pin = 551e919fd20SLudovic Desroches of_get_named_gpio(cnp, "cd-gpios", 0); 552e919fd20SLudovic Desroches 553e919fd20SLudovic Desroches pdata->slot[slot_id].detect_is_active_high = 554e919fd20SLudovic Desroches of_property_read_bool(cnp, "cd-inverted"); 555e919fd20SLudovic Desroches 556e919fd20SLudovic Desroches pdata->slot[slot_id].wp_pin = 557e919fd20SLudovic Desroches of_get_named_gpio(cnp, "wp-gpios", 0); 558e919fd20SLudovic Desroches } 559e919fd20SLudovic Desroches 560e919fd20SLudovic Desroches return pdata; 561e919fd20SLudovic Desroches } 562e919fd20SLudovic Desroches #else /* CONFIG_OF */ 563e919fd20SLudovic Desroches static inline struct mci_platform_data* 564e919fd20SLudovic Desroches atmci_of_init(struct platform_device *dev) 565e919fd20SLudovic Desroches { 566e919fd20SLudovic Desroches return ERR_PTR(-EINVAL); 567e919fd20SLudovic Desroches } 568e919fd20SLudovic Desroches #endif 569e919fd20SLudovic Desroches 5707a90dcc2SLudovic Desroches static inline unsigned int atmci_get_version(struct atmel_mci *host) 5717a90dcc2SLudovic Desroches { 5727a90dcc2SLudovic Desroches return atmci_readl(host, ATMCI_VERSION) & 0x00000fff; 5737a90dcc2SLudovic Desroches } 5747a90dcc2SLudovic Desroches 57524011f34SLudovic Desroches static void atmci_timeout_timer(unsigned long data) 57624011f34SLudovic Desroches { 57724011f34SLudovic Desroches struct atmel_mci *host; 57824011f34SLudovic Desroches 57924011f34SLudovic Desroches host = (struct atmel_mci *)data; 58024011f34SLudovic Desroches 58124011f34SLudovic Desroches dev_dbg(&host->pdev->dev, "software timeout\n"); 58224011f34SLudovic Desroches 58324011f34SLudovic Desroches if (host->mrq->cmd->data) { 58424011f34SLudovic Desroches host->mrq->cmd->data->error = -ETIMEDOUT; 58524011f34SLudovic Desroches host->data = NULL; 58624011f34SLudovic Desroches } else { 58724011f34SLudovic Desroches host->mrq->cmd->error = -ETIMEDOUT; 58824011f34SLudovic Desroches host->cmd = NULL; 58924011f34SLudovic Desroches } 59024011f34SLudovic Desroches host->need_reset = 1; 59124011f34SLudovic Desroches host->state = STATE_END_REQUEST; 59224011f34SLudovic Desroches smp_wmb(); 59324011f34SLudovic Desroches tasklet_schedule(&host->tasklet); 59424011f34SLudovic Desroches } 59524011f34SLudovic Desroches 5962c96a293SLudovic Desroches static inline unsigned int atmci_ns_to_clocks(struct atmel_mci *host, 5977d2be074SHaavard Skinnemoen unsigned int ns) 5987d2be074SHaavard Skinnemoen { 59966292ad9SLudovic Desroches /* 60066292ad9SLudovic Desroches * It is easier here to use us instead of ns for the timeout, 60166292ad9SLudovic Desroches * it prevents from overflows during calculation. 60266292ad9SLudovic Desroches */ 60366292ad9SLudovic Desroches unsigned int us = DIV_ROUND_UP(ns, 1000); 60466292ad9SLudovic Desroches 60566292ad9SLudovic Desroches /* Maximum clock frequency is host->bus_hz/2 */ 60666292ad9SLudovic Desroches return us * (DIV_ROUND_UP(host->bus_hz, 2000000)); 6077d2be074SHaavard Skinnemoen } 6087d2be074SHaavard Skinnemoen 6097d2be074SHaavard Skinnemoen static void atmci_set_timeout(struct atmel_mci *host, 610965ebf33SHaavard Skinnemoen struct atmel_mci_slot *slot, struct mmc_data *data) 6117d2be074SHaavard Skinnemoen { 6127d2be074SHaavard Skinnemoen static unsigned dtomul_to_shift[] = { 6137d2be074SHaavard Skinnemoen 0, 4, 7, 8, 10, 12, 16, 20 6147d2be074SHaavard Skinnemoen }; 6157d2be074SHaavard Skinnemoen unsigned timeout; 6167d2be074SHaavard Skinnemoen unsigned dtocyc; 6177d2be074SHaavard Skinnemoen unsigned dtomul; 6187d2be074SHaavard Skinnemoen 6192c96a293SLudovic Desroches timeout = atmci_ns_to_clocks(host, data->timeout_ns) 6202c96a293SLudovic Desroches + data->timeout_clks; 6217d2be074SHaavard Skinnemoen 6227d2be074SHaavard Skinnemoen for (dtomul = 0; dtomul < 8; dtomul++) { 6237d2be074SHaavard Skinnemoen unsigned shift = dtomul_to_shift[dtomul]; 6247d2be074SHaavard Skinnemoen dtocyc = (timeout + (1 << shift) - 1) >> shift; 6257d2be074SHaavard Skinnemoen if (dtocyc < 15) 6267d2be074SHaavard Skinnemoen break; 6277d2be074SHaavard Skinnemoen } 6287d2be074SHaavard Skinnemoen 6297d2be074SHaavard Skinnemoen if (dtomul >= 8) { 6307d2be074SHaavard Skinnemoen dtomul = 7; 6317d2be074SHaavard Skinnemoen dtocyc = 15; 6327d2be074SHaavard Skinnemoen } 6337d2be074SHaavard Skinnemoen 634965ebf33SHaavard Skinnemoen dev_vdbg(&slot->mmc->class_dev, "setting timeout to %u cycles\n", 6357d2be074SHaavard Skinnemoen dtocyc << dtomul_to_shift[dtomul]); 63603fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_DTOR, (ATMCI_DTOMUL(dtomul) | ATMCI_DTOCYC(dtocyc))); 6377d2be074SHaavard Skinnemoen } 6387d2be074SHaavard Skinnemoen 6397d2be074SHaavard Skinnemoen /* 6407d2be074SHaavard Skinnemoen * Return mask with command flags to be enabled for this command. 6417d2be074SHaavard Skinnemoen */ 6427d2be074SHaavard Skinnemoen static u32 atmci_prepare_command(struct mmc_host *mmc, 6437d2be074SHaavard Skinnemoen struct mmc_command *cmd) 6447d2be074SHaavard Skinnemoen { 6457d2be074SHaavard Skinnemoen struct mmc_data *data; 6467d2be074SHaavard Skinnemoen u32 cmdr; 6477d2be074SHaavard Skinnemoen 6487d2be074SHaavard Skinnemoen cmd->error = -EINPROGRESS; 6497d2be074SHaavard Skinnemoen 6502c96a293SLudovic Desroches cmdr = ATMCI_CMDR_CMDNB(cmd->opcode); 6517d2be074SHaavard Skinnemoen 6527d2be074SHaavard Skinnemoen if (cmd->flags & MMC_RSP_PRESENT) { 6537d2be074SHaavard Skinnemoen if (cmd->flags & MMC_RSP_136) 6542c96a293SLudovic Desroches cmdr |= ATMCI_CMDR_RSPTYP_136BIT; 6557d2be074SHaavard Skinnemoen else 6562c96a293SLudovic Desroches cmdr |= ATMCI_CMDR_RSPTYP_48BIT; 6577d2be074SHaavard Skinnemoen } 6587d2be074SHaavard Skinnemoen 6597d2be074SHaavard Skinnemoen /* 6607d2be074SHaavard Skinnemoen * This should really be MAXLAT_5 for CMD2 and ACMD41, but 6617d2be074SHaavard Skinnemoen * it's too difficult to determine whether this is an ACMD or 6627d2be074SHaavard Skinnemoen * not. Better make it 64. 6637d2be074SHaavard Skinnemoen */ 6642c96a293SLudovic Desroches cmdr |= ATMCI_CMDR_MAXLAT_64CYC; 6657d2be074SHaavard Skinnemoen 6667d2be074SHaavard Skinnemoen if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN) 6672c96a293SLudovic Desroches cmdr |= ATMCI_CMDR_OPDCMD; 6687d2be074SHaavard Skinnemoen 6697d2be074SHaavard Skinnemoen data = cmd->data; 6707d2be074SHaavard Skinnemoen if (data) { 6712c96a293SLudovic Desroches cmdr |= ATMCI_CMDR_START_XFER; 6722f1d7918SNicolas Ferre 6732f1d7918SNicolas Ferre if (cmd->opcode == SD_IO_RW_EXTENDED) { 6742c96a293SLudovic Desroches cmdr |= ATMCI_CMDR_SDIO_BLOCK; 6752f1d7918SNicolas Ferre } else { 6767d2be074SHaavard Skinnemoen if (data->flags & MMC_DATA_STREAM) 6772c96a293SLudovic Desroches cmdr |= ATMCI_CMDR_STREAM; 6787d2be074SHaavard Skinnemoen else if (data->blocks > 1) 6792c96a293SLudovic Desroches cmdr |= ATMCI_CMDR_MULTI_BLOCK; 6807d2be074SHaavard Skinnemoen else 6812c96a293SLudovic Desroches cmdr |= ATMCI_CMDR_BLOCK; 6822f1d7918SNicolas Ferre } 6837d2be074SHaavard Skinnemoen 6847d2be074SHaavard Skinnemoen if (data->flags & MMC_DATA_READ) 6852c96a293SLudovic Desroches cmdr |= ATMCI_CMDR_TRDIR_READ; 6867d2be074SHaavard Skinnemoen } 6877d2be074SHaavard Skinnemoen 6887d2be074SHaavard Skinnemoen return cmdr; 6897d2be074SHaavard Skinnemoen } 6907d2be074SHaavard Skinnemoen 69111d1488bSLudovic Desroches static void atmci_send_command(struct atmel_mci *host, 692965ebf33SHaavard Skinnemoen struct mmc_command *cmd, u32 cmd_flags) 6937d2be074SHaavard Skinnemoen { 6947d2be074SHaavard Skinnemoen WARN_ON(host->cmd); 6957d2be074SHaavard Skinnemoen host->cmd = cmd; 6967d2be074SHaavard Skinnemoen 697965ebf33SHaavard Skinnemoen dev_vdbg(&host->pdev->dev, 6987d2be074SHaavard Skinnemoen "start command: ARGR=0x%08x CMDR=0x%08x\n", 6997d2be074SHaavard Skinnemoen cmd->arg, cmd_flags); 7007d2be074SHaavard Skinnemoen 70103fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_ARGR, cmd->arg); 70203fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CMDR, cmd_flags); 7037d2be074SHaavard Skinnemoen } 7047d2be074SHaavard Skinnemoen 7052c96a293SLudovic Desroches static void atmci_send_stop_cmd(struct atmel_mci *host, struct mmc_data *data) 7067d2be074SHaavard Skinnemoen { 7076801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "send stop command\n"); 70811d1488bSLudovic Desroches atmci_send_command(host, data->stop, host->stop_cmdr); 70903fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_CMDRDY); 7107d2be074SHaavard Skinnemoen } 7117d2be074SHaavard Skinnemoen 712796211b7SLudovic Desroches /* 713796211b7SLudovic Desroches * Configure given PDC buffer taking care of alignement issues. 714796211b7SLudovic Desroches * Update host->data_size and host->sg. 715796211b7SLudovic Desroches */ 716796211b7SLudovic Desroches static void atmci_pdc_set_single_buf(struct atmel_mci *host, 717796211b7SLudovic Desroches enum atmci_xfer_dir dir, enum atmci_pdc_buf buf_nb) 718796211b7SLudovic Desroches { 719796211b7SLudovic Desroches u32 pointer_reg, counter_reg; 7207a90dcc2SLudovic Desroches unsigned int buf_size; 721796211b7SLudovic Desroches 722796211b7SLudovic Desroches if (dir == XFER_RECEIVE) { 723796211b7SLudovic Desroches pointer_reg = ATMEL_PDC_RPR; 724796211b7SLudovic Desroches counter_reg = ATMEL_PDC_RCR; 725796211b7SLudovic Desroches } else { 726796211b7SLudovic Desroches pointer_reg = ATMEL_PDC_TPR; 727796211b7SLudovic Desroches counter_reg = ATMEL_PDC_TCR; 728796211b7SLudovic Desroches } 729796211b7SLudovic Desroches 730796211b7SLudovic Desroches if (buf_nb == PDC_SECOND_BUF) { 7311ebbe3d3SLudovic Desroches pointer_reg += ATMEL_PDC_SCND_BUF_OFF; 7321ebbe3d3SLudovic Desroches counter_reg += ATMEL_PDC_SCND_BUF_OFF; 733796211b7SLudovic Desroches } 734796211b7SLudovic Desroches 7357a90dcc2SLudovic Desroches if (!host->caps.has_rwproof) { 7367a90dcc2SLudovic Desroches buf_size = host->buf_size; 7377a90dcc2SLudovic Desroches atmci_writel(host, pointer_reg, host->buf_phys_addr); 7387a90dcc2SLudovic Desroches } else { 7397a90dcc2SLudovic Desroches buf_size = sg_dma_len(host->sg); 740796211b7SLudovic Desroches atmci_writel(host, pointer_reg, sg_dma_address(host->sg)); 7417a90dcc2SLudovic Desroches } 7427a90dcc2SLudovic Desroches 7437a90dcc2SLudovic Desroches if (host->data_size <= buf_size) { 744796211b7SLudovic Desroches if (host->data_size & 0x3) { 745796211b7SLudovic Desroches /* If size is different from modulo 4, transfer bytes */ 746796211b7SLudovic Desroches atmci_writel(host, counter_reg, host->data_size); 747796211b7SLudovic Desroches atmci_writel(host, ATMCI_MR, host->mode_reg | ATMCI_MR_PDCFBYTE); 748796211b7SLudovic Desroches } else { 749796211b7SLudovic Desroches /* Else transfer 32-bits words */ 750796211b7SLudovic Desroches atmci_writel(host, counter_reg, host->data_size / 4); 751796211b7SLudovic Desroches } 752796211b7SLudovic Desroches host->data_size = 0; 753796211b7SLudovic Desroches } else { 754796211b7SLudovic Desroches /* We assume the size of a page is 32-bits aligned */ 755341fa4c3SLudovic Desroches atmci_writel(host, counter_reg, sg_dma_len(host->sg) / 4); 756341fa4c3SLudovic Desroches host->data_size -= sg_dma_len(host->sg); 757796211b7SLudovic Desroches if (host->data_size) 758796211b7SLudovic Desroches host->sg = sg_next(host->sg); 759796211b7SLudovic Desroches } 760796211b7SLudovic Desroches } 761796211b7SLudovic Desroches 762796211b7SLudovic Desroches /* 763796211b7SLudovic Desroches * Configure PDC buffer according to the data size ie configuring one or two 764796211b7SLudovic Desroches * buffers. Don't use this function if you want to configure only the second 765796211b7SLudovic Desroches * buffer. In this case, use atmci_pdc_set_single_buf. 766796211b7SLudovic Desroches */ 767796211b7SLudovic Desroches static void atmci_pdc_set_both_buf(struct atmel_mci *host, int dir) 768796211b7SLudovic Desroches { 769796211b7SLudovic Desroches atmci_pdc_set_single_buf(host, dir, PDC_FIRST_BUF); 770796211b7SLudovic Desroches if (host->data_size) 771796211b7SLudovic Desroches atmci_pdc_set_single_buf(host, dir, PDC_SECOND_BUF); 772796211b7SLudovic Desroches } 773796211b7SLudovic Desroches 774796211b7SLudovic Desroches /* 775796211b7SLudovic Desroches * Unmap sg lists, called when transfer is finished. 776796211b7SLudovic Desroches */ 777796211b7SLudovic Desroches static void atmci_pdc_cleanup(struct atmel_mci *host) 778796211b7SLudovic Desroches { 779796211b7SLudovic Desroches struct mmc_data *data = host->data; 780796211b7SLudovic Desroches 781796211b7SLudovic Desroches if (data) 782796211b7SLudovic Desroches dma_unmap_sg(&host->pdev->dev, 783796211b7SLudovic Desroches data->sg, data->sg_len, 784796211b7SLudovic Desroches ((data->flags & MMC_DATA_WRITE) 785796211b7SLudovic Desroches ? DMA_TO_DEVICE : DMA_FROM_DEVICE)); 786796211b7SLudovic Desroches } 787796211b7SLudovic Desroches 788796211b7SLudovic Desroches /* 789796211b7SLudovic Desroches * Disable PDC transfers. Update pending flags to EVENT_XFER_COMPLETE after 790796211b7SLudovic Desroches * having received ATMCI_TXBUFE or ATMCI_RXBUFF interrupt. Enable ATMCI_NOTBUSY 791796211b7SLudovic Desroches * interrupt needed for both transfer directions. 792796211b7SLudovic Desroches */ 793796211b7SLudovic Desroches static void atmci_pdc_complete(struct atmel_mci *host) 794796211b7SLudovic Desroches { 7957a90dcc2SLudovic Desroches int transfer_size = host->data->blocks * host->data->blksz; 79624011f34SLudovic Desroches int i; 7977a90dcc2SLudovic Desroches 798796211b7SLudovic Desroches atmci_writel(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS); 7997a90dcc2SLudovic Desroches 8007a90dcc2SLudovic Desroches if ((!host->caps.has_rwproof) 80124011f34SLudovic Desroches && (host->data->flags & MMC_DATA_READ)) { 80224011f34SLudovic Desroches if (host->caps.has_bad_data_ordering) 80324011f34SLudovic Desroches for (i = 0; i < transfer_size; i++) 80424011f34SLudovic Desroches host->buffer[i] = swab32(host->buffer[i]); 8057a90dcc2SLudovic Desroches sg_copy_from_buffer(host->data->sg, host->data->sg_len, 8067a90dcc2SLudovic Desroches host->buffer, transfer_size); 80724011f34SLudovic Desroches } 8087a90dcc2SLudovic Desroches 809796211b7SLudovic Desroches atmci_pdc_cleanup(host); 810796211b7SLudovic Desroches 811796211b7SLudovic Desroches /* 812796211b7SLudovic Desroches * If the card was removed, data will be NULL. No point trying 813796211b7SLudovic Desroches * to send the stop command or waiting for NBUSY in this case. 814796211b7SLudovic Desroches */ 815796211b7SLudovic Desroches if (host->data) { 8166801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, 8176801c41aSLudovic Desroches "(%s) set pending xfer complete\n", __func__); 818796211b7SLudovic Desroches atmci_set_pending(host, EVENT_XFER_COMPLETE); 819796211b7SLudovic Desroches tasklet_schedule(&host->tasklet); 820796211b7SLudovic Desroches } 821796211b7SLudovic Desroches } 822796211b7SLudovic Desroches 82365e8b083SHaavard Skinnemoen static void atmci_dma_cleanup(struct atmel_mci *host) 82465e8b083SHaavard Skinnemoen { 82565e8b083SHaavard Skinnemoen struct mmc_data *data = host->data; 82665e8b083SHaavard Skinnemoen 827009a891bSNicolas Ferre if (data) 828266ac3f2SLinus Walleij dma_unmap_sg(host->dma.chan->device->dev, 829266ac3f2SLinus Walleij data->sg, data->sg_len, 83065e8b083SHaavard Skinnemoen ((data->flags & MMC_DATA_WRITE) 83165e8b083SHaavard Skinnemoen ? DMA_TO_DEVICE : DMA_FROM_DEVICE)); 83265e8b083SHaavard Skinnemoen } 83365e8b083SHaavard Skinnemoen 834796211b7SLudovic Desroches /* 835796211b7SLudovic Desroches * This function is called by the DMA driver from tasklet context. 836796211b7SLudovic Desroches */ 83765e8b083SHaavard Skinnemoen static void atmci_dma_complete(void *arg) 83865e8b083SHaavard Skinnemoen { 83965e8b083SHaavard Skinnemoen struct atmel_mci *host = arg; 84065e8b083SHaavard Skinnemoen struct mmc_data *data = host->data; 84165e8b083SHaavard Skinnemoen 84265e8b083SHaavard Skinnemoen dev_vdbg(&host->pdev->dev, "DMA complete\n"); 84365e8b083SHaavard Skinnemoen 844796211b7SLudovic Desroches if (host->caps.has_dma) 84574791a2dSNicolas Ferre /* Disable DMA hardware handshaking on MCI */ 84603fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_DMA, atmci_readl(host, ATMCI_DMA) & ~ATMCI_DMAEN); 84774791a2dSNicolas Ferre 84865e8b083SHaavard Skinnemoen atmci_dma_cleanup(host); 84965e8b083SHaavard Skinnemoen 85065e8b083SHaavard Skinnemoen /* 85165e8b083SHaavard Skinnemoen * If the card was removed, data will be NULL. No point trying 85265e8b083SHaavard Skinnemoen * to send the stop command or waiting for NBUSY in this case. 85365e8b083SHaavard Skinnemoen */ 85465e8b083SHaavard Skinnemoen if (data) { 8556801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, 8566801c41aSLudovic Desroches "(%s) set pending xfer complete\n", __func__); 85765e8b083SHaavard Skinnemoen atmci_set_pending(host, EVENT_XFER_COMPLETE); 85865e8b083SHaavard Skinnemoen tasklet_schedule(&host->tasklet); 85965e8b083SHaavard Skinnemoen 86065e8b083SHaavard Skinnemoen /* 86165e8b083SHaavard Skinnemoen * Regardless of what the documentation says, we have 86265e8b083SHaavard Skinnemoen * to wait for NOTBUSY even after block read 86365e8b083SHaavard Skinnemoen * operations. 86465e8b083SHaavard Skinnemoen * 86565e8b083SHaavard Skinnemoen * When the DMA transfer is complete, the controller 86665e8b083SHaavard Skinnemoen * may still be reading the CRC from the card, i.e. 86765e8b083SHaavard Skinnemoen * the data transfer is still in progress and we 86865e8b083SHaavard Skinnemoen * haven't seen all the potential error bits yet. 86965e8b083SHaavard Skinnemoen * 87065e8b083SHaavard Skinnemoen * The interrupt handler will schedule a different 87165e8b083SHaavard Skinnemoen * tasklet to finish things up when the data transfer 87265e8b083SHaavard Skinnemoen * is completely done. 87365e8b083SHaavard Skinnemoen * 87465e8b083SHaavard Skinnemoen * We may not complete the mmc request here anyway 87565e8b083SHaavard Skinnemoen * because the mmc layer may call back and cause us to 87665e8b083SHaavard Skinnemoen * violate the "don't submit new operations from the 87765e8b083SHaavard Skinnemoen * completion callback" rule of the dma engine 87865e8b083SHaavard Skinnemoen * framework. 87965e8b083SHaavard Skinnemoen */ 88003fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY); 88165e8b083SHaavard Skinnemoen } 88265e8b083SHaavard Skinnemoen } 88365e8b083SHaavard Skinnemoen 884796211b7SLudovic Desroches /* 885796211b7SLudovic Desroches * Returns a mask of interrupt flags to be enabled after the whole 886796211b7SLudovic Desroches * request has been prepared. 887796211b7SLudovic Desroches */ 888796211b7SLudovic Desroches static u32 atmci_prepare_data(struct atmel_mci *host, struct mmc_data *data) 889796211b7SLudovic Desroches { 890796211b7SLudovic Desroches u32 iflags; 891796211b7SLudovic Desroches 892796211b7SLudovic Desroches data->error = -EINPROGRESS; 893796211b7SLudovic Desroches 894796211b7SLudovic Desroches host->sg = data->sg; 895796211b7SLudovic Desroches host->data = data; 896796211b7SLudovic Desroches host->data_chan = NULL; 897796211b7SLudovic Desroches 898796211b7SLudovic Desroches iflags = ATMCI_DATA_ERROR_FLAGS; 899796211b7SLudovic Desroches 900796211b7SLudovic Desroches /* 901796211b7SLudovic Desroches * Errata: MMC data write operation with less than 12 902796211b7SLudovic Desroches * bytes is impossible. 903796211b7SLudovic Desroches * 904796211b7SLudovic Desroches * Errata: MCI Transmit Data Register (TDR) FIFO 905796211b7SLudovic Desroches * corruption when length is not multiple of 4. 906796211b7SLudovic Desroches */ 907796211b7SLudovic Desroches if (data->blocks * data->blksz < 12 908796211b7SLudovic Desroches || (data->blocks * data->blksz) & 3) 909796211b7SLudovic Desroches host->need_reset = true; 910796211b7SLudovic Desroches 911796211b7SLudovic Desroches host->pio_offset = 0; 912796211b7SLudovic Desroches if (data->flags & MMC_DATA_READ) 913796211b7SLudovic Desroches iflags |= ATMCI_RXRDY; 914796211b7SLudovic Desroches else 915796211b7SLudovic Desroches iflags |= ATMCI_TXRDY; 916796211b7SLudovic Desroches 917796211b7SLudovic Desroches return iflags; 918796211b7SLudovic Desroches } 919796211b7SLudovic Desroches 920796211b7SLudovic Desroches /* 921796211b7SLudovic Desroches * Set interrupt flags and set block length into the MCI mode register even 922796211b7SLudovic Desroches * if this value is also accessible in the MCI block register. It seems to be 923796211b7SLudovic Desroches * necessary before the High Speed MCI version. It also map sg and configure 924796211b7SLudovic Desroches * PDC registers. 925796211b7SLudovic Desroches */ 926796211b7SLudovic Desroches static u32 927796211b7SLudovic Desroches atmci_prepare_data_pdc(struct atmel_mci *host, struct mmc_data *data) 928796211b7SLudovic Desroches { 929796211b7SLudovic Desroches u32 iflags, tmp; 930796211b7SLudovic Desroches unsigned int sg_len; 931796211b7SLudovic Desroches enum dma_data_direction dir; 93224011f34SLudovic Desroches int i; 933796211b7SLudovic Desroches 934796211b7SLudovic Desroches data->error = -EINPROGRESS; 935796211b7SLudovic Desroches 936796211b7SLudovic Desroches host->data = data; 937796211b7SLudovic Desroches host->sg = data->sg; 938796211b7SLudovic Desroches iflags = ATMCI_DATA_ERROR_FLAGS; 939796211b7SLudovic Desroches 940796211b7SLudovic Desroches /* Enable pdc mode */ 941796211b7SLudovic Desroches atmci_writel(host, ATMCI_MR, host->mode_reg | ATMCI_MR_PDCMODE); 942796211b7SLudovic Desroches 943796211b7SLudovic Desroches if (data->flags & MMC_DATA_READ) { 944796211b7SLudovic Desroches dir = DMA_FROM_DEVICE; 945796211b7SLudovic Desroches iflags |= ATMCI_ENDRX | ATMCI_RXBUFF; 946796211b7SLudovic Desroches } else { 947796211b7SLudovic Desroches dir = DMA_TO_DEVICE; 948f5177547SLudovic Desroches iflags |= ATMCI_ENDTX | ATMCI_TXBUFE | ATMCI_BLKE; 949796211b7SLudovic Desroches } 950796211b7SLudovic Desroches 951796211b7SLudovic Desroches /* Set BLKLEN */ 952796211b7SLudovic Desroches tmp = atmci_readl(host, ATMCI_MR); 953796211b7SLudovic Desroches tmp &= 0x0000ffff; 954796211b7SLudovic Desroches tmp |= ATMCI_BLKLEN(data->blksz); 955796211b7SLudovic Desroches atmci_writel(host, ATMCI_MR, tmp); 956796211b7SLudovic Desroches 957796211b7SLudovic Desroches /* Configure PDC */ 958796211b7SLudovic Desroches host->data_size = data->blocks * data->blksz; 959796211b7SLudovic Desroches sg_len = dma_map_sg(&host->pdev->dev, data->sg, data->sg_len, dir); 9607a90dcc2SLudovic Desroches 9617a90dcc2SLudovic Desroches if ((!host->caps.has_rwproof) 96224011f34SLudovic Desroches && (host->data->flags & MMC_DATA_WRITE)) { 9637a90dcc2SLudovic Desroches sg_copy_to_buffer(host->data->sg, host->data->sg_len, 9647a90dcc2SLudovic Desroches host->buffer, host->data_size); 96524011f34SLudovic Desroches if (host->caps.has_bad_data_ordering) 96624011f34SLudovic Desroches for (i = 0; i < host->data_size; i++) 96724011f34SLudovic Desroches host->buffer[i] = swab32(host->buffer[i]); 96824011f34SLudovic Desroches } 9697a90dcc2SLudovic Desroches 970796211b7SLudovic Desroches if (host->data_size) 971796211b7SLudovic Desroches atmci_pdc_set_both_buf(host, 972796211b7SLudovic Desroches ((dir == DMA_FROM_DEVICE) ? XFER_RECEIVE : XFER_TRANSMIT)); 973796211b7SLudovic Desroches 974796211b7SLudovic Desroches return iflags; 975796211b7SLudovic Desroches } 976796211b7SLudovic Desroches 977796211b7SLudovic Desroches static u32 97874791a2dSNicolas Ferre atmci_prepare_data_dma(struct atmel_mci *host, struct mmc_data *data) 97965e8b083SHaavard Skinnemoen { 98065e8b083SHaavard Skinnemoen struct dma_chan *chan; 98165e8b083SHaavard Skinnemoen struct dma_async_tx_descriptor *desc; 98265e8b083SHaavard Skinnemoen struct scatterlist *sg; 98365e8b083SHaavard Skinnemoen unsigned int i; 98465e8b083SHaavard Skinnemoen enum dma_data_direction direction; 98505f5799cSVinod Koul enum dma_transfer_direction slave_dirn; 986657a77faSAtsushi Nemoto unsigned int sglen; 987693e5e20SNicolas Ferre u32 maxburst; 988796211b7SLudovic Desroches u32 iflags; 989796211b7SLudovic Desroches 990796211b7SLudovic Desroches data->error = -EINPROGRESS; 991796211b7SLudovic Desroches 992796211b7SLudovic Desroches WARN_ON(host->data); 993796211b7SLudovic Desroches host->sg = NULL; 994796211b7SLudovic Desroches host->data = data; 995796211b7SLudovic Desroches 996796211b7SLudovic Desroches iflags = ATMCI_DATA_ERROR_FLAGS; 99765e8b083SHaavard Skinnemoen 99865e8b083SHaavard Skinnemoen /* 99965e8b083SHaavard Skinnemoen * We don't do DMA on "complex" transfers, i.e. with 100065e8b083SHaavard Skinnemoen * non-word-aligned buffers or lengths. Also, we don't bother 100165e8b083SHaavard Skinnemoen * with all the DMA setup overhead for short transfers. 100265e8b083SHaavard Skinnemoen */ 1003796211b7SLudovic Desroches if (data->blocks * data->blksz < ATMCI_DMA_THRESHOLD) 1004796211b7SLudovic Desroches return atmci_prepare_data(host, data); 100565e8b083SHaavard Skinnemoen if (data->blksz & 3) 1006796211b7SLudovic Desroches return atmci_prepare_data(host, data); 100765e8b083SHaavard Skinnemoen 100865e8b083SHaavard Skinnemoen for_each_sg(data->sg, sg, data->sg_len, i) { 100965e8b083SHaavard Skinnemoen if (sg->offset & 3 || sg->length & 3) 1010796211b7SLudovic Desroches return atmci_prepare_data(host, data); 101165e8b083SHaavard Skinnemoen } 101265e8b083SHaavard Skinnemoen 101365e8b083SHaavard Skinnemoen /* If we don't have a channel, we can't do DMA */ 101465e8b083SHaavard Skinnemoen chan = host->dma.chan; 10156f49a57aSDan Williams if (chan) 101665e8b083SHaavard Skinnemoen host->data_chan = chan; 101765e8b083SHaavard Skinnemoen 101865e8b083SHaavard Skinnemoen if (!chan) 101965e8b083SHaavard Skinnemoen return -ENODEV; 102065e8b083SHaavard Skinnemoen 102105f5799cSVinod Koul if (data->flags & MMC_DATA_READ) { 102265e8b083SHaavard Skinnemoen direction = DMA_FROM_DEVICE; 1023e2b35f3dSViresh Kumar host->dma_conf.direction = slave_dirn = DMA_DEV_TO_MEM; 1024693e5e20SNicolas Ferre maxburst = atmci_convert_chksize(host->dma_conf.src_maxburst); 102505f5799cSVinod Koul } else { 102665e8b083SHaavard Skinnemoen direction = DMA_TO_DEVICE; 1027e2b35f3dSViresh Kumar host->dma_conf.direction = slave_dirn = DMA_MEM_TO_DEV; 1028693e5e20SNicolas Ferre maxburst = atmci_convert_chksize(host->dma_conf.dst_maxburst); 102905f5799cSVinod Koul } 103065e8b083SHaavard Skinnemoen 1031693e5e20SNicolas Ferre atmci_writel(host, ATMCI_DMA, ATMCI_DMA_CHKSIZE(maxburst) | ATMCI_DMAEN); 1032693e5e20SNicolas Ferre 1033266ac3f2SLinus Walleij sglen = dma_map_sg(chan->device->dev, data->sg, 1034266ac3f2SLinus Walleij data->sg_len, direction); 103588ce4db3SLinus Walleij 1036e2b35f3dSViresh Kumar dmaengine_slave_config(chan, &host->dma_conf); 103716052827SAlexandre Bounine desc = dmaengine_prep_slave_sg(chan, 103805f5799cSVinod Koul data->sg, sglen, slave_dirn, 103965e8b083SHaavard Skinnemoen DMA_PREP_INTERRUPT | DMA_CTRL_ACK); 104065e8b083SHaavard Skinnemoen if (!desc) 1041657a77faSAtsushi Nemoto goto unmap_exit; 104265e8b083SHaavard Skinnemoen 104365e8b083SHaavard Skinnemoen host->dma.data_desc = desc; 104465e8b083SHaavard Skinnemoen desc->callback = atmci_dma_complete; 104565e8b083SHaavard Skinnemoen desc->callback_param = host; 104665e8b083SHaavard Skinnemoen 1047796211b7SLudovic Desroches return iflags; 1048657a77faSAtsushi Nemoto unmap_exit: 104988ce4db3SLinus Walleij dma_unmap_sg(chan->device->dev, data->sg, data->sg_len, direction); 1050657a77faSAtsushi Nemoto return -ENOMEM; 105165e8b083SHaavard Skinnemoen } 105265e8b083SHaavard Skinnemoen 1053796211b7SLudovic Desroches static void 1054796211b7SLudovic Desroches atmci_submit_data(struct atmel_mci *host, struct mmc_data *data) 1055796211b7SLudovic Desroches { 1056796211b7SLudovic Desroches return; 1057796211b7SLudovic Desroches } 1058796211b7SLudovic Desroches 1059796211b7SLudovic Desroches /* 1060796211b7SLudovic Desroches * Start PDC according to transfer direction. 1061796211b7SLudovic Desroches */ 1062796211b7SLudovic Desroches static void 1063796211b7SLudovic Desroches atmci_submit_data_pdc(struct atmel_mci *host, struct mmc_data *data) 1064796211b7SLudovic Desroches { 1065796211b7SLudovic Desroches if (data->flags & MMC_DATA_READ) 1066796211b7SLudovic Desroches atmci_writel(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTEN); 1067796211b7SLudovic Desroches else 1068796211b7SLudovic Desroches atmci_writel(host, ATMEL_PDC_PTCR, ATMEL_PDC_TXTEN); 1069796211b7SLudovic Desroches } 1070796211b7SLudovic Desroches 1071796211b7SLudovic Desroches static void 1072796211b7SLudovic Desroches atmci_submit_data_dma(struct atmel_mci *host, struct mmc_data *data) 107374791a2dSNicolas Ferre { 107474791a2dSNicolas Ferre struct dma_chan *chan = host->data_chan; 107574791a2dSNicolas Ferre struct dma_async_tx_descriptor *desc = host->dma.data_desc; 107674791a2dSNicolas Ferre 107774791a2dSNicolas Ferre if (chan) { 10785328906aSLinus Walleij dmaengine_submit(desc); 10795328906aSLinus Walleij dma_async_issue_pending(chan); 108074791a2dSNicolas Ferre } 108174791a2dSNicolas Ferre } 108274791a2dSNicolas Ferre 1083796211b7SLudovic Desroches static void atmci_stop_transfer(struct atmel_mci *host) 108465e8b083SHaavard Skinnemoen { 10856801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, 10866801c41aSLudovic Desroches "(%s) set pending xfer complete\n", __func__); 108765e8b083SHaavard Skinnemoen atmci_set_pending(host, EVENT_XFER_COMPLETE); 108803fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY); 108965e8b083SHaavard Skinnemoen } 109065e8b083SHaavard Skinnemoen 10917d2be074SHaavard Skinnemoen /* 1092796211b7SLudovic Desroches * Stop data transfer because error(s) occured. 10937d2be074SHaavard Skinnemoen */ 1094796211b7SLudovic Desroches static void atmci_stop_transfer_pdc(struct atmel_mci *host) 10957d2be074SHaavard Skinnemoen { 1096f5177547SLudovic Desroches atmci_writel(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS); 1097796211b7SLudovic Desroches } 10987d2be074SHaavard Skinnemoen 1099796211b7SLudovic Desroches static void atmci_stop_transfer_dma(struct atmel_mci *host) 1100796211b7SLudovic Desroches { 1101796211b7SLudovic Desroches struct dma_chan *chan = host->data_chan; 11027d2be074SHaavard Skinnemoen 1103796211b7SLudovic Desroches if (chan) { 1104796211b7SLudovic Desroches dmaengine_terminate_all(chan); 1105796211b7SLudovic Desroches atmci_dma_cleanup(host); 1106796211b7SLudovic Desroches } else { 1107796211b7SLudovic Desroches /* Data transfer was stopped by the interrupt handler */ 11086801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, 11096801c41aSLudovic Desroches "(%s) set pending xfer complete\n", __func__); 1110796211b7SLudovic Desroches atmci_set_pending(host, EVENT_XFER_COMPLETE); 1111796211b7SLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY); 1112796211b7SLudovic Desroches } 1113796211b7SLudovic Desroches } 1114965ebf33SHaavard Skinnemoen 1115965ebf33SHaavard Skinnemoen /* 1116796211b7SLudovic Desroches * Start a request: prepare data if needed, prepare the command and activate 1117796211b7SLudovic Desroches * interrupts. 1118965ebf33SHaavard Skinnemoen */ 1119965ebf33SHaavard Skinnemoen static void atmci_start_request(struct atmel_mci *host, 1120965ebf33SHaavard Skinnemoen struct atmel_mci_slot *slot) 11217d2be074SHaavard Skinnemoen { 1122965ebf33SHaavard Skinnemoen struct mmc_request *mrq; 11237d2be074SHaavard Skinnemoen struct mmc_command *cmd; 1124965ebf33SHaavard Skinnemoen struct mmc_data *data; 11257d2be074SHaavard Skinnemoen u32 iflags; 1126965ebf33SHaavard Skinnemoen u32 cmdflags; 1127965ebf33SHaavard Skinnemoen 1128965ebf33SHaavard Skinnemoen mrq = slot->mrq; 1129965ebf33SHaavard Skinnemoen host->cur_slot = slot; 1130965ebf33SHaavard Skinnemoen host->mrq = mrq; 1131965ebf33SHaavard Skinnemoen 1132965ebf33SHaavard Skinnemoen host->pending_events = 0; 1133965ebf33SHaavard Skinnemoen host->completed_events = 0; 1134f5177547SLudovic Desroches host->cmd_status = 0; 1135ca55f46eSHaavard Skinnemoen host->data_status = 0; 1136965ebf33SHaavard Skinnemoen 11376801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "start request: cmd %u\n", mrq->cmd->opcode); 11386801c41aSLudovic Desroches 113924011f34SLudovic Desroches if (host->need_reset || host->caps.need_reset_after_xfer) { 114018ee684bSLudovic Desroches iflags = atmci_readl(host, ATMCI_IMR); 114118ee684bSLudovic Desroches iflags &= (ATMCI_SDIOIRQA | ATMCI_SDIOIRQB); 114203fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST); 114303fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIEN); 114403fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_MR, host->mode_reg); 1145796211b7SLudovic Desroches if (host->caps.has_cfg_reg) 114603fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CFG, host->cfg_reg); 114718ee684bSLudovic Desroches atmci_writel(host, ATMCI_IER, iflags); 1148965ebf33SHaavard Skinnemoen host->need_reset = false; 1149965ebf33SHaavard Skinnemoen } 115003fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_SDCR, slot->sdc_reg); 11517d2be074SHaavard Skinnemoen 115203fc9a7fSLudovic Desroches iflags = atmci_readl(host, ATMCI_IMR); 11532c96a293SLudovic Desroches if (iflags & ~(ATMCI_SDIOIRQA | ATMCI_SDIOIRQB)) 1154f5177547SLudovic Desroches dev_dbg(&slot->mmc->class_dev, "WARNING: IMR=0x%08x\n", 1155965ebf33SHaavard Skinnemoen iflags); 11567d2be074SHaavard Skinnemoen 1157965ebf33SHaavard Skinnemoen if (unlikely(test_and_clear_bit(ATMCI_CARD_NEED_INIT, &slot->flags))) { 1158965ebf33SHaavard Skinnemoen /* Send init sequence (74 clock cycles) */ 115903fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CMDR, ATMCI_CMDR_SPCMD_INIT); 116003fc9a7fSLudovic Desroches while (!(atmci_readl(host, ATMCI_SR) & ATMCI_CMDRDY)) 1161965ebf33SHaavard Skinnemoen cpu_relax(); 11627d2be074SHaavard Skinnemoen } 116374791a2dSNicolas Ferre iflags = 0; 11647d2be074SHaavard Skinnemoen data = mrq->data; 11657d2be074SHaavard Skinnemoen if (data) { 1166965ebf33SHaavard Skinnemoen atmci_set_timeout(host, slot, data); 1167a252e3e3SHaavard Skinnemoen 1168a252e3e3SHaavard Skinnemoen /* Must set block count/size before sending command */ 116903fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_BLKR, ATMCI_BCNT(data->blocks) 11702c96a293SLudovic Desroches | ATMCI_BLKLEN(data->blksz)); 1171965ebf33SHaavard Skinnemoen dev_vdbg(&slot->mmc->class_dev, "BLKR=0x%08x\n", 11722c96a293SLudovic Desroches ATMCI_BCNT(data->blocks) | ATMCI_BLKLEN(data->blksz)); 117374791a2dSNicolas Ferre 1174796211b7SLudovic Desroches iflags |= host->prepare_data(host, data); 11757d2be074SHaavard Skinnemoen } 11767d2be074SHaavard Skinnemoen 11772c96a293SLudovic Desroches iflags |= ATMCI_CMDRDY; 11787d2be074SHaavard Skinnemoen cmd = mrq->cmd; 1179965ebf33SHaavard Skinnemoen cmdflags = atmci_prepare_command(slot->mmc, cmd); 118011d1488bSLudovic Desroches atmci_send_command(host, cmd, cmdflags); 11817d2be074SHaavard Skinnemoen 11827d2be074SHaavard Skinnemoen if (data) 1183796211b7SLudovic Desroches host->submit_data(host, data); 11847d2be074SHaavard Skinnemoen 11857d2be074SHaavard Skinnemoen if (mrq->stop) { 1186965ebf33SHaavard Skinnemoen host->stop_cmdr = atmci_prepare_command(slot->mmc, mrq->stop); 11872c96a293SLudovic Desroches host->stop_cmdr |= ATMCI_CMDR_STOP_XFER; 11887d2be074SHaavard Skinnemoen if (!(data->flags & MMC_DATA_WRITE)) 11892c96a293SLudovic Desroches host->stop_cmdr |= ATMCI_CMDR_TRDIR_READ; 11907d2be074SHaavard Skinnemoen if (data->flags & MMC_DATA_STREAM) 11912c96a293SLudovic Desroches host->stop_cmdr |= ATMCI_CMDR_STREAM; 11927d2be074SHaavard Skinnemoen else 11932c96a293SLudovic Desroches host->stop_cmdr |= ATMCI_CMDR_MULTI_BLOCK; 11947d2be074SHaavard Skinnemoen } 11957d2be074SHaavard Skinnemoen 11967d2be074SHaavard Skinnemoen /* 11977d2be074SHaavard Skinnemoen * We could have enabled interrupts earlier, but I suspect 11987d2be074SHaavard Skinnemoen * that would open up a nice can of interesting race 11997d2be074SHaavard Skinnemoen * conditions (e.g. command and data complete, but stop not 12007d2be074SHaavard Skinnemoen * prepared yet.) 12017d2be074SHaavard Skinnemoen */ 120203fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_IER, iflags); 120324011f34SLudovic Desroches 120424011f34SLudovic Desroches mod_timer(&host->timer, jiffies + msecs_to_jiffies(2000)); 1205965ebf33SHaavard Skinnemoen } 12067d2be074SHaavard Skinnemoen 1207965ebf33SHaavard Skinnemoen static void atmci_queue_request(struct atmel_mci *host, 1208965ebf33SHaavard Skinnemoen struct atmel_mci_slot *slot, struct mmc_request *mrq) 1209965ebf33SHaavard Skinnemoen { 1210965ebf33SHaavard Skinnemoen dev_vdbg(&slot->mmc->class_dev, "queue request: state=%d\n", 1211965ebf33SHaavard Skinnemoen host->state); 1212965ebf33SHaavard Skinnemoen 1213965ebf33SHaavard Skinnemoen spin_lock_bh(&host->lock); 1214965ebf33SHaavard Skinnemoen slot->mrq = mrq; 1215965ebf33SHaavard Skinnemoen if (host->state == STATE_IDLE) { 1216965ebf33SHaavard Skinnemoen host->state = STATE_SENDING_CMD; 1217965ebf33SHaavard Skinnemoen atmci_start_request(host, slot); 1218965ebf33SHaavard Skinnemoen } else { 12196801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "queue request\n"); 1220965ebf33SHaavard Skinnemoen list_add_tail(&slot->queue_node, &host->queue); 1221965ebf33SHaavard Skinnemoen } 1222965ebf33SHaavard Skinnemoen spin_unlock_bh(&host->lock); 1223965ebf33SHaavard Skinnemoen } 1224965ebf33SHaavard Skinnemoen 1225965ebf33SHaavard Skinnemoen static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq) 1226965ebf33SHaavard Skinnemoen { 1227965ebf33SHaavard Skinnemoen struct atmel_mci_slot *slot = mmc_priv(mmc); 1228965ebf33SHaavard Skinnemoen struct atmel_mci *host = slot->host; 1229965ebf33SHaavard Skinnemoen struct mmc_data *data; 1230965ebf33SHaavard Skinnemoen 1231965ebf33SHaavard Skinnemoen WARN_ON(slot->mrq); 12326801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "MRQ: cmd %u\n", mrq->cmd->opcode); 1233965ebf33SHaavard Skinnemoen 1234965ebf33SHaavard Skinnemoen /* 1235965ebf33SHaavard Skinnemoen * We may "know" the card is gone even though there's still an 1236965ebf33SHaavard Skinnemoen * electrical connection. If so, we really need to communicate 1237965ebf33SHaavard Skinnemoen * this to the MMC core since there won't be any more 1238965ebf33SHaavard Skinnemoen * interrupts as the card is completely removed. Otherwise, 1239965ebf33SHaavard Skinnemoen * the MMC core might believe the card is still there even 1240965ebf33SHaavard Skinnemoen * though the card was just removed very slowly. 1241965ebf33SHaavard Skinnemoen */ 1242965ebf33SHaavard Skinnemoen if (!test_bit(ATMCI_CARD_PRESENT, &slot->flags)) { 1243965ebf33SHaavard Skinnemoen mrq->cmd->error = -ENOMEDIUM; 1244965ebf33SHaavard Skinnemoen mmc_request_done(mmc, mrq); 12457d2be074SHaavard Skinnemoen return; 1246965ebf33SHaavard Skinnemoen } 12477d2be074SHaavard Skinnemoen 1248965ebf33SHaavard Skinnemoen /* We don't support multiple blocks of weird lengths. */ 1249965ebf33SHaavard Skinnemoen data = mrq->data; 1250965ebf33SHaavard Skinnemoen if (data && data->blocks > 1 && data->blksz & 3) { 12517d2be074SHaavard Skinnemoen mrq->cmd->error = -EINVAL; 12527d2be074SHaavard Skinnemoen mmc_request_done(mmc, mrq); 12537d2be074SHaavard Skinnemoen } 12547d2be074SHaavard Skinnemoen 1255965ebf33SHaavard Skinnemoen atmci_queue_request(host, slot, mrq); 1256965ebf33SHaavard Skinnemoen } 1257965ebf33SHaavard Skinnemoen 12587d2be074SHaavard Skinnemoen static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 12597d2be074SHaavard Skinnemoen { 1260965ebf33SHaavard Skinnemoen struct atmel_mci_slot *slot = mmc_priv(mmc); 1261965ebf33SHaavard Skinnemoen struct atmel_mci *host = slot->host; 1262965ebf33SHaavard Skinnemoen unsigned int i; 12637d2be074SHaavard Skinnemoen 12642c96a293SLudovic Desroches slot->sdc_reg &= ~ATMCI_SDCBUS_MASK; 1265945533b5SHaavard Skinnemoen switch (ios->bus_width) { 1266945533b5SHaavard Skinnemoen case MMC_BUS_WIDTH_1: 12672c96a293SLudovic Desroches slot->sdc_reg |= ATMCI_SDCBUS_1BIT; 1268945533b5SHaavard Skinnemoen break; 1269945533b5SHaavard Skinnemoen case MMC_BUS_WIDTH_4: 12702c96a293SLudovic Desroches slot->sdc_reg |= ATMCI_SDCBUS_4BIT; 1271945533b5SHaavard Skinnemoen break; 1272945533b5SHaavard Skinnemoen } 1273945533b5SHaavard Skinnemoen 12747d2be074SHaavard Skinnemoen if (ios->clock) { 1275965ebf33SHaavard Skinnemoen unsigned int clock_min = ~0U; 12767d2be074SHaavard Skinnemoen u32 clkdiv; 12777d2be074SHaavard Skinnemoen 1278965ebf33SHaavard Skinnemoen spin_lock_bh(&host->lock); 1279965ebf33SHaavard Skinnemoen if (!host->mode_reg) { 1280945533b5SHaavard Skinnemoen clk_enable(host->mck); 128103fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST); 128203fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIEN); 1283796211b7SLudovic Desroches if (host->caps.has_cfg_reg) 128403fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CFG, host->cfg_reg); 1285965ebf33SHaavard Skinnemoen } 1286945533b5SHaavard Skinnemoen 1287965ebf33SHaavard Skinnemoen /* 1288965ebf33SHaavard Skinnemoen * Use mirror of ios->clock to prevent race with mmc 1289965ebf33SHaavard Skinnemoen * core ios update when finding the minimum. 1290965ebf33SHaavard Skinnemoen */ 1291965ebf33SHaavard Skinnemoen slot->clock = ios->clock; 12922c96a293SLudovic Desroches for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) { 1293965ebf33SHaavard Skinnemoen if (host->slot[i] && host->slot[i]->clock 1294965ebf33SHaavard Skinnemoen && host->slot[i]->clock < clock_min) 1295965ebf33SHaavard Skinnemoen clock_min = host->slot[i]->clock; 1296965ebf33SHaavard Skinnemoen } 1297965ebf33SHaavard Skinnemoen 1298965ebf33SHaavard Skinnemoen /* Calculate clock divider */ 1299faf8180bSLudovic Desroches if (host->caps.has_odd_clk_div) { 1300faf8180bSLudovic Desroches clkdiv = DIV_ROUND_UP(host->bus_hz, clock_min) - 2; 1301faf8180bSLudovic Desroches if (clkdiv > 511) { 1302faf8180bSLudovic Desroches dev_warn(&mmc->class_dev, 1303faf8180bSLudovic Desroches "clock %u too slow; using %lu\n", 1304faf8180bSLudovic Desroches clock_min, host->bus_hz / (511 + 2)); 1305faf8180bSLudovic Desroches clkdiv = 511; 1306faf8180bSLudovic Desroches } 1307faf8180bSLudovic Desroches host->mode_reg = ATMCI_MR_CLKDIV(clkdiv >> 1) 1308faf8180bSLudovic Desroches | ATMCI_MR_CLKODD(clkdiv & 1); 1309faf8180bSLudovic Desroches } else { 1310965ebf33SHaavard Skinnemoen clkdiv = DIV_ROUND_UP(host->bus_hz, 2 * clock_min) - 1; 13117d2be074SHaavard Skinnemoen if (clkdiv > 255) { 13127d2be074SHaavard Skinnemoen dev_warn(&mmc->class_dev, 13137d2be074SHaavard Skinnemoen "clock %u too slow; using %lu\n", 1314965ebf33SHaavard Skinnemoen clock_min, host->bus_hz / (2 * 256)); 13157d2be074SHaavard Skinnemoen clkdiv = 255; 13167d2be074SHaavard Skinnemoen } 13172c96a293SLudovic Desroches host->mode_reg = ATMCI_MR_CLKDIV(clkdiv); 1318faf8180bSLudovic Desroches } 131904d699c3SRob Emanuele 1320965ebf33SHaavard Skinnemoen /* 1321965ebf33SHaavard Skinnemoen * WRPROOF and RDPROOF prevent overruns/underruns by 1322965ebf33SHaavard Skinnemoen * stopping the clock when the FIFO is full/empty. 1323965ebf33SHaavard Skinnemoen * This state is not expected to last for long. 1324965ebf33SHaavard Skinnemoen */ 1325796211b7SLudovic Desroches if (host->caps.has_rwproof) 13262c96a293SLudovic Desroches host->mode_reg |= (ATMCI_MR_WRPROOF | ATMCI_MR_RDPROOF); 13277d2be074SHaavard Skinnemoen 1328796211b7SLudovic Desroches if (host->caps.has_cfg_reg) { 132999ddffd8SNicolas Ferre /* setup High Speed mode in relation with card capacity */ 133099ddffd8SNicolas Ferre if (ios->timing == MMC_TIMING_SD_HS) 13312c96a293SLudovic Desroches host->cfg_reg |= ATMCI_CFG_HSMODE; 1332965ebf33SHaavard Skinnemoen else 13332c96a293SLudovic Desroches host->cfg_reg &= ~ATMCI_CFG_HSMODE; 133499ddffd8SNicolas Ferre } 133599ddffd8SNicolas Ferre 133699ddffd8SNicolas Ferre if (list_empty(&host->queue)) { 133703fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_MR, host->mode_reg); 1338796211b7SLudovic Desroches if (host->caps.has_cfg_reg) 133903fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CFG, host->cfg_reg); 134099ddffd8SNicolas Ferre } else { 1341965ebf33SHaavard Skinnemoen host->need_clock_update = true; 134299ddffd8SNicolas Ferre } 1343965ebf33SHaavard Skinnemoen 1344965ebf33SHaavard Skinnemoen spin_unlock_bh(&host->lock); 1345945533b5SHaavard Skinnemoen } else { 1346965ebf33SHaavard Skinnemoen bool any_slot_active = false; 1347965ebf33SHaavard Skinnemoen 1348965ebf33SHaavard Skinnemoen spin_lock_bh(&host->lock); 1349965ebf33SHaavard Skinnemoen slot->clock = 0; 13502c96a293SLudovic Desroches for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) { 1351965ebf33SHaavard Skinnemoen if (host->slot[i] && host->slot[i]->clock) { 1352965ebf33SHaavard Skinnemoen any_slot_active = true; 1353965ebf33SHaavard Skinnemoen break; 1354965ebf33SHaavard Skinnemoen } 1355965ebf33SHaavard Skinnemoen } 1356965ebf33SHaavard Skinnemoen if (!any_slot_active) { 135703fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIDIS); 1358945533b5SHaavard Skinnemoen if (host->mode_reg) { 135903fc9a7fSLudovic Desroches atmci_readl(host, ATMCI_MR); 1360945533b5SHaavard Skinnemoen clk_disable(host->mck); 1361945533b5SHaavard Skinnemoen } 1362945533b5SHaavard Skinnemoen host->mode_reg = 0; 13637d2be074SHaavard Skinnemoen } 1364965ebf33SHaavard Skinnemoen spin_unlock_bh(&host->lock); 1365965ebf33SHaavard Skinnemoen } 13667d2be074SHaavard Skinnemoen 13677d2be074SHaavard Skinnemoen switch (ios->power_mode) { 1368965ebf33SHaavard Skinnemoen case MMC_POWER_UP: 1369965ebf33SHaavard Skinnemoen set_bit(ATMCI_CARD_NEED_INIT, &slot->flags); 1370965ebf33SHaavard Skinnemoen break; 13717d2be074SHaavard Skinnemoen default: 13727d2be074SHaavard Skinnemoen /* 13737d2be074SHaavard Skinnemoen * TODO: None of the currently available AVR32-based 13747d2be074SHaavard Skinnemoen * boards allow MMC power to be turned off. Implement 13757d2be074SHaavard Skinnemoen * power control when this can be tested properly. 1376965ebf33SHaavard Skinnemoen * 1377965ebf33SHaavard Skinnemoen * We also need to hook this into the clock management 1378965ebf33SHaavard Skinnemoen * somehow so that newly inserted cards aren't 1379965ebf33SHaavard Skinnemoen * subjected to a fast clock before we have a chance 1380965ebf33SHaavard Skinnemoen * to figure out what the maximum rate is. Currently, 1381965ebf33SHaavard Skinnemoen * there's no way to avoid this, and there never will 1382965ebf33SHaavard Skinnemoen * be for boards that don't support power control. 13837d2be074SHaavard Skinnemoen */ 13847d2be074SHaavard Skinnemoen break; 13857d2be074SHaavard Skinnemoen } 13867d2be074SHaavard Skinnemoen } 13877d2be074SHaavard Skinnemoen 13887d2be074SHaavard Skinnemoen static int atmci_get_ro(struct mmc_host *mmc) 13897d2be074SHaavard Skinnemoen { 1390965ebf33SHaavard Skinnemoen int read_only = -ENOSYS; 1391965ebf33SHaavard Skinnemoen struct atmel_mci_slot *slot = mmc_priv(mmc); 13927d2be074SHaavard Skinnemoen 1393965ebf33SHaavard Skinnemoen if (gpio_is_valid(slot->wp_pin)) { 1394965ebf33SHaavard Skinnemoen read_only = gpio_get_value(slot->wp_pin); 13957d2be074SHaavard Skinnemoen dev_dbg(&mmc->class_dev, "card is %s\n", 13967d2be074SHaavard Skinnemoen read_only ? "read-only" : "read-write"); 13977d2be074SHaavard Skinnemoen } 13987d2be074SHaavard Skinnemoen 13997d2be074SHaavard Skinnemoen return read_only; 14007d2be074SHaavard Skinnemoen } 14017d2be074SHaavard Skinnemoen 1402965ebf33SHaavard Skinnemoen static int atmci_get_cd(struct mmc_host *mmc) 1403965ebf33SHaavard Skinnemoen { 1404965ebf33SHaavard Skinnemoen int present = -ENOSYS; 1405965ebf33SHaavard Skinnemoen struct atmel_mci_slot *slot = mmc_priv(mmc); 1406965ebf33SHaavard Skinnemoen 1407965ebf33SHaavard Skinnemoen if (gpio_is_valid(slot->detect_pin)) { 14081c1452beSJonas Larsson present = !(gpio_get_value(slot->detect_pin) ^ 14091c1452beSJonas Larsson slot->detect_is_active_high); 1410965ebf33SHaavard Skinnemoen dev_dbg(&mmc->class_dev, "card is %spresent\n", 1411965ebf33SHaavard Skinnemoen present ? "" : "not "); 1412965ebf33SHaavard Skinnemoen } 1413965ebf33SHaavard Skinnemoen 1414965ebf33SHaavard Skinnemoen return present; 1415965ebf33SHaavard Skinnemoen } 1416965ebf33SHaavard Skinnemoen 141788ff82edSAnders Grahn static void atmci_enable_sdio_irq(struct mmc_host *mmc, int enable) 141888ff82edSAnders Grahn { 141988ff82edSAnders Grahn struct atmel_mci_slot *slot = mmc_priv(mmc); 142088ff82edSAnders Grahn struct atmel_mci *host = slot->host; 142188ff82edSAnders Grahn 142288ff82edSAnders Grahn if (enable) 142303fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_IER, slot->sdio_irq); 142488ff82edSAnders Grahn else 142503fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_IDR, slot->sdio_irq); 142688ff82edSAnders Grahn } 142788ff82edSAnders Grahn 1428965ebf33SHaavard Skinnemoen static const struct mmc_host_ops atmci_ops = { 14297d2be074SHaavard Skinnemoen .request = atmci_request, 14307d2be074SHaavard Skinnemoen .set_ios = atmci_set_ios, 14317d2be074SHaavard Skinnemoen .get_ro = atmci_get_ro, 1432965ebf33SHaavard Skinnemoen .get_cd = atmci_get_cd, 143388ff82edSAnders Grahn .enable_sdio_irq = atmci_enable_sdio_irq, 14347d2be074SHaavard Skinnemoen }; 14357d2be074SHaavard Skinnemoen 1436965ebf33SHaavard Skinnemoen /* Called with host->lock held */ 1437965ebf33SHaavard Skinnemoen static void atmci_request_end(struct atmel_mci *host, struct mmc_request *mrq) 1438965ebf33SHaavard Skinnemoen __releases(&host->lock) 1439965ebf33SHaavard Skinnemoen __acquires(&host->lock) 1440965ebf33SHaavard Skinnemoen { 1441965ebf33SHaavard Skinnemoen struct atmel_mci_slot *slot = NULL; 1442965ebf33SHaavard Skinnemoen struct mmc_host *prev_mmc = host->cur_slot->mmc; 1443965ebf33SHaavard Skinnemoen 1444965ebf33SHaavard Skinnemoen WARN_ON(host->cmd || host->data); 1445965ebf33SHaavard Skinnemoen 1446965ebf33SHaavard Skinnemoen /* 1447965ebf33SHaavard Skinnemoen * Update the MMC clock rate if necessary. This may be 1448965ebf33SHaavard Skinnemoen * necessary if set_ios() is called when a different slot is 144925985edcSLucas De Marchi * busy transferring data. 1450965ebf33SHaavard Skinnemoen */ 145199ddffd8SNicolas Ferre if (host->need_clock_update) { 145203fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_MR, host->mode_reg); 1453796211b7SLudovic Desroches if (host->caps.has_cfg_reg) 145403fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CFG, host->cfg_reg); 145599ddffd8SNicolas Ferre } 1456965ebf33SHaavard Skinnemoen 1457965ebf33SHaavard Skinnemoen host->cur_slot->mrq = NULL; 1458965ebf33SHaavard Skinnemoen host->mrq = NULL; 1459965ebf33SHaavard Skinnemoen if (!list_empty(&host->queue)) { 1460965ebf33SHaavard Skinnemoen slot = list_entry(host->queue.next, 1461965ebf33SHaavard Skinnemoen struct atmel_mci_slot, queue_node); 1462965ebf33SHaavard Skinnemoen list_del(&slot->queue_node); 1463965ebf33SHaavard Skinnemoen dev_vdbg(&host->pdev->dev, "list not empty: %s is next\n", 1464965ebf33SHaavard Skinnemoen mmc_hostname(slot->mmc)); 1465965ebf33SHaavard Skinnemoen host->state = STATE_SENDING_CMD; 1466965ebf33SHaavard Skinnemoen atmci_start_request(host, slot); 1467965ebf33SHaavard Skinnemoen } else { 1468965ebf33SHaavard Skinnemoen dev_vdbg(&host->pdev->dev, "list empty\n"); 1469965ebf33SHaavard Skinnemoen host->state = STATE_IDLE; 1470965ebf33SHaavard Skinnemoen } 1471965ebf33SHaavard Skinnemoen 147224011f34SLudovic Desroches del_timer(&host->timer); 147324011f34SLudovic Desroches 1474965ebf33SHaavard Skinnemoen spin_unlock(&host->lock); 1475965ebf33SHaavard Skinnemoen mmc_request_done(prev_mmc, mrq); 1476965ebf33SHaavard Skinnemoen spin_lock(&host->lock); 1477965ebf33SHaavard Skinnemoen } 1478965ebf33SHaavard Skinnemoen 14797d2be074SHaavard Skinnemoen static void atmci_command_complete(struct atmel_mci *host, 1480c06ad258SHaavard Skinnemoen struct mmc_command *cmd) 14817d2be074SHaavard Skinnemoen { 1482c06ad258SHaavard Skinnemoen u32 status = host->cmd_status; 1483c06ad258SHaavard Skinnemoen 14847d2be074SHaavard Skinnemoen /* Read the response from the card (up to 16 bytes) */ 148503fc9a7fSLudovic Desroches cmd->resp[0] = atmci_readl(host, ATMCI_RSPR); 148603fc9a7fSLudovic Desroches cmd->resp[1] = atmci_readl(host, ATMCI_RSPR); 148703fc9a7fSLudovic Desroches cmd->resp[2] = atmci_readl(host, ATMCI_RSPR); 148803fc9a7fSLudovic Desroches cmd->resp[3] = atmci_readl(host, ATMCI_RSPR); 14897d2be074SHaavard Skinnemoen 14902c96a293SLudovic Desroches if (status & ATMCI_RTOE) 14917d2be074SHaavard Skinnemoen cmd->error = -ETIMEDOUT; 14922c96a293SLudovic Desroches else if ((cmd->flags & MMC_RSP_CRC) && (status & ATMCI_RCRCE)) 14937d2be074SHaavard Skinnemoen cmd->error = -EILSEQ; 14942c96a293SLudovic Desroches else if (status & (ATMCI_RINDE | ATMCI_RDIRE | ATMCI_RENDE)) 14957d2be074SHaavard Skinnemoen cmd->error = -EIO; 149624011f34SLudovic Desroches else if (host->mrq->data && (host->mrq->data->blksz & 3)) { 149724011f34SLudovic Desroches if (host->caps.need_blksz_mul_4) { 149824011f34SLudovic Desroches cmd->error = -EINVAL; 149924011f34SLudovic Desroches host->need_reset = 1; 150024011f34SLudovic Desroches } 150124011f34SLudovic Desroches } else 15027d2be074SHaavard Skinnemoen cmd->error = 0; 15037d2be074SHaavard Skinnemoen } 15047d2be074SHaavard Skinnemoen 15057d2be074SHaavard Skinnemoen static void atmci_detect_change(unsigned long data) 15067d2be074SHaavard Skinnemoen { 1507965ebf33SHaavard Skinnemoen struct atmel_mci_slot *slot = (struct atmel_mci_slot *)data; 1508965ebf33SHaavard Skinnemoen bool present; 1509965ebf33SHaavard Skinnemoen bool present_old; 15107d2be074SHaavard Skinnemoen 15117d2be074SHaavard Skinnemoen /* 1512965ebf33SHaavard Skinnemoen * atmci_cleanup_slot() sets the ATMCI_SHUTDOWN flag before 1513965ebf33SHaavard Skinnemoen * freeing the interrupt. We must not re-enable the interrupt 1514965ebf33SHaavard Skinnemoen * if it has been freed, and if we're shutting down, it 1515965ebf33SHaavard Skinnemoen * doesn't really matter whether the card is present or not. 15167d2be074SHaavard Skinnemoen */ 15177d2be074SHaavard Skinnemoen smp_rmb(); 1518965ebf33SHaavard Skinnemoen if (test_bit(ATMCI_SHUTDOWN, &slot->flags)) 15197d2be074SHaavard Skinnemoen return; 15207d2be074SHaavard Skinnemoen 1521965ebf33SHaavard Skinnemoen enable_irq(gpio_to_irq(slot->detect_pin)); 15221c1452beSJonas Larsson present = !(gpio_get_value(slot->detect_pin) ^ 15231c1452beSJonas Larsson slot->detect_is_active_high); 1524965ebf33SHaavard Skinnemoen present_old = test_bit(ATMCI_CARD_PRESENT, &slot->flags); 15257d2be074SHaavard Skinnemoen 1526965ebf33SHaavard Skinnemoen dev_vdbg(&slot->mmc->class_dev, "detect change: %d (was %d)\n", 1527965ebf33SHaavard Skinnemoen present, present_old); 15287d2be074SHaavard Skinnemoen 1529965ebf33SHaavard Skinnemoen if (present != present_old) { 1530965ebf33SHaavard Skinnemoen struct atmel_mci *host = slot->host; 1531965ebf33SHaavard Skinnemoen struct mmc_request *mrq; 1532965ebf33SHaavard Skinnemoen 1533965ebf33SHaavard Skinnemoen dev_dbg(&slot->mmc->class_dev, "card %s\n", 15347d2be074SHaavard Skinnemoen present ? "inserted" : "removed"); 15357d2be074SHaavard Skinnemoen 1536965ebf33SHaavard Skinnemoen spin_lock(&host->lock); 1537965ebf33SHaavard Skinnemoen 1538965ebf33SHaavard Skinnemoen if (!present) 1539965ebf33SHaavard Skinnemoen clear_bit(ATMCI_CARD_PRESENT, &slot->flags); 1540965ebf33SHaavard Skinnemoen else 1541965ebf33SHaavard Skinnemoen set_bit(ATMCI_CARD_PRESENT, &slot->flags); 15427d2be074SHaavard Skinnemoen 15437d2be074SHaavard Skinnemoen /* Clean up queue if present */ 1544965ebf33SHaavard Skinnemoen mrq = slot->mrq; 15457d2be074SHaavard Skinnemoen if (mrq) { 1546965ebf33SHaavard Skinnemoen if (mrq == host->mrq) { 15477d2be074SHaavard Skinnemoen /* 15487d2be074SHaavard Skinnemoen * Reset controller to terminate any ongoing 15497d2be074SHaavard Skinnemoen * commands or data transfers. 15507d2be074SHaavard Skinnemoen */ 155103fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST); 155203fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIEN); 155303fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_MR, host->mode_reg); 1554796211b7SLudovic Desroches if (host->caps.has_cfg_reg) 155503fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CFG, host->cfg_reg); 15567d2be074SHaavard Skinnemoen 15577d2be074SHaavard Skinnemoen host->data = NULL; 15587d2be074SHaavard Skinnemoen host->cmd = NULL; 1559c06ad258SHaavard Skinnemoen 1560c06ad258SHaavard Skinnemoen switch (host->state) { 1561965ebf33SHaavard Skinnemoen case STATE_IDLE: 1562965ebf33SHaavard Skinnemoen break; 1563c06ad258SHaavard Skinnemoen case STATE_SENDING_CMD: 1564c06ad258SHaavard Skinnemoen mrq->cmd->error = -ENOMEDIUM; 1565f5177547SLudovic Desroches if (mrq->data) 1566f5177547SLudovic Desroches host->stop_transfer(host); 1567c06ad258SHaavard Skinnemoen break; 1568f5177547SLudovic Desroches case STATE_DATA_XFER: 1569c06ad258SHaavard Skinnemoen mrq->data->error = -ENOMEDIUM; 1570796211b7SLudovic Desroches host->stop_transfer(host); 1571c06ad258SHaavard Skinnemoen break; 1572f5177547SLudovic Desroches case STATE_WAITING_NOTBUSY: 1573c06ad258SHaavard Skinnemoen mrq->data->error = -ENOMEDIUM; 1574c06ad258SHaavard Skinnemoen break; 1575c06ad258SHaavard Skinnemoen case STATE_SENDING_STOP: 1576c06ad258SHaavard Skinnemoen mrq->stop->error = -ENOMEDIUM; 1577c06ad258SHaavard Skinnemoen break; 1578f5177547SLudovic Desroches case STATE_END_REQUEST: 1579f5177547SLudovic Desroches break; 1580c06ad258SHaavard Skinnemoen } 1581c06ad258SHaavard Skinnemoen 1582965ebf33SHaavard Skinnemoen atmci_request_end(host, mrq); 1583965ebf33SHaavard Skinnemoen } else { 1584965ebf33SHaavard Skinnemoen list_del(&slot->queue_node); 1585965ebf33SHaavard Skinnemoen mrq->cmd->error = -ENOMEDIUM; 1586965ebf33SHaavard Skinnemoen if (mrq->data) 1587965ebf33SHaavard Skinnemoen mrq->data->error = -ENOMEDIUM; 1588965ebf33SHaavard Skinnemoen if (mrq->stop) 1589965ebf33SHaavard Skinnemoen mrq->stop->error = -ENOMEDIUM; 15907d2be074SHaavard Skinnemoen 1591965ebf33SHaavard Skinnemoen spin_unlock(&host->lock); 1592965ebf33SHaavard Skinnemoen mmc_request_done(slot->mmc, mrq); 1593965ebf33SHaavard Skinnemoen spin_lock(&host->lock); 1594965ebf33SHaavard Skinnemoen } 1595965ebf33SHaavard Skinnemoen } 1596965ebf33SHaavard Skinnemoen spin_unlock(&host->lock); 1597965ebf33SHaavard Skinnemoen 1598965ebf33SHaavard Skinnemoen mmc_detect_change(slot->mmc, 0); 15997d2be074SHaavard Skinnemoen } 16007d2be074SHaavard Skinnemoen } 16017d2be074SHaavard Skinnemoen 16027d2be074SHaavard Skinnemoen static void atmci_tasklet_func(unsigned long priv) 16037d2be074SHaavard Skinnemoen { 1604965ebf33SHaavard Skinnemoen struct atmel_mci *host = (struct atmel_mci *)priv; 16057d2be074SHaavard Skinnemoen struct mmc_request *mrq = host->mrq; 16067d2be074SHaavard Skinnemoen struct mmc_data *data = host->data; 1607c06ad258SHaavard Skinnemoen enum atmel_mci_state state = host->state; 1608c06ad258SHaavard Skinnemoen enum atmel_mci_state prev_state; 1609c06ad258SHaavard Skinnemoen u32 status; 1610c06ad258SHaavard Skinnemoen 1611965ebf33SHaavard Skinnemoen spin_lock(&host->lock); 1612965ebf33SHaavard Skinnemoen 1613c06ad258SHaavard Skinnemoen state = host->state; 16147d2be074SHaavard Skinnemoen 1615965ebf33SHaavard Skinnemoen dev_vdbg(&host->pdev->dev, 1616c06ad258SHaavard Skinnemoen "tasklet: state %u pending/completed/mask %lx/%lx/%x\n", 1617c06ad258SHaavard Skinnemoen state, host->pending_events, host->completed_events, 161803fc9a7fSLudovic Desroches atmci_readl(host, ATMCI_IMR)); 16197d2be074SHaavard Skinnemoen 1620c06ad258SHaavard Skinnemoen do { 1621c06ad258SHaavard Skinnemoen prev_state = state; 16226801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "FSM: state=%d\n", state); 1623c06ad258SHaavard Skinnemoen 1624c06ad258SHaavard Skinnemoen switch (state) { 1625965ebf33SHaavard Skinnemoen case STATE_IDLE: 1626965ebf33SHaavard Skinnemoen break; 1627965ebf33SHaavard Skinnemoen 1628c06ad258SHaavard Skinnemoen case STATE_SENDING_CMD: 1629f5177547SLudovic Desroches /* 1630f5177547SLudovic Desroches * Command has been sent, we are waiting for command 1631f5177547SLudovic Desroches * ready. Then we have three next states possible: 1632f5177547SLudovic Desroches * END_REQUEST by default, WAITING_NOTBUSY if it's a 1633f5177547SLudovic Desroches * command needing it or DATA_XFER if there is data. 1634f5177547SLudovic Desroches */ 16356801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "FSM: cmd ready?\n"); 1636c06ad258SHaavard Skinnemoen if (!atmci_test_and_clear_pending(host, 1637f5177547SLudovic Desroches EVENT_CMD_RDY)) 1638c06ad258SHaavard Skinnemoen break; 1639c06ad258SHaavard Skinnemoen 16406801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "set completed cmd ready\n"); 16417d2be074SHaavard Skinnemoen host->cmd = NULL; 1642f5177547SLudovic Desroches atmci_set_completed(host, EVENT_CMD_RDY); 1643c06ad258SHaavard Skinnemoen atmci_command_complete(host, mrq->cmd); 1644f5177547SLudovic Desroches if (mrq->data) { 16456801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, 16466801c41aSLudovic Desroches "command with data transfer"); 1647f5177547SLudovic Desroches /* 1648f5177547SLudovic Desroches * If there is a command error don't start 1649f5177547SLudovic Desroches * data transfer. 1650f5177547SLudovic Desroches */ 1651f5177547SLudovic Desroches if (mrq->cmd->error) { 1652f5177547SLudovic Desroches host->stop_transfer(host); 1653f5177547SLudovic Desroches host->data = NULL; 1654f5177547SLudovic Desroches atmci_writel(host, ATMCI_IDR, 1655f5177547SLudovic Desroches ATMCI_TXRDY | ATMCI_RXRDY 1656f5177547SLudovic Desroches | ATMCI_DATA_ERROR_FLAGS); 1657f5177547SLudovic Desroches state = STATE_END_REQUEST; 1658f5177547SLudovic Desroches } else 1659f5177547SLudovic Desroches state = STATE_DATA_XFER; 1660f5177547SLudovic Desroches } else if ((!mrq->data) && (mrq->cmd->flags & MMC_RSP_BUSY)) { 16616801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, 16626801c41aSLudovic Desroches "command response need waiting notbusy"); 1663f5177547SLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY); 1664f5177547SLudovic Desroches state = STATE_WAITING_NOTBUSY; 1665f5177547SLudovic Desroches } else 1666f5177547SLudovic Desroches state = STATE_END_REQUEST; 1667c06ad258SHaavard Skinnemoen 1668f5177547SLudovic Desroches break; 1669c06ad258SHaavard Skinnemoen 1670f5177547SLudovic Desroches case STATE_DATA_XFER: 1671c06ad258SHaavard Skinnemoen if (atmci_test_and_clear_pending(host, 1672c06ad258SHaavard Skinnemoen EVENT_DATA_ERROR)) { 16736801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "set completed data error\n"); 1674f5177547SLudovic Desroches atmci_set_completed(host, EVENT_DATA_ERROR); 1675f5177547SLudovic Desroches state = STATE_END_REQUEST; 1676c06ad258SHaavard Skinnemoen break; 16777d2be074SHaavard Skinnemoen } 16787d2be074SHaavard Skinnemoen 1679f5177547SLudovic Desroches /* 1680f5177547SLudovic Desroches * A data transfer is in progress. The event expected 1681f5177547SLudovic Desroches * to move to the next state depends of data transfer 1682f5177547SLudovic Desroches * type (PDC or DMA). Once transfer done we can move 1683f5177547SLudovic Desroches * to the next step which is WAITING_NOTBUSY in write 1684f5177547SLudovic Desroches * case and directly SENDING_STOP in read case. 1685f5177547SLudovic Desroches */ 16866801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "FSM: xfer complete?\n"); 1687c06ad258SHaavard Skinnemoen if (!atmci_test_and_clear_pending(host, 1688c06ad258SHaavard Skinnemoen EVENT_XFER_COMPLETE)) 1689c06ad258SHaavard Skinnemoen break; 16907d2be074SHaavard Skinnemoen 16916801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, 16926801c41aSLudovic Desroches "(%s) set completed xfer complete\n", 16936801c41aSLudovic Desroches __func__); 1694c06ad258SHaavard Skinnemoen atmci_set_completed(host, EVENT_XFER_COMPLETE); 1695c06ad258SHaavard Skinnemoen 1696077d4073SLudovic Desroches if (host->caps.need_notbusy_for_read_ops || 1697077d4073SLudovic Desroches (host->data->flags & MMC_DATA_WRITE)) { 1698f5177547SLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY); 1699f5177547SLudovic Desroches state = STATE_WAITING_NOTBUSY; 1700f5177547SLudovic Desroches } else if (host->mrq->stop) { 1701f5177547SLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_CMDRDY); 1702f5177547SLudovic Desroches atmci_send_stop_cmd(host, data); 1703f5177547SLudovic Desroches state = STATE_SENDING_STOP; 1704f5177547SLudovic Desroches } else { 1705c06ad258SHaavard Skinnemoen host->data = NULL; 17067d2be074SHaavard Skinnemoen data->bytes_xfered = data->blocks * data->blksz; 17077d2be074SHaavard Skinnemoen data->error = 0; 1708f5177547SLudovic Desroches state = STATE_END_REQUEST; 17097d2be074SHaavard Skinnemoen } 1710f5177547SLudovic Desroches break; 17117d2be074SHaavard Skinnemoen 1712f5177547SLudovic Desroches case STATE_WAITING_NOTBUSY: 1713f5177547SLudovic Desroches /* 1714f5177547SLudovic Desroches * We can be in the state for two reasons: a command 1715f5177547SLudovic Desroches * requiring waiting not busy signal (stop command 1716f5177547SLudovic Desroches * included) or a write operation. In the latest case, 1717f5177547SLudovic Desroches * we need to send a stop command. 1718f5177547SLudovic Desroches */ 17196801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "FSM: not busy?\n"); 1720f5177547SLudovic Desroches if (!atmci_test_and_clear_pending(host, 1721f5177547SLudovic Desroches EVENT_NOTBUSY)) 1722f5177547SLudovic Desroches break; 17237d2be074SHaavard Skinnemoen 17246801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "set completed not busy\n"); 1725f5177547SLudovic Desroches atmci_set_completed(host, EVENT_NOTBUSY); 1726f5177547SLudovic Desroches 1727f5177547SLudovic Desroches if (host->data) { 1728f5177547SLudovic Desroches /* 1729f5177547SLudovic Desroches * For some commands such as CMD53, even if 1730f5177547SLudovic Desroches * there is data transfer, there is no stop 1731f5177547SLudovic Desroches * command to send. 1732f5177547SLudovic Desroches */ 1733f5177547SLudovic Desroches if (host->mrq->stop) { 1734f5177547SLudovic Desroches atmci_writel(host, ATMCI_IER, 1735f5177547SLudovic Desroches ATMCI_CMDRDY); 17362c96a293SLudovic Desroches atmci_send_stop_cmd(host, data); 1737f5177547SLudovic Desroches state = STATE_SENDING_STOP; 1738f5177547SLudovic Desroches } else { 1739f5177547SLudovic Desroches host->data = NULL; 1740f5177547SLudovic Desroches data->bytes_xfered = data->blocks 1741f5177547SLudovic Desroches * data->blksz; 1742f5177547SLudovic Desroches data->error = 0; 1743f5177547SLudovic Desroches state = STATE_END_REQUEST; 1744f5177547SLudovic Desroches } 1745f5177547SLudovic Desroches } else 1746f5177547SLudovic Desroches state = STATE_END_REQUEST; 1747f5177547SLudovic Desroches break; 1748c06ad258SHaavard Skinnemoen 1749c06ad258SHaavard Skinnemoen case STATE_SENDING_STOP: 1750f5177547SLudovic Desroches /* 1751f5177547SLudovic Desroches * In this state, it is important to set host->data to 1752f5177547SLudovic Desroches * NULL (which is tested in the waiting notbusy state) 1753f5177547SLudovic Desroches * in order to go to the end request state instead of 1754f5177547SLudovic Desroches * sending stop again. 1755f5177547SLudovic Desroches */ 17566801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "FSM: cmd ready?\n"); 1757c06ad258SHaavard Skinnemoen if (!atmci_test_and_clear_pending(host, 1758f5177547SLudovic Desroches EVENT_CMD_RDY)) 1759c06ad258SHaavard Skinnemoen break; 1760c06ad258SHaavard Skinnemoen 17616801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "FSM: cmd ready\n"); 1762c06ad258SHaavard Skinnemoen host->cmd = NULL; 1763f5177547SLudovic Desroches data->bytes_xfered = data->blocks * data->blksz; 1764f5177547SLudovic Desroches data->error = 0; 1765c06ad258SHaavard Skinnemoen atmci_command_complete(host, mrq->stop); 1766f5177547SLudovic Desroches if (mrq->stop->error) { 1767f5177547SLudovic Desroches host->stop_transfer(host); 1768f5177547SLudovic Desroches atmci_writel(host, ATMCI_IDR, 1769f5177547SLudovic Desroches ATMCI_TXRDY | ATMCI_RXRDY 1770f5177547SLudovic Desroches | ATMCI_DATA_ERROR_FLAGS); 1771f5177547SLudovic Desroches state = STATE_END_REQUEST; 1772f5177547SLudovic Desroches } else { 1773f5177547SLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY); 1774f5177547SLudovic Desroches state = STATE_WAITING_NOTBUSY; 1775f5177547SLudovic Desroches } 177641b4e9a1SNicolas Ferre host->data = NULL; 1777c06ad258SHaavard Skinnemoen break; 1778c06ad258SHaavard Skinnemoen 1779f5177547SLudovic Desroches case STATE_END_REQUEST: 1780f5177547SLudovic Desroches atmci_writel(host, ATMCI_IDR, ATMCI_TXRDY | ATMCI_RXRDY 1781f5177547SLudovic Desroches | ATMCI_DATA_ERROR_FLAGS); 1782f5177547SLudovic Desroches status = host->data_status; 1783f5177547SLudovic Desroches if (unlikely(status)) { 1784f5177547SLudovic Desroches host->stop_transfer(host); 1785f5177547SLudovic Desroches host->data = NULL; 1786f5177547SLudovic Desroches if (status & ATMCI_DTOE) { 1787f5177547SLudovic Desroches data->error = -ETIMEDOUT; 1788f5177547SLudovic Desroches } else if (status & ATMCI_DCRCE) { 1789f5177547SLudovic Desroches data->error = -EILSEQ; 1790f5177547SLudovic Desroches } else { 1791f5177547SLudovic Desroches data->error = -EIO; 1792f5177547SLudovic Desroches } 1793f5177547SLudovic Desroches } 1794f5177547SLudovic Desroches 1795f5177547SLudovic Desroches atmci_request_end(host, host->mrq); 1796f5177547SLudovic Desroches state = STATE_IDLE; 1797c06ad258SHaavard Skinnemoen break; 1798c06ad258SHaavard Skinnemoen } 1799c06ad258SHaavard Skinnemoen } while (state != prev_state); 1800c06ad258SHaavard Skinnemoen 1801c06ad258SHaavard Skinnemoen host->state = state; 1802965ebf33SHaavard Skinnemoen 1803965ebf33SHaavard Skinnemoen spin_unlock(&host->lock); 18047d2be074SHaavard Skinnemoen } 18057d2be074SHaavard Skinnemoen 18067d2be074SHaavard Skinnemoen static void atmci_read_data_pio(struct atmel_mci *host) 18077d2be074SHaavard Skinnemoen { 18087d2be074SHaavard Skinnemoen struct scatterlist *sg = host->sg; 18097d2be074SHaavard Skinnemoen void *buf = sg_virt(sg); 18107d2be074SHaavard Skinnemoen unsigned int offset = host->pio_offset; 18117d2be074SHaavard Skinnemoen struct mmc_data *data = host->data; 18127d2be074SHaavard Skinnemoen u32 value; 18137d2be074SHaavard Skinnemoen u32 status; 18147d2be074SHaavard Skinnemoen unsigned int nbytes = 0; 18157d2be074SHaavard Skinnemoen 18167d2be074SHaavard Skinnemoen do { 181703fc9a7fSLudovic Desroches value = atmci_readl(host, ATMCI_RDR); 18187d2be074SHaavard Skinnemoen if (likely(offset + 4 <= sg->length)) { 18197d2be074SHaavard Skinnemoen put_unaligned(value, (u32 *)(buf + offset)); 18207d2be074SHaavard Skinnemoen 18217d2be074SHaavard Skinnemoen offset += 4; 18227d2be074SHaavard Skinnemoen nbytes += 4; 18237d2be074SHaavard Skinnemoen 18247d2be074SHaavard Skinnemoen if (offset == sg->length) { 18255e7184aeSHaavard Skinnemoen flush_dcache_page(sg_page(sg)); 18267d2be074SHaavard Skinnemoen host->sg = sg = sg_next(sg); 18277d2be074SHaavard Skinnemoen if (!sg) 18287d2be074SHaavard Skinnemoen goto done; 18297d2be074SHaavard Skinnemoen 18307d2be074SHaavard Skinnemoen offset = 0; 18317d2be074SHaavard Skinnemoen buf = sg_virt(sg); 18327d2be074SHaavard Skinnemoen } 18337d2be074SHaavard Skinnemoen } else { 18347d2be074SHaavard Skinnemoen unsigned int remaining = sg->length - offset; 18357d2be074SHaavard Skinnemoen memcpy(buf + offset, &value, remaining); 18367d2be074SHaavard Skinnemoen nbytes += remaining; 18377d2be074SHaavard Skinnemoen 18387d2be074SHaavard Skinnemoen flush_dcache_page(sg_page(sg)); 18397d2be074SHaavard Skinnemoen host->sg = sg = sg_next(sg); 18407d2be074SHaavard Skinnemoen if (!sg) 18417d2be074SHaavard Skinnemoen goto done; 18427d2be074SHaavard Skinnemoen 18437d2be074SHaavard Skinnemoen offset = 4 - remaining; 18447d2be074SHaavard Skinnemoen buf = sg_virt(sg); 18457d2be074SHaavard Skinnemoen memcpy(buf, (u8 *)&value + remaining, offset); 18467d2be074SHaavard Skinnemoen nbytes += offset; 18477d2be074SHaavard Skinnemoen } 18487d2be074SHaavard Skinnemoen 184903fc9a7fSLudovic Desroches status = atmci_readl(host, ATMCI_SR); 18507d2be074SHaavard Skinnemoen if (status & ATMCI_DATA_ERROR_FLAGS) { 185103fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_IDR, (ATMCI_NOTBUSY | ATMCI_RXRDY 18527d2be074SHaavard Skinnemoen | ATMCI_DATA_ERROR_FLAGS)); 18537d2be074SHaavard Skinnemoen host->data_status = status; 1854965ebf33SHaavard Skinnemoen data->bytes_xfered += nbytes; 1855965ebf33SHaavard Skinnemoen return; 18567d2be074SHaavard Skinnemoen } 18572c96a293SLudovic Desroches } while (status & ATMCI_RXRDY); 18587d2be074SHaavard Skinnemoen 18597d2be074SHaavard Skinnemoen host->pio_offset = offset; 18607d2be074SHaavard Skinnemoen data->bytes_xfered += nbytes; 18617d2be074SHaavard Skinnemoen 18627d2be074SHaavard Skinnemoen return; 18637d2be074SHaavard Skinnemoen 18647d2be074SHaavard Skinnemoen done: 186503fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_IDR, ATMCI_RXRDY); 186603fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY); 18677d2be074SHaavard Skinnemoen data->bytes_xfered += nbytes; 1868965ebf33SHaavard Skinnemoen smp_wmb(); 1869c06ad258SHaavard Skinnemoen atmci_set_pending(host, EVENT_XFER_COMPLETE); 18707d2be074SHaavard Skinnemoen } 18717d2be074SHaavard Skinnemoen 18727d2be074SHaavard Skinnemoen static void atmci_write_data_pio(struct atmel_mci *host) 18737d2be074SHaavard Skinnemoen { 18747d2be074SHaavard Skinnemoen struct scatterlist *sg = host->sg; 18757d2be074SHaavard Skinnemoen void *buf = sg_virt(sg); 18767d2be074SHaavard Skinnemoen unsigned int offset = host->pio_offset; 18777d2be074SHaavard Skinnemoen struct mmc_data *data = host->data; 18787d2be074SHaavard Skinnemoen u32 value; 18797d2be074SHaavard Skinnemoen u32 status; 18807d2be074SHaavard Skinnemoen unsigned int nbytes = 0; 18817d2be074SHaavard Skinnemoen 18827d2be074SHaavard Skinnemoen do { 18837d2be074SHaavard Skinnemoen if (likely(offset + 4 <= sg->length)) { 18847d2be074SHaavard Skinnemoen value = get_unaligned((u32 *)(buf + offset)); 188503fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_TDR, value); 18867d2be074SHaavard Skinnemoen 18877d2be074SHaavard Skinnemoen offset += 4; 18887d2be074SHaavard Skinnemoen nbytes += 4; 18897d2be074SHaavard Skinnemoen if (offset == sg->length) { 18907d2be074SHaavard Skinnemoen host->sg = sg = sg_next(sg); 18917d2be074SHaavard Skinnemoen if (!sg) 18927d2be074SHaavard Skinnemoen goto done; 18937d2be074SHaavard Skinnemoen 18947d2be074SHaavard Skinnemoen offset = 0; 18957d2be074SHaavard Skinnemoen buf = sg_virt(sg); 18967d2be074SHaavard Skinnemoen } 18977d2be074SHaavard Skinnemoen } else { 18987d2be074SHaavard Skinnemoen unsigned int remaining = sg->length - offset; 18997d2be074SHaavard Skinnemoen 19007d2be074SHaavard Skinnemoen value = 0; 19017d2be074SHaavard Skinnemoen memcpy(&value, buf + offset, remaining); 19027d2be074SHaavard Skinnemoen nbytes += remaining; 19037d2be074SHaavard Skinnemoen 19047d2be074SHaavard Skinnemoen host->sg = sg = sg_next(sg); 19057d2be074SHaavard Skinnemoen if (!sg) { 190603fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_TDR, value); 19077d2be074SHaavard Skinnemoen goto done; 19087d2be074SHaavard Skinnemoen } 19097d2be074SHaavard Skinnemoen 19107d2be074SHaavard Skinnemoen offset = 4 - remaining; 19117d2be074SHaavard Skinnemoen buf = sg_virt(sg); 19127d2be074SHaavard Skinnemoen memcpy((u8 *)&value + remaining, buf, offset); 191303fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_TDR, value); 19147d2be074SHaavard Skinnemoen nbytes += offset; 19157d2be074SHaavard Skinnemoen } 19167d2be074SHaavard Skinnemoen 191703fc9a7fSLudovic Desroches status = atmci_readl(host, ATMCI_SR); 19187d2be074SHaavard Skinnemoen if (status & ATMCI_DATA_ERROR_FLAGS) { 191903fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_IDR, (ATMCI_NOTBUSY | ATMCI_TXRDY 19207d2be074SHaavard Skinnemoen | ATMCI_DATA_ERROR_FLAGS)); 19217d2be074SHaavard Skinnemoen host->data_status = status; 1922965ebf33SHaavard Skinnemoen data->bytes_xfered += nbytes; 1923965ebf33SHaavard Skinnemoen return; 19247d2be074SHaavard Skinnemoen } 19252c96a293SLudovic Desroches } while (status & ATMCI_TXRDY); 19267d2be074SHaavard Skinnemoen 19277d2be074SHaavard Skinnemoen host->pio_offset = offset; 19287d2be074SHaavard Skinnemoen data->bytes_xfered += nbytes; 19297d2be074SHaavard Skinnemoen 19307d2be074SHaavard Skinnemoen return; 19317d2be074SHaavard Skinnemoen 19327d2be074SHaavard Skinnemoen done: 193303fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_IDR, ATMCI_TXRDY); 193403fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY); 19357d2be074SHaavard Skinnemoen data->bytes_xfered += nbytes; 1936965ebf33SHaavard Skinnemoen smp_wmb(); 1937c06ad258SHaavard Skinnemoen atmci_set_pending(host, EVENT_XFER_COMPLETE); 19387d2be074SHaavard Skinnemoen } 19397d2be074SHaavard Skinnemoen 194088ff82edSAnders Grahn static void atmci_sdio_interrupt(struct atmel_mci *host, u32 status) 194188ff82edSAnders Grahn { 194288ff82edSAnders Grahn int i; 194388ff82edSAnders Grahn 19442c96a293SLudovic Desroches for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) { 194588ff82edSAnders Grahn struct atmel_mci_slot *slot = host->slot[i]; 194688ff82edSAnders Grahn if (slot && (status & slot->sdio_irq)) { 194788ff82edSAnders Grahn mmc_signal_sdio_irq(slot->mmc); 194888ff82edSAnders Grahn } 194988ff82edSAnders Grahn } 195088ff82edSAnders Grahn } 195188ff82edSAnders Grahn 195288ff82edSAnders Grahn 19537d2be074SHaavard Skinnemoen static irqreturn_t atmci_interrupt(int irq, void *dev_id) 19547d2be074SHaavard Skinnemoen { 1955965ebf33SHaavard Skinnemoen struct atmel_mci *host = dev_id; 19567d2be074SHaavard Skinnemoen u32 status, mask, pending; 19577d2be074SHaavard Skinnemoen unsigned int pass_count = 0; 19587d2be074SHaavard Skinnemoen 19597d2be074SHaavard Skinnemoen do { 196003fc9a7fSLudovic Desroches status = atmci_readl(host, ATMCI_SR); 196103fc9a7fSLudovic Desroches mask = atmci_readl(host, ATMCI_IMR); 19627d2be074SHaavard Skinnemoen pending = status & mask; 19637d2be074SHaavard Skinnemoen if (!pending) 19647d2be074SHaavard Skinnemoen break; 19657d2be074SHaavard Skinnemoen 19667d2be074SHaavard Skinnemoen if (pending & ATMCI_DATA_ERROR_FLAGS) { 19676801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "IRQ: data error\n"); 196803fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_IDR, ATMCI_DATA_ERROR_FLAGS 1969f5177547SLudovic Desroches | ATMCI_RXRDY | ATMCI_TXRDY 1970f5177547SLudovic Desroches | ATMCI_ENDRX | ATMCI_ENDTX 1971f5177547SLudovic Desroches | ATMCI_RXBUFF | ATMCI_TXBUFE); 1972965ebf33SHaavard Skinnemoen 19737d2be074SHaavard Skinnemoen host->data_status = status; 19746801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "set pending data error\n"); 1975965ebf33SHaavard Skinnemoen smp_wmb(); 19767d2be074SHaavard Skinnemoen atmci_set_pending(host, EVENT_DATA_ERROR); 19777d2be074SHaavard Skinnemoen tasklet_schedule(&host->tasklet); 19787d2be074SHaavard Skinnemoen } 1979796211b7SLudovic Desroches 1980796211b7SLudovic Desroches if (pending & ATMCI_TXBUFE) { 19816801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "IRQ: tx buffer empty\n"); 1982796211b7SLudovic Desroches atmci_writel(host, ATMCI_IDR, ATMCI_TXBUFE); 19837e8ba228SLudovic Desroches atmci_writel(host, ATMCI_IDR, ATMCI_ENDTX); 1984796211b7SLudovic Desroches /* 1985796211b7SLudovic Desroches * We can receive this interruption before having configured 1986796211b7SLudovic Desroches * the second pdc buffer, so we need to reconfigure first and 1987796211b7SLudovic Desroches * second buffers again 1988796211b7SLudovic Desroches */ 1989796211b7SLudovic Desroches if (host->data_size) { 1990796211b7SLudovic Desroches atmci_pdc_set_both_buf(host, XFER_TRANSMIT); 19917e8ba228SLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_ENDTX); 1992796211b7SLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_TXBUFE); 1993796211b7SLudovic Desroches } else { 1994796211b7SLudovic Desroches atmci_pdc_complete(host); 1995796211b7SLudovic Desroches } 19967e8ba228SLudovic Desroches } else if (pending & ATMCI_ENDTX) { 19976801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "IRQ: end of tx buffer\n"); 19987e8ba228SLudovic Desroches atmci_writel(host, ATMCI_IDR, ATMCI_ENDTX); 19997e8ba228SLudovic Desroches 20007e8ba228SLudovic Desroches if (host->data_size) { 20017e8ba228SLudovic Desroches atmci_pdc_set_single_buf(host, 20027e8ba228SLudovic Desroches XFER_TRANSMIT, PDC_SECOND_BUF); 20037e8ba228SLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_ENDTX); 20047e8ba228SLudovic Desroches } 2005796211b7SLudovic Desroches } 2006796211b7SLudovic Desroches 20077e8ba228SLudovic Desroches if (pending & ATMCI_RXBUFF) { 20086801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "IRQ: rx buffer full\n"); 20097e8ba228SLudovic Desroches atmci_writel(host, ATMCI_IDR, ATMCI_RXBUFF); 20107e8ba228SLudovic Desroches atmci_writel(host, ATMCI_IDR, ATMCI_ENDRX); 20117e8ba228SLudovic Desroches /* 20127e8ba228SLudovic Desroches * We can receive this interruption before having configured 20137e8ba228SLudovic Desroches * the second pdc buffer, so we need to reconfigure first and 20147e8ba228SLudovic Desroches * second buffers again 20157e8ba228SLudovic Desroches */ 20167e8ba228SLudovic Desroches if (host->data_size) { 20177e8ba228SLudovic Desroches atmci_pdc_set_both_buf(host, XFER_RECEIVE); 20187e8ba228SLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_ENDRX); 20197e8ba228SLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_RXBUFF); 20207e8ba228SLudovic Desroches } else { 20217e8ba228SLudovic Desroches atmci_pdc_complete(host); 20227e8ba228SLudovic Desroches } 20237e8ba228SLudovic Desroches } else if (pending & ATMCI_ENDRX) { 20246801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "IRQ: end of rx buffer\n"); 2025796211b7SLudovic Desroches atmci_writel(host, ATMCI_IDR, ATMCI_ENDRX); 2026796211b7SLudovic Desroches 2027796211b7SLudovic Desroches if (host->data_size) { 2028796211b7SLudovic Desroches atmci_pdc_set_single_buf(host, 2029796211b7SLudovic Desroches XFER_RECEIVE, PDC_SECOND_BUF); 2030796211b7SLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_ENDRX); 2031796211b7SLudovic Desroches } 2032796211b7SLudovic Desroches } 2033796211b7SLudovic Desroches 2034f5177547SLudovic Desroches /* 2035f5177547SLudovic Desroches * First mci IPs, so mainly the ones having pdc, have some 2036f5177547SLudovic Desroches * issues with the notbusy signal. You can't get it after 2037f5177547SLudovic Desroches * data transmission if you have not sent a stop command. 2038f5177547SLudovic Desroches * The appropriate workaround is to use the BLKE signal. 2039f5177547SLudovic Desroches */ 2040f5177547SLudovic Desroches if (pending & ATMCI_BLKE) { 20416801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "IRQ: blke\n"); 2042f5177547SLudovic Desroches atmci_writel(host, ATMCI_IDR, ATMCI_BLKE); 2043965ebf33SHaavard Skinnemoen smp_wmb(); 20446801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "set pending notbusy\n"); 2045f5177547SLudovic Desroches atmci_set_pending(host, EVENT_NOTBUSY); 20467d2be074SHaavard Skinnemoen tasklet_schedule(&host->tasklet); 20477d2be074SHaavard Skinnemoen } 2048f5177547SLudovic Desroches 2049f5177547SLudovic Desroches if (pending & ATMCI_NOTBUSY) { 20506801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "IRQ: not_busy\n"); 2051f5177547SLudovic Desroches atmci_writel(host, ATMCI_IDR, ATMCI_NOTBUSY); 2052f5177547SLudovic Desroches smp_wmb(); 20536801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "set pending notbusy\n"); 2054f5177547SLudovic Desroches atmci_set_pending(host, EVENT_NOTBUSY); 2055f5177547SLudovic Desroches tasklet_schedule(&host->tasklet); 2056f5177547SLudovic Desroches } 2057f5177547SLudovic Desroches 20582c96a293SLudovic Desroches if (pending & ATMCI_RXRDY) 20597d2be074SHaavard Skinnemoen atmci_read_data_pio(host); 20602c96a293SLudovic Desroches if (pending & ATMCI_TXRDY) 20617d2be074SHaavard Skinnemoen atmci_write_data_pio(host); 20627d2be074SHaavard Skinnemoen 2063f5177547SLudovic Desroches if (pending & ATMCI_CMDRDY) { 20646801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "IRQ: cmd ready\n"); 2065f5177547SLudovic Desroches atmci_writel(host, ATMCI_IDR, ATMCI_CMDRDY); 2066f5177547SLudovic Desroches host->cmd_status = status; 2067f5177547SLudovic Desroches smp_wmb(); 20686801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "set pending cmd rdy\n"); 2069f5177547SLudovic Desroches atmci_set_pending(host, EVENT_CMD_RDY); 2070f5177547SLudovic Desroches tasklet_schedule(&host->tasklet); 2071f5177547SLudovic Desroches } 207288ff82edSAnders Grahn 20732c96a293SLudovic Desroches if (pending & (ATMCI_SDIOIRQA | ATMCI_SDIOIRQB)) 207488ff82edSAnders Grahn atmci_sdio_interrupt(host, status); 207588ff82edSAnders Grahn 20767d2be074SHaavard Skinnemoen } while (pass_count++ < 5); 20777d2be074SHaavard Skinnemoen 20787d2be074SHaavard Skinnemoen return pass_count ? IRQ_HANDLED : IRQ_NONE; 20797d2be074SHaavard Skinnemoen } 20807d2be074SHaavard Skinnemoen 20817d2be074SHaavard Skinnemoen static irqreturn_t atmci_detect_interrupt(int irq, void *dev_id) 20827d2be074SHaavard Skinnemoen { 2083965ebf33SHaavard Skinnemoen struct atmel_mci_slot *slot = dev_id; 20847d2be074SHaavard Skinnemoen 20857d2be074SHaavard Skinnemoen /* 20867d2be074SHaavard Skinnemoen * Disable interrupts until the pin has stabilized and check 20877d2be074SHaavard Skinnemoen * the state then. Use mod_timer() since we may be in the 20887d2be074SHaavard Skinnemoen * middle of the timer routine when this interrupt triggers. 20897d2be074SHaavard Skinnemoen */ 20907d2be074SHaavard Skinnemoen disable_irq_nosync(irq); 2091965ebf33SHaavard Skinnemoen mod_timer(&slot->detect_timer, jiffies + msecs_to_jiffies(20)); 20927d2be074SHaavard Skinnemoen 20937d2be074SHaavard Skinnemoen return IRQ_HANDLED; 20947d2be074SHaavard Skinnemoen } 20957d2be074SHaavard Skinnemoen 2096965ebf33SHaavard Skinnemoen static int __init atmci_init_slot(struct atmel_mci *host, 2097965ebf33SHaavard Skinnemoen struct mci_slot_pdata *slot_data, unsigned int id, 209888ff82edSAnders Grahn u32 sdc_reg, u32 sdio_irq) 2099965ebf33SHaavard Skinnemoen { 2100965ebf33SHaavard Skinnemoen struct mmc_host *mmc; 2101965ebf33SHaavard Skinnemoen struct atmel_mci_slot *slot; 2102965ebf33SHaavard Skinnemoen 2103965ebf33SHaavard Skinnemoen mmc = mmc_alloc_host(sizeof(struct atmel_mci_slot), &host->pdev->dev); 2104965ebf33SHaavard Skinnemoen if (!mmc) 2105965ebf33SHaavard Skinnemoen return -ENOMEM; 2106965ebf33SHaavard Skinnemoen 2107965ebf33SHaavard Skinnemoen slot = mmc_priv(mmc); 2108965ebf33SHaavard Skinnemoen slot->mmc = mmc; 2109965ebf33SHaavard Skinnemoen slot->host = host; 2110965ebf33SHaavard Skinnemoen slot->detect_pin = slot_data->detect_pin; 2111965ebf33SHaavard Skinnemoen slot->wp_pin = slot_data->wp_pin; 21121c1452beSJonas Larsson slot->detect_is_active_high = slot_data->detect_is_active_high; 2113965ebf33SHaavard Skinnemoen slot->sdc_reg = sdc_reg; 211488ff82edSAnders Grahn slot->sdio_irq = sdio_irq; 2115965ebf33SHaavard Skinnemoen 2116e919fd20SLudovic Desroches dev_dbg(&mmc->class_dev, 2117e919fd20SLudovic Desroches "slot[%u]: bus_width=%u, detect_pin=%d, " 2118e919fd20SLudovic Desroches "detect_is_active_high=%s, wp_pin=%d\n", 2119e919fd20SLudovic Desroches id, slot_data->bus_width, slot_data->detect_pin, 2120e919fd20SLudovic Desroches slot_data->detect_is_active_high ? "true" : "false", 2121e919fd20SLudovic Desroches slot_data->wp_pin); 2122e919fd20SLudovic Desroches 2123965ebf33SHaavard Skinnemoen mmc->ops = &atmci_ops; 2124965ebf33SHaavard Skinnemoen mmc->f_min = DIV_ROUND_UP(host->bus_hz, 512); 2125965ebf33SHaavard Skinnemoen mmc->f_max = host->bus_hz / 2; 2126965ebf33SHaavard Skinnemoen mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; 212788ff82edSAnders Grahn if (sdio_irq) 212888ff82edSAnders Grahn mmc->caps |= MMC_CAP_SDIO_IRQ; 2129796211b7SLudovic Desroches if (host->caps.has_highspeed) 213099ddffd8SNicolas Ferre mmc->caps |= MMC_CAP_SD_HIGHSPEED; 21317a90dcc2SLudovic Desroches /* 21327a90dcc2SLudovic Desroches * Without the read/write proof capability, it is strongly suggested to 21337a90dcc2SLudovic Desroches * use only one bit for data to prevent fifo underruns and overruns 21347a90dcc2SLudovic Desroches * which will corrupt data. 21357a90dcc2SLudovic Desroches */ 21367a90dcc2SLudovic Desroches if ((slot_data->bus_width >= 4) && host->caps.has_rwproof) 2137965ebf33SHaavard Skinnemoen mmc->caps |= MMC_CAP_4_BIT_DATA; 2138965ebf33SHaavard Skinnemoen 21397a90dcc2SLudovic Desroches if (atmci_get_version(host) < 0x200) { 21407a90dcc2SLudovic Desroches mmc->max_segs = 256; 21417a90dcc2SLudovic Desroches mmc->max_blk_size = 4095; 21427a90dcc2SLudovic Desroches mmc->max_blk_count = 256; 21437a90dcc2SLudovic Desroches mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; 21447a90dcc2SLudovic Desroches mmc->max_seg_size = mmc->max_blk_size * mmc->max_segs; 21457a90dcc2SLudovic Desroches } else { 2146a36274e0SMartin K. Petersen mmc->max_segs = 64; 2147965ebf33SHaavard Skinnemoen mmc->max_req_size = 32768 * 512; 2148965ebf33SHaavard Skinnemoen mmc->max_blk_size = 32768; 2149965ebf33SHaavard Skinnemoen mmc->max_blk_count = 512; 21507a90dcc2SLudovic Desroches } 2151965ebf33SHaavard Skinnemoen 2152965ebf33SHaavard Skinnemoen /* Assume card is present initially */ 2153965ebf33SHaavard Skinnemoen set_bit(ATMCI_CARD_PRESENT, &slot->flags); 2154965ebf33SHaavard Skinnemoen if (gpio_is_valid(slot->detect_pin)) { 2155965ebf33SHaavard Skinnemoen if (gpio_request(slot->detect_pin, "mmc_detect")) { 2156965ebf33SHaavard Skinnemoen dev_dbg(&mmc->class_dev, "no detect pin available\n"); 2157965ebf33SHaavard Skinnemoen slot->detect_pin = -EBUSY; 21581c1452beSJonas Larsson } else if (gpio_get_value(slot->detect_pin) ^ 21591c1452beSJonas Larsson slot->detect_is_active_high) { 2160965ebf33SHaavard Skinnemoen clear_bit(ATMCI_CARD_PRESENT, &slot->flags); 2161965ebf33SHaavard Skinnemoen } 2162965ebf33SHaavard Skinnemoen } 2163965ebf33SHaavard Skinnemoen 2164965ebf33SHaavard Skinnemoen if (!gpio_is_valid(slot->detect_pin)) 2165965ebf33SHaavard Skinnemoen mmc->caps |= MMC_CAP_NEEDS_POLL; 2166965ebf33SHaavard Skinnemoen 2167965ebf33SHaavard Skinnemoen if (gpio_is_valid(slot->wp_pin)) { 2168965ebf33SHaavard Skinnemoen if (gpio_request(slot->wp_pin, "mmc_wp")) { 2169965ebf33SHaavard Skinnemoen dev_dbg(&mmc->class_dev, "no WP pin available\n"); 2170965ebf33SHaavard Skinnemoen slot->wp_pin = -EBUSY; 2171965ebf33SHaavard Skinnemoen } 2172965ebf33SHaavard Skinnemoen } 2173965ebf33SHaavard Skinnemoen 2174965ebf33SHaavard Skinnemoen host->slot[id] = slot; 2175965ebf33SHaavard Skinnemoen mmc_add_host(mmc); 2176965ebf33SHaavard Skinnemoen 2177965ebf33SHaavard Skinnemoen if (gpio_is_valid(slot->detect_pin)) { 2178965ebf33SHaavard Skinnemoen int ret; 2179965ebf33SHaavard Skinnemoen 2180965ebf33SHaavard Skinnemoen setup_timer(&slot->detect_timer, atmci_detect_change, 2181965ebf33SHaavard Skinnemoen (unsigned long)slot); 2182965ebf33SHaavard Skinnemoen 2183965ebf33SHaavard Skinnemoen ret = request_irq(gpio_to_irq(slot->detect_pin), 2184965ebf33SHaavard Skinnemoen atmci_detect_interrupt, 2185965ebf33SHaavard Skinnemoen IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, 2186965ebf33SHaavard Skinnemoen "mmc-detect", slot); 2187965ebf33SHaavard Skinnemoen if (ret) { 2188965ebf33SHaavard Skinnemoen dev_dbg(&mmc->class_dev, 2189965ebf33SHaavard Skinnemoen "could not request IRQ %d for detect pin\n", 2190965ebf33SHaavard Skinnemoen gpio_to_irq(slot->detect_pin)); 2191965ebf33SHaavard Skinnemoen gpio_free(slot->detect_pin); 2192965ebf33SHaavard Skinnemoen slot->detect_pin = -EBUSY; 2193965ebf33SHaavard Skinnemoen } 2194965ebf33SHaavard Skinnemoen } 2195965ebf33SHaavard Skinnemoen 2196965ebf33SHaavard Skinnemoen atmci_init_debugfs(slot); 2197965ebf33SHaavard Skinnemoen 2198965ebf33SHaavard Skinnemoen return 0; 2199965ebf33SHaavard Skinnemoen } 2200965ebf33SHaavard Skinnemoen 2201965ebf33SHaavard Skinnemoen static void __exit atmci_cleanup_slot(struct atmel_mci_slot *slot, 2202965ebf33SHaavard Skinnemoen unsigned int id) 2203965ebf33SHaavard Skinnemoen { 2204965ebf33SHaavard Skinnemoen /* Debugfs stuff is cleaned up by mmc core */ 2205965ebf33SHaavard Skinnemoen 2206965ebf33SHaavard Skinnemoen set_bit(ATMCI_SHUTDOWN, &slot->flags); 2207965ebf33SHaavard Skinnemoen smp_wmb(); 2208965ebf33SHaavard Skinnemoen 2209965ebf33SHaavard Skinnemoen mmc_remove_host(slot->mmc); 2210965ebf33SHaavard Skinnemoen 2211965ebf33SHaavard Skinnemoen if (gpio_is_valid(slot->detect_pin)) { 2212965ebf33SHaavard Skinnemoen int pin = slot->detect_pin; 2213965ebf33SHaavard Skinnemoen 2214965ebf33SHaavard Skinnemoen free_irq(gpio_to_irq(pin), slot); 2215965ebf33SHaavard Skinnemoen del_timer_sync(&slot->detect_timer); 2216965ebf33SHaavard Skinnemoen gpio_free(pin); 2217965ebf33SHaavard Skinnemoen } 2218965ebf33SHaavard Skinnemoen if (gpio_is_valid(slot->wp_pin)) 2219965ebf33SHaavard Skinnemoen gpio_free(slot->wp_pin); 2220965ebf33SHaavard Skinnemoen 2221965ebf33SHaavard Skinnemoen slot->host->slot[id] = NULL; 2222965ebf33SHaavard Skinnemoen mmc_free_host(slot->mmc); 2223965ebf33SHaavard Skinnemoen } 2224965ebf33SHaavard Skinnemoen 22252c96a293SLudovic Desroches static bool atmci_filter(struct dma_chan *chan, void *slave) 222674465b4fSDan Williams { 22272635d1baSNicolas Ferre struct mci_dma_data *sl = slave; 222874465b4fSDan Williams 22292635d1baSNicolas Ferre if (sl && find_slave_dev(sl) == chan->device->dev) { 22302635d1baSNicolas Ferre chan->private = slave_data_ptr(sl); 22317dd60251SDan Williams return true; 22322635d1baSNicolas Ferre } else { 22337dd60251SDan Williams return false; 223474465b4fSDan Williams } 22352635d1baSNicolas Ferre } 22362635d1baSNicolas Ferre 2237ef878198SLudovic Desroches static bool atmci_configure_dma(struct atmel_mci *host) 22382635d1baSNicolas Ferre { 22392635d1baSNicolas Ferre struct mci_platform_data *pdata; 22402635d1baSNicolas Ferre 22412635d1baSNicolas Ferre if (host == NULL) 2242ef878198SLudovic Desroches return false; 22432635d1baSNicolas Ferre 22442635d1baSNicolas Ferre pdata = host->pdev->dev.platform_data; 22452635d1baSNicolas Ferre 22462635d1baSNicolas Ferre if (pdata && find_slave_dev(pdata->dma_slave)) { 22472635d1baSNicolas Ferre dma_cap_mask_t mask; 22482635d1baSNicolas Ferre 22492635d1baSNicolas Ferre /* Try to grab a DMA channel */ 22502635d1baSNicolas Ferre dma_cap_zero(mask); 22512635d1baSNicolas Ferre dma_cap_set(DMA_SLAVE, mask); 22522635d1baSNicolas Ferre host->dma.chan = 22532c96a293SLudovic Desroches dma_request_channel(mask, atmci_filter, pdata->dma_slave); 22542635d1baSNicolas Ferre } 2255ef878198SLudovic Desroches if (!host->dma.chan) { 2256ef878198SLudovic Desroches dev_warn(&host->pdev->dev, "no DMA channel available\n"); 2257ef878198SLudovic Desroches return false; 2258ef878198SLudovic Desroches } else { 225974791a2dSNicolas Ferre dev_info(&host->pdev->dev, 2260b81cfc41SLudovic Desroches "using %s for DMA transfers\n", 226174791a2dSNicolas Ferre dma_chan_name(host->dma.chan)); 2262e2b35f3dSViresh Kumar 2263e2b35f3dSViresh Kumar host->dma_conf.src_addr = host->mapbase + ATMCI_RDR; 2264e2b35f3dSViresh Kumar host->dma_conf.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; 2265e2b35f3dSViresh Kumar host->dma_conf.src_maxburst = 1; 2266e2b35f3dSViresh Kumar host->dma_conf.dst_addr = host->mapbase + ATMCI_TDR; 2267e2b35f3dSViresh Kumar host->dma_conf.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; 2268e2b35f3dSViresh Kumar host->dma_conf.dst_maxburst = 1; 2269e2b35f3dSViresh Kumar host->dma_conf.device_fc = false; 2270ef878198SLudovic Desroches return true; 2271ef878198SLudovic Desroches } 22722635d1baSNicolas Ferre } 2273796211b7SLudovic Desroches 2274796211b7SLudovic Desroches /* 2275796211b7SLudovic Desroches * HSMCI (High Speed MCI) module is not fully compatible with MCI module. 2276796211b7SLudovic Desroches * HSMCI provides DMA support and a new config register but no more supports 2277796211b7SLudovic Desroches * PDC. 2278796211b7SLudovic Desroches */ 2279796211b7SLudovic Desroches static void __init atmci_get_cap(struct atmel_mci *host) 2280796211b7SLudovic Desroches { 2281796211b7SLudovic Desroches unsigned int version; 2282796211b7SLudovic Desroches 2283796211b7SLudovic Desroches version = atmci_get_version(host); 2284796211b7SLudovic Desroches dev_info(&host->pdev->dev, 2285796211b7SLudovic Desroches "version: 0x%x\n", version); 2286796211b7SLudovic Desroches 2287796211b7SLudovic Desroches host->caps.has_dma = 0; 2288faf8180bSLudovic Desroches host->caps.has_pdc = 1; 2289796211b7SLudovic Desroches host->caps.has_cfg_reg = 0; 2290796211b7SLudovic Desroches host->caps.has_cstor_reg = 0; 2291796211b7SLudovic Desroches host->caps.has_highspeed = 0; 2292796211b7SLudovic Desroches host->caps.has_rwproof = 0; 2293faf8180bSLudovic Desroches host->caps.has_odd_clk_div = 0; 229424011f34SLudovic Desroches host->caps.has_bad_data_ordering = 1; 229524011f34SLudovic Desroches host->caps.need_reset_after_xfer = 1; 229624011f34SLudovic Desroches host->caps.need_blksz_mul_4 = 1; 2297077d4073SLudovic Desroches host->caps.need_notbusy_for_read_ops = 0; 2298796211b7SLudovic Desroches 2299796211b7SLudovic Desroches /* keep only major version number */ 2300796211b7SLudovic Desroches switch (version & 0xf00) { 2301796211b7SLudovic Desroches case 0x500: 2302faf8180bSLudovic Desroches host->caps.has_odd_clk_div = 1; 2303faf8180bSLudovic Desroches case 0x400: 2304faf8180bSLudovic Desroches case 0x300: 2305796211b7SLudovic Desroches #ifdef CONFIG_AT_HDMAC 2306796211b7SLudovic Desroches host->caps.has_dma = 1; 23072635d1baSNicolas Ferre #else 2308796211b7SLudovic Desroches dev_info(&host->pdev->dev, 2309796211b7SLudovic Desroches "has dma capability but dma engine is not selected, then use pio\n"); 231074465b4fSDan Williams #endif 2311faf8180bSLudovic Desroches host->caps.has_pdc = 0; 2312796211b7SLudovic Desroches host->caps.has_cfg_reg = 1; 2313796211b7SLudovic Desroches host->caps.has_cstor_reg = 1; 2314796211b7SLudovic Desroches host->caps.has_highspeed = 1; 2315faf8180bSLudovic Desroches case 0x200: 2316796211b7SLudovic Desroches host->caps.has_rwproof = 1; 231724011f34SLudovic Desroches host->caps.need_blksz_mul_4 = 0; 2318077d4073SLudovic Desroches host->caps.need_notbusy_for_read_ops = 1; 2319faf8180bSLudovic Desroches case 0x100: 232024011f34SLudovic Desroches host->caps.has_bad_data_ordering = 0; 232124011f34SLudovic Desroches host->caps.need_reset_after_xfer = 0; 232224011f34SLudovic Desroches case 0x0: 2323796211b7SLudovic Desroches break; 2324796211b7SLudovic Desroches default: 2325faf8180bSLudovic Desroches host->caps.has_pdc = 0; 2326796211b7SLudovic Desroches dev_warn(&host->pdev->dev, 2327796211b7SLudovic Desroches "Unmanaged mci version, set minimum capabilities\n"); 2328796211b7SLudovic Desroches break; 2329796211b7SLudovic Desroches } 2330796211b7SLudovic Desroches } 233174465b4fSDan Williams 23327d2be074SHaavard Skinnemoen static int __init atmci_probe(struct platform_device *pdev) 23337d2be074SHaavard Skinnemoen { 23347d2be074SHaavard Skinnemoen struct mci_platform_data *pdata; 23357d2be074SHaavard Skinnemoen struct atmel_mci *host; 23367d2be074SHaavard Skinnemoen struct resource *regs; 2337965ebf33SHaavard Skinnemoen unsigned int nr_slots; 23387d2be074SHaavard Skinnemoen int irq; 23397d2be074SHaavard Skinnemoen int ret; 23407d2be074SHaavard Skinnemoen 23417d2be074SHaavard Skinnemoen regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); 23427d2be074SHaavard Skinnemoen if (!regs) 23437d2be074SHaavard Skinnemoen return -ENXIO; 23447d2be074SHaavard Skinnemoen pdata = pdev->dev.platform_data; 2345e919fd20SLudovic Desroches if (!pdata) { 2346e919fd20SLudovic Desroches pdata = atmci_of_init(pdev); 2347e919fd20SLudovic Desroches if (IS_ERR(pdata)) { 2348e919fd20SLudovic Desroches dev_err(&pdev->dev, "platform data not available\n"); 2349e919fd20SLudovic Desroches return PTR_ERR(pdata); 2350e919fd20SLudovic Desroches } 2351e919fd20SLudovic Desroches } 2352e919fd20SLudovic Desroches 23537d2be074SHaavard Skinnemoen irq = platform_get_irq(pdev, 0); 23547d2be074SHaavard Skinnemoen if (irq < 0) 23557d2be074SHaavard Skinnemoen return irq; 23567d2be074SHaavard Skinnemoen 2357965ebf33SHaavard Skinnemoen host = kzalloc(sizeof(struct atmel_mci), GFP_KERNEL); 2358965ebf33SHaavard Skinnemoen if (!host) 23597d2be074SHaavard Skinnemoen return -ENOMEM; 23607d2be074SHaavard Skinnemoen 23617d2be074SHaavard Skinnemoen host->pdev = pdev; 2362965ebf33SHaavard Skinnemoen spin_lock_init(&host->lock); 2363965ebf33SHaavard Skinnemoen INIT_LIST_HEAD(&host->queue); 23647d2be074SHaavard Skinnemoen 23657d2be074SHaavard Skinnemoen host->mck = clk_get(&pdev->dev, "mci_clk"); 23667d2be074SHaavard Skinnemoen if (IS_ERR(host->mck)) { 23677d2be074SHaavard Skinnemoen ret = PTR_ERR(host->mck); 23687d2be074SHaavard Skinnemoen goto err_clk_get; 23697d2be074SHaavard Skinnemoen } 23707d2be074SHaavard Skinnemoen 23717d2be074SHaavard Skinnemoen ret = -ENOMEM; 2372e8e3f6caSH Hartley Sweeten host->regs = ioremap(regs->start, resource_size(regs)); 23737d2be074SHaavard Skinnemoen if (!host->regs) 23747d2be074SHaavard Skinnemoen goto err_ioremap; 23757d2be074SHaavard Skinnemoen 23767d2be074SHaavard Skinnemoen clk_enable(host->mck); 237703fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST); 23787d2be074SHaavard Skinnemoen host->bus_hz = clk_get_rate(host->mck); 23797d2be074SHaavard Skinnemoen clk_disable(host->mck); 23807d2be074SHaavard Skinnemoen 23817d2be074SHaavard Skinnemoen host->mapbase = regs->start; 23827d2be074SHaavard Skinnemoen 2383965ebf33SHaavard Skinnemoen tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)host); 23847d2be074SHaavard Skinnemoen 238589c8aa20SKay Sievers ret = request_irq(irq, atmci_interrupt, 0, dev_name(&pdev->dev), host); 23867d2be074SHaavard Skinnemoen if (ret) 23877d2be074SHaavard Skinnemoen goto err_request_irq; 23887d2be074SHaavard Skinnemoen 2389796211b7SLudovic Desroches /* Get MCI capabilities and set operations according to it */ 2390796211b7SLudovic Desroches atmci_get_cap(host); 2391ef878198SLudovic Desroches if (host->caps.has_dma && atmci_configure_dma(host)) { 2392796211b7SLudovic Desroches host->prepare_data = &atmci_prepare_data_dma; 2393796211b7SLudovic Desroches host->submit_data = &atmci_submit_data_dma; 2394796211b7SLudovic Desroches host->stop_transfer = &atmci_stop_transfer_dma; 2395796211b7SLudovic Desroches } else if (host->caps.has_pdc) { 2396796211b7SLudovic Desroches dev_info(&pdev->dev, "using PDC\n"); 2397796211b7SLudovic Desroches host->prepare_data = &atmci_prepare_data_pdc; 2398796211b7SLudovic Desroches host->submit_data = &atmci_submit_data_pdc; 2399796211b7SLudovic Desroches host->stop_transfer = &atmci_stop_transfer_pdc; 2400796211b7SLudovic Desroches } else { 2401ef878198SLudovic Desroches dev_info(&pdev->dev, "using PIO\n"); 2402796211b7SLudovic Desroches host->prepare_data = &atmci_prepare_data; 2403796211b7SLudovic Desroches host->submit_data = &atmci_submit_data; 2404796211b7SLudovic Desroches host->stop_transfer = &atmci_stop_transfer; 2405796211b7SLudovic Desroches } 2406796211b7SLudovic Desroches 24077d2be074SHaavard Skinnemoen platform_set_drvdata(pdev, host); 24087d2be074SHaavard Skinnemoen 2409b87cc1b5SLudovic Desroches setup_timer(&host->timer, atmci_timeout_timer, (unsigned long)host); 2410b87cc1b5SLudovic Desroches 2411965ebf33SHaavard Skinnemoen /* We need at least one slot to succeed */ 2412965ebf33SHaavard Skinnemoen nr_slots = 0; 2413965ebf33SHaavard Skinnemoen ret = -ENODEV; 2414965ebf33SHaavard Skinnemoen if (pdata->slot[0].bus_width) { 2415965ebf33SHaavard Skinnemoen ret = atmci_init_slot(host, &pdata->slot[0], 24162c96a293SLudovic Desroches 0, ATMCI_SDCSEL_SLOT_A, ATMCI_SDIOIRQA); 24177a90dcc2SLudovic Desroches if (!ret) { 2418965ebf33SHaavard Skinnemoen nr_slots++; 24197a90dcc2SLudovic Desroches host->buf_size = host->slot[0]->mmc->max_req_size; 24207a90dcc2SLudovic Desroches } 24217d2be074SHaavard Skinnemoen } 2422965ebf33SHaavard Skinnemoen if (pdata->slot[1].bus_width) { 2423965ebf33SHaavard Skinnemoen ret = atmci_init_slot(host, &pdata->slot[1], 24242c96a293SLudovic Desroches 1, ATMCI_SDCSEL_SLOT_B, ATMCI_SDIOIRQB); 24257a90dcc2SLudovic Desroches if (!ret) { 2426965ebf33SHaavard Skinnemoen nr_slots++; 24277a90dcc2SLudovic Desroches if (host->slot[1]->mmc->max_req_size > host->buf_size) 24287a90dcc2SLudovic Desroches host->buf_size = 24297a90dcc2SLudovic Desroches host->slot[1]->mmc->max_req_size; 24307a90dcc2SLudovic Desroches } 24317d2be074SHaavard Skinnemoen } 24327d2be074SHaavard Skinnemoen 243304d699c3SRob Emanuele if (!nr_slots) { 243404d699c3SRob Emanuele dev_err(&pdev->dev, "init failed: no slot defined\n"); 2435965ebf33SHaavard Skinnemoen goto err_init_slot; 243604d699c3SRob Emanuele } 24377d2be074SHaavard Skinnemoen 24387a90dcc2SLudovic Desroches if (!host->caps.has_rwproof) { 24397a90dcc2SLudovic Desroches host->buffer = dma_alloc_coherent(&pdev->dev, host->buf_size, 24407a90dcc2SLudovic Desroches &host->buf_phys_addr, 24417a90dcc2SLudovic Desroches GFP_KERNEL); 24427a90dcc2SLudovic Desroches if (!host->buffer) { 24437a90dcc2SLudovic Desroches ret = -ENOMEM; 24447a90dcc2SLudovic Desroches dev_err(&pdev->dev, "buffer allocation failed\n"); 24457a90dcc2SLudovic Desroches goto err_init_slot; 24467a90dcc2SLudovic Desroches } 24477a90dcc2SLudovic Desroches } 24487a90dcc2SLudovic Desroches 2449965ebf33SHaavard Skinnemoen dev_info(&pdev->dev, 2450965ebf33SHaavard Skinnemoen "Atmel MCI controller at 0x%08lx irq %d, %u slots\n", 2451965ebf33SHaavard Skinnemoen host->mapbase, irq, nr_slots); 2452deec9ae3SHaavard Skinnemoen 24537d2be074SHaavard Skinnemoen return 0; 24547d2be074SHaavard Skinnemoen 2455965ebf33SHaavard Skinnemoen err_init_slot: 245674465b4fSDan Williams if (host->dma.chan) 245774465b4fSDan Williams dma_release_channel(host->dma.chan); 2458965ebf33SHaavard Skinnemoen free_irq(irq, host); 24597d2be074SHaavard Skinnemoen err_request_irq: 24607d2be074SHaavard Skinnemoen iounmap(host->regs); 24617d2be074SHaavard Skinnemoen err_ioremap: 24627d2be074SHaavard Skinnemoen clk_put(host->mck); 24637d2be074SHaavard Skinnemoen err_clk_get: 2464965ebf33SHaavard Skinnemoen kfree(host); 24657d2be074SHaavard Skinnemoen return ret; 24667d2be074SHaavard Skinnemoen } 24677d2be074SHaavard Skinnemoen 24687d2be074SHaavard Skinnemoen static int __exit atmci_remove(struct platform_device *pdev) 24697d2be074SHaavard Skinnemoen { 24707d2be074SHaavard Skinnemoen struct atmel_mci *host = platform_get_drvdata(pdev); 2471965ebf33SHaavard Skinnemoen unsigned int i; 24727d2be074SHaavard Skinnemoen 24737d2be074SHaavard Skinnemoen platform_set_drvdata(pdev, NULL); 24747d2be074SHaavard Skinnemoen 24757a90dcc2SLudovic Desroches if (host->buffer) 24767a90dcc2SLudovic Desroches dma_free_coherent(&pdev->dev, host->buf_size, 24777a90dcc2SLudovic Desroches host->buffer, host->buf_phys_addr); 24787a90dcc2SLudovic Desroches 24792c96a293SLudovic Desroches for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) { 2480965ebf33SHaavard Skinnemoen if (host->slot[i]) 2481965ebf33SHaavard Skinnemoen atmci_cleanup_slot(host->slot[i], i); 24827d2be074SHaavard Skinnemoen } 24837d2be074SHaavard Skinnemoen 24847d2be074SHaavard Skinnemoen clk_enable(host->mck); 248503fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_IDR, ~0UL); 248603fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIDIS); 248703fc9a7fSLudovic Desroches atmci_readl(host, ATMCI_SR); 24887d2be074SHaavard Skinnemoen clk_disable(host->mck); 24897d2be074SHaavard Skinnemoen 249065e8b083SHaavard Skinnemoen #ifdef CONFIG_MMC_ATMELMCI_DMA 249174465b4fSDan Williams if (host->dma.chan) 249274465b4fSDan Williams dma_release_channel(host->dma.chan); 249365e8b083SHaavard Skinnemoen #endif 249465e8b083SHaavard Skinnemoen 2495965ebf33SHaavard Skinnemoen free_irq(platform_get_irq(pdev, 0), host); 24967d2be074SHaavard Skinnemoen iounmap(host->regs); 24977d2be074SHaavard Skinnemoen 24987d2be074SHaavard Skinnemoen clk_put(host->mck); 2499965ebf33SHaavard Skinnemoen kfree(host); 25007d2be074SHaavard Skinnemoen 25017d2be074SHaavard Skinnemoen return 0; 25027d2be074SHaavard Skinnemoen } 25037d2be074SHaavard Skinnemoen 25045c2f2b9bSNicolas Ferre #ifdef CONFIG_PM 25055c2f2b9bSNicolas Ferre static int atmci_suspend(struct device *dev) 25065c2f2b9bSNicolas Ferre { 25075c2f2b9bSNicolas Ferre struct atmel_mci *host = dev_get_drvdata(dev); 25085c2f2b9bSNicolas Ferre int i; 25095c2f2b9bSNicolas Ferre 25102c96a293SLudovic Desroches for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) { 25115c2f2b9bSNicolas Ferre struct atmel_mci_slot *slot = host->slot[i]; 25125c2f2b9bSNicolas Ferre int ret; 25135c2f2b9bSNicolas Ferre 25145c2f2b9bSNicolas Ferre if (!slot) 25155c2f2b9bSNicolas Ferre continue; 25165c2f2b9bSNicolas Ferre ret = mmc_suspend_host(slot->mmc); 25175c2f2b9bSNicolas Ferre if (ret < 0) { 25185c2f2b9bSNicolas Ferre while (--i >= 0) { 25195c2f2b9bSNicolas Ferre slot = host->slot[i]; 25205c2f2b9bSNicolas Ferre if (slot 25215c2f2b9bSNicolas Ferre && test_bit(ATMCI_SUSPENDED, &slot->flags)) { 25225c2f2b9bSNicolas Ferre mmc_resume_host(host->slot[i]->mmc); 25235c2f2b9bSNicolas Ferre clear_bit(ATMCI_SUSPENDED, &slot->flags); 25245c2f2b9bSNicolas Ferre } 25255c2f2b9bSNicolas Ferre } 25265c2f2b9bSNicolas Ferre return ret; 25275c2f2b9bSNicolas Ferre } else { 25285c2f2b9bSNicolas Ferre set_bit(ATMCI_SUSPENDED, &slot->flags); 25295c2f2b9bSNicolas Ferre } 25305c2f2b9bSNicolas Ferre } 25315c2f2b9bSNicolas Ferre 25325c2f2b9bSNicolas Ferre return 0; 25335c2f2b9bSNicolas Ferre } 25345c2f2b9bSNicolas Ferre 25355c2f2b9bSNicolas Ferre static int atmci_resume(struct device *dev) 25365c2f2b9bSNicolas Ferre { 25375c2f2b9bSNicolas Ferre struct atmel_mci *host = dev_get_drvdata(dev); 25385c2f2b9bSNicolas Ferre int i; 25395c2f2b9bSNicolas Ferre int ret = 0; 25405c2f2b9bSNicolas Ferre 25412c96a293SLudovic Desroches for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) { 25425c2f2b9bSNicolas Ferre struct atmel_mci_slot *slot = host->slot[i]; 25435c2f2b9bSNicolas Ferre int err; 25445c2f2b9bSNicolas Ferre 25455c2f2b9bSNicolas Ferre slot = host->slot[i]; 25465c2f2b9bSNicolas Ferre if (!slot) 25475c2f2b9bSNicolas Ferre continue; 25485c2f2b9bSNicolas Ferre if (!test_bit(ATMCI_SUSPENDED, &slot->flags)) 25495c2f2b9bSNicolas Ferre continue; 25505c2f2b9bSNicolas Ferre err = mmc_resume_host(slot->mmc); 25515c2f2b9bSNicolas Ferre if (err < 0) 25525c2f2b9bSNicolas Ferre ret = err; 25535c2f2b9bSNicolas Ferre else 25545c2f2b9bSNicolas Ferre clear_bit(ATMCI_SUSPENDED, &slot->flags); 25555c2f2b9bSNicolas Ferre } 25565c2f2b9bSNicolas Ferre 25575c2f2b9bSNicolas Ferre return ret; 25585c2f2b9bSNicolas Ferre } 25595c2f2b9bSNicolas Ferre static SIMPLE_DEV_PM_OPS(atmci_pm, atmci_suspend, atmci_resume); 25605c2f2b9bSNicolas Ferre #define ATMCI_PM_OPS (&atmci_pm) 25615c2f2b9bSNicolas Ferre #else 25625c2f2b9bSNicolas Ferre #define ATMCI_PM_OPS NULL 25635c2f2b9bSNicolas Ferre #endif 25645c2f2b9bSNicolas Ferre 25657d2be074SHaavard Skinnemoen static struct platform_driver atmci_driver = { 25667d2be074SHaavard Skinnemoen .remove = __exit_p(atmci_remove), 25677d2be074SHaavard Skinnemoen .driver = { 25687d2be074SHaavard Skinnemoen .name = "atmel_mci", 25695c2f2b9bSNicolas Ferre .pm = ATMCI_PM_OPS, 2570e919fd20SLudovic Desroches .of_match_table = of_match_ptr(atmci_dt_ids), 25717d2be074SHaavard Skinnemoen }, 25727d2be074SHaavard Skinnemoen }; 25737d2be074SHaavard Skinnemoen 25747d2be074SHaavard Skinnemoen static int __init atmci_init(void) 25757d2be074SHaavard Skinnemoen { 25767d2be074SHaavard Skinnemoen return platform_driver_probe(&atmci_driver, atmci_probe); 25777d2be074SHaavard Skinnemoen } 25787d2be074SHaavard Skinnemoen 25797d2be074SHaavard Skinnemoen static void __exit atmci_exit(void) 25807d2be074SHaavard Skinnemoen { 25817d2be074SHaavard Skinnemoen platform_driver_unregister(&atmci_driver); 25827d2be074SHaavard Skinnemoen } 25837d2be074SHaavard Skinnemoen 258474465b4fSDan Williams late_initcall(atmci_init); /* try to load after dma driver when built-in */ 25857d2be074SHaavard Skinnemoen module_exit(atmci_exit); 25867d2be074SHaavard Skinnemoen 25877d2be074SHaavard Skinnemoen MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver"); 2588e05503efSJean Delvare MODULE_AUTHOR("Haavard Skinnemoen (Atmel)"); 25897d2be074SHaavard Skinnemoen MODULE_LICENSE("GPL v2"); 2590