17d2be074SHaavard Skinnemoen /* 27d2be074SHaavard Skinnemoen * Atmel MultiMedia Card Interface driver 37d2be074SHaavard Skinnemoen * 47d2be074SHaavard Skinnemoen * Copyright (C) 2004-2008 Atmel Corporation 57d2be074SHaavard Skinnemoen * 67d2be074SHaavard Skinnemoen * This program is free software; you can redistribute it and/or modify 77d2be074SHaavard Skinnemoen * it under the terms of the GNU General Public License version 2 as 87d2be074SHaavard Skinnemoen * published by the Free Software Foundation. 97d2be074SHaavard Skinnemoen */ 107d2be074SHaavard Skinnemoen #include <linux/blkdev.h> 117d2be074SHaavard Skinnemoen #include <linux/clk.h> 12deec9ae3SHaavard Skinnemoen #include <linux/debugfs.h> 137d2be074SHaavard Skinnemoen #include <linux/device.h> 1465e8b083SHaavard Skinnemoen #include <linux/dmaengine.h> 1565e8b083SHaavard Skinnemoen #include <linux/dma-mapping.h> 16fbfca4b8SBen Nizette #include <linux/err.h> 173c26e170SDavid Brownell #include <linux/gpio.h> 187d2be074SHaavard Skinnemoen #include <linux/init.h> 197d2be074SHaavard Skinnemoen #include <linux/interrupt.h> 207d2be074SHaavard Skinnemoen #include <linux/ioport.h> 217d2be074SHaavard Skinnemoen #include <linux/module.h> 22e919fd20SLudovic Desroches #include <linux/of.h> 23e919fd20SLudovic Desroches #include <linux/of_device.h> 24e919fd20SLudovic Desroches #include <linux/of_gpio.h> 257d2be074SHaavard Skinnemoen #include <linux/platform_device.h> 267d2be074SHaavard Skinnemoen #include <linux/scatterlist.h> 27deec9ae3SHaavard Skinnemoen #include <linux/seq_file.h> 285a0e3ad6STejun Heo #include <linux/slab.h> 29deec9ae3SHaavard Skinnemoen #include <linux/stat.h> 30e2b35f3dSViresh Kumar #include <linux/types.h> 31bcd2360cSJean-Christophe PLAGNIOL-VILLARD #include <linux/platform_data/atmel.h> 327d2be074SHaavard Skinnemoen 337d2be074SHaavard Skinnemoen #include <linux/mmc/host.h> 342f1d7918SNicolas Ferre #include <linux/mmc/sdio.h> 352635d1baSNicolas Ferre 362635d1baSNicolas Ferre #include <mach/atmel-mci.h> 37c42aa775SNicolas Ferre #include <linux/atmel-mci.h> 38796211b7SLudovic Desroches #include <linux/atmel_pdc.h> 397d2be074SHaavard Skinnemoen 407d2be074SHaavard Skinnemoen #include <asm/io.h> 417d2be074SHaavard Skinnemoen #include <asm/unaligned.h> 427d2be074SHaavard Skinnemoen 4304d699c3SRob Emanuele #include <mach/cpu.h> 447d2be074SHaavard Skinnemoen 457d2be074SHaavard Skinnemoen #include "atmel-mci-regs.h" 467d2be074SHaavard Skinnemoen 472c96a293SLudovic Desroches #define ATMCI_DATA_ERROR_FLAGS (ATMCI_DCRCE | ATMCI_DTOE | ATMCI_OVRE | ATMCI_UNRE) 4865e8b083SHaavard Skinnemoen #define ATMCI_DMA_THRESHOLD 16 497d2be074SHaavard Skinnemoen 507d2be074SHaavard Skinnemoen enum { 51f5177547SLudovic Desroches EVENT_CMD_RDY = 0, 527d2be074SHaavard Skinnemoen EVENT_XFER_COMPLETE, 53f5177547SLudovic Desroches EVENT_NOTBUSY, 54c06ad258SHaavard Skinnemoen EVENT_DATA_ERROR, 55c06ad258SHaavard Skinnemoen }; 56c06ad258SHaavard Skinnemoen 57c06ad258SHaavard Skinnemoen enum atmel_mci_state { 58965ebf33SHaavard Skinnemoen STATE_IDLE = 0, 59965ebf33SHaavard Skinnemoen STATE_SENDING_CMD, 60f5177547SLudovic Desroches STATE_DATA_XFER, 61f5177547SLudovic Desroches STATE_WAITING_NOTBUSY, 62c06ad258SHaavard Skinnemoen STATE_SENDING_STOP, 63f5177547SLudovic Desroches STATE_END_REQUEST, 647d2be074SHaavard Skinnemoen }; 657d2be074SHaavard Skinnemoen 66796211b7SLudovic Desroches enum atmci_xfer_dir { 67796211b7SLudovic Desroches XFER_RECEIVE = 0, 68796211b7SLudovic Desroches XFER_TRANSMIT, 69796211b7SLudovic Desroches }; 70796211b7SLudovic Desroches 71796211b7SLudovic Desroches enum atmci_pdc_buf { 72796211b7SLudovic Desroches PDC_FIRST_BUF = 0, 73796211b7SLudovic Desroches PDC_SECOND_BUF, 74796211b7SLudovic Desroches }; 75796211b7SLudovic Desroches 76796211b7SLudovic Desroches struct atmel_mci_caps { 77ccdfe612SHein_Tibosch bool has_dma_conf_reg; 78796211b7SLudovic Desroches bool has_pdc; 79796211b7SLudovic Desroches bool has_cfg_reg; 80796211b7SLudovic Desroches bool has_cstor_reg; 81796211b7SLudovic Desroches bool has_highspeed; 82796211b7SLudovic Desroches bool has_rwproof; 83faf8180bSLudovic Desroches bool has_odd_clk_div; 8424011f34SLudovic Desroches bool has_bad_data_ordering; 8524011f34SLudovic Desroches bool need_reset_after_xfer; 8624011f34SLudovic Desroches bool need_blksz_mul_4; 87077d4073SLudovic Desroches bool need_notbusy_for_read_ops; 88796211b7SLudovic Desroches }; 89796211b7SLudovic Desroches 9065e8b083SHaavard Skinnemoen struct atmel_mci_dma { 9165e8b083SHaavard Skinnemoen struct dma_chan *chan; 9265e8b083SHaavard Skinnemoen struct dma_async_tx_descriptor *data_desc; 9365e8b083SHaavard Skinnemoen }; 9465e8b083SHaavard Skinnemoen 95965ebf33SHaavard Skinnemoen /** 96965ebf33SHaavard Skinnemoen * struct atmel_mci - MMC controller state shared between all slots 97965ebf33SHaavard Skinnemoen * @lock: Spinlock protecting the queue and associated data. 98965ebf33SHaavard Skinnemoen * @regs: Pointer to MMIO registers. 99796211b7SLudovic Desroches * @sg: Scatterlist entry currently being processed by PIO or PDC code. 100965ebf33SHaavard Skinnemoen * @pio_offset: Offset into the current scatterlist entry. 1017a90dcc2SLudovic Desroches * @buffer: Buffer used if we don't have the r/w proof capability. We 1027a90dcc2SLudovic Desroches * don't have the time to switch pdc buffers so we have to use only 1037a90dcc2SLudovic Desroches * one buffer for the full transaction. 1047a90dcc2SLudovic Desroches * @buf_size: size of the buffer. 1057a90dcc2SLudovic Desroches * @phys_buf_addr: buffer address needed for pdc. 106965ebf33SHaavard Skinnemoen * @cur_slot: The slot which is currently using the controller. 107965ebf33SHaavard Skinnemoen * @mrq: The request currently being processed on @cur_slot, 108965ebf33SHaavard Skinnemoen * or NULL if the controller is idle. 109965ebf33SHaavard Skinnemoen * @cmd: The command currently being sent to the card, or NULL. 110965ebf33SHaavard Skinnemoen * @data: The data currently being transferred, or NULL if no data 111965ebf33SHaavard Skinnemoen * transfer is in progress. 112796211b7SLudovic Desroches * @data_size: just data->blocks * data->blksz. 11365e8b083SHaavard Skinnemoen * @dma: DMA client state. 11465e8b083SHaavard Skinnemoen * @data_chan: DMA channel being used for the current data transfer. 115965ebf33SHaavard Skinnemoen * @cmd_status: Snapshot of SR taken upon completion of the current 116965ebf33SHaavard Skinnemoen * command. Only valid when EVENT_CMD_COMPLETE is pending. 117965ebf33SHaavard Skinnemoen * @data_status: Snapshot of SR taken upon completion of the current 118965ebf33SHaavard Skinnemoen * data transfer. Only valid when EVENT_DATA_COMPLETE or 119965ebf33SHaavard Skinnemoen * EVENT_DATA_ERROR is pending. 120965ebf33SHaavard Skinnemoen * @stop_cmdr: Value to be loaded into CMDR when the stop command is 121965ebf33SHaavard Skinnemoen * to be sent. 122965ebf33SHaavard Skinnemoen * @tasklet: Tasklet running the request state machine. 123965ebf33SHaavard Skinnemoen * @pending_events: Bitmask of events flagged by the interrupt handler 124965ebf33SHaavard Skinnemoen * to be processed by the tasklet. 125965ebf33SHaavard Skinnemoen * @completed_events: Bitmask of events which the state machine has 126965ebf33SHaavard Skinnemoen * processed. 127965ebf33SHaavard Skinnemoen * @state: Tasklet state. 128965ebf33SHaavard Skinnemoen * @queue: List of slots waiting for access to the controller. 129965ebf33SHaavard Skinnemoen * @need_clock_update: Update the clock rate before the next request. 130965ebf33SHaavard Skinnemoen * @need_reset: Reset controller before next request. 13124011f34SLudovic Desroches * @timer: Timer to balance the data timeout error flag which cannot rise. 132965ebf33SHaavard Skinnemoen * @mode_reg: Value of the MR register. 13374791a2dSNicolas Ferre * @cfg_reg: Value of the CFG register. 134965ebf33SHaavard Skinnemoen * @bus_hz: The rate of @mck in Hz. This forms the basis for MMC bus 135965ebf33SHaavard Skinnemoen * rate and timeout calculations. 136965ebf33SHaavard Skinnemoen * @mapbase: Physical address of the MMIO registers. 137965ebf33SHaavard Skinnemoen * @mck: The peripheral bus clock hooked up to the MMC controller. 138965ebf33SHaavard Skinnemoen * @pdev: Platform device associated with the MMC controller. 139965ebf33SHaavard Skinnemoen * @slot: Slots sharing this MMC controller. 140796211b7SLudovic Desroches * @caps: MCI capabilities depending on MCI version. 141796211b7SLudovic Desroches * @prepare_data: function to setup MCI before data transfer which 142796211b7SLudovic Desroches * depends on MCI capabilities. 143796211b7SLudovic Desroches * @submit_data: function to start data transfer which depends on MCI 144796211b7SLudovic Desroches * capabilities. 145796211b7SLudovic Desroches * @stop_transfer: function to stop data transfer which depends on MCI 146796211b7SLudovic Desroches * capabilities. 147965ebf33SHaavard Skinnemoen * 148965ebf33SHaavard Skinnemoen * Locking 149965ebf33SHaavard Skinnemoen * ======= 150965ebf33SHaavard Skinnemoen * 151965ebf33SHaavard Skinnemoen * @lock is a softirq-safe spinlock protecting @queue as well as 152965ebf33SHaavard Skinnemoen * @cur_slot, @mrq and @state. These must always be updated 153965ebf33SHaavard Skinnemoen * at the same time while holding @lock. 154965ebf33SHaavard Skinnemoen * 155965ebf33SHaavard Skinnemoen * @lock also protects mode_reg and need_clock_update since these are 156965ebf33SHaavard Skinnemoen * used to synchronize mode register updates with the queue 157965ebf33SHaavard Skinnemoen * processing. 158965ebf33SHaavard Skinnemoen * 159965ebf33SHaavard Skinnemoen * The @mrq field of struct atmel_mci_slot is also protected by @lock, 160965ebf33SHaavard Skinnemoen * and must always be written at the same time as the slot is added to 161965ebf33SHaavard Skinnemoen * @queue. 162965ebf33SHaavard Skinnemoen * 163965ebf33SHaavard Skinnemoen * @pending_events and @completed_events are accessed using atomic bit 164965ebf33SHaavard Skinnemoen * operations, so they don't need any locking. 165965ebf33SHaavard Skinnemoen * 166965ebf33SHaavard Skinnemoen * None of the fields touched by the interrupt handler need any 167965ebf33SHaavard Skinnemoen * locking. However, ordering is important: Before EVENT_DATA_ERROR or 168965ebf33SHaavard Skinnemoen * EVENT_DATA_COMPLETE is set in @pending_events, all data-related 169965ebf33SHaavard Skinnemoen * interrupts must be disabled and @data_status updated with a 170965ebf33SHaavard Skinnemoen * snapshot of SR. Similarly, before EVENT_CMD_COMPLETE is set, the 17125985edcSLucas De Marchi * CMDRDY interrupt must be disabled and @cmd_status updated with a 172965ebf33SHaavard Skinnemoen * snapshot of SR, and before EVENT_XFER_COMPLETE can be set, the 173965ebf33SHaavard Skinnemoen * bytes_xfered field of @data must be written. This is ensured by 174965ebf33SHaavard Skinnemoen * using barriers. 175965ebf33SHaavard Skinnemoen */ 1767d2be074SHaavard Skinnemoen struct atmel_mci { 177965ebf33SHaavard Skinnemoen spinlock_t lock; 1787d2be074SHaavard Skinnemoen void __iomem *regs; 1797d2be074SHaavard Skinnemoen 1807d2be074SHaavard Skinnemoen struct scatterlist *sg; 181bdbc5d0cSTerry Barnaby unsigned int sg_len; 1827d2be074SHaavard Skinnemoen unsigned int pio_offset; 1837a90dcc2SLudovic Desroches unsigned int *buffer; 1847a90dcc2SLudovic Desroches unsigned int buf_size; 1857a90dcc2SLudovic Desroches dma_addr_t buf_phys_addr; 1867d2be074SHaavard Skinnemoen 187965ebf33SHaavard Skinnemoen struct atmel_mci_slot *cur_slot; 1887d2be074SHaavard Skinnemoen struct mmc_request *mrq; 1897d2be074SHaavard Skinnemoen struct mmc_command *cmd; 1907d2be074SHaavard Skinnemoen struct mmc_data *data; 191796211b7SLudovic Desroches unsigned int data_size; 1927d2be074SHaavard Skinnemoen 19365e8b083SHaavard Skinnemoen struct atmel_mci_dma dma; 19465e8b083SHaavard Skinnemoen struct dma_chan *data_chan; 195e2b35f3dSViresh Kumar struct dma_slave_config dma_conf; 19665e8b083SHaavard Skinnemoen 1977d2be074SHaavard Skinnemoen u32 cmd_status; 1987d2be074SHaavard Skinnemoen u32 data_status; 1997d2be074SHaavard Skinnemoen u32 stop_cmdr; 2007d2be074SHaavard Skinnemoen 2017d2be074SHaavard Skinnemoen struct tasklet_struct tasklet; 2027d2be074SHaavard Skinnemoen unsigned long pending_events; 2037d2be074SHaavard Skinnemoen unsigned long completed_events; 204c06ad258SHaavard Skinnemoen enum atmel_mci_state state; 205965ebf33SHaavard Skinnemoen struct list_head queue; 2067d2be074SHaavard Skinnemoen 207965ebf33SHaavard Skinnemoen bool need_clock_update; 208965ebf33SHaavard Skinnemoen bool need_reset; 20924011f34SLudovic Desroches struct timer_list timer; 210965ebf33SHaavard Skinnemoen u32 mode_reg; 21174791a2dSNicolas Ferre u32 cfg_reg; 2127d2be074SHaavard Skinnemoen unsigned long bus_hz; 2137d2be074SHaavard Skinnemoen unsigned long mapbase; 2147d2be074SHaavard Skinnemoen struct clk *mck; 2157d2be074SHaavard Skinnemoen struct platform_device *pdev; 216965ebf33SHaavard Skinnemoen 2172c96a293SLudovic Desroches struct atmel_mci_slot *slot[ATMCI_MAX_NR_SLOTS]; 218796211b7SLudovic Desroches 219796211b7SLudovic Desroches struct atmel_mci_caps caps; 220796211b7SLudovic Desroches 221796211b7SLudovic Desroches u32 (*prepare_data)(struct atmel_mci *host, struct mmc_data *data); 222796211b7SLudovic Desroches void (*submit_data)(struct atmel_mci *host, struct mmc_data *data); 223796211b7SLudovic Desroches void (*stop_transfer)(struct atmel_mci *host); 224965ebf33SHaavard Skinnemoen }; 225965ebf33SHaavard Skinnemoen 226965ebf33SHaavard Skinnemoen /** 227965ebf33SHaavard Skinnemoen * struct atmel_mci_slot - MMC slot state 228965ebf33SHaavard Skinnemoen * @mmc: The mmc_host representing this slot. 229965ebf33SHaavard Skinnemoen * @host: The MMC controller this slot is using. 230965ebf33SHaavard Skinnemoen * @sdc_reg: Value of SDCR to be written before using this slot. 23188ff82edSAnders Grahn * @sdio_irq: SDIO irq mask for this slot. 232965ebf33SHaavard Skinnemoen * @mrq: mmc_request currently being processed or waiting to be 233965ebf33SHaavard Skinnemoen * processed, or NULL when the slot is idle. 234965ebf33SHaavard Skinnemoen * @queue_node: List node for placing this node in the @queue list of 235965ebf33SHaavard Skinnemoen * &struct atmel_mci. 236965ebf33SHaavard Skinnemoen * @clock: Clock rate configured by set_ios(). Protected by host->lock. 237965ebf33SHaavard Skinnemoen * @flags: Random state bits associated with the slot. 238965ebf33SHaavard Skinnemoen * @detect_pin: GPIO pin used for card detection, or negative if not 239965ebf33SHaavard Skinnemoen * available. 240965ebf33SHaavard Skinnemoen * @wp_pin: GPIO pin used for card write protect sending, or negative 241965ebf33SHaavard Skinnemoen * if not available. 2421c1452beSJonas Larsson * @detect_is_active_high: The state of the detect pin when it is active. 243965ebf33SHaavard Skinnemoen * @detect_timer: Timer used for debouncing @detect_pin interrupts. 244965ebf33SHaavard Skinnemoen */ 245965ebf33SHaavard Skinnemoen struct atmel_mci_slot { 246965ebf33SHaavard Skinnemoen struct mmc_host *mmc; 247965ebf33SHaavard Skinnemoen struct atmel_mci *host; 248965ebf33SHaavard Skinnemoen 249965ebf33SHaavard Skinnemoen u32 sdc_reg; 25088ff82edSAnders Grahn u32 sdio_irq; 251965ebf33SHaavard Skinnemoen 252965ebf33SHaavard Skinnemoen struct mmc_request *mrq; 253965ebf33SHaavard Skinnemoen struct list_head queue_node; 254965ebf33SHaavard Skinnemoen 255965ebf33SHaavard Skinnemoen unsigned int clock; 256965ebf33SHaavard Skinnemoen unsigned long flags; 257965ebf33SHaavard Skinnemoen #define ATMCI_CARD_PRESENT 0 258965ebf33SHaavard Skinnemoen #define ATMCI_CARD_NEED_INIT 1 259965ebf33SHaavard Skinnemoen #define ATMCI_SHUTDOWN 2 2605c2f2b9bSNicolas Ferre #define ATMCI_SUSPENDED 3 261965ebf33SHaavard Skinnemoen 262965ebf33SHaavard Skinnemoen int detect_pin; 263965ebf33SHaavard Skinnemoen int wp_pin; 2641c1452beSJonas Larsson bool detect_is_active_high; 265965ebf33SHaavard Skinnemoen 266965ebf33SHaavard Skinnemoen struct timer_list detect_timer; 2677d2be074SHaavard Skinnemoen }; 2687d2be074SHaavard Skinnemoen 2697d2be074SHaavard Skinnemoen #define atmci_test_and_clear_pending(host, event) \ 2707d2be074SHaavard Skinnemoen test_and_clear_bit(event, &host->pending_events) 2717d2be074SHaavard Skinnemoen #define atmci_set_completed(host, event) \ 2727d2be074SHaavard Skinnemoen set_bit(event, &host->completed_events) 2737d2be074SHaavard Skinnemoen #define atmci_set_pending(host, event) \ 2747d2be074SHaavard Skinnemoen set_bit(event, &host->pending_events) 2757d2be074SHaavard Skinnemoen 276deec9ae3SHaavard Skinnemoen /* 277deec9ae3SHaavard Skinnemoen * The debugfs stuff below is mostly optimized away when 278deec9ae3SHaavard Skinnemoen * CONFIG_DEBUG_FS is not set. 279deec9ae3SHaavard Skinnemoen */ 280deec9ae3SHaavard Skinnemoen static int atmci_req_show(struct seq_file *s, void *v) 281deec9ae3SHaavard Skinnemoen { 282965ebf33SHaavard Skinnemoen struct atmel_mci_slot *slot = s->private; 283965ebf33SHaavard Skinnemoen struct mmc_request *mrq; 284deec9ae3SHaavard Skinnemoen struct mmc_command *cmd; 285deec9ae3SHaavard Skinnemoen struct mmc_command *stop; 286deec9ae3SHaavard Skinnemoen struct mmc_data *data; 287deec9ae3SHaavard Skinnemoen 288deec9ae3SHaavard Skinnemoen /* Make sure we get a consistent snapshot */ 289965ebf33SHaavard Skinnemoen spin_lock_bh(&slot->host->lock); 290965ebf33SHaavard Skinnemoen mrq = slot->mrq; 291deec9ae3SHaavard Skinnemoen 292deec9ae3SHaavard Skinnemoen if (mrq) { 293deec9ae3SHaavard Skinnemoen cmd = mrq->cmd; 294deec9ae3SHaavard Skinnemoen data = mrq->data; 295deec9ae3SHaavard Skinnemoen stop = mrq->stop; 296deec9ae3SHaavard Skinnemoen 297deec9ae3SHaavard Skinnemoen if (cmd) 298deec9ae3SHaavard Skinnemoen seq_printf(s, 299deec9ae3SHaavard Skinnemoen "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n", 300deec9ae3SHaavard Skinnemoen cmd->opcode, cmd->arg, cmd->flags, 301deec9ae3SHaavard Skinnemoen cmd->resp[0], cmd->resp[1], cmd->resp[2], 302d586ebbbSNicolas Ferre cmd->resp[3], cmd->error); 303deec9ae3SHaavard Skinnemoen if (data) 304deec9ae3SHaavard Skinnemoen seq_printf(s, "DATA %u / %u * %u flg %x err %d\n", 305deec9ae3SHaavard Skinnemoen data->bytes_xfered, data->blocks, 306deec9ae3SHaavard Skinnemoen data->blksz, data->flags, data->error); 307deec9ae3SHaavard Skinnemoen if (stop) 308deec9ae3SHaavard Skinnemoen seq_printf(s, 309deec9ae3SHaavard Skinnemoen "CMD%u(0x%x) flg %x rsp %x %x %x %x err %d\n", 310deec9ae3SHaavard Skinnemoen stop->opcode, stop->arg, stop->flags, 311deec9ae3SHaavard Skinnemoen stop->resp[0], stop->resp[1], stop->resp[2], 312d586ebbbSNicolas Ferre stop->resp[3], stop->error); 313deec9ae3SHaavard Skinnemoen } 314deec9ae3SHaavard Skinnemoen 315965ebf33SHaavard Skinnemoen spin_unlock_bh(&slot->host->lock); 316deec9ae3SHaavard Skinnemoen 317deec9ae3SHaavard Skinnemoen return 0; 318deec9ae3SHaavard Skinnemoen } 319deec9ae3SHaavard Skinnemoen 320deec9ae3SHaavard Skinnemoen static int atmci_req_open(struct inode *inode, struct file *file) 321deec9ae3SHaavard Skinnemoen { 322deec9ae3SHaavard Skinnemoen return single_open(file, atmci_req_show, inode->i_private); 323deec9ae3SHaavard Skinnemoen } 324deec9ae3SHaavard Skinnemoen 325deec9ae3SHaavard Skinnemoen static const struct file_operations atmci_req_fops = { 326deec9ae3SHaavard Skinnemoen .owner = THIS_MODULE, 327deec9ae3SHaavard Skinnemoen .open = atmci_req_open, 328deec9ae3SHaavard Skinnemoen .read = seq_read, 329deec9ae3SHaavard Skinnemoen .llseek = seq_lseek, 330deec9ae3SHaavard Skinnemoen .release = single_release, 331deec9ae3SHaavard Skinnemoen }; 332deec9ae3SHaavard Skinnemoen 333deec9ae3SHaavard Skinnemoen static void atmci_show_status_reg(struct seq_file *s, 334deec9ae3SHaavard Skinnemoen const char *regname, u32 value) 335deec9ae3SHaavard Skinnemoen { 336deec9ae3SHaavard Skinnemoen static const char *sr_bit[] = { 337deec9ae3SHaavard Skinnemoen [0] = "CMDRDY", 338deec9ae3SHaavard Skinnemoen [1] = "RXRDY", 339deec9ae3SHaavard Skinnemoen [2] = "TXRDY", 340deec9ae3SHaavard Skinnemoen [3] = "BLKE", 341deec9ae3SHaavard Skinnemoen [4] = "DTIP", 342deec9ae3SHaavard Skinnemoen [5] = "NOTBUSY", 34304d699c3SRob Emanuele [6] = "ENDRX", 34404d699c3SRob Emanuele [7] = "ENDTX", 345deec9ae3SHaavard Skinnemoen [8] = "SDIOIRQA", 346deec9ae3SHaavard Skinnemoen [9] = "SDIOIRQB", 34704d699c3SRob Emanuele [12] = "SDIOWAIT", 34804d699c3SRob Emanuele [14] = "RXBUFF", 34904d699c3SRob Emanuele [15] = "TXBUFE", 350deec9ae3SHaavard Skinnemoen [16] = "RINDE", 351deec9ae3SHaavard Skinnemoen [17] = "RDIRE", 352deec9ae3SHaavard Skinnemoen [18] = "RCRCE", 353deec9ae3SHaavard Skinnemoen [19] = "RENDE", 354deec9ae3SHaavard Skinnemoen [20] = "RTOE", 355deec9ae3SHaavard Skinnemoen [21] = "DCRCE", 356deec9ae3SHaavard Skinnemoen [22] = "DTOE", 35704d699c3SRob Emanuele [23] = "CSTOE", 35804d699c3SRob Emanuele [24] = "BLKOVRE", 35904d699c3SRob Emanuele [25] = "DMADONE", 36004d699c3SRob Emanuele [26] = "FIFOEMPTY", 36104d699c3SRob Emanuele [27] = "XFRDONE", 362deec9ae3SHaavard Skinnemoen [30] = "OVRE", 363deec9ae3SHaavard Skinnemoen [31] = "UNRE", 364deec9ae3SHaavard Skinnemoen }; 365deec9ae3SHaavard Skinnemoen unsigned int i; 366deec9ae3SHaavard Skinnemoen 367deec9ae3SHaavard Skinnemoen seq_printf(s, "%s:\t0x%08x", regname, value); 368deec9ae3SHaavard Skinnemoen for (i = 0; i < ARRAY_SIZE(sr_bit); i++) { 369deec9ae3SHaavard Skinnemoen if (value & (1 << i)) { 370deec9ae3SHaavard Skinnemoen if (sr_bit[i]) 371deec9ae3SHaavard Skinnemoen seq_printf(s, " %s", sr_bit[i]); 372deec9ae3SHaavard Skinnemoen else 373deec9ae3SHaavard Skinnemoen seq_puts(s, " UNKNOWN"); 374deec9ae3SHaavard Skinnemoen } 375deec9ae3SHaavard Skinnemoen } 376deec9ae3SHaavard Skinnemoen seq_putc(s, '\n'); 377deec9ae3SHaavard Skinnemoen } 378deec9ae3SHaavard Skinnemoen 379deec9ae3SHaavard Skinnemoen static int atmci_regs_show(struct seq_file *s, void *v) 380deec9ae3SHaavard Skinnemoen { 381deec9ae3SHaavard Skinnemoen struct atmel_mci *host = s->private; 382deec9ae3SHaavard Skinnemoen u32 *buf; 383deec9ae3SHaavard Skinnemoen 3842c96a293SLudovic Desroches buf = kmalloc(ATMCI_REGS_SIZE, GFP_KERNEL); 385deec9ae3SHaavard Skinnemoen if (!buf) 386deec9ae3SHaavard Skinnemoen return -ENOMEM; 387deec9ae3SHaavard Skinnemoen 388965ebf33SHaavard Skinnemoen /* 389965ebf33SHaavard Skinnemoen * Grab a more or less consistent snapshot. Note that we're 390965ebf33SHaavard Skinnemoen * not disabling interrupts, so IMR and SR may not be 391965ebf33SHaavard Skinnemoen * consistent. 392965ebf33SHaavard Skinnemoen */ 393965ebf33SHaavard Skinnemoen spin_lock_bh(&host->lock); 39487e60f2bSHaavard Skinnemoen clk_enable(host->mck); 3952c96a293SLudovic Desroches memcpy_fromio(buf, host->regs, ATMCI_REGS_SIZE); 39687e60f2bSHaavard Skinnemoen clk_disable(host->mck); 397965ebf33SHaavard Skinnemoen spin_unlock_bh(&host->lock); 398deec9ae3SHaavard Skinnemoen 3998a4de07eSNicolas Ferre seq_printf(s, "MR:\t0x%08x%s%s ", 4002c96a293SLudovic Desroches buf[ATMCI_MR / 4], 4012c96a293SLudovic Desroches buf[ATMCI_MR / 4] & ATMCI_MR_RDPROOF ? " RDPROOF" : "", 4028a4de07eSNicolas Ferre buf[ATMCI_MR / 4] & ATMCI_MR_WRPROOF ? " WRPROOF" : ""); 4038a4de07eSNicolas Ferre if (host->caps.has_odd_clk_div) 4048a4de07eSNicolas Ferre seq_printf(s, "{CLKDIV,CLKODD}=%u\n", 4058a4de07eSNicolas Ferre ((buf[ATMCI_MR / 4] & 0xff) << 1) 4068a4de07eSNicolas Ferre | ((buf[ATMCI_MR / 4] >> 16) & 1)); 4078a4de07eSNicolas Ferre else 4088a4de07eSNicolas Ferre seq_printf(s, "CLKDIV=%u\n", 4098a4de07eSNicolas Ferre (buf[ATMCI_MR / 4] & 0xff)); 4102c96a293SLudovic Desroches seq_printf(s, "DTOR:\t0x%08x\n", buf[ATMCI_DTOR / 4]); 4112c96a293SLudovic Desroches seq_printf(s, "SDCR:\t0x%08x\n", buf[ATMCI_SDCR / 4]); 4122c96a293SLudovic Desroches seq_printf(s, "ARGR:\t0x%08x\n", buf[ATMCI_ARGR / 4]); 413deec9ae3SHaavard Skinnemoen seq_printf(s, "BLKR:\t0x%08x BCNT=%u BLKLEN=%u\n", 4142c96a293SLudovic Desroches buf[ATMCI_BLKR / 4], 4152c96a293SLudovic Desroches buf[ATMCI_BLKR / 4] & 0xffff, 4162c96a293SLudovic Desroches (buf[ATMCI_BLKR / 4] >> 16) & 0xffff); 417796211b7SLudovic Desroches if (host->caps.has_cstor_reg) 4182c96a293SLudovic Desroches seq_printf(s, "CSTOR:\t0x%08x\n", buf[ATMCI_CSTOR / 4]); 419deec9ae3SHaavard Skinnemoen 420deec9ae3SHaavard Skinnemoen /* Don't read RSPR and RDR; it will consume the data there */ 421deec9ae3SHaavard Skinnemoen 4222c96a293SLudovic Desroches atmci_show_status_reg(s, "SR", buf[ATMCI_SR / 4]); 4232c96a293SLudovic Desroches atmci_show_status_reg(s, "IMR", buf[ATMCI_IMR / 4]); 424deec9ae3SHaavard Skinnemoen 425ccdfe612SHein_Tibosch if (host->caps.has_dma_conf_reg) { 42674791a2dSNicolas Ferre u32 val; 42774791a2dSNicolas Ferre 4282c96a293SLudovic Desroches val = buf[ATMCI_DMA / 4]; 42974791a2dSNicolas Ferre seq_printf(s, "DMA:\t0x%08x OFFSET=%u CHKSIZE=%u%s\n", 43074791a2dSNicolas Ferre val, val & 3, 43174791a2dSNicolas Ferre ((val >> 4) & 3) ? 43274791a2dSNicolas Ferre 1 << (((val >> 4) & 3) + 1) : 1, 4332c96a293SLudovic Desroches val & ATMCI_DMAEN ? " DMAEN" : ""); 434796211b7SLudovic Desroches } 435796211b7SLudovic Desroches if (host->caps.has_cfg_reg) { 436796211b7SLudovic Desroches u32 val; 43774791a2dSNicolas Ferre 4382c96a293SLudovic Desroches val = buf[ATMCI_CFG / 4]; 43974791a2dSNicolas Ferre seq_printf(s, "CFG:\t0x%08x%s%s%s%s\n", 44074791a2dSNicolas Ferre val, 4412c96a293SLudovic Desroches val & ATMCI_CFG_FIFOMODE_1DATA ? " FIFOMODE_ONE_DATA" : "", 4422c96a293SLudovic Desroches val & ATMCI_CFG_FERRCTRL_COR ? " FERRCTRL_CLEAR_ON_READ" : "", 4432c96a293SLudovic Desroches val & ATMCI_CFG_HSMODE ? " HSMODE" : "", 4442c96a293SLudovic Desroches val & ATMCI_CFG_LSYNC ? " LSYNC" : ""); 44574791a2dSNicolas Ferre } 44674791a2dSNicolas Ferre 447b17339a1SHaavard Skinnemoen kfree(buf); 448b17339a1SHaavard Skinnemoen 449deec9ae3SHaavard Skinnemoen return 0; 450deec9ae3SHaavard Skinnemoen } 451deec9ae3SHaavard Skinnemoen 452deec9ae3SHaavard Skinnemoen static int atmci_regs_open(struct inode *inode, struct file *file) 453deec9ae3SHaavard Skinnemoen { 454deec9ae3SHaavard Skinnemoen return single_open(file, atmci_regs_show, inode->i_private); 455deec9ae3SHaavard Skinnemoen } 456deec9ae3SHaavard Skinnemoen 457deec9ae3SHaavard Skinnemoen static const struct file_operations atmci_regs_fops = { 458deec9ae3SHaavard Skinnemoen .owner = THIS_MODULE, 459deec9ae3SHaavard Skinnemoen .open = atmci_regs_open, 460deec9ae3SHaavard Skinnemoen .read = seq_read, 461deec9ae3SHaavard Skinnemoen .llseek = seq_lseek, 462deec9ae3SHaavard Skinnemoen .release = single_release, 463deec9ae3SHaavard Skinnemoen }; 464deec9ae3SHaavard Skinnemoen 465965ebf33SHaavard Skinnemoen static void atmci_init_debugfs(struct atmel_mci_slot *slot) 466deec9ae3SHaavard Skinnemoen { 467965ebf33SHaavard Skinnemoen struct mmc_host *mmc = slot->mmc; 468965ebf33SHaavard Skinnemoen struct atmel_mci *host = slot->host; 469deec9ae3SHaavard Skinnemoen struct dentry *root; 470deec9ae3SHaavard Skinnemoen struct dentry *node; 471deec9ae3SHaavard Skinnemoen 472deec9ae3SHaavard Skinnemoen root = mmc->debugfs_root; 473deec9ae3SHaavard Skinnemoen if (!root) 474deec9ae3SHaavard Skinnemoen return; 475deec9ae3SHaavard Skinnemoen 476deec9ae3SHaavard Skinnemoen node = debugfs_create_file("regs", S_IRUSR, root, host, 477deec9ae3SHaavard Skinnemoen &atmci_regs_fops); 478deec9ae3SHaavard Skinnemoen if (IS_ERR(node)) 479deec9ae3SHaavard Skinnemoen return; 480deec9ae3SHaavard Skinnemoen if (!node) 481deec9ae3SHaavard Skinnemoen goto err; 482deec9ae3SHaavard Skinnemoen 483965ebf33SHaavard Skinnemoen node = debugfs_create_file("req", S_IRUSR, root, slot, &atmci_req_fops); 484deec9ae3SHaavard Skinnemoen if (!node) 485deec9ae3SHaavard Skinnemoen goto err; 486deec9ae3SHaavard Skinnemoen 487c06ad258SHaavard Skinnemoen node = debugfs_create_u32("state", S_IRUSR, root, (u32 *)&host->state); 488c06ad258SHaavard Skinnemoen if (!node) 489c06ad258SHaavard Skinnemoen goto err; 490c06ad258SHaavard Skinnemoen 491deec9ae3SHaavard Skinnemoen node = debugfs_create_x32("pending_events", S_IRUSR, root, 492deec9ae3SHaavard Skinnemoen (u32 *)&host->pending_events); 493deec9ae3SHaavard Skinnemoen if (!node) 494deec9ae3SHaavard Skinnemoen goto err; 495deec9ae3SHaavard Skinnemoen 496deec9ae3SHaavard Skinnemoen node = debugfs_create_x32("completed_events", S_IRUSR, root, 497deec9ae3SHaavard Skinnemoen (u32 *)&host->completed_events); 498deec9ae3SHaavard Skinnemoen if (!node) 499deec9ae3SHaavard Skinnemoen goto err; 500deec9ae3SHaavard Skinnemoen 501deec9ae3SHaavard Skinnemoen return; 502deec9ae3SHaavard Skinnemoen 503deec9ae3SHaavard Skinnemoen err: 504965ebf33SHaavard Skinnemoen dev_err(&mmc->class_dev, "failed to initialize debugfs for slot\n"); 505deec9ae3SHaavard Skinnemoen } 5067d2be074SHaavard Skinnemoen 507e919fd20SLudovic Desroches #if defined(CONFIG_OF) 508e919fd20SLudovic Desroches static const struct of_device_id atmci_dt_ids[] = { 509e919fd20SLudovic Desroches { .compatible = "atmel,hsmci" }, 510e919fd20SLudovic Desroches { /* sentinel */ } 511e919fd20SLudovic Desroches }; 512e919fd20SLudovic Desroches 513e919fd20SLudovic Desroches MODULE_DEVICE_TABLE(of, atmci_dt_ids); 514e919fd20SLudovic Desroches 515c3be1efdSBill Pemberton static struct mci_platform_data* 516e919fd20SLudovic Desroches atmci_of_init(struct platform_device *pdev) 517e919fd20SLudovic Desroches { 518e919fd20SLudovic Desroches struct device_node *np = pdev->dev.of_node; 519e919fd20SLudovic Desroches struct device_node *cnp; 520e919fd20SLudovic Desroches struct mci_platform_data *pdata; 521e919fd20SLudovic Desroches u32 slot_id; 522e919fd20SLudovic Desroches 523e919fd20SLudovic Desroches if (!np) { 524e919fd20SLudovic Desroches dev_err(&pdev->dev, "device node not found\n"); 525e919fd20SLudovic Desroches return ERR_PTR(-EINVAL); 526e919fd20SLudovic Desroches } 527e919fd20SLudovic Desroches 528e919fd20SLudovic Desroches pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL); 529e919fd20SLudovic Desroches if (!pdata) { 530e919fd20SLudovic Desroches dev_err(&pdev->dev, "could not allocate memory for pdata\n"); 531e919fd20SLudovic Desroches return ERR_PTR(-ENOMEM); 532e919fd20SLudovic Desroches } 533e919fd20SLudovic Desroches 534e919fd20SLudovic Desroches for_each_child_of_node(np, cnp) { 535e919fd20SLudovic Desroches if (of_property_read_u32(cnp, "reg", &slot_id)) { 536e919fd20SLudovic Desroches dev_warn(&pdev->dev, "reg property is missing for %s\n", 537e919fd20SLudovic Desroches cnp->full_name); 538e919fd20SLudovic Desroches continue; 539e919fd20SLudovic Desroches } 540e919fd20SLudovic Desroches 541e919fd20SLudovic Desroches if (slot_id >= ATMCI_MAX_NR_SLOTS) { 542e919fd20SLudovic Desroches dev_warn(&pdev->dev, "can't have more than %d slots\n", 543e919fd20SLudovic Desroches ATMCI_MAX_NR_SLOTS); 544e919fd20SLudovic Desroches break; 545e919fd20SLudovic Desroches } 546e919fd20SLudovic Desroches 547e919fd20SLudovic Desroches if (of_property_read_u32(cnp, "bus-width", 548e919fd20SLudovic Desroches &pdata->slot[slot_id].bus_width)) 549e919fd20SLudovic Desroches pdata->slot[slot_id].bus_width = 1; 550e919fd20SLudovic Desroches 551e919fd20SLudovic Desroches pdata->slot[slot_id].detect_pin = 552e919fd20SLudovic Desroches of_get_named_gpio(cnp, "cd-gpios", 0); 553e919fd20SLudovic Desroches 554e919fd20SLudovic Desroches pdata->slot[slot_id].detect_is_active_high = 555e919fd20SLudovic Desroches of_property_read_bool(cnp, "cd-inverted"); 556e919fd20SLudovic Desroches 557e919fd20SLudovic Desroches pdata->slot[slot_id].wp_pin = 558e919fd20SLudovic Desroches of_get_named_gpio(cnp, "wp-gpios", 0); 559e919fd20SLudovic Desroches } 560e919fd20SLudovic Desroches 561e919fd20SLudovic Desroches return pdata; 562e919fd20SLudovic Desroches } 563e919fd20SLudovic Desroches #else /* CONFIG_OF */ 564e919fd20SLudovic Desroches static inline struct mci_platform_data* 565e919fd20SLudovic Desroches atmci_of_init(struct platform_device *dev) 566e919fd20SLudovic Desroches { 567e919fd20SLudovic Desroches return ERR_PTR(-EINVAL); 568e919fd20SLudovic Desroches } 569e919fd20SLudovic Desroches #endif 570e919fd20SLudovic Desroches 5717a90dcc2SLudovic Desroches static inline unsigned int atmci_get_version(struct atmel_mci *host) 5727a90dcc2SLudovic Desroches { 5737a90dcc2SLudovic Desroches return atmci_readl(host, ATMCI_VERSION) & 0x00000fff; 5747a90dcc2SLudovic Desroches } 5757a90dcc2SLudovic Desroches 57624011f34SLudovic Desroches static void atmci_timeout_timer(unsigned long data) 57724011f34SLudovic Desroches { 57824011f34SLudovic Desroches struct atmel_mci *host; 57924011f34SLudovic Desroches 58024011f34SLudovic Desroches host = (struct atmel_mci *)data; 58124011f34SLudovic Desroches 58224011f34SLudovic Desroches dev_dbg(&host->pdev->dev, "software timeout\n"); 58324011f34SLudovic Desroches 58424011f34SLudovic Desroches if (host->mrq->cmd->data) { 58524011f34SLudovic Desroches host->mrq->cmd->data->error = -ETIMEDOUT; 58624011f34SLudovic Desroches host->data = NULL; 58724011f34SLudovic Desroches } else { 58824011f34SLudovic Desroches host->mrq->cmd->error = -ETIMEDOUT; 58924011f34SLudovic Desroches host->cmd = NULL; 59024011f34SLudovic Desroches } 59124011f34SLudovic Desroches host->need_reset = 1; 59224011f34SLudovic Desroches host->state = STATE_END_REQUEST; 59324011f34SLudovic Desroches smp_wmb(); 59424011f34SLudovic Desroches tasklet_schedule(&host->tasklet); 59524011f34SLudovic Desroches } 59624011f34SLudovic Desroches 5972c96a293SLudovic Desroches static inline unsigned int atmci_ns_to_clocks(struct atmel_mci *host, 5987d2be074SHaavard Skinnemoen unsigned int ns) 5997d2be074SHaavard Skinnemoen { 60066292ad9SLudovic Desroches /* 60166292ad9SLudovic Desroches * It is easier here to use us instead of ns for the timeout, 60266292ad9SLudovic Desroches * it prevents from overflows during calculation. 60366292ad9SLudovic Desroches */ 60466292ad9SLudovic Desroches unsigned int us = DIV_ROUND_UP(ns, 1000); 60566292ad9SLudovic Desroches 60666292ad9SLudovic Desroches /* Maximum clock frequency is host->bus_hz/2 */ 60766292ad9SLudovic Desroches return us * (DIV_ROUND_UP(host->bus_hz, 2000000)); 6087d2be074SHaavard Skinnemoen } 6097d2be074SHaavard Skinnemoen 6107d2be074SHaavard Skinnemoen static void atmci_set_timeout(struct atmel_mci *host, 611965ebf33SHaavard Skinnemoen struct atmel_mci_slot *slot, struct mmc_data *data) 6127d2be074SHaavard Skinnemoen { 6137d2be074SHaavard Skinnemoen static unsigned dtomul_to_shift[] = { 6147d2be074SHaavard Skinnemoen 0, 4, 7, 8, 10, 12, 16, 20 6157d2be074SHaavard Skinnemoen }; 6167d2be074SHaavard Skinnemoen unsigned timeout; 6177d2be074SHaavard Skinnemoen unsigned dtocyc; 6187d2be074SHaavard Skinnemoen unsigned dtomul; 6197d2be074SHaavard Skinnemoen 6202c96a293SLudovic Desroches timeout = atmci_ns_to_clocks(host, data->timeout_ns) 6212c96a293SLudovic Desroches + data->timeout_clks; 6227d2be074SHaavard Skinnemoen 6237d2be074SHaavard Skinnemoen for (dtomul = 0; dtomul < 8; dtomul++) { 6247d2be074SHaavard Skinnemoen unsigned shift = dtomul_to_shift[dtomul]; 6257d2be074SHaavard Skinnemoen dtocyc = (timeout + (1 << shift) - 1) >> shift; 6267d2be074SHaavard Skinnemoen if (dtocyc < 15) 6277d2be074SHaavard Skinnemoen break; 6287d2be074SHaavard Skinnemoen } 6297d2be074SHaavard Skinnemoen 6307d2be074SHaavard Skinnemoen if (dtomul >= 8) { 6317d2be074SHaavard Skinnemoen dtomul = 7; 6327d2be074SHaavard Skinnemoen dtocyc = 15; 6337d2be074SHaavard Skinnemoen } 6347d2be074SHaavard Skinnemoen 635965ebf33SHaavard Skinnemoen dev_vdbg(&slot->mmc->class_dev, "setting timeout to %u cycles\n", 6367d2be074SHaavard Skinnemoen dtocyc << dtomul_to_shift[dtomul]); 63703fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_DTOR, (ATMCI_DTOMUL(dtomul) | ATMCI_DTOCYC(dtocyc))); 6387d2be074SHaavard Skinnemoen } 6397d2be074SHaavard Skinnemoen 6407d2be074SHaavard Skinnemoen /* 6417d2be074SHaavard Skinnemoen * Return mask with command flags to be enabled for this command. 6427d2be074SHaavard Skinnemoen */ 6437d2be074SHaavard Skinnemoen static u32 atmci_prepare_command(struct mmc_host *mmc, 6447d2be074SHaavard Skinnemoen struct mmc_command *cmd) 6457d2be074SHaavard Skinnemoen { 6467d2be074SHaavard Skinnemoen struct mmc_data *data; 6477d2be074SHaavard Skinnemoen u32 cmdr; 6487d2be074SHaavard Skinnemoen 6497d2be074SHaavard Skinnemoen cmd->error = -EINPROGRESS; 6507d2be074SHaavard Skinnemoen 6512c96a293SLudovic Desroches cmdr = ATMCI_CMDR_CMDNB(cmd->opcode); 6527d2be074SHaavard Skinnemoen 6537d2be074SHaavard Skinnemoen if (cmd->flags & MMC_RSP_PRESENT) { 6547d2be074SHaavard Skinnemoen if (cmd->flags & MMC_RSP_136) 6552c96a293SLudovic Desroches cmdr |= ATMCI_CMDR_RSPTYP_136BIT; 6567d2be074SHaavard Skinnemoen else 6572c96a293SLudovic Desroches cmdr |= ATMCI_CMDR_RSPTYP_48BIT; 6587d2be074SHaavard Skinnemoen } 6597d2be074SHaavard Skinnemoen 6607d2be074SHaavard Skinnemoen /* 6617d2be074SHaavard Skinnemoen * This should really be MAXLAT_5 for CMD2 and ACMD41, but 6627d2be074SHaavard Skinnemoen * it's too difficult to determine whether this is an ACMD or 6637d2be074SHaavard Skinnemoen * not. Better make it 64. 6647d2be074SHaavard Skinnemoen */ 6652c96a293SLudovic Desroches cmdr |= ATMCI_CMDR_MAXLAT_64CYC; 6667d2be074SHaavard Skinnemoen 6677d2be074SHaavard Skinnemoen if (mmc->ios.bus_mode == MMC_BUSMODE_OPENDRAIN) 6682c96a293SLudovic Desroches cmdr |= ATMCI_CMDR_OPDCMD; 6697d2be074SHaavard Skinnemoen 6707d2be074SHaavard Skinnemoen data = cmd->data; 6717d2be074SHaavard Skinnemoen if (data) { 6722c96a293SLudovic Desroches cmdr |= ATMCI_CMDR_START_XFER; 6732f1d7918SNicolas Ferre 6742f1d7918SNicolas Ferre if (cmd->opcode == SD_IO_RW_EXTENDED) { 6752c96a293SLudovic Desroches cmdr |= ATMCI_CMDR_SDIO_BLOCK; 6762f1d7918SNicolas Ferre } else { 6777d2be074SHaavard Skinnemoen if (data->flags & MMC_DATA_STREAM) 6782c96a293SLudovic Desroches cmdr |= ATMCI_CMDR_STREAM; 6797d2be074SHaavard Skinnemoen else if (data->blocks > 1) 6802c96a293SLudovic Desroches cmdr |= ATMCI_CMDR_MULTI_BLOCK; 6817d2be074SHaavard Skinnemoen else 6822c96a293SLudovic Desroches cmdr |= ATMCI_CMDR_BLOCK; 6832f1d7918SNicolas Ferre } 6847d2be074SHaavard Skinnemoen 6857d2be074SHaavard Skinnemoen if (data->flags & MMC_DATA_READ) 6862c96a293SLudovic Desroches cmdr |= ATMCI_CMDR_TRDIR_READ; 6877d2be074SHaavard Skinnemoen } 6887d2be074SHaavard Skinnemoen 6897d2be074SHaavard Skinnemoen return cmdr; 6907d2be074SHaavard Skinnemoen } 6917d2be074SHaavard Skinnemoen 69211d1488bSLudovic Desroches static void atmci_send_command(struct atmel_mci *host, 693965ebf33SHaavard Skinnemoen struct mmc_command *cmd, u32 cmd_flags) 6947d2be074SHaavard Skinnemoen { 6957d2be074SHaavard Skinnemoen WARN_ON(host->cmd); 6967d2be074SHaavard Skinnemoen host->cmd = cmd; 6977d2be074SHaavard Skinnemoen 698965ebf33SHaavard Skinnemoen dev_vdbg(&host->pdev->dev, 6997d2be074SHaavard Skinnemoen "start command: ARGR=0x%08x CMDR=0x%08x\n", 7007d2be074SHaavard Skinnemoen cmd->arg, cmd_flags); 7017d2be074SHaavard Skinnemoen 70203fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_ARGR, cmd->arg); 70303fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CMDR, cmd_flags); 7047d2be074SHaavard Skinnemoen } 7057d2be074SHaavard Skinnemoen 7062c96a293SLudovic Desroches static void atmci_send_stop_cmd(struct atmel_mci *host, struct mmc_data *data) 7077d2be074SHaavard Skinnemoen { 7086801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "send stop command\n"); 70911d1488bSLudovic Desroches atmci_send_command(host, data->stop, host->stop_cmdr); 71003fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_CMDRDY); 7117d2be074SHaavard Skinnemoen } 7127d2be074SHaavard Skinnemoen 713796211b7SLudovic Desroches /* 714796211b7SLudovic Desroches * Configure given PDC buffer taking care of alignement issues. 715796211b7SLudovic Desroches * Update host->data_size and host->sg. 716796211b7SLudovic Desroches */ 717796211b7SLudovic Desroches static void atmci_pdc_set_single_buf(struct atmel_mci *host, 718796211b7SLudovic Desroches enum atmci_xfer_dir dir, enum atmci_pdc_buf buf_nb) 719796211b7SLudovic Desroches { 720796211b7SLudovic Desroches u32 pointer_reg, counter_reg; 7217a90dcc2SLudovic Desroches unsigned int buf_size; 722796211b7SLudovic Desroches 723796211b7SLudovic Desroches if (dir == XFER_RECEIVE) { 724796211b7SLudovic Desroches pointer_reg = ATMEL_PDC_RPR; 725796211b7SLudovic Desroches counter_reg = ATMEL_PDC_RCR; 726796211b7SLudovic Desroches } else { 727796211b7SLudovic Desroches pointer_reg = ATMEL_PDC_TPR; 728796211b7SLudovic Desroches counter_reg = ATMEL_PDC_TCR; 729796211b7SLudovic Desroches } 730796211b7SLudovic Desroches 731796211b7SLudovic Desroches if (buf_nb == PDC_SECOND_BUF) { 7321ebbe3d3SLudovic Desroches pointer_reg += ATMEL_PDC_SCND_BUF_OFF; 7331ebbe3d3SLudovic Desroches counter_reg += ATMEL_PDC_SCND_BUF_OFF; 734796211b7SLudovic Desroches } 735796211b7SLudovic Desroches 7367a90dcc2SLudovic Desroches if (!host->caps.has_rwproof) { 7377a90dcc2SLudovic Desroches buf_size = host->buf_size; 7387a90dcc2SLudovic Desroches atmci_writel(host, pointer_reg, host->buf_phys_addr); 7397a90dcc2SLudovic Desroches } else { 7407a90dcc2SLudovic Desroches buf_size = sg_dma_len(host->sg); 741796211b7SLudovic Desroches atmci_writel(host, pointer_reg, sg_dma_address(host->sg)); 7427a90dcc2SLudovic Desroches } 7437a90dcc2SLudovic Desroches 7447a90dcc2SLudovic Desroches if (host->data_size <= buf_size) { 745796211b7SLudovic Desroches if (host->data_size & 0x3) { 746796211b7SLudovic Desroches /* If size is different from modulo 4, transfer bytes */ 747796211b7SLudovic Desroches atmci_writel(host, counter_reg, host->data_size); 748796211b7SLudovic Desroches atmci_writel(host, ATMCI_MR, host->mode_reg | ATMCI_MR_PDCFBYTE); 749796211b7SLudovic Desroches } else { 750796211b7SLudovic Desroches /* Else transfer 32-bits words */ 751796211b7SLudovic Desroches atmci_writel(host, counter_reg, host->data_size / 4); 752796211b7SLudovic Desroches } 753796211b7SLudovic Desroches host->data_size = 0; 754796211b7SLudovic Desroches } else { 755796211b7SLudovic Desroches /* We assume the size of a page is 32-bits aligned */ 756341fa4c3SLudovic Desroches atmci_writel(host, counter_reg, sg_dma_len(host->sg) / 4); 757341fa4c3SLudovic Desroches host->data_size -= sg_dma_len(host->sg); 758796211b7SLudovic Desroches if (host->data_size) 759796211b7SLudovic Desroches host->sg = sg_next(host->sg); 760796211b7SLudovic Desroches } 761796211b7SLudovic Desroches } 762796211b7SLudovic Desroches 763796211b7SLudovic Desroches /* 764796211b7SLudovic Desroches * Configure PDC buffer according to the data size ie configuring one or two 765796211b7SLudovic Desroches * buffers. Don't use this function if you want to configure only the second 766796211b7SLudovic Desroches * buffer. In this case, use atmci_pdc_set_single_buf. 767796211b7SLudovic Desroches */ 768796211b7SLudovic Desroches static void atmci_pdc_set_both_buf(struct atmel_mci *host, int dir) 769796211b7SLudovic Desroches { 770796211b7SLudovic Desroches atmci_pdc_set_single_buf(host, dir, PDC_FIRST_BUF); 771796211b7SLudovic Desroches if (host->data_size) 772796211b7SLudovic Desroches atmci_pdc_set_single_buf(host, dir, PDC_SECOND_BUF); 773796211b7SLudovic Desroches } 774796211b7SLudovic Desroches 775796211b7SLudovic Desroches /* 776796211b7SLudovic Desroches * Unmap sg lists, called when transfer is finished. 777796211b7SLudovic Desroches */ 778796211b7SLudovic Desroches static void atmci_pdc_cleanup(struct atmel_mci *host) 779796211b7SLudovic Desroches { 780796211b7SLudovic Desroches struct mmc_data *data = host->data; 781796211b7SLudovic Desroches 782796211b7SLudovic Desroches if (data) 783796211b7SLudovic Desroches dma_unmap_sg(&host->pdev->dev, 784796211b7SLudovic Desroches data->sg, data->sg_len, 785796211b7SLudovic Desroches ((data->flags & MMC_DATA_WRITE) 786796211b7SLudovic Desroches ? DMA_TO_DEVICE : DMA_FROM_DEVICE)); 787796211b7SLudovic Desroches } 788796211b7SLudovic Desroches 789796211b7SLudovic Desroches /* 790796211b7SLudovic Desroches * Disable PDC transfers. Update pending flags to EVENT_XFER_COMPLETE after 791796211b7SLudovic Desroches * having received ATMCI_TXBUFE or ATMCI_RXBUFF interrupt. Enable ATMCI_NOTBUSY 792796211b7SLudovic Desroches * interrupt needed for both transfer directions. 793796211b7SLudovic Desroches */ 794796211b7SLudovic Desroches static void atmci_pdc_complete(struct atmel_mci *host) 795796211b7SLudovic Desroches { 7967a90dcc2SLudovic Desroches int transfer_size = host->data->blocks * host->data->blksz; 79724011f34SLudovic Desroches int i; 7987a90dcc2SLudovic Desroches 799796211b7SLudovic Desroches atmci_writel(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS); 8007a90dcc2SLudovic Desroches 8017a90dcc2SLudovic Desroches if ((!host->caps.has_rwproof) 80224011f34SLudovic Desroches && (host->data->flags & MMC_DATA_READ)) { 80324011f34SLudovic Desroches if (host->caps.has_bad_data_ordering) 80424011f34SLudovic Desroches for (i = 0; i < transfer_size; i++) 80524011f34SLudovic Desroches host->buffer[i] = swab32(host->buffer[i]); 8067a90dcc2SLudovic Desroches sg_copy_from_buffer(host->data->sg, host->data->sg_len, 8077a90dcc2SLudovic Desroches host->buffer, transfer_size); 80824011f34SLudovic Desroches } 8097a90dcc2SLudovic Desroches 810796211b7SLudovic Desroches atmci_pdc_cleanup(host); 811796211b7SLudovic Desroches 812796211b7SLudovic Desroches /* 813796211b7SLudovic Desroches * If the card was removed, data will be NULL. No point trying 814796211b7SLudovic Desroches * to send the stop command or waiting for NBUSY in this case. 815796211b7SLudovic Desroches */ 816796211b7SLudovic Desroches if (host->data) { 8176801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, 8186801c41aSLudovic Desroches "(%s) set pending xfer complete\n", __func__); 819796211b7SLudovic Desroches atmci_set_pending(host, EVENT_XFER_COMPLETE); 820796211b7SLudovic Desroches tasklet_schedule(&host->tasklet); 821796211b7SLudovic Desroches } 822796211b7SLudovic Desroches } 823796211b7SLudovic Desroches 82465e8b083SHaavard Skinnemoen static void atmci_dma_cleanup(struct atmel_mci *host) 82565e8b083SHaavard Skinnemoen { 82665e8b083SHaavard Skinnemoen struct mmc_data *data = host->data; 82765e8b083SHaavard Skinnemoen 828009a891bSNicolas Ferre if (data) 829266ac3f2SLinus Walleij dma_unmap_sg(host->dma.chan->device->dev, 830266ac3f2SLinus Walleij data->sg, data->sg_len, 83165e8b083SHaavard Skinnemoen ((data->flags & MMC_DATA_WRITE) 83265e8b083SHaavard Skinnemoen ? DMA_TO_DEVICE : DMA_FROM_DEVICE)); 83365e8b083SHaavard Skinnemoen } 83465e8b083SHaavard Skinnemoen 835796211b7SLudovic Desroches /* 836796211b7SLudovic Desroches * This function is called by the DMA driver from tasklet context. 837796211b7SLudovic Desroches */ 83865e8b083SHaavard Skinnemoen static void atmci_dma_complete(void *arg) 83965e8b083SHaavard Skinnemoen { 84065e8b083SHaavard Skinnemoen struct atmel_mci *host = arg; 84165e8b083SHaavard Skinnemoen struct mmc_data *data = host->data; 84265e8b083SHaavard Skinnemoen 84365e8b083SHaavard Skinnemoen dev_vdbg(&host->pdev->dev, "DMA complete\n"); 84465e8b083SHaavard Skinnemoen 845ccdfe612SHein_Tibosch if (host->caps.has_dma_conf_reg) 84674791a2dSNicolas Ferre /* Disable DMA hardware handshaking on MCI */ 84703fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_DMA, atmci_readl(host, ATMCI_DMA) & ~ATMCI_DMAEN); 84874791a2dSNicolas Ferre 84965e8b083SHaavard Skinnemoen atmci_dma_cleanup(host); 85065e8b083SHaavard Skinnemoen 85165e8b083SHaavard Skinnemoen /* 85265e8b083SHaavard Skinnemoen * If the card was removed, data will be NULL. No point trying 85365e8b083SHaavard Skinnemoen * to send the stop command or waiting for NBUSY in this case. 85465e8b083SHaavard Skinnemoen */ 85565e8b083SHaavard Skinnemoen if (data) { 8566801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, 8576801c41aSLudovic Desroches "(%s) set pending xfer complete\n", __func__); 85865e8b083SHaavard Skinnemoen atmci_set_pending(host, EVENT_XFER_COMPLETE); 85965e8b083SHaavard Skinnemoen tasklet_schedule(&host->tasklet); 86065e8b083SHaavard Skinnemoen 86165e8b083SHaavard Skinnemoen /* 86265e8b083SHaavard Skinnemoen * Regardless of what the documentation says, we have 86365e8b083SHaavard Skinnemoen * to wait for NOTBUSY even after block read 86465e8b083SHaavard Skinnemoen * operations. 86565e8b083SHaavard Skinnemoen * 86665e8b083SHaavard Skinnemoen * When the DMA transfer is complete, the controller 86765e8b083SHaavard Skinnemoen * may still be reading the CRC from the card, i.e. 86865e8b083SHaavard Skinnemoen * the data transfer is still in progress and we 86965e8b083SHaavard Skinnemoen * haven't seen all the potential error bits yet. 87065e8b083SHaavard Skinnemoen * 87165e8b083SHaavard Skinnemoen * The interrupt handler will schedule a different 87265e8b083SHaavard Skinnemoen * tasklet to finish things up when the data transfer 87365e8b083SHaavard Skinnemoen * is completely done. 87465e8b083SHaavard Skinnemoen * 87565e8b083SHaavard Skinnemoen * We may not complete the mmc request here anyway 87665e8b083SHaavard Skinnemoen * because the mmc layer may call back and cause us to 87765e8b083SHaavard Skinnemoen * violate the "don't submit new operations from the 87865e8b083SHaavard Skinnemoen * completion callback" rule of the dma engine 87965e8b083SHaavard Skinnemoen * framework. 88065e8b083SHaavard Skinnemoen */ 88103fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY); 88265e8b083SHaavard Skinnemoen } 88365e8b083SHaavard Skinnemoen } 88465e8b083SHaavard Skinnemoen 885796211b7SLudovic Desroches /* 886796211b7SLudovic Desroches * Returns a mask of interrupt flags to be enabled after the whole 887796211b7SLudovic Desroches * request has been prepared. 888796211b7SLudovic Desroches */ 889796211b7SLudovic Desroches static u32 atmci_prepare_data(struct atmel_mci *host, struct mmc_data *data) 890796211b7SLudovic Desroches { 891796211b7SLudovic Desroches u32 iflags; 892796211b7SLudovic Desroches 893796211b7SLudovic Desroches data->error = -EINPROGRESS; 894796211b7SLudovic Desroches 895796211b7SLudovic Desroches host->sg = data->sg; 896bdbc5d0cSTerry Barnaby host->sg_len = data->sg_len; 897796211b7SLudovic Desroches host->data = data; 898796211b7SLudovic Desroches host->data_chan = NULL; 899796211b7SLudovic Desroches 900796211b7SLudovic Desroches iflags = ATMCI_DATA_ERROR_FLAGS; 901796211b7SLudovic Desroches 902796211b7SLudovic Desroches /* 903796211b7SLudovic Desroches * Errata: MMC data write operation with less than 12 904796211b7SLudovic Desroches * bytes is impossible. 905796211b7SLudovic Desroches * 906796211b7SLudovic Desroches * Errata: MCI Transmit Data Register (TDR) FIFO 907796211b7SLudovic Desroches * corruption when length is not multiple of 4. 908796211b7SLudovic Desroches */ 909796211b7SLudovic Desroches if (data->blocks * data->blksz < 12 910796211b7SLudovic Desroches || (data->blocks * data->blksz) & 3) 911796211b7SLudovic Desroches host->need_reset = true; 912796211b7SLudovic Desroches 913796211b7SLudovic Desroches host->pio_offset = 0; 914796211b7SLudovic Desroches if (data->flags & MMC_DATA_READ) 915796211b7SLudovic Desroches iflags |= ATMCI_RXRDY; 916796211b7SLudovic Desroches else 917796211b7SLudovic Desroches iflags |= ATMCI_TXRDY; 918796211b7SLudovic Desroches 919796211b7SLudovic Desroches return iflags; 920796211b7SLudovic Desroches } 921796211b7SLudovic Desroches 922796211b7SLudovic Desroches /* 923796211b7SLudovic Desroches * Set interrupt flags and set block length into the MCI mode register even 924796211b7SLudovic Desroches * if this value is also accessible in the MCI block register. It seems to be 925796211b7SLudovic Desroches * necessary before the High Speed MCI version. It also map sg and configure 926796211b7SLudovic Desroches * PDC registers. 927796211b7SLudovic Desroches */ 928796211b7SLudovic Desroches static u32 929796211b7SLudovic Desroches atmci_prepare_data_pdc(struct atmel_mci *host, struct mmc_data *data) 930796211b7SLudovic Desroches { 931796211b7SLudovic Desroches u32 iflags, tmp; 932796211b7SLudovic Desroches unsigned int sg_len; 933796211b7SLudovic Desroches enum dma_data_direction dir; 93424011f34SLudovic Desroches int i; 935796211b7SLudovic Desroches 936796211b7SLudovic Desroches data->error = -EINPROGRESS; 937796211b7SLudovic Desroches 938796211b7SLudovic Desroches host->data = data; 939796211b7SLudovic Desroches host->sg = data->sg; 940796211b7SLudovic Desroches iflags = ATMCI_DATA_ERROR_FLAGS; 941796211b7SLudovic Desroches 942796211b7SLudovic Desroches /* Enable pdc mode */ 943796211b7SLudovic Desroches atmci_writel(host, ATMCI_MR, host->mode_reg | ATMCI_MR_PDCMODE); 944796211b7SLudovic Desroches 945796211b7SLudovic Desroches if (data->flags & MMC_DATA_READ) { 946796211b7SLudovic Desroches dir = DMA_FROM_DEVICE; 947796211b7SLudovic Desroches iflags |= ATMCI_ENDRX | ATMCI_RXBUFF; 948796211b7SLudovic Desroches } else { 949796211b7SLudovic Desroches dir = DMA_TO_DEVICE; 950f5177547SLudovic Desroches iflags |= ATMCI_ENDTX | ATMCI_TXBUFE | ATMCI_BLKE; 951796211b7SLudovic Desroches } 952796211b7SLudovic Desroches 953796211b7SLudovic Desroches /* Set BLKLEN */ 954796211b7SLudovic Desroches tmp = atmci_readl(host, ATMCI_MR); 955796211b7SLudovic Desroches tmp &= 0x0000ffff; 956796211b7SLudovic Desroches tmp |= ATMCI_BLKLEN(data->blksz); 957796211b7SLudovic Desroches atmci_writel(host, ATMCI_MR, tmp); 958796211b7SLudovic Desroches 959796211b7SLudovic Desroches /* Configure PDC */ 960796211b7SLudovic Desroches host->data_size = data->blocks * data->blksz; 961796211b7SLudovic Desroches sg_len = dma_map_sg(&host->pdev->dev, data->sg, data->sg_len, dir); 9627a90dcc2SLudovic Desroches 9637a90dcc2SLudovic Desroches if ((!host->caps.has_rwproof) 96424011f34SLudovic Desroches && (host->data->flags & MMC_DATA_WRITE)) { 9657a90dcc2SLudovic Desroches sg_copy_to_buffer(host->data->sg, host->data->sg_len, 9667a90dcc2SLudovic Desroches host->buffer, host->data_size); 96724011f34SLudovic Desroches if (host->caps.has_bad_data_ordering) 96824011f34SLudovic Desroches for (i = 0; i < host->data_size; i++) 96924011f34SLudovic Desroches host->buffer[i] = swab32(host->buffer[i]); 97024011f34SLudovic Desroches } 9717a90dcc2SLudovic Desroches 972796211b7SLudovic Desroches if (host->data_size) 973796211b7SLudovic Desroches atmci_pdc_set_both_buf(host, 974796211b7SLudovic Desroches ((dir == DMA_FROM_DEVICE) ? XFER_RECEIVE : XFER_TRANSMIT)); 975796211b7SLudovic Desroches 976796211b7SLudovic Desroches return iflags; 977796211b7SLudovic Desroches } 978796211b7SLudovic Desroches 979796211b7SLudovic Desroches static u32 98074791a2dSNicolas Ferre atmci_prepare_data_dma(struct atmel_mci *host, struct mmc_data *data) 98165e8b083SHaavard Skinnemoen { 98265e8b083SHaavard Skinnemoen struct dma_chan *chan; 98365e8b083SHaavard Skinnemoen struct dma_async_tx_descriptor *desc; 98465e8b083SHaavard Skinnemoen struct scatterlist *sg; 98565e8b083SHaavard Skinnemoen unsigned int i; 98665e8b083SHaavard Skinnemoen enum dma_data_direction direction; 98705f5799cSVinod Koul enum dma_transfer_direction slave_dirn; 988657a77faSAtsushi Nemoto unsigned int sglen; 989693e5e20SNicolas Ferre u32 maxburst; 990796211b7SLudovic Desroches u32 iflags; 991796211b7SLudovic Desroches 992796211b7SLudovic Desroches data->error = -EINPROGRESS; 993796211b7SLudovic Desroches 994796211b7SLudovic Desroches WARN_ON(host->data); 995796211b7SLudovic Desroches host->sg = NULL; 996796211b7SLudovic Desroches host->data = data; 997796211b7SLudovic Desroches 998796211b7SLudovic Desroches iflags = ATMCI_DATA_ERROR_FLAGS; 99965e8b083SHaavard Skinnemoen 100065e8b083SHaavard Skinnemoen /* 100165e8b083SHaavard Skinnemoen * We don't do DMA on "complex" transfers, i.e. with 100265e8b083SHaavard Skinnemoen * non-word-aligned buffers or lengths. Also, we don't bother 100365e8b083SHaavard Skinnemoen * with all the DMA setup overhead for short transfers. 100465e8b083SHaavard Skinnemoen */ 1005796211b7SLudovic Desroches if (data->blocks * data->blksz < ATMCI_DMA_THRESHOLD) 1006796211b7SLudovic Desroches return atmci_prepare_data(host, data); 100765e8b083SHaavard Skinnemoen if (data->blksz & 3) 1008796211b7SLudovic Desroches return atmci_prepare_data(host, data); 100965e8b083SHaavard Skinnemoen 101065e8b083SHaavard Skinnemoen for_each_sg(data->sg, sg, data->sg_len, i) { 101165e8b083SHaavard Skinnemoen if (sg->offset & 3 || sg->length & 3) 1012796211b7SLudovic Desroches return atmci_prepare_data(host, data); 101365e8b083SHaavard Skinnemoen } 101465e8b083SHaavard Skinnemoen 101565e8b083SHaavard Skinnemoen /* If we don't have a channel, we can't do DMA */ 101665e8b083SHaavard Skinnemoen chan = host->dma.chan; 10176f49a57aSDan Williams if (chan) 101865e8b083SHaavard Skinnemoen host->data_chan = chan; 101965e8b083SHaavard Skinnemoen 102065e8b083SHaavard Skinnemoen if (!chan) 102165e8b083SHaavard Skinnemoen return -ENODEV; 102265e8b083SHaavard Skinnemoen 102305f5799cSVinod Koul if (data->flags & MMC_DATA_READ) { 102465e8b083SHaavard Skinnemoen direction = DMA_FROM_DEVICE; 1025e2b35f3dSViresh Kumar host->dma_conf.direction = slave_dirn = DMA_DEV_TO_MEM; 1026693e5e20SNicolas Ferre maxburst = atmci_convert_chksize(host->dma_conf.src_maxburst); 102705f5799cSVinod Koul } else { 102865e8b083SHaavard Skinnemoen direction = DMA_TO_DEVICE; 1029e2b35f3dSViresh Kumar host->dma_conf.direction = slave_dirn = DMA_MEM_TO_DEV; 1030693e5e20SNicolas Ferre maxburst = atmci_convert_chksize(host->dma_conf.dst_maxburst); 103105f5799cSVinod Koul } 103265e8b083SHaavard Skinnemoen 1033ccdfe612SHein_Tibosch if (host->caps.has_dma_conf_reg) 1034ccdfe612SHein_Tibosch atmci_writel(host, ATMCI_DMA, ATMCI_DMA_CHKSIZE(maxburst) | 1035ccdfe612SHein_Tibosch ATMCI_DMAEN); 1036693e5e20SNicolas Ferre 1037266ac3f2SLinus Walleij sglen = dma_map_sg(chan->device->dev, data->sg, 1038266ac3f2SLinus Walleij data->sg_len, direction); 103988ce4db3SLinus Walleij 1040e2b35f3dSViresh Kumar dmaengine_slave_config(chan, &host->dma_conf); 104116052827SAlexandre Bounine desc = dmaengine_prep_slave_sg(chan, 104205f5799cSVinod Koul data->sg, sglen, slave_dirn, 104365e8b083SHaavard Skinnemoen DMA_PREP_INTERRUPT | DMA_CTRL_ACK); 104465e8b083SHaavard Skinnemoen if (!desc) 1045657a77faSAtsushi Nemoto goto unmap_exit; 104665e8b083SHaavard Skinnemoen 104765e8b083SHaavard Skinnemoen host->dma.data_desc = desc; 104865e8b083SHaavard Skinnemoen desc->callback = atmci_dma_complete; 104965e8b083SHaavard Skinnemoen desc->callback_param = host; 105065e8b083SHaavard Skinnemoen 1051796211b7SLudovic Desroches return iflags; 1052657a77faSAtsushi Nemoto unmap_exit: 105388ce4db3SLinus Walleij dma_unmap_sg(chan->device->dev, data->sg, data->sg_len, direction); 1054657a77faSAtsushi Nemoto return -ENOMEM; 105565e8b083SHaavard Skinnemoen } 105665e8b083SHaavard Skinnemoen 1057796211b7SLudovic Desroches static void 1058796211b7SLudovic Desroches atmci_submit_data(struct atmel_mci *host, struct mmc_data *data) 1059796211b7SLudovic Desroches { 1060796211b7SLudovic Desroches return; 1061796211b7SLudovic Desroches } 1062796211b7SLudovic Desroches 1063796211b7SLudovic Desroches /* 1064796211b7SLudovic Desroches * Start PDC according to transfer direction. 1065796211b7SLudovic Desroches */ 1066796211b7SLudovic Desroches static void 1067796211b7SLudovic Desroches atmci_submit_data_pdc(struct atmel_mci *host, struct mmc_data *data) 1068796211b7SLudovic Desroches { 1069796211b7SLudovic Desroches if (data->flags & MMC_DATA_READ) 1070796211b7SLudovic Desroches atmci_writel(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTEN); 1071796211b7SLudovic Desroches else 1072796211b7SLudovic Desroches atmci_writel(host, ATMEL_PDC_PTCR, ATMEL_PDC_TXTEN); 1073796211b7SLudovic Desroches } 1074796211b7SLudovic Desroches 1075796211b7SLudovic Desroches static void 1076796211b7SLudovic Desroches atmci_submit_data_dma(struct atmel_mci *host, struct mmc_data *data) 107774791a2dSNicolas Ferre { 107874791a2dSNicolas Ferre struct dma_chan *chan = host->data_chan; 107974791a2dSNicolas Ferre struct dma_async_tx_descriptor *desc = host->dma.data_desc; 108074791a2dSNicolas Ferre 108174791a2dSNicolas Ferre if (chan) { 10825328906aSLinus Walleij dmaengine_submit(desc); 10835328906aSLinus Walleij dma_async_issue_pending(chan); 108474791a2dSNicolas Ferre } 108574791a2dSNicolas Ferre } 108674791a2dSNicolas Ferre 1087796211b7SLudovic Desroches static void atmci_stop_transfer(struct atmel_mci *host) 108865e8b083SHaavard Skinnemoen { 10896801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, 10906801c41aSLudovic Desroches "(%s) set pending xfer complete\n", __func__); 109165e8b083SHaavard Skinnemoen atmci_set_pending(host, EVENT_XFER_COMPLETE); 109203fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY); 109365e8b083SHaavard Skinnemoen } 109465e8b083SHaavard Skinnemoen 10957d2be074SHaavard Skinnemoen /* 10967122bbb0SMasanari Iida * Stop data transfer because error(s) occurred. 10977d2be074SHaavard Skinnemoen */ 1098796211b7SLudovic Desroches static void atmci_stop_transfer_pdc(struct atmel_mci *host) 10997d2be074SHaavard Skinnemoen { 1100f5177547SLudovic Desroches atmci_writel(host, ATMEL_PDC_PTCR, ATMEL_PDC_RXTDIS | ATMEL_PDC_TXTDIS); 1101796211b7SLudovic Desroches } 11027d2be074SHaavard Skinnemoen 1103796211b7SLudovic Desroches static void atmci_stop_transfer_dma(struct atmel_mci *host) 1104796211b7SLudovic Desroches { 1105796211b7SLudovic Desroches struct dma_chan *chan = host->data_chan; 11067d2be074SHaavard Skinnemoen 1107796211b7SLudovic Desroches if (chan) { 1108796211b7SLudovic Desroches dmaengine_terminate_all(chan); 1109796211b7SLudovic Desroches atmci_dma_cleanup(host); 1110796211b7SLudovic Desroches } else { 1111796211b7SLudovic Desroches /* Data transfer was stopped by the interrupt handler */ 11126801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, 11136801c41aSLudovic Desroches "(%s) set pending xfer complete\n", __func__); 1114796211b7SLudovic Desroches atmci_set_pending(host, EVENT_XFER_COMPLETE); 1115796211b7SLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY); 1116796211b7SLudovic Desroches } 1117796211b7SLudovic Desroches } 1118965ebf33SHaavard Skinnemoen 1119965ebf33SHaavard Skinnemoen /* 1120796211b7SLudovic Desroches * Start a request: prepare data if needed, prepare the command and activate 1121796211b7SLudovic Desroches * interrupts. 1122965ebf33SHaavard Skinnemoen */ 1123965ebf33SHaavard Skinnemoen static void atmci_start_request(struct atmel_mci *host, 1124965ebf33SHaavard Skinnemoen struct atmel_mci_slot *slot) 11257d2be074SHaavard Skinnemoen { 1126965ebf33SHaavard Skinnemoen struct mmc_request *mrq; 11277d2be074SHaavard Skinnemoen struct mmc_command *cmd; 1128965ebf33SHaavard Skinnemoen struct mmc_data *data; 11297d2be074SHaavard Skinnemoen u32 iflags; 1130965ebf33SHaavard Skinnemoen u32 cmdflags; 1131965ebf33SHaavard Skinnemoen 1132965ebf33SHaavard Skinnemoen mrq = slot->mrq; 1133965ebf33SHaavard Skinnemoen host->cur_slot = slot; 1134965ebf33SHaavard Skinnemoen host->mrq = mrq; 1135965ebf33SHaavard Skinnemoen 1136965ebf33SHaavard Skinnemoen host->pending_events = 0; 1137965ebf33SHaavard Skinnemoen host->completed_events = 0; 1138f5177547SLudovic Desroches host->cmd_status = 0; 1139ca55f46eSHaavard Skinnemoen host->data_status = 0; 1140965ebf33SHaavard Skinnemoen 11416801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "start request: cmd %u\n", mrq->cmd->opcode); 11426801c41aSLudovic Desroches 114324011f34SLudovic Desroches if (host->need_reset || host->caps.need_reset_after_xfer) { 114418ee684bSLudovic Desroches iflags = atmci_readl(host, ATMCI_IMR); 114518ee684bSLudovic Desroches iflags &= (ATMCI_SDIOIRQA | ATMCI_SDIOIRQB); 114603fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST); 114703fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIEN); 114803fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_MR, host->mode_reg); 1149796211b7SLudovic Desroches if (host->caps.has_cfg_reg) 115003fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CFG, host->cfg_reg); 115118ee684bSLudovic Desroches atmci_writel(host, ATMCI_IER, iflags); 1152965ebf33SHaavard Skinnemoen host->need_reset = false; 1153965ebf33SHaavard Skinnemoen } 115403fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_SDCR, slot->sdc_reg); 11557d2be074SHaavard Skinnemoen 115603fc9a7fSLudovic Desroches iflags = atmci_readl(host, ATMCI_IMR); 11572c96a293SLudovic Desroches if (iflags & ~(ATMCI_SDIOIRQA | ATMCI_SDIOIRQB)) 1158f5177547SLudovic Desroches dev_dbg(&slot->mmc->class_dev, "WARNING: IMR=0x%08x\n", 1159965ebf33SHaavard Skinnemoen iflags); 11607d2be074SHaavard Skinnemoen 1161965ebf33SHaavard Skinnemoen if (unlikely(test_and_clear_bit(ATMCI_CARD_NEED_INIT, &slot->flags))) { 1162965ebf33SHaavard Skinnemoen /* Send init sequence (74 clock cycles) */ 116303fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CMDR, ATMCI_CMDR_SPCMD_INIT); 116403fc9a7fSLudovic Desroches while (!(atmci_readl(host, ATMCI_SR) & ATMCI_CMDRDY)) 1165965ebf33SHaavard Skinnemoen cpu_relax(); 11667d2be074SHaavard Skinnemoen } 116774791a2dSNicolas Ferre iflags = 0; 11687d2be074SHaavard Skinnemoen data = mrq->data; 11697d2be074SHaavard Skinnemoen if (data) { 1170965ebf33SHaavard Skinnemoen atmci_set_timeout(host, slot, data); 1171a252e3e3SHaavard Skinnemoen 1172a252e3e3SHaavard Skinnemoen /* Must set block count/size before sending command */ 117303fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_BLKR, ATMCI_BCNT(data->blocks) 11742c96a293SLudovic Desroches | ATMCI_BLKLEN(data->blksz)); 1175965ebf33SHaavard Skinnemoen dev_vdbg(&slot->mmc->class_dev, "BLKR=0x%08x\n", 11762c96a293SLudovic Desroches ATMCI_BCNT(data->blocks) | ATMCI_BLKLEN(data->blksz)); 117774791a2dSNicolas Ferre 1178796211b7SLudovic Desroches iflags |= host->prepare_data(host, data); 11797d2be074SHaavard Skinnemoen } 11807d2be074SHaavard Skinnemoen 11812c96a293SLudovic Desroches iflags |= ATMCI_CMDRDY; 11827d2be074SHaavard Skinnemoen cmd = mrq->cmd; 1183965ebf33SHaavard Skinnemoen cmdflags = atmci_prepare_command(slot->mmc, cmd); 118411d1488bSLudovic Desroches atmci_send_command(host, cmd, cmdflags); 11857d2be074SHaavard Skinnemoen 11867d2be074SHaavard Skinnemoen if (data) 1187796211b7SLudovic Desroches host->submit_data(host, data); 11887d2be074SHaavard Skinnemoen 11897d2be074SHaavard Skinnemoen if (mrq->stop) { 1190965ebf33SHaavard Skinnemoen host->stop_cmdr = atmci_prepare_command(slot->mmc, mrq->stop); 11912c96a293SLudovic Desroches host->stop_cmdr |= ATMCI_CMDR_STOP_XFER; 11927d2be074SHaavard Skinnemoen if (!(data->flags & MMC_DATA_WRITE)) 11932c96a293SLudovic Desroches host->stop_cmdr |= ATMCI_CMDR_TRDIR_READ; 11947d2be074SHaavard Skinnemoen if (data->flags & MMC_DATA_STREAM) 11952c96a293SLudovic Desroches host->stop_cmdr |= ATMCI_CMDR_STREAM; 11967d2be074SHaavard Skinnemoen else 11972c96a293SLudovic Desroches host->stop_cmdr |= ATMCI_CMDR_MULTI_BLOCK; 11987d2be074SHaavard Skinnemoen } 11997d2be074SHaavard Skinnemoen 12007d2be074SHaavard Skinnemoen /* 12017d2be074SHaavard Skinnemoen * We could have enabled interrupts earlier, but I suspect 12027d2be074SHaavard Skinnemoen * that would open up a nice can of interesting race 12037d2be074SHaavard Skinnemoen * conditions (e.g. command and data complete, but stop not 12047d2be074SHaavard Skinnemoen * prepared yet.) 12057d2be074SHaavard Skinnemoen */ 120603fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_IER, iflags); 120724011f34SLudovic Desroches 120824011f34SLudovic Desroches mod_timer(&host->timer, jiffies + msecs_to_jiffies(2000)); 1209965ebf33SHaavard Skinnemoen } 12107d2be074SHaavard Skinnemoen 1211965ebf33SHaavard Skinnemoen static void atmci_queue_request(struct atmel_mci *host, 1212965ebf33SHaavard Skinnemoen struct atmel_mci_slot *slot, struct mmc_request *mrq) 1213965ebf33SHaavard Skinnemoen { 1214965ebf33SHaavard Skinnemoen dev_vdbg(&slot->mmc->class_dev, "queue request: state=%d\n", 1215965ebf33SHaavard Skinnemoen host->state); 1216965ebf33SHaavard Skinnemoen 1217965ebf33SHaavard Skinnemoen spin_lock_bh(&host->lock); 1218965ebf33SHaavard Skinnemoen slot->mrq = mrq; 1219965ebf33SHaavard Skinnemoen if (host->state == STATE_IDLE) { 1220965ebf33SHaavard Skinnemoen host->state = STATE_SENDING_CMD; 1221965ebf33SHaavard Skinnemoen atmci_start_request(host, slot); 1222965ebf33SHaavard Skinnemoen } else { 12236801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "queue request\n"); 1224965ebf33SHaavard Skinnemoen list_add_tail(&slot->queue_node, &host->queue); 1225965ebf33SHaavard Skinnemoen } 1226965ebf33SHaavard Skinnemoen spin_unlock_bh(&host->lock); 1227965ebf33SHaavard Skinnemoen } 1228965ebf33SHaavard Skinnemoen 1229965ebf33SHaavard Skinnemoen static void atmci_request(struct mmc_host *mmc, struct mmc_request *mrq) 1230965ebf33SHaavard Skinnemoen { 1231965ebf33SHaavard Skinnemoen struct atmel_mci_slot *slot = mmc_priv(mmc); 1232965ebf33SHaavard Skinnemoen struct atmel_mci *host = slot->host; 1233965ebf33SHaavard Skinnemoen struct mmc_data *data; 1234965ebf33SHaavard Skinnemoen 1235965ebf33SHaavard Skinnemoen WARN_ON(slot->mrq); 12366801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "MRQ: cmd %u\n", mrq->cmd->opcode); 1237965ebf33SHaavard Skinnemoen 1238965ebf33SHaavard Skinnemoen /* 1239965ebf33SHaavard Skinnemoen * We may "know" the card is gone even though there's still an 1240965ebf33SHaavard Skinnemoen * electrical connection. If so, we really need to communicate 1241965ebf33SHaavard Skinnemoen * this to the MMC core since there won't be any more 1242965ebf33SHaavard Skinnemoen * interrupts as the card is completely removed. Otherwise, 1243965ebf33SHaavard Skinnemoen * the MMC core might believe the card is still there even 1244965ebf33SHaavard Skinnemoen * though the card was just removed very slowly. 1245965ebf33SHaavard Skinnemoen */ 1246965ebf33SHaavard Skinnemoen if (!test_bit(ATMCI_CARD_PRESENT, &slot->flags)) { 1247965ebf33SHaavard Skinnemoen mrq->cmd->error = -ENOMEDIUM; 1248965ebf33SHaavard Skinnemoen mmc_request_done(mmc, mrq); 12497d2be074SHaavard Skinnemoen return; 1250965ebf33SHaavard Skinnemoen } 12517d2be074SHaavard Skinnemoen 1252965ebf33SHaavard Skinnemoen /* We don't support multiple blocks of weird lengths. */ 1253965ebf33SHaavard Skinnemoen data = mrq->data; 1254965ebf33SHaavard Skinnemoen if (data && data->blocks > 1 && data->blksz & 3) { 12557d2be074SHaavard Skinnemoen mrq->cmd->error = -EINVAL; 12567d2be074SHaavard Skinnemoen mmc_request_done(mmc, mrq); 12577d2be074SHaavard Skinnemoen } 12587d2be074SHaavard Skinnemoen 1259965ebf33SHaavard Skinnemoen atmci_queue_request(host, slot, mrq); 1260965ebf33SHaavard Skinnemoen } 1261965ebf33SHaavard Skinnemoen 12627d2be074SHaavard Skinnemoen static void atmci_set_ios(struct mmc_host *mmc, struct mmc_ios *ios) 12637d2be074SHaavard Skinnemoen { 1264965ebf33SHaavard Skinnemoen struct atmel_mci_slot *slot = mmc_priv(mmc); 1265965ebf33SHaavard Skinnemoen struct atmel_mci *host = slot->host; 1266965ebf33SHaavard Skinnemoen unsigned int i; 12677d2be074SHaavard Skinnemoen 12682c96a293SLudovic Desroches slot->sdc_reg &= ~ATMCI_SDCBUS_MASK; 1269945533b5SHaavard Skinnemoen switch (ios->bus_width) { 1270945533b5SHaavard Skinnemoen case MMC_BUS_WIDTH_1: 12712c96a293SLudovic Desroches slot->sdc_reg |= ATMCI_SDCBUS_1BIT; 1272945533b5SHaavard Skinnemoen break; 1273945533b5SHaavard Skinnemoen case MMC_BUS_WIDTH_4: 12742c96a293SLudovic Desroches slot->sdc_reg |= ATMCI_SDCBUS_4BIT; 1275945533b5SHaavard Skinnemoen break; 1276945533b5SHaavard Skinnemoen } 1277945533b5SHaavard Skinnemoen 12787d2be074SHaavard Skinnemoen if (ios->clock) { 1279965ebf33SHaavard Skinnemoen unsigned int clock_min = ~0U; 12807d2be074SHaavard Skinnemoen u32 clkdiv; 12817d2be074SHaavard Skinnemoen 1282965ebf33SHaavard Skinnemoen spin_lock_bh(&host->lock); 1283965ebf33SHaavard Skinnemoen if (!host->mode_reg) { 1284945533b5SHaavard Skinnemoen clk_enable(host->mck); 128503fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST); 128603fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIEN); 1287796211b7SLudovic Desroches if (host->caps.has_cfg_reg) 128803fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CFG, host->cfg_reg); 1289965ebf33SHaavard Skinnemoen } 1290945533b5SHaavard Skinnemoen 1291965ebf33SHaavard Skinnemoen /* 1292965ebf33SHaavard Skinnemoen * Use mirror of ios->clock to prevent race with mmc 1293965ebf33SHaavard Skinnemoen * core ios update when finding the minimum. 1294965ebf33SHaavard Skinnemoen */ 1295965ebf33SHaavard Skinnemoen slot->clock = ios->clock; 12962c96a293SLudovic Desroches for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) { 1297965ebf33SHaavard Skinnemoen if (host->slot[i] && host->slot[i]->clock 1298965ebf33SHaavard Skinnemoen && host->slot[i]->clock < clock_min) 1299965ebf33SHaavard Skinnemoen clock_min = host->slot[i]->clock; 1300965ebf33SHaavard Skinnemoen } 1301965ebf33SHaavard Skinnemoen 1302965ebf33SHaavard Skinnemoen /* Calculate clock divider */ 1303faf8180bSLudovic Desroches if (host->caps.has_odd_clk_div) { 1304faf8180bSLudovic Desroches clkdiv = DIV_ROUND_UP(host->bus_hz, clock_min) - 2; 1305faf8180bSLudovic Desroches if (clkdiv > 511) { 1306faf8180bSLudovic Desroches dev_warn(&mmc->class_dev, 1307faf8180bSLudovic Desroches "clock %u too slow; using %lu\n", 1308faf8180bSLudovic Desroches clock_min, host->bus_hz / (511 + 2)); 1309faf8180bSLudovic Desroches clkdiv = 511; 1310faf8180bSLudovic Desroches } 1311faf8180bSLudovic Desroches host->mode_reg = ATMCI_MR_CLKDIV(clkdiv >> 1) 1312faf8180bSLudovic Desroches | ATMCI_MR_CLKODD(clkdiv & 1); 1313faf8180bSLudovic Desroches } else { 1314965ebf33SHaavard Skinnemoen clkdiv = DIV_ROUND_UP(host->bus_hz, 2 * clock_min) - 1; 13157d2be074SHaavard Skinnemoen if (clkdiv > 255) { 13167d2be074SHaavard Skinnemoen dev_warn(&mmc->class_dev, 13177d2be074SHaavard Skinnemoen "clock %u too slow; using %lu\n", 1318965ebf33SHaavard Skinnemoen clock_min, host->bus_hz / (2 * 256)); 13197d2be074SHaavard Skinnemoen clkdiv = 255; 13207d2be074SHaavard Skinnemoen } 13212c96a293SLudovic Desroches host->mode_reg = ATMCI_MR_CLKDIV(clkdiv); 1322faf8180bSLudovic Desroches } 132304d699c3SRob Emanuele 1324965ebf33SHaavard Skinnemoen /* 1325965ebf33SHaavard Skinnemoen * WRPROOF and RDPROOF prevent overruns/underruns by 1326965ebf33SHaavard Skinnemoen * stopping the clock when the FIFO is full/empty. 1327965ebf33SHaavard Skinnemoen * This state is not expected to last for long. 1328965ebf33SHaavard Skinnemoen */ 1329796211b7SLudovic Desroches if (host->caps.has_rwproof) 13302c96a293SLudovic Desroches host->mode_reg |= (ATMCI_MR_WRPROOF | ATMCI_MR_RDPROOF); 13317d2be074SHaavard Skinnemoen 1332796211b7SLudovic Desroches if (host->caps.has_cfg_reg) { 133399ddffd8SNicolas Ferre /* setup High Speed mode in relation with card capacity */ 133499ddffd8SNicolas Ferre if (ios->timing == MMC_TIMING_SD_HS) 13352c96a293SLudovic Desroches host->cfg_reg |= ATMCI_CFG_HSMODE; 1336965ebf33SHaavard Skinnemoen else 13372c96a293SLudovic Desroches host->cfg_reg &= ~ATMCI_CFG_HSMODE; 133899ddffd8SNicolas Ferre } 133999ddffd8SNicolas Ferre 134099ddffd8SNicolas Ferre if (list_empty(&host->queue)) { 134103fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_MR, host->mode_reg); 1342796211b7SLudovic Desroches if (host->caps.has_cfg_reg) 134303fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CFG, host->cfg_reg); 134499ddffd8SNicolas Ferre } else { 1345965ebf33SHaavard Skinnemoen host->need_clock_update = true; 134699ddffd8SNicolas Ferre } 1347965ebf33SHaavard Skinnemoen 1348965ebf33SHaavard Skinnemoen spin_unlock_bh(&host->lock); 1349945533b5SHaavard Skinnemoen } else { 1350965ebf33SHaavard Skinnemoen bool any_slot_active = false; 1351965ebf33SHaavard Skinnemoen 1352965ebf33SHaavard Skinnemoen spin_lock_bh(&host->lock); 1353965ebf33SHaavard Skinnemoen slot->clock = 0; 13542c96a293SLudovic Desroches for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) { 1355965ebf33SHaavard Skinnemoen if (host->slot[i] && host->slot[i]->clock) { 1356965ebf33SHaavard Skinnemoen any_slot_active = true; 1357965ebf33SHaavard Skinnemoen break; 1358965ebf33SHaavard Skinnemoen } 1359965ebf33SHaavard Skinnemoen } 1360965ebf33SHaavard Skinnemoen if (!any_slot_active) { 136103fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIDIS); 1362945533b5SHaavard Skinnemoen if (host->mode_reg) { 136303fc9a7fSLudovic Desroches atmci_readl(host, ATMCI_MR); 1364945533b5SHaavard Skinnemoen clk_disable(host->mck); 1365945533b5SHaavard Skinnemoen } 1366945533b5SHaavard Skinnemoen host->mode_reg = 0; 13677d2be074SHaavard Skinnemoen } 1368965ebf33SHaavard Skinnemoen spin_unlock_bh(&host->lock); 1369965ebf33SHaavard Skinnemoen } 13707d2be074SHaavard Skinnemoen 13717d2be074SHaavard Skinnemoen switch (ios->power_mode) { 1372965ebf33SHaavard Skinnemoen case MMC_POWER_UP: 1373965ebf33SHaavard Skinnemoen set_bit(ATMCI_CARD_NEED_INIT, &slot->flags); 1374965ebf33SHaavard Skinnemoen break; 13757d2be074SHaavard Skinnemoen default: 13767d2be074SHaavard Skinnemoen /* 13777d2be074SHaavard Skinnemoen * TODO: None of the currently available AVR32-based 13787d2be074SHaavard Skinnemoen * boards allow MMC power to be turned off. Implement 13797d2be074SHaavard Skinnemoen * power control when this can be tested properly. 1380965ebf33SHaavard Skinnemoen * 1381965ebf33SHaavard Skinnemoen * We also need to hook this into the clock management 1382965ebf33SHaavard Skinnemoen * somehow so that newly inserted cards aren't 1383965ebf33SHaavard Skinnemoen * subjected to a fast clock before we have a chance 1384965ebf33SHaavard Skinnemoen * to figure out what the maximum rate is. Currently, 1385965ebf33SHaavard Skinnemoen * there's no way to avoid this, and there never will 1386965ebf33SHaavard Skinnemoen * be for boards that don't support power control. 13877d2be074SHaavard Skinnemoen */ 13887d2be074SHaavard Skinnemoen break; 13897d2be074SHaavard Skinnemoen } 13907d2be074SHaavard Skinnemoen } 13917d2be074SHaavard Skinnemoen 13927d2be074SHaavard Skinnemoen static int atmci_get_ro(struct mmc_host *mmc) 13937d2be074SHaavard Skinnemoen { 1394965ebf33SHaavard Skinnemoen int read_only = -ENOSYS; 1395965ebf33SHaavard Skinnemoen struct atmel_mci_slot *slot = mmc_priv(mmc); 13967d2be074SHaavard Skinnemoen 1397965ebf33SHaavard Skinnemoen if (gpio_is_valid(slot->wp_pin)) { 1398965ebf33SHaavard Skinnemoen read_only = gpio_get_value(slot->wp_pin); 13997d2be074SHaavard Skinnemoen dev_dbg(&mmc->class_dev, "card is %s\n", 14007d2be074SHaavard Skinnemoen read_only ? "read-only" : "read-write"); 14017d2be074SHaavard Skinnemoen } 14027d2be074SHaavard Skinnemoen 14037d2be074SHaavard Skinnemoen return read_only; 14047d2be074SHaavard Skinnemoen } 14057d2be074SHaavard Skinnemoen 1406965ebf33SHaavard Skinnemoen static int atmci_get_cd(struct mmc_host *mmc) 1407965ebf33SHaavard Skinnemoen { 1408965ebf33SHaavard Skinnemoen int present = -ENOSYS; 1409965ebf33SHaavard Skinnemoen struct atmel_mci_slot *slot = mmc_priv(mmc); 1410965ebf33SHaavard Skinnemoen 1411965ebf33SHaavard Skinnemoen if (gpio_is_valid(slot->detect_pin)) { 14121c1452beSJonas Larsson present = !(gpio_get_value(slot->detect_pin) ^ 14131c1452beSJonas Larsson slot->detect_is_active_high); 1414965ebf33SHaavard Skinnemoen dev_dbg(&mmc->class_dev, "card is %spresent\n", 1415965ebf33SHaavard Skinnemoen present ? "" : "not "); 1416965ebf33SHaavard Skinnemoen } 1417965ebf33SHaavard Skinnemoen 1418965ebf33SHaavard Skinnemoen return present; 1419965ebf33SHaavard Skinnemoen } 1420965ebf33SHaavard Skinnemoen 142188ff82edSAnders Grahn static void atmci_enable_sdio_irq(struct mmc_host *mmc, int enable) 142288ff82edSAnders Grahn { 142388ff82edSAnders Grahn struct atmel_mci_slot *slot = mmc_priv(mmc); 142488ff82edSAnders Grahn struct atmel_mci *host = slot->host; 142588ff82edSAnders Grahn 142688ff82edSAnders Grahn if (enable) 142703fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_IER, slot->sdio_irq); 142888ff82edSAnders Grahn else 142903fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_IDR, slot->sdio_irq); 143088ff82edSAnders Grahn } 143188ff82edSAnders Grahn 1432965ebf33SHaavard Skinnemoen static const struct mmc_host_ops atmci_ops = { 14337d2be074SHaavard Skinnemoen .request = atmci_request, 14347d2be074SHaavard Skinnemoen .set_ios = atmci_set_ios, 14357d2be074SHaavard Skinnemoen .get_ro = atmci_get_ro, 1436965ebf33SHaavard Skinnemoen .get_cd = atmci_get_cd, 143788ff82edSAnders Grahn .enable_sdio_irq = atmci_enable_sdio_irq, 14387d2be074SHaavard Skinnemoen }; 14397d2be074SHaavard Skinnemoen 1440965ebf33SHaavard Skinnemoen /* Called with host->lock held */ 1441965ebf33SHaavard Skinnemoen static void atmci_request_end(struct atmel_mci *host, struct mmc_request *mrq) 1442965ebf33SHaavard Skinnemoen __releases(&host->lock) 1443965ebf33SHaavard Skinnemoen __acquires(&host->lock) 1444965ebf33SHaavard Skinnemoen { 1445965ebf33SHaavard Skinnemoen struct atmel_mci_slot *slot = NULL; 1446965ebf33SHaavard Skinnemoen struct mmc_host *prev_mmc = host->cur_slot->mmc; 1447965ebf33SHaavard Skinnemoen 1448965ebf33SHaavard Skinnemoen WARN_ON(host->cmd || host->data); 1449965ebf33SHaavard Skinnemoen 1450965ebf33SHaavard Skinnemoen /* 1451965ebf33SHaavard Skinnemoen * Update the MMC clock rate if necessary. This may be 1452965ebf33SHaavard Skinnemoen * necessary if set_ios() is called when a different slot is 145325985edcSLucas De Marchi * busy transferring data. 1454965ebf33SHaavard Skinnemoen */ 145599ddffd8SNicolas Ferre if (host->need_clock_update) { 145603fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_MR, host->mode_reg); 1457796211b7SLudovic Desroches if (host->caps.has_cfg_reg) 145803fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CFG, host->cfg_reg); 145999ddffd8SNicolas Ferre } 1460965ebf33SHaavard Skinnemoen 1461965ebf33SHaavard Skinnemoen host->cur_slot->mrq = NULL; 1462965ebf33SHaavard Skinnemoen host->mrq = NULL; 1463965ebf33SHaavard Skinnemoen if (!list_empty(&host->queue)) { 1464965ebf33SHaavard Skinnemoen slot = list_entry(host->queue.next, 1465965ebf33SHaavard Skinnemoen struct atmel_mci_slot, queue_node); 1466965ebf33SHaavard Skinnemoen list_del(&slot->queue_node); 1467965ebf33SHaavard Skinnemoen dev_vdbg(&host->pdev->dev, "list not empty: %s is next\n", 1468965ebf33SHaavard Skinnemoen mmc_hostname(slot->mmc)); 1469965ebf33SHaavard Skinnemoen host->state = STATE_SENDING_CMD; 1470965ebf33SHaavard Skinnemoen atmci_start_request(host, slot); 1471965ebf33SHaavard Skinnemoen } else { 1472965ebf33SHaavard Skinnemoen dev_vdbg(&host->pdev->dev, "list empty\n"); 1473965ebf33SHaavard Skinnemoen host->state = STATE_IDLE; 1474965ebf33SHaavard Skinnemoen } 1475965ebf33SHaavard Skinnemoen 147624011f34SLudovic Desroches del_timer(&host->timer); 147724011f34SLudovic Desroches 1478965ebf33SHaavard Skinnemoen spin_unlock(&host->lock); 1479965ebf33SHaavard Skinnemoen mmc_request_done(prev_mmc, mrq); 1480965ebf33SHaavard Skinnemoen spin_lock(&host->lock); 1481965ebf33SHaavard Skinnemoen } 1482965ebf33SHaavard Skinnemoen 14837d2be074SHaavard Skinnemoen static void atmci_command_complete(struct atmel_mci *host, 1484c06ad258SHaavard Skinnemoen struct mmc_command *cmd) 14857d2be074SHaavard Skinnemoen { 1486c06ad258SHaavard Skinnemoen u32 status = host->cmd_status; 1487c06ad258SHaavard Skinnemoen 14887d2be074SHaavard Skinnemoen /* Read the response from the card (up to 16 bytes) */ 148903fc9a7fSLudovic Desroches cmd->resp[0] = atmci_readl(host, ATMCI_RSPR); 149003fc9a7fSLudovic Desroches cmd->resp[1] = atmci_readl(host, ATMCI_RSPR); 149103fc9a7fSLudovic Desroches cmd->resp[2] = atmci_readl(host, ATMCI_RSPR); 149203fc9a7fSLudovic Desroches cmd->resp[3] = atmci_readl(host, ATMCI_RSPR); 14937d2be074SHaavard Skinnemoen 14942c96a293SLudovic Desroches if (status & ATMCI_RTOE) 14957d2be074SHaavard Skinnemoen cmd->error = -ETIMEDOUT; 14962c96a293SLudovic Desroches else if ((cmd->flags & MMC_RSP_CRC) && (status & ATMCI_RCRCE)) 14977d2be074SHaavard Skinnemoen cmd->error = -EILSEQ; 14982c96a293SLudovic Desroches else if (status & (ATMCI_RINDE | ATMCI_RDIRE | ATMCI_RENDE)) 14997d2be074SHaavard Skinnemoen cmd->error = -EIO; 150024011f34SLudovic Desroches else if (host->mrq->data && (host->mrq->data->blksz & 3)) { 150124011f34SLudovic Desroches if (host->caps.need_blksz_mul_4) { 150224011f34SLudovic Desroches cmd->error = -EINVAL; 150324011f34SLudovic Desroches host->need_reset = 1; 150424011f34SLudovic Desroches } 150524011f34SLudovic Desroches } else 15067d2be074SHaavard Skinnemoen cmd->error = 0; 15077d2be074SHaavard Skinnemoen } 15087d2be074SHaavard Skinnemoen 15097d2be074SHaavard Skinnemoen static void atmci_detect_change(unsigned long data) 15107d2be074SHaavard Skinnemoen { 1511965ebf33SHaavard Skinnemoen struct atmel_mci_slot *slot = (struct atmel_mci_slot *)data; 1512965ebf33SHaavard Skinnemoen bool present; 1513965ebf33SHaavard Skinnemoen bool present_old; 15147d2be074SHaavard Skinnemoen 15157d2be074SHaavard Skinnemoen /* 1516965ebf33SHaavard Skinnemoen * atmci_cleanup_slot() sets the ATMCI_SHUTDOWN flag before 1517965ebf33SHaavard Skinnemoen * freeing the interrupt. We must not re-enable the interrupt 1518965ebf33SHaavard Skinnemoen * if it has been freed, and if we're shutting down, it 1519965ebf33SHaavard Skinnemoen * doesn't really matter whether the card is present or not. 15207d2be074SHaavard Skinnemoen */ 15217d2be074SHaavard Skinnemoen smp_rmb(); 1522965ebf33SHaavard Skinnemoen if (test_bit(ATMCI_SHUTDOWN, &slot->flags)) 15237d2be074SHaavard Skinnemoen return; 15247d2be074SHaavard Skinnemoen 1525965ebf33SHaavard Skinnemoen enable_irq(gpio_to_irq(slot->detect_pin)); 15261c1452beSJonas Larsson present = !(gpio_get_value(slot->detect_pin) ^ 15271c1452beSJonas Larsson slot->detect_is_active_high); 1528965ebf33SHaavard Skinnemoen present_old = test_bit(ATMCI_CARD_PRESENT, &slot->flags); 15297d2be074SHaavard Skinnemoen 1530965ebf33SHaavard Skinnemoen dev_vdbg(&slot->mmc->class_dev, "detect change: %d (was %d)\n", 1531965ebf33SHaavard Skinnemoen present, present_old); 15327d2be074SHaavard Skinnemoen 1533965ebf33SHaavard Skinnemoen if (present != present_old) { 1534965ebf33SHaavard Skinnemoen struct atmel_mci *host = slot->host; 1535965ebf33SHaavard Skinnemoen struct mmc_request *mrq; 1536965ebf33SHaavard Skinnemoen 1537965ebf33SHaavard Skinnemoen dev_dbg(&slot->mmc->class_dev, "card %s\n", 15387d2be074SHaavard Skinnemoen present ? "inserted" : "removed"); 15397d2be074SHaavard Skinnemoen 1540965ebf33SHaavard Skinnemoen spin_lock(&host->lock); 1541965ebf33SHaavard Skinnemoen 1542965ebf33SHaavard Skinnemoen if (!present) 1543965ebf33SHaavard Skinnemoen clear_bit(ATMCI_CARD_PRESENT, &slot->flags); 1544965ebf33SHaavard Skinnemoen else 1545965ebf33SHaavard Skinnemoen set_bit(ATMCI_CARD_PRESENT, &slot->flags); 15467d2be074SHaavard Skinnemoen 15477d2be074SHaavard Skinnemoen /* Clean up queue if present */ 1548965ebf33SHaavard Skinnemoen mrq = slot->mrq; 15497d2be074SHaavard Skinnemoen if (mrq) { 1550965ebf33SHaavard Skinnemoen if (mrq == host->mrq) { 15517d2be074SHaavard Skinnemoen /* 15527d2be074SHaavard Skinnemoen * Reset controller to terminate any ongoing 15537d2be074SHaavard Skinnemoen * commands or data transfers. 15547d2be074SHaavard Skinnemoen */ 155503fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST); 155603fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIEN); 155703fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_MR, host->mode_reg); 1558796211b7SLudovic Desroches if (host->caps.has_cfg_reg) 155903fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CFG, host->cfg_reg); 15607d2be074SHaavard Skinnemoen 15617d2be074SHaavard Skinnemoen host->data = NULL; 15627d2be074SHaavard Skinnemoen host->cmd = NULL; 1563c06ad258SHaavard Skinnemoen 1564c06ad258SHaavard Skinnemoen switch (host->state) { 1565965ebf33SHaavard Skinnemoen case STATE_IDLE: 1566965ebf33SHaavard Skinnemoen break; 1567c06ad258SHaavard Skinnemoen case STATE_SENDING_CMD: 1568c06ad258SHaavard Skinnemoen mrq->cmd->error = -ENOMEDIUM; 1569f5177547SLudovic Desroches if (mrq->data) 1570f5177547SLudovic Desroches host->stop_transfer(host); 1571c06ad258SHaavard Skinnemoen break; 1572f5177547SLudovic Desroches case STATE_DATA_XFER: 1573c06ad258SHaavard Skinnemoen mrq->data->error = -ENOMEDIUM; 1574796211b7SLudovic Desroches host->stop_transfer(host); 1575c06ad258SHaavard Skinnemoen break; 1576f5177547SLudovic Desroches case STATE_WAITING_NOTBUSY: 1577c06ad258SHaavard Skinnemoen mrq->data->error = -ENOMEDIUM; 1578c06ad258SHaavard Skinnemoen break; 1579c06ad258SHaavard Skinnemoen case STATE_SENDING_STOP: 1580c06ad258SHaavard Skinnemoen mrq->stop->error = -ENOMEDIUM; 1581c06ad258SHaavard Skinnemoen break; 1582f5177547SLudovic Desroches case STATE_END_REQUEST: 1583f5177547SLudovic Desroches break; 1584c06ad258SHaavard Skinnemoen } 1585c06ad258SHaavard Skinnemoen 1586965ebf33SHaavard Skinnemoen atmci_request_end(host, mrq); 1587965ebf33SHaavard Skinnemoen } else { 1588965ebf33SHaavard Skinnemoen list_del(&slot->queue_node); 1589965ebf33SHaavard Skinnemoen mrq->cmd->error = -ENOMEDIUM; 1590965ebf33SHaavard Skinnemoen if (mrq->data) 1591965ebf33SHaavard Skinnemoen mrq->data->error = -ENOMEDIUM; 1592965ebf33SHaavard Skinnemoen if (mrq->stop) 1593965ebf33SHaavard Skinnemoen mrq->stop->error = -ENOMEDIUM; 15947d2be074SHaavard Skinnemoen 1595965ebf33SHaavard Skinnemoen spin_unlock(&host->lock); 1596965ebf33SHaavard Skinnemoen mmc_request_done(slot->mmc, mrq); 1597965ebf33SHaavard Skinnemoen spin_lock(&host->lock); 1598965ebf33SHaavard Skinnemoen } 1599965ebf33SHaavard Skinnemoen } 1600965ebf33SHaavard Skinnemoen spin_unlock(&host->lock); 1601965ebf33SHaavard Skinnemoen 1602965ebf33SHaavard Skinnemoen mmc_detect_change(slot->mmc, 0); 16037d2be074SHaavard Skinnemoen } 16047d2be074SHaavard Skinnemoen } 16057d2be074SHaavard Skinnemoen 16067d2be074SHaavard Skinnemoen static void atmci_tasklet_func(unsigned long priv) 16077d2be074SHaavard Skinnemoen { 1608965ebf33SHaavard Skinnemoen struct atmel_mci *host = (struct atmel_mci *)priv; 16097d2be074SHaavard Skinnemoen struct mmc_request *mrq = host->mrq; 16107d2be074SHaavard Skinnemoen struct mmc_data *data = host->data; 1611c06ad258SHaavard Skinnemoen enum atmel_mci_state state = host->state; 1612c06ad258SHaavard Skinnemoen enum atmel_mci_state prev_state; 1613c06ad258SHaavard Skinnemoen u32 status; 1614c06ad258SHaavard Skinnemoen 1615965ebf33SHaavard Skinnemoen spin_lock(&host->lock); 1616965ebf33SHaavard Skinnemoen 1617c06ad258SHaavard Skinnemoen state = host->state; 16187d2be074SHaavard Skinnemoen 1619965ebf33SHaavard Skinnemoen dev_vdbg(&host->pdev->dev, 1620c06ad258SHaavard Skinnemoen "tasklet: state %u pending/completed/mask %lx/%lx/%x\n", 1621c06ad258SHaavard Skinnemoen state, host->pending_events, host->completed_events, 162203fc9a7fSLudovic Desroches atmci_readl(host, ATMCI_IMR)); 16237d2be074SHaavard Skinnemoen 1624c06ad258SHaavard Skinnemoen do { 1625c06ad258SHaavard Skinnemoen prev_state = state; 16266801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "FSM: state=%d\n", state); 1627c06ad258SHaavard Skinnemoen 1628c06ad258SHaavard Skinnemoen switch (state) { 1629965ebf33SHaavard Skinnemoen case STATE_IDLE: 1630965ebf33SHaavard Skinnemoen break; 1631965ebf33SHaavard Skinnemoen 1632c06ad258SHaavard Skinnemoen case STATE_SENDING_CMD: 1633f5177547SLudovic Desroches /* 1634f5177547SLudovic Desroches * Command has been sent, we are waiting for command 1635f5177547SLudovic Desroches * ready. Then we have three next states possible: 1636f5177547SLudovic Desroches * END_REQUEST by default, WAITING_NOTBUSY if it's a 1637f5177547SLudovic Desroches * command needing it or DATA_XFER if there is data. 1638f5177547SLudovic Desroches */ 16396801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "FSM: cmd ready?\n"); 1640c06ad258SHaavard Skinnemoen if (!atmci_test_and_clear_pending(host, 1641f5177547SLudovic Desroches EVENT_CMD_RDY)) 1642c06ad258SHaavard Skinnemoen break; 1643c06ad258SHaavard Skinnemoen 16446801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "set completed cmd ready\n"); 16457d2be074SHaavard Skinnemoen host->cmd = NULL; 1646f5177547SLudovic Desroches atmci_set_completed(host, EVENT_CMD_RDY); 1647c06ad258SHaavard Skinnemoen atmci_command_complete(host, mrq->cmd); 1648f5177547SLudovic Desroches if (mrq->data) { 16496801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, 16506801c41aSLudovic Desroches "command with data transfer"); 1651f5177547SLudovic Desroches /* 1652f5177547SLudovic Desroches * If there is a command error don't start 1653f5177547SLudovic Desroches * data transfer. 1654f5177547SLudovic Desroches */ 1655f5177547SLudovic Desroches if (mrq->cmd->error) { 1656f5177547SLudovic Desroches host->stop_transfer(host); 1657f5177547SLudovic Desroches host->data = NULL; 1658f5177547SLudovic Desroches atmci_writel(host, ATMCI_IDR, 1659f5177547SLudovic Desroches ATMCI_TXRDY | ATMCI_RXRDY 1660f5177547SLudovic Desroches | ATMCI_DATA_ERROR_FLAGS); 1661f5177547SLudovic Desroches state = STATE_END_REQUEST; 1662f5177547SLudovic Desroches } else 1663f5177547SLudovic Desroches state = STATE_DATA_XFER; 1664f5177547SLudovic Desroches } else if ((!mrq->data) && (mrq->cmd->flags & MMC_RSP_BUSY)) { 16656801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, 16666801c41aSLudovic Desroches "command response need waiting notbusy"); 1667f5177547SLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY); 1668f5177547SLudovic Desroches state = STATE_WAITING_NOTBUSY; 1669f5177547SLudovic Desroches } else 1670f5177547SLudovic Desroches state = STATE_END_REQUEST; 1671c06ad258SHaavard Skinnemoen 1672f5177547SLudovic Desroches break; 1673c06ad258SHaavard Skinnemoen 1674f5177547SLudovic Desroches case STATE_DATA_XFER: 1675c06ad258SHaavard Skinnemoen if (atmci_test_and_clear_pending(host, 1676c06ad258SHaavard Skinnemoen EVENT_DATA_ERROR)) { 16776801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "set completed data error\n"); 1678f5177547SLudovic Desroches atmci_set_completed(host, EVENT_DATA_ERROR); 1679f5177547SLudovic Desroches state = STATE_END_REQUEST; 1680c06ad258SHaavard Skinnemoen break; 16817d2be074SHaavard Skinnemoen } 16827d2be074SHaavard Skinnemoen 1683f5177547SLudovic Desroches /* 1684f5177547SLudovic Desroches * A data transfer is in progress. The event expected 1685f5177547SLudovic Desroches * to move to the next state depends of data transfer 1686f5177547SLudovic Desroches * type (PDC or DMA). Once transfer done we can move 1687f5177547SLudovic Desroches * to the next step which is WAITING_NOTBUSY in write 1688f5177547SLudovic Desroches * case and directly SENDING_STOP in read case. 1689f5177547SLudovic Desroches */ 16906801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "FSM: xfer complete?\n"); 1691c06ad258SHaavard Skinnemoen if (!atmci_test_and_clear_pending(host, 1692c06ad258SHaavard Skinnemoen EVENT_XFER_COMPLETE)) 1693c06ad258SHaavard Skinnemoen break; 16947d2be074SHaavard Skinnemoen 16956801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, 16966801c41aSLudovic Desroches "(%s) set completed xfer complete\n", 16976801c41aSLudovic Desroches __func__); 1698c06ad258SHaavard Skinnemoen atmci_set_completed(host, EVENT_XFER_COMPLETE); 1699c06ad258SHaavard Skinnemoen 1700077d4073SLudovic Desroches if (host->caps.need_notbusy_for_read_ops || 1701077d4073SLudovic Desroches (host->data->flags & MMC_DATA_WRITE)) { 1702f5177547SLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY); 1703f5177547SLudovic Desroches state = STATE_WAITING_NOTBUSY; 1704f5177547SLudovic Desroches } else if (host->mrq->stop) { 1705f5177547SLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_CMDRDY); 1706f5177547SLudovic Desroches atmci_send_stop_cmd(host, data); 1707f5177547SLudovic Desroches state = STATE_SENDING_STOP; 1708f5177547SLudovic Desroches } else { 1709c06ad258SHaavard Skinnemoen host->data = NULL; 17107d2be074SHaavard Skinnemoen data->bytes_xfered = data->blocks * data->blksz; 17117d2be074SHaavard Skinnemoen data->error = 0; 1712f5177547SLudovic Desroches state = STATE_END_REQUEST; 17137d2be074SHaavard Skinnemoen } 1714f5177547SLudovic Desroches break; 17157d2be074SHaavard Skinnemoen 1716f5177547SLudovic Desroches case STATE_WAITING_NOTBUSY: 1717f5177547SLudovic Desroches /* 1718f5177547SLudovic Desroches * We can be in the state for two reasons: a command 1719f5177547SLudovic Desroches * requiring waiting not busy signal (stop command 1720f5177547SLudovic Desroches * included) or a write operation. In the latest case, 1721f5177547SLudovic Desroches * we need to send a stop command. 1722f5177547SLudovic Desroches */ 17236801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "FSM: not busy?\n"); 1724f5177547SLudovic Desroches if (!atmci_test_and_clear_pending(host, 1725f5177547SLudovic Desroches EVENT_NOTBUSY)) 1726f5177547SLudovic Desroches break; 17277d2be074SHaavard Skinnemoen 17286801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "set completed not busy\n"); 1729f5177547SLudovic Desroches atmci_set_completed(host, EVENT_NOTBUSY); 1730f5177547SLudovic Desroches 1731f5177547SLudovic Desroches if (host->data) { 1732f5177547SLudovic Desroches /* 1733f5177547SLudovic Desroches * For some commands such as CMD53, even if 1734f5177547SLudovic Desroches * there is data transfer, there is no stop 1735f5177547SLudovic Desroches * command to send. 1736f5177547SLudovic Desroches */ 1737f5177547SLudovic Desroches if (host->mrq->stop) { 1738f5177547SLudovic Desroches atmci_writel(host, ATMCI_IER, 1739f5177547SLudovic Desroches ATMCI_CMDRDY); 17402c96a293SLudovic Desroches atmci_send_stop_cmd(host, data); 1741f5177547SLudovic Desroches state = STATE_SENDING_STOP; 1742f5177547SLudovic Desroches } else { 1743f5177547SLudovic Desroches host->data = NULL; 1744f5177547SLudovic Desroches data->bytes_xfered = data->blocks 1745f5177547SLudovic Desroches * data->blksz; 1746f5177547SLudovic Desroches data->error = 0; 1747f5177547SLudovic Desroches state = STATE_END_REQUEST; 1748f5177547SLudovic Desroches } 1749f5177547SLudovic Desroches } else 1750f5177547SLudovic Desroches state = STATE_END_REQUEST; 1751f5177547SLudovic Desroches break; 1752c06ad258SHaavard Skinnemoen 1753c06ad258SHaavard Skinnemoen case STATE_SENDING_STOP: 1754f5177547SLudovic Desroches /* 1755f5177547SLudovic Desroches * In this state, it is important to set host->data to 1756f5177547SLudovic Desroches * NULL (which is tested in the waiting notbusy state) 1757f5177547SLudovic Desroches * in order to go to the end request state instead of 1758f5177547SLudovic Desroches * sending stop again. 1759f5177547SLudovic Desroches */ 17606801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "FSM: cmd ready?\n"); 1761c06ad258SHaavard Skinnemoen if (!atmci_test_and_clear_pending(host, 1762f5177547SLudovic Desroches EVENT_CMD_RDY)) 1763c06ad258SHaavard Skinnemoen break; 1764c06ad258SHaavard Skinnemoen 17656801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "FSM: cmd ready\n"); 1766c06ad258SHaavard Skinnemoen host->cmd = NULL; 1767f5177547SLudovic Desroches data->bytes_xfered = data->blocks * data->blksz; 1768f5177547SLudovic Desroches data->error = 0; 1769c06ad258SHaavard Skinnemoen atmci_command_complete(host, mrq->stop); 1770f5177547SLudovic Desroches if (mrq->stop->error) { 1771f5177547SLudovic Desroches host->stop_transfer(host); 1772f5177547SLudovic Desroches atmci_writel(host, ATMCI_IDR, 1773f5177547SLudovic Desroches ATMCI_TXRDY | ATMCI_RXRDY 1774f5177547SLudovic Desroches | ATMCI_DATA_ERROR_FLAGS); 1775f5177547SLudovic Desroches state = STATE_END_REQUEST; 1776f5177547SLudovic Desroches } else { 1777f5177547SLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY); 1778f5177547SLudovic Desroches state = STATE_WAITING_NOTBUSY; 1779f5177547SLudovic Desroches } 178041b4e9a1SNicolas Ferre host->data = NULL; 1781c06ad258SHaavard Skinnemoen break; 1782c06ad258SHaavard Skinnemoen 1783f5177547SLudovic Desroches case STATE_END_REQUEST: 1784f5177547SLudovic Desroches atmci_writel(host, ATMCI_IDR, ATMCI_TXRDY | ATMCI_RXRDY 1785f5177547SLudovic Desroches | ATMCI_DATA_ERROR_FLAGS); 1786f5177547SLudovic Desroches status = host->data_status; 1787f5177547SLudovic Desroches if (unlikely(status)) { 1788f5177547SLudovic Desroches host->stop_transfer(host); 1789f5177547SLudovic Desroches host->data = NULL; 1790f5177547SLudovic Desroches if (status & ATMCI_DTOE) { 1791f5177547SLudovic Desroches data->error = -ETIMEDOUT; 1792f5177547SLudovic Desroches } else if (status & ATMCI_DCRCE) { 1793f5177547SLudovic Desroches data->error = -EILSEQ; 1794f5177547SLudovic Desroches } else { 1795f5177547SLudovic Desroches data->error = -EIO; 1796f5177547SLudovic Desroches } 1797f5177547SLudovic Desroches } 1798f5177547SLudovic Desroches 1799f5177547SLudovic Desroches atmci_request_end(host, host->mrq); 1800f5177547SLudovic Desroches state = STATE_IDLE; 1801c06ad258SHaavard Skinnemoen break; 1802c06ad258SHaavard Skinnemoen } 1803c06ad258SHaavard Skinnemoen } while (state != prev_state); 1804c06ad258SHaavard Skinnemoen 1805c06ad258SHaavard Skinnemoen host->state = state; 1806965ebf33SHaavard Skinnemoen 1807965ebf33SHaavard Skinnemoen spin_unlock(&host->lock); 18087d2be074SHaavard Skinnemoen } 18097d2be074SHaavard Skinnemoen 18107d2be074SHaavard Skinnemoen static void atmci_read_data_pio(struct atmel_mci *host) 18117d2be074SHaavard Skinnemoen { 18127d2be074SHaavard Skinnemoen struct scatterlist *sg = host->sg; 18137d2be074SHaavard Skinnemoen void *buf = sg_virt(sg); 18147d2be074SHaavard Skinnemoen unsigned int offset = host->pio_offset; 18157d2be074SHaavard Skinnemoen struct mmc_data *data = host->data; 18167d2be074SHaavard Skinnemoen u32 value; 18177d2be074SHaavard Skinnemoen u32 status; 18187d2be074SHaavard Skinnemoen unsigned int nbytes = 0; 18197d2be074SHaavard Skinnemoen 18207d2be074SHaavard Skinnemoen do { 182103fc9a7fSLudovic Desroches value = atmci_readl(host, ATMCI_RDR); 18227d2be074SHaavard Skinnemoen if (likely(offset + 4 <= sg->length)) { 18237d2be074SHaavard Skinnemoen put_unaligned(value, (u32 *)(buf + offset)); 18247d2be074SHaavard Skinnemoen 18257d2be074SHaavard Skinnemoen offset += 4; 18267d2be074SHaavard Skinnemoen nbytes += 4; 18277d2be074SHaavard Skinnemoen 18287d2be074SHaavard Skinnemoen if (offset == sg->length) { 18295e7184aeSHaavard Skinnemoen flush_dcache_page(sg_page(sg)); 18307d2be074SHaavard Skinnemoen host->sg = sg = sg_next(sg); 1831bdbc5d0cSTerry Barnaby host->sg_len--; 1832bdbc5d0cSTerry Barnaby if (!sg || !host->sg_len) 18337d2be074SHaavard Skinnemoen goto done; 18347d2be074SHaavard Skinnemoen 18357d2be074SHaavard Skinnemoen offset = 0; 18367d2be074SHaavard Skinnemoen buf = sg_virt(sg); 18377d2be074SHaavard Skinnemoen } 18387d2be074SHaavard Skinnemoen } else { 18397d2be074SHaavard Skinnemoen unsigned int remaining = sg->length - offset; 18407d2be074SHaavard Skinnemoen memcpy(buf + offset, &value, remaining); 18417d2be074SHaavard Skinnemoen nbytes += remaining; 18427d2be074SHaavard Skinnemoen 18437d2be074SHaavard Skinnemoen flush_dcache_page(sg_page(sg)); 18447d2be074SHaavard Skinnemoen host->sg = sg = sg_next(sg); 1845bdbc5d0cSTerry Barnaby host->sg_len--; 1846bdbc5d0cSTerry Barnaby if (!sg || !host->sg_len) 18477d2be074SHaavard Skinnemoen goto done; 18487d2be074SHaavard Skinnemoen 18497d2be074SHaavard Skinnemoen offset = 4 - remaining; 18507d2be074SHaavard Skinnemoen buf = sg_virt(sg); 18517d2be074SHaavard Skinnemoen memcpy(buf, (u8 *)&value + remaining, offset); 18527d2be074SHaavard Skinnemoen nbytes += offset; 18537d2be074SHaavard Skinnemoen } 18547d2be074SHaavard Skinnemoen 185503fc9a7fSLudovic Desroches status = atmci_readl(host, ATMCI_SR); 18567d2be074SHaavard Skinnemoen if (status & ATMCI_DATA_ERROR_FLAGS) { 185703fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_IDR, (ATMCI_NOTBUSY | ATMCI_RXRDY 18587d2be074SHaavard Skinnemoen | ATMCI_DATA_ERROR_FLAGS)); 18597d2be074SHaavard Skinnemoen host->data_status = status; 1860965ebf33SHaavard Skinnemoen data->bytes_xfered += nbytes; 1861965ebf33SHaavard Skinnemoen return; 18627d2be074SHaavard Skinnemoen } 18632c96a293SLudovic Desroches } while (status & ATMCI_RXRDY); 18647d2be074SHaavard Skinnemoen 18657d2be074SHaavard Skinnemoen host->pio_offset = offset; 18667d2be074SHaavard Skinnemoen data->bytes_xfered += nbytes; 18677d2be074SHaavard Skinnemoen 18687d2be074SHaavard Skinnemoen return; 18697d2be074SHaavard Skinnemoen 18707d2be074SHaavard Skinnemoen done: 187103fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_IDR, ATMCI_RXRDY); 187203fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY); 18737d2be074SHaavard Skinnemoen data->bytes_xfered += nbytes; 1874965ebf33SHaavard Skinnemoen smp_wmb(); 1875c06ad258SHaavard Skinnemoen atmci_set_pending(host, EVENT_XFER_COMPLETE); 18767d2be074SHaavard Skinnemoen } 18777d2be074SHaavard Skinnemoen 18787d2be074SHaavard Skinnemoen static void atmci_write_data_pio(struct atmel_mci *host) 18797d2be074SHaavard Skinnemoen { 18807d2be074SHaavard Skinnemoen struct scatterlist *sg = host->sg; 18817d2be074SHaavard Skinnemoen void *buf = sg_virt(sg); 18827d2be074SHaavard Skinnemoen unsigned int offset = host->pio_offset; 18837d2be074SHaavard Skinnemoen struct mmc_data *data = host->data; 18847d2be074SHaavard Skinnemoen u32 value; 18857d2be074SHaavard Skinnemoen u32 status; 18867d2be074SHaavard Skinnemoen unsigned int nbytes = 0; 18877d2be074SHaavard Skinnemoen 18887d2be074SHaavard Skinnemoen do { 18897d2be074SHaavard Skinnemoen if (likely(offset + 4 <= sg->length)) { 18907d2be074SHaavard Skinnemoen value = get_unaligned((u32 *)(buf + offset)); 189103fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_TDR, value); 18927d2be074SHaavard Skinnemoen 18937d2be074SHaavard Skinnemoen offset += 4; 18947d2be074SHaavard Skinnemoen nbytes += 4; 18957d2be074SHaavard Skinnemoen if (offset == sg->length) { 18967d2be074SHaavard Skinnemoen host->sg = sg = sg_next(sg); 1897bdbc5d0cSTerry Barnaby host->sg_len--; 1898bdbc5d0cSTerry Barnaby if (!sg || !host->sg_len) 18997d2be074SHaavard Skinnemoen goto done; 19007d2be074SHaavard Skinnemoen 19017d2be074SHaavard Skinnemoen offset = 0; 19027d2be074SHaavard Skinnemoen buf = sg_virt(sg); 19037d2be074SHaavard Skinnemoen } 19047d2be074SHaavard Skinnemoen } else { 19057d2be074SHaavard Skinnemoen unsigned int remaining = sg->length - offset; 19067d2be074SHaavard Skinnemoen 19077d2be074SHaavard Skinnemoen value = 0; 19087d2be074SHaavard Skinnemoen memcpy(&value, buf + offset, remaining); 19097d2be074SHaavard Skinnemoen nbytes += remaining; 19107d2be074SHaavard Skinnemoen 19117d2be074SHaavard Skinnemoen host->sg = sg = sg_next(sg); 1912bdbc5d0cSTerry Barnaby host->sg_len--; 1913bdbc5d0cSTerry Barnaby if (!sg || !host->sg_len) { 191403fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_TDR, value); 19157d2be074SHaavard Skinnemoen goto done; 19167d2be074SHaavard Skinnemoen } 19177d2be074SHaavard Skinnemoen 19187d2be074SHaavard Skinnemoen offset = 4 - remaining; 19197d2be074SHaavard Skinnemoen buf = sg_virt(sg); 19207d2be074SHaavard Skinnemoen memcpy((u8 *)&value + remaining, buf, offset); 192103fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_TDR, value); 19227d2be074SHaavard Skinnemoen nbytes += offset; 19237d2be074SHaavard Skinnemoen } 19247d2be074SHaavard Skinnemoen 192503fc9a7fSLudovic Desroches status = atmci_readl(host, ATMCI_SR); 19267d2be074SHaavard Skinnemoen if (status & ATMCI_DATA_ERROR_FLAGS) { 192703fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_IDR, (ATMCI_NOTBUSY | ATMCI_TXRDY 19287d2be074SHaavard Skinnemoen | ATMCI_DATA_ERROR_FLAGS)); 19297d2be074SHaavard Skinnemoen host->data_status = status; 1930965ebf33SHaavard Skinnemoen data->bytes_xfered += nbytes; 1931965ebf33SHaavard Skinnemoen return; 19327d2be074SHaavard Skinnemoen } 19332c96a293SLudovic Desroches } while (status & ATMCI_TXRDY); 19347d2be074SHaavard Skinnemoen 19357d2be074SHaavard Skinnemoen host->pio_offset = offset; 19367d2be074SHaavard Skinnemoen data->bytes_xfered += nbytes; 19377d2be074SHaavard Skinnemoen 19387d2be074SHaavard Skinnemoen return; 19397d2be074SHaavard Skinnemoen 19407d2be074SHaavard Skinnemoen done: 194103fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_IDR, ATMCI_TXRDY); 194203fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_NOTBUSY); 19437d2be074SHaavard Skinnemoen data->bytes_xfered += nbytes; 1944965ebf33SHaavard Skinnemoen smp_wmb(); 1945c06ad258SHaavard Skinnemoen atmci_set_pending(host, EVENT_XFER_COMPLETE); 19467d2be074SHaavard Skinnemoen } 19477d2be074SHaavard Skinnemoen 194888ff82edSAnders Grahn static void atmci_sdio_interrupt(struct atmel_mci *host, u32 status) 194988ff82edSAnders Grahn { 195088ff82edSAnders Grahn int i; 195188ff82edSAnders Grahn 19522c96a293SLudovic Desroches for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) { 195388ff82edSAnders Grahn struct atmel_mci_slot *slot = host->slot[i]; 195488ff82edSAnders Grahn if (slot && (status & slot->sdio_irq)) { 195588ff82edSAnders Grahn mmc_signal_sdio_irq(slot->mmc); 195688ff82edSAnders Grahn } 195788ff82edSAnders Grahn } 195888ff82edSAnders Grahn } 195988ff82edSAnders Grahn 196088ff82edSAnders Grahn 19617d2be074SHaavard Skinnemoen static irqreturn_t atmci_interrupt(int irq, void *dev_id) 19627d2be074SHaavard Skinnemoen { 1963965ebf33SHaavard Skinnemoen struct atmel_mci *host = dev_id; 19647d2be074SHaavard Skinnemoen u32 status, mask, pending; 19657d2be074SHaavard Skinnemoen unsigned int pass_count = 0; 19667d2be074SHaavard Skinnemoen 19677d2be074SHaavard Skinnemoen do { 196803fc9a7fSLudovic Desroches status = atmci_readl(host, ATMCI_SR); 196903fc9a7fSLudovic Desroches mask = atmci_readl(host, ATMCI_IMR); 19707d2be074SHaavard Skinnemoen pending = status & mask; 19717d2be074SHaavard Skinnemoen if (!pending) 19727d2be074SHaavard Skinnemoen break; 19737d2be074SHaavard Skinnemoen 19747d2be074SHaavard Skinnemoen if (pending & ATMCI_DATA_ERROR_FLAGS) { 19756801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "IRQ: data error\n"); 197603fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_IDR, ATMCI_DATA_ERROR_FLAGS 1977f5177547SLudovic Desroches | ATMCI_RXRDY | ATMCI_TXRDY 1978f5177547SLudovic Desroches | ATMCI_ENDRX | ATMCI_ENDTX 1979f5177547SLudovic Desroches | ATMCI_RXBUFF | ATMCI_TXBUFE); 1980965ebf33SHaavard Skinnemoen 19817d2be074SHaavard Skinnemoen host->data_status = status; 19826801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "set pending data error\n"); 1983965ebf33SHaavard Skinnemoen smp_wmb(); 19847d2be074SHaavard Skinnemoen atmci_set_pending(host, EVENT_DATA_ERROR); 19857d2be074SHaavard Skinnemoen tasklet_schedule(&host->tasklet); 19867d2be074SHaavard Skinnemoen } 1987796211b7SLudovic Desroches 1988796211b7SLudovic Desroches if (pending & ATMCI_TXBUFE) { 19896801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "IRQ: tx buffer empty\n"); 1990796211b7SLudovic Desroches atmci_writel(host, ATMCI_IDR, ATMCI_TXBUFE); 19917e8ba228SLudovic Desroches atmci_writel(host, ATMCI_IDR, ATMCI_ENDTX); 1992796211b7SLudovic Desroches /* 1993796211b7SLudovic Desroches * We can receive this interruption before having configured 1994796211b7SLudovic Desroches * the second pdc buffer, so we need to reconfigure first and 1995796211b7SLudovic Desroches * second buffers again 1996796211b7SLudovic Desroches */ 1997796211b7SLudovic Desroches if (host->data_size) { 1998796211b7SLudovic Desroches atmci_pdc_set_both_buf(host, XFER_TRANSMIT); 19997e8ba228SLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_ENDTX); 2000796211b7SLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_TXBUFE); 2001796211b7SLudovic Desroches } else { 2002796211b7SLudovic Desroches atmci_pdc_complete(host); 2003796211b7SLudovic Desroches } 20047e8ba228SLudovic Desroches } else if (pending & ATMCI_ENDTX) { 20056801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "IRQ: end of tx buffer\n"); 20067e8ba228SLudovic Desroches atmci_writel(host, ATMCI_IDR, ATMCI_ENDTX); 20077e8ba228SLudovic Desroches 20087e8ba228SLudovic Desroches if (host->data_size) { 20097e8ba228SLudovic Desroches atmci_pdc_set_single_buf(host, 20107e8ba228SLudovic Desroches XFER_TRANSMIT, PDC_SECOND_BUF); 20117e8ba228SLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_ENDTX); 20127e8ba228SLudovic Desroches } 2013796211b7SLudovic Desroches } 2014796211b7SLudovic Desroches 20157e8ba228SLudovic Desroches if (pending & ATMCI_RXBUFF) { 20166801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "IRQ: rx buffer full\n"); 20177e8ba228SLudovic Desroches atmci_writel(host, ATMCI_IDR, ATMCI_RXBUFF); 20187e8ba228SLudovic Desroches atmci_writel(host, ATMCI_IDR, ATMCI_ENDRX); 20197e8ba228SLudovic Desroches /* 20207e8ba228SLudovic Desroches * We can receive this interruption before having configured 20217e8ba228SLudovic Desroches * the second pdc buffer, so we need to reconfigure first and 20227e8ba228SLudovic Desroches * second buffers again 20237e8ba228SLudovic Desroches */ 20247e8ba228SLudovic Desroches if (host->data_size) { 20257e8ba228SLudovic Desroches atmci_pdc_set_both_buf(host, XFER_RECEIVE); 20267e8ba228SLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_ENDRX); 20277e8ba228SLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_RXBUFF); 20287e8ba228SLudovic Desroches } else { 20297e8ba228SLudovic Desroches atmci_pdc_complete(host); 20307e8ba228SLudovic Desroches } 20317e8ba228SLudovic Desroches } else if (pending & ATMCI_ENDRX) { 20326801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "IRQ: end of rx buffer\n"); 2033796211b7SLudovic Desroches atmci_writel(host, ATMCI_IDR, ATMCI_ENDRX); 2034796211b7SLudovic Desroches 2035796211b7SLudovic Desroches if (host->data_size) { 2036796211b7SLudovic Desroches atmci_pdc_set_single_buf(host, 2037796211b7SLudovic Desroches XFER_RECEIVE, PDC_SECOND_BUF); 2038796211b7SLudovic Desroches atmci_writel(host, ATMCI_IER, ATMCI_ENDRX); 2039796211b7SLudovic Desroches } 2040796211b7SLudovic Desroches } 2041796211b7SLudovic Desroches 2042f5177547SLudovic Desroches /* 2043f5177547SLudovic Desroches * First mci IPs, so mainly the ones having pdc, have some 2044f5177547SLudovic Desroches * issues with the notbusy signal. You can't get it after 2045f5177547SLudovic Desroches * data transmission if you have not sent a stop command. 2046f5177547SLudovic Desroches * The appropriate workaround is to use the BLKE signal. 2047f5177547SLudovic Desroches */ 2048f5177547SLudovic Desroches if (pending & ATMCI_BLKE) { 20496801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "IRQ: blke\n"); 2050f5177547SLudovic Desroches atmci_writel(host, ATMCI_IDR, ATMCI_BLKE); 2051965ebf33SHaavard Skinnemoen smp_wmb(); 20526801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "set pending notbusy\n"); 2053f5177547SLudovic Desroches atmci_set_pending(host, EVENT_NOTBUSY); 20547d2be074SHaavard Skinnemoen tasklet_schedule(&host->tasklet); 20557d2be074SHaavard Skinnemoen } 2056f5177547SLudovic Desroches 2057f5177547SLudovic Desroches if (pending & ATMCI_NOTBUSY) { 20586801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "IRQ: not_busy\n"); 2059f5177547SLudovic Desroches atmci_writel(host, ATMCI_IDR, ATMCI_NOTBUSY); 2060f5177547SLudovic Desroches smp_wmb(); 20616801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "set pending notbusy\n"); 2062f5177547SLudovic Desroches atmci_set_pending(host, EVENT_NOTBUSY); 2063f5177547SLudovic Desroches tasklet_schedule(&host->tasklet); 2064f5177547SLudovic Desroches } 2065f5177547SLudovic Desroches 20662c96a293SLudovic Desroches if (pending & ATMCI_RXRDY) 20677d2be074SHaavard Skinnemoen atmci_read_data_pio(host); 20682c96a293SLudovic Desroches if (pending & ATMCI_TXRDY) 20697d2be074SHaavard Skinnemoen atmci_write_data_pio(host); 20707d2be074SHaavard Skinnemoen 2071f5177547SLudovic Desroches if (pending & ATMCI_CMDRDY) { 20726801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "IRQ: cmd ready\n"); 2073f5177547SLudovic Desroches atmci_writel(host, ATMCI_IDR, ATMCI_CMDRDY); 2074f5177547SLudovic Desroches host->cmd_status = status; 2075f5177547SLudovic Desroches smp_wmb(); 20766801c41aSLudovic Desroches dev_dbg(&host->pdev->dev, "set pending cmd rdy\n"); 2077f5177547SLudovic Desroches atmci_set_pending(host, EVENT_CMD_RDY); 2078f5177547SLudovic Desroches tasklet_schedule(&host->tasklet); 2079f5177547SLudovic Desroches } 208088ff82edSAnders Grahn 20812c96a293SLudovic Desroches if (pending & (ATMCI_SDIOIRQA | ATMCI_SDIOIRQB)) 208288ff82edSAnders Grahn atmci_sdio_interrupt(host, status); 208388ff82edSAnders Grahn 20847d2be074SHaavard Skinnemoen } while (pass_count++ < 5); 20857d2be074SHaavard Skinnemoen 20867d2be074SHaavard Skinnemoen return pass_count ? IRQ_HANDLED : IRQ_NONE; 20877d2be074SHaavard Skinnemoen } 20887d2be074SHaavard Skinnemoen 20897d2be074SHaavard Skinnemoen static irqreturn_t atmci_detect_interrupt(int irq, void *dev_id) 20907d2be074SHaavard Skinnemoen { 2091965ebf33SHaavard Skinnemoen struct atmel_mci_slot *slot = dev_id; 20927d2be074SHaavard Skinnemoen 20937d2be074SHaavard Skinnemoen /* 20947d2be074SHaavard Skinnemoen * Disable interrupts until the pin has stabilized and check 20957d2be074SHaavard Skinnemoen * the state then. Use mod_timer() since we may be in the 20967d2be074SHaavard Skinnemoen * middle of the timer routine when this interrupt triggers. 20977d2be074SHaavard Skinnemoen */ 20987d2be074SHaavard Skinnemoen disable_irq_nosync(irq); 2099965ebf33SHaavard Skinnemoen mod_timer(&slot->detect_timer, jiffies + msecs_to_jiffies(20)); 21007d2be074SHaavard Skinnemoen 21017d2be074SHaavard Skinnemoen return IRQ_HANDLED; 21027d2be074SHaavard Skinnemoen } 21037d2be074SHaavard Skinnemoen 2104965ebf33SHaavard Skinnemoen static int __init atmci_init_slot(struct atmel_mci *host, 2105965ebf33SHaavard Skinnemoen struct mci_slot_pdata *slot_data, unsigned int id, 210688ff82edSAnders Grahn u32 sdc_reg, u32 sdio_irq) 2107965ebf33SHaavard Skinnemoen { 2108965ebf33SHaavard Skinnemoen struct mmc_host *mmc; 2109965ebf33SHaavard Skinnemoen struct atmel_mci_slot *slot; 2110965ebf33SHaavard Skinnemoen 2111965ebf33SHaavard Skinnemoen mmc = mmc_alloc_host(sizeof(struct atmel_mci_slot), &host->pdev->dev); 2112965ebf33SHaavard Skinnemoen if (!mmc) 2113965ebf33SHaavard Skinnemoen return -ENOMEM; 2114965ebf33SHaavard Skinnemoen 2115965ebf33SHaavard Skinnemoen slot = mmc_priv(mmc); 2116965ebf33SHaavard Skinnemoen slot->mmc = mmc; 2117965ebf33SHaavard Skinnemoen slot->host = host; 2118965ebf33SHaavard Skinnemoen slot->detect_pin = slot_data->detect_pin; 2119965ebf33SHaavard Skinnemoen slot->wp_pin = slot_data->wp_pin; 21201c1452beSJonas Larsson slot->detect_is_active_high = slot_data->detect_is_active_high; 2121965ebf33SHaavard Skinnemoen slot->sdc_reg = sdc_reg; 212288ff82edSAnders Grahn slot->sdio_irq = sdio_irq; 2123965ebf33SHaavard Skinnemoen 2124e919fd20SLudovic Desroches dev_dbg(&mmc->class_dev, 2125e919fd20SLudovic Desroches "slot[%u]: bus_width=%u, detect_pin=%d, " 2126e919fd20SLudovic Desroches "detect_is_active_high=%s, wp_pin=%d\n", 2127e919fd20SLudovic Desroches id, slot_data->bus_width, slot_data->detect_pin, 2128e919fd20SLudovic Desroches slot_data->detect_is_active_high ? "true" : "false", 2129e919fd20SLudovic Desroches slot_data->wp_pin); 2130e919fd20SLudovic Desroches 2131965ebf33SHaavard Skinnemoen mmc->ops = &atmci_ops; 2132965ebf33SHaavard Skinnemoen mmc->f_min = DIV_ROUND_UP(host->bus_hz, 512); 2133965ebf33SHaavard Skinnemoen mmc->f_max = host->bus_hz / 2; 2134965ebf33SHaavard Skinnemoen mmc->ocr_avail = MMC_VDD_32_33 | MMC_VDD_33_34; 213588ff82edSAnders Grahn if (sdio_irq) 213688ff82edSAnders Grahn mmc->caps |= MMC_CAP_SDIO_IRQ; 2137796211b7SLudovic Desroches if (host->caps.has_highspeed) 213899ddffd8SNicolas Ferre mmc->caps |= MMC_CAP_SD_HIGHSPEED; 21397a90dcc2SLudovic Desroches /* 21407a90dcc2SLudovic Desroches * Without the read/write proof capability, it is strongly suggested to 21417a90dcc2SLudovic Desroches * use only one bit for data to prevent fifo underruns and overruns 21427a90dcc2SLudovic Desroches * which will corrupt data. 21437a90dcc2SLudovic Desroches */ 21447a90dcc2SLudovic Desroches if ((slot_data->bus_width >= 4) && host->caps.has_rwproof) 2145965ebf33SHaavard Skinnemoen mmc->caps |= MMC_CAP_4_BIT_DATA; 2146965ebf33SHaavard Skinnemoen 21477a90dcc2SLudovic Desroches if (atmci_get_version(host) < 0x200) { 21487a90dcc2SLudovic Desroches mmc->max_segs = 256; 21497a90dcc2SLudovic Desroches mmc->max_blk_size = 4095; 21507a90dcc2SLudovic Desroches mmc->max_blk_count = 256; 21517a90dcc2SLudovic Desroches mmc->max_req_size = mmc->max_blk_size * mmc->max_blk_count; 21527a90dcc2SLudovic Desroches mmc->max_seg_size = mmc->max_blk_size * mmc->max_segs; 21537a90dcc2SLudovic Desroches } else { 2154a36274e0SMartin K. Petersen mmc->max_segs = 64; 2155965ebf33SHaavard Skinnemoen mmc->max_req_size = 32768 * 512; 2156965ebf33SHaavard Skinnemoen mmc->max_blk_size = 32768; 2157965ebf33SHaavard Skinnemoen mmc->max_blk_count = 512; 21587a90dcc2SLudovic Desroches } 2159965ebf33SHaavard Skinnemoen 2160965ebf33SHaavard Skinnemoen /* Assume card is present initially */ 2161965ebf33SHaavard Skinnemoen set_bit(ATMCI_CARD_PRESENT, &slot->flags); 2162965ebf33SHaavard Skinnemoen if (gpio_is_valid(slot->detect_pin)) { 2163965ebf33SHaavard Skinnemoen if (gpio_request(slot->detect_pin, "mmc_detect")) { 2164965ebf33SHaavard Skinnemoen dev_dbg(&mmc->class_dev, "no detect pin available\n"); 2165965ebf33SHaavard Skinnemoen slot->detect_pin = -EBUSY; 21661c1452beSJonas Larsson } else if (gpio_get_value(slot->detect_pin) ^ 21671c1452beSJonas Larsson slot->detect_is_active_high) { 2168965ebf33SHaavard Skinnemoen clear_bit(ATMCI_CARD_PRESENT, &slot->flags); 2169965ebf33SHaavard Skinnemoen } 2170965ebf33SHaavard Skinnemoen } 2171965ebf33SHaavard Skinnemoen 2172965ebf33SHaavard Skinnemoen if (!gpio_is_valid(slot->detect_pin)) 2173965ebf33SHaavard Skinnemoen mmc->caps |= MMC_CAP_NEEDS_POLL; 2174965ebf33SHaavard Skinnemoen 2175965ebf33SHaavard Skinnemoen if (gpio_is_valid(slot->wp_pin)) { 2176965ebf33SHaavard Skinnemoen if (gpio_request(slot->wp_pin, "mmc_wp")) { 2177965ebf33SHaavard Skinnemoen dev_dbg(&mmc->class_dev, "no WP pin available\n"); 2178965ebf33SHaavard Skinnemoen slot->wp_pin = -EBUSY; 2179965ebf33SHaavard Skinnemoen } 2180965ebf33SHaavard Skinnemoen } 2181965ebf33SHaavard Skinnemoen 2182965ebf33SHaavard Skinnemoen host->slot[id] = slot; 2183965ebf33SHaavard Skinnemoen mmc_add_host(mmc); 2184965ebf33SHaavard Skinnemoen 2185965ebf33SHaavard Skinnemoen if (gpio_is_valid(slot->detect_pin)) { 2186965ebf33SHaavard Skinnemoen int ret; 2187965ebf33SHaavard Skinnemoen 2188965ebf33SHaavard Skinnemoen setup_timer(&slot->detect_timer, atmci_detect_change, 2189965ebf33SHaavard Skinnemoen (unsigned long)slot); 2190965ebf33SHaavard Skinnemoen 2191965ebf33SHaavard Skinnemoen ret = request_irq(gpio_to_irq(slot->detect_pin), 2192965ebf33SHaavard Skinnemoen atmci_detect_interrupt, 2193965ebf33SHaavard Skinnemoen IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING, 2194965ebf33SHaavard Skinnemoen "mmc-detect", slot); 2195965ebf33SHaavard Skinnemoen if (ret) { 2196965ebf33SHaavard Skinnemoen dev_dbg(&mmc->class_dev, 2197965ebf33SHaavard Skinnemoen "could not request IRQ %d for detect pin\n", 2198965ebf33SHaavard Skinnemoen gpio_to_irq(slot->detect_pin)); 2199965ebf33SHaavard Skinnemoen gpio_free(slot->detect_pin); 2200965ebf33SHaavard Skinnemoen slot->detect_pin = -EBUSY; 2201965ebf33SHaavard Skinnemoen } 2202965ebf33SHaavard Skinnemoen } 2203965ebf33SHaavard Skinnemoen 2204965ebf33SHaavard Skinnemoen atmci_init_debugfs(slot); 2205965ebf33SHaavard Skinnemoen 2206965ebf33SHaavard Skinnemoen return 0; 2207965ebf33SHaavard Skinnemoen } 2208965ebf33SHaavard Skinnemoen 2209965ebf33SHaavard Skinnemoen static void __exit atmci_cleanup_slot(struct atmel_mci_slot *slot, 2210965ebf33SHaavard Skinnemoen unsigned int id) 2211965ebf33SHaavard Skinnemoen { 2212965ebf33SHaavard Skinnemoen /* Debugfs stuff is cleaned up by mmc core */ 2213965ebf33SHaavard Skinnemoen 2214965ebf33SHaavard Skinnemoen set_bit(ATMCI_SHUTDOWN, &slot->flags); 2215965ebf33SHaavard Skinnemoen smp_wmb(); 2216965ebf33SHaavard Skinnemoen 2217965ebf33SHaavard Skinnemoen mmc_remove_host(slot->mmc); 2218965ebf33SHaavard Skinnemoen 2219965ebf33SHaavard Skinnemoen if (gpio_is_valid(slot->detect_pin)) { 2220965ebf33SHaavard Skinnemoen int pin = slot->detect_pin; 2221965ebf33SHaavard Skinnemoen 2222965ebf33SHaavard Skinnemoen free_irq(gpio_to_irq(pin), slot); 2223965ebf33SHaavard Skinnemoen del_timer_sync(&slot->detect_timer); 2224965ebf33SHaavard Skinnemoen gpio_free(pin); 2225965ebf33SHaavard Skinnemoen } 2226965ebf33SHaavard Skinnemoen if (gpio_is_valid(slot->wp_pin)) 2227965ebf33SHaavard Skinnemoen gpio_free(slot->wp_pin); 2228965ebf33SHaavard Skinnemoen 2229965ebf33SHaavard Skinnemoen slot->host->slot[id] = NULL; 2230965ebf33SHaavard Skinnemoen mmc_free_host(slot->mmc); 2231965ebf33SHaavard Skinnemoen } 2232965ebf33SHaavard Skinnemoen 22338c964df0SLudovic Desroches static bool atmci_filter(struct dma_chan *chan, void *pdata) 223474465b4fSDan Williams { 22358c964df0SLudovic Desroches struct mci_platform_data *sl_pdata = pdata; 22368c964df0SLudovic Desroches struct mci_dma_data *sl; 223774465b4fSDan Williams 22388c964df0SLudovic Desroches if (!sl_pdata) 22398c964df0SLudovic Desroches return false; 22408c964df0SLudovic Desroches 22418c964df0SLudovic Desroches sl = sl_pdata->dma_slave; 22422635d1baSNicolas Ferre if (sl && find_slave_dev(sl) == chan->device->dev) { 22432635d1baSNicolas Ferre chan->private = slave_data_ptr(sl); 22447dd60251SDan Williams return true; 22452635d1baSNicolas Ferre } else { 22467dd60251SDan Williams return false; 224774465b4fSDan Williams } 22482635d1baSNicolas Ferre } 22492635d1baSNicolas Ferre 2250ef878198SLudovic Desroches static bool atmci_configure_dma(struct atmel_mci *host) 22512635d1baSNicolas Ferre { 22522635d1baSNicolas Ferre struct mci_platform_data *pdata; 22538c964df0SLudovic Desroches dma_cap_mask_t mask; 22542635d1baSNicolas Ferre 22552635d1baSNicolas Ferre if (host == NULL) 2256ef878198SLudovic Desroches return false; 22572635d1baSNicolas Ferre 22582635d1baSNicolas Ferre pdata = host->pdev->dev.platform_data; 22592635d1baSNicolas Ferre 22602635d1baSNicolas Ferre dma_cap_zero(mask); 22612635d1baSNicolas Ferre dma_cap_set(DMA_SLAVE, mask); 22628c964df0SLudovic Desroches 22638c964df0SLudovic Desroches host->dma.chan = dma_request_slave_channel_compat(mask, atmci_filter, pdata, 22648c964df0SLudovic Desroches &host->pdev->dev, "rxtx"); 2265ef878198SLudovic Desroches if (!host->dma.chan) { 2266ef878198SLudovic Desroches dev_warn(&host->pdev->dev, "no DMA channel available\n"); 2267ef878198SLudovic Desroches return false; 2268ef878198SLudovic Desroches } else { 226974791a2dSNicolas Ferre dev_info(&host->pdev->dev, 2270b81cfc41SLudovic Desroches "using %s for DMA transfers\n", 227174791a2dSNicolas Ferre dma_chan_name(host->dma.chan)); 2272e2b35f3dSViresh Kumar 2273e2b35f3dSViresh Kumar host->dma_conf.src_addr = host->mapbase + ATMCI_RDR; 2274e2b35f3dSViresh Kumar host->dma_conf.src_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; 2275e2b35f3dSViresh Kumar host->dma_conf.src_maxburst = 1; 2276e2b35f3dSViresh Kumar host->dma_conf.dst_addr = host->mapbase + ATMCI_TDR; 2277e2b35f3dSViresh Kumar host->dma_conf.dst_addr_width = DMA_SLAVE_BUSWIDTH_4_BYTES; 2278e2b35f3dSViresh Kumar host->dma_conf.dst_maxburst = 1; 2279e2b35f3dSViresh Kumar host->dma_conf.device_fc = false; 2280ef878198SLudovic Desroches return true; 2281ef878198SLudovic Desroches } 22822635d1baSNicolas Ferre } 2283796211b7SLudovic Desroches 2284796211b7SLudovic Desroches /* 2285796211b7SLudovic Desroches * HSMCI (High Speed MCI) module is not fully compatible with MCI module. 2286796211b7SLudovic Desroches * HSMCI provides DMA support and a new config register but no more supports 2287796211b7SLudovic Desroches * PDC. 2288796211b7SLudovic Desroches */ 2289796211b7SLudovic Desroches static void __init atmci_get_cap(struct atmel_mci *host) 2290796211b7SLudovic Desroches { 2291796211b7SLudovic Desroches unsigned int version; 2292796211b7SLudovic Desroches 2293796211b7SLudovic Desroches version = atmci_get_version(host); 2294796211b7SLudovic Desroches dev_info(&host->pdev->dev, 2295796211b7SLudovic Desroches "version: 0x%x\n", version); 2296796211b7SLudovic Desroches 2297ccdfe612SHein_Tibosch host->caps.has_dma_conf_reg = 0; 22986bf2af8cSHein_Tibosch host->caps.has_pdc = ATMCI_PDC_CONNECTED; 2299796211b7SLudovic Desroches host->caps.has_cfg_reg = 0; 2300796211b7SLudovic Desroches host->caps.has_cstor_reg = 0; 2301796211b7SLudovic Desroches host->caps.has_highspeed = 0; 2302796211b7SLudovic Desroches host->caps.has_rwproof = 0; 2303faf8180bSLudovic Desroches host->caps.has_odd_clk_div = 0; 230424011f34SLudovic Desroches host->caps.has_bad_data_ordering = 1; 230524011f34SLudovic Desroches host->caps.need_reset_after_xfer = 1; 230624011f34SLudovic Desroches host->caps.need_blksz_mul_4 = 1; 2307077d4073SLudovic Desroches host->caps.need_notbusy_for_read_ops = 0; 2308796211b7SLudovic Desroches 2309796211b7SLudovic Desroches /* keep only major version number */ 2310796211b7SLudovic Desroches switch (version & 0xf00) { 2311796211b7SLudovic Desroches case 0x500: 2312faf8180bSLudovic Desroches host->caps.has_odd_clk_div = 1; 2313faf8180bSLudovic Desroches case 0x400: 2314faf8180bSLudovic Desroches case 0x300: 2315ccdfe612SHein_Tibosch host->caps.has_dma_conf_reg = 1; 2316faf8180bSLudovic Desroches host->caps.has_pdc = 0; 2317796211b7SLudovic Desroches host->caps.has_cfg_reg = 1; 2318796211b7SLudovic Desroches host->caps.has_cstor_reg = 1; 2319796211b7SLudovic Desroches host->caps.has_highspeed = 1; 2320faf8180bSLudovic Desroches case 0x200: 2321796211b7SLudovic Desroches host->caps.has_rwproof = 1; 232224011f34SLudovic Desroches host->caps.need_blksz_mul_4 = 0; 2323077d4073SLudovic Desroches host->caps.need_notbusy_for_read_ops = 1; 2324faf8180bSLudovic Desroches case 0x100: 232524011f34SLudovic Desroches host->caps.has_bad_data_ordering = 0; 232624011f34SLudovic Desroches host->caps.need_reset_after_xfer = 0; 232724011f34SLudovic Desroches case 0x0: 2328796211b7SLudovic Desroches break; 2329796211b7SLudovic Desroches default: 2330faf8180bSLudovic Desroches host->caps.has_pdc = 0; 2331796211b7SLudovic Desroches dev_warn(&host->pdev->dev, 2332796211b7SLudovic Desroches "Unmanaged mci version, set minimum capabilities\n"); 2333796211b7SLudovic Desroches break; 2334796211b7SLudovic Desroches } 2335796211b7SLudovic Desroches } 233674465b4fSDan Williams 23377d2be074SHaavard Skinnemoen static int __init atmci_probe(struct platform_device *pdev) 23387d2be074SHaavard Skinnemoen { 23397d2be074SHaavard Skinnemoen struct mci_platform_data *pdata; 23407d2be074SHaavard Skinnemoen struct atmel_mci *host; 23417d2be074SHaavard Skinnemoen struct resource *regs; 2342965ebf33SHaavard Skinnemoen unsigned int nr_slots; 23437d2be074SHaavard Skinnemoen int irq; 23447d2be074SHaavard Skinnemoen int ret; 23457d2be074SHaavard Skinnemoen 23467d2be074SHaavard Skinnemoen regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); 23477d2be074SHaavard Skinnemoen if (!regs) 23487d2be074SHaavard Skinnemoen return -ENXIO; 23497d2be074SHaavard Skinnemoen pdata = pdev->dev.platform_data; 2350e919fd20SLudovic Desroches if (!pdata) { 2351e919fd20SLudovic Desroches pdata = atmci_of_init(pdev); 2352e919fd20SLudovic Desroches if (IS_ERR(pdata)) { 2353e919fd20SLudovic Desroches dev_err(&pdev->dev, "platform data not available\n"); 2354e919fd20SLudovic Desroches return PTR_ERR(pdata); 2355e919fd20SLudovic Desroches } 2356e919fd20SLudovic Desroches } 2357e919fd20SLudovic Desroches 23587d2be074SHaavard Skinnemoen irq = platform_get_irq(pdev, 0); 23597d2be074SHaavard Skinnemoen if (irq < 0) 23607d2be074SHaavard Skinnemoen return irq; 23617d2be074SHaavard Skinnemoen 2362965ebf33SHaavard Skinnemoen host = kzalloc(sizeof(struct atmel_mci), GFP_KERNEL); 2363965ebf33SHaavard Skinnemoen if (!host) 23647d2be074SHaavard Skinnemoen return -ENOMEM; 23657d2be074SHaavard Skinnemoen 23667d2be074SHaavard Skinnemoen host->pdev = pdev; 2367965ebf33SHaavard Skinnemoen spin_lock_init(&host->lock); 2368965ebf33SHaavard Skinnemoen INIT_LIST_HEAD(&host->queue); 23697d2be074SHaavard Skinnemoen 23707d2be074SHaavard Skinnemoen host->mck = clk_get(&pdev->dev, "mci_clk"); 23717d2be074SHaavard Skinnemoen if (IS_ERR(host->mck)) { 23727d2be074SHaavard Skinnemoen ret = PTR_ERR(host->mck); 23737d2be074SHaavard Skinnemoen goto err_clk_get; 23747d2be074SHaavard Skinnemoen } 23757d2be074SHaavard Skinnemoen 23767d2be074SHaavard Skinnemoen ret = -ENOMEM; 2377e8e3f6caSH Hartley Sweeten host->regs = ioremap(regs->start, resource_size(regs)); 23787d2be074SHaavard Skinnemoen if (!host->regs) 23797d2be074SHaavard Skinnemoen goto err_ioremap; 23807d2be074SHaavard Skinnemoen 23817d2be074SHaavard Skinnemoen clk_enable(host->mck); 238203fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CR, ATMCI_CR_SWRST); 23837d2be074SHaavard Skinnemoen host->bus_hz = clk_get_rate(host->mck); 23847d2be074SHaavard Skinnemoen clk_disable(host->mck); 23857d2be074SHaavard Skinnemoen 23867d2be074SHaavard Skinnemoen host->mapbase = regs->start; 23877d2be074SHaavard Skinnemoen 2388965ebf33SHaavard Skinnemoen tasklet_init(&host->tasklet, atmci_tasklet_func, (unsigned long)host); 23897d2be074SHaavard Skinnemoen 239089c8aa20SKay Sievers ret = request_irq(irq, atmci_interrupt, 0, dev_name(&pdev->dev), host); 23917d2be074SHaavard Skinnemoen if (ret) 23927d2be074SHaavard Skinnemoen goto err_request_irq; 23937d2be074SHaavard Skinnemoen 2394796211b7SLudovic Desroches /* Get MCI capabilities and set operations according to it */ 2395796211b7SLudovic Desroches atmci_get_cap(host); 2396ccdfe612SHein_Tibosch if (atmci_configure_dma(host)) { 2397796211b7SLudovic Desroches host->prepare_data = &atmci_prepare_data_dma; 2398796211b7SLudovic Desroches host->submit_data = &atmci_submit_data_dma; 2399796211b7SLudovic Desroches host->stop_transfer = &atmci_stop_transfer_dma; 2400796211b7SLudovic Desroches } else if (host->caps.has_pdc) { 2401796211b7SLudovic Desroches dev_info(&pdev->dev, "using PDC\n"); 2402796211b7SLudovic Desroches host->prepare_data = &atmci_prepare_data_pdc; 2403796211b7SLudovic Desroches host->submit_data = &atmci_submit_data_pdc; 2404796211b7SLudovic Desroches host->stop_transfer = &atmci_stop_transfer_pdc; 2405796211b7SLudovic Desroches } else { 2406ef878198SLudovic Desroches dev_info(&pdev->dev, "using PIO\n"); 2407796211b7SLudovic Desroches host->prepare_data = &atmci_prepare_data; 2408796211b7SLudovic Desroches host->submit_data = &atmci_submit_data; 2409796211b7SLudovic Desroches host->stop_transfer = &atmci_stop_transfer; 2410796211b7SLudovic Desroches } 2411796211b7SLudovic Desroches 24127d2be074SHaavard Skinnemoen platform_set_drvdata(pdev, host); 24137d2be074SHaavard Skinnemoen 2414b87cc1b5SLudovic Desroches setup_timer(&host->timer, atmci_timeout_timer, (unsigned long)host); 2415b87cc1b5SLudovic Desroches 2416965ebf33SHaavard Skinnemoen /* We need at least one slot to succeed */ 2417965ebf33SHaavard Skinnemoen nr_slots = 0; 2418965ebf33SHaavard Skinnemoen ret = -ENODEV; 2419965ebf33SHaavard Skinnemoen if (pdata->slot[0].bus_width) { 2420965ebf33SHaavard Skinnemoen ret = atmci_init_slot(host, &pdata->slot[0], 24212c96a293SLudovic Desroches 0, ATMCI_SDCSEL_SLOT_A, ATMCI_SDIOIRQA); 24227a90dcc2SLudovic Desroches if (!ret) { 2423965ebf33SHaavard Skinnemoen nr_slots++; 24247a90dcc2SLudovic Desroches host->buf_size = host->slot[0]->mmc->max_req_size; 24257a90dcc2SLudovic Desroches } 24267d2be074SHaavard Skinnemoen } 2427965ebf33SHaavard Skinnemoen if (pdata->slot[1].bus_width) { 2428965ebf33SHaavard Skinnemoen ret = atmci_init_slot(host, &pdata->slot[1], 24292c96a293SLudovic Desroches 1, ATMCI_SDCSEL_SLOT_B, ATMCI_SDIOIRQB); 24307a90dcc2SLudovic Desroches if (!ret) { 2431965ebf33SHaavard Skinnemoen nr_slots++; 24327a90dcc2SLudovic Desroches if (host->slot[1]->mmc->max_req_size > host->buf_size) 24337a90dcc2SLudovic Desroches host->buf_size = 24347a90dcc2SLudovic Desroches host->slot[1]->mmc->max_req_size; 24357a90dcc2SLudovic Desroches } 24367d2be074SHaavard Skinnemoen } 24377d2be074SHaavard Skinnemoen 243804d699c3SRob Emanuele if (!nr_slots) { 243904d699c3SRob Emanuele dev_err(&pdev->dev, "init failed: no slot defined\n"); 2440965ebf33SHaavard Skinnemoen goto err_init_slot; 244104d699c3SRob Emanuele } 24427d2be074SHaavard Skinnemoen 24437a90dcc2SLudovic Desroches if (!host->caps.has_rwproof) { 24447a90dcc2SLudovic Desroches host->buffer = dma_alloc_coherent(&pdev->dev, host->buf_size, 24457a90dcc2SLudovic Desroches &host->buf_phys_addr, 24467a90dcc2SLudovic Desroches GFP_KERNEL); 24477a90dcc2SLudovic Desroches if (!host->buffer) { 24487a90dcc2SLudovic Desroches ret = -ENOMEM; 24497a90dcc2SLudovic Desroches dev_err(&pdev->dev, "buffer allocation failed\n"); 24507a90dcc2SLudovic Desroches goto err_init_slot; 24517a90dcc2SLudovic Desroches } 24527a90dcc2SLudovic Desroches } 24537a90dcc2SLudovic Desroches 2454965ebf33SHaavard Skinnemoen dev_info(&pdev->dev, 2455965ebf33SHaavard Skinnemoen "Atmel MCI controller at 0x%08lx irq %d, %u slots\n", 2456965ebf33SHaavard Skinnemoen host->mapbase, irq, nr_slots); 2457deec9ae3SHaavard Skinnemoen 24587d2be074SHaavard Skinnemoen return 0; 24597d2be074SHaavard Skinnemoen 2460965ebf33SHaavard Skinnemoen err_init_slot: 246174465b4fSDan Williams if (host->dma.chan) 246274465b4fSDan Williams dma_release_channel(host->dma.chan); 2463965ebf33SHaavard Skinnemoen free_irq(irq, host); 24647d2be074SHaavard Skinnemoen err_request_irq: 24657d2be074SHaavard Skinnemoen iounmap(host->regs); 24667d2be074SHaavard Skinnemoen err_ioremap: 24677d2be074SHaavard Skinnemoen clk_put(host->mck); 24687d2be074SHaavard Skinnemoen err_clk_get: 2469965ebf33SHaavard Skinnemoen kfree(host); 24707d2be074SHaavard Skinnemoen return ret; 24717d2be074SHaavard Skinnemoen } 24727d2be074SHaavard Skinnemoen 24737d2be074SHaavard Skinnemoen static int __exit atmci_remove(struct platform_device *pdev) 24747d2be074SHaavard Skinnemoen { 24757d2be074SHaavard Skinnemoen struct atmel_mci *host = platform_get_drvdata(pdev); 2476965ebf33SHaavard Skinnemoen unsigned int i; 24777d2be074SHaavard Skinnemoen 24787d2be074SHaavard Skinnemoen platform_set_drvdata(pdev, NULL); 24797d2be074SHaavard Skinnemoen 24807a90dcc2SLudovic Desroches if (host->buffer) 24817a90dcc2SLudovic Desroches dma_free_coherent(&pdev->dev, host->buf_size, 24827a90dcc2SLudovic Desroches host->buffer, host->buf_phys_addr); 24837a90dcc2SLudovic Desroches 24842c96a293SLudovic Desroches for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) { 2485965ebf33SHaavard Skinnemoen if (host->slot[i]) 2486965ebf33SHaavard Skinnemoen atmci_cleanup_slot(host->slot[i], i); 24877d2be074SHaavard Skinnemoen } 24887d2be074SHaavard Skinnemoen 24897d2be074SHaavard Skinnemoen clk_enable(host->mck); 249003fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_IDR, ~0UL); 249103fc9a7fSLudovic Desroches atmci_writel(host, ATMCI_CR, ATMCI_CR_MCIDIS); 249203fc9a7fSLudovic Desroches atmci_readl(host, ATMCI_SR); 24937d2be074SHaavard Skinnemoen clk_disable(host->mck); 24947d2be074SHaavard Skinnemoen 249574465b4fSDan Williams if (host->dma.chan) 249674465b4fSDan Williams dma_release_channel(host->dma.chan); 249765e8b083SHaavard Skinnemoen 2498965ebf33SHaavard Skinnemoen free_irq(platform_get_irq(pdev, 0), host); 24997d2be074SHaavard Skinnemoen iounmap(host->regs); 25007d2be074SHaavard Skinnemoen 25017d2be074SHaavard Skinnemoen clk_put(host->mck); 2502965ebf33SHaavard Skinnemoen kfree(host); 25037d2be074SHaavard Skinnemoen 25047d2be074SHaavard Skinnemoen return 0; 25057d2be074SHaavard Skinnemoen } 25067d2be074SHaavard Skinnemoen 25075a942b6fSJingoo Han #ifdef CONFIG_PM_SLEEP 25085c2f2b9bSNicolas Ferre static int atmci_suspend(struct device *dev) 25095c2f2b9bSNicolas Ferre { 25105c2f2b9bSNicolas Ferre struct atmel_mci *host = dev_get_drvdata(dev); 25115c2f2b9bSNicolas Ferre int i; 25125c2f2b9bSNicolas Ferre 25132c96a293SLudovic Desroches for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) { 25145c2f2b9bSNicolas Ferre struct atmel_mci_slot *slot = host->slot[i]; 25155c2f2b9bSNicolas Ferre int ret; 25165c2f2b9bSNicolas Ferre 25175c2f2b9bSNicolas Ferre if (!slot) 25185c2f2b9bSNicolas Ferre continue; 25195c2f2b9bSNicolas Ferre ret = mmc_suspend_host(slot->mmc); 25205c2f2b9bSNicolas Ferre if (ret < 0) { 25215c2f2b9bSNicolas Ferre while (--i >= 0) { 25225c2f2b9bSNicolas Ferre slot = host->slot[i]; 25235c2f2b9bSNicolas Ferre if (slot 25245c2f2b9bSNicolas Ferre && test_bit(ATMCI_SUSPENDED, &slot->flags)) { 25255c2f2b9bSNicolas Ferre mmc_resume_host(host->slot[i]->mmc); 25265c2f2b9bSNicolas Ferre clear_bit(ATMCI_SUSPENDED, &slot->flags); 25275c2f2b9bSNicolas Ferre } 25285c2f2b9bSNicolas Ferre } 25295c2f2b9bSNicolas Ferre return ret; 25305c2f2b9bSNicolas Ferre } else { 25315c2f2b9bSNicolas Ferre set_bit(ATMCI_SUSPENDED, &slot->flags); 25325c2f2b9bSNicolas Ferre } 25335c2f2b9bSNicolas Ferre } 25345c2f2b9bSNicolas Ferre 25355c2f2b9bSNicolas Ferre return 0; 25365c2f2b9bSNicolas Ferre } 25375c2f2b9bSNicolas Ferre 25385c2f2b9bSNicolas Ferre static int atmci_resume(struct device *dev) 25395c2f2b9bSNicolas Ferre { 25405c2f2b9bSNicolas Ferre struct atmel_mci *host = dev_get_drvdata(dev); 25415c2f2b9bSNicolas Ferre int i; 25425c2f2b9bSNicolas Ferre int ret = 0; 25435c2f2b9bSNicolas Ferre 25442c96a293SLudovic Desroches for (i = 0; i < ATMCI_MAX_NR_SLOTS; i++) { 25455c2f2b9bSNicolas Ferre struct atmel_mci_slot *slot = host->slot[i]; 25465c2f2b9bSNicolas Ferre int err; 25475c2f2b9bSNicolas Ferre 25485c2f2b9bSNicolas Ferre slot = host->slot[i]; 25495c2f2b9bSNicolas Ferre if (!slot) 25505c2f2b9bSNicolas Ferre continue; 25515c2f2b9bSNicolas Ferre if (!test_bit(ATMCI_SUSPENDED, &slot->flags)) 25525c2f2b9bSNicolas Ferre continue; 25535c2f2b9bSNicolas Ferre err = mmc_resume_host(slot->mmc); 25545c2f2b9bSNicolas Ferre if (err < 0) 25555c2f2b9bSNicolas Ferre ret = err; 25565c2f2b9bSNicolas Ferre else 25575c2f2b9bSNicolas Ferre clear_bit(ATMCI_SUSPENDED, &slot->flags); 25585c2f2b9bSNicolas Ferre } 25595c2f2b9bSNicolas Ferre 25605c2f2b9bSNicolas Ferre return ret; 25615c2f2b9bSNicolas Ferre } 25625c2f2b9bSNicolas Ferre #endif 25635c2f2b9bSNicolas Ferre 25645a942b6fSJingoo Han static SIMPLE_DEV_PM_OPS(atmci_pm, atmci_suspend, atmci_resume); 25655a942b6fSJingoo Han 25667d2be074SHaavard Skinnemoen static struct platform_driver atmci_driver = { 25677d2be074SHaavard Skinnemoen .remove = __exit_p(atmci_remove), 25687d2be074SHaavard Skinnemoen .driver = { 25697d2be074SHaavard Skinnemoen .name = "atmel_mci", 25705a942b6fSJingoo Han .pm = &atmci_pm, 2571e919fd20SLudovic Desroches .of_match_table = of_match_ptr(atmci_dt_ids), 25727d2be074SHaavard Skinnemoen }, 25737d2be074SHaavard Skinnemoen }; 25747d2be074SHaavard Skinnemoen 25757d2be074SHaavard Skinnemoen static int __init atmci_init(void) 25767d2be074SHaavard Skinnemoen { 25777d2be074SHaavard Skinnemoen return platform_driver_probe(&atmci_driver, atmci_probe); 25787d2be074SHaavard Skinnemoen } 25797d2be074SHaavard Skinnemoen 25807d2be074SHaavard Skinnemoen static void __exit atmci_exit(void) 25817d2be074SHaavard Skinnemoen { 25827d2be074SHaavard Skinnemoen platform_driver_unregister(&atmci_driver); 25837d2be074SHaavard Skinnemoen } 25847d2be074SHaavard Skinnemoen 258574465b4fSDan Williams late_initcall(atmci_init); /* try to load after dma driver when built-in */ 25867d2be074SHaavard Skinnemoen module_exit(atmci_exit); 25877d2be074SHaavard Skinnemoen 25887d2be074SHaavard Skinnemoen MODULE_DESCRIPTION("Atmel Multimedia Card Interface driver"); 2589e05503efSJean Delvare MODULE_AUTHOR("Haavard Skinnemoen (Atmel)"); 25907d2be074SHaavard Skinnemoen MODULE_LICENSE("GPL v2"); 2591