1 /* 2 * 3 * Intel Management Engine Interface (Intel MEI) Linux driver 4 * Copyright (c) 2003-2012, Intel Corporation. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms and conditions of the GNU General Public License, 8 * version 2, as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 * 15 */ 16 17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt 18 19 #include <linux/module.h> 20 #include <linux/moduleparam.h> 21 #include <linux/kernel.h> 22 #include <linux/device.h> 23 #include <linux/fs.h> 24 #include <linux/errno.h> 25 #include <linux/types.h> 26 #include <linux/fcntl.h> 27 #include <linux/aio.h> 28 #include <linux/pci.h> 29 #include <linux/poll.h> 30 #include <linux/init.h> 31 #include <linux/ioctl.h> 32 #include <linux/cdev.h> 33 #include <linux/sched.h> 34 #include <linux/uuid.h> 35 #include <linux/compat.h> 36 #include <linux/jiffies.h> 37 #include <linux/interrupt.h> 38 #include <linux/miscdevice.h> 39 40 #include <linux/mei.h> 41 42 #include "mei_dev.h" 43 #include "hw-me.h" 44 #include "client.h" 45 46 /* AMT device is a singleton on the platform */ 47 static struct pci_dev *mei_pdev; 48 49 /* mei_pci_tbl - PCI Device ID Table */ 50 static DEFINE_PCI_DEVICE_TABLE(mei_me_pci_tbl) = { 51 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82946GZ)}, 52 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82G35)}, 53 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82Q965)}, 54 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82G965)}, 55 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82GM965)}, 56 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_82GME965)}, 57 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_82Q35)}, 58 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_82G33)}, 59 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_82Q33)}, 60 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_82X38)}, 61 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_3200)}, 62 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_6)}, 63 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_7)}, 64 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_8)}, 65 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_9)}, 66 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9_10)}, 67 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9M_1)}, 68 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9M_2)}, 69 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9M_3)}, 70 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH9M_4)}, 71 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH10_1)}, 72 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH10_2)}, 73 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH10_3)}, 74 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_ICH10_4)}, 75 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_IBXPK_1)}, 76 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_IBXPK_2)}, 77 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_CPT_1)}, 78 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_PBG_1)}, 79 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_PPT_1)}, 80 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_PPT_2)}, 81 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_PPT_3)}, 82 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_LPT)}, 83 {PCI_DEVICE(PCI_VENDOR_ID_INTEL, MEI_DEV_ID_LPT_LP)}, 84 85 /* required last entry */ 86 {0, } 87 }; 88 89 MODULE_DEVICE_TABLE(pci, mei_me_pci_tbl); 90 91 static DEFINE_MUTEX(mei_mutex); 92 93 /** 94 * mei_quirk_probe - probe for devices that doesn't valid ME interface 95 * 96 * @pdev: PCI device structure 97 * @ent: entry into pci_device_table 98 * 99 * returns true if ME Interface is valid, false otherwise 100 */ 101 static bool mei_me_quirk_probe(struct pci_dev *pdev, 102 const struct pci_device_id *ent) 103 { 104 u32 reg; 105 if (ent->device == MEI_DEV_ID_PBG_1) { 106 pci_read_config_dword(pdev, 0x48, ®); 107 /* make sure that bit 9 is up and bit 10 is down */ 108 if ((reg & 0x600) == 0x200) { 109 dev_info(&pdev->dev, "Device doesn't have valid ME Interface\n"); 110 return false; 111 } 112 } 113 return true; 114 } 115 /** 116 * mei_probe - Device Initialization Routine 117 * 118 * @pdev: PCI device structure 119 * @ent: entry in kcs_pci_tbl 120 * 121 * returns 0 on success, <0 on failure. 122 */ 123 static int mei_me_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 124 { 125 struct mei_device *dev; 126 struct mei_me_hw *hw; 127 int err; 128 129 mutex_lock(&mei_mutex); 130 131 if (!mei_me_quirk_probe(pdev, ent)) { 132 err = -ENODEV; 133 goto end; 134 } 135 136 if (mei_pdev) { 137 err = -EEXIST; 138 goto end; 139 } 140 /* enable pci dev */ 141 err = pci_enable_device(pdev); 142 if (err) { 143 dev_err(&pdev->dev, "failed to enable pci device.\n"); 144 goto end; 145 } 146 /* set PCI host mastering */ 147 pci_set_master(pdev); 148 /* pci request regions for mei driver */ 149 err = pci_request_regions(pdev, KBUILD_MODNAME); 150 if (err) { 151 dev_err(&pdev->dev, "failed to get pci regions.\n"); 152 goto disable_device; 153 } 154 /* allocates and initializes the mei dev structure */ 155 dev = mei_me_dev_init(pdev); 156 if (!dev) { 157 err = -ENOMEM; 158 goto release_regions; 159 } 160 hw = to_me_hw(dev); 161 /* mapping IO device memory */ 162 hw->mem_addr = pci_iomap(pdev, 0, 0); 163 if (!hw->mem_addr) { 164 dev_err(&pdev->dev, "mapping I/O device memory failure.\n"); 165 err = -ENOMEM; 166 goto free_device; 167 } 168 pci_enable_msi(pdev); 169 170 /* request and enable interrupt */ 171 if (pci_dev_msi_enabled(pdev)) 172 err = request_threaded_irq(pdev->irq, 173 NULL, 174 mei_me_irq_thread_handler, 175 IRQF_ONESHOT, KBUILD_MODNAME, dev); 176 else 177 err = request_threaded_irq(pdev->irq, 178 mei_me_irq_quick_handler, 179 mei_me_irq_thread_handler, 180 IRQF_SHARED, KBUILD_MODNAME, dev); 181 182 if (err) { 183 dev_err(&pdev->dev, "request_threaded_irq failure. irq = %d\n", 184 pdev->irq); 185 goto disable_msi; 186 } 187 188 if (mei_start(dev)) { 189 dev_err(&pdev->dev, "init hw failure.\n"); 190 err = -ENODEV; 191 goto release_irq; 192 } 193 194 err = mei_register(dev); 195 if (err) 196 goto release_irq; 197 198 mei_pdev = pdev; 199 pci_set_drvdata(pdev, dev); 200 201 schedule_delayed_work(&dev->timer_work, HZ); 202 203 mutex_unlock(&mei_mutex); 204 205 pr_debug("initialization successful.\n"); 206 207 return 0; 208 209 release_irq: 210 mei_disable_interrupts(dev); 211 flush_scheduled_work(); 212 free_irq(pdev->irq, dev); 213 disable_msi: 214 pci_disable_msi(pdev); 215 pci_iounmap(pdev, hw->mem_addr); 216 free_device: 217 kfree(dev); 218 release_regions: 219 pci_release_regions(pdev); 220 disable_device: 221 pci_disable_device(pdev); 222 end: 223 mutex_unlock(&mei_mutex); 224 dev_err(&pdev->dev, "initialization failed.\n"); 225 return err; 226 } 227 228 /** 229 * mei_remove - Device Removal Routine 230 * 231 * @pdev: PCI device structure 232 * 233 * mei_remove is called by the PCI subsystem to alert the driver 234 * that it should release a PCI device. 235 */ 236 static void mei_me_remove(struct pci_dev *pdev) 237 { 238 struct mei_device *dev; 239 struct mei_me_hw *hw; 240 241 if (mei_pdev != pdev) 242 return; 243 244 dev = pci_get_drvdata(pdev); 245 if (!dev) 246 return; 247 248 hw = to_me_hw(dev); 249 250 251 dev_err(&pdev->dev, "stop\n"); 252 mei_stop(dev); 253 254 mei_pdev = NULL; 255 256 /* disable interrupts */ 257 mei_disable_interrupts(dev); 258 259 free_irq(pdev->irq, dev); 260 pci_disable_msi(pdev); 261 pci_set_drvdata(pdev, NULL); 262 263 if (hw->mem_addr) 264 pci_iounmap(pdev, hw->mem_addr); 265 266 mei_deregister(dev); 267 268 kfree(dev); 269 270 pci_release_regions(pdev); 271 pci_disable_device(pdev); 272 273 274 } 275 #ifdef CONFIG_PM 276 static int mei_me_pci_suspend(struct device *device) 277 { 278 struct pci_dev *pdev = to_pci_dev(device); 279 struct mei_device *dev = pci_get_drvdata(pdev); 280 281 if (!dev) 282 return -ENODEV; 283 284 dev_err(&pdev->dev, "suspend\n"); 285 286 mei_stop(dev); 287 288 mei_disable_interrupts(dev); 289 290 free_irq(pdev->irq, dev); 291 pci_disable_msi(pdev); 292 293 return 0; 294 } 295 296 static int mei_me_pci_resume(struct device *device) 297 { 298 struct pci_dev *pdev = to_pci_dev(device); 299 struct mei_device *dev; 300 int err; 301 302 dev = pci_get_drvdata(pdev); 303 if (!dev) 304 return -ENODEV; 305 306 pci_enable_msi(pdev); 307 308 /* request and enable interrupt */ 309 if (pci_dev_msi_enabled(pdev)) 310 err = request_threaded_irq(pdev->irq, 311 NULL, 312 mei_me_irq_thread_handler, 313 IRQF_ONESHOT, KBUILD_MODNAME, dev); 314 else 315 err = request_threaded_irq(pdev->irq, 316 mei_me_irq_quick_handler, 317 mei_me_irq_thread_handler, 318 IRQF_SHARED, KBUILD_MODNAME, dev); 319 320 if (err) { 321 dev_err(&pdev->dev, "request_threaded_irq failed: irq = %d.\n", 322 pdev->irq); 323 return err; 324 } 325 326 mutex_lock(&dev->device_lock); 327 dev->dev_state = MEI_DEV_POWER_UP; 328 mei_reset(dev, 1); 329 mutex_unlock(&dev->device_lock); 330 331 /* Start timer if stopped in suspend */ 332 schedule_delayed_work(&dev->timer_work, HZ); 333 334 return err; 335 } 336 static SIMPLE_DEV_PM_OPS(mei_me_pm_ops, mei_me_pci_suspend, mei_me_pci_resume); 337 #define MEI_ME_PM_OPS (&mei_me_pm_ops) 338 #else 339 #define MEI_ME_PM_OPS NULL 340 #endif /* CONFIG_PM */ 341 /* 342 * PCI driver structure 343 */ 344 static struct pci_driver mei_me_driver = { 345 .name = KBUILD_MODNAME, 346 .id_table = mei_me_pci_tbl, 347 .probe = mei_me_probe, 348 .remove = mei_me_remove, 349 .shutdown = mei_me_remove, 350 .driver.pm = MEI_ME_PM_OPS, 351 }; 352 353 module_pci_driver(mei_me_driver); 354 355 MODULE_AUTHOR("Intel Corporation"); 356 MODULE_DESCRIPTION("Intel(R) Management Engine Interface"); 357 MODULE_LICENSE("GPL v2"); 358