xref: /openbmc/linux/drivers/misc/mei/pci-me.c (revision ae3473231e77a3f1909d48cd144cebe5e1d049b3)
1 /*
2  *
3  * Intel Management Engine Interface (Intel MEI) Linux driver
4  * Copyright (c) 2003-2012, Intel Corporation.
5  *
6  * This program is free software; you can redistribute it and/or modify it
7  * under the terms and conditions of the GNU General Public License,
8  * version 2, as published by the Free Software Foundation.
9  *
10  * This program is distributed in the hope it will be useful, but WITHOUT
11  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
13  * more details.
14  *
15  */
16 #include <linux/module.h>
17 #include <linux/moduleparam.h>
18 #include <linux/kernel.h>
19 #include <linux/device.h>
20 #include <linux/fs.h>
21 #include <linux/errno.h>
22 #include <linux/types.h>
23 #include <linux/fcntl.h>
24 #include <linux/pci.h>
25 #include <linux/poll.h>
26 #include <linux/ioctl.h>
27 #include <linux/cdev.h>
28 #include <linux/sched.h>
29 #include <linux/uuid.h>
30 #include <linux/compat.h>
31 #include <linux/jiffies.h>
32 #include <linux/interrupt.h>
33 
34 #include <linux/pm_domain.h>
35 #include <linux/pm_runtime.h>
36 
37 #include <linux/mei.h>
38 
39 #include "mei_dev.h"
40 #include "client.h"
41 #include "hw-me-regs.h"
42 #include "hw-me.h"
43 
44 /* mei_pci_tbl - PCI Device ID Table */
45 static const struct pci_device_id mei_me_pci_tbl[] = {
46 	{MEI_PCI_DEVICE(MEI_DEV_ID_82946GZ, mei_me_legacy_cfg)},
47 	{MEI_PCI_DEVICE(MEI_DEV_ID_82G35, mei_me_legacy_cfg)},
48 	{MEI_PCI_DEVICE(MEI_DEV_ID_82Q965, mei_me_legacy_cfg)},
49 	{MEI_PCI_DEVICE(MEI_DEV_ID_82G965, mei_me_legacy_cfg)},
50 	{MEI_PCI_DEVICE(MEI_DEV_ID_82GM965, mei_me_legacy_cfg)},
51 	{MEI_PCI_DEVICE(MEI_DEV_ID_82GME965, mei_me_legacy_cfg)},
52 	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82Q35, mei_me_legacy_cfg)},
53 	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82G33, mei_me_legacy_cfg)},
54 	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82Q33, mei_me_legacy_cfg)},
55 	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82X38, mei_me_legacy_cfg)},
56 	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_3200, mei_me_legacy_cfg)},
57 
58 	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_6, mei_me_legacy_cfg)},
59 	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_7, mei_me_legacy_cfg)},
60 	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_8, mei_me_legacy_cfg)},
61 	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_9, mei_me_legacy_cfg)},
62 	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_10, mei_me_legacy_cfg)},
63 	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_1, mei_me_legacy_cfg)},
64 	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_2, mei_me_legacy_cfg)},
65 	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_3, mei_me_legacy_cfg)},
66 	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_4, mei_me_legacy_cfg)},
67 	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_1, mei_me_ich_cfg)},
68 	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_2, mei_me_ich_cfg)},
69 	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_3, mei_me_ich_cfg)},
70 	{MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_4, mei_me_ich_cfg)},
71 
72 	{MEI_PCI_DEVICE(MEI_DEV_ID_IBXPK_1, mei_me_pch_cfg)},
73 	{MEI_PCI_DEVICE(MEI_DEV_ID_IBXPK_2, mei_me_pch_cfg)},
74 	{MEI_PCI_DEVICE(MEI_DEV_ID_CPT_1, mei_me_pch_cpt_pbg_cfg)},
75 	{MEI_PCI_DEVICE(MEI_DEV_ID_PBG_1, mei_me_pch_cpt_pbg_cfg)},
76 	{MEI_PCI_DEVICE(MEI_DEV_ID_PPT_1, mei_me_pch_cfg)},
77 	{MEI_PCI_DEVICE(MEI_DEV_ID_PPT_2, mei_me_pch_cfg)},
78 	{MEI_PCI_DEVICE(MEI_DEV_ID_PPT_3, mei_me_pch_cfg)},
79 	{MEI_PCI_DEVICE(MEI_DEV_ID_LPT_H, mei_me_pch8_sps_cfg)},
80 	{MEI_PCI_DEVICE(MEI_DEV_ID_LPT_W, mei_me_pch8_sps_cfg)},
81 	{MEI_PCI_DEVICE(MEI_DEV_ID_LPT_LP, mei_me_pch8_cfg)},
82 	{MEI_PCI_DEVICE(MEI_DEV_ID_LPT_HR, mei_me_pch8_sps_cfg)},
83 	{MEI_PCI_DEVICE(MEI_DEV_ID_WPT_LP, mei_me_pch8_cfg)},
84 	{MEI_PCI_DEVICE(MEI_DEV_ID_WPT_LP_2, mei_me_pch8_cfg)},
85 
86 	{MEI_PCI_DEVICE(MEI_DEV_ID_SPT, mei_me_pch8_cfg)},
87 	{MEI_PCI_DEVICE(MEI_DEV_ID_SPT_2, mei_me_pch8_cfg)},
88 	{MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H, mei_me_pch8_sps_cfg)},
89 	{MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H_2, mei_me_pch8_sps_cfg)},
90 	{MEI_PCI_DEVICE(MEI_DEV_ID_LBG, mei_me_pch8_cfg)},
91 
92 	{MEI_PCI_DEVICE(MEI_DEV_ID_BXT_M, mei_me_pch8_cfg)},
93 	{MEI_PCI_DEVICE(MEI_DEV_ID_APL_I, mei_me_pch8_cfg)},
94 
95 	{MEI_PCI_DEVICE(MEI_DEV_ID_KBP, mei_me_pch8_cfg)},
96 	{MEI_PCI_DEVICE(MEI_DEV_ID_KBP_2, mei_me_pch8_cfg)},
97 
98 	/* required last entry */
99 	{0, }
100 };
101 
102 MODULE_DEVICE_TABLE(pci, mei_me_pci_tbl);
103 
104 #ifdef CONFIG_PM
105 static inline void mei_me_set_pm_domain(struct mei_device *dev);
106 static inline void mei_me_unset_pm_domain(struct mei_device *dev);
107 #else
108 static inline void mei_me_set_pm_domain(struct mei_device *dev) {}
109 static inline void mei_me_unset_pm_domain(struct mei_device *dev) {}
110 #endif /* CONFIG_PM */
111 
112 /**
113  * mei_me_quirk_probe - probe for devices that doesn't valid ME interface
114  *
115  * @pdev: PCI device structure
116  * @cfg: per generation config
117  *
118  * Return: true if ME Interface is valid, false otherwise
119  */
120 static bool mei_me_quirk_probe(struct pci_dev *pdev,
121 				const struct mei_cfg *cfg)
122 {
123 	if (cfg->quirk_probe && cfg->quirk_probe(pdev)) {
124 		dev_info(&pdev->dev, "Device doesn't have valid ME Interface\n");
125 		return false;
126 	}
127 
128 	return true;
129 }
130 
131 /**
132  * mei_me_probe - Device Initialization Routine
133  *
134  * @pdev: PCI device structure
135  * @ent: entry in kcs_pci_tbl
136  *
137  * Return: 0 on success, <0 on failure.
138  */
139 static int mei_me_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
140 {
141 	const struct mei_cfg *cfg = (struct mei_cfg *)(ent->driver_data);
142 	struct mei_device *dev;
143 	struct mei_me_hw *hw;
144 	unsigned int irqflags;
145 	int err;
146 
147 
148 	if (!mei_me_quirk_probe(pdev, cfg))
149 		return -ENODEV;
150 
151 	/* enable pci dev */
152 	err = pci_enable_device(pdev);
153 	if (err) {
154 		dev_err(&pdev->dev, "failed to enable pci device.\n");
155 		goto end;
156 	}
157 	/* set PCI host mastering  */
158 	pci_set_master(pdev);
159 	/* pci request regions for mei driver */
160 	err = pci_request_regions(pdev, KBUILD_MODNAME);
161 	if (err) {
162 		dev_err(&pdev->dev, "failed to get pci regions.\n");
163 		goto disable_device;
164 	}
165 
166 	if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) ||
167 	    dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) {
168 
169 		err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
170 		if (err)
171 			err = dma_set_coherent_mask(&pdev->dev,
172 						    DMA_BIT_MASK(32));
173 	}
174 	if (err) {
175 		dev_err(&pdev->dev, "No usable DMA configuration, aborting\n");
176 		goto release_regions;
177 	}
178 
179 
180 	/* allocates and initializes the mei dev structure */
181 	dev = mei_me_dev_init(pdev, cfg);
182 	if (!dev) {
183 		err = -ENOMEM;
184 		goto release_regions;
185 	}
186 	hw = to_me_hw(dev);
187 	/* mapping  IO device memory */
188 	hw->mem_addr = pci_iomap(pdev, 0, 0);
189 	if (!hw->mem_addr) {
190 		dev_err(&pdev->dev, "mapping I/O device memory failure.\n");
191 		err = -ENOMEM;
192 		goto free_device;
193 	}
194 	pci_enable_msi(pdev);
195 
196 	 /* request and enable interrupt */
197 	irqflags = pci_dev_msi_enabled(pdev) ? IRQF_ONESHOT : IRQF_SHARED;
198 
199 	err = request_threaded_irq(pdev->irq,
200 			mei_me_irq_quick_handler,
201 			mei_me_irq_thread_handler,
202 			irqflags, KBUILD_MODNAME, dev);
203 	if (err) {
204 		dev_err(&pdev->dev, "request_threaded_irq failure. irq = %d\n",
205 		       pdev->irq);
206 		goto disable_msi;
207 	}
208 
209 	if (mei_start(dev)) {
210 		dev_err(&pdev->dev, "init hw failure.\n");
211 		err = -ENODEV;
212 		goto release_irq;
213 	}
214 
215 	pm_runtime_set_autosuspend_delay(&pdev->dev, MEI_ME_RPM_TIMEOUT);
216 	pm_runtime_use_autosuspend(&pdev->dev);
217 
218 	err = mei_register(dev, &pdev->dev);
219 	if (err)
220 		goto stop;
221 
222 	pci_set_drvdata(pdev, dev);
223 
224 	/*
225 	* For not wake-able HW runtime pm framework
226 	* can't be used on pci device level.
227 	* Use domain runtime pm callbacks instead.
228 	*/
229 	if (!pci_dev_run_wake(pdev))
230 		mei_me_set_pm_domain(dev);
231 
232 	if (mei_pg_is_enabled(dev))
233 		pm_runtime_put_noidle(&pdev->dev);
234 
235 	dev_dbg(&pdev->dev, "initialization successful.\n");
236 
237 	return 0;
238 
239 stop:
240 	mei_stop(dev);
241 release_irq:
242 	mei_cancel_work(dev);
243 	mei_disable_interrupts(dev);
244 	free_irq(pdev->irq, dev);
245 disable_msi:
246 	pci_disable_msi(pdev);
247 	pci_iounmap(pdev, hw->mem_addr);
248 free_device:
249 	kfree(dev);
250 release_regions:
251 	pci_release_regions(pdev);
252 disable_device:
253 	pci_disable_device(pdev);
254 end:
255 	dev_err(&pdev->dev, "initialization failed.\n");
256 	return err;
257 }
258 
259 /**
260  * mei_me_remove - Device Removal Routine
261  *
262  * @pdev: PCI device structure
263  *
264  * mei_remove is called by the PCI subsystem to alert the driver
265  * that it should release a PCI device.
266  */
267 static void mei_me_remove(struct pci_dev *pdev)
268 {
269 	struct mei_device *dev;
270 	struct mei_me_hw *hw;
271 
272 	dev = pci_get_drvdata(pdev);
273 	if (!dev)
274 		return;
275 
276 	if (mei_pg_is_enabled(dev))
277 		pm_runtime_get_noresume(&pdev->dev);
278 
279 	hw = to_me_hw(dev);
280 
281 
282 	dev_dbg(&pdev->dev, "stop\n");
283 	mei_stop(dev);
284 
285 	if (!pci_dev_run_wake(pdev))
286 		mei_me_unset_pm_domain(dev);
287 
288 	/* disable interrupts */
289 	mei_disable_interrupts(dev);
290 
291 	free_irq(pdev->irq, dev);
292 	pci_disable_msi(pdev);
293 
294 	if (hw->mem_addr)
295 		pci_iounmap(pdev, hw->mem_addr);
296 
297 	mei_deregister(dev);
298 
299 	kfree(dev);
300 
301 	pci_release_regions(pdev);
302 	pci_disable_device(pdev);
303 
304 
305 }
306 #ifdef CONFIG_PM_SLEEP
307 static int mei_me_pci_suspend(struct device *device)
308 {
309 	struct pci_dev *pdev = to_pci_dev(device);
310 	struct mei_device *dev = pci_get_drvdata(pdev);
311 
312 	if (!dev)
313 		return -ENODEV;
314 
315 	dev_dbg(&pdev->dev, "suspend\n");
316 
317 	mei_stop(dev);
318 
319 	mei_disable_interrupts(dev);
320 
321 	free_irq(pdev->irq, dev);
322 	pci_disable_msi(pdev);
323 
324 	return 0;
325 }
326 
327 static int mei_me_pci_resume(struct device *device)
328 {
329 	struct pci_dev *pdev = to_pci_dev(device);
330 	struct mei_device *dev;
331 	unsigned int irqflags;
332 	int err;
333 
334 	dev = pci_get_drvdata(pdev);
335 	if (!dev)
336 		return -ENODEV;
337 
338 	pci_enable_msi(pdev);
339 
340 	irqflags = pci_dev_msi_enabled(pdev) ? IRQF_ONESHOT : IRQF_SHARED;
341 
342 	/* request and enable interrupt */
343 	err = request_threaded_irq(pdev->irq,
344 			mei_me_irq_quick_handler,
345 			mei_me_irq_thread_handler,
346 			irqflags, KBUILD_MODNAME, dev);
347 
348 	if (err) {
349 		dev_err(&pdev->dev, "request_threaded_irq failed: irq = %d.\n",
350 				pdev->irq);
351 		return err;
352 	}
353 
354 	err = mei_restart(dev);
355 	if (err)
356 		return err;
357 
358 	/* Start timer if stopped in suspend */
359 	schedule_delayed_work(&dev->timer_work, HZ);
360 
361 	return 0;
362 }
363 #endif /* CONFIG_PM_SLEEP */
364 
365 #ifdef CONFIG_PM
366 static int mei_me_pm_runtime_idle(struct device *device)
367 {
368 	struct pci_dev *pdev = to_pci_dev(device);
369 	struct mei_device *dev;
370 
371 	dev_dbg(&pdev->dev, "rpm: me: runtime_idle\n");
372 
373 	dev = pci_get_drvdata(pdev);
374 	if (!dev)
375 		return -ENODEV;
376 	if (mei_write_is_idle(dev))
377 		pm_runtime_autosuspend(device);
378 
379 	return -EBUSY;
380 }
381 
382 static int mei_me_pm_runtime_suspend(struct device *device)
383 {
384 	struct pci_dev *pdev = to_pci_dev(device);
385 	struct mei_device *dev;
386 	int ret;
387 
388 	dev_dbg(&pdev->dev, "rpm: me: runtime suspend\n");
389 
390 	dev = pci_get_drvdata(pdev);
391 	if (!dev)
392 		return -ENODEV;
393 
394 	mutex_lock(&dev->device_lock);
395 
396 	if (mei_write_is_idle(dev))
397 		ret = mei_me_pg_enter_sync(dev);
398 	else
399 		ret = -EAGAIN;
400 
401 	mutex_unlock(&dev->device_lock);
402 
403 	dev_dbg(&pdev->dev, "rpm: me: runtime suspend ret=%d\n", ret);
404 
405 	if (ret && ret != -EAGAIN)
406 		schedule_work(&dev->reset_work);
407 
408 	return ret;
409 }
410 
411 static int mei_me_pm_runtime_resume(struct device *device)
412 {
413 	struct pci_dev *pdev = to_pci_dev(device);
414 	struct mei_device *dev;
415 	int ret;
416 
417 	dev_dbg(&pdev->dev, "rpm: me: runtime resume\n");
418 
419 	dev = pci_get_drvdata(pdev);
420 	if (!dev)
421 		return -ENODEV;
422 
423 	mutex_lock(&dev->device_lock);
424 
425 	ret = mei_me_pg_exit_sync(dev);
426 
427 	mutex_unlock(&dev->device_lock);
428 
429 	dev_dbg(&pdev->dev, "rpm: me: runtime resume ret = %d\n", ret);
430 
431 	if (ret)
432 		schedule_work(&dev->reset_work);
433 
434 	return ret;
435 }
436 
437 /**
438  * mei_me_set_pm_domain - fill and set pm domain structure for device
439  *
440  * @dev: mei_device
441  */
442 static inline void mei_me_set_pm_domain(struct mei_device *dev)
443 {
444 	struct pci_dev *pdev  = to_pci_dev(dev->dev);
445 
446 	if (pdev->dev.bus && pdev->dev.bus->pm) {
447 		dev->pg_domain.ops = *pdev->dev.bus->pm;
448 
449 		dev->pg_domain.ops.runtime_suspend = mei_me_pm_runtime_suspend;
450 		dev->pg_domain.ops.runtime_resume = mei_me_pm_runtime_resume;
451 		dev->pg_domain.ops.runtime_idle = mei_me_pm_runtime_idle;
452 
453 		dev_pm_domain_set(&pdev->dev, &dev->pg_domain);
454 	}
455 }
456 
457 /**
458  * mei_me_unset_pm_domain - clean pm domain structure for device
459  *
460  * @dev: mei_device
461  */
462 static inline void mei_me_unset_pm_domain(struct mei_device *dev)
463 {
464 	/* stop using pm callbacks if any */
465 	dev_pm_domain_set(dev->dev, NULL);
466 }
467 
468 static const struct dev_pm_ops mei_me_pm_ops = {
469 	SET_SYSTEM_SLEEP_PM_OPS(mei_me_pci_suspend,
470 				mei_me_pci_resume)
471 	SET_RUNTIME_PM_OPS(
472 		mei_me_pm_runtime_suspend,
473 		mei_me_pm_runtime_resume,
474 		mei_me_pm_runtime_idle)
475 };
476 
477 #define MEI_ME_PM_OPS	(&mei_me_pm_ops)
478 #else
479 #define MEI_ME_PM_OPS	NULL
480 #endif /* CONFIG_PM */
481 /*
482  *  PCI driver structure
483  */
484 static struct pci_driver mei_me_driver = {
485 	.name = KBUILD_MODNAME,
486 	.id_table = mei_me_pci_tbl,
487 	.probe = mei_me_probe,
488 	.remove = mei_me_remove,
489 	.shutdown = mei_me_remove,
490 	.driver.pm = MEI_ME_PM_OPS,
491 };
492 
493 module_pci_driver(mei_me_driver);
494 
495 MODULE_AUTHOR("Intel Corporation");
496 MODULE_DESCRIPTION("Intel(R) Management Engine Interface");
497 MODULE_LICENSE("GPL v2");
498