1 /* 2 * 3 * Intel Management Engine Interface (Intel MEI) Linux driver 4 * Copyright (c) 2003-2012, Intel Corporation. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms and conditions of the GNU General Public License, 8 * version 2, as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 * 15 */ 16 #include <linux/module.h> 17 #include <linux/moduleparam.h> 18 #include <linux/kernel.h> 19 #include <linux/device.h> 20 #include <linux/fs.h> 21 #include <linux/errno.h> 22 #include <linux/types.h> 23 #include <linux/fcntl.h> 24 #include <linux/pci.h> 25 #include <linux/poll.h> 26 #include <linux/ioctl.h> 27 #include <linux/cdev.h> 28 #include <linux/sched.h> 29 #include <linux/uuid.h> 30 #include <linux/compat.h> 31 #include <linux/jiffies.h> 32 #include <linux/interrupt.h> 33 34 #include <linux/pm_domain.h> 35 #include <linux/pm_runtime.h> 36 37 #include <linux/mei.h> 38 39 #include "mei_dev.h" 40 #include "client.h" 41 #include "hw-me-regs.h" 42 #include "hw-me.h" 43 44 /* mei_pci_tbl - PCI Device ID Table */ 45 static const struct pci_device_id mei_me_pci_tbl[] = { 46 {MEI_PCI_DEVICE(MEI_DEV_ID_82946GZ, mei_me_legacy_cfg)}, 47 {MEI_PCI_DEVICE(MEI_DEV_ID_82G35, mei_me_legacy_cfg)}, 48 {MEI_PCI_DEVICE(MEI_DEV_ID_82Q965, mei_me_legacy_cfg)}, 49 {MEI_PCI_DEVICE(MEI_DEV_ID_82G965, mei_me_legacy_cfg)}, 50 {MEI_PCI_DEVICE(MEI_DEV_ID_82GM965, mei_me_legacy_cfg)}, 51 {MEI_PCI_DEVICE(MEI_DEV_ID_82GME965, mei_me_legacy_cfg)}, 52 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82Q35, mei_me_legacy_cfg)}, 53 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82G33, mei_me_legacy_cfg)}, 54 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82Q33, mei_me_legacy_cfg)}, 55 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82X38, mei_me_legacy_cfg)}, 56 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_3200, mei_me_legacy_cfg)}, 57 58 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_6, mei_me_legacy_cfg)}, 59 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_7, mei_me_legacy_cfg)}, 60 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_8, mei_me_legacy_cfg)}, 61 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_9, mei_me_legacy_cfg)}, 62 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_10, mei_me_legacy_cfg)}, 63 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_1, mei_me_legacy_cfg)}, 64 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_2, mei_me_legacy_cfg)}, 65 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_3, mei_me_legacy_cfg)}, 66 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_4, mei_me_legacy_cfg)}, 67 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_1, mei_me_ich_cfg)}, 68 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_2, mei_me_ich_cfg)}, 69 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_3, mei_me_ich_cfg)}, 70 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_4, mei_me_ich_cfg)}, 71 72 {MEI_PCI_DEVICE(MEI_DEV_ID_IBXPK_1, mei_me_pch_cfg)}, 73 {MEI_PCI_DEVICE(MEI_DEV_ID_IBXPK_2, mei_me_pch_cfg)}, 74 {MEI_PCI_DEVICE(MEI_DEV_ID_CPT_1, mei_me_pch_cpt_pbg_cfg)}, 75 {MEI_PCI_DEVICE(MEI_DEV_ID_PBG_1, mei_me_pch_cpt_pbg_cfg)}, 76 {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_1, mei_me_pch_cfg)}, 77 {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_2, mei_me_pch_cfg)}, 78 {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_3, mei_me_pch_cfg)}, 79 {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_H, mei_me_pch8_sps_cfg)}, 80 {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_W, mei_me_pch8_sps_cfg)}, 81 {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_LP, mei_me_pch8_cfg)}, 82 {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_HR, mei_me_pch8_sps_cfg)}, 83 {MEI_PCI_DEVICE(MEI_DEV_ID_WPT_LP, mei_me_pch8_cfg)}, 84 {MEI_PCI_DEVICE(MEI_DEV_ID_WPT_LP_2, mei_me_pch8_cfg)}, 85 86 {MEI_PCI_DEVICE(MEI_DEV_ID_SPT, mei_me_pch8_cfg)}, 87 {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_2, mei_me_pch8_cfg)}, 88 {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H, mei_me_pch8_cfg)}, 89 {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H_2, mei_me_pch8_cfg)}, 90 91 /* required last entry */ 92 {0, } 93 }; 94 95 MODULE_DEVICE_TABLE(pci, mei_me_pci_tbl); 96 97 #ifdef CONFIG_PM 98 static inline void mei_me_set_pm_domain(struct mei_device *dev); 99 static inline void mei_me_unset_pm_domain(struct mei_device *dev); 100 #else 101 static inline void mei_me_set_pm_domain(struct mei_device *dev) {} 102 static inline void mei_me_unset_pm_domain(struct mei_device *dev) {} 103 #endif /* CONFIG_PM */ 104 105 /** 106 * mei_me_quirk_probe - probe for devices that doesn't valid ME interface 107 * 108 * @pdev: PCI device structure 109 * @cfg: per generation config 110 * 111 * Return: true if ME Interface is valid, false otherwise 112 */ 113 static bool mei_me_quirk_probe(struct pci_dev *pdev, 114 const struct mei_cfg *cfg) 115 { 116 if (cfg->quirk_probe && cfg->quirk_probe(pdev)) { 117 dev_info(&pdev->dev, "Device doesn't have valid ME Interface\n"); 118 return false; 119 } 120 121 return true; 122 } 123 124 /** 125 * mei_me_probe - Device Initialization Routine 126 * 127 * @pdev: PCI device structure 128 * @ent: entry in kcs_pci_tbl 129 * 130 * Return: 0 on success, <0 on failure. 131 */ 132 static int mei_me_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 133 { 134 const struct mei_cfg *cfg = (struct mei_cfg *)(ent->driver_data); 135 struct mei_device *dev; 136 struct mei_me_hw *hw; 137 unsigned int irqflags; 138 int err; 139 140 141 if (!mei_me_quirk_probe(pdev, cfg)) 142 return -ENODEV; 143 144 /* enable pci dev */ 145 err = pci_enable_device(pdev); 146 if (err) { 147 dev_err(&pdev->dev, "failed to enable pci device.\n"); 148 goto end; 149 } 150 /* set PCI host mastering */ 151 pci_set_master(pdev); 152 /* pci request regions for mei driver */ 153 err = pci_request_regions(pdev, KBUILD_MODNAME); 154 if (err) { 155 dev_err(&pdev->dev, "failed to get pci regions.\n"); 156 goto disable_device; 157 } 158 159 if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) || 160 dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) { 161 162 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); 163 if (err) 164 err = dma_set_coherent_mask(&pdev->dev, 165 DMA_BIT_MASK(32)); 166 } 167 if (err) { 168 dev_err(&pdev->dev, "No usable DMA configuration, aborting\n"); 169 goto release_regions; 170 } 171 172 173 /* allocates and initializes the mei dev structure */ 174 dev = mei_me_dev_init(pdev, cfg); 175 if (!dev) { 176 err = -ENOMEM; 177 goto release_regions; 178 } 179 hw = to_me_hw(dev); 180 /* mapping IO device memory */ 181 hw->mem_addr = pci_iomap(pdev, 0, 0); 182 if (!hw->mem_addr) { 183 dev_err(&pdev->dev, "mapping I/O device memory failure.\n"); 184 err = -ENOMEM; 185 goto free_device; 186 } 187 pci_enable_msi(pdev); 188 189 /* request and enable interrupt */ 190 irqflags = pci_dev_msi_enabled(pdev) ? IRQF_ONESHOT : IRQF_SHARED; 191 192 err = request_threaded_irq(pdev->irq, 193 mei_me_irq_quick_handler, 194 mei_me_irq_thread_handler, 195 irqflags, KBUILD_MODNAME, dev); 196 if (err) { 197 dev_err(&pdev->dev, "request_threaded_irq failure. irq = %d\n", 198 pdev->irq); 199 goto disable_msi; 200 } 201 202 if (mei_start(dev)) { 203 dev_err(&pdev->dev, "init hw failure.\n"); 204 err = -ENODEV; 205 goto release_irq; 206 } 207 208 pm_runtime_set_autosuspend_delay(&pdev->dev, MEI_ME_RPM_TIMEOUT); 209 pm_runtime_use_autosuspend(&pdev->dev); 210 211 err = mei_register(dev, &pdev->dev); 212 if (err) 213 goto release_irq; 214 215 pci_set_drvdata(pdev, dev); 216 217 schedule_delayed_work(&dev->timer_work, HZ); 218 219 /* 220 * For not wake-able HW runtime pm framework 221 * can't be used on pci device level. 222 * Use domain runtime pm callbacks instead. 223 */ 224 if (!pci_dev_run_wake(pdev)) 225 mei_me_set_pm_domain(dev); 226 227 if (mei_pg_is_enabled(dev)) 228 pm_runtime_put_noidle(&pdev->dev); 229 230 dev_dbg(&pdev->dev, "initialization successful.\n"); 231 232 return 0; 233 234 release_irq: 235 mei_cancel_work(dev); 236 mei_disable_interrupts(dev); 237 free_irq(pdev->irq, dev); 238 disable_msi: 239 pci_disable_msi(pdev); 240 pci_iounmap(pdev, hw->mem_addr); 241 free_device: 242 kfree(dev); 243 release_regions: 244 pci_release_regions(pdev); 245 disable_device: 246 pci_disable_device(pdev); 247 end: 248 dev_err(&pdev->dev, "initialization failed.\n"); 249 return err; 250 } 251 252 /** 253 * mei_me_remove - Device Removal Routine 254 * 255 * @pdev: PCI device structure 256 * 257 * mei_remove is called by the PCI subsystem to alert the driver 258 * that it should release a PCI device. 259 */ 260 static void mei_me_remove(struct pci_dev *pdev) 261 { 262 struct mei_device *dev; 263 struct mei_me_hw *hw; 264 265 dev = pci_get_drvdata(pdev); 266 if (!dev) 267 return; 268 269 if (mei_pg_is_enabled(dev)) 270 pm_runtime_get_noresume(&pdev->dev); 271 272 hw = to_me_hw(dev); 273 274 275 dev_dbg(&pdev->dev, "stop\n"); 276 mei_stop(dev); 277 278 if (!pci_dev_run_wake(pdev)) 279 mei_me_unset_pm_domain(dev); 280 281 /* disable interrupts */ 282 mei_disable_interrupts(dev); 283 284 free_irq(pdev->irq, dev); 285 pci_disable_msi(pdev); 286 287 if (hw->mem_addr) 288 pci_iounmap(pdev, hw->mem_addr); 289 290 mei_deregister(dev); 291 292 kfree(dev); 293 294 pci_release_regions(pdev); 295 pci_disable_device(pdev); 296 297 298 } 299 #ifdef CONFIG_PM_SLEEP 300 static int mei_me_pci_suspend(struct device *device) 301 { 302 struct pci_dev *pdev = to_pci_dev(device); 303 struct mei_device *dev = pci_get_drvdata(pdev); 304 305 if (!dev) 306 return -ENODEV; 307 308 dev_dbg(&pdev->dev, "suspend\n"); 309 310 mei_stop(dev); 311 312 mei_disable_interrupts(dev); 313 314 free_irq(pdev->irq, dev); 315 pci_disable_msi(pdev); 316 317 return 0; 318 } 319 320 static int mei_me_pci_resume(struct device *device) 321 { 322 struct pci_dev *pdev = to_pci_dev(device); 323 struct mei_device *dev; 324 unsigned int irqflags; 325 int err; 326 327 dev = pci_get_drvdata(pdev); 328 if (!dev) 329 return -ENODEV; 330 331 pci_enable_msi(pdev); 332 333 irqflags = pci_dev_msi_enabled(pdev) ? IRQF_ONESHOT : IRQF_SHARED; 334 335 /* request and enable interrupt */ 336 err = request_threaded_irq(pdev->irq, 337 mei_me_irq_quick_handler, 338 mei_me_irq_thread_handler, 339 irqflags, KBUILD_MODNAME, dev); 340 341 if (err) { 342 dev_err(&pdev->dev, "request_threaded_irq failed: irq = %d.\n", 343 pdev->irq); 344 return err; 345 } 346 347 err = mei_restart(dev); 348 if (err) 349 return err; 350 351 /* Start timer if stopped in suspend */ 352 schedule_delayed_work(&dev->timer_work, HZ); 353 354 return 0; 355 } 356 #endif /* CONFIG_PM_SLEEP */ 357 358 #ifdef CONFIG_PM 359 static int mei_me_pm_runtime_idle(struct device *device) 360 { 361 struct pci_dev *pdev = to_pci_dev(device); 362 struct mei_device *dev; 363 364 dev_dbg(&pdev->dev, "rpm: me: runtime_idle\n"); 365 366 dev = pci_get_drvdata(pdev); 367 if (!dev) 368 return -ENODEV; 369 if (mei_write_is_idle(dev)) 370 pm_runtime_autosuspend(device); 371 372 return -EBUSY; 373 } 374 375 static int mei_me_pm_runtime_suspend(struct device *device) 376 { 377 struct pci_dev *pdev = to_pci_dev(device); 378 struct mei_device *dev; 379 int ret; 380 381 dev_dbg(&pdev->dev, "rpm: me: runtime suspend\n"); 382 383 dev = pci_get_drvdata(pdev); 384 if (!dev) 385 return -ENODEV; 386 387 mutex_lock(&dev->device_lock); 388 389 if (mei_write_is_idle(dev)) 390 ret = mei_me_pg_enter_sync(dev); 391 else 392 ret = -EAGAIN; 393 394 mutex_unlock(&dev->device_lock); 395 396 dev_dbg(&pdev->dev, "rpm: me: runtime suspend ret=%d\n", ret); 397 398 return ret; 399 } 400 401 static int mei_me_pm_runtime_resume(struct device *device) 402 { 403 struct pci_dev *pdev = to_pci_dev(device); 404 struct mei_device *dev; 405 int ret; 406 407 dev_dbg(&pdev->dev, "rpm: me: runtime resume\n"); 408 409 dev = pci_get_drvdata(pdev); 410 if (!dev) 411 return -ENODEV; 412 413 mutex_lock(&dev->device_lock); 414 415 ret = mei_me_pg_exit_sync(dev); 416 417 mutex_unlock(&dev->device_lock); 418 419 dev_dbg(&pdev->dev, "rpm: me: runtime resume ret = %d\n", ret); 420 421 return ret; 422 } 423 424 /** 425 * mei_me_set_pm_domain - fill and set pm domain structure for device 426 * 427 * @dev: mei_device 428 */ 429 static inline void mei_me_set_pm_domain(struct mei_device *dev) 430 { 431 struct pci_dev *pdev = to_pci_dev(dev->dev); 432 433 if (pdev->dev.bus && pdev->dev.bus->pm) { 434 dev->pg_domain.ops = *pdev->dev.bus->pm; 435 436 dev->pg_domain.ops.runtime_suspend = mei_me_pm_runtime_suspend; 437 dev->pg_domain.ops.runtime_resume = mei_me_pm_runtime_resume; 438 dev->pg_domain.ops.runtime_idle = mei_me_pm_runtime_idle; 439 440 dev_pm_domain_set(&pdev->dev, &dev->pg_domain); 441 } 442 } 443 444 /** 445 * mei_me_unset_pm_domain - clean pm domain structure for device 446 * 447 * @dev: mei_device 448 */ 449 static inline void mei_me_unset_pm_domain(struct mei_device *dev) 450 { 451 /* stop using pm callbacks if any */ 452 dev_pm_domain_set(dev->dev, NULL); 453 } 454 455 static const struct dev_pm_ops mei_me_pm_ops = { 456 SET_SYSTEM_SLEEP_PM_OPS(mei_me_pci_suspend, 457 mei_me_pci_resume) 458 SET_RUNTIME_PM_OPS( 459 mei_me_pm_runtime_suspend, 460 mei_me_pm_runtime_resume, 461 mei_me_pm_runtime_idle) 462 }; 463 464 #define MEI_ME_PM_OPS (&mei_me_pm_ops) 465 #else 466 #define MEI_ME_PM_OPS NULL 467 #endif /* CONFIG_PM */ 468 /* 469 * PCI driver structure 470 */ 471 static struct pci_driver mei_me_driver = { 472 .name = KBUILD_MODNAME, 473 .id_table = mei_me_pci_tbl, 474 .probe = mei_me_probe, 475 .remove = mei_me_remove, 476 .shutdown = mei_me_remove, 477 .driver.pm = MEI_ME_PM_OPS, 478 }; 479 480 module_pci_driver(mei_me_driver); 481 482 MODULE_AUTHOR("Intel Corporation"); 483 MODULE_DESCRIPTION("Intel(R) Management Engine Interface"); 484 MODULE_LICENSE("GPL v2"); 485