1 /* 2 * 3 * Intel Management Engine Interface (Intel MEI) Linux driver 4 * Copyright (c) 2003-2012, Intel Corporation. 5 * 6 * This program is free software; you can redistribute it and/or modify it 7 * under the terms and conditions of the GNU General Public License, 8 * version 2, as published by the Free Software Foundation. 9 * 10 * This program is distributed in the hope it will be useful, but WITHOUT 11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 13 * more details. 14 * 15 */ 16 #include <linux/module.h> 17 #include <linux/moduleparam.h> 18 #include <linux/kernel.h> 19 #include <linux/device.h> 20 #include <linux/fs.h> 21 #include <linux/errno.h> 22 #include <linux/types.h> 23 #include <linux/fcntl.h> 24 #include <linux/pci.h> 25 #include <linux/poll.h> 26 #include <linux/ioctl.h> 27 #include <linux/cdev.h> 28 #include <linux/sched.h> 29 #include <linux/uuid.h> 30 #include <linux/compat.h> 31 #include <linux/jiffies.h> 32 #include <linux/interrupt.h> 33 34 #include <linux/pm_domain.h> 35 #include <linux/pm_runtime.h> 36 37 #include <linux/mei.h> 38 39 #include "mei_dev.h" 40 #include "client.h" 41 #include "hw-me-regs.h" 42 #include "hw-me.h" 43 44 /* mei_pci_tbl - PCI Device ID Table */ 45 static const struct pci_device_id mei_me_pci_tbl[] = { 46 {MEI_PCI_DEVICE(MEI_DEV_ID_82946GZ, mei_me_legacy_cfg)}, 47 {MEI_PCI_DEVICE(MEI_DEV_ID_82G35, mei_me_legacy_cfg)}, 48 {MEI_PCI_DEVICE(MEI_DEV_ID_82Q965, mei_me_legacy_cfg)}, 49 {MEI_PCI_DEVICE(MEI_DEV_ID_82G965, mei_me_legacy_cfg)}, 50 {MEI_PCI_DEVICE(MEI_DEV_ID_82GM965, mei_me_legacy_cfg)}, 51 {MEI_PCI_DEVICE(MEI_DEV_ID_82GME965, mei_me_legacy_cfg)}, 52 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82Q35, mei_me_legacy_cfg)}, 53 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82G33, mei_me_legacy_cfg)}, 54 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82Q33, mei_me_legacy_cfg)}, 55 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82X38, mei_me_legacy_cfg)}, 56 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_3200, mei_me_legacy_cfg)}, 57 58 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_6, mei_me_legacy_cfg)}, 59 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_7, mei_me_legacy_cfg)}, 60 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_8, mei_me_legacy_cfg)}, 61 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_9, mei_me_legacy_cfg)}, 62 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_10, mei_me_legacy_cfg)}, 63 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_1, mei_me_legacy_cfg)}, 64 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_2, mei_me_legacy_cfg)}, 65 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_3, mei_me_legacy_cfg)}, 66 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_4, mei_me_legacy_cfg)}, 67 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_1, mei_me_ich_cfg)}, 68 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_2, mei_me_ich_cfg)}, 69 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_3, mei_me_ich_cfg)}, 70 {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_4, mei_me_ich_cfg)}, 71 72 {MEI_PCI_DEVICE(MEI_DEV_ID_IBXPK_1, mei_me_pch_cfg)}, 73 {MEI_PCI_DEVICE(MEI_DEV_ID_IBXPK_2, mei_me_pch_cfg)}, 74 {MEI_PCI_DEVICE(MEI_DEV_ID_CPT_1, mei_me_pch_cpt_pbg_cfg)}, 75 {MEI_PCI_DEVICE(MEI_DEV_ID_PBG_1, mei_me_pch_cpt_pbg_cfg)}, 76 {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_1, mei_me_pch_cfg)}, 77 {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_2, mei_me_pch_cfg)}, 78 {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_3, mei_me_pch_cfg)}, 79 {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_H, mei_me_pch8_sps_cfg)}, 80 {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_W, mei_me_pch8_sps_cfg)}, 81 {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_LP, mei_me_pch8_cfg)}, 82 {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_HR, mei_me_pch8_sps_cfg)}, 83 {MEI_PCI_DEVICE(MEI_DEV_ID_WPT_LP, mei_me_pch8_cfg)}, 84 {MEI_PCI_DEVICE(MEI_DEV_ID_WPT_LP_2, mei_me_pch8_cfg)}, 85 86 {MEI_PCI_DEVICE(MEI_DEV_ID_SPT, mei_me_pch8_cfg)}, 87 {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_2, mei_me_pch8_cfg)}, 88 {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H, mei_me_pch8_sps_cfg)}, 89 {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H_2, mei_me_pch8_sps_cfg)}, 90 91 {MEI_PCI_DEVICE(MEI_DEV_ID_BXT_M, mei_me_pch8_cfg)}, 92 {MEI_PCI_DEVICE(MEI_DEV_ID_APL_I, mei_me_pch8_cfg)}, 93 94 {MEI_PCI_DEVICE(MEI_DEV_ID_KBP, mei_me_pch8_cfg)}, 95 {MEI_PCI_DEVICE(MEI_DEV_ID_KBP_2, mei_me_pch8_cfg)}, 96 97 /* required last entry */ 98 {0, } 99 }; 100 101 MODULE_DEVICE_TABLE(pci, mei_me_pci_tbl); 102 103 #ifdef CONFIG_PM 104 static inline void mei_me_set_pm_domain(struct mei_device *dev); 105 static inline void mei_me_unset_pm_domain(struct mei_device *dev); 106 #else 107 static inline void mei_me_set_pm_domain(struct mei_device *dev) {} 108 static inline void mei_me_unset_pm_domain(struct mei_device *dev) {} 109 #endif /* CONFIG_PM */ 110 111 /** 112 * mei_me_quirk_probe - probe for devices that doesn't valid ME interface 113 * 114 * @pdev: PCI device structure 115 * @cfg: per generation config 116 * 117 * Return: true if ME Interface is valid, false otherwise 118 */ 119 static bool mei_me_quirk_probe(struct pci_dev *pdev, 120 const struct mei_cfg *cfg) 121 { 122 if (cfg->quirk_probe && cfg->quirk_probe(pdev)) { 123 dev_info(&pdev->dev, "Device doesn't have valid ME Interface\n"); 124 return false; 125 } 126 127 return true; 128 } 129 130 /** 131 * mei_me_probe - Device Initialization Routine 132 * 133 * @pdev: PCI device structure 134 * @ent: entry in kcs_pci_tbl 135 * 136 * Return: 0 on success, <0 on failure. 137 */ 138 static int mei_me_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 139 { 140 const struct mei_cfg *cfg = (struct mei_cfg *)(ent->driver_data); 141 struct mei_device *dev; 142 struct mei_me_hw *hw; 143 unsigned int irqflags; 144 int err; 145 146 147 if (!mei_me_quirk_probe(pdev, cfg)) 148 return -ENODEV; 149 150 /* enable pci dev */ 151 err = pci_enable_device(pdev); 152 if (err) { 153 dev_err(&pdev->dev, "failed to enable pci device.\n"); 154 goto end; 155 } 156 /* set PCI host mastering */ 157 pci_set_master(pdev); 158 /* pci request regions for mei driver */ 159 err = pci_request_regions(pdev, KBUILD_MODNAME); 160 if (err) { 161 dev_err(&pdev->dev, "failed to get pci regions.\n"); 162 goto disable_device; 163 } 164 165 if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) || 166 dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) { 167 168 err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); 169 if (err) 170 err = dma_set_coherent_mask(&pdev->dev, 171 DMA_BIT_MASK(32)); 172 } 173 if (err) { 174 dev_err(&pdev->dev, "No usable DMA configuration, aborting\n"); 175 goto release_regions; 176 } 177 178 179 /* allocates and initializes the mei dev structure */ 180 dev = mei_me_dev_init(pdev, cfg); 181 if (!dev) { 182 err = -ENOMEM; 183 goto release_regions; 184 } 185 hw = to_me_hw(dev); 186 /* mapping IO device memory */ 187 hw->mem_addr = pci_iomap(pdev, 0, 0); 188 if (!hw->mem_addr) { 189 dev_err(&pdev->dev, "mapping I/O device memory failure.\n"); 190 err = -ENOMEM; 191 goto free_device; 192 } 193 pci_enable_msi(pdev); 194 195 /* request and enable interrupt */ 196 irqflags = pci_dev_msi_enabled(pdev) ? IRQF_ONESHOT : IRQF_SHARED; 197 198 err = request_threaded_irq(pdev->irq, 199 mei_me_irq_quick_handler, 200 mei_me_irq_thread_handler, 201 irqflags, KBUILD_MODNAME, dev); 202 if (err) { 203 dev_err(&pdev->dev, "request_threaded_irq failure. irq = %d\n", 204 pdev->irq); 205 goto disable_msi; 206 } 207 208 if (mei_start(dev)) { 209 dev_err(&pdev->dev, "init hw failure.\n"); 210 err = -ENODEV; 211 goto release_irq; 212 } 213 214 pm_runtime_set_autosuspend_delay(&pdev->dev, MEI_ME_RPM_TIMEOUT); 215 pm_runtime_use_autosuspend(&pdev->dev); 216 217 err = mei_register(dev, &pdev->dev); 218 if (err) 219 goto stop; 220 221 pci_set_drvdata(pdev, dev); 222 223 /* 224 * For not wake-able HW runtime pm framework 225 * can't be used on pci device level. 226 * Use domain runtime pm callbacks instead. 227 */ 228 if (!pci_dev_run_wake(pdev)) 229 mei_me_set_pm_domain(dev); 230 231 if (mei_pg_is_enabled(dev)) 232 pm_runtime_put_noidle(&pdev->dev); 233 234 dev_dbg(&pdev->dev, "initialization successful.\n"); 235 236 return 0; 237 238 stop: 239 mei_stop(dev); 240 release_irq: 241 mei_cancel_work(dev); 242 mei_disable_interrupts(dev); 243 free_irq(pdev->irq, dev); 244 disable_msi: 245 pci_disable_msi(pdev); 246 pci_iounmap(pdev, hw->mem_addr); 247 free_device: 248 kfree(dev); 249 release_regions: 250 pci_release_regions(pdev); 251 disable_device: 252 pci_disable_device(pdev); 253 end: 254 dev_err(&pdev->dev, "initialization failed.\n"); 255 return err; 256 } 257 258 /** 259 * mei_me_remove - Device Removal Routine 260 * 261 * @pdev: PCI device structure 262 * 263 * mei_remove is called by the PCI subsystem to alert the driver 264 * that it should release a PCI device. 265 */ 266 static void mei_me_remove(struct pci_dev *pdev) 267 { 268 struct mei_device *dev; 269 struct mei_me_hw *hw; 270 271 dev = pci_get_drvdata(pdev); 272 if (!dev) 273 return; 274 275 if (mei_pg_is_enabled(dev)) 276 pm_runtime_get_noresume(&pdev->dev); 277 278 hw = to_me_hw(dev); 279 280 281 dev_dbg(&pdev->dev, "stop\n"); 282 mei_stop(dev); 283 284 if (!pci_dev_run_wake(pdev)) 285 mei_me_unset_pm_domain(dev); 286 287 /* disable interrupts */ 288 mei_disable_interrupts(dev); 289 290 free_irq(pdev->irq, dev); 291 pci_disable_msi(pdev); 292 293 if (hw->mem_addr) 294 pci_iounmap(pdev, hw->mem_addr); 295 296 mei_deregister(dev); 297 298 kfree(dev); 299 300 pci_release_regions(pdev); 301 pci_disable_device(pdev); 302 303 304 } 305 #ifdef CONFIG_PM_SLEEP 306 static int mei_me_pci_suspend(struct device *device) 307 { 308 struct pci_dev *pdev = to_pci_dev(device); 309 struct mei_device *dev = pci_get_drvdata(pdev); 310 311 if (!dev) 312 return -ENODEV; 313 314 dev_dbg(&pdev->dev, "suspend\n"); 315 316 mei_stop(dev); 317 318 mei_disable_interrupts(dev); 319 320 free_irq(pdev->irq, dev); 321 pci_disable_msi(pdev); 322 323 return 0; 324 } 325 326 static int mei_me_pci_resume(struct device *device) 327 { 328 struct pci_dev *pdev = to_pci_dev(device); 329 struct mei_device *dev; 330 unsigned int irqflags; 331 int err; 332 333 dev = pci_get_drvdata(pdev); 334 if (!dev) 335 return -ENODEV; 336 337 pci_enable_msi(pdev); 338 339 irqflags = pci_dev_msi_enabled(pdev) ? IRQF_ONESHOT : IRQF_SHARED; 340 341 /* request and enable interrupt */ 342 err = request_threaded_irq(pdev->irq, 343 mei_me_irq_quick_handler, 344 mei_me_irq_thread_handler, 345 irqflags, KBUILD_MODNAME, dev); 346 347 if (err) { 348 dev_err(&pdev->dev, "request_threaded_irq failed: irq = %d.\n", 349 pdev->irq); 350 return err; 351 } 352 353 err = mei_restart(dev); 354 if (err) 355 return err; 356 357 /* Start timer if stopped in suspend */ 358 schedule_delayed_work(&dev->timer_work, HZ); 359 360 return 0; 361 } 362 #endif /* CONFIG_PM_SLEEP */ 363 364 #ifdef CONFIG_PM 365 static int mei_me_pm_runtime_idle(struct device *device) 366 { 367 struct pci_dev *pdev = to_pci_dev(device); 368 struct mei_device *dev; 369 370 dev_dbg(&pdev->dev, "rpm: me: runtime_idle\n"); 371 372 dev = pci_get_drvdata(pdev); 373 if (!dev) 374 return -ENODEV; 375 if (mei_write_is_idle(dev)) 376 pm_runtime_autosuspend(device); 377 378 return -EBUSY; 379 } 380 381 static int mei_me_pm_runtime_suspend(struct device *device) 382 { 383 struct pci_dev *pdev = to_pci_dev(device); 384 struct mei_device *dev; 385 int ret; 386 387 dev_dbg(&pdev->dev, "rpm: me: runtime suspend\n"); 388 389 dev = pci_get_drvdata(pdev); 390 if (!dev) 391 return -ENODEV; 392 393 mutex_lock(&dev->device_lock); 394 395 if (mei_write_is_idle(dev)) 396 ret = mei_me_pg_enter_sync(dev); 397 else 398 ret = -EAGAIN; 399 400 mutex_unlock(&dev->device_lock); 401 402 dev_dbg(&pdev->dev, "rpm: me: runtime suspend ret=%d\n", ret); 403 404 if (ret && ret != -EAGAIN) 405 schedule_work(&dev->reset_work); 406 407 return ret; 408 } 409 410 static int mei_me_pm_runtime_resume(struct device *device) 411 { 412 struct pci_dev *pdev = to_pci_dev(device); 413 struct mei_device *dev; 414 int ret; 415 416 dev_dbg(&pdev->dev, "rpm: me: runtime resume\n"); 417 418 dev = pci_get_drvdata(pdev); 419 if (!dev) 420 return -ENODEV; 421 422 mutex_lock(&dev->device_lock); 423 424 ret = mei_me_pg_exit_sync(dev); 425 426 mutex_unlock(&dev->device_lock); 427 428 dev_dbg(&pdev->dev, "rpm: me: runtime resume ret = %d\n", ret); 429 430 if (ret) 431 schedule_work(&dev->reset_work); 432 433 return ret; 434 } 435 436 /** 437 * mei_me_set_pm_domain - fill and set pm domain structure for device 438 * 439 * @dev: mei_device 440 */ 441 static inline void mei_me_set_pm_domain(struct mei_device *dev) 442 { 443 struct pci_dev *pdev = to_pci_dev(dev->dev); 444 445 if (pdev->dev.bus && pdev->dev.bus->pm) { 446 dev->pg_domain.ops = *pdev->dev.bus->pm; 447 448 dev->pg_domain.ops.runtime_suspend = mei_me_pm_runtime_suspend; 449 dev->pg_domain.ops.runtime_resume = mei_me_pm_runtime_resume; 450 dev->pg_domain.ops.runtime_idle = mei_me_pm_runtime_idle; 451 452 dev_pm_domain_set(&pdev->dev, &dev->pg_domain); 453 } 454 } 455 456 /** 457 * mei_me_unset_pm_domain - clean pm domain structure for device 458 * 459 * @dev: mei_device 460 */ 461 static inline void mei_me_unset_pm_domain(struct mei_device *dev) 462 { 463 /* stop using pm callbacks if any */ 464 dev_pm_domain_set(dev->dev, NULL); 465 } 466 467 static const struct dev_pm_ops mei_me_pm_ops = { 468 SET_SYSTEM_SLEEP_PM_OPS(mei_me_pci_suspend, 469 mei_me_pci_resume) 470 SET_RUNTIME_PM_OPS( 471 mei_me_pm_runtime_suspend, 472 mei_me_pm_runtime_resume, 473 mei_me_pm_runtime_idle) 474 }; 475 476 #define MEI_ME_PM_OPS (&mei_me_pm_ops) 477 #else 478 #define MEI_ME_PM_OPS NULL 479 #endif /* CONFIG_PM */ 480 /* 481 * PCI driver structure 482 */ 483 static struct pci_driver mei_me_driver = { 484 .name = KBUILD_MODNAME, 485 .id_table = mei_me_pci_tbl, 486 .probe = mei_me_probe, 487 .remove = mei_me_remove, 488 .shutdown = mei_me_remove, 489 .driver.pm = MEI_ME_PM_OPS, 490 }; 491 492 module_pci_driver(mei_me_driver); 493 494 MODULE_AUTHOR("Intel Corporation"); 495 MODULE_DESCRIPTION("Intel(R) Management Engine Interface"); 496 MODULE_LICENSE("GPL v2"); 497