19fff0425STomas Winkler // SPDX-License-Identifier: GPL-2.0 22703d4b2STomas Winkler /* 395953618SAlexander Usyskin * Copyright (c) 2003-2022, Intel Corporation. All rights reserved. 42703d4b2STomas Winkler * Intel Management Engine Interface (Intel MEI) Linux driver 52703d4b2STomas Winkler */ 69fff0425STomas Winkler 72703d4b2STomas Winkler #include <linux/module.h> 82703d4b2STomas Winkler #include <linux/kernel.h> 92703d4b2STomas Winkler #include <linux/device.h> 102703d4b2STomas Winkler #include <linux/errno.h> 112703d4b2STomas Winkler #include <linux/types.h> 122703d4b2STomas Winkler #include <linux/pci.h> 13515a2f50SChristophe JAILLET #include <linux/dma-mapping.h> 142703d4b2STomas Winkler #include <linux/sched.h> 152703d4b2STomas Winkler #include <linux/interrupt.h> 162703d4b2STomas Winkler 17989561deSTomeu Vizoso #include <linux/pm_domain.h> 18180ea05bSTomas Winkler #include <linux/pm_runtime.h> 19180ea05bSTomas Winkler 202703d4b2STomas Winkler #include <linux/mei.h> 212703d4b2STomas Winkler 222703d4b2STomas Winkler #include "mei_dev.h" 232703d4b2STomas Winkler #include "client.h" 246e4cd27aSTomas Winkler #include "hw-me-regs.h" 256e4cd27aSTomas Winkler #include "hw-me.h" 262703d4b2STomas Winkler 272703d4b2STomas Winkler /* mei_pci_tbl - PCI Device ID Table */ 28a05f8f86STomas Winkler static const struct pci_device_id mei_me_pci_tbl[] = { 29f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_82946GZ, MEI_ME_ICH_CFG)}, 30f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_82G35, MEI_ME_ICH_CFG)}, 31f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_82Q965, MEI_ME_ICH_CFG)}, 32f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_82G965, MEI_ME_ICH_CFG)}, 33f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_82GM965, MEI_ME_ICH_CFG)}, 34f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_82GME965, MEI_ME_ICH_CFG)}, 35f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82Q35, MEI_ME_ICH_CFG)}, 36f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82G33, MEI_ME_ICH_CFG)}, 37f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82Q33, MEI_ME_ICH_CFG)}, 38f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82X38, MEI_ME_ICH_CFG)}, 39f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_3200, MEI_ME_ICH_CFG)}, 408d929d48SAlexander Usyskin 41f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_6, MEI_ME_ICH_CFG)}, 42f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_7, MEI_ME_ICH_CFG)}, 43f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_8, MEI_ME_ICH_CFG)}, 44f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_9, MEI_ME_ICH_CFG)}, 45f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_10, MEI_ME_ICH_CFG)}, 46f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_1, MEI_ME_ICH_CFG)}, 47f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_2, MEI_ME_ICH_CFG)}, 48f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_3, MEI_ME_ICH_CFG)}, 49f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_4, MEI_ME_ICH_CFG)}, 508d929d48SAlexander Usyskin 51f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_1, MEI_ME_ICH10_CFG)}, 52f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_2, MEI_ME_ICH10_CFG)}, 53f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_3, MEI_ME_ICH10_CFG)}, 54f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_4, MEI_ME_ICH10_CFG)}, 552703d4b2STomas Winkler 56f8204f0dSAlexander Usyskin {MEI_PCI_DEVICE(MEI_DEV_ID_IBXPK_1, MEI_ME_PCH6_CFG)}, 57f8204f0dSAlexander Usyskin {MEI_PCI_DEVICE(MEI_DEV_ID_IBXPK_2, MEI_ME_PCH6_CFG)}, 58f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_CPT_1, MEI_ME_PCH_CPT_PBG_CFG)}, 59f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_PBG_1, MEI_ME_PCH_CPT_PBG_CFG)}, 60f8204f0dSAlexander Usyskin {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_1, MEI_ME_PCH7_CFG)}, 61f8204f0dSAlexander Usyskin {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_2, MEI_ME_PCH7_CFG)}, 62f8204f0dSAlexander Usyskin {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_3, MEI_ME_PCH7_CFG)}, 63f76d77f5STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_H, MEI_ME_PCH8_SPS_4_CFG)}, 64f76d77f5STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_W, MEI_ME_PCH8_SPS_4_CFG)}, 65f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_LP, MEI_ME_PCH8_CFG)}, 66f76d77f5STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_HR, MEI_ME_PCH8_SPS_4_CFG)}, 67f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_WPT_LP, MEI_ME_PCH8_CFG)}, 68f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_WPT_LP_2, MEI_ME_PCH8_CFG)}, 691625c7ecSTomas Winkler 70f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_SPT, MEI_ME_PCH8_CFG)}, 71f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_2, MEI_ME_PCH8_CFG)}, 722f79d3d1SAlexander Usyskin {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_3, MEI_ME_PCH8_ITOUCH_CFG)}, 73f76d77f5STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H, MEI_ME_PCH8_SPS_4_CFG)}, 74f76d77f5STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H_2, MEI_ME_PCH8_SPS_4_CFG)}, 75f76d77f5STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_LBG, MEI_ME_PCH12_SPS_4_CFG)}, 76dd16f6cdSTomas Winkler 77f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_BXT_M, MEI_ME_PCH8_CFG)}, 78f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_APL_I, MEI_ME_PCH8_CFG)}, 79f5ac3c49STomas Winkler 80f7ee8eadSTomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_DNV_IE, MEI_ME_PCH8_CFG)}, 81f7ee8eadSTomas Winkler 82688cb678STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_GLK, MEI_ME_PCH8_CFG)}, 83688cb678STomas Winkler 84f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_KBP, MEI_ME_PCH8_CFG)}, 85f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_KBP_2, MEI_ME_PCH8_CFG)}, 864afc339eSTomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_KBP_3, MEI_ME_PCH8_CFG)}, 87ac182e8aSAlexander Usyskin 881dbfe7f2SAlexander Usyskin {MEI_PCI_DEVICE(MEI_DEV_ID_CNP_LP, MEI_ME_PCH12_CFG)}, 892f79d3d1SAlexander Usyskin {MEI_PCI_DEVICE(MEI_DEV_ID_CNP_LP_3, MEI_ME_PCH8_ITOUCH_CFG)}, 90f76d77f5STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_CNP_H, MEI_ME_PCH12_SPS_CFG)}, 912f79d3d1SAlexander Usyskin {MEI_PCI_DEVICE(MEI_DEV_ID_CNP_H_3, MEI_ME_PCH12_SPS_ITOUCH_CFG)}, 92f8f4aa68SAlexander Usyskin 934d86dfd3STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_CMP_LP, MEI_ME_PCH12_CFG)}, 942f79d3d1SAlexander Usyskin {MEI_PCI_DEVICE(MEI_DEV_ID_CMP_LP_3, MEI_ME_PCH8_ITOUCH_CFG)}, 9582b29b9fSAlexander Usyskin {MEI_PCI_DEVICE(MEI_DEV_ID_CMP_V, MEI_ME_PCH12_CFG)}, 96559e575aSTomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_CMP_H, MEI_ME_PCH12_CFG)}, 972f79d3d1SAlexander Usyskin {MEI_PCI_DEVICE(MEI_DEV_ID_CMP_H_3, MEI_ME_PCH8_ITOUCH_CFG)}, 984d86dfd3STomas Winkler 99efe814e9STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_ICP_LP, MEI_ME_PCH12_CFG)}, 10075c10c5eSAndy Shevchenko {MEI_PCI_DEVICE(MEI_DEV_ID_ICP_N, MEI_ME_PCH12_CFG)}, 101efe814e9STomas Winkler 10252f6efdfSAlexander Usyskin {MEI_PCI_DEVICE(MEI_DEV_ID_TGP_LP, MEI_ME_PCH15_CFG)}, 1038c289ea0SAlexander Usyskin {MEI_PCI_DEVICE(MEI_DEV_ID_TGP_H, MEI_ME_PCH15_SPS_CFG)}, 104587f1740STomas Winkler 1050db4a15dSTomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_JSP_N, MEI_ME_PCH15_CFG)}, 1060db4a15dSTomas Winkler 10752f6efdfSAlexander Usyskin {MEI_PCI_DEVICE(MEI_DEV_ID_MCC, MEI_ME_PCH15_CFG)}, 1081be8624aSAlexander Usyskin {MEI_PCI_DEVICE(MEI_DEV_ID_MCC_4, MEI_ME_PCH8_CFG)}, 1091be8624aSAlexander Usyskin 11099397d33SAlexander Usyskin {MEI_PCI_DEVICE(MEI_DEV_ID_CDF, MEI_ME_PCH8_CFG)}, 11199397d33SAlexander Usyskin 112372726cbSTomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_EBG, MEI_ME_PCH15_SPS_CFG)}, 113372726cbSTomas Winkler 114f7545efaSAlexander Usyskin {MEI_PCI_DEVICE(MEI_DEV_ID_ADP_S, MEI_ME_PCH15_CFG)}, 115930c922aSAlexander Usyskin {MEI_PCI_DEVICE(MEI_DEV_ID_ADP_LP, MEI_ME_PCH15_CFG)}, 1160df74278STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_ADP_P, MEI_ME_PCH15_CFG)}, 1177bbbd084SAlexander Usyskin {MEI_PCI_DEVICE(MEI_DEV_ID_ADP_N, MEI_ME_PCH15_CFG)}, 118f7545efaSAlexander Usyskin 1192a19c2a5SAlexander Usyskin {MEI_PCI_DEVICE(MEI_DEV_ID_RPL_S, MEI_ME_PCH15_SPS_CFG)}, 1203ed8c7d3SAlexander Usyskin 1210c4d6826SAlexander Usyskin {MEI_PCI_DEVICE(MEI_DEV_ID_MTL_M, MEI_ME_PCH15_CFG)}, 122e86a87a4SAlexander Usyskin {MEI_PCI_DEVICE(MEI_DEV_ID_ARL_S, MEI_ME_PCH15_CFG)}, 12368b98893SAlexander Usyskin {MEI_PCI_DEVICE(MEI_DEV_ID_ARL_H, MEI_ME_PCH15_CFG)}, 1240c4d6826SAlexander Usyskin 125636a47adSAlexander Usyskin {MEI_PCI_DEVICE(MEI_DEV_ID_LNL_M, MEI_ME_PCH15_CFG)}, 126636a47adSAlexander Usyskin 1272703d4b2STomas Winkler /* required last entry */ 1282703d4b2STomas Winkler {0, } 1292703d4b2STomas Winkler }; 1302703d4b2STomas Winkler 131b68301e9STomas Winkler MODULE_DEVICE_TABLE(pci, mei_me_pci_tbl); 1322703d4b2STomas Winkler 133bbd6d050SRafael J. Wysocki #ifdef CONFIG_PM 134e13fa90cSTomas Winkler static inline void mei_me_set_pm_domain(struct mei_device *dev); 135e13fa90cSTomas Winkler static inline void mei_me_unset_pm_domain(struct mei_device *dev); 136e13fa90cSTomas Winkler #else 137e13fa90cSTomas Winkler static inline void mei_me_set_pm_domain(struct mei_device *dev) {} 138e13fa90cSTomas Winkler static inline void mei_me_unset_pm_domain(struct mei_device *dev) {} 139bbd6d050SRafael J. Wysocki #endif /* CONFIG_PM */ 140e13fa90cSTomas Winkler 141261e071aSTomas Winkler static int mei_me_read_fws(const struct mei_device *dev, int where, u32 *val) 142261e071aSTomas Winkler { 143261e071aSTomas Winkler struct pci_dev *pdev = to_pci_dev(dev->dev); 144261e071aSTomas Winkler 145261e071aSTomas Winkler return pci_read_config_dword(pdev, where, val); 146261e071aSTomas Winkler } 147261e071aSTomas Winkler 1482703d4b2STomas Winkler /** 149ce23139cSAlexander Usyskin * mei_me_quirk_probe - probe for devices that doesn't valid ME interface 150393b148fSMasanari Iida * 1512703d4b2STomas Winkler * @pdev: PCI device structure 152c919951dSTomas Winkler * @cfg: per generation config 1532703d4b2STomas Winkler * 154a8605ea2SAlexander Usyskin * Return: true if ME Interface is valid, false otherwise 1552703d4b2STomas Winkler */ 156b68301e9STomas Winkler static bool mei_me_quirk_probe(struct pci_dev *pdev, 157c919951dSTomas Winkler const struct mei_cfg *cfg) 1582703d4b2STomas Winkler { 159c919951dSTomas Winkler if (cfg->quirk_probe && cfg->quirk_probe(pdev)) { 1602703d4b2STomas Winkler dev_info(&pdev->dev, "Device doesn't have valid ME Interface\n"); 1612703d4b2STomas Winkler return false; 1622703d4b2STomas Winkler } 163c919951dSTomas Winkler 164c919951dSTomas Winkler return true; 165c919951dSTomas Winkler } 166c919951dSTomas Winkler 1672703d4b2STomas Winkler /** 168ce23139cSAlexander Usyskin * mei_me_probe - Device Initialization Routine 1692703d4b2STomas Winkler * 1702703d4b2STomas Winkler * @pdev: PCI device structure 1712703d4b2STomas Winkler * @ent: entry in kcs_pci_tbl 1722703d4b2STomas Winkler * 173a8605ea2SAlexander Usyskin * Return: 0 on success, <0 on failure. 1742703d4b2STomas Winkler */ 175b68301e9STomas Winkler static int mei_me_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 1762703d4b2STomas Winkler { 177f5ac3c49STomas Winkler const struct mei_cfg *cfg; 1782703d4b2STomas Winkler struct mei_device *dev; 17952c34561STomas Winkler struct mei_me_hw *hw; 1801fa55b4eSAlexander Usyskin unsigned int irqflags; 1812703d4b2STomas Winkler int err; 1822703d4b2STomas Winkler 183f5ac3c49STomas Winkler cfg = mei_me_get_cfg(ent->driver_data); 184f5ac3c49STomas Winkler if (!cfg) 185f5ac3c49STomas Winkler return -ENODEV; 1862703d4b2STomas Winkler 187c919951dSTomas Winkler if (!mei_me_quirk_probe(pdev, cfg)) 188c919951dSTomas Winkler return -ENODEV; 1892703d4b2STomas Winkler 1902703d4b2STomas Winkler /* enable pci dev */ 191f8a09605STomas Winkler err = pcim_enable_device(pdev); 1922703d4b2STomas Winkler if (err) { 1932703d4b2STomas Winkler dev_err(&pdev->dev, "failed to enable pci device.\n"); 1942703d4b2STomas Winkler goto end; 1952703d4b2STomas Winkler } 1962703d4b2STomas Winkler /* set PCI host mastering */ 1972703d4b2STomas Winkler pci_set_master(pdev); 198f8a09605STomas Winkler /* pci request regions and mapping IO device memory for mei driver */ 199f8a09605STomas Winkler err = pcim_iomap_regions(pdev, BIT(0), KBUILD_MODNAME); 2002703d4b2STomas Winkler if (err) { 2012703d4b2STomas Winkler dev_err(&pdev->dev, "failed to get pci regions.\n"); 202f8a09605STomas Winkler goto end; 2032703d4b2STomas Winkler } 2043ecfb168STomas Winkler 205515a2f50SChristophe JAILLET err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(64)); 2063ecfb168STomas Winkler if (err) { 2073ecfb168STomas Winkler dev_err(&pdev->dev, "No usable DMA configuration, aborting\n"); 208f8a09605STomas Winkler goto end; 2093ecfb168STomas Winkler } 2103ecfb168STomas Winkler 2112703d4b2STomas Winkler /* allocates and initializes the mei dev structure */ 21295953618SAlexander Usyskin dev = mei_me_dev_init(&pdev->dev, cfg, false); 2132703d4b2STomas Winkler if (!dev) { 2142703d4b2STomas Winkler err = -ENOMEM; 215f8a09605STomas Winkler goto end; 2162703d4b2STomas Winkler } 21752c34561STomas Winkler hw = to_me_hw(dev); 218f8a09605STomas Winkler hw->mem_addr = pcim_iomap_table(pdev)[0]; 219261e071aSTomas Winkler hw->read_fws = mei_me_read_fws; 220f8a09605STomas Winkler 2212703d4b2STomas Winkler pci_enable_msi(pdev); 2222703d4b2STomas Winkler 223fec874a8SBenjamin Lee hw->irq = pdev->irq; 224fec874a8SBenjamin Lee 2252703d4b2STomas Winkler /* request and enable interrupt */ 2261fa55b4eSAlexander Usyskin irqflags = pci_dev_msi_enabled(pdev) ? IRQF_ONESHOT : IRQF_SHARED; 2271fa55b4eSAlexander Usyskin 2282703d4b2STomas Winkler err = request_threaded_irq(pdev->irq, 22906ecd645STomas Winkler mei_me_irq_quick_handler, 23006ecd645STomas Winkler mei_me_irq_thread_handler, 2311fa55b4eSAlexander Usyskin irqflags, KBUILD_MODNAME, dev); 2322703d4b2STomas Winkler if (err) { 2332703d4b2STomas Winkler dev_err(&pdev->dev, "request_threaded_irq failure. irq = %d\n", 2342703d4b2STomas Winkler pdev->irq); 235f8a09605STomas Winkler goto end; 2362703d4b2STomas Winkler } 2372703d4b2STomas Winkler 238c4d589beSTomas Winkler if (mei_start(dev)) { 2392703d4b2STomas Winkler dev_err(&pdev->dev, "init hw failure.\n"); 2402703d4b2STomas Winkler err = -ENODEV; 2412703d4b2STomas Winkler goto release_irq; 2422703d4b2STomas Winkler } 2432703d4b2STomas Winkler 244180ea05bSTomas Winkler pm_runtime_set_autosuspend_delay(&pdev->dev, MEI_ME_RPM_TIMEOUT); 245180ea05bSTomas Winkler pm_runtime_use_autosuspend(&pdev->dev); 246180ea05bSTomas Winkler 247f3d8e878SAlexander Usyskin err = mei_register(dev, &pdev->dev); 2482703d4b2STomas Winkler if (err) 2491f7e489aSAlexander Usyskin goto stop; 2502703d4b2STomas Winkler 2512703d4b2STomas Winkler pci_set_drvdata(pdev, dev); 2522703d4b2STomas Winkler 253e13fa90cSTomas Winkler /* 254557909e1SAlexander Usyskin * MEI requires to resume from runtime suspend mode 255557909e1SAlexander Usyskin * in order to perform link reset flow upon system suspend. 256557909e1SAlexander Usyskin */ 257e0751556SRafael J. Wysocki dev_pm_set_driver_flags(&pdev->dev, DPM_FLAG_NO_DIRECT_COMPLETE); 258557909e1SAlexander Usyskin 259557909e1SAlexander Usyskin /* 260b42dc063SAlexander Usyskin * ME maps runtime suspend/resume to D0i states, 261b42dc063SAlexander Usyskin * hence we need to go around native PCI runtime service which 262b42dc063SAlexander Usyskin * eventually brings the device into D3cold/hot state, 263b42dc063SAlexander Usyskin * but the mei device cannot wake up from D3 unlike from D0i3. 264b42dc063SAlexander Usyskin * To get around the PCI device native runtime pm, 265b42dc063SAlexander Usyskin * ME uses runtime pm domain handlers which take precedence 266b42dc063SAlexander Usyskin * over the driver's pm handlers. 267e13fa90cSTomas Winkler */ 268e13fa90cSTomas Winkler mei_me_set_pm_domain(dev); 269e13fa90cSTomas Winkler 270cc365dcfSTomas Winkler if (mei_pg_is_enabled(dev)) { 271180ea05bSTomas Winkler pm_runtime_put_noidle(&pdev->dev); 272cc365dcfSTomas Winkler if (hw->d0i3_supported) 273cc365dcfSTomas Winkler pm_runtime_allow(&pdev->dev); 274cc365dcfSTomas Winkler } 275180ea05bSTomas Winkler 276c4e87b52SAlexander Usyskin dev_dbg(&pdev->dev, "initialization successful.\n"); 2772703d4b2STomas Winkler 2782703d4b2STomas Winkler return 0; 2792703d4b2STomas Winkler 2801f7e489aSAlexander Usyskin stop: 2811f7e489aSAlexander Usyskin mei_stop(dev); 2822703d4b2STomas Winkler release_irq: 283dc844b0dSTomas Winkler mei_cancel_work(dev); 2842703d4b2STomas Winkler mei_disable_interrupts(dev); 2852703d4b2STomas Winkler free_irq(pdev->irq, dev); 2862703d4b2STomas Winkler end: 2872703d4b2STomas Winkler dev_err(&pdev->dev, "initialization failed.\n"); 2882703d4b2STomas Winkler return err; 2892703d4b2STomas Winkler } 2902703d4b2STomas Winkler 2912703d4b2STomas Winkler /** 2925c4c0106STomas Winkler * mei_me_shutdown - Device Removal Routine 2935c4c0106STomas Winkler * 2945c4c0106STomas Winkler * @pdev: PCI device structure 2955c4c0106STomas Winkler * 2965c4c0106STomas Winkler * mei_me_shutdown is called from the reboot notifier 2975c4c0106STomas Winkler * it's a simplified version of remove so we go down 2985c4c0106STomas Winkler * faster. 2995c4c0106STomas Winkler */ 3005c4c0106STomas Winkler static void mei_me_shutdown(struct pci_dev *pdev) 3015c4c0106STomas Winkler { 3025c4c0106STomas Winkler struct mei_device *dev; 3035c4c0106STomas Winkler 3045c4c0106STomas Winkler dev = pci_get_drvdata(pdev); 3055c4c0106STomas Winkler if (!dev) 3065c4c0106STomas Winkler return; 3075c4c0106STomas Winkler 3085c4c0106STomas Winkler dev_dbg(&pdev->dev, "shutdown\n"); 3095c4c0106STomas Winkler mei_stop(dev); 3105c4c0106STomas Winkler 3115c4c0106STomas Winkler mei_me_unset_pm_domain(dev); 3125c4c0106STomas Winkler 3135c4c0106STomas Winkler mei_disable_interrupts(dev); 3145c4c0106STomas Winkler free_irq(pdev->irq, dev); 3155c4c0106STomas Winkler } 3165c4c0106STomas Winkler 3175c4c0106STomas Winkler /** 318ce23139cSAlexander Usyskin * mei_me_remove - Device Removal Routine 3192703d4b2STomas Winkler * 3202703d4b2STomas Winkler * @pdev: PCI device structure 3212703d4b2STomas Winkler * 3225c4c0106STomas Winkler * mei_me_remove is called by the PCI subsystem to alert the driver 3232703d4b2STomas Winkler * that it should release a PCI device. 3242703d4b2STomas Winkler */ 325b68301e9STomas Winkler static void mei_me_remove(struct pci_dev *pdev) 3262703d4b2STomas Winkler { 3272703d4b2STomas Winkler struct mei_device *dev; 3282703d4b2STomas Winkler 3292703d4b2STomas Winkler dev = pci_get_drvdata(pdev); 3302703d4b2STomas Winkler if (!dev) 3312703d4b2STomas Winkler return; 3322703d4b2STomas Winkler 333180ea05bSTomas Winkler if (mei_pg_is_enabled(dev)) 334180ea05bSTomas Winkler pm_runtime_get_noresume(&pdev->dev); 335180ea05bSTomas Winkler 336ed6f7ac1SPaul Bolle dev_dbg(&pdev->dev, "stop\n"); 3377cb035d9STomas Winkler mei_stop(dev); 3382703d4b2STomas Winkler 339e13fa90cSTomas Winkler mei_me_unset_pm_domain(dev); 340e13fa90cSTomas Winkler 3412703d4b2STomas Winkler mei_disable_interrupts(dev); 3422703d4b2STomas Winkler 3432703d4b2STomas Winkler free_irq(pdev->irq, dev); 3442703d4b2STomas Winkler 34530e53bb8STomas Winkler mei_deregister(dev); 3462703d4b2STomas Winkler } 347f8a09605STomas Winkler 34816833257SAlexander Usyskin #ifdef CONFIG_PM_SLEEP 349907deab2SAlexander Usyskin static int mei_me_pci_prepare(struct device *device) 350907deab2SAlexander Usyskin { 351907deab2SAlexander Usyskin pm_runtime_resume(device); 352907deab2SAlexander Usyskin return 0; 353907deab2SAlexander Usyskin } 354907deab2SAlexander Usyskin 355b68301e9STomas Winkler static int mei_me_pci_suspend(struct device *device) 3562703d4b2STomas Winkler { 3572703d4b2STomas Winkler struct pci_dev *pdev = to_pci_dev(device); 3582703d4b2STomas Winkler struct mei_device *dev = pci_get_drvdata(pdev); 3592703d4b2STomas Winkler 3602703d4b2STomas Winkler if (!dev) 3612703d4b2STomas Winkler return -ENODEV; 3622703d4b2STomas Winkler 363ed6f7ac1SPaul Bolle dev_dbg(&pdev->dev, "suspend\n"); 3642703d4b2STomas Winkler 3657cb035d9STomas Winkler mei_stop(dev); 3667cb035d9STomas Winkler 3677cb035d9STomas Winkler mei_disable_interrupts(dev); 3682703d4b2STomas Winkler 3692703d4b2STomas Winkler free_irq(pdev->irq, dev); 3702703d4b2STomas Winkler pci_disable_msi(pdev); 3712703d4b2STomas Winkler 3727cb035d9STomas Winkler return 0; 3732703d4b2STomas Winkler } 3742703d4b2STomas Winkler 375b68301e9STomas Winkler static int mei_me_pci_resume(struct device *device) 3762703d4b2STomas Winkler { 3772703d4b2STomas Winkler struct pci_dev *pdev = to_pci_dev(device); 3782703d4b2STomas Winkler struct mei_device *dev; 3791fa55b4eSAlexander Usyskin unsigned int irqflags; 3802703d4b2STomas Winkler int err; 3812703d4b2STomas Winkler 3822703d4b2STomas Winkler dev = pci_get_drvdata(pdev); 3832703d4b2STomas Winkler if (!dev) 3842703d4b2STomas Winkler return -ENODEV; 3852703d4b2STomas Winkler 3862703d4b2STomas Winkler pci_enable_msi(pdev); 3872703d4b2STomas Winkler 3881fa55b4eSAlexander Usyskin irqflags = pci_dev_msi_enabled(pdev) ? IRQF_ONESHOT : IRQF_SHARED; 3891fa55b4eSAlexander Usyskin 3902703d4b2STomas Winkler /* request and enable interrupt */ 3912703d4b2STomas Winkler err = request_threaded_irq(pdev->irq, 39206ecd645STomas Winkler mei_me_irq_quick_handler, 39306ecd645STomas Winkler mei_me_irq_thread_handler, 3941fa55b4eSAlexander Usyskin irqflags, KBUILD_MODNAME, dev); 3952703d4b2STomas Winkler 3962703d4b2STomas Winkler if (err) { 3972703d4b2STomas Winkler dev_err(&pdev->dev, "request_threaded_irq failed: irq = %d.\n", 3982703d4b2STomas Winkler pdev->irq); 3992703d4b2STomas Winkler return err; 4002703d4b2STomas Winkler } 4012703d4b2STomas Winkler 40233ec0826STomas Winkler err = mei_restart(dev); 40333ec0826STomas Winkler if (err) 40433ec0826STomas Winkler return err; 4052703d4b2STomas Winkler 4062703d4b2STomas Winkler /* Start timer if stopped in suspend */ 4072703d4b2STomas Winkler schedule_delayed_work(&dev->timer_work, HZ); 4082703d4b2STomas Winkler 40933ec0826STomas Winkler return 0; 4102703d4b2STomas Winkler } 411907deab2SAlexander Usyskin 412907deab2SAlexander Usyskin static void mei_me_pci_complete(struct device *device) 413907deab2SAlexander Usyskin { 414907deab2SAlexander Usyskin pm_runtime_suspend(device); 415907deab2SAlexander Usyskin } 416907deab2SAlexander Usyskin #else /* CONFIG_PM_SLEEP */ 417907deab2SAlexander Usyskin 418907deab2SAlexander Usyskin #define mei_me_pci_prepare NULL 419907deab2SAlexander Usyskin #define mei_me_pci_complete NULL 420907deab2SAlexander Usyskin 421907deab2SAlexander Usyskin #endif /* !CONFIG_PM_SLEEP */ 42216833257SAlexander Usyskin 423bbd6d050SRafael J. Wysocki #ifdef CONFIG_PM 424180ea05bSTomas Winkler static int mei_me_pm_runtime_idle(struct device *device) 425180ea05bSTomas Winkler { 426180ea05bSTomas Winkler struct mei_device *dev; 427180ea05bSTomas Winkler 428ab81f3f3SChuhong Yuan dev_dbg(device, "rpm: me: runtime_idle\n"); 429180ea05bSTomas Winkler 430ab81f3f3SChuhong Yuan dev = dev_get_drvdata(device); 431180ea05bSTomas Winkler if (!dev) 432180ea05bSTomas Winkler return -ENODEV; 433180ea05bSTomas Winkler if (mei_write_is_idle(dev)) 434d5d83f8aSAlexander Usyskin pm_runtime_autosuspend(device); 435180ea05bSTomas Winkler 436180ea05bSTomas Winkler return -EBUSY; 437180ea05bSTomas Winkler } 438180ea05bSTomas Winkler 439180ea05bSTomas Winkler static int mei_me_pm_runtime_suspend(struct device *device) 440180ea05bSTomas Winkler { 441180ea05bSTomas Winkler struct mei_device *dev; 442180ea05bSTomas Winkler int ret; 443180ea05bSTomas Winkler 444ab81f3f3SChuhong Yuan dev_dbg(device, "rpm: me: runtime suspend\n"); 445180ea05bSTomas Winkler 446ab81f3f3SChuhong Yuan dev = dev_get_drvdata(device); 447180ea05bSTomas Winkler if (!dev) 448180ea05bSTomas Winkler return -ENODEV; 449180ea05bSTomas Winkler 450180ea05bSTomas Winkler mutex_lock(&dev->device_lock); 451180ea05bSTomas Winkler 452180ea05bSTomas Winkler if (mei_write_is_idle(dev)) 4532d1995fcSAlexander Usyskin ret = mei_me_pg_enter_sync(dev); 454180ea05bSTomas Winkler else 455180ea05bSTomas Winkler ret = -EAGAIN; 456180ea05bSTomas Winkler 457180ea05bSTomas Winkler mutex_unlock(&dev->device_lock); 458180ea05bSTomas Winkler 459ab81f3f3SChuhong Yuan dev_dbg(device, "rpm: me: runtime suspend ret=%d\n", ret); 460180ea05bSTomas Winkler 46177537ad2SAlexander Usyskin if (ret && ret != -EAGAIN) 46277537ad2SAlexander Usyskin schedule_work(&dev->reset_work); 46377537ad2SAlexander Usyskin 464180ea05bSTomas Winkler return ret; 465180ea05bSTomas Winkler } 466180ea05bSTomas Winkler 467180ea05bSTomas Winkler static int mei_me_pm_runtime_resume(struct device *device) 468180ea05bSTomas Winkler { 469180ea05bSTomas Winkler struct mei_device *dev; 470180ea05bSTomas Winkler int ret; 471180ea05bSTomas Winkler 472ab81f3f3SChuhong Yuan dev_dbg(device, "rpm: me: runtime resume\n"); 473180ea05bSTomas Winkler 474ab81f3f3SChuhong Yuan dev = dev_get_drvdata(device); 475180ea05bSTomas Winkler if (!dev) 476180ea05bSTomas Winkler return -ENODEV; 477180ea05bSTomas Winkler 478180ea05bSTomas Winkler mutex_lock(&dev->device_lock); 479180ea05bSTomas Winkler 4802d1995fcSAlexander Usyskin ret = mei_me_pg_exit_sync(dev); 481180ea05bSTomas Winkler 482180ea05bSTomas Winkler mutex_unlock(&dev->device_lock); 483180ea05bSTomas Winkler 484ab81f3f3SChuhong Yuan dev_dbg(device, "rpm: me: runtime resume ret = %d\n", ret); 485180ea05bSTomas Winkler 48677537ad2SAlexander Usyskin if (ret) 48777537ad2SAlexander Usyskin schedule_work(&dev->reset_work); 48877537ad2SAlexander Usyskin 489180ea05bSTomas Winkler return ret; 490180ea05bSTomas Winkler } 491e13fa90cSTomas Winkler 492e13fa90cSTomas Winkler /** 4937efceb55SGeert Uytterhoeven * mei_me_set_pm_domain - fill and set pm domain structure for device 494e13fa90cSTomas Winkler * 495e13fa90cSTomas Winkler * @dev: mei_device 496e13fa90cSTomas Winkler */ 497e13fa90cSTomas Winkler static inline void mei_me_set_pm_domain(struct mei_device *dev) 498e13fa90cSTomas Winkler { 499d08b8fc0STomas Winkler struct pci_dev *pdev = to_pci_dev(dev->dev); 500e13fa90cSTomas Winkler 501e13fa90cSTomas Winkler if (pdev->dev.bus && pdev->dev.bus->pm) { 502e13fa90cSTomas Winkler dev->pg_domain.ops = *pdev->dev.bus->pm; 503e13fa90cSTomas Winkler 504e13fa90cSTomas Winkler dev->pg_domain.ops.runtime_suspend = mei_me_pm_runtime_suspend; 505e13fa90cSTomas Winkler dev->pg_domain.ops.runtime_resume = mei_me_pm_runtime_resume; 506e13fa90cSTomas Winkler dev->pg_domain.ops.runtime_idle = mei_me_pm_runtime_idle; 507e13fa90cSTomas Winkler 508989561deSTomeu Vizoso dev_pm_domain_set(&pdev->dev, &dev->pg_domain); 509e13fa90cSTomas Winkler } 510e13fa90cSTomas Winkler } 511e13fa90cSTomas Winkler 512e13fa90cSTomas Winkler /** 5137efceb55SGeert Uytterhoeven * mei_me_unset_pm_domain - clean pm domain structure for device 514e13fa90cSTomas Winkler * 515e13fa90cSTomas Winkler * @dev: mei_device 516e13fa90cSTomas Winkler */ 517e13fa90cSTomas Winkler static inline void mei_me_unset_pm_domain(struct mei_device *dev) 518e13fa90cSTomas Winkler { 519e13fa90cSTomas Winkler /* stop using pm callbacks if any */ 520989561deSTomeu Vizoso dev_pm_domain_set(dev->dev, NULL); 521e13fa90cSTomas Winkler } 522180ea05bSTomas Winkler 523180ea05bSTomas Winkler static const struct dev_pm_ops mei_me_pm_ops = { 524907deab2SAlexander Usyskin .prepare = mei_me_pci_prepare, 525907deab2SAlexander Usyskin .complete = mei_me_pci_complete, 526180ea05bSTomas Winkler SET_SYSTEM_SLEEP_PM_OPS(mei_me_pci_suspend, 527180ea05bSTomas Winkler mei_me_pci_resume) 528180ea05bSTomas Winkler SET_RUNTIME_PM_OPS( 529180ea05bSTomas Winkler mei_me_pm_runtime_suspend, 530180ea05bSTomas Winkler mei_me_pm_runtime_resume, 531180ea05bSTomas Winkler mei_me_pm_runtime_idle) 532180ea05bSTomas Winkler }; 533180ea05bSTomas Winkler 534b68301e9STomas Winkler #define MEI_ME_PM_OPS (&mei_me_pm_ops) 5352703d4b2STomas Winkler #else 536b68301e9STomas Winkler #define MEI_ME_PM_OPS NULL 537180ea05bSTomas Winkler #endif /* CONFIG_PM */ 5382703d4b2STomas Winkler /* 5392703d4b2STomas Winkler * PCI driver structure 5402703d4b2STomas Winkler */ 541b68301e9STomas Winkler static struct pci_driver mei_me_driver = { 5422703d4b2STomas Winkler .name = KBUILD_MODNAME, 543b68301e9STomas Winkler .id_table = mei_me_pci_tbl, 544b68301e9STomas Winkler .probe = mei_me_probe, 545b68301e9STomas Winkler .remove = mei_me_remove, 5465c4c0106STomas Winkler .shutdown = mei_me_shutdown, 547b68301e9STomas Winkler .driver.pm = MEI_ME_PM_OPS, 54867de6bf1SAlexander Usyskin .driver.probe_type = PROBE_PREFER_ASYNCHRONOUS, 5492703d4b2STomas Winkler }; 5502703d4b2STomas Winkler 551b68301e9STomas Winkler module_pci_driver(mei_me_driver); 5522703d4b2STomas Winkler 5532703d4b2STomas Winkler MODULE_AUTHOR("Intel Corporation"); 5542703d4b2STomas Winkler MODULE_DESCRIPTION("Intel(R) Management Engine Interface"); 5552703d4b2STomas Winkler MODULE_LICENSE("GPL v2"); 556