19fff0425STomas Winkler // SPDX-License-Identifier: GPL-2.0 22703d4b2STomas Winkler /* 3a27ad0f7STomas Winkler * Copyright (c) 2003-2020, Intel Corporation. All rights reserved. 42703d4b2STomas Winkler * Intel Management Engine Interface (Intel MEI) Linux driver 52703d4b2STomas Winkler */ 69fff0425STomas Winkler 72703d4b2STomas Winkler #include <linux/module.h> 82703d4b2STomas Winkler #include <linux/kernel.h> 92703d4b2STomas Winkler #include <linux/device.h> 102703d4b2STomas Winkler #include <linux/errno.h> 112703d4b2STomas Winkler #include <linux/types.h> 122703d4b2STomas Winkler #include <linux/pci.h> 132703d4b2STomas Winkler #include <linux/sched.h> 142703d4b2STomas Winkler #include <linux/interrupt.h> 152703d4b2STomas Winkler 16989561deSTomeu Vizoso #include <linux/pm_domain.h> 17180ea05bSTomas Winkler #include <linux/pm_runtime.h> 18180ea05bSTomas Winkler 192703d4b2STomas Winkler #include <linux/mei.h> 202703d4b2STomas Winkler 212703d4b2STomas Winkler #include "mei_dev.h" 222703d4b2STomas Winkler #include "client.h" 236e4cd27aSTomas Winkler #include "hw-me-regs.h" 246e4cd27aSTomas Winkler #include "hw-me.h" 252703d4b2STomas Winkler 262703d4b2STomas Winkler /* mei_pci_tbl - PCI Device ID Table */ 27a05f8f86STomas Winkler static const struct pci_device_id mei_me_pci_tbl[] = { 28f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_82946GZ, MEI_ME_ICH_CFG)}, 29f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_82G35, MEI_ME_ICH_CFG)}, 30f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_82Q965, MEI_ME_ICH_CFG)}, 31f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_82G965, MEI_ME_ICH_CFG)}, 32f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_82GM965, MEI_ME_ICH_CFG)}, 33f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_82GME965, MEI_ME_ICH_CFG)}, 34f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82Q35, MEI_ME_ICH_CFG)}, 35f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82G33, MEI_ME_ICH_CFG)}, 36f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82Q33, MEI_ME_ICH_CFG)}, 37f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_82X38, MEI_ME_ICH_CFG)}, 38f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_3200, MEI_ME_ICH_CFG)}, 398d929d48SAlexander Usyskin 40f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_6, MEI_ME_ICH_CFG)}, 41f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_7, MEI_ME_ICH_CFG)}, 42f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_8, MEI_ME_ICH_CFG)}, 43f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_9, MEI_ME_ICH_CFG)}, 44f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9_10, MEI_ME_ICH_CFG)}, 45f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_1, MEI_ME_ICH_CFG)}, 46f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_2, MEI_ME_ICH_CFG)}, 47f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_3, MEI_ME_ICH_CFG)}, 48f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_ICH9M_4, MEI_ME_ICH_CFG)}, 498d929d48SAlexander Usyskin 50f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_1, MEI_ME_ICH10_CFG)}, 51f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_2, MEI_ME_ICH10_CFG)}, 52f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_3, MEI_ME_ICH10_CFG)}, 53f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_ICH10_4, MEI_ME_ICH10_CFG)}, 542703d4b2STomas Winkler 55f8204f0dSAlexander Usyskin {MEI_PCI_DEVICE(MEI_DEV_ID_IBXPK_1, MEI_ME_PCH6_CFG)}, 56f8204f0dSAlexander Usyskin {MEI_PCI_DEVICE(MEI_DEV_ID_IBXPK_2, MEI_ME_PCH6_CFG)}, 57f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_CPT_1, MEI_ME_PCH_CPT_PBG_CFG)}, 58f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_PBG_1, MEI_ME_PCH_CPT_PBG_CFG)}, 59f8204f0dSAlexander Usyskin {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_1, MEI_ME_PCH7_CFG)}, 60f8204f0dSAlexander Usyskin {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_2, MEI_ME_PCH7_CFG)}, 61f8204f0dSAlexander Usyskin {MEI_PCI_DEVICE(MEI_DEV_ID_PPT_3, MEI_ME_PCH7_CFG)}, 62f76d77f5STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_H, MEI_ME_PCH8_SPS_4_CFG)}, 63f76d77f5STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_W, MEI_ME_PCH8_SPS_4_CFG)}, 64f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_LP, MEI_ME_PCH8_CFG)}, 65f76d77f5STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_LPT_HR, MEI_ME_PCH8_SPS_4_CFG)}, 66f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_WPT_LP, MEI_ME_PCH8_CFG)}, 67f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_WPT_LP_2, MEI_ME_PCH8_CFG)}, 681625c7ecSTomas Winkler 69f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_SPT, MEI_ME_PCH8_CFG)}, 70f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_2, MEI_ME_PCH8_CFG)}, 712f79d3d1SAlexander Usyskin {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_3, MEI_ME_PCH8_ITOUCH_CFG)}, 72f76d77f5STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H, MEI_ME_PCH8_SPS_4_CFG)}, 73f76d77f5STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_SPT_H_2, MEI_ME_PCH8_SPS_4_CFG)}, 74f76d77f5STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_LBG, MEI_ME_PCH12_SPS_4_CFG)}, 75dd16f6cdSTomas Winkler 76f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_BXT_M, MEI_ME_PCH8_CFG)}, 77f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_APL_I, MEI_ME_PCH8_CFG)}, 78f5ac3c49STomas Winkler 79f7ee8eadSTomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_DNV_IE, MEI_ME_PCH8_CFG)}, 80f7ee8eadSTomas Winkler 81688cb678STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_GLK, MEI_ME_PCH8_CFG)}, 82688cb678STomas Winkler 83f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_KBP, MEI_ME_PCH8_CFG)}, 84f5ac3c49STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_KBP_2, MEI_ME_PCH8_CFG)}, 854afc339eSTomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_KBP_3, MEI_ME_PCH8_CFG)}, 86ac182e8aSAlexander Usyskin 871dbfe7f2SAlexander Usyskin {MEI_PCI_DEVICE(MEI_DEV_ID_CNP_LP, MEI_ME_PCH12_CFG)}, 882f79d3d1SAlexander Usyskin {MEI_PCI_DEVICE(MEI_DEV_ID_CNP_LP_3, MEI_ME_PCH8_ITOUCH_CFG)}, 89f76d77f5STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_CNP_H, MEI_ME_PCH12_SPS_CFG)}, 902f79d3d1SAlexander Usyskin {MEI_PCI_DEVICE(MEI_DEV_ID_CNP_H_3, MEI_ME_PCH12_SPS_ITOUCH_CFG)}, 91f8f4aa68SAlexander Usyskin 924d86dfd3STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_CMP_LP, MEI_ME_PCH12_CFG)}, 932f79d3d1SAlexander Usyskin {MEI_PCI_DEVICE(MEI_DEV_ID_CMP_LP_3, MEI_ME_PCH8_ITOUCH_CFG)}, 9482b29b9fSAlexander Usyskin {MEI_PCI_DEVICE(MEI_DEV_ID_CMP_V, MEI_ME_PCH12_CFG)}, 95559e575aSTomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_CMP_H, MEI_ME_PCH12_CFG)}, 962f79d3d1SAlexander Usyskin {MEI_PCI_DEVICE(MEI_DEV_ID_CMP_H_3, MEI_ME_PCH8_ITOUCH_CFG)}, 974d86dfd3STomas Winkler 98efe814e9STomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_ICP_LP, MEI_ME_PCH12_CFG)}, 99efe814e9STomas Winkler 10052f6efdfSAlexander Usyskin {MEI_PCI_DEVICE(MEI_DEV_ID_TGP_LP, MEI_ME_PCH15_CFG)}, 1018c289ea0SAlexander Usyskin {MEI_PCI_DEVICE(MEI_DEV_ID_TGP_H, MEI_ME_PCH15_SPS_CFG)}, 102587f1740STomas Winkler 1030db4a15dSTomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_JSP_N, MEI_ME_PCH15_CFG)}, 1040db4a15dSTomas Winkler 10552f6efdfSAlexander Usyskin {MEI_PCI_DEVICE(MEI_DEV_ID_MCC, MEI_ME_PCH15_CFG)}, 1061be8624aSAlexander Usyskin {MEI_PCI_DEVICE(MEI_DEV_ID_MCC_4, MEI_ME_PCH8_CFG)}, 1071be8624aSAlexander Usyskin 10899397d33SAlexander Usyskin {MEI_PCI_DEVICE(MEI_DEV_ID_CDF, MEI_ME_PCH8_CFG)}, 10999397d33SAlexander Usyskin 110*372726cbSTomas Winkler {MEI_PCI_DEVICE(MEI_DEV_ID_EBG, MEI_ME_PCH15_SPS_CFG)}, 111*372726cbSTomas Winkler 1122703d4b2STomas Winkler /* required last entry */ 1132703d4b2STomas Winkler {0, } 1142703d4b2STomas Winkler }; 1152703d4b2STomas Winkler 116b68301e9STomas Winkler MODULE_DEVICE_TABLE(pci, mei_me_pci_tbl); 1172703d4b2STomas Winkler 118bbd6d050SRafael J. Wysocki #ifdef CONFIG_PM 119e13fa90cSTomas Winkler static inline void mei_me_set_pm_domain(struct mei_device *dev); 120e13fa90cSTomas Winkler static inline void mei_me_unset_pm_domain(struct mei_device *dev); 121e13fa90cSTomas Winkler #else 122e13fa90cSTomas Winkler static inline void mei_me_set_pm_domain(struct mei_device *dev) {} 123e13fa90cSTomas Winkler static inline void mei_me_unset_pm_domain(struct mei_device *dev) {} 124bbd6d050SRafael J. Wysocki #endif /* CONFIG_PM */ 125e13fa90cSTomas Winkler 126261e071aSTomas Winkler static int mei_me_read_fws(const struct mei_device *dev, int where, u32 *val) 127261e071aSTomas Winkler { 128261e071aSTomas Winkler struct pci_dev *pdev = to_pci_dev(dev->dev); 129261e071aSTomas Winkler 130261e071aSTomas Winkler return pci_read_config_dword(pdev, where, val); 131261e071aSTomas Winkler } 132261e071aSTomas Winkler 1332703d4b2STomas Winkler /** 134ce23139cSAlexander Usyskin * mei_me_quirk_probe - probe for devices that doesn't valid ME interface 135393b148fSMasanari Iida * 1362703d4b2STomas Winkler * @pdev: PCI device structure 137c919951dSTomas Winkler * @cfg: per generation config 1382703d4b2STomas Winkler * 139a8605ea2SAlexander Usyskin * Return: true if ME Interface is valid, false otherwise 1402703d4b2STomas Winkler */ 141b68301e9STomas Winkler static bool mei_me_quirk_probe(struct pci_dev *pdev, 142c919951dSTomas Winkler const struct mei_cfg *cfg) 1432703d4b2STomas Winkler { 144c919951dSTomas Winkler if (cfg->quirk_probe && cfg->quirk_probe(pdev)) { 1452703d4b2STomas Winkler dev_info(&pdev->dev, "Device doesn't have valid ME Interface\n"); 1462703d4b2STomas Winkler return false; 1472703d4b2STomas Winkler } 148c919951dSTomas Winkler 149c919951dSTomas Winkler return true; 150c919951dSTomas Winkler } 151c919951dSTomas Winkler 1522703d4b2STomas Winkler /** 153ce23139cSAlexander Usyskin * mei_me_probe - Device Initialization Routine 1542703d4b2STomas Winkler * 1552703d4b2STomas Winkler * @pdev: PCI device structure 1562703d4b2STomas Winkler * @ent: entry in kcs_pci_tbl 1572703d4b2STomas Winkler * 158a8605ea2SAlexander Usyskin * Return: 0 on success, <0 on failure. 1592703d4b2STomas Winkler */ 160b68301e9STomas Winkler static int mei_me_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 1612703d4b2STomas Winkler { 162f5ac3c49STomas Winkler const struct mei_cfg *cfg; 1632703d4b2STomas Winkler struct mei_device *dev; 16452c34561STomas Winkler struct mei_me_hw *hw; 1651fa55b4eSAlexander Usyskin unsigned int irqflags; 1662703d4b2STomas Winkler int err; 1672703d4b2STomas Winkler 168f5ac3c49STomas Winkler cfg = mei_me_get_cfg(ent->driver_data); 169f5ac3c49STomas Winkler if (!cfg) 170f5ac3c49STomas Winkler return -ENODEV; 1712703d4b2STomas Winkler 172c919951dSTomas Winkler if (!mei_me_quirk_probe(pdev, cfg)) 173c919951dSTomas Winkler return -ENODEV; 1742703d4b2STomas Winkler 1752703d4b2STomas Winkler /* enable pci dev */ 176f8a09605STomas Winkler err = pcim_enable_device(pdev); 1772703d4b2STomas Winkler if (err) { 1782703d4b2STomas Winkler dev_err(&pdev->dev, "failed to enable pci device.\n"); 1792703d4b2STomas Winkler goto end; 1802703d4b2STomas Winkler } 1812703d4b2STomas Winkler /* set PCI host mastering */ 1822703d4b2STomas Winkler pci_set_master(pdev); 183f8a09605STomas Winkler /* pci request regions and mapping IO device memory for mei driver */ 184f8a09605STomas Winkler err = pcim_iomap_regions(pdev, BIT(0), KBUILD_MODNAME); 1852703d4b2STomas Winkler if (err) { 1862703d4b2STomas Winkler dev_err(&pdev->dev, "failed to get pci regions.\n"); 187f8a09605STomas Winkler goto end; 1882703d4b2STomas Winkler } 1893ecfb168STomas Winkler 1903ecfb168STomas Winkler if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(64)) || 1913ecfb168STomas Winkler dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(64))) { 1923ecfb168STomas Winkler 1933ecfb168STomas Winkler err = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32)); 1943ecfb168STomas Winkler if (err) 1953ecfb168STomas Winkler err = dma_set_coherent_mask(&pdev->dev, 1963ecfb168STomas Winkler DMA_BIT_MASK(32)); 1973ecfb168STomas Winkler } 1983ecfb168STomas Winkler if (err) { 1993ecfb168STomas Winkler dev_err(&pdev->dev, "No usable DMA configuration, aborting\n"); 200f8a09605STomas Winkler goto end; 2013ecfb168STomas Winkler } 2023ecfb168STomas Winkler 2032703d4b2STomas Winkler /* allocates and initializes the mei dev structure */ 204907b471cSTomas Winkler dev = mei_me_dev_init(&pdev->dev, cfg); 2052703d4b2STomas Winkler if (!dev) { 2062703d4b2STomas Winkler err = -ENOMEM; 207f8a09605STomas Winkler goto end; 2082703d4b2STomas Winkler } 20952c34561STomas Winkler hw = to_me_hw(dev); 210f8a09605STomas Winkler hw->mem_addr = pcim_iomap_table(pdev)[0]; 211261e071aSTomas Winkler hw->read_fws = mei_me_read_fws; 212f8a09605STomas Winkler 2132703d4b2STomas Winkler pci_enable_msi(pdev); 2142703d4b2STomas Winkler 215fec874a8SBenjamin Lee hw->irq = pdev->irq; 216fec874a8SBenjamin Lee 2172703d4b2STomas Winkler /* request and enable interrupt */ 2181fa55b4eSAlexander Usyskin irqflags = pci_dev_msi_enabled(pdev) ? IRQF_ONESHOT : IRQF_SHARED; 2191fa55b4eSAlexander Usyskin 2202703d4b2STomas Winkler err = request_threaded_irq(pdev->irq, 22106ecd645STomas Winkler mei_me_irq_quick_handler, 22206ecd645STomas Winkler mei_me_irq_thread_handler, 2231fa55b4eSAlexander Usyskin irqflags, KBUILD_MODNAME, dev); 2242703d4b2STomas Winkler if (err) { 2252703d4b2STomas Winkler dev_err(&pdev->dev, "request_threaded_irq failure. irq = %d\n", 2262703d4b2STomas Winkler pdev->irq); 227f8a09605STomas Winkler goto end; 2282703d4b2STomas Winkler } 2292703d4b2STomas Winkler 230c4d589beSTomas Winkler if (mei_start(dev)) { 2312703d4b2STomas Winkler dev_err(&pdev->dev, "init hw failure.\n"); 2322703d4b2STomas Winkler err = -ENODEV; 2332703d4b2STomas Winkler goto release_irq; 2342703d4b2STomas Winkler } 2352703d4b2STomas Winkler 236180ea05bSTomas Winkler pm_runtime_set_autosuspend_delay(&pdev->dev, MEI_ME_RPM_TIMEOUT); 237180ea05bSTomas Winkler pm_runtime_use_autosuspend(&pdev->dev); 238180ea05bSTomas Winkler 239f3d8e878SAlexander Usyskin err = mei_register(dev, &pdev->dev); 2402703d4b2STomas Winkler if (err) 2411f7e489aSAlexander Usyskin goto stop; 2422703d4b2STomas Winkler 2432703d4b2STomas Winkler pci_set_drvdata(pdev, dev); 2442703d4b2STomas Winkler 245e13fa90cSTomas Winkler /* 246557909e1SAlexander Usyskin * MEI requires to resume from runtime suspend mode 247557909e1SAlexander Usyskin * in order to perform link reset flow upon system suspend. 248557909e1SAlexander Usyskin */ 249e0751556SRafael J. Wysocki dev_pm_set_driver_flags(&pdev->dev, DPM_FLAG_NO_DIRECT_COMPLETE); 250557909e1SAlexander Usyskin 251557909e1SAlexander Usyskin /* 252b42dc063SAlexander Usyskin * ME maps runtime suspend/resume to D0i states, 253b42dc063SAlexander Usyskin * hence we need to go around native PCI runtime service which 254b42dc063SAlexander Usyskin * eventually brings the device into D3cold/hot state, 255b42dc063SAlexander Usyskin * but the mei device cannot wake up from D3 unlike from D0i3. 256b42dc063SAlexander Usyskin * To get around the PCI device native runtime pm, 257b42dc063SAlexander Usyskin * ME uses runtime pm domain handlers which take precedence 258b42dc063SAlexander Usyskin * over the driver's pm handlers. 259e13fa90cSTomas Winkler */ 260e13fa90cSTomas Winkler mei_me_set_pm_domain(dev); 261e13fa90cSTomas Winkler 262cc365dcfSTomas Winkler if (mei_pg_is_enabled(dev)) { 263180ea05bSTomas Winkler pm_runtime_put_noidle(&pdev->dev); 264cc365dcfSTomas Winkler if (hw->d0i3_supported) 265cc365dcfSTomas Winkler pm_runtime_allow(&pdev->dev); 266cc365dcfSTomas Winkler } 267180ea05bSTomas Winkler 268c4e87b52SAlexander Usyskin dev_dbg(&pdev->dev, "initialization successful.\n"); 2692703d4b2STomas Winkler 2702703d4b2STomas Winkler return 0; 2712703d4b2STomas Winkler 2721f7e489aSAlexander Usyskin stop: 2731f7e489aSAlexander Usyskin mei_stop(dev); 2742703d4b2STomas Winkler release_irq: 275dc844b0dSTomas Winkler mei_cancel_work(dev); 2762703d4b2STomas Winkler mei_disable_interrupts(dev); 2772703d4b2STomas Winkler free_irq(pdev->irq, dev); 2782703d4b2STomas Winkler end: 2792703d4b2STomas Winkler dev_err(&pdev->dev, "initialization failed.\n"); 2802703d4b2STomas Winkler return err; 2812703d4b2STomas Winkler } 2822703d4b2STomas Winkler 2832703d4b2STomas Winkler /** 2845c4c0106STomas Winkler * mei_me_shutdown - Device Removal Routine 2855c4c0106STomas Winkler * 2865c4c0106STomas Winkler * @pdev: PCI device structure 2875c4c0106STomas Winkler * 2885c4c0106STomas Winkler * mei_me_shutdown is called from the reboot notifier 2895c4c0106STomas Winkler * it's a simplified version of remove so we go down 2905c4c0106STomas Winkler * faster. 2915c4c0106STomas Winkler */ 2925c4c0106STomas Winkler static void mei_me_shutdown(struct pci_dev *pdev) 2935c4c0106STomas Winkler { 2945c4c0106STomas Winkler struct mei_device *dev; 2955c4c0106STomas Winkler 2965c4c0106STomas Winkler dev = pci_get_drvdata(pdev); 2975c4c0106STomas Winkler if (!dev) 2985c4c0106STomas Winkler return; 2995c4c0106STomas Winkler 3005c4c0106STomas Winkler dev_dbg(&pdev->dev, "shutdown\n"); 3015c4c0106STomas Winkler mei_stop(dev); 3025c4c0106STomas Winkler 3035c4c0106STomas Winkler mei_me_unset_pm_domain(dev); 3045c4c0106STomas Winkler 3055c4c0106STomas Winkler mei_disable_interrupts(dev); 3065c4c0106STomas Winkler free_irq(pdev->irq, dev); 3075c4c0106STomas Winkler } 3085c4c0106STomas Winkler 3095c4c0106STomas Winkler /** 310ce23139cSAlexander Usyskin * mei_me_remove - Device Removal Routine 3112703d4b2STomas Winkler * 3122703d4b2STomas Winkler * @pdev: PCI device structure 3132703d4b2STomas Winkler * 3145c4c0106STomas Winkler * mei_me_remove is called by the PCI subsystem to alert the driver 3152703d4b2STomas Winkler * that it should release a PCI device. 3162703d4b2STomas Winkler */ 317b68301e9STomas Winkler static void mei_me_remove(struct pci_dev *pdev) 3182703d4b2STomas Winkler { 3192703d4b2STomas Winkler struct mei_device *dev; 3202703d4b2STomas Winkler 3212703d4b2STomas Winkler dev = pci_get_drvdata(pdev); 3222703d4b2STomas Winkler if (!dev) 3232703d4b2STomas Winkler return; 3242703d4b2STomas Winkler 325180ea05bSTomas Winkler if (mei_pg_is_enabled(dev)) 326180ea05bSTomas Winkler pm_runtime_get_noresume(&pdev->dev); 327180ea05bSTomas Winkler 328ed6f7ac1SPaul Bolle dev_dbg(&pdev->dev, "stop\n"); 3297cb035d9STomas Winkler mei_stop(dev); 3302703d4b2STomas Winkler 331e13fa90cSTomas Winkler mei_me_unset_pm_domain(dev); 332e13fa90cSTomas Winkler 3332703d4b2STomas Winkler mei_disable_interrupts(dev); 3342703d4b2STomas Winkler 3352703d4b2STomas Winkler free_irq(pdev->irq, dev); 3362703d4b2STomas Winkler 33730e53bb8STomas Winkler mei_deregister(dev); 3382703d4b2STomas Winkler } 339f8a09605STomas Winkler 34016833257SAlexander Usyskin #ifdef CONFIG_PM_SLEEP 341b68301e9STomas Winkler static int mei_me_pci_suspend(struct device *device) 3422703d4b2STomas Winkler { 3432703d4b2STomas Winkler struct pci_dev *pdev = to_pci_dev(device); 3442703d4b2STomas Winkler struct mei_device *dev = pci_get_drvdata(pdev); 3452703d4b2STomas Winkler 3462703d4b2STomas Winkler if (!dev) 3472703d4b2STomas Winkler return -ENODEV; 3482703d4b2STomas Winkler 349ed6f7ac1SPaul Bolle dev_dbg(&pdev->dev, "suspend\n"); 3502703d4b2STomas Winkler 3517cb035d9STomas Winkler mei_stop(dev); 3527cb035d9STomas Winkler 3537cb035d9STomas Winkler mei_disable_interrupts(dev); 3542703d4b2STomas Winkler 3552703d4b2STomas Winkler free_irq(pdev->irq, dev); 3562703d4b2STomas Winkler pci_disable_msi(pdev); 3572703d4b2STomas Winkler 3587cb035d9STomas Winkler return 0; 3592703d4b2STomas Winkler } 3602703d4b2STomas Winkler 361b68301e9STomas Winkler static int mei_me_pci_resume(struct device *device) 3622703d4b2STomas Winkler { 3632703d4b2STomas Winkler struct pci_dev *pdev = to_pci_dev(device); 3642703d4b2STomas Winkler struct mei_device *dev; 3651fa55b4eSAlexander Usyskin unsigned int irqflags; 3662703d4b2STomas Winkler int err; 3672703d4b2STomas Winkler 3682703d4b2STomas Winkler dev = pci_get_drvdata(pdev); 3692703d4b2STomas Winkler if (!dev) 3702703d4b2STomas Winkler return -ENODEV; 3712703d4b2STomas Winkler 3722703d4b2STomas Winkler pci_enable_msi(pdev); 3732703d4b2STomas Winkler 3741fa55b4eSAlexander Usyskin irqflags = pci_dev_msi_enabled(pdev) ? IRQF_ONESHOT : IRQF_SHARED; 3751fa55b4eSAlexander Usyskin 3762703d4b2STomas Winkler /* request and enable interrupt */ 3772703d4b2STomas Winkler err = request_threaded_irq(pdev->irq, 37806ecd645STomas Winkler mei_me_irq_quick_handler, 37906ecd645STomas Winkler mei_me_irq_thread_handler, 3801fa55b4eSAlexander Usyskin irqflags, KBUILD_MODNAME, dev); 3812703d4b2STomas Winkler 3822703d4b2STomas Winkler if (err) { 3832703d4b2STomas Winkler dev_err(&pdev->dev, "request_threaded_irq failed: irq = %d.\n", 3842703d4b2STomas Winkler pdev->irq); 3852703d4b2STomas Winkler return err; 3862703d4b2STomas Winkler } 3872703d4b2STomas Winkler 38833ec0826STomas Winkler err = mei_restart(dev); 38933ec0826STomas Winkler if (err) 39033ec0826STomas Winkler return err; 3912703d4b2STomas Winkler 3922703d4b2STomas Winkler /* Start timer if stopped in suspend */ 3932703d4b2STomas Winkler schedule_delayed_work(&dev->timer_work, HZ); 3942703d4b2STomas Winkler 39533ec0826STomas Winkler return 0; 3962703d4b2STomas Winkler } 397180ea05bSTomas Winkler #endif /* CONFIG_PM_SLEEP */ 39816833257SAlexander Usyskin 399bbd6d050SRafael J. Wysocki #ifdef CONFIG_PM 400180ea05bSTomas Winkler static int mei_me_pm_runtime_idle(struct device *device) 401180ea05bSTomas Winkler { 402180ea05bSTomas Winkler struct mei_device *dev; 403180ea05bSTomas Winkler 404ab81f3f3SChuhong Yuan dev_dbg(device, "rpm: me: runtime_idle\n"); 405180ea05bSTomas Winkler 406ab81f3f3SChuhong Yuan dev = dev_get_drvdata(device); 407180ea05bSTomas Winkler if (!dev) 408180ea05bSTomas Winkler return -ENODEV; 409180ea05bSTomas Winkler if (mei_write_is_idle(dev)) 410d5d83f8aSAlexander Usyskin pm_runtime_autosuspend(device); 411180ea05bSTomas Winkler 412180ea05bSTomas Winkler return -EBUSY; 413180ea05bSTomas Winkler } 414180ea05bSTomas Winkler 415180ea05bSTomas Winkler static int mei_me_pm_runtime_suspend(struct device *device) 416180ea05bSTomas Winkler { 417180ea05bSTomas Winkler struct mei_device *dev; 418180ea05bSTomas Winkler int ret; 419180ea05bSTomas Winkler 420ab81f3f3SChuhong Yuan dev_dbg(device, "rpm: me: runtime suspend\n"); 421180ea05bSTomas Winkler 422ab81f3f3SChuhong Yuan dev = dev_get_drvdata(device); 423180ea05bSTomas Winkler if (!dev) 424180ea05bSTomas Winkler return -ENODEV; 425180ea05bSTomas Winkler 426180ea05bSTomas Winkler mutex_lock(&dev->device_lock); 427180ea05bSTomas Winkler 428180ea05bSTomas Winkler if (mei_write_is_idle(dev)) 4292d1995fcSAlexander Usyskin ret = mei_me_pg_enter_sync(dev); 430180ea05bSTomas Winkler else 431180ea05bSTomas Winkler ret = -EAGAIN; 432180ea05bSTomas Winkler 433180ea05bSTomas Winkler mutex_unlock(&dev->device_lock); 434180ea05bSTomas Winkler 435ab81f3f3SChuhong Yuan dev_dbg(device, "rpm: me: runtime suspend ret=%d\n", ret); 436180ea05bSTomas Winkler 43777537ad2SAlexander Usyskin if (ret && ret != -EAGAIN) 43877537ad2SAlexander Usyskin schedule_work(&dev->reset_work); 43977537ad2SAlexander Usyskin 440180ea05bSTomas Winkler return ret; 441180ea05bSTomas Winkler } 442180ea05bSTomas Winkler 443180ea05bSTomas Winkler static int mei_me_pm_runtime_resume(struct device *device) 444180ea05bSTomas Winkler { 445180ea05bSTomas Winkler struct mei_device *dev; 446180ea05bSTomas Winkler int ret; 447180ea05bSTomas Winkler 448ab81f3f3SChuhong Yuan dev_dbg(device, "rpm: me: runtime resume\n"); 449180ea05bSTomas Winkler 450ab81f3f3SChuhong Yuan dev = dev_get_drvdata(device); 451180ea05bSTomas Winkler if (!dev) 452180ea05bSTomas Winkler return -ENODEV; 453180ea05bSTomas Winkler 454180ea05bSTomas Winkler mutex_lock(&dev->device_lock); 455180ea05bSTomas Winkler 4562d1995fcSAlexander Usyskin ret = mei_me_pg_exit_sync(dev); 457180ea05bSTomas Winkler 458180ea05bSTomas Winkler mutex_unlock(&dev->device_lock); 459180ea05bSTomas Winkler 460ab81f3f3SChuhong Yuan dev_dbg(device, "rpm: me: runtime resume ret = %d\n", ret); 461180ea05bSTomas Winkler 46277537ad2SAlexander Usyskin if (ret) 46377537ad2SAlexander Usyskin schedule_work(&dev->reset_work); 46477537ad2SAlexander Usyskin 465180ea05bSTomas Winkler return ret; 466180ea05bSTomas Winkler } 467e13fa90cSTomas Winkler 468e13fa90cSTomas Winkler /** 4697efceb55SGeert Uytterhoeven * mei_me_set_pm_domain - fill and set pm domain structure for device 470e13fa90cSTomas Winkler * 471e13fa90cSTomas Winkler * @dev: mei_device 472e13fa90cSTomas Winkler */ 473e13fa90cSTomas Winkler static inline void mei_me_set_pm_domain(struct mei_device *dev) 474e13fa90cSTomas Winkler { 475d08b8fc0STomas Winkler struct pci_dev *pdev = to_pci_dev(dev->dev); 476e13fa90cSTomas Winkler 477e13fa90cSTomas Winkler if (pdev->dev.bus && pdev->dev.bus->pm) { 478e13fa90cSTomas Winkler dev->pg_domain.ops = *pdev->dev.bus->pm; 479e13fa90cSTomas Winkler 480e13fa90cSTomas Winkler dev->pg_domain.ops.runtime_suspend = mei_me_pm_runtime_suspend; 481e13fa90cSTomas Winkler dev->pg_domain.ops.runtime_resume = mei_me_pm_runtime_resume; 482e13fa90cSTomas Winkler dev->pg_domain.ops.runtime_idle = mei_me_pm_runtime_idle; 483e13fa90cSTomas Winkler 484989561deSTomeu Vizoso dev_pm_domain_set(&pdev->dev, &dev->pg_domain); 485e13fa90cSTomas Winkler } 486e13fa90cSTomas Winkler } 487e13fa90cSTomas Winkler 488e13fa90cSTomas Winkler /** 4897efceb55SGeert Uytterhoeven * mei_me_unset_pm_domain - clean pm domain structure for device 490e13fa90cSTomas Winkler * 491e13fa90cSTomas Winkler * @dev: mei_device 492e13fa90cSTomas Winkler */ 493e13fa90cSTomas Winkler static inline void mei_me_unset_pm_domain(struct mei_device *dev) 494e13fa90cSTomas Winkler { 495e13fa90cSTomas Winkler /* stop using pm callbacks if any */ 496989561deSTomeu Vizoso dev_pm_domain_set(dev->dev, NULL); 497e13fa90cSTomas Winkler } 498180ea05bSTomas Winkler 499180ea05bSTomas Winkler static const struct dev_pm_ops mei_me_pm_ops = { 500180ea05bSTomas Winkler SET_SYSTEM_SLEEP_PM_OPS(mei_me_pci_suspend, 501180ea05bSTomas Winkler mei_me_pci_resume) 502180ea05bSTomas Winkler SET_RUNTIME_PM_OPS( 503180ea05bSTomas Winkler mei_me_pm_runtime_suspend, 504180ea05bSTomas Winkler mei_me_pm_runtime_resume, 505180ea05bSTomas Winkler mei_me_pm_runtime_idle) 506180ea05bSTomas Winkler }; 507180ea05bSTomas Winkler 508b68301e9STomas Winkler #define MEI_ME_PM_OPS (&mei_me_pm_ops) 5092703d4b2STomas Winkler #else 510b68301e9STomas Winkler #define MEI_ME_PM_OPS NULL 511180ea05bSTomas Winkler #endif /* CONFIG_PM */ 5122703d4b2STomas Winkler /* 5132703d4b2STomas Winkler * PCI driver structure 5142703d4b2STomas Winkler */ 515b68301e9STomas Winkler static struct pci_driver mei_me_driver = { 5162703d4b2STomas Winkler .name = KBUILD_MODNAME, 517b68301e9STomas Winkler .id_table = mei_me_pci_tbl, 518b68301e9STomas Winkler .probe = mei_me_probe, 519b68301e9STomas Winkler .remove = mei_me_remove, 5205c4c0106STomas Winkler .shutdown = mei_me_shutdown, 521b68301e9STomas Winkler .driver.pm = MEI_ME_PM_OPS, 52267de6bf1SAlexander Usyskin .driver.probe_type = PROBE_PREFER_ASYNCHRONOUS, 5232703d4b2STomas Winkler }; 5242703d4b2STomas Winkler 525b68301e9STomas Winkler module_pci_driver(mei_me_driver); 5262703d4b2STomas Winkler 5272703d4b2STomas Winkler MODULE_AUTHOR("Intel Corporation"); 5282703d4b2STomas Winkler MODULE_DESCRIPTION("Intel(R) Management Engine Interface"); 5292703d4b2STomas Winkler MODULE_LICENSE("GPL v2"); 530