1 /* 2 * This file is provided under a GPLv2 license. When using or 3 * redistributing this file, you may do so under that license. 4 * 5 * GPL LICENSE SUMMARY 6 * 7 * Copyright (C) 2016 T-Platforms. All Rights Reserved. 8 * 9 * This program is free software; you can redistribute it and/or modify it 10 * under the terms and conditions of the GNU General Public License, 11 * version 2, as published by the Free Software Foundation. 12 * 13 * This program is distributed in the hope that it will be useful, but WITHOUT 14 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or 15 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for 16 * more details. 17 * 18 * You should have received a copy of the GNU General Public License along 19 * with this program; if not, it can be found <http://www.gnu.org/licenses/>. 20 * 21 * The full GNU General Public License is included in this distribution in 22 * the file called "COPYING". 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 25 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 26 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 27 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 28 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 29 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 30 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 31 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 32 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 33 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 34 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 35 * 36 * IDT PCIe-switch NTB Linux driver 37 * 38 * Contact Information: 39 * Serge Semin <fancer.lancer@gmail.com>, <Sergey.Semin@t-platforms.ru> 40 */ 41 /* 42 * NOTE of the IDT 89HPESx SMBus-slave interface driver 43 * This driver primarily is developed to have an access to EEPROM device of 44 * IDT PCIe-switches. IDT provides a simple SMBus interface to perform IO- 45 * operations from/to EEPROM, which is located at private (so called Master) 46 * SMBus of switches. Using that interface this the driver creates a simple 47 * binary sysfs-file in the device directory: 48 * /sys/bus/i2c/devices/<bus>-<devaddr>/eeprom 49 * In case if read-only flag is specified in the dts-node of device desription, 50 * User-space applications won't be able to write to the EEPROM sysfs-node. 51 * Additionally IDT 89HPESx SMBus interface has an ability to write/read 52 * data of device CSRs. This driver exposes debugf-file to perform simple IO 53 * operations using that ability for just basic debug purpose. Particularly 54 * next file is created in the specific debugfs-directory: 55 * /sys/kernel/debug/idt_csr/ 56 * Format of the debugfs-node is: 57 * $ cat /sys/kernel/debug/idt_csr/<bus>-<devaddr>/<devname>; 58 * <CSR address>:<CSR value> 59 * So reading the content of the file gives current CSR address and it value. 60 * If User-space application wishes to change current CSR address, 61 * it can just write a proper value to the sysfs-file: 62 * $ echo "<CSR address>" > /sys/kernel/debug/idt_csr/<bus>-<devaddr>/<devname> 63 * If it wants to change the CSR value as well, the format of the write 64 * operation is: 65 * $ echo "<CSR address>:<CSR value>" > \ 66 * /sys/kernel/debug/idt_csr/<bus>-<devaddr>/<devname>; 67 * CSR address and value can be any of hexadecimal, decimal or octal format. 68 */ 69 70 #include <linux/kernel.h> 71 #include <linux/init.h> 72 #include <linux/module.h> 73 #include <linux/types.h> 74 #include <linux/sizes.h> 75 #include <linux/slab.h> 76 #include <linux/mutex.h> 77 #include <linux/sysfs.h> 78 #include <linux/debugfs.h> 79 #include <linux/mod_devicetable.h> 80 #include <linux/property.h> 81 #include <linux/i2c.h> 82 #include <linux/pci_ids.h> 83 #include <linux/delay.h> 84 85 #define IDT_NAME "89hpesx" 86 #define IDT_89HPESX_DESC "IDT 89HPESx SMBus-slave interface driver" 87 #define IDT_89HPESX_VER "1.0" 88 89 MODULE_DESCRIPTION(IDT_89HPESX_DESC); 90 MODULE_VERSION(IDT_89HPESX_VER); 91 MODULE_LICENSE("GPL v2"); 92 MODULE_AUTHOR("T-platforms"); 93 94 /* 95 * csr_dbgdir - CSR read/write operations Debugfs directory 96 */ 97 static struct dentry *csr_dbgdir; 98 99 /* 100 * struct idt_89hpesx_dev - IDT 89HPESx device data structure 101 * @eesize: Size of EEPROM in bytes (calculated from "idt,eecompatible") 102 * @eero: EEPROM Read-only flag 103 * @eeaddr: EEPROM custom address 104 * 105 * @inieecmd: Initial cmd value for EEPROM read/write operations 106 * @inicsrcmd: Initial cmd value for CSR read/write operations 107 * @iniccode: Initialial command code value for IO-operations 108 * 109 * @csr: CSR address to perform read operation 110 * 111 * @smb_write: SMBus write method 112 * @smb_read: SMBus read method 113 * @smb_mtx: SMBus mutex 114 * 115 * @client: i2c client used to perform IO operations 116 * 117 * @ee_file: EEPROM read/write sysfs-file 118 * @csr_file: CSR read/write debugfs-node 119 */ 120 struct idt_smb_seq; 121 struct idt_89hpesx_dev { 122 u32 eesize; 123 bool eero; 124 u8 eeaddr; 125 126 u8 inieecmd; 127 u8 inicsrcmd; 128 u8 iniccode; 129 130 u16 csr; 131 132 int (*smb_write)(struct idt_89hpesx_dev *, const struct idt_smb_seq *); 133 int (*smb_read)(struct idt_89hpesx_dev *, struct idt_smb_seq *); 134 struct mutex smb_mtx; 135 136 struct i2c_client *client; 137 138 struct bin_attribute *ee_file; 139 struct dentry *csr_dir; 140 struct dentry *csr_file; 141 }; 142 143 /* 144 * struct idt_smb_seq - sequence of data to be read/written from/to IDT 89HPESx 145 * @ccode: SMBus command code 146 * @bytecnt: Byte count of operation 147 * @data: Data to by written 148 */ 149 struct idt_smb_seq { 150 u8 ccode; 151 u8 bytecnt; 152 u8 *data; 153 }; 154 155 /* 156 * struct idt_eeprom_seq - sequence of data to be read/written from/to EEPROM 157 * @cmd: Transaction CMD 158 * @eeaddr: EEPROM custom address 159 * @memaddr: Internal memory address of EEPROM 160 * @data: Data to be written at the memory address 161 */ 162 struct idt_eeprom_seq { 163 u8 cmd; 164 u8 eeaddr; 165 u16 memaddr; 166 u8 data; 167 } __packed; 168 169 /* 170 * struct idt_csr_seq - sequence of data to be read/written from/to CSR 171 * @cmd: Transaction CMD 172 * @csraddr: Internal IDT device CSR address 173 * @data: Data to be read/written from/to the CSR address 174 */ 175 struct idt_csr_seq { 176 u8 cmd; 177 u16 csraddr; 178 u32 data; 179 } __packed; 180 181 /* 182 * SMBus command code macros 183 * @CCODE_END: Indicates the end of transaction 184 * @CCODE_START: Indicates the start of transaction 185 * @CCODE_CSR: CSR read/write transaction 186 * @CCODE_EEPROM: EEPROM read/write transaction 187 * @CCODE_BYTE: Supplied data has BYTE length 188 * @CCODE_WORD: Supplied data has WORD length 189 * @CCODE_BLOCK: Supplied data has variable length passed in bytecnt 190 * byte right following CCODE byte 191 */ 192 #define CCODE_END ((u8)0x01) 193 #define CCODE_START ((u8)0x02) 194 #define CCODE_CSR ((u8)0x00) 195 #define CCODE_EEPROM ((u8)0x04) 196 #define CCODE_BYTE ((u8)0x00) 197 #define CCODE_WORD ((u8)0x20) 198 #define CCODE_BLOCK ((u8)0x40) 199 #define CCODE_PEC ((u8)0x80) 200 201 /* 202 * EEPROM command macros 203 * @EEPROM_OP_WRITE: EEPROM write operation 204 * @EEPROM_OP_READ: EEPROM read operation 205 * @EEPROM_USA: Use specified address of EEPROM 206 * @EEPROM_NAERR: EEPROM device is not ready to respond 207 * @EEPROM_LAERR: EEPROM arbitration loss error 208 * @EEPROM_MSS: EEPROM misplace start & stop bits error 209 * @EEPROM_WR_CNT: Bytes count to perform write operation 210 * @EEPROM_WRRD_CNT: Bytes count to write before reading 211 * @EEPROM_RD_CNT: Bytes count to perform read operation 212 * @EEPROM_DEF_SIZE: Fall back size of EEPROM 213 * @EEPROM_DEF_ADDR: Defatul EEPROM address 214 * @EEPROM_TOUT: Timeout before retry read operation if eeprom is busy 215 */ 216 #define EEPROM_OP_WRITE ((u8)0x00) 217 #define EEPROM_OP_READ ((u8)0x01) 218 #define EEPROM_USA ((u8)0x02) 219 #define EEPROM_NAERR ((u8)0x08) 220 #define EEPROM_LAERR ((u8)0x10) 221 #define EEPROM_MSS ((u8)0x20) 222 #define EEPROM_WR_CNT ((u8)5) 223 #define EEPROM_WRRD_CNT ((u8)4) 224 #define EEPROM_RD_CNT ((u8)5) 225 #define EEPROM_DEF_SIZE ((u16)4096) 226 #define EEPROM_DEF_ADDR ((u8)0x50) 227 #define EEPROM_TOUT (100) 228 229 /* 230 * CSR command macros 231 * @CSR_DWE: Enable all four bytes of the operation 232 * @CSR_OP_WRITE: CSR write operation 233 * @CSR_OP_READ: CSR read operation 234 * @CSR_RERR: Read operation error 235 * @CSR_WERR: Write operation error 236 * @CSR_WR_CNT: Bytes count to perform write operation 237 * @CSR_WRRD_CNT: Bytes count to write before reading 238 * @CSR_RD_CNT: Bytes count to perform read operation 239 * @CSR_MAX: Maximum CSR address 240 * @CSR_DEF: Default CSR address 241 * @CSR_REAL_ADDR: CSR real unshifted address 242 */ 243 #define CSR_DWE ((u8)0x0F) 244 #define CSR_OP_WRITE ((u8)0x00) 245 #define CSR_OP_READ ((u8)0x10) 246 #define CSR_RERR ((u8)0x40) 247 #define CSR_WERR ((u8)0x80) 248 #define CSR_WR_CNT ((u8)7) 249 #define CSR_WRRD_CNT ((u8)3) 250 #define CSR_RD_CNT ((u8)7) 251 #define CSR_MAX ((u32)0x3FFFF) 252 #define CSR_DEF ((u16)0x0000) 253 #define CSR_REAL_ADDR(val) ((unsigned int)val << 2) 254 255 /* 256 * IDT 89HPESx basic register 257 * @IDT_VIDDID_CSR: PCIe VID and DID of IDT 89HPESx 258 * @IDT_VID_MASK: Mask of VID 259 */ 260 #define IDT_VIDDID_CSR ((u32)0x0000) 261 #define IDT_VID_MASK ((u32)0xFFFF) 262 263 /* 264 * IDT 89HPESx can send NACK when new command is sent before previous one 265 * fininshed execution. In this case driver retries operation 266 * certain times. 267 * @RETRY_CNT: Number of retries before giving up and fail 268 * @idt_smb_safe: Generate a retry loop on corresponding SMBus method 269 */ 270 #define RETRY_CNT (128) 271 #define idt_smb_safe(ops, args...) ({ \ 272 int __retry = RETRY_CNT; \ 273 s32 __sts; \ 274 do { \ 275 __sts = i2c_smbus_ ## ops ## _data(args); \ 276 } while (__retry-- && __sts < 0); \ 277 __sts; \ 278 }) 279 280 /*=========================================================================== 281 * i2c bus level IO-operations 282 *=========================================================================== 283 */ 284 285 /* 286 * idt_smb_write_byte() - SMBus write method when I2C_SMBUS_BYTE_DATA operation 287 * is only available 288 * @pdev: Pointer to the driver data 289 * @seq: Sequence of data to be written 290 */ 291 static int idt_smb_write_byte(struct idt_89hpesx_dev *pdev, 292 const struct idt_smb_seq *seq) 293 { 294 s32 sts; 295 u8 ccode; 296 int idx; 297 298 /* Loop over the supplied data sending byte one-by-one */ 299 for (idx = 0; idx < seq->bytecnt; idx++) { 300 /* Collect the command code byte */ 301 ccode = seq->ccode | CCODE_BYTE; 302 if (idx == 0) 303 ccode |= CCODE_START; 304 if (idx == seq->bytecnt - 1) 305 ccode |= CCODE_END; 306 307 /* Send data to the device */ 308 sts = idt_smb_safe(write_byte, pdev->client, ccode, 309 seq->data[idx]); 310 if (sts != 0) 311 return (int)sts; 312 } 313 314 return 0; 315 } 316 317 /* 318 * idt_smb_read_byte() - SMBus read method when I2C_SMBUS_BYTE_DATA operation 319 * is only available 320 * @pdev: Pointer to the driver data 321 * @seq: Buffer to read data to 322 */ 323 static int idt_smb_read_byte(struct idt_89hpesx_dev *pdev, 324 struct idt_smb_seq *seq) 325 { 326 s32 sts; 327 u8 ccode; 328 int idx; 329 330 /* Loop over the supplied buffer receiving byte one-by-one */ 331 for (idx = 0; idx < seq->bytecnt; idx++) { 332 /* Collect the command code byte */ 333 ccode = seq->ccode | CCODE_BYTE; 334 if (idx == 0) 335 ccode |= CCODE_START; 336 if (idx == seq->bytecnt - 1) 337 ccode |= CCODE_END; 338 339 /* Read data from the device */ 340 sts = idt_smb_safe(read_byte, pdev->client, ccode); 341 if (sts < 0) 342 return (int)sts; 343 344 seq->data[idx] = (u8)sts; 345 } 346 347 return 0; 348 } 349 350 /* 351 * idt_smb_write_word() - SMBus write method when I2C_SMBUS_BYTE_DATA and 352 * I2C_FUNC_SMBUS_WORD_DATA operations are available 353 * @pdev: Pointer to the driver data 354 * @seq: Sequence of data to be written 355 */ 356 static int idt_smb_write_word(struct idt_89hpesx_dev *pdev, 357 const struct idt_smb_seq *seq) 358 { 359 s32 sts; 360 u8 ccode; 361 int idx, evencnt; 362 363 /* Calculate the even count of data to send */ 364 evencnt = seq->bytecnt - (seq->bytecnt % 2); 365 366 /* Loop over the supplied data sending two bytes at a time */ 367 for (idx = 0; idx < evencnt; idx += 2) { 368 /* Collect the command code byte */ 369 ccode = seq->ccode | CCODE_WORD; 370 if (idx == 0) 371 ccode |= CCODE_START; 372 if (idx == evencnt - 2) 373 ccode |= CCODE_END; 374 375 /* Send word data to the device */ 376 sts = idt_smb_safe(write_word, pdev->client, ccode, 377 *(u16 *)&seq->data[idx]); 378 if (sts != 0) 379 return (int)sts; 380 } 381 382 /* If there is odd number of bytes then send just one last byte */ 383 if (seq->bytecnt != evencnt) { 384 /* Collect the command code byte */ 385 ccode = seq->ccode | CCODE_BYTE | CCODE_END; 386 if (idx == 0) 387 ccode |= CCODE_START; 388 389 /* Send byte data to the device */ 390 sts = idt_smb_safe(write_byte, pdev->client, ccode, 391 seq->data[idx]); 392 if (sts != 0) 393 return (int)sts; 394 } 395 396 return 0; 397 } 398 399 /* 400 * idt_smb_read_word() - SMBus read method when I2C_SMBUS_BYTE_DATA and 401 * I2C_FUNC_SMBUS_WORD_DATA operations are available 402 * @pdev: Pointer to the driver data 403 * @seq: Buffer to read data to 404 */ 405 static int idt_smb_read_word(struct idt_89hpesx_dev *pdev, 406 struct idt_smb_seq *seq) 407 { 408 s32 sts; 409 u8 ccode; 410 int idx, evencnt; 411 412 /* Calculate the even count of data to send */ 413 evencnt = seq->bytecnt - (seq->bytecnt % 2); 414 415 /* Loop over the supplied data reading two bytes at a time */ 416 for (idx = 0; idx < evencnt; idx += 2) { 417 /* Collect the command code byte */ 418 ccode = seq->ccode | CCODE_WORD; 419 if (idx == 0) 420 ccode |= CCODE_START; 421 if (idx == evencnt - 2) 422 ccode |= CCODE_END; 423 424 /* Read word data from the device */ 425 sts = idt_smb_safe(read_word, pdev->client, ccode); 426 if (sts < 0) 427 return (int)sts; 428 429 *(u16 *)&seq->data[idx] = (u16)sts; 430 } 431 432 /* If there is odd number of bytes then receive just one last byte */ 433 if (seq->bytecnt != evencnt) { 434 /* Collect the command code byte */ 435 ccode = seq->ccode | CCODE_BYTE | CCODE_END; 436 if (idx == 0) 437 ccode |= CCODE_START; 438 439 /* Read last data byte from the device */ 440 sts = idt_smb_safe(read_byte, pdev->client, ccode); 441 if (sts < 0) 442 return (int)sts; 443 444 seq->data[idx] = (u8)sts; 445 } 446 447 return 0; 448 } 449 450 /* 451 * idt_smb_write_block() - SMBus write method when I2C_SMBUS_BLOCK_DATA 452 * operation is available 453 * @pdev: Pointer to the driver data 454 * @seq: Sequence of data to be written 455 */ 456 static int idt_smb_write_block(struct idt_89hpesx_dev *pdev, 457 const struct idt_smb_seq *seq) 458 { 459 u8 ccode; 460 461 /* Return error if too much data passed to send */ 462 if (seq->bytecnt > I2C_SMBUS_BLOCK_MAX) 463 return -EINVAL; 464 465 /* Collect the command code byte */ 466 ccode = seq->ccode | CCODE_BLOCK | CCODE_START | CCODE_END; 467 468 /* Send block of data to the device */ 469 return idt_smb_safe(write_block, pdev->client, ccode, seq->bytecnt, 470 seq->data); 471 } 472 473 /* 474 * idt_smb_read_block() - SMBus read method when I2C_SMBUS_BLOCK_DATA 475 * operation is available 476 * @pdev: Pointer to the driver data 477 * @seq: Buffer to read data to 478 */ 479 static int idt_smb_read_block(struct idt_89hpesx_dev *pdev, 480 struct idt_smb_seq *seq) 481 { 482 s32 sts; 483 u8 ccode; 484 485 /* Return error if too much data passed to send */ 486 if (seq->bytecnt > I2C_SMBUS_BLOCK_MAX) 487 return -EINVAL; 488 489 /* Collect the command code byte */ 490 ccode = seq->ccode | CCODE_BLOCK | CCODE_START | CCODE_END; 491 492 /* Read block of data from the device */ 493 sts = idt_smb_safe(read_block, pdev->client, ccode, seq->data); 494 if (sts != seq->bytecnt) 495 return (sts < 0 ? sts : -ENODATA); 496 497 return 0; 498 } 499 500 /* 501 * idt_smb_write_i2c_block() - SMBus write method when I2C_SMBUS_I2C_BLOCK_DATA 502 * operation is available 503 * @pdev: Pointer to the driver data 504 * @seq: Sequence of data to be written 505 * 506 * NOTE It's usual SMBus write block operation, except the actual data length is 507 * sent as first byte of data 508 */ 509 static int idt_smb_write_i2c_block(struct idt_89hpesx_dev *pdev, 510 const struct idt_smb_seq *seq) 511 { 512 u8 ccode, buf[I2C_SMBUS_BLOCK_MAX + 1]; 513 514 /* Return error if too much data passed to send */ 515 if (seq->bytecnt > I2C_SMBUS_BLOCK_MAX) 516 return -EINVAL; 517 518 /* Collect the data to send. Length byte must be added prior the data */ 519 buf[0] = seq->bytecnt; 520 memcpy(&buf[1], seq->data, seq->bytecnt); 521 522 /* Collect the command code byte */ 523 ccode = seq->ccode | CCODE_BLOCK | CCODE_START | CCODE_END; 524 525 /* Send length and block of data to the device */ 526 return idt_smb_safe(write_i2c_block, pdev->client, ccode, 527 seq->bytecnt + 1, buf); 528 } 529 530 /* 531 * idt_smb_read_i2c_block() - SMBus read method when I2C_SMBUS_I2C_BLOCK_DATA 532 * operation is available 533 * @pdev: Pointer to the driver data 534 * @seq: Buffer to read data to 535 * 536 * NOTE It's usual SMBus read block operation, except the actual data length is 537 * retrieved as first byte of data 538 */ 539 static int idt_smb_read_i2c_block(struct idt_89hpesx_dev *pdev, 540 struct idt_smb_seq *seq) 541 { 542 u8 ccode, buf[I2C_SMBUS_BLOCK_MAX + 1]; 543 s32 sts; 544 545 /* Return error if too much data passed to send */ 546 if (seq->bytecnt > I2C_SMBUS_BLOCK_MAX) 547 return -EINVAL; 548 549 /* Collect the command code byte */ 550 ccode = seq->ccode | CCODE_BLOCK | CCODE_START | CCODE_END; 551 552 /* Read length and block of data from the device */ 553 sts = idt_smb_safe(read_i2c_block, pdev->client, ccode, 554 seq->bytecnt + 1, buf); 555 if (sts != seq->bytecnt + 1) 556 return (sts < 0 ? sts : -ENODATA); 557 if (buf[0] != seq->bytecnt) 558 return -ENODATA; 559 560 /* Copy retrieved data to the output data buffer */ 561 memcpy(seq->data, &buf[1], seq->bytecnt); 562 563 return 0; 564 } 565 566 /*=========================================================================== 567 * EEPROM IO-operations 568 *=========================================================================== 569 */ 570 571 /* 572 * idt_eeprom_read_byte() - read just one byte from EEPROM 573 * @pdev: Pointer to the driver data 574 * @memaddr: Start EEPROM memory address 575 * @data: Data to be written to EEPROM 576 */ 577 static int idt_eeprom_read_byte(struct idt_89hpesx_dev *pdev, u16 memaddr, 578 u8 *data) 579 { 580 struct device *dev = &pdev->client->dev; 581 struct idt_eeprom_seq eeseq; 582 struct idt_smb_seq smbseq; 583 int ret, retry; 584 585 /* Initialize SMBus sequence fields */ 586 smbseq.ccode = pdev->iniccode | CCODE_EEPROM; 587 smbseq.data = (u8 *)&eeseq; 588 589 /* 590 * Sometimes EEPROM may respond with NACK if it's busy with previous 591 * operation, so we need to perform a few attempts of read cycle 592 */ 593 retry = RETRY_CNT; 594 do { 595 /* Send EEPROM memory address to read data from */ 596 smbseq.bytecnt = EEPROM_WRRD_CNT; 597 eeseq.cmd = pdev->inieecmd | EEPROM_OP_READ; 598 eeseq.eeaddr = pdev->eeaddr; 599 eeseq.memaddr = cpu_to_le16(memaddr); 600 ret = pdev->smb_write(pdev, &smbseq); 601 if (ret != 0) { 602 dev_err(dev, "Failed to init eeprom addr 0x%02hhx", 603 memaddr); 604 break; 605 } 606 607 /* Perform read operation */ 608 smbseq.bytecnt = EEPROM_RD_CNT; 609 ret = pdev->smb_read(pdev, &smbseq); 610 if (ret != 0) { 611 dev_err(dev, "Failed to read eeprom data 0x%02hhx", 612 memaddr); 613 break; 614 } 615 616 /* Restart read operation if the device is busy */ 617 if (retry && (eeseq.cmd & EEPROM_NAERR)) { 618 dev_dbg(dev, "EEPROM busy, retry reading after %d ms", 619 EEPROM_TOUT); 620 msleep(EEPROM_TOUT); 621 continue; 622 } 623 624 /* Check whether IDT successfully read data from EEPROM */ 625 if (eeseq.cmd & (EEPROM_NAERR | EEPROM_LAERR | EEPROM_MSS)) { 626 dev_err(dev, 627 "Communication with eeprom failed, cmd 0x%hhx", 628 eeseq.cmd); 629 ret = -EREMOTEIO; 630 break; 631 } 632 633 /* Save retrieved data and exit the loop */ 634 *data = eeseq.data; 635 break; 636 } while (retry--); 637 638 /* Return the status of operation */ 639 return ret; 640 } 641 642 /* 643 * idt_eeprom_write() - EEPROM write operation 644 * @pdev: Pointer to the driver data 645 * @memaddr: Start EEPROM memory address 646 * @len: Length of data to be written 647 * @data: Data to be written to EEPROM 648 */ 649 static int idt_eeprom_write(struct idt_89hpesx_dev *pdev, u16 memaddr, u16 len, 650 const u8 *data) 651 { 652 struct device *dev = &pdev->client->dev; 653 struct idt_eeprom_seq eeseq; 654 struct idt_smb_seq smbseq; 655 int ret; 656 u16 idx; 657 658 /* Initialize SMBus sequence fields */ 659 smbseq.ccode = pdev->iniccode | CCODE_EEPROM; 660 smbseq.data = (u8 *)&eeseq; 661 662 /* Send data byte-by-byte, checking if it is successfully written */ 663 for (idx = 0; idx < len; idx++, memaddr++) { 664 /* Lock IDT SMBus device */ 665 mutex_lock(&pdev->smb_mtx); 666 667 /* Perform write operation */ 668 smbseq.bytecnt = EEPROM_WR_CNT; 669 eeseq.cmd = pdev->inieecmd | EEPROM_OP_WRITE; 670 eeseq.eeaddr = pdev->eeaddr; 671 eeseq.memaddr = cpu_to_le16(memaddr); 672 eeseq.data = data[idx]; 673 ret = pdev->smb_write(pdev, &smbseq); 674 if (ret != 0) { 675 dev_err(dev, 676 "Failed to write 0x%04hx:0x%02hhx to eeprom", 677 memaddr, data[idx]); 678 goto err_mutex_unlock; 679 } 680 681 /* 682 * Check whether the data is successfully written by reading 683 * from the same EEPROM memory address. 684 */ 685 eeseq.data = ~data[idx]; 686 ret = idt_eeprom_read_byte(pdev, memaddr, &eeseq.data); 687 if (ret != 0) 688 goto err_mutex_unlock; 689 690 /* Check whether the read byte is the same as written one */ 691 if (eeseq.data != data[idx]) { 692 dev_err(dev, "Values don't match 0x%02hhx != 0x%02hhx", 693 eeseq.data, data[idx]); 694 ret = -EREMOTEIO; 695 goto err_mutex_unlock; 696 } 697 698 /* Unlock IDT SMBus device */ 699 err_mutex_unlock: 700 mutex_unlock(&pdev->smb_mtx); 701 if (ret != 0) 702 return ret; 703 } 704 705 return 0; 706 } 707 708 /* 709 * idt_eeprom_read() - EEPROM read operation 710 * @pdev: Pointer to the driver data 711 * @memaddr: Start EEPROM memory address 712 * @len: Length of data to read 713 * @buf: Buffer to read data to 714 */ 715 static int idt_eeprom_read(struct idt_89hpesx_dev *pdev, u16 memaddr, u16 len, 716 u8 *buf) 717 { 718 int ret; 719 u16 idx; 720 721 /* Read data byte-by-byte, retrying if it wasn't successful */ 722 for (idx = 0; idx < len; idx++, memaddr++) { 723 /* Lock IDT SMBus device */ 724 mutex_lock(&pdev->smb_mtx); 725 726 /* Just read the byte to the buffer */ 727 ret = idt_eeprom_read_byte(pdev, memaddr, &buf[idx]); 728 729 /* Unlock IDT SMBus device */ 730 mutex_unlock(&pdev->smb_mtx); 731 732 /* Return error if read operation failed */ 733 if (ret != 0) 734 return ret; 735 } 736 737 return 0; 738 } 739 740 /*=========================================================================== 741 * CSR IO-operations 742 *=========================================================================== 743 */ 744 745 /* 746 * idt_csr_write() - CSR write operation 747 * @pdev: Pointer to the driver data 748 * @csraddr: CSR address (with no two LS bits) 749 * @data: Data to be written to CSR 750 */ 751 static int idt_csr_write(struct idt_89hpesx_dev *pdev, u16 csraddr, 752 const u32 data) 753 { 754 struct device *dev = &pdev->client->dev; 755 struct idt_csr_seq csrseq; 756 struct idt_smb_seq smbseq; 757 int ret; 758 759 /* Initialize SMBus sequence fields */ 760 smbseq.ccode = pdev->iniccode | CCODE_CSR; 761 smbseq.data = (u8 *)&csrseq; 762 763 /* Lock IDT SMBus device */ 764 mutex_lock(&pdev->smb_mtx); 765 766 /* Perform write operation */ 767 smbseq.bytecnt = CSR_WR_CNT; 768 csrseq.cmd = pdev->inicsrcmd | CSR_OP_WRITE; 769 csrseq.csraddr = cpu_to_le16(csraddr); 770 csrseq.data = cpu_to_le32(data); 771 ret = pdev->smb_write(pdev, &smbseq); 772 if (ret != 0) { 773 dev_err(dev, "Failed to write 0x%04x: 0x%04x to csr", 774 CSR_REAL_ADDR(csraddr), data); 775 goto err_mutex_unlock; 776 } 777 778 /* Send CSR address to read data from */ 779 smbseq.bytecnt = CSR_WRRD_CNT; 780 csrseq.cmd = pdev->inicsrcmd | CSR_OP_READ; 781 ret = pdev->smb_write(pdev, &smbseq); 782 if (ret != 0) { 783 dev_err(dev, "Failed to init csr address 0x%04x", 784 CSR_REAL_ADDR(csraddr)); 785 goto err_mutex_unlock; 786 } 787 788 /* Perform read operation */ 789 smbseq.bytecnt = CSR_RD_CNT; 790 ret = pdev->smb_read(pdev, &smbseq); 791 if (ret != 0) { 792 dev_err(dev, "Failed to read csr 0x%04x", 793 CSR_REAL_ADDR(csraddr)); 794 goto err_mutex_unlock; 795 } 796 797 /* Check whether IDT successfully retrieved CSR data */ 798 if (csrseq.cmd & (CSR_RERR | CSR_WERR)) { 799 dev_err(dev, "IDT failed to perform CSR r/w"); 800 ret = -EREMOTEIO; 801 goto err_mutex_unlock; 802 } 803 804 /* Unlock IDT SMBus device */ 805 err_mutex_unlock: 806 mutex_unlock(&pdev->smb_mtx); 807 808 return ret; 809 } 810 811 /* 812 * idt_csr_read() - CSR read operation 813 * @pdev: Pointer to the driver data 814 * @csraddr: CSR address (with no two LS bits) 815 * @data: Data to be written to CSR 816 */ 817 static int idt_csr_read(struct idt_89hpesx_dev *pdev, u16 csraddr, u32 *data) 818 { 819 struct device *dev = &pdev->client->dev; 820 struct idt_csr_seq csrseq; 821 struct idt_smb_seq smbseq; 822 int ret; 823 824 /* Initialize SMBus sequence fields */ 825 smbseq.ccode = pdev->iniccode | CCODE_CSR; 826 smbseq.data = (u8 *)&csrseq; 827 828 /* Lock IDT SMBus device */ 829 mutex_lock(&pdev->smb_mtx); 830 831 /* Send CSR register address before reading it */ 832 smbseq.bytecnt = CSR_WRRD_CNT; 833 csrseq.cmd = pdev->inicsrcmd | CSR_OP_READ; 834 csrseq.csraddr = cpu_to_le16(csraddr); 835 ret = pdev->smb_write(pdev, &smbseq); 836 if (ret != 0) { 837 dev_err(dev, "Failed to init csr address 0x%04x", 838 CSR_REAL_ADDR(csraddr)); 839 goto err_mutex_unlock; 840 } 841 842 /* Perform read operation */ 843 smbseq.bytecnt = CSR_RD_CNT; 844 ret = pdev->smb_read(pdev, &smbseq); 845 if (ret != 0) { 846 dev_err(dev, "Failed to read csr 0x%04hx", 847 CSR_REAL_ADDR(csraddr)); 848 goto err_mutex_unlock; 849 } 850 851 /* Check whether IDT successfully retrieved CSR data */ 852 if (csrseq.cmd & (CSR_RERR | CSR_WERR)) { 853 dev_err(dev, "IDT failed to perform CSR r/w"); 854 ret = -EREMOTEIO; 855 goto err_mutex_unlock; 856 } 857 858 /* Save data retrieved from IDT */ 859 *data = le32_to_cpu(csrseq.data); 860 861 /* Unlock IDT SMBus device */ 862 err_mutex_unlock: 863 mutex_unlock(&pdev->smb_mtx); 864 865 return ret; 866 } 867 868 /*=========================================================================== 869 * Sysfs/debugfs-nodes IO-operations 870 *=========================================================================== 871 */ 872 873 /* 874 * eeprom_write() - EEPROM sysfs-node write callback 875 * @filep: Pointer to the file system node 876 * @kobj: Pointer to the kernel object related to the sysfs-node 877 * @attr: Attributes of the file 878 * @buf: Buffer to write data to 879 * @off: Offset at which data should be written to 880 * @count: Number of bytes to write 881 */ 882 static ssize_t eeprom_write(struct file *filp, struct kobject *kobj, 883 struct bin_attribute *attr, 884 char *buf, loff_t off, size_t count) 885 { 886 struct idt_89hpesx_dev *pdev; 887 int ret; 888 889 /* Retrieve driver data */ 890 pdev = dev_get_drvdata(kobj_to_dev(kobj)); 891 892 /* Perform EEPROM write operation */ 893 ret = idt_eeprom_write(pdev, (u16)off, (u16)count, (u8 *)buf); 894 return (ret != 0 ? ret : count); 895 } 896 897 /* 898 * eeprom_read() - EEPROM sysfs-node read callback 899 * @filep: Pointer to the file system node 900 * @kobj: Pointer to the kernel object related to the sysfs-node 901 * @attr: Attributes of the file 902 * @buf: Buffer to write data to 903 * @off: Offset at which data should be written to 904 * @count: Number of bytes to write 905 */ 906 static ssize_t eeprom_read(struct file *filp, struct kobject *kobj, 907 struct bin_attribute *attr, 908 char *buf, loff_t off, size_t count) 909 { 910 struct idt_89hpesx_dev *pdev; 911 int ret; 912 913 /* Retrieve driver data */ 914 pdev = dev_get_drvdata(kobj_to_dev(kobj)); 915 916 /* Perform EEPROM read operation */ 917 ret = idt_eeprom_read(pdev, (u16)off, (u16)count, (u8 *)buf); 918 return (ret != 0 ? ret : count); 919 } 920 921 /* 922 * idt_dbgfs_csr_write() - CSR debugfs-node write callback 923 * @filep: Pointer to the file system file descriptor 924 * @buf: Buffer to read data from 925 * @count: Size of the buffer 926 * @offp: Offset within the file 927 * 928 * It accepts either "0x<reg addr>:0x<value>" for saving register address 929 * and writing value to specified DWORD register or "0x<reg addr>" for 930 * just saving register address in order to perform next read operation. 931 * 932 * WARNING No spaces are allowed. Incoming string must be strictly formated as: 933 * "<reg addr>:<value>". Register address must be aligned within 4 bytes 934 * (one DWORD). 935 */ 936 static ssize_t idt_dbgfs_csr_write(struct file *filep, const char __user *ubuf, 937 size_t count, loff_t *offp) 938 { 939 struct idt_89hpesx_dev *pdev = filep->private_data; 940 char *colon_ch, *csraddr_str, *csrval_str; 941 int ret, csraddr_len, csrval_len; 942 u32 csraddr, csrval; 943 char *buf; 944 945 /* Copy data from User-space */ 946 buf = kmalloc(count + 1, GFP_KERNEL); 947 if (!buf) 948 return -ENOMEM; 949 950 ret = simple_write_to_buffer(buf, count, offp, ubuf, count); 951 if (ret < 0) 952 goto free_buf; 953 buf[count] = 0; 954 955 /* Find position of colon in the buffer */ 956 colon_ch = strnchr(buf, count, ':'); 957 958 /* 959 * If there is colon passed then new CSR value should be parsed as 960 * well, so allocate buffer for CSR address substring. 961 * If no colon is found, then string must have just one number with 962 * no new CSR value 963 */ 964 if (colon_ch != NULL) { 965 csraddr_len = colon_ch - buf; 966 csraddr_str = 967 kmalloc(csraddr_len + 1, GFP_KERNEL); 968 if (csraddr_str == NULL) { 969 ret = -ENOMEM; 970 goto free_buf; 971 } 972 /* Copy the register address to the substring buffer */ 973 strncpy(csraddr_str, buf, csraddr_len); 974 csraddr_str[csraddr_len] = '\0'; 975 /* Register value must follow the colon */ 976 csrval_str = colon_ch + 1; 977 csrval_len = strnlen(csrval_str, count - csraddr_len); 978 } else /* if (str_colon == NULL) */ { 979 csraddr_str = (char *)buf; /* Just to shut warning up */ 980 csraddr_len = strnlen(csraddr_str, count); 981 csrval_str = NULL; 982 csrval_len = 0; 983 } 984 985 /* Convert CSR address to u32 value */ 986 ret = kstrtou32(csraddr_str, 0, &csraddr); 987 if (ret != 0) 988 goto free_csraddr_str; 989 990 /* Check whether passed register address is valid */ 991 if (csraddr > CSR_MAX || !IS_ALIGNED(csraddr, SZ_4)) { 992 ret = -EINVAL; 993 goto free_csraddr_str; 994 } 995 996 /* Shift register address to the right so to have u16 address */ 997 pdev->csr = (csraddr >> 2); 998 999 /* Parse new CSR value and send it to IDT, if colon has been found */ 1000 if (colon_ch != NULL) { 1001 ret = kstrtou32(csrval_str, 0, &csrval); 1002 if (ret != 0) 1003 goto free_csraddr_str; 1004 1005 ret = idt_csr_write(pdev, pdev->csr, csrval); 1006 if (ret != 0) 1007 goto free_csraddr_str; 1008 } 1009 1010 /* Free memory only if colon has been found */ 1011 free_csraddr_str: 1012 if (colon_ch != NULL) 1013 kfree(csraddr_str); 1014 1015 /* Free buffer allocated for data retrieved from User-space */ 1016 free_buf: 1017 kfree(buf); 1018 1019 return (ret != 0 ? ret : count); 1020 } 1021 1022 /* 1023 * idt_dbgfs_csr_read() - CSR debugfs-node read callback 1024 * @filep: Pointer to the file system file descriptor 1025 * @buf: Buffer to write data to 1026 * @count: Size of the buffer 1027 * @offp: Offset within the file 1028 * 1029 * It just prints the pair "0x<reg addr>:0x<value>" to passed buffer. 1030 */ 1031 #define CSRBUF_SIZE ((size_t)32) 1032 static ssize_t idt_dbgfs_csr_read(struct file *filep, char __user *ubuf, 1033 size_t count, loff_t *offp) 1034 { 1035 struct idt_89hpesx_dev *pdev = filep->private_data; 1036 u32 csraddr, csrval; 1037 char buf[CSRBUF_SIZE]; 1038 int ret, size; 1039 1040 /* Perform CSR read operation */ 1041 ret = idt_csr_read(pdev, pdev->csr, &csrval); 1042 if (ret != 0) 1043 return ret; 1044 1045 /* Shift register address to the left so to have real address */ 1046 csraddr = ((u32)pdev->csr << 2); 1047 1048 /* Print the "0x<reg addr>:0x<value>" to buffer */ 1049 size = snprintf(buf, CSRBUF_SIZE, "0x%05x:0x%08x\n", 1050 (unsigned int)csraddr, (unsigned int)csrval); 1051 1052 /* Copy data to User-space */ 1053 return simple_read_from_buffer(ubuf, count, offp, buf, size); 1054 } 1055 1056 /* 1057 * eeprom_attribute - EEPROM sysfs-node attributes 1058 * 1059 * NOTE Size will be changed in compliance with OF node. EEPROM attribute will 1060 * be read-only as well if the corresponding flag is specified in OF node. 1061 */ 1062 static BIN_ATTR_RW(eeprom, EEPROM_DEF_SIZE); 1063 1064 /* 1065 * csr_dbgfs_ops - CSR debugfs-node read/write operations 1066 */ 1067 static const struct file_operations csr_dbgfs_ops = { 1068 .owner = THIS_MODULE, 1069 .open = simple_open, 1070 .write = idt_dbgfs_csr_write, 1071 .read = idt_dbgfs_csr_read 1072 }; 1073 1074 /*=========================================================================== 1075 * Driver init/deinit methods 1076 *=========================================================================== 1077 */ 1078 1079 /* 1080 * idt_set_defval() - disable EEPROM access by default 1081 * @pdev: Pointer to the driver data 1082 */ 1083 static void idt_set_defval(struct idt_89hpesx_dev *pdev) 1084 { 1085 /* If OF info is missing then use next values */ 1086 pdev->eesize = 0; 1087 pdev->eero = true; 1088 pdev->inieecmd = 0; 1089 pdev->eeaddr = 0; 1090 } 1091 1092 static const struct i2c_device_id ee_ids[]; 1093 1094 /* 1095 * idt_ee_match_id() - check whether the node belongs to compatible EEPROMs 1096 */ 1097 static const struct i2c_device_id *idt_ee_match_id(struct fwnode_handle *fwnode) 1098 { 1099 const struct i2c_device_id *id = ee_ids; 1100 const char *compatible, *p; 1101 char devname[I2C_NAME_SIZE]; 1102 int ret; 1103 1104 ret = fwnode_property_read_string(fwnode, "compatible", &compatible); 1105 if (ret) 1106 return NULL; 1107 1108 p = strchr(compatible, ','); 1109 strlcpy(devname, p ? p + 1 : compatible, sizeof(devname)); 1110 /* Search through the device name */ 1111 while (id->name[0]) { 1112 if (strcmp(devname, id->name) == 0) 1113 return id; 1114 id++; 1115 } 1116 return NULL; 1117 } 1118 1119 /* 1120 * idt_get_fw_data() - get IDT i2c-device parameters from device tree 1121 * @pdev: Pointer to the driver data 1122 */ 1123 static void idt_get_fw_data(struct idt_89hpesx_dev *pdev) 1124 { 1125 struct device *dev = &pdev->client->dev; 1126 struct fwnode_handle *fwnode; 1127 const struct i2c_device_id *ee_id = NULL; 1128 u32 eeprom_addr; 1129 int ret; 1130 1131 device_for_each_child_node(dev, fwnode) { 1132 ee_id = idt_ee_match_id(fwnode); 1133 if (IS_ERR_OR_NULL(ee_id)) { 1134 dev_warn(dev, "Skip unsupported EEPROM device"); 1135 continue; 1136 } else 1137 break; 1138 } 1139 1140 /* If there is no fwnode EEPROM device, then set zero size */ 1141 if (!ee_id) { 1142 dev_warn(dev, "No fwnode, EEPROM access disabled"); 1143 idt_set_defval(pdev); 1144 return; 1145 } 1146 1147 /* Retrieve EEPROM size */ 1148 pdev->eesize = (u32)ee_id->driver_data; 1149 1150 /* Get custom EEPROM address from 'reg' attribute */ 1151 ret = fwnode_property_read_u32(fwnode, "reg", &eeprom_addr); 1152 if (ret || (eeprom_addr == 0)) { 1153 dev_warn(dev, "No EEPROM reg found, use default address 0x%x", 1154 EEPROM_DEF_ADDR); 1155 pdev->inieecmd = 0; 1156 pdev->eeaddr = EEPROM_DEF_ADDR << 1; 1157 } else { 1158 pdev->inieecmd = EEPROM_USA; 1159 pdev->eeaddr = eeprom_addr << 1; 1160 } 1161 1162 /* Check EEPROM 'read-only' flag */ 1163 if (fwnode_property_read_bool(fwnode, "read-only")) 1164 pdev->eero = true; 1165 else /* if (!fwnode_property_read_bool(node, "read-only")) */ 1166 pdev->eero = false; 1167 1168 dev_info(dev, "EEPROM of %d bytes found by 0x%x", 1169 pdev->eesize, pdev->eeaddr); 1170 } 1171 1172 /* 1173 * idt_create_pdev() - create and init data structure of the driver 1174 * @client: i2c client of IDT PCIe-switch device 1175 */ 1176 static struct idt_89hpesx_dev *idt_create_pdev(struct i2c_client *client) 1177 { 1178 struct idt_89hpesx_dev *pdev; 1179 1180 /* Allocate memory for driver data */ 1181 pdev = devm_kmalloc(&client->dev, sizeof(struct idt_89hpesx_dev), 1182 GFP_KERNEL); 1183 if (pdev == NULL) 1184 return ERR_PTR(-ENOMEM); 1185 1186 /* Initialize basic fields of the data */ 1187 pdev->client = client; 1188 i2c_set_clientdata(client, pdev); 1189 1190 /* Read firmware nodes information */ 1191 idt_get_fw_data(pdev); 1192 1193 /* Initialize basic CSR CMD field - use full DWORD-sized r/w ops */ 1194 pdev->inicsrcmd = CSR_DWE; 1195 pdev->csr = CSR_DEF; 1196 1197 /* Enable Packet Error Checking if it's supported by adapter */ 1198 if (i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_PEC)) { 1199 pdev->iniccode = CCODE_PEC; 1200 client->flags |= I2C_CLIENT_PEC; 1201 } else /* PEC is unsupported */ { 1202 pdev->iniccode = 0; 1203 } 1204 1205 return pdev; 1206 } 1207 1208 /* 1209 * idt_free_pdev() - free data structure of the driver 1210 * @pdev: Pointer to the driver data 1211 */ 1212 static void idt_free_pdev(struct idt_89hpesx_dev *pdev) 1213 { 1214 /* Clear driver data from device private field */ 1215 i2c_set_clientdata(pdev->client, NULL); 1216 } 1217 1218 /* 1219 * idt_set_smbus_ops() - set supported SMBus operations 1220 * @pdev: Pointer to the driver data 1221 * Return status of smbus check operations 1222 */ 1223 static int idt_set_smbus_ops(struct idt_89hpesx_dev *pdev) 1224 { 1225 struct i2c_adapter *adapter = pdev->client->adapter; 1226 struct device *dev = &pdev->client->dev; 1227 1228 /* Check i2c adapter read functionality */ 1229 if (i2c_check_functionality(adapter, 1230 I2C_FUNC_SMBUS_READ_BLOCK_DATA)) { 1231 pdev->smb_read = idt_smb_read_block; 1232 dev_dbg(dev, "SMBus block-read op chosen"); 1233 } else if (i2c_check_functionality(adapter, 1234 I2C_FUNC_SMBUS_READ_I2C_BLOCK)) { 1235 pdev->smb_read = idt_smb_read_i2c_block; 1236 dev_dbg(dev, "SMBus i2c-block-read op chosen"); 1237 } else if (i2c_check_functionality(adapter, 1238 I2C_FUNC_SMBUS_READ_WORD_DATA) && 1239 i2c_check_functionality(adapter, 1240 I2C_FUNC_SMBUS_READ_BYTE_DATA)) { 1241 pdev->smb_read = idt_smb_read_word; 1242 dev_warn(dev, "Use slow word/byte SMBus read ops"); 1243 } else if (i2c_check_functionality(adapter, 1244 I2C_FUNC_SMBUS_READ_BYTE_DATA)) { 1245 pdev->smb_read = idt_smb_read_byte; 1246 dev_warn(dev, "Use slow byte SMBus read op"); 1247 } else /* no supported smbus read operations */ { 1248 dev_err(dev, "No supported SMBus read op"); 1249 return -EPFNOSUPPORT; 1250 } 1251 1252 /* Check i2c adapter write functionality */ 1253 if (i2c_check_functionality(adapter, 1254 I2C_FUNC_SMBUS_WRITE_BLOCK_DATA)) { 1255 pdev->smb_write = idt_smb_write_block; 1256 dev_dbg(dev, "SMBus block-write op chosen"); 1257 } else if (i2c_check_functionality(adapter, 1258 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)) { 1259 pdev->smb_write = idt_smb_write_i2c_block; 1260 dev_dbg(dev, "SMBus i2c-block-write op chosen"); 1261 } else if (i2c_check_functionality(adapter, 1262 I2C_FUNC_SMBUS_WRITE_WORD_DATA) && 1263 i2c_check_functionality(adapter, 1264 I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) { 1265 pdev->smb_write = idt_smb_write_word; 1266 dev_warn(dev, "Use slow word/byte SMBus write op"); 1267 } else if (i2c_check_functionality(adapter, 1268 I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) { 1269 pdev->smb_write = idt_smb_write_byte; 1270 dev_warn(dev, "Use slow byte SMBus write op"); 1271 } else /* no supported smbus write operations */ { 1272 dev_err(dev, "No supported SMBus write op"); 1273 return -EPFNOSUPPORT; 1274 } 1275 1276 /* Initialize IDT SMBus slave interface mutex */ 1277 mutex_init(&pdev->smb_mtx); 1278 1279 return 0; 1280 } 1281 1282 /* 1283 * idt_check_dev() - check whether it's really IDT 89HPESx device 1284 * @pdev: Pointer to the driver data 1285 * Return status of i2c adapter check operation 1286 */ 1287 static int idt_check_dev(struct idt_89hpesx_dev *pdev) 1288 { 1289 struct device *dev = &pdev->client->dev; 1290 u32 viddid; 1291 int ret; 1292 1293 /* Read VID and DID directly from IDT memory space */ 1294 ret = idt_csr_read(pdev, IDT_VIDDID_CSR, &viddid); 1295 if (ret != 0) { 1296 dev_err(dev, "Failed to read VID/DID"); 1297 return ret; 1298 } 1299 1300 /* Check whether it's IDT device */ 1301 if ((viddid & IDT_VID_MASK) != PCI_VENDOR_ID_IDT) { 1302 dev_err(dev, "Got unsupported VID/DID: 0x%08x", viddid); 1303 return -ENODEV; 1304 } 1305 1306 dev_info(dev, "Found IDT 89HPES device VID:0x%04x, DID:0x%04x", 1307 (viddid & IDT_VID_MASK), (viddid >> 16)); 1308 1309 return 0; 1310 } 1311 1312 /* 1313 * idt_create_sysfs_files() - create sysfs attribute files 1314 * @pdev: Pointer to the driver data 1315 * Return status of operation 1316 */ 1317 static int idt_create_sysfs_files(struct idt_89hpesx_dev *pdev) 1318 { 1319 struct device *dev = &pdev->client->dev; 1320 int ret; 1321 1322 /* Don't do anything if EEPROM isn't accessible */ 1323 if (pdev->eesize == 0) { 1324 dev_dbg(dev, "Skip creating sysfs-files"); 1325 return 0; 1326 } 1327 1328 /* Allocate memory for attribute file */ 1329 pdev->ee_file = devm_kmalloc(dev, sizeof(*pdev->ee_file), GFP_KERNEL); 1330 if (!pdev->ee_file) 1331 return -ENOMEM; 1332 1333 /* Copy the declared EEPROM attr structure to change some of fields */ 1334 memcpy(pdev->ee_file, &bin_attr_eeprom, sizeof(*pdev->ee_file)); 1335 1336 /* In case of read-only EEPROM get rid of write ability */ 1337 if (pdev->eero) { 1338 pdev->ee_file->attr.mode &= ~0200; 1339 pdev->ee_file->write = NULL; 1340 } 1341 /* Create EEPROM sysfs file */ 1342 pdev->ee_file->size = pdev->eesize; 1343 ret = sysfs_create_bin_file(&dev->kobj, pdev->ee_file); 1344 if (ret != 0) { 1345 dev_err(dev, "Failed to create EEPROM sysfs-node"); 1346 return ret; 1347 } 1348 1349 return 0; 1350 } 1351 1352 /* 1353 * idt_remove_sysfs_files() - remove sysfs attribute files 1354 * @pdev: Pointer to the driver data 1355 */ 1356 static void idt_remove_sysfs_files(struct idt_89hpesx_dev *pdev) 1357 { 1358 struct device *dev = &pdev->client->dev; 1359 1360 /* Don't do anything if EEPROM wasn't accessible */ 1361 if (pdev->eesize == 0) 1362 return; 1363 1364 /* Remove EEPROM sysfs file */ 1365 sysfs_remove_bin_file(&dev->kobj, pdev->ee_file); 1366 } 1367 1368 /* 1369 * idt_create_dbgfs_files() - create debugfs files 1370 * @pdev: Pointer to the driver data 1371 */ 1372 #define CSRNAME_LEN ((size_t)32) 1373 static void idt_create_dbgfs_files(struct idt_89hpesx_dev *pdev) 1374 { 1375 struct i2c_client *cli = pdev->client; 1376 char fname[CSRNAME_LEN]; 1377 1378 /* Create Debugfs directory for CSR file */ 1379 snprintf(fname, CSRNAME_LEN, "%d-%04hx", cli->adapter->nr, cli->addr); 1380 pdev->csr_dir = debugfs_create_dir(fname, csr_dbgdir); 1381 1382 /* Create Debugfs file for CSR read/write operations */ 1383 pdev->csr_file = debugfs_create_file(cli->name, 0600, 1384 pdev->csr_dir, pdev, &csr_dbgfs_ops); 1385 } 1386 1387 /* 1388 * idt_remove_dbgfs_files() - remove debugfs files 1389 * @pdev: Pointer to the driver data 1390 */ 1391 static void idt_remove_dbgfs_files(struct idt_89hpesx_dev *pdev) 1392 { 1393 /* Remove CSR directory and it sysfs-node */ 1394 debugfs_remove_recursive(pdev->csr_dir); 1395 } 1396 1397 /* 1398 * idt_probe() - IDT 89HPESx driver probe() callback method 1399 */ 1400 static int idt_probe(struct i2c_client *client, const struct i2c_device_id *id) 1401 { 1402 struct idt_89hpesx_dev *pdev; 1403 int ret; 1404 1405 /* Create driver data */ 1406 pdev = idt_create_pdev(client); 1407 if (IS_ERR(pdev)) 1408 return PTR_ERR(pdev); 1409 1410 /* Set SMBus operations */ 1411 ret = idt_set_smbus_ops(pdev); 1412 if (ret != 0) 1413 goto err_free_pdev; 1414 1415 /* Check whether it is truly IDT 89HPESx device */ 1416 ret = idt_check_dev(pdev); 1417 if (ret != 0) 1418 goto err_free_pdev; 1419 1420 /* Create sysfs files */ 1421 ret = idt_create_sysfs_files(pdev); 1422 if (ret != 0) 1423 goto err_free_pdev; 1424 1425 /* Create debugfs files */ 1426 idt_create_dbgfs_files(pdev); 1427 1428 return 0; 1429 1430 err_free_pdev: 1431 idt_free_pdev(pdev); 1432 1433 return ret; 1434 } 1435 1436 /* 1437 * idt_remove() - IDT 89HPESx driver remove() callback method 1438 */ 1439 static int idt_remove(struct i2c_client *client) 1440 { 1441 struct idt_89hpesx_dev *pdev = i2c_get_clientdata(client); 1442 1443 /* Remove debugfs files first */ 1444 idt_remove_dbgfs_files(pdev); 1445 1446 /* Remove sysfs files */ 1447 idt_remove_sysfs_files(pdev); 1448 1449 /* Discard driver data structure */ 1450 idt_free_pdev(pdev); 1451 1452 return 0; 1453 } 1454 1455 /* 1456 * ee_ids - array of supported EEPROMs 1457 */ 1458 static const struct i2c_device_id ee_ids[] = { 1459 { "24c32", 4096}, 1460 { "24c64", 8192}, 1461 { "24c128", 16384}, 1462 { "24c256", 32768}, 1463 { "24c512", 65536}, 1464 {} 1465 }; 1466 MODULE_DEVICE_TABLE(i2c, ee_ids); 1467 1468 /* 1469 * idt_ids - supported IDT 89HPESx devices 1470 */ 1471 static const struct i2c_device_id idt_ids[] = { 1472 { "89hpes8nt2", 0 }, 1473 { "89hpes12nt3", 0 }, 1474 1475 { "89hpes24nt6ag2", 0 }, 1476 { "89hpes32nt8ag2", 0 }, 1477 { "89hpes32nt8bg2", 0 }, 1478 { "89hpes12nt12g2", 0 }, 1479 { "89hpes16nt16g2", 0 }, 1480 { "89hpes24nt24g2", 0 }, 1481 { "89hpes32nt24ag2", 0 }, 1482 { "89hpes32nt24bg2", 0 }, 1483 1484 { "89hpes12n3", 0 }, 1485 { "89hpes12n3a", 0 }, 1486 { "89hpes24n3", 0 }, 1487 { "89hpes24n3a", 0 }, 1488 1489 { "89hpes32h8", 0 }, 1490 { "89hpes32h8g2", 0 }, 1491 { "89hpes48h12", 0 }, 1492 { "89hpes48h12g2", 0 }, 1493 { "89hpes48h12ag2", 0 }, 1494 { "89hpes16h16", 0 }, 1495 { "89hpes22h16", 0 }, 1496 { "89hpes22h16g2", 0 }, 1497 { "89hpes34h16", 0 }, 1498 { "89hpes34h16g2", 0 }, 1499 { "89hpes64h16", 0 }, 1500 { "89hpes64h16g2", 0 }, 1501 { "89hpes64h16ag2", 0 }, 1502 1503 /* { "89hpes3t3", 0 }, // No SMBus-slave iface */ 1504 { "89hpes12t3g2", 0 }, 1505 { "89hpes24t3g2", 0 }, 1506 /* { "89hpes4t4", 0 }, // No SMBus-slave iface */ 1507 { "89hpes16t4", 0 }, 1508 { "89hpes4t4g2", 0 }, 1509 { "89hpes10t4g2", 0 }, 1510 { "89hpes16t4g2", 0 }, 1511 { "89hpes16t4ag2", 0 }, 1512 { "89hpes5t5", 0 }, 1513 { "89hpes6t5", 0 }, 1514 { "89hpes8t5", 0 }, 1515 { "89hpes8t5a", 0 }, 1516 { "89hpes24t6", 0 }, 1517 { "89hpes6t6g2", 0 }, 1518 { "89hpes24t6g2", 0 }, 1519 { "89hpes16t7", 0 }, 1520 { "89hpes32t8", 0 }, 1521 { "89hpes32t8g2", 0 }, 1522 { "89hpes48t12", 0 }, 1523 { "89hpes48t12g2", 0 }, 1524 { /* END OF LIST */ } 1525 }; 1526 MODULE_DEVICE_TABLE(i2c, idt_ids); 1527 1528 static const struct of_device_id idt_of_match[] = { 1529 { .compatible = "idt,89hpes8nt2", }, 1530 { .compatible = "idt,89hpes12nt3", }, 1531 1532 { .compatible = "idt,89hpes24nt6ag2", }, 1533 { .compatible = "idt,89hpes32nt8ag2", }, 1534 { .compatible = "idt,89hpes32nt8bg2", }, 1535 { .compatible = "idt,89hpes12nt12g2", }, 1536 { .compatible = "idt,89hpes16nt16g2", }, 1537 { .compatible = "idt,89hpes24nt24g2", }, 1538 { .compatible = "idt,89hpes32nt24ag2", }, 1539 { .compatible = "idt,89hpes32nt24bg2", }, 1540 1541 { .compatible = "idt,89hpes12n3", }, 1542 { .compatible = "idt,89hpes12n3a", }, 1543 { .compatible = "idt,89hpes24n3", }, 1544 { .compatible = "idt,89hpes24n3a", }, 1545 1546 { .compatible = "idt,89hpes32h8", }, 1547 { .compatible = "idt,89hpes32h8g2", }, 1548 { .compatible = "idt,89hpes48h12", }, 1549 { .compatible = "idt,89hpes48h12g2", }, 1550 { .compatible = "idt,89hpes48h12ag2", }, 1551 { .compatible = "idt,89hpes16h16", }, 1552 { .compatible = "idt,89hpes22h16", }, 1553 { .compatible = "idt,89hpes22h16g2", }, 1554 { .compatible = "idt,89hpes34h16", }, 1555 { .compatible = "idt,89hpes34h16g2", }, 1556 { .compatible = "idt,89hpes64h16", }, 1557 { .compatible = "idt,89hpes64h16g2", }, 1558 { .compatible = "idt,89hpes64h16ag2", }, 1559 1560 { .compatible = "idt,89hpes12t3g2", }, 1561 { .compatible = "idt,89hpes24t3g2", }, 1562 1563 { .compatible = "idt,89hpes16t4", }, 1564 { .compatible = "idt,89hpes4t4g2", }, 1565 { .compatible = "idt,89hpes10t4g2", }, 1566 { .compatible = "idt,89hpes16t4g2", }, 1567 { .compatible = "idt,89hpes16t4ag2", }, 1568 { .compatible = "idt,89hpes5t5", }, 1569 { .compatible = "idt,89hpes6t5", }, 1570 { .compatible = "idt,89hpes8t5", }, 1571 { .compatible = "idt,89hpes8t5a", }, 1572 { .compatible = "idt,89hpes24t6", }, 1573 { .compatible = "idt,89hpes6t6g2", }, 1574 { .compatible = "idt,89hpes24t6g2", }, 1575 { .compatible = "idt,89hpes16t7", }, 1576 { .compatible = "idt,89hpes32t8", }, 1577 { .compatible = "idt,89hpes32t8g2", }, 1578 { .compatible = "idt,89hpes48t12", }, 1579 { .compatible = "idt,89hpes48t12g2", }, 1580 { }, 1581 }; 1582 MODULE_DEVICE_TABLE(of, idt_of_match); 1583 1584 /* 1585 * idt_driver - IDT 89HPESx driver structure 1586 */ 1587 static struct i2c_driver idt_driver = { 1588 .driver = { 1589 .name = IDT_NAME, 1590 .of_match_table = idt_of_match, 1591 }, 1592 .probe = idt_probe, 1593 .remove = idt_remove, 1594 .id_table = idt_ids, 1595 }; 1596 1597 /* 1598 * idt_init() - IDT 89HPESx driver init() callback method 1599 */ 1600 static int __init idt_init(void) 1601 { 1602 /* Create Debugfs directory first */ 1603 if (debugfs_initialized()) 1604 csr_dbgdir = debugfs_create_dir("idt_csr", NULL); 1605 1606 /* Add new i2c-device driver */ 1607 return i2c_add_driver(&idt_driver); 1608 } 1609 module_init(idt_init); 1610 1611 /* 1612 * idt_exit() - IDT 89HPESx driver exit() callback method 1613 */ 1614 static void __exit idt_exit(void) 1615 { 1616 /* Discard debugfs directory and all files if any */ 1617 debugfs_remove_recursive(csr_dbgdir); 1618 1619 /* Unregister i2c-device driver */ 1620 i2c_del_driver(&idt_driver); 1621 } 1622 module_exit(idt_exit); 1623