1 /*
2  * Driver for 93xx46 EEPROMs
3  *
4  * (C) 2011 DENX Software Engineering, Anatolij Gustschin <agust@denx.de>
5  *
6  * This program is free software; you can redistribute it and/or modify
7  * it under the terms of the GNU General Public License version 2 as
8  * published by the Free Software Foundation.
9  */
10 
11 #include <linux/delay.h>
12 #include <linux/device.h>
13 #include <linux/gpio/consumer.h>
14 #include <linux/kernel.h>
15 #include <linux/module.h>
16 #include <linux/mutex.h>
17 #include <linux/of.h>
18 #include <linux/of_device.h>
19 #include <linux/of_gpio.h>
20 #include <linux/slab.h>
21 #include <linux/spi/spi.h>
22 #include <linux/nvmem-provider.h>
23 #include <linux/eeprom_93xx46.h>
24 
25 #define OP_START	0x4
26 #define OP_WRITE	(OP_START | 0x1)
27 #define OP_READ		(OP_START | 0x2)
28 #define ADDR_EWDS	0x00
29 #define ADDR_ERAL	0x20
30 #define ADDR_EWEN	0x30
31 
32 struct eeprom_93xx46_devtype_data {
33 	unsigned int quirks;
34 };
35 
36 static const struct eeprom_93xx46_devtype_data atmel_at93c46d_data = {
37 	.quirks = EEPROM_93XX46_QUIRK_SINGLE_WORD_READ |
38 		  EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH,
39 };
40 
41 struct eeprom_93xx46_dev {
42 	struct spi_device *spi;
43 	struct eeprom_93xx46_platform_data *pdata;
44 	struct mutex lock;
45 	struct nvmem_config nvmem_config;
46 	struct nvmem_device *nvmem;
47 	int addrlen;
48 	int size;
49 };
50 
51 static inline bool has_quirk_single_word_read(struct eeprom_93xx46_dev *edev)
52 {
53 	return edev->pdata->quirks & EEPROM_93XX46_QUIRK_SINGLE_WORD_READ;
54 }
55 
56 static inline bool has_quirk_instruction_length(struct eeprom_93xx46_dev *edev)
57 {
58 	return edev->pdata->quirks & EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH;
59 }
60 
61 static int eeprom_93xx46_read(void *priv, unsigned int off,
62 			      void *val, size_t count)
63 {
64 	struct eeprom_93xx46_dev *edev = priv;
65 	char *buf = val;
66 	int err = 0;
67 
68 	if (unlikely(off >= edev->size))
69 		return 0;
70 	if ((off + count) > edev->size)
71 		count = edev->size - off;
72 	if (unlikely(!count))
73 		return count;
74 
75 	mutex_lock(&edev->lock);
76 
77 	if (edev->pdata->prepare)
78 		edev->pdata->prepare(edev);
79 
80 	while (count) {
81 		struct spi_message m;
82 		struct spi_transfer t[2] = { { 0 } };
83 		u16 cmd_addr = OP_READ << edev->addrlen;
84 		size_t nbytes = count;
85 		int bits;
86 
87 		if (edev->addrlen == 7) {
88 			cmd_addr |= off & 0x7f;
89 			bits = 10;
90 			if (has_quirk_single_word_read(edev))
91 				nbytes = 1;
92 		} else {
93 			cmd_addr |= (off >> 1) & 0x3f;
94 			bits = 9;
95 			if (has_quirk_single_word_read(edev))
96 				nbytes = 2;
97 		}
98 
99 		dev_dbg(&edev->spi->dev, "read cmd 0x%x, %d Hz\n",
100 			cmd_addr, edev->spi->max_speed_hz);
101 
102 		spi_message_init(&m);
103 
104 		t[0].tx_buf = (char *)&cmd_addr;
105 		t[0].len = 2;
106 		t[0].bits_per_word = bits;
107 		spi_message_add_tail(&t[0], &m);
108 
109 		t[1].rx_buf = buf;
110 		t[1].len = count;
111 		t[1].bits_per_word = 8;
112 		spi_message_add_tail(&t[1], &m);
113 
114 		err = spi_sync(edev->spi, &m);
115 		/* have to wait at least Tcsl ns */
116 		ndelay(250);
117 
118 		if (err) {
119 			dev_err(&edev->spi->dev, "read %zu bytes at %d: err. %d\n",
120 				nbytes, (int)off, err);
121 			break;
122 		}
123 
124 		buf += nbytes;
125 		off += nbytes;
126 		count -= nbytes;
127 	}
128 
129 	if (edev->pdata->finish)
130 		edev->pdata->finish(edev);
131 
132 	mutex_unlock(&edev->lock);
133 
134 	return err;
135 }
136 
137 static int eeprom_93xx46_ew(struct eeprom_93xx46_dev *edev, int is_on)
138 {
139 	struct spi_message m;
140 	struct spi_transfer t;
141 	int bits, ret;
142 	u16 cmd_addr;
143 
144 	cmd_addr = OP_START << edev->addrlen;
145 	if (edev->addrlen == 7) {
146 		cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS) << 1;
147 		bits = 10;
148 	} else {
149 		cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS);
150 		bits = 9;
151 	}
152 
153 	if (has_quirk_instruction_length(edev)) {
154 		cmd_addr <<= 2;
155 		bits += 2;
156 	}
157 
158 	dev_dbg(&edev->spi->dev, "ew%s cmd 0x%04x, %d bits\n",
159 			is_on ? "en" : "ds", cmd_addr, bits);
160 
161 	spi_message_init(&m);
162 	memset(&t, 0, sizeof(t));
163 
164 	t.tx_buf = &cmd_addr;
165 	t.len = 2;
166 	t.bits_per_word = bits;
167 	spi_message_add_tail(&t, &m);
168 
169 	mutex_lock(&edev->lock);
170 
171 	if (edev->pdata->prepare)
172 		edev->pdata->prepare(edev);
173 
174 	ret = spi_sync(edev->spi, &m);
175 	/* have to wait at least Tcsl ns */
176 	ndelay(250);
177 	if (ret)
178 		dev_err(&edev->spi->dev, "erase/write %sable error %d\n",
179 			is_on ? "en" : "dis", ret);
180 
181 	if (edev->pdata->finish)
182 		edev->pdata->finish(edev);
183 
184 	mutex_unlock(&edev->lock);
185 	return ret;
186 }
187 
188 static ssize_t
189 eeprom_93xx46_write_word(struct eeprom_93xx46_dev *edev,
190 			 const char *buf, unsigned off)
191 {
192 	struct spi_message m;
193 	struct spi_transfer t[2];
194 	int bits, data_len, ret;
195 	u16 cmd_addr;
196 
197 	cmd_addr = OP_WRITE << edev->addrlen;
198 
199 	if (edev->addrlen == 7) {
200 		cmd_addr |= off & 0x7f;
201 		bits = 10;
202 		data_len = 1;
203 	} else {
204 		cmd_addr |= (off >> 1) & 0x3f;
205 		bits = 9;
206 		data_len = 2;
207 	}
208 
209 	dev_dbg(&edev->spi->dev, "write cmd 0x%x\n", cmd_addr);
210 
211 	spi_message_init(&m);
212 	memset(t, 0, sizeof(t));
213 
214 	t[0].tx_buf = (char *)&cmd_addr;
215 	t[0].len = 2;
216 	t[0].bits_per_word = bits;
217 	spi_message_add_tail(&t[0], &m);
218 
219 	t[1].tx_buf = buf;
220 	t[1].len = data_len;
221 	t[1].bits_per_word = 8;
222 	spi_message_add_tail(&t[1], &m);
223 
224 	ret = spi_sync(edev->spi, &m);
225 	/* have to wait program cycle time Twc ms */
226 	mdelay(6);
227 	return ret;
228 }
229 
230 static int eeprom_93xx46_write(void *priv, unsigned int off,
231 				   void *val, size_t count)
232 {
233 	struct eeprom_93xx46_dev *edev = priv;
234 	char *buf = val;
235 	int i, ret, step = 1;
236 
237 	if (unlikely(off >= edev->size))
238 		return -EFBIG;
239 	if ((off + count) > edev->size)
240 		count = edev->size - off;
241 	if (unlikely(!count))
242 		return count;
243 
244 	/* only write even number of bytes on 16-bit devices */
245 	if (edev->addrlen == 6) {
246 		step = 2;
247 		count &= ~1;
248 	}
249 
250 	/* erase/write enable */
251 	ret = eeprom_93xx46_ew(edev, 1);
252 	if (ret)
253 		return ret;
254 
255 	mutex_lock(&edev->lock);
256 
257 	if (edev->pdata->prepare)
258 		edev->pdata->prepare(edev);
259 
260 	for (i = 0; i < count; i += step) {
261 		ret = eeprom_93xx46_write_word(edev, &buf[i], off + i);
262 		if (ret) {
263 			dev_err(&edev->spi->dev, "write failed at %d: %d\n",
264 				(int)off + i, ret);
265 			break;
266 		}
267 	}
268 
269 	if (edev->pdata->finish)
270 		edev->pdata->finish(edev);
271 
272 	mutex_unlock(&edev->lock);
273 
274 	/* erase/write disable */
275 	eeprom_93xx46_ew(edev, 0);
276 	return ret;
277 }
278 
279 static int eeprom_93xx46_eral(struct eeprom_93xx46_dev *edev)
280 {
281 	struct eeprom_93xx46_platform_data *pd = edev->pdata;
282 	struct spi_message m;
283 	struct spi_transfer t;
284 	int bits, ret;
285 	u16 cmd_addr;
286 
287 	cmd_addr = OP_START << edev->addrlen;
288 	if (edev->addrlen == 7) {
289 		cmd_addr |= ADDR_ERAL << 1;
290 		bits = 10;
291 	} else {
292 		cmd_addr |= ADDR_ERAL;
293 		bits = 9;
294 	}
295 
296 	if (has_quirk_instruction_length(edev)) {
297 		cmd_addr <<= 2;
298 		bits += 2;
299 	}
300 
301 	dev_dbg(&edev->spi->dev, "eral cmd 0x%04x, %d bits\n", cmd_addr, bits);
302 
303 	spi_message_init(&m);
304 	memset(&t, 0, sizeof(t));
305 
306 	t.tx_buf = &cmd_addr;
307 	t.len = 2;
308 	t.bits_per_word = bits;
309 	spi_message_add_tail(&t, &m);
310 
311 	mutex_lock(&edev->lock);
312 
313 	if (edev->pdata->prepare)
314 		edev->pdata->prepare(edev);
315 
316 	ret = spi_sync(edev->spi, &m);
317 	if (ret)
318 		dev_err(&edev->spi->dev, "erase error %d\n", ret);
319 	/* have to wait erase cycle time Tec ms */
320 	mdelay(6);
321 
322 	if (pd->finish)
323 		pd->finish(edev);
324 
325 	mutex_unlock(&edev->lock);
326 	return ret;
327 }
328 
329 static ssize_t eeprom_93xx46_store_erase(struct device *dev,
330 					 struct device_attribute *attr,
331 					 const char *buf, size_t count)
332 {
333 	struct eeprom_93xx46_dev *edev = dev_get_drvdata(dev);
334 	int erase = 0, ret;
335 
336 	sscanf(buf, "%d", &erase);
337 	if (erase) {
338 		ret = eeprom_93xx46_ew(edev, 1);
339 		if (ret)
340 			return ret;
341 		ret = eeprom_93xx46_eral(edev);
342 		if (ret)
343 			return ret;
344 		ret = eeprom_93xx46_ew(edev, 0);
345 		if (ret)
346 			return ret;
347 	}
348 	return count;
349 }
350 static DEVICE_ATTR(erase, S_IWUSR, NULL, eeprom_93xx46_store_erase);
351 
352 static void select_assert(void *context)
353 {
354 	struct eeprom_93xx46_dev *edev = context;
355 
356 	gpiod_set_value_cansleep(edev->pdata->select, 1);
357 }
358 
359 static void select_deassert(void *context)
360 {
361 	struct eeprom_93xx46_dev *edev = context;
362 
363 	gpiod_set_value_cansleep(edev->pdata->select, 0);
364 }
365 
366 static const struct of_device_id eeprom_93xx46_of_table[] = {
367 	{ .compatible = "eeprom-93xx46", },
368 	{ .compatible = "atmel,at93c46d", .data = &atmel_at93c46d_data, },
369 	{}
370 };
371 MODULE_DEVICE_TABLE(of, eeprom_93xx46_of_table);
372 
373 static int eeprom_93xx46_probe_dt(struct spi_device *spi)
374 {
375 	const struct of_device_id *of_id =
376 		of_match_device(eeprom_93xx46_of_table, &spi->dev);
377 	struct device_node *np = spi->dev.of_node;
378 	struct eeprom_93xx46_platform_data *pd;
379 	u32 tmp;
380 	int ret;
381 
382 	pd = devm_kzalloc(&spi->dev, sizeof(*pd), GFP_KERNEL);
383 	if (!pd)
384 		return -ENOMEM;
385 
386 	ret = of_property_read_u32(np, "data-size", &tmp);
387 	if (ret < 0) {
388 		dev_err(&spi->dev, "data-size property not found\n");
389 		return ret;
390 	}
391 
392 	if (tmp == 8) {
393 		pd->flags |= EE_ADDR8;
394 	} else if (tmp == 16) {
395 		pd->flags |= EE_ADDR16;
396 	} else {
397 		dev_err(&spi->dev, "invalid data-size (%d)\n", tmp);
398 		return -EINVAL;
399 	}
400 
401 	if (of_property_read_bool(np, "read-only"))
402 		pd->flags |= EE_READONLY;
403 
404 	pd->select = devm_gpiod_get_optional(&spi->dev, "select",
405 					     GPIOD_OUT_LOW);
406 	if (IS_ERR(pd->select))
407 		return PTR_ERR(pd->select);
408 
409 	pd->prepare = select_assert;
410 	pd->finish = select_deassert;
411 	gpiod_direction_output(pd->select, 0);
412 
413 	if (of_id->data) {
414 		const struct eeprom_93xx46_devtype_data *data = of_id->data;
415 
416 		pd->quirks = data->quirks;
417 	}
418 
419 	spi->dev.platform_data = pd;
420 
421 	return 0;
422 }
423 
424 static int eeprom_93xx46_probe(struct spi_device *spi)
425 {
426 	struct eeprom_93xx46_platform_data *pd;
427 	struct eeprom_93xx46_dev *edev;
428 	int err;
429 
430 	if (spi->dev.of_node) {
431 		err = eeprom_93xx46_probe_dt(spi);
432 		if (err < 0)
433 			return err;
434 	}
435 
436 	pd = spi->dev.platform_data;
437 	if (!pd) {
438 		dev_err(&spi->dev, "missing platform data\n");
439 		return -ENODEV;
440 	}
441 
442 	edev = devm_kzalloc(&spi->dev, sizeof(*edev), GFP_KERNEL);
443 	if (!edev)
444 		return -ENOMEM;
445 
446 	if (pd->flags & EE_ADDR8)
447 		edev->addrlen = 7;
448 	else if (pd->flags & EE_ADDR16)
449 		edev->addrlen = 6;
450 	else {
451 		dev_err(&spi->dev, "unspecified address type\n");
452 		return -EINVAL;
453 	}
454 
455 	mutex_init(&edev->lock);
456 
457 	edev->spi = spi;
458 	edev->pdata = pd;
459 
460 	edev->size = 128;
461 	edev->nvmem_config.name = dev_name(&spi->dev);
462 	edev->nvmem_config.dev = &spi->dev;
463 	edev->nvmem_config.read_only = pd->flags & EE_READONLY;
464 	edev->nvmem_config.root_only = true;
465 	edev->nvmem_config.owner = THIS_MODULE;
466 	edev->nvmem_config.compat = true;
467 	edev->nvmem_config.base_dev = &spi->dev;
468 	edev->nvmem_config.reg_read = eeprom_93xx46_read;
469 	edev->nvmem_config.reg_write = eeprom_93xx46_write;
470 	edev->nvmem_config.priv = edev;
471 	edev->nvmem_config.stride = 4;
472 	edev->nvmem_config.word_size = 1;
473 	edev->nvmem_config.size = edev->size;
474 
475 	edev->nvmem = devm_nvmem_register(&spi->dev, &edev->nvmem_config);
476 	if (IS_ERR(edev->nvmem))
477 		return PTR_ERR(edev->nvmem);
478 
479 	dev_info(&spi->dev, "%d-bit eeprom %s\n",
480 		(pd->flags & EE_ADDR8) ? 8 : 16,
481 		(pd->flags & EE_READONLY) ? "(readonly)" : "");
482 
483 	if (!(pd->flags & EE_READONLY)) {
484 		if (device_create_file(&spi->dev, &dev_attr_erase))
485 			dev_err(&spi->dev, "can't create erase interface\n");
486 	}
487 
488 	spi_set_drvdata(spi, edev);
489 	return 0;
490 }
491 
492 static int eeprom_93xx46_remove(struct spi_device *spi)
493 {
494 	struct eeprom_93xx46_dev *edev = spi_get_drvdata(spi);
495 
496 	if (!(edev->pdata->flags & EE_READONLY))
497 		device_remove_file(&spi->dev, &dev_attr_erase);
498 
499 	return 0;
500 }
501 
502 static struct spi_driver eeprom_93xx46_driver = {
503 	.driver = {
504 		.name	= "93xx46",
505 		.of_match_table = of_match_ptr(eeprom_93xx46_of_table),
506 	},
507 	.probe		= eeprom_93xx46_probe,
508 	.remove		= eeprom_93xx46_remove,
509 };
510 
511 module_spi_driver(eeprom_93xx46_driver);
512 
513 MODULE_LICENSE("GPL");
514 MODULE_DESCRIPTION("Driver for 93xx46 EEPROMs");
515 MODULE_AUTHOR("Anatolij Gustschin <agust@denx.de>");
516 MODULE_ALIAS("spi:93xx46");
517