1 // SPDX-License-Identifier: GPL-2.0-only
2 /*
3  * Driver for 93xx46 EEPROMs
4  *
5  * (C) 2011 DENX Software Engineering, Anatolij Gustschin <agust@denx.de>
6  */
7 
8 #include <linux/delay.h>
9 #include <linux/device.h>
10 #include <linux/gpio/consumer.h>
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <linux/mutex.h>
14 #include <linux/of.h>
15 #include <linux/of_device.h>
16 #include <linux/of_gpio.h>
17 #include <linux/slab.h>
18 #include <linux/spi/spi.h>
19 #include <linux/nvmem-provider.h>
20 #include <linux/eeprom_93xx46.h>
21 
22 #define OP_START	0x4
23 #define OP_WRITE	(OP_START | 0x1)
24 #define OP_READ		(OP_START | 0x2)
25 #define ADDR_EWDS	0x00
26 #define ADDR_ERAL	0x20
27 #define ADDR_EWEN	0x30
28 
29 struct eeprom_93xx46_devtype_data {
30 	unsigned int quirks;
31 };
32 
33 static const struct eeprom_93xx46_devtype_data atmel_at93c46d_data = {
34 	.quirks = EEPROM_93XX46_QUIRK_SINGLE_WORD_READ |
35 		  EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH,
36 };
37 
38 struct eeprom_93xx46_dev {
39 	struct spi_device *spi;
40 	struct eeprom_93xx46_platform_data *pdata;
41 	struct mutex lock;
42 	struct nvmem_config nvmem_config;
43 	struct nvmem_device *nvmem;
44 	int addrlen;
45 	int size;
46 };
47 
48 static inline bool has_quirk_single_word_read(struct eeprom_93xx46_dev *edev)
49 {
50 	return edev->pdata->quirks & EEPROM_93XX46_QUIRK_SINGLE_WORD_READ;
51 }
52 
53 static inline bool has_quirk_instruction_length(struct eeprom_93xx46_dev *edev)
54 {
55 	return edev->pdata->quirks & EEPROM_93XX46_QUIRK_INSTRUCTION_LENGTH;
56 }
57 
58 static int eeprom_93xx46_read(void *priv, unsigned int off,
59 			      void *val, size_t count)
60 {
61 	struct eeprom_93xx46_dev *edev = priv;
62 	char *buf = val;
63 	int err = 0;
64 
65 	if (unlikely(off >= edev->size))
66 		return 0;
67 	if ((off + count) > edev->size)
68 		count = edev->size - off;
69 	if (unlikely(!count))
70 		return count;
71 
72 	mutex_lock(&edev->lock);
73 
74 	if (edev->pdata->prepare)
75 		edev->pdata->prepare(edev);
76 
77 	while (count) {
78 		struct spi_message m;
79 		struct spi_transfer t[2] = { { 0 } };
80 		u16 cmd_addr = OP_READ << edev->addrlen;
81 		size_t nbytes = count;
82 		int bits;
83 
84 		if (edev->addrlen == 7) {
85 			cmd_addr |= off & 0x7f;
86 			bits = 10;
87 			if (has_quirk_single_word_read(edev))
88 				nbytes = 1;
89 		} else {
90 			cmd_addr |= (off >> 1) & 0x3f;
91 			bits = 9;
92 			if (has_quirk_single_word_read(edev))
93 				nbytes = 2;
94 		}
95 
96 		dev_dbg(&edev->spi->dev, "read cmd 0x%x, %d Hz\n",
97 			cmd_addr, edev->spi->max_speed_hz);
98 
99 		spi_message_init(&m);
100 
101 		t[0].tx_buf = (char *)&cmd_addr;
102 		t[0].len = 2;
103 		t[0].bits_per_word = bits;
104 		spi_message_add_tail(&t[0], &m);
105 
106 		t[1].rx_buf = buf;
107 		t[1].len = count;
108 		t[1].bits_per_word = 8;
109 		spi_message_add_tail(&t[1], &m);
110 
111 		err = spi_sync(edev->spi, &m);
112 		/* have to wait at least Tcsl ns */
113 		ndelay(250);
114 
115 		if (err) {
116 			dev_err(&edev->spi->dev, "read %zu bytes at %d: err. %d\n",
117 				nbytes, (int)off, err);
118 			break;
119 		}
120 
121 		buf += nbytes;
122 		off += nbytes;
123 		count -= nbytes;
124 	}
125 
126 	if (edev->pdata->finish)
127 		edev->pdata->finish(edev);
128 
129 	mutex_unlock(&edev->lock);
130 
131 	return err;
132 }
133 
134 static int eeprom_93xx46_ew(struct eeprom_93xx46_dev *edev, int is_on)
135 {
136 	struct spi_message m;
137 	struct spi_transfer t;
138 	int bits, ret;
139 	u16 cmd_addr;
140 
141 	cmd_addr = OP_START << edev->addrlen;
142 	if (edev->addrlen == 7) {
143 		cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS) << 1;
144 		bits = 10;
145 	} else {
146 		cmd_addr |= (is_on ? ADDR_EWEN : ADDR_EWDS);
147 		bits = 9;
148 	}
149 
150 	if (has_quirk_instruction_length(edev)) {
151 		cmd_addr <<= 2;
152 		bits += 2;
153 	}
154 
155 	dev_dbg(&edev->spi->dev, "ew%s cmd 0x%04x, %d bits\n",
156 			is_on ? "en" : "ds", cmd_addr, bits);
157 
158 	spi_message_init(&m);
159 	memset(&t, 0, sizeof(t));
160 
161 	t.tx_buf = &cmd_addr;
162 	t.len = 2;
163 	t.bits_per_word = bits;
164 	spi_message_add_tail(&t, &m);
165 
166 	mutex_lock(&edev->lock);
167 
168 	if (edev->pdata->prepare)
169 		edev->pdata->prepare(edev);
170 
171 	ret = spi_sync(edev->spi, &m);
172 	/* have to wait at least Tcsl ns */
173 	ndelay(250);
174 	if (ret)
175 		dev_err(&edev->spi->dev, "erase/write %sable error %d\n",
176 			is_on ? "en" : "dis", ret);
177 
178 	if (edev->pdata->finish)
179 		edev->pdata->finish(edev);
180 
181 	mutex_unlock(&edev->lock);
182 	return ret;
183 }
184 
185 static ssize_t
186 eeprom_93xx46_write_word(struct eeprom_93xx46_dev *edev,
187 			 const char *buf, unsigned off)
188 {
189 	struct spi_message m;
190 	struct spi_transfer t[2];
191 	int bits, data_len, ret;
192 	u16 cmd_addr;
193 
194 	cmd_addr = OP_WRITE << edev->addrlen;
195 
196 	if (edev->addrlen == 7) {
197 		cmd_addr |= off & 0x7f;
198 		bits = 10;
199 		data_len = 1;
200 	} else {
201 		cmd_addr |= (off >> 1) & 0x3f;
202 		bits = 9;
203 		data_len = 2;
204 	}
205 
206 	dev_dbg(&edev->spi->dev, "write cmd 0x%x\n", cmd_addr);
207 
208 	spi_message_init(&m);
209 	memset(t, 0, sizeof(t));
210 
211 	t[0].tx_buf = (char *)&cmd_addr;
212 	t[0].len = 2;
213 	t[0].bits_per_word = bits;
214 	spi_message_add_tail(&t[0], &m);
215 
216 	t[1].tx_buf = buf;
217 	t[1].len = data_len;
218 	t[1].bits_per_word = 8;
219 	spi_message_add_tail(&t[1], &m);
220 
221 	ret = spi_sync(edev->spi, &m);
222 	/* have to wait program cycle time Twc ms */
223 	mdelay(6);
224 	return ret;
225 }
226 
227 static int eeprom_93xx46_write(void *priv, unsigned int off,
228 				   void *val, size_t count)
229 {
230 	struct eeprom_93xx46_dev *edev = priv;
231 	char *buf = val;
232 	int i, ret, step = 1;
233 
234 	if (unlikely(off >= edev->size))
235 		return -EFBIG;
236 	if ((off + count) > edev->size)
237 		count = edev->size - off;
238 	if (unlikely(!count))
239 		return count;
240 
241 	/* only write even number of bytes on 16-bit devices */
242 	if (edev->addrlen == 6) {
243 		step = 2;
244 		count &= ~1;
245 	}
246 
247 	/* erase/write enable */
248 	ret = eeprom_93xx46_ew(edev, 1);
249 	if (ret)
250 		return ret;
251 
252 	mutex_lock(&edev->lock);
253 
254 	if (edev->pdata->prepare)
255 		edev->pdata->prepare(edev);
256 
257 	for (i = 0; i < count; i += step) {
258 		ret = eeprom_93xx46_write_word(edev, &buf[i], off + i);
259 		if (ret) {
260 			dev_err(&edev->spi->dev, "write failed at %d: %d\n",
261 				(int)off + i, ret);
262 			break;
263 		}
264 	}
265 
266 	if (edev->pdata->finish)
267 		edev->pdata->finish(edev);
268 
269 	mutex_unlock(&edev->lock);
270 
271 	/* erase/write disable */
272 	eeprom_93xx46_ew(edev, 0);
273 	return ret;
274 }
275 
276 static int eeprom_93xx46_eral(struct eeprom_93xx46_dev *edev)
277 {
278 	struct eeprom_93xx46_platform_data *pd = edev->pdata;
279 	struct spi_message m;
280 	struct spi_transfer t;
281 	int bits, ret;
282 	u16 cmd_addr;
283 
284 	cmd_addr = OP_START << edev->addrlen;
285 	if (edev->addrlen == 7) {
286 		cmd_addr |= ADDR_ERAL << 1;
287 		bits = 10;
288 	} else {
289 		cmd_addr |= ADDR_ERAL;
290 		bits = 9;
291 	}
292 
293 	if (has_quirk_instruction_length(edev)) {
294 		cmd_addr <<= 2;
295 		bits += 2;
296 	}
297 
298 	dev_dbg(&edev->spi->dev, "eral cmd 0x%04x, %d bits\n", cmd_addr, bits);
299 
300 	spi_message_init(&m);
301 	memset(&t, 0, sizeof(t));
302 
303 	t.tx_buf = &cmd_addr;
304 	t.len = 2;
305 	t.bits_per_word = bits;
306 	spi_message_add_tail(&t, &m);
307 
308 	mutex_lock(&edev->lock);
309 
310 	if (edev->pdata->prepare)
311 		edev->pdata->prepare(edev);
312 
313 	ret = spi_sync(edev->spi, &m);
314 	if (ret)
315 		dev_err(&edev->spi->dev, "erase error %d\n", ret);
316 	/* have to wait erase cycle time Tec ms */
317 	mdelay(6);
318 
319 	if (pd->finish)
320 		pd->finish(edev);
321 
322 	mutex_unlock(&edev->lock);
323 	return ret;
324 }
325 
326 static ssize_t eeprom_93xx46_store_erase(struct device *dev,
327 					 struct device_attribute *attr,
328 					 const char *buf, size_t count)
329 {
330 	struct eeprom_93xx46_dev *edev = dev_get_drvdata(dev);
331 	int erase = 0, ret;
332 
333 	sscanf(buf, "%d", &erase);
334 	if (erase) {
335 		ret = eeprom_93xx46_ew(edev, 1);
336 		if (ret)
337 			return ret;
338 		ret = eeprom_93xx46_eral(edev);
339 		if (ret)
340 			return ret;
341 		ret = eeprom_93xx46_ew(edev, 0);
342 		if (ret)
343 			return ret;
344 	}
345 	return count;
346 }
347 static DEVICE_ATTR(erase, S_IWUSR, NULL, eeprom_93xx46_store_erase);
348 
349 static void select_assert(void *context)
350 {
351 	struct eeprom_93xx46_dev *edev = context;
352 
353 	gpiod_set_value_cansleep(edev->pdata->select, 1);
354 }
355 
356 static void select_deassert(void *context)
357 {
358 	struct eeprom_93xx46_dev *edev = context;
359 
360 	gpiod_set_value_cansleep(edev->pdata->select, 0);
361 }
362 
363 static const struct of_device_id eeprom_93xx46_of_table[] = {
364 	{ .compatible = "eeprom-93xx46", },
365 	{ .compatible = "atmel,at93c46d", .data = &atmel_at93c46d_data, },
366 	{}
367 };
368 MODULE_DEVICE_TABLE(of, eeprom_93xx46_of_table);
369 
370 static int eeprom_93xx46_probe_dt(struct spi_device *spi)
371 {
372 	const struct of_device_id *of_id =
373 		of_match_device(eeprom_93xx46_of_table, &spi->dev);
374 	struct device_node *np = spi->dev.of_node;
375 	struct eeprom_93xx46_platform_data *pd;
376 	u32 tmp;
377 	int ret;
378 
379 	pd = devm_kzalloc(&spi->dev, sizeof(*pd), GFP_KERNEL);
380 	if (!pd)
381 		return -ENOMEM;
382 
383 	ret = of_property_read_u32(np, "data-size", &tmp);
384 	if (ret < 0) {
385 		dev_err(&spi->dev, "data-size property not found\n");
386 		return ret;
387 	}
388 
389 	if (tmp == 8) {
390 		pd->flags |= EE_ADDR8;
391 	} else if (tmp == 16) {
392 		pd->flags |= EE_ADDR16;
393 	} else {
394 		dev_err(&spi->dev, "invalid data-size (%d)\n", tmp);
395 		return -EINVAL;
396 	}
397 
398 	if (of_property_read_bool(np, "read-only"))
399 		pd->flags |= EE_READONLY;
400 
401 	pd->select = devm_gpiod_get_optional(&spi->dev, "select",
402 					     GPIOD_OUT_LOW);
403 	if (IS_ERR(pd->select))
404 		return PTR_ERR(pd->select);
405 
406 	pd->prepare = select_assert;
407 	pd->finish = select_deassert;
408 	gpiod_direction_output(pd->select, 0);
409 
410 	if (of_id->data) {
411 		const struct eeprom_93xx46_devtype_data *data = of_id->data;
412 
413 		pd->quirks = data->quirks;
414 	}
415 
416 	spi->dev.platform_data = pd;
417 
418 	return 0;
419 }
420 
421 static int eeprom_93xx46_probe(struct spi_device *spi)
422 {
423 	struct eeprom_93xx46_platform_data *pd;
424 	struct eeprom_93xx46_dev *edev;
425 	int err;
426 
427 	if (spi->dev.of_node) {
428 		err = eeprom_93xx46_probe_dt(spi);
429 		if (err < 0)
430 			return err;
431 	}
432 
433 	pd = spi->dev.platform_data;
434 	if (!pd) {
435 		dev_err(&spi->dev, "missing platform data\n");
436 		return -ENODEV;
437 	}
438 
439 	edev = devm_kzalloc(&spi->dev, sizeof(*edev), GFP_KERNEL);
440 	if (!edev)
441 		return -ENOMEM;
442 
443 	if (pd->flags & EE_ADDR8)
444 		edev->addrlen = 7;
445 	else if (pd->flags & EE_ADDR16)
446 		edev->addrlen = 6;
447 	else {
448 		dev_err(&spi->dev, "unspecified address type\n");
449 		return -EINVAL;
450 	}
451 
452 	mutex_init(&edev->lock);
453 
454 	edev->spi = spi;
455 	edev->pdata = pd;
456 
457 	edev->size = 128;
458 	edev->nvmem_config.name = dev_name(&spi->dev);
459 	edev->nvmem_config.dev = &spi->dev;
460 	edev->nvmem_config.read_only = pd->flags & EE_READONLY;
461 	edev->nvmem_config.root_only = true;
462 	edev->nvmem_config.owner = THIS_MODULE;
463 	edev->nvmem_config.compat = true;
464 	edev->nvmem_config.base_dev = &spi->dev;
465 	edev->nvmem_config.reg_read = eeprom_93xx46_read;
466 	edev->nvmem_config.reg_write = eeprom_93xx46_write;
467 	edev->nvmem_config.priv = edev;
468 	edev->nvmem_config.stride = 4;
469 	edev->nvmem_config.word_size = 1;
470 	edev->nvmem_config.size = edev->size;
471 
472 	edev->nvmem = devm_nvmem_register(&spi->dev, &edev->nvmem_config);
473 	if (IS_ERR(edev->nvmem))
474 		return PTR_ERR(edev->nvmem);
475 
476 	dev_info(&spi->dev, "%d-bit eeprom %s\n",
477 		(pd->flags & EE_ADDR8) ? 8 : 16,
478 		(pd->flags & EE_READONLY) ? "(readonly)" : "");
479 
480 	if (!(pd->flags & EE_READONLY)) {
481 		if (device_create_file(&spi->dev, &dev_attr_erase))
482 			dev_err(&spi->dev, "can't create erase interface\n");
483 	}
484 
485 	spi_set_drvdata(spi, edev);
486 	return 0;
487 }
488 
489 static int eeprom_93xx46_remove(struct spi_device *spi)
490 {
491 	struct eeprom_93xx46_dev *edev = spi_get_drvdata(spi);
492 
493 	if (!(edev->pdata->flags & EE_READONLY))
494 		device_remove_file(&spi->dev, &dev_attr_erase);
495 
496 	return 0;
497 }
498 
499 static struct spi_driver eeprom_93xx46_driver = {
500 	.driver = {
501 		.name	= "93xx46",
502 		.of_match_table = of_match_ptr(eeprom_93xx46_of_table),
503 	},
504 	.probe		= eeprom_93xx46_probe,
505 	.remove		= eeprom_93xx46_remove,
506 };
507 
508 module_spi_driver(eeprom_93xx46_driver);
509 
510 MODULE_LICENSE("GPL");
511 MODULE_DESCRIPTION("Driver for 93xx46 EEPROMs");
512 MODULE_AUTHOR("Anatolij Gustschin <agust@denx.de>");
513 MODULE_ALIAS("spi:93xx46");
514