1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * at24.c - handle most I2C EEPROMs 4 * 5 * Copyright (C) 2005-2007 David Brownell 6 * Copyright (C) 2008 Wolfram Sang, Pengutronix 7 */ 8 9 #include <linux/acpi.h> 10 #include <linux/bitops.h> 11 #include <linux/capability.h> 12 #include <linux/delay.h> 13 #include <linux/i2c.h> 14 #include <linux/init.h> 15 #include <linux/jiffies.h> 16 #include <linux/kernel.h> 17 #include <linux/mod_devicetable.h> 18 #include <linux/module.h> 19 #include <linux/mutex.h> 20 #include <linux/nvmem-provider.h> 21 #include <linux/of_device.h> 22 #include <linux/pm_runtime.h> 23 #include <linux/property.h> 24 #include <linux/regmap.h> 25 #include <linux/regulator/consumer.h> 26 #include <linux/slab.h> 27 28 /* Address pointer is 16 bit. */ 29 #define AT24_FLAG_ADDR16 BIT(7) 30 /* sysfs-entry will be read-only. */ 31 #define AT24_FLAG_READONLY BIT(6) 32 /* sysfs-entry will be world-readable. */ 33 #define AT24_FLAG_IRUGO BIT(5) 34 /* Take always 8 addresses (24c00). */ 35 #define AT24_FLAG_TAKE8ADDR BIT(4) 36 /* Factory-programmed serial number. */ 37 #define AT24_FLAG_SERIAL BIT(3) 38 /* Factory-programmed mac address. */ 39 #define AT24_FLAG_MAC BIT(2) 40 /* Does not auto-rollover reads to the next slave address. */ 41 #define AT24_FLAG_NO_RDROL BIT(1) 42 43 /* 44 * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable. 45 * Differences between different vendor product lines (like Atmel AT24C or 46 * MicroChip 24LC, etc) won't much matter for typical read/write access. 47 * There are also I2C RAM chips, likewise interchangeable. One example 48 * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes). 49 * 50 * However, misconfiguration can lose data. "Set 16-bit memory address" 51 * to a part with 8-bit addressing will overwrite data. Writing with too 52 * big a page size also loses data. And it's not safe to assume that the 53 * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC 54 * uses 0x51, for just one example. 55 * 56 * Accordingly, explicit board-specific configuration data should be used 57 * in almost all cases. (One partial exception is an SMBus used to access 58 * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.) 59 * 60 * So this driver uses "new style" I2C driver binding, expecting to be 61 * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or 62 * similar kernel-resident tables; or, configuration data coming from 63 * a bootloader. 64 * 65 * Other than binding model, current differences from "eeprom" driver are 66 * that this one handles write access and isn't restricted to 24c02 devices. 67 * It also handles larger devices (32 kbit and up) with two-byte addresses, 68 * which won't work on pure SMBus systems. 69 */ 70 71 struct at24_data { 72 /* 73 * Lock protects against activities from other Linux tasks, 74 * but not from changes by other I2C masters. 75 */ 76 struct mutex lock; 77 78 unsigned int write_max; 79 unsigned int num_addresses; 80 unsigned int offset_adj; 81 82 u32 byte_len; 83 u16 page_size; 84 u8 flags; 85 86 struct nvmem_device *nvmem; 87 struct regulator *vcc_reg; 88 void (*read_post)(unsigned int off, char *buf, size_t count); 89 90 /* 91 * Some chips tie up multiple I2C addresses; dummy devices reserve 92 * them for us. 93 */ 94 u8 bank_addr_shift; 95 struct regmap *client_regmaps[]; 96 }; 97 98 /* 99 * This parameter is to help this driver avoid blocking other drivers out 100 * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C 101 * clock, one 256 byte read takes about 1/43 second which is excessive; 102 * but the 1/170 second it takes at 400 kHz may be quite reasonable; and 103 * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible. 104 * 105 * This value is forced to be a power of two so that writes align on pages. 106 */ 107 static unsigned int at24_io_limit = 128; 108 module_param_named(io_limit, at24_io_limit, uint, 0); 109 MODULE_PARM_DESC(at24_io_limit, "Maximum bytes per I/O (default 128)"); 110 111 /* 112 * Specs often allow 5 msec for a page write, sometimes 20 msec; 113 * it's important to recover from write timeouts. 114 */ 115 static unsigned int at24_write_timeout = 25; 116 module_param_named(write_timeout, at24_write_timeout, uint, 0); 117 MODULE_PARM_DESC(at24_write_timeout, "Time (in ms) to try writes (default 25)"); 118 119 struct at24_chip_data { 120 u32 byte_len; 121 u8 flags; 122 u8 bank_addr_shift; 123 void (*read_post)(unsigned int off, char *buf, size_t count); 124 }; 125 126 #define AT24_CHIP_DATA(_name, _len, _flags) \ 127 static const struct at24_chip_data _name = { \ 128 .byte_len = _len, .flags = _flags, \ 129 } 130 131 #define AT24_CHIP_DATA_CB(_name, _len, _flags, _read_post) \ 132 static const struct at24_chip_data _name = { \ 133 .byte_len = _len, .flags = _flags, \ 134 .read_post = _read_post, \ 135 } 136 137 #define AT24_CHIP_DATA_BS(_name, _len, _flags, _bank_addr_shift) \ 138 static const struct at24_chip_data _name = { \ 139 .byte_len = _len, .flags = _flags, \ 140 .bank_addr_shift = _bank_addr_shift \ 141 } 142 143 static void at24_read_post_vaio(unsigned int off, char *buf, size_t count) 144 { 145 int i; 146 147 if (capable(CAP_SYS_ADMIN)) 148 return; 149 150 /* 151 * Hide VAIO private settings to regular users: 152 * - BIOS passwords: bytes 0x00 to 0x0f 153 * - UUID: bytes 0x10 to 0x1f 154 * - Serial number: 0xc0 to 0xdf 155 */ 156 for (i = 0; i < count; i++) { 157 if ((off + i <= 0x1f) || 158 (off + i >= 0xc0 && off + i <= 0xdf)) 159 buf[i] = 0; 160 } 161 } 162 163 /* needs 8 addresses as A0-A2 are ignored */ 164 AT24_CHIP_DATA(at24_data_24c00, 128 / 8, AT24_FLAG_TAKE8ADDR); 165 /* old variants can't be handled with this generic entry! */ 166 AT24_CHIP_DATA(at24_data_24c01, 1024 / 8, 0); 167 AT24_CHIP_DATA(at24_data_24cs01, 16, 168 AT24_FLAG_SERIAL | AT24_FLAG_READONLY); 169 AT24_CHIP_DATA(at24_data_24c02, 2048 / 8, 0); 170 AT24_CHIP_DATA(at24_data_24cs02, 16, 171 AT24_FLAG_SERIAL | AT24_FLAG_READONLY); 172 AT24_CHIP_DATA(at24_data_24mac402, 48 / 8, 173 AT24_FLAG_MAC | AT24_FLAG_READONLY); 174 AT24_CHIP_DATA(at24_data_24mac602, 64 / 8, 175 AT24_FLAG_MAC | AT24_FLAG_READONLY); 176 /* spd is a 24c02 in memory DIMMs */ 177 AT24_CHIP_DATA(at24_data_spd, 2048 / 8, 178 AT24_FLAG_READONLY | AT24_FLAG_IRUGO); 179 /* 24c02_vaio is a 24c02 on some Sony laptops */ 180 AT24_CHIP_DATA_CB(at24_data_24c02_vaio, 2048 / 8, 181 AT24_FLAG_READONLY | AT24_FLAG_IRUGO, 182 at24_read_post_vaio); 183 AT24_CHIP_DATA(at24_data_24c04, 4096 / 8, 0); 184 AT24_CHIP_DATA(at24_data_24cs04, 16, 185 AT24_FLAG_SERIAL | AT24_FLAG_READONLY); 186 /* 24rf08 quirk is handled at i2c-core */ 187 AT24_CHIP_DATA(at24_data_24c08, 8192 / 8, 0); 188 AT24_CHIP_DATA(at24_data_24cs08, 16, 189 AT24_FLAG_SERIAL | AT24_FLAG_READONLY); 190 AT24_CHIP_DATA(at24_data_24c16, 16384 / 8, 0); 191 AT24_CHIP_DATA(at24_data_24cs16, 16, 192 AT24_FLAG_SERIAL | AT24_FLAG_READONLY); 193 AT24_CHIP_DATA(at24_data_24c32, 32768 / 8, AT24_FLAG_ADDR16); 194 AT24_CHIP_DATA(at24_data_24cs32, 16, 195 AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY); 196 AT24_CHIP_DATA(at24_data_24c64, 65536 / 8, AT24_FLAG_ADDR16); 197 AT24_CHIP_DATA(at24_data_24cs64, 16, 198 AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY); 199 AT24_CHIP_DATA(at24_data_24c128, 131072 / 8, AT24_FLAG_ADDR16); 200 AT24_CHIP_DATA(at24_data_24c256, 262144 / 8, AT24_FLAG_ADDR16); 201 AT24_CHIP_DATA(at24_data_24c512, 524288 / 8, AT24_FLAG_ADDR16); 202 AT24_CHIP_DATA(at24_data_24c1024, 1048576 / 8, AT24_FLAG_ADDR16); 203 AT24_CHIP_DATA_BS(at24_data_24c1025, 1048576 / 8, AT24_FLAG_ADDR16, 2); 204 AT24_CHIP_DATA(at24_data_24c2048, 2097152 / 8, AT24_FLAG_ADDR16); 205 /* identical to 24c08 ? */ 206 AT24_CHIP_DATA(at24_data_INT3499, 8192 / 8, 0); 207 208 static const struct i2c_device_id at24_ids[] = { 209 { "24c00", (kernel_ulong_t)&at24_data_24c00 }, 210 { "24c01", (kernel_ulong_t)&at24_data_24c01 }, 211 { "24cs01", (kernel_ulong_t)&at24_data_24cs01 }, 212 { "24c02", (kernel_ulong_t)&at24_data_24c02 }, 213 { "24cs02", (kernel_ulong_t)&at24_data_24cs02 }, 214 { "24mac402", (kernel_ulong_t)&at24_data_24mac402 }, 215 { "24mac602", (kernel_ulong_t)&at24_data_24mac602 }, 216 { "spd", (kernel_ulong_t)&at24_data_spd }, 217 { "24c02-vaio", (kernel_ulong_t)&at24_data_24c02_vaio }, 218 { "24c04", (kernel_ulong_t)&at24_data_24c04 }, 219 { "24cs04", (kernel_ulong_t)&at24_data_24cs04 }, 220 { "24c08", (kernel_ulong_t)&at24_data_24c08 }, 221 { "24cs08", (kernel_ulong_t)&at24_data_24cs08 }, 222 { "24c16", (kernel_ulong_t)&at24_data_24c16 }, 223 { "24cs16", (kernel_ulong_t)&at24_data_24cs16 }, 224 { "24c32", (kernel_ulong_t)&at24_data_24c32 }, 225 { "24cs32", (kernel_ulong_t)&at24_data_24cs32 }, 226 { "24c64", (kernel_ulong_t)&at24_data_24c64 }, 227 { "24cs64", (kernel_ulong_t)&at24_data_24cs64 }, 228 { "24c128", (kernel_ulong_t)&at24_data_24c128 }, 229 { "24c256", (kernel_ulong_t)&at24_data_24c256 }, 230 { "24c512", (kernel_ulong_t)&at24_data_24c512 }, 231 { "24c1024", (kernel_ulong_t)&at24_data_24c1024 }, 232 { "24c1025", (kernel_ulong_t)&at24_data_24c1025 }, 233 { "24c2048", (kernel_ulong_t)&at24_data_24c2048 }, 234 { "at24", 0 }, 235 { /* END OF LIST */ } 236 }; 237 MODULE_DEVICE_TABLE(i2c, at24_ids); 238 239 static const struct of_device_id at24_of_match[] = { 240 { .compatible = "atmel,24c00", .data = &at24_data_24c00 }, 241 { .compatible = "atmel,24c01", .data = &at24_data_24c01 }, 242 { .compatible = "atmel,24cs01", .data = &at24_data_24cs01 }, 243 { .compatible = "atmel,24c02", .data = &at24_data_24c02 }, 244 { .compatible = "atmel,24cs02", .data = &at24_data_24cs02 }, 245 { .compatible = "atmel,24mac402", .data = &at24_data_24mac402 }, 246 { .compatible = "atmel,24mac602", .data = &at24_data_24mac602 }, 247 { .compatible = "atmel,spd", .data = &at24_data_spd }, 248 { .compatible = "atmel,24c04", .data = &at24_data_24c04 }, 249 { .compatible = "atmel,24cs04", .data = &at24_data_24cs04 }, 250 { .compatible = "atmel,24c08", .data = &at24_data_24c08 }, 251 { .compatible = "atmel,24cs08", .data = &at24_data_24cs08 }, 252 { .compatible = "atmel,24c16", .data = &at24_data_24c16 }, 253 { .compatible = "atmel,24cs16", .data = &at24_data_24cs16 }, 254 { .compatible = "atmel,24c32", .data = &at24_data_24c32 }, 255 { .compatible = "atmel,24cs32", .data = &at24_data_24cs32 }, 256 { .compatible = "atmel,24c64", .data = &at24_data_24c64 }, 257 { .compatible = "atmel,24cs64", .data = &at24_data_24cs64 }, 258 { .compatible = "atmel,24c128", .data = &at24_data_24c128 }, 259 { .compatible = "atmel,24c256", .data = &at24_data_24c256 }, 260 { .compatible = "atmel,24c512", .data = &at24_data_24c512 }, 261 { .compatible = "atmel,24c1024", .data = &at24_data_24c1024 }, 262 { .compatible = "atmel,24c1025", .data = &at24_data_24c1025 }, 263 { .compatible = "atmel,24c2048", .data = &at24_data_24c2048 }, 264 { /* END OF LIST */ }, 265 }; 266 MODULE_DEVICE_TABLE(of, at24_of_match); 267 268 static const struct acpi_device_id __maybe_unused at24_acpi_ids[] = { 269 { "INT3499", (kernel_ulong_t)&at24_data_INT3499 }, 270 { "TPF0001", (kernel_ulong_t)&at24_data_24c1024 }, 271 { /* END OF LIST */ } 272 }; 273 MODULE_DEVICE_TABLE(acpi, at24_acpi_ids); 274 275 /* 276 * This routine supports chips which consume multiple I2C addresses. It 277 * computes the addressing information to be used for a given r/w request. 278 * Assumes that sanity checks for offset happened at sysfs-layer. 279 * 280 * Slave address and byte offset derive from the offset. Always 281 * set the byte address; on a multi-master board, another master 282 * may have changed the chip's "current" address pointer. 283 */ 284 static struct regmap *at24_translate_offset(struct at24_data *at24, 285 unsigned int *offset) 286 { 287 unsigned int i; 288 289 if (at24->flags & AT24_FLAG_ADDR16) { 290 i = *offset >> 16; 291 *offset &= 0xffff; 292 } else { 293 i = *offset >> 8; 294 *offset &= 0xff; 295 } 296 297 return at24->client_regmaps[i]; 298 } 299 300 static struct device *at24_base_client_dev(struct at24_data *at24) 301 { 302 return regmap_get_device(at24->client_regmaps[0]); 303 } 304 305 static size_t at24_adjust_read_count(struct at24_data *at24, 306 unsigned int offset, size_t count) 307 { 308 unsigned int bits; 309 size_t remainder; 310 311 /* 312 * In case of multi-address chips that don't rollover reads to 313 * the next slave address: truncate the count to the slave boundary, 314 * so that the read never straddles slaves. 315 */ 316 if (at24->flags & AT24_FLAG_NO_RDROL) { 317 bits = (at24->flags & AT24_FLAG_ADDR16) ? 16 : 8; 318 remainder = BIT(bits) - offset; 319 if (count > remainder) 320 count = remainder; 321 } 322 323 if (count > at24_io_limit) 324 count = at24_io_limit; 325 326 return count; 327 } 328 329 static ssize_t at24_regmap_read(struct at24_data *at24, char *buf, 330 unsigned int offset, size_t count) 331 { 332 unsigned long timeout, read_time; 333 struct regmap *regmap; 334 int ret; 335 336 regmap = at24_translate_offset(at24, &offset); 337 count = at24_adjust_read_count(at24, offset, count); 338 339 /* adjust offset for mac and serial read ops */ 340 offset += at24->offset_adj; 341 342 timeout = jiffies + msecs_to_jiffies(at24_write_timeout); 343 do { 344 /* 345 * The timestamp shall be taken before the actual operation 346 * to avoid a premature timeout in case of high CPU load. 347 */ 348 read_time = jiffies; 349 350 ret = regmap_bulk_read(regmap, offset, buf, count); 351 dev_dbg(regmap_get_device(regmap), "read %zu@%d --> %d (%ld)\n", 352 count, offset, ret, jiffies); 353 if (!ret) 354 return count; 355 356 usleep_range(1000, 1500); 357 } while (time_before(read_time, timeout)); 358 359 return -ETIMEDOUT; 360 } 361 362 /* 363 * Note that if the hardware write-protect pin is pulled high, the whole 364 * chip is normally write protected. But there are plenty of product 365 * variants here, including OTP fuses and partial chip protect. 366 * 367 * We only use page mode writes; the alternative is sloooow. These routines 368 * write at most one page. 369 */ 370 371 static size_t at24_adjust_write_count(struct at24_data *at24, 372 unsigned int offset, size_t count) 373 { 374 unsigned int next_page; 375 376 /* write_max is at most a page */ 377 if (count > at24->write_max) 378 count = at24->write_max; 379 380 /* Never roll over backwards, to the start of this page */ 381 next_page = roundup(offset + 1, at24->page_size); 382 if (offset + count > next_page) 383 count = next_page - offset; 384 385 return count; 386 } 387 388 static ssize_t at24_regmap_write(struct at24_data *at24, const char *buf, 389 unsigned int offset, size_t count) 390 { 391 unsigned long timeout, write_time; 392 struct regmap *regmap; 393 int ret; 394 395 regmap = at24_translate_offset(at24, &offset); 396 count = at24_adjust_write_count(at24, offset, count); 397 timeout = jiffies + msecs_to_jiffies(at24_write_timeout); 398 399 do { 400 /* 401 * The timestamp shall be taken before the actual operation 402 * to avoid a premature timeout in case of high CPU load. 403 */ 404 write_time = jiffies; 405 406 ret = regmap_bulk_write(regmap, offset, buf, count); 407 dev_dbg(regmap_get_device(regmap), "write %zu@%d --> %d (%ld)\n", 408 count, offset, ret, jiffies); 409 if (!ret) 410 return count; 411 412 usleep_range(1000, 1500); 413 } while (time_before(write_time, timeout)); 414 415 return -ETIMEDOUT; 416 } 417 418 static int at24_read(void *priv, unsigned int off, void *val, size_t count) 419 { 420 struct at24_data *at24; 421 struct device *dev; 422 char *buf = val; 423 int i, ret; 424 425 at24 = priv; 426 dev = at24_base_client_dev(at24); 427 428 if (unlikely(!count)) 429 return count; 430 431 if (off + count > at24->byte_len) 432 return -EINVAL; 433 434 ret = pm_runtime_get_sync(dev); 435 if (ret < 0) { 436 pm_runtime_put_noidle(dev); 437 return ret; 438 } 439 440 /* 441 * Read data from chip, protecting against concurrent updates 442 * from this host, but not from other I2C masters. 443 */ 444 mutex_lock(&at24->lock); 445 446 for (i = 0; count; i += ret, count -= ret) { 447 ret = at24_regmap_read(at24, buf + i, off + i, count); 448 if (ret < 0) { 449 mutex_unlock(&at24->lock); 450 pm_runtime_put(dev); 451 return ret; 452 } 453 } 454 455 mutex_unlock(&at24->lock); 456 457 pm_runtime_put(dev); 458 459 if (unlikely(at24->read_post)) 460 at24->read_post(off, buf, i); 461 462 return 0; 463 } 464 465 static int at24_write(void *priv, unsigned int off, void *val, size_t count) 466 { 467 struct at24_data *at24; 468 struct device *dev; 469 char *buf = val; 470 int ret; 471 472 at24 = priv; 473 dev = at24_base_client_dev(at24); 474 475 if (unlikely(!count)) 476 return -EINVAL; 477 478 if (off + count > at24->byte_len) 479 return -EINVAL; 480 481 ret = pm_runtime_get_sync(dev); 482 if (ret < 0) { 483 pm_runtime_put_noidle(dev); 484 return ret; 485 } 486 487 /* 488 * Write data to chip, protecting against concurrent updates 489 * from this host, but not from other I2C masters. 490 */ 491 mutex_lock(&at24->lock); 492 493 while (count) { 494 ret = at24_regmap_write(at24, buf, off, count); 495 if (ret < 0) { 496 mutex_unlock(&at24->lock); 497 pm_runtime_put(dev); 498 return ret; 499 } 500 buf += ret; 501 off += ret; 502 count -= ret; 503 } 504 505 mutex_unlock(&at24->lock); 506 507 pm_runtime_put(dev); 508 509 return 0; 510 } 511 512 static const struct at24_chip_data *at24_get_chip_data(struct device *dev) 513 { 514 struct device_node *of_node = dev->of_node; 515 const struct at24_chip_data *cdata; 516 const struct i2c_device_id *id; 517 518 id = i2c_match_id(at24_ids, to_i2c_client(dev)); 519 520 /* 521 * The I2C core allows OF nodes compatibles to match against the 522 * I2C device ID table as a fallback, so check not only if an OF 523 * node is present but also if it matches an OF device ID entry. 524 */ 525 if (of_node && of_match_device(at24_of_match, dev)) 526 cdata = of_device_get_match_data(dev); 527 else if (id) 528 cdata = (void *)id->driver_data; 529 else 530 cdata = acpi_device_get_match_data(dev); 531 532 if (!cdata) 533 return ERR_PTR(-ENODEV); 534 535 return cdata; 536 } 537 538 static int at24_make_dummy_client(struct at24_data *at24, unsigned int index, 539 struct i2c_client *base_client, 540 struct regmap_config *regmap_config) 541 { 542 struct i2c_client *dummy_client; 543 struct regmap *regmap; 544 545 dummy_client = devm_i2c_new_dummy_device(&base_client->dev, 546 base_client->adapter, 547 base_client->addr + 548 (index << at24->bank_addr_shift)); 549 if (IS_ERR(dummy_client)) 550 return PTR_ERR(dummy_client); 551 552 regmap = devm_regmap_init_i2c(dummy_client, regmap_config); 553 if (IS_ERR(regmap)) 554 return PTR_ERR(regmap); 555 556 at24->client_regmaps[index] = regmap; 557 558 return 0; 559 } 560 561 static unsigned int at24_get_offset_adj(u8 flags, unsigned int byte_len) 562 { 563 if (flags & AT24_FLAG_MAC) { 564 /* EUI-48 starts from 0x9a, EUI-64 from 0x98 */ 565 return 0xa0 - byte_len; 566 } else if (flags & AT24_FLAG_SERIAL && flags & AT24_FLAG_ADDR16) { 567 /* 568 * For 16 bit address pointers, the word address must contain 569 * a '10' sequence in bits 11 and 10 regardless of the 570 * intended position of the address pointer. 571 */ 572 return 0x0800; 573 } else if (flags & AT24_FLAG_SERIAL) { 574 /* 575 * Otherwise the word address must begin with a '10' sequence, 576 * regardless of the intended address. 577 */ 578 return 0x0080; 579 } else { 580 return 0; 581 } 582 } 583 584 static void at24_probe_temp_sensor(struct i2c_client *client) 585 { 586 struct at24_data *at24 = i2c_get_clientdata(client); 587 struct i2c_board_info info = { .type = "jc42" }; 588 int ret; 589 u8 val; 590 591 /* 592 * Byte 2 has value 11 for DDR3, earlier versions don't 593 * support the thermal sensor present flag 594 */ 595 ret = at24_read(at24, 2, &val, 1); 596 if (ret || val != 11) 597 return; 598 599 /* Byte 32, bit 7 is set if temp sensor is present */ 600 ret = at24_read(at24, 32, &val, 1); 601 if (ret || !(val & BIT(7))) 602 return; 603 604 info.addr = 0x18 | (client->addr & 7); 605 606 i2c_new_client_device(client->adapter, &info); 607 } 608 609 static int at24_probe(struct i2c_client *client) 610 { 611 struct regmap_config regmap_config = { }; 612 struct nvmem_config nvmem_config = { }; 613 u32 byte_len, page_size, flags, addrw; 614 const struct at24_chip_data *cdata; 615 struct device *dev = &client->dev; 616 bool i2c_fn_i2c, i2c_fn_block; 617 unsigned int i, num_addresses; 618 struct at24_data *at24; 619 bool full_power; 620 struct regmap *regmap; 621 bool writable; 622 u8 test_byte; 623 int err; 624 625 i2c_fn_i2c = i2c_check_functionality(client->adapter, I2C_FUNC_I2C); 626 i2c_fn_block = i2c_check_functionality(client->adapter, 627 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK); 628 629 cdata = at24_get_chip_data(dev); 630 if (IS_ERR(cdata)) 631 return PTR_ERR(cdata); 632 633 err = device_property_read_u32(dev, "pagesize", &page_size); 634 if (err) 635 /* 636 * This is slow, but we can't know all eeproms, so we better 637 * play safe. Specifying custom eeprom-types via device tree 638 * or properties is recommended anyhow. 639 */ 640 page_size = 1; 641 642 flags = cdata->flags; 643 if (device_property_present(dev, "read-only")) 644 flags |= AT24_FLAG_READONLY; 645 if (device_property_present(dev, "no-read-rollover")) 646 flags |= AT24_FLAG_NO_RDROL; 647 648 err = device_property_read_u32(dev, "address-width", &addrw); 649 if (!err) { 650 switch (addrw) { 651 case 8: 652 if (flags & AT24_FLAG_ADDR16) 653 dev_warn(dev, 654 "Override address width to be 8, while default is 16\n"); 655 flags &= ~AT24_FLAG_ADDR16; 656 break; 657 case 16: 658 flags |= AT24_FLAG_ADDR16; 659 break; 660 default: 661 dev_warn(dev, "Bad \"address-width\" property: %u\n", 662 addrw); 663 } 664 } 665 666 err = device_property_read_u32(dev, "size", &byte_len); 667 if (err) 668 byte_len = cdata->byte_len; 669 670 if (!i2c_fn_i2c && !i2c_fn_block) 671 page_size = 1; 672 673 if (!page_size) { 674 dev_err(dev, "page_size must not be 0!\n"); 675 return -EINVAL; 676 } 677 678 if (!is_power_of_2(page_size)) 679 dev_warn(dev, "page_size looks suspicious (no power of 2)!\n"); 680 681 err = device_property_read_u32(dev, "num-addresses", &num_addresses); 682 if (err) { 683 if (flags & AT24_FLAG_TAKE8ADDR) 684 num_addresses = 8; 685 else 686 num_addresses = DIV_ROUND_UP(byte_len, 687 (flags & AT24_FLAG_ADDR16) ? 65536 : 256); 688 } 689 690 if ((flags & AT24_FLAG_SERIAL) && (flags & AT24_FLAG_MAC)) { 691 dev_err(dev, 692 "invalid device data - cannot have both AT24_FLAG_SERIAL & AT24_FLAG_MAC."); 693 return -EINVAL; 694 } 695 696 regmap_config.val_bits = 8; 697 regmap_config.reg_bits = (flags & AT24_FLAG_ADDR16) ? 16 : 8; 698 regmap_config.disable_locking = true; 699 700 regmap = devm_regmap_init_i2c(client, ®map_config); 701 if (IS_ERR(regmap)) 702 return PTR_ERR(regmap); 703 704 at24 = devm_kzalloc(dev, struct_size(at24, client_regmaps, num_addresses), 705 GFP_KERNEL); 706 if (!at24) 707 return -ENOMEM; 708 709 mutex_init(&at24->lock); 710 at24->byte_len = byte_len; 711 at24->page_size = page_size; 712 at24->flags = flags; 713 at24->read_post = cdata->read_post; 714 at24->bank_addr_shift = cdata->bank_addr_shift; 715 at24->num_addresses = num_addresses; 716 at24->offset_adj = at24_get_offset_adj(flags, byte_len); 717 at24->client_regmaps[0] = regmap; 718 719 at24->vcc_reg = devm_regulator_get(dev, "vcc"); 720 if (IS_ERR(at24->vcc_reg)) 721 return PTR_ERR(at24->vcc_reg); 722 723 writable = !(flags & AT24_FLAG_READONLY); 724 if (writable) { 725 at24->write_max = min_t(unsigned int, 726 page_size, at24_io_limit); 727 if (!i2c_fn_i2c && at24->write_max > I2C_SMBUS_BLOCK_MAX) 728 at24->write_max = I2C_SMBUS_BLOCK_MAX; 729 } 730 731 /* use dummy devices for multiple-address chips */ 732 for (i = 1; i < num_addresses; i++) { 733 err = at24_make_dummy_client(at24, i, client, ®map_config); 734 if (err) 735 return err; 736 } 737 738 /* 739 * We initialize nvmem_config.id to NVMEM_DEVID_AUTO even if the 740 * label property is set as some platform can have multiple eeproms 741 * with same label and we can not register each of those with same 742 * label. Failing to register those eeproms trigger cascade failure 743 * on such platform. 744 */ 745 nvmem_config.id = NVMEM_DEVID_AUTO; 746 747 if (device_property_present(dev, "label")) { 748 err = device_property_read_string(dev, "label", 749 &nvmem_config.name); 750 if (err) 751 return err; 752 } else { 753 nvmem_config.name = dev_name(dev); 754 } 755 756 nvmem_config.type = NVMEM_TYPE_EEPROM; 757 nvmem_config.dev = dev; 758 nvmem_config.read_only = !writable; 759 nvmem_config.root_only = !(flags & AT24_FLAG_IRUGO); 760 nvmem_config.owner = THIS_MODULE; 761 nvmem_config.compat = true; 762 nvmem_config.base_dev = dev; 763 nvmem_config.reg_read = at24_read; 764 nvmem_config.reg_write = at24_write; 765 nvmem_config.priv = at24; 766 nvmem_config.stride = 1; 767 nvmem_config.word_size = 1; 768 nvmem_config.size = byte_len; 769 770 i2c_set_clientdata(client, at24); 771 772 full_power = acpi_dev_state_d0(&client->dev); 773 if (full_power) { 774 err = regulator_enable(at24->vcc_reg); 775 if (err) { 776 dev_err(dev, "Failed to enable vcc regulator\n"); 777 return err; 778 } 779 780 pm_runtime_set_active(dev); 781 } 782 pm_runtime_enable(dev); 783 784 /* 785 * Perform a one-byte test read to verify that the chip is functional, 786 * unless powering on the device is to be avoided during probe (i.e. 787 * it's powered off right now). 788 */ 789 if (full_power) { 790 err = at24_read(at24, 0, &test_byte, 1); 791 if (err) { 792 pm_runtime_disable(dev); 793 if (!pm_runtime_status_suspended(dev)) 794 regulator_disable(at24->vcc_reg); 795 return -ENODEV; 796 } 797 } 798 799 at24->nvmem = devm_nvmem_register(dev, &nvmem_config); 800 if (IS_ERR(at24->nvmem)) { 801 pm_runtime_disable(dev); 802 if (!pm_runtime_status_suspended(dev)) 803 regulator_disable(at24->vcc_reg); 804 return dev_err_probe(dev, PTR_ERR(at24->nvmem), 805 "failed to register nvmem\n"); 806 } 807 808 /* If this a SPD EEPROM, probe for DDR3 thermal sensor */ 809 if (cdata == &at24_data_spd) 810 at24_probe_temp_sensor(client); 811 812 pm_runtime_idle(dev); 813 814 if (writable) 815 dev_info(dev, "%u byte %s EEPROM, writable, %u bytes/write\n", 816 byte_len, client->name, at24->write_max); 817 else 818 dev_info(dev, "%u byte %s EEPROM, read-only\n", 819 byte_len, client->name); 820 821 return 0; 822 } 823 824 static void at24_remove(struct i2c_client *client) 825 { 826 struct at24_data *at24 = i2c_get_clientdata(client); 827 828 pm_runtime_disable(&client->dev); 829 if (acpi_dev_state_d0(&client->dev)) { 830 if (!pm_runtime_status_suspended(&client->dev)) 831 regulator_disable(at24->vcc_reg); 832 pm_runtime_set_suspended(&client->dev); 833 } 834 } 835 836 static int __maybe_unused at24_suspend(struct device *dev) 837 { 838 struct i2c_client *client = to_i2c_client(dev); 839 struct at24_data *at24 = i2c_get_clientdata(client); 840 841 return regulator_disable(at24->vcc_reg); 842 } 843 844 static int __maybe_unused at24_resume(struct device *dev) 845 { 846 struct i2c_client *client = to_i2c_client(dev); 847 struct at24_data *at24 = i2c_get_clientdata(client); 848 849 return regulator_enable(at24->vcc_reg); 850 } 851 852 static const struct dev_pm_ops at24_pm_ops = { 853 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, 854 pm_runtime_force_resume) 855 SET_RUNTIME_PM_OPS(at24_suspend, at24_resume, NULL) 856 }; 857 858 static struct i2c_driver at24_driver = { 859 .driver = { 860 .name = "at24", 861 .pm = &at24_pm_ops, 862 .of_match_table = at24_of_match, 863 .acpi_match_table = ACPI_PTR(at24_acpi_ids), 864 }, 865 .probe = at24_probe, 866 .remove = at24_remove, 867 .id_table = at24_ids, 868 .flags = I2C_DRV_ACPI_WAIVE_D0_PROBE, 869 }; 870 871 static int __init at24_init(void) 872 { 873 if (!at24_io_limit) { 874 pr_err("at24: at24_io_limit must not be 0!\n"); 875 return -EINVAL; 876 } 877 878 at24_io_limit = rounddown_pow_of_two(at24_io_limit); 879 return i2c_add_driver(&at24_driver); 880 } 881 module_init(at24_init); 882 883 static void __exit at24_exit(void) 884 { 885 i2c_del_driver(&at24_driver); 886 } 887 module_exit(at24_exit); 888 889 MODULE_DESCRIPTION("Driver for most I2C EEPROMs"); 890 MODULE_AUTHOR("David Brownell and Wolfram Sang"); 891 MODULE_LICENSE("GPL"); 892