1 /* 2 * at24.c - handle most I2C EEPROMs 3 * 4 * Copyright (C) 2005-2007 David Brownell 5 * Copyright (C) 2008 Wolfram Sang, Pengutronix 6 * 7 * This program is free software; you can redistribute it and/or modify 8 * it under the terms of the GNU General Public License as published by 9 * the Free Software Foundation; either version 2 of the License, or 10 * (at your option) any later version. 11 */ 12 #include <linux/kernel.h> 13 #include <linux/init.h> 14 #include <linux/module.h> 15 #include <linux/of_device.h> 16 #include <linux/slab.h> 17 #include <linux/delay.h> 18 #include <linux/mutex.h> 19 #include <linux/mod_devicetable.h> 20 #include <linux/log2.h> 21 #include <linux/bitops.h> 22 #include <linux/jiffies.h> 23 #include <linux/property.h> 24 #include <linux/acpi.h> 25 #include <linux/i2c.h> 26 #include <linux/nvmem-provider.h> 27 #include <linux/platform_data/at24.h> 28 #include <linux/pm_runtime.h> 29 30 /* 31 * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable. 32 * Differences between different vendor product lines (like Atmel AT24C or 33 * MicroChip 24LC, etc) won't much matter for typical read/write access. 34 * There are also I2C RAM chips, likewise interchangeable. One example 35 * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes). 36 * 37 * However, misconfiguration can lose data. "Set 16-bit memory address" 38 * to a part with 8-bit addressing will overwrite data. Writing with too 39 * big a page size also loses data. And it's not safe to assume that the 40 * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC 41 * uses 0x51, for just one example. 42 * 43 * Accordingly, explicit board-specific configuration data should be used 44 * in almost all cases. (One partial exception is an SMBus used to access 45 * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.) 46 * 47 * So this driver uses "new style" I2C driver binding, expecting to be 48 * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or 49 * similar kernel-resident tables; or, configuration data coming from 50 * a bootloader. 51 * 52 * Other than binding model, current differences from "eeprom" driver are 53 * that this one handles write access and isn't restricted to 24c02 devices. 54 * It also handles larger devices (32 kbit and up) with two-byte addresses, 55 * which won't work on pure SMBus systems. 56 */ 57 58 struct at24_data { 59 struct at24_platform_data chip; 60 int use_smbus; 61 int use_smbus_write; 62 63 ssize_t (*read_func)(struct at24_data *, char *, unsigned int, size_t); 64 ssize_t (*write_func)(struct at24_data *, 65 const char *, unsigned int, size_t); 66 67 /* 68 * Lock protects against activities from other Linux tasks, 69 * but not from changes by other I2C masters. 70 */ 71 struct mutex lock; 72 73 u8 *writebuf; 74 unsigned write_max; 75 unsigned num_addresses; 76 77 struct nvmem_config nvmem_config; 78 struct nvmem_device *nvmem; 79 80 /* 81 * Some chips tie up multiple I2C addresses; dummy devices reserve 82 * them for us, and we'll use them with SMBus calls. 83 */ 84 struct i2c_client *client[]; 85 }; 86 87 /* 88 * This parameter is to help this driver avoid blocking other drivers out 89 * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C 90 * clock, one 256 byte read takes about 1/43 second which is excessive; 91 * but the 1/170 second it takes at 400 kHz may be quite reasonable; and 92 * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible. 93 * 94 * This value is forced to be a power of two so that writes align on pages. 95 */ 96 static unsigned io_limit = 128; 97 module_param(io_limit, uint, 0); 98 MODULE_PARM_DESC(io_limit, "Maximum bytes per I/O (default 128)"); 99 100 /* 101 * Specs often allow 5 msec for a page write, sometimes 20 msec; 102 * it's important to recover from write timeouts. 103 */ 104 static unsigned write_timeout = 25; 105 module_param(write_timeout, uint, 0); 106 MODULE_PARM_DESC(write_timeout, "Time (in ms) to try writes (default 25)"); 107 108 #define AT24_SIZE_BYTELEN 5 109 #define AT24_SIZE_FLAGS 8 110 111 #define AT24_BITMASK(x) (BIT(x) - 1) 112 113 /* create non-zero magic value for given eeprom parameters */ 114 #define AT24_DEVICE_MAGIC(_len, _flags) \ 115 ((1 << AT24_SIZE_FLAGS | (_flags)) \ 116 << AT24_SIZE_BYTELEN | ilog2(_len)) 117 118 /* 119 * Both reads and writes fail if the previous write didn't complete yet. This 120 * macro loops a few times waiting at least long enough for one entire page 121 * write to work while making sure that at least one iteration is run before 122 * checking the break condition. 123 * 124 * It takes two parameters: a variable in which the future timeout in jiffies 125 * will be stored and a temporary variable holding the time of the last 126 * iteration of processing the request. Both should be unsigned integers 127 * holding at least 32 bits. 128 */ 129 #define loop_until_timeout(tout, op_time) \ 130 for (tout = jiffies + msecs_to_jiffies(write_timeout), op_time = 0; \ 131 op_time ? time_before(op_time, tout) : true; \ 132 usleep_range(1000, 1500), op_time = jiffies) 133 134 static const struct i2c_device_id at24_ids[] = { 135 /* needs 8 addresses as A0-A2 are ignored */ 136 { "24c00", AT24_DEVICE_MAGIC(128 / 8, AT24_FLAG_TAKE8ADDR) }, 137 /* old variants can't be handled with this generic entry! */ 138 { "24c01", AT24_DEVICE_MAGIC(1024 / 8, 0) }, 139 { "24cs01", AT24_DEVICE_MAGIC(16, 140 AT24_FLAG_SERIAL | AT24_FLAG_READONLY) }, 141 { "24c02", AT24_DEVICE_MAGIC(2048 / 8, 0) }, 142 { "24cs02", AT24_DEVICE_MAGIC(16, 143 AT24_FLAG_SERIAL | AT24_FLAG_READONLY) }, 144 { "24mac402", AT24_DEVICE_MAGIC(48 / 8, 145 AT24_FLAG_MAC | AT24_FLAG_READONLY) }, 146 { "24mac602", AT24_DEVICE_MAGIC(64 / 8, 147 AT24_FLAG_MAC | AT24_FLAG_READONLY) }, 148 /* spd is a 24c02 in memory DIMMs */ 149 { "spd", AT24_DEVICE_MAGIC(2048 / 8, 150 AT24_FLAG_READONLY | AT24_FLAG_IRUGO) }, 151 { "24c04", AT24_DEVICE_MAGIC(4096 / 8, 0) }, 152 { "24cs04", AT24_DEVICE_MAGIC(16, 153 AT24_FLAG_SERIAL | AT24_FLAG_READONLY) }, 154 /* 24rf08 quirk is handled at i2c-core */ 155 { "24c08", AT24_DEVICE_MAGIC(8192 / 8, 0) }, 156 { "24cs08", AT24_DEVICE_MAGIC(16, 157 AT24_FLAG_SERIAL | AT24_FLAG_READONLY) }, 158 { "24c16", AT24_DEVICE_MAGIC(16384 / 8, 0) }, 159 { "24cs16", AT24_DEVICE_MAGIC(16, 160 AT24_FLAG_SERIAL | AT24_FLAG_READONLY) }, 161 { "24c32", AT24_DEVICE_MAGIC(32768 / 8, AT24_FLAG_ADDR16) }, 162 { "24cs32", AT24_DEVICE_MAGIC(16, 163 AT24_FLAG_ADDR16 | 164 AT24_FLAG_SERIAL | 165 AT24_FLAG_READONLY) }, 166 { "24c64", AT24_DEVICE_MAGIC(65536 / 8, AT24_FLAG_ADDR16) }, 167 { "24cs64", AT24_DEVICE_MAGIC(16, 168 AT24_FLAG_ADDR16 | 169 AT24_FLAG_SERIAL | 170 AT24_FLAG_READONLY) }, 171 { "24c128", AT24_DEVICE_MAGIC(131072 / 8, AT24_FLAG_ADDR16) }, 172 { "24c256", AT24_DEVICE_MAGIC(262144 / 8, AT24_FLAG_ADDR16) }, 173 { "24c512", AT24_DEVICE_MAGIC(524288 / 8, AT24_FLAG_ADDR16) }, 174 { "24c1024", AT24_DEVICE_MAGIC(1048576 / 8, AT24_FLAG_ADDR16) }, 175 { "at24", 0 }, 176 { /* END OF LIST */ } 177 }; 178 MODULE_DEVICE_TABLE(i2c, at24_ids); 179 180 static const struct of_device_id at24_of_match[] = { 181 { 182 .compatible = "atmel,24c00", 183 .data = (void *)AT24_DEVICE_MAGIC(128 / 8, AT24_FLAG_TAKE8ADDR) 184 }, 185 { 186 .compatible = "atmel,24c01", 187 .data = (void *)AT24_DEVICE_MAGIC(1024 / 8, 0) 188 }, 189 { 190 .compatible = "atmel,24c02", 191 .data = (void *)AT24_DEVICE_MAGIC(2048 / 8, 0) 192 }, 193 { 194 .compatible = "atmel,spd", 195 .data = (void *)AT24_DEVICE_MAGIC(2048 / 8, 196 AT24_FLAG_READONLY | AT24_FLAG_IRUGO) 197 }, 198 { 199 .compatible = "atmel,24c04", 200 .data = (void *)AT24_DEVICE_MAGIC(4096 / 8, 0) 201 }, 202 { 203 .compatible = "atmel,24c08", 204 .data = (void *)AT24_DEVICE_MAGIC(8192 / 8, 0) 205 }, 206 { 207 .compatible = "atmel,24c16", 208 .data = (void *)AT24_DEVICE_MAGIC(16384 / 8, 0) 209 }, 210 { 211 .compatible = "atmel,24c32", 212 .data = (void *)AT24_DEVICE_MAGIC(32768 / 8, AT24_FLAG_ADDR16) 213 }, 214 { 215 .compatible = "atmel,24c64", 216 .data = (void *)AT24_DEVICE_MAGIC(65536 / 8, AT24_FLAG_ADDR16) 217 }, 218 { 219 .compatible = "atmel,24c128", 220 .data = (void *)AT24_DEVICE_MAGIC(131072 / 8, AT24_FLAG_ADDR16) 221 }, 222 { 223 .compatible = "atmel,24c256", 224 .data = (void *)AT24_DEVICE_MAGIC(262144 / 8, AT24_FLAG_ADDR16) 225 }, 226 { 227 .compatible = "atmel,24c512", 228 .data = (void *)AT24_DEVICE_MAGIC(524288 / 8, AT24_FLAG_ADDR16) 229 }, 230 { 231 .compatible = "atmel,24c1024", 232 .data = (void *)AT24_DEVICE_MAGIC(1048576 / 8, AT24_FLAG_ADDR16) 233 }, 234 { }, 235 }; 236 MODULE_DEVICE_TABLE(of, at24_of_match); 237 238 static const struct acpi_device_id at24_acpi_ids[] = { 239 { "INT3499", AT24_DEVICE_MAGIC(8192 / 8, 0) }, 240 { } 241 }; 242 MODULE_DEVICE_TABLE(acpi, at24_acpi_ids); 243 244 /*-------------------------------------------------------------------------*/ 245 246 /* 247 * This routine supports chips which consume multiple I2C addresses. It 248 * computes the addressing information to be used for a given r/w request. 249 * Assumes that sanity checks for offset happened at sysfs-layer. 250 * 251 * Slave address and byte offset derive from the offset. Always 252 * set the byte address; on a multi-master board, another master 253 * may have changed the chip's "current" address pointer. 254 * 255 * REVISIT some multi-address chips don't rollover page reads to 256 * the next slave address, so we may need to truncate the count. 257 * Those chips might need another quirk flag. 258 * 259 * If the real hardware used four adjacent 24c02 chips and that 260 * were misconfigured as one 24c08, that would be a similar effect: 261 * one "eeprom" file not four, but larger reads would fail when 262 * they crossed certain pages. 263 */ 264 static struct i2c_client *at24_translate_offset(struct at24_data *at24, 265 unsigned int *offset) 266 { 267 unsigned i; 268 269 if (at24->chip.flags & AT24_FLAG_ADDR16) { 270 i = *offset >> 16; 271 *offset &= 0xffff; 272 } else { 273 i = *offset >> 8; 274 *offset &= 0xff; 275 } 276 277 return at24->client[i]; 278 } 279 280 static ssize_t at24_eeprom_read_smbus(struct at24_data *at24, char *buf, 281 unsigned int offset, size_t count) 282 { 283 unsigned long timeout, read_time; 284 struct i2c_client *client; 285 int status; 286 287 client = at24_translate_offset(at24, &offset); 288 289 if (count > io_limit) 290 count = io_limit; 291 292 /* Smaller eeproms can work given some SMBus extension calls */ 293 if (count > I2C_SMBUS_BLOCK_MAX) 294 count = I2C_SMBUS_BLOCK_MAX; 295 296 loop_until_timeout(timeout, read_time) { 297 status = i2c_smbus_read_i2c_block_data_or_emulated(client, 298 offset, 299 count, buf); 300 301 dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n", 302 count, offset, status, jiffies); 303 304 if (status == count) 305 return count; 306 } 307 308 return -ETIMEDOUT; 309 } 310 311 static ssize_t at24_eeprom_read_i2c(struct at24_data *at24, char *buf, 312 unsigned int offset, size_t count) 313 { 314 unsigned long timeout, read_time; 315 struct i2c_client *client; 316 struct i2c_msg msg[2]; 317 int status, i; 318 u8 msgbuf[2]; 319 320 memset(msg, 0, sizeof(msg)); 321 client = at24_translate_offset(at24, &offset); 322 323 if (count > io_limit) 324 count = io_limit; 325 326 /* 327 * When we have a better choice than SMBus calls, use a combined I2C 328 * message. Write address; then read up to io_limit data bytes. Note 329 * that read page rollover helps us here (unlike writes). msgbuf is 330 * u8 and will cast to our needs. 331 */ 332 i = 0; 333 if (at24->chip.flags & AT24_FLAG_ADDR16) 334 msgbuf[i++] = offset >> 8; 335 msgbuf[i++] = offset; 336 337 msg[0].addr = client->addr; 338 msg[0].buf = msgbuf; 339 msg[0].len = i; 340 341 msg[1].addr = client->addr; 342 msg[1].flags = I2C_M_RD; 343 msg[1].buf = buf; 344 msg[1].len = count; 345 346 loop_until_timeout(timeout, read_time) { 347 status = i2c_transfer(client->adapter, msg, 2); 348 if (status == 2) 349 status = count; 350 351 dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n", 352 count, offset, status, jiffies); 353 354 if (status == count) 355 return count; 356 } 357 358 return -ETIMEDOUT; 359 } 360 361 static ssize_t at24_eeprom_read_serial(struct at24_data *at24, char *buf, 362 unsigned int offset, size_t count) 363 { 364 unsigned long timeout, read_time; 365 struct i2c_client *client; 366 struct i2c_msg msg[2]; 367 u8 addrbuf[2]; 368 int status; 369 370 client = at24_translate_offset(at24, &offset); 371 372 memset(msg, 0, sizeof(msg)); 373 msg[0].addr = client->addr; 374 msg[0].buf = addrbuf; 375 376 /* 377 * The address pointer of the device is shared between the regular 378 * EEPROM array and the serial number block. The dummy write (part of 379 * the sequential read protocol) ensures the address pointer is reset 380 * to the desired position. 381 */ 382 if (at24->chip.flags & AT24_FLAG_ADDR16) { 383 /* 384 * For 16 bit address pointers, the word address must contain 385 * a '10' sequence in bits 11 and 10 regardless of the 386 * intended position of the address pointer. 387 */ 388 addrbuf[0] = 0x08; 389 addrbuf[1] = offset; 390 msg[0].len = 2; 391 } else { 392 /* 393 * Otherwise the word address must begin with a '10' sequence, 394 * regardless of the intended address. 395 */ 396 addrbuf[0] = 0x80 + offset; 397 msg[0].len = 1; 398 } 399 400 msg[1].addr = client->addr; 401 msg[1].flags = I2C_M_RD; 402 msg[1].buf = buf; 403 msg[1].len = count; 404 405 loop_until_timeout(timeout, read_time) { 406 status = i2c_transfer(client->adapter, msg, 2); 407 if (status == 2) 408 return count; 409 } 410 411 return -ETIMEDOUT; 412 } 413 414 static ssize_t at24_eeprom_read_mac(struct at24_data *at24, char *buf, 415 unsigned int offset, size_t count) 416 { 417 unsigned long timeout, read_time; 418 struct i2c_client *client; 419 struct i2c_msg msg[2]; 420 u8 addrbuf[2]; 421 int status; 422 423 client = at24_translate_offset(at24, &offset); 424 425 memset(msg, 0, sizeof(msg)); 426 msg[0].addr = client->addr; 427 msg[0].buf = addrbuf; 428 addrbuf[0] = 0x90 + offset; 429 msg[0].len = 1; 430 msg[1].addr = client->addr; 431 msg[1].flags = I2C_M_RD; 432 msg[1].buf = buf; 433 msg[1].len = count; 434 435 loop_until_timeout(timeout, read_time) { 436 status = i2c_transfer(client->adapter, msg, 2); 437 if (status == 2) 438 return count; 439 } 440 441 return -ETIMEDOUT; 442 } 443 444 /* 445 * Note that if the hardware write-protect pin is pulled high, the whole 446 * chip is normally write protected. But there are plenty of product 447 * variants here, including OTP fuses and partial chip protect. 448 * 449 * We only use page mode writes; the alternative is sloooow. These routines 450 * write at most one page. 451 */ 452 453 static size_t at24_adjust_write_count(struct at24_data *at24, 454 unsigned int offset, size_t count) 455 { 456 unsigned next_page; 457 458 /* write_max is at most a page */ 459 if (count > at24->write_max) 460 count = at24->write_max; 461 462 /* Never roll over backwards, to the start of this page */ 463 next_page = roundup(offset + 1, at24->chip.page_size); 464 if (offset + count > next_page) 465 count = next_page - offset; 466 467 return count; 468 } 469 470 static ssize_t at24_eeprom_write_smbus_block(struct at24_data *at24, 471 const char *buf, 472 unsigned int offset, size_t count) 473 { 474 unsigned long timeout, write_time; 475 struct i2c_client *client; 476 ssize_t status = 0; 477 478 client = at24_translate_offset(at24, &offset); 479 count = at24_adjust_write_count(at24, offset, count); 480 481 loop_until_timeout(timeout, write_time) { 482 status = i2c_smbus_write_i2c_block_data(client, 483 offset, count, buf); 484 if (status == 0) 485 status = count; 486 487 dev_dbg(&client->dev, "write %zu@%d --> %zd (%ld)\n", 488 count, offset, status, jiffies); 489 490 if (status == count) 491 return count; 492 } 493 494 return -ETIMEDOUT; 495 } 496 497 static ssize_t at24_eeprom_write_smbus_byte(struct at24_data *at24, 498 const char *buf, 499 unsigned int offset, size_t count) 500 { 501 unsigned long timeout, write_time; 502 struct i2c_client *client; 503 ssize_t status = 0; 504 505 client = at24_translate_offset(at24, &offset); 506 507 loop_until_timeout(timeout, write_time) { 508 status = i2c_smbus_write_byte_data(client, offset, buf[0]); 509 if (status == 0) 510 status = count; 511 512 dev_dbg(&client->dev, "write %zu@%d --> %zd (%ld)\n", 513 count, offset, status, jiffies); 514 515 if (status == count) 516 return count; 517 } 518 519 return -ETIMEDOUT; 520 } 521 522 static ssize_t at24_eeprom_write_i2c(struct at24_data *at24, const char *buf, 523 unsigned int offset, size_t count) 524 { 525 unsigned long timeout, write_time; 526 struct i2c_client *client; 527 struct i2c_msg msg; 528 ssize_t status = 0; 529 int i = 0; 530 531 client = at24_translate_offset(at24, &offset); 532 count = at24_adjust_write_count(at24, offset, count); 533 534 msg.addr = client->addr; 535 msg.flags = 0; 536 537 /* msg.buf is u8 and casts will mask the values */ 538 msg.buf = at24->writebuf; 539 if (at24->chip.flags & AT24_FLAG_ADDR16) 540 msg.buf[i++] = offset >> 8; 541 542 msg.buf[i++] = offset; 543 memcpy(&msg.buf[i], buf, count); 544 msg.len = i + count; 545 546 loop_until_timeout(timeout, write_time) { 547 status = i2c_transfer(client->adapter, &msg, 1); 548 if (status == 1) 549 status = count; 550 551 dev_dbg(&client->dev, "write %zu@%d --> %zd (%ld)\n", 552 count, offset, status, jiffies); 553 554 if (status == count) 555 return count; 556 } 557 558 return -ETIMEDOUT; 559 } 560 561 static int at24_read(void *priv, unsigned int off, void *val, size_t count) 562 { 563 struct at24_data *at24 = priv; 564 struct i2c_client *client; 565 char *buf = val; 566 int ret; 567 568 if (unlikely(!count)) 569 return count; 570 571 client = at24_translate_offset(at24, &off); 572 573 ret = pm_runtime_get_sync(&client->dev); 574 if (ret < 0) { 575 pm_runtime_put_noidle(&client->dev); 576 return ret; 577 } 578 579 /* 580 * Read data from chip, protecting against concurrent updates 581 * from this host, but not from other I2C masters. 582 */ 583 mutex_lock(&at24->lock); 584 585 while (count) { 586 int status; 587 588 status = at24->read_func(at24, buf, off, count); 589 if (status < 0) { 590 mutex_unlock(&at24->lock); 591 pm_runtime_put(&client->dev); 592 return status; 593 } 594 buf += status; 595 off += status; 596 count -= status; 597 } 598 599 mutex_unlock(&at24->lock); 600 601 pm_runtime_put(&client->dev); 602 603 return 0; 604 } 605 606 static int at24_write(void *priv, unsigned int off, void *val, size_t count) 607 { 608 struct at24_data *at24 = priv; 609 struct i2c_client *client; 610 char *buf = val; 611 int ret; 612 613 if (unlikely(!count)) 614 return -EINVAL; 615 616 client = at24_translate_offset(at24, &off); 617 618 ret = pm_runtime_get_sync(&client->dev); 619 if (ret < 0) { 620 pm_runtime_put_noidle(&client->dev); 621 return ret; 622 } 623 624 /* 625 * Write data to chip, protecting against concurrent updates 626 * from this host, but not from other I2C masters. 627 */ 628 mutex_lock(&at24->lock); 629 630 while (count) { 631 int status; 632 633 status = at24->write_func(at24, buf, off, count); 634 if (status < 0) { 635 mutex_unlock(&at24->lock); 636 pm_runtime_put(&client->dev); 637 return status; 638 } 639 buf += status; 640 off += status; 641 count -= status; 642 } 643 644 mutex_unlock(&at24->lock); 645 646 pm_runtime_put(&client->dev); 647 648 return 0; 649 } 650 651 static void at24_get_pdata(struct device *dev, struct at24_platform_data *chip) 652 { 653 int err; 654 u32 val; 655 656 if (device_property_present(dev, "read-only")) 657 chip->flags |= AT24_FLAG_READONLY; 658 659 err = device_property_read_u32(dev, "size", &val); 660 if (!err) 661 chip->byte_len = val; 662 663 err = device_property_read_u32(dev, "pagesize", &val); 664 if (!err) { 665 chip->page_size = val; 666 } else { 667 /* 668 * This is slow, but we can't know all eeproms, so we better 669 * play safe. Specifying custom eeprom-types via platform_data 670 * is recommended anyhow. 671 */ 672 chip->page_size = 1; 673 } 674 } 675 676 static int at24_probe(struct i2c_client *client, const struct i2c_device_id *id) 677 { 678 struct at24_platform_data chip; 679 kernel_ulong_t magic = 0; 680 bool writable; 681 int use_smbus = 0; 682 int use_smbus_write = 0; 683 struct at24_data *at24; 684 int err; 685 unsigned i, num_addresses; 686 u8 test_byte; 687 688 if (client->dev.platform_data) { 689 chip = *(struct at24_platform_data *)client->dev.platform_data; 690 } else { 691 /* 692 * The I2C core allows OF nodes compatibles to match against the 693 * I2C device ID table as a fallback, so check not only if an OF 694 * node is present but also if it matches an OF device ID entry. 695 */ 696 if (client->dev.of_node && 697 of_match_device(at24_of_match, &client->dev)) { 698 magic = (kernel_ulong_t) 699 of_device_get_match_data(&client->dev); 700 } else if (id) { 701 magic = id->driver_data; 702 } else { 703 const struct acpi_device_id *aid; 704 705 aid = acpi_match_device(at24_acpi_ids, &client->dev); 706 if (aid) 707 magic = aid->driver_data; 708 } 709 if (!magic) 710 return -ENODEV; 711 712 chip.byte_len = BIT(magic & AT24_BITMASK(AT24_SIZE_BYTELEN)); 713 magic >>= AT24_SIZE_BYTELEN; 714 chip.flags = magic & AT24_BITMASK(AT24_SIZE_FLAGS); 715 716 at24_get_pdata(&client->dev, &chip); 717 718 chip.setup = NULL; 719 chip.context = NULL; 720 } 721 722 if (!is_power_of_2(chip.byte_len)) 723 dev_warn(&client->dev, 724 "byte_len looks suspicious (no power of 2)!\n"); 725 if (!chip.page_size) { 726 dev_err(&client->dev, "page_size must not be 0!\n"); 727 return -EINVAL; 728 } 729 if (!is_power_of_2(chip.page_size)) 730 dev_warn(&client->dev, 731 "page_size looks suspicious (no power of 2)!\n"); 732 733 /* Use I2C operations unless we're stuck with SMBus extensions. */ 734 if (!i2c_check_functionality(client->adapter, I2C_FUNC_I2C)) { 735 if (chip.flags & AT24_FLAG_ADDR16) 736 return -EPFNOSUPPORT; 737 738 if (i2c_check_functionality(client->adapter, 739 I2C_FUNC_SMBUS_READ_I2C_BLOCK)) { 740 use_smbus = I2C_SMBUS_I2C_BLOCK_DATA; 741 } else if (i2c_check_functionality(client->adapter, 742 I2C_FUNC_SMBUS_READ_WORD_DATA)) { 743 use_smbus = I2C_SMBUS_WORD_DATA; 744 } else if (i2c_check_functionality(client->adapter, 745 I2C_FUNC_SMBUS_READ_BYTE_DATA)) { 746 use_smbus = I2C_SMBUS_BYTE_DATA; 747 } else { 748 return -EPFNOSUPPORT; 749 } 750 751 if (i2c_check_functionality(client->adapter, 752 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK)) { 753 use_smbus_write = I2C_SMBUS_I2C_BLOCK_DATA; 754 } else if (i2c_check_functionality(client->adapter, 755 I2C_FUNC_SMBUS_WRITE_BYTE_DATA)) { 756 use_smbus_write = I2C_SMBUS_BYTE_DATA; 757 chip.page_size = 1; 758 } 759 } 760 761 if (chip.flags & AT24_FLAG_TAKE8ADDR) 762 num_addresses = 8; 763 else 764 num_addresses = DIV_ROUND_UP(chip.byte_len, 765 (chip.flags & AT24_FLAG_ADDR16) ? 65536 : 256); 766 767 at24 = devm_kzalloc(&client->dev, sizeof(struct at24_data) + 768 num_addresses * sizeof(struct i2c_client *), GFP_KERNEL); 769 if (!at24) 770 return -ENOMEM; 771 772 mutex_init(&at24->lock); 773 at24->use_smbus = use_smbus; 774 at24->use_smbus_write = use_smbus_write; 775 at24->chip = chip; 776 at24->num_addresses = num_addresses; 777 778 if ((chip.flags & AT24_FLAG_SERIAL) && (chip.flags & AT24_FLAG_MAC)) { 779 dev_err(&client->dev, 780 "invalid device data - cannot have both AT24_FLAG_SERIAL & AT24_FLAG_MAC."); 781 return -EINVAL; 782 } 783 784 if (chip.flags & AT24_FLAG_SERIAL) { 785 at24->read_func = at24_eeprom_read_serial; 786 } else if (chip.flags & AT24_FLAG_MAC) { 787 at24->read_func = at24_eeprom_read_mac; 788 } else { 789 at24->read_func = at24->use_smbus ? at24_eeprom_read_smbus 790 : at24_eeprom_read_i2c; 791 } 792 793 if (at24->use_smbus) { 794 if (at24->use_smbus_write == I2C_SMBUS_I2C_BLOCK_DATA) 795 at24->write_func = at24_eeprom_write_smbus_block; 796 else 797 at24->write_func = at24_eeprom_write_smbus_byte; 798 } else { 799 at24->write_func = at24_eeprom_write_i2c; 800 } 801 802 writable = !(chip.flags & AT24_FLAG_READONLY); 803 if (writable) { 804 if (!use_smbus || use_smbus_write) { 805 806 unsigned write_max = chip.page_size; 807 808 if (write_max > io_limit) 809 write_max = io_limit; 810 if (use_smbus && write_max > I2C_SMBUS_BLOCK_MAX) 811 write_max = I2C_SMBUS_BLOCK_MAX; 812 at24->write_max = write_max; 813 814 /* buffer (data + address at the beginning) */ 815 at24->writebuf = devm_kzalloc(&client->dev, 816 write_max + 2, GFP_KERNEL); 817 if (!at24->writebuf) 818 return -ENOMEM; 819 } else { 820 dev_warn(&client->dev, 821 "cannot write due to controller restrictions."); 822 } 823 } 824 825 at24->client[0] = client; 826 827 /* use dummy devices for multiple-address chips */ 828 for (i = 1; i < num_addresses; i++) { 829 at24->client[i] = i2c_new_dummy(client->adapter, 830 client->addr + i); 831 if (!at24->client[i]) { 832 dev_err(&client->dev, "address 0x%02x unavailable\n", 833 client->addr + i); 834 err = -EADDRINUSE; 835 goto err_clients; 836 } 837 } 838 839 i2c_set_clientdata(client, at24); 840 841 /* enable runtime pm */ 842 pm_runtime_set_active(&client->dev); 843 pm_runtime_enable(&client->dev); 844 845 /* 846 * Perform a one-byte test read to verify that the 847 * chip is functional. 848 */ 849 err = at24_read(at24, 0, &test_byte, 1); 850 pm_runtime_idle(&client->dev); 851 if (err) { 852 err = -ENODEV; 853 goto err_clients; 854 } 855 856 at24->nvmem_config.name = dev_name(&client->dev); 857 at24->nvmem_config.dev = &client->dev; 858 at24->nvmem_config.read_only = !writable; 859 at24->nvmem_config.root_only = true; 860 at24->nvmem_config.owner = THIS_MODULE; 861 at24->nvmem_config.compat = true; 862 at24->nvmem_config.base_dev = &client->dev; 863 at24->nvmem_config.reg_read = at24_read; 864 at24->nvmem_config.reg_write = at24_write; 865 at24->nvmem_config.priv = at24; 866 at24->nvmem_config.stride = 4; 867 at24->nvmem_config.word_size = 1; 868 at24->nvmem_config.size = chip.byte_len; 869 870 at24->nvmem = nvmem_register(&at24->nvmem_config); 871 872 if (IS_ERR(at24->nvmem)) { 873 err = PTR_ERR(at24->nvmem); 874 goto err_clients; 875 } 876 877 dev_info(&client->dev, "%u byte %s EEPROM, %s, %u bytes/write\n", 878 chip.byte_len, client->name, 879 writable ? "writable" : "read-only", at24->write_max); 880 if (use_smbus == I2C_SMBUS_WORD_DATA || 881 use_smbus == I2C_SMBUS_BYTE_DATA) { 882 dev_notice(&client->dev, "Falling back to %s reads, " 883 "performance will suffer\n", use_smbus == 884 I2C_SMBUS_WORD_DATA ? "word" : "byte"); 885 } 886 887 /* export data to kernel code */ 888 if (chip.setup) 889 chip.setup(at24->nvmem, chip.context); 890 891 return 0; 892 893 err_clients: 894 for (i = 1; i < num_addresses; i++) 895 if (at24->client[i]) 896 i2c_unregister_device(at24->client[i]); 897 898 pm_runtime_disable(&client->dev); 899 900 return err; 901 } 902 903 static int at24_remove(struct i2c_client *client) 904 { 905 struct at24_data *at24; 906 int i; 907 908 at24 = i2c_get_clientdata(client); 909 910 nvmem_unregister(at24->nvmem); 911 912 for (i = 1; i < at24->num_addresses; i++) 913 i2c_unregister_device(at24->client[i]); 914 915 pm_runtime_disable(&client->dev); 916 pm_runtime_set_suspended(&client->dev); 917 918 return 0; 919 } 920 921 /*-------------------------------------------------------------------------*/ 922 923 static struct i2c_driver at24_driver = { 924 .driver = { 925 .name = "at24", 926 .of_match_table = at24_of_match, 927 .acpi_match_table = ACPI_PTR(at24_acpi_ids), 928 }, 929 .probe = at24_probe, 930 .remove = at24_remove, 931 .id_table = at24_ids, 932 }; 933 934 static int __init at24_init(void) 935 { 936 if (!io_limit) { 937 pr_err("at24: io_limit must not be 0!\n"); 938 return -EINVAL; 939 } 940 941 io_limit = rounddown_pow_of_two(io_limit); 942 return i2c_add_driver(&at24_driver); 943 } 944 module_init(at24_init); 945 946 static void __exit at24_exit(void) 947 { 948 i2c_del_driver(&at24_driver); 949 } 950 module_exit(at24_exit); 951 952 MODULE_DESCRIPTION("Driver for most I2C EEPROMs"); 953 MODULE_AUTHOR("David Brownell and Wolfram Sang"); 954 MODULE_LICENSE("GPL"); 955