1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * at24.c - handle most I2C EEPROMs 4 * 5 * Copyright (C) 2005-2007 David Brownell 6 * Copyright (C) 2008 Wolfram Sang, Pengutronix 7 */ 8 9 #include <linux/kernel.h> 10 #include <linux/init.h> 11 #include <linux/module.h> 12 #include <linux/of_device.h> 13 #include <linux/slab.h> 14 #include <linux/delay.h> 15 #include <linux/mutex.h> 16 #include <linux/mod_devicetable.h> 17 #include <linux/bitops.h> 18 #include <linux/jiffies.h> 19 #include <linux/property.h> 20 #include <linux/acpi.h> 21 #include <linux/i2c.h> 22 #include <linux/nvmem-provider.h> 23 #include <linux/regmap.h> 24 #include <linux/pm_runtime.h> 25 #include <linux/gpio/consumer.h> 26 27 /* Address pointer is 16 bit. */ 28 #define AT24_FLAG_ADDR16 BIT(7) 29 /* sysfs-entry will be read-only. */ 30 #define AT24_FLAG_READONLY BIT(6) 31 /* sysfs-entry will be world-readable. */ 32 #define AT24_FLAG_IRUGO BIT(5) 33 /* Take always 8 addresses (24c00). */ 34 #define AT24_FLAG_TAKE8ADDR BIT(4) 35 /* Factory-programmed serial number. */ 36 #define AT24_FLAG_SERIAL BIT(3) 37 /* Factory-programmed mac address. */ 38 #define AT24_FLAG_MAC BIT(2) 39 /* Does not auto-rollover reads to the next slave address. */ 40 #define AT24_FLAG_NO_RDROL BIT(1) 41 42 /* 43 * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable. 44 * Differences between different vendor product lines (like Atmel AT24C or 45 * MicroChip 24LC, etc) won't much matter for typical read/write access. 46 * There are also I2C RAM chips, likewise interchangeable. One example 47 * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes). 48 * 49 * However, misconfiguration can lose data. "Set 16-bit memory address" 50 * to a part with 8-bit addressing will overwrite data. Writing with too 51 * big a page size also loses data. And it's not safe to assume that the 52 * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC 53 * uses 0x51, for just one example. 54 * 55 * Accordingly, explicit board-specific configuration data should be used 56 * in almost all cases. (One partial exception is an SMBus used to access 57 * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.) 58 * 59 * So this driver uses "new style" I2C driver binding, expecting to be 60 * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or 61 * similar kernel-resident tables; or, configuration data coming from 62 * a bootloader. 63 * 64 * Other than binding model, current differences from "eeprom" driver are 65 * that this one handles write access and isn't restricted to 24c02 devices. 66 * It also handles larger devices (32 kbit and up) with two-byte addresses, 67 * which won't work on pure SMBus systems. 68 */ 69 70 struct at24_client { 71 struct i2c_client *client; 72 struct regmap *regmap; 73 }; 74 75 struct at24_data { 76 /* 77 * Lock protects against activities from other Linux tasks, 78 * but not from changes by other I2C masters. 79 */ 80 struct mutex lock; 81 82 unsigned int write_max; 83 unsigned int num_addresses; 84 unsigned int offset_adj; 85 86 u32 byte_len; 87 u16 page_size; 88 u8 flags; 89 90 struct nvmem_device *nvmem; 91 92 struct gpio_desc *wp_gpio; 93 94 /* 95 * Some chips tie up multiple I2C addresses; dummy devices reserve 96 * them for us, and we'll use them with SMBus calls. 97 */ 98 struct at24_client client[]; 99 }; 100 101 /* 102 * This parameter is to help this driver avoid blocking other drivers out 103 * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C 104 * clock, one 256 byte read takes about 1/43 second which is excessive; 105 * but the 1/170 second it takes at 400 kHz may be quite reasonable; and 106 * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible. 107 * 108 * This value is forced to be a power of two so that writes align on pages. 109 */ 110 static unsigned int at24_io_limit = 128; 111 module_param_named(io_limit, at24_io_limit, uint, 0); 112 MODULE_PARM_DESC(at24_io_limit, "Maximum bytes per I/O (default 128)"); 113 114 /* 115 * Specs often allow 5 msec for a page write, sometimes 20 msec; 116 * it's important to recover from write timeouts. 117 */ 118 static unsigned int at24_write_timeout = 25; 119 module_param_named(write_timeout, at24_write_timeout, uint, 0); 120 MODULE_PARM_DESC(at24_write_timeout, "Time (in ms) to try writes (default 25)"); 121 122 struct at24_chip_data { 123 u32 byte_len; 124 u8 flags; 125 }; 126 127 #define AT24_CHIP_DATA(_name, _len, _flags) \ 128 static const struct at24_chip_data _name = { \ 129 .byte_len = _len, .flags = _flags, \ 130 } 131 132 /* needs 8 addresses as A0-A2 are ignored */ 133 AT24_CHIP_DATA(at24_data_24c00, 128 / 8, AT24_FLAG_TAKE8ADDR); 134 /* old variants can't be handled with this generic entry! */ 135 AT24_CHIP_DATA(at24_data_24c01, 1024 / 8, 0); 136 AT24_CHIP_DATA(at24_data_24cs01, 16, 137 AT24_FLAG_SERIAL | AT24_FLAG_READONLY); 138 AT24_CHIP_DATA(at24_data_24c02, 2048 / 8, 0); 139 AT24_CHIP_DATA(at24_data_24cs02, 16, 140 AT24_FLAG_SERIAL | AT24_FLAG_READONLY); 141 AT24_CHIP_DATA(at24_data_24mac402, 48 / 8, 142 AT24_FLAG_MAC | AT24_FLAG_READONLY); 143 AT24_CHIP_DATA(at24_data_24mac602, 64 / 8, 144 AT24_FLAG_MAC | AT24_FLAG_READONLY); 145 /* spd is a 24c02 in memory DIMMs */ 146 AT24_CHIP_DATA(at24_data_spd, 2048 / 8, 147 AT24_FLAG_READONLY | AT24_FLAG_IRUGO); 148 AT24_CHIP_DATA(at24_data_24c04, 4096 / 8, 0); 149 AT24_CHIP_DATA(at24_data_24cs04, 16, 150 AT24_FLAG_SERIAL | AT24_FLAG_READONLY); 151 /* 24rf08 quirk is handled at i2c-core */ 152 AT24_CHIP_DATA(at24_data_24c08, 8192 / 8, 0); 153 AT24_CHIP_DATA(at24_data_24cs08, 16, 154 AT24_FLAG_SERIAL | AT24_FLAG_READONLY); 155 AT24_CHIP_DATA(at24_data_24c16, 16384 / 8, 0); 156 AT24_CHIP_DATA(at24_data_24cs16, 16, 157 AT24_FLAG_SERIAL | AT24_FLAG_READONLY); 158 AT24_CHIP_DATA(at24_data_24c32, 32768 / 8, AT24_FLAG_ADDR16); 159 AT24_CHIP_DATA(at24_data_24cs32, 16, 160 AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY); 161 AT24_CHIP_DATA(at24_data_24c64, 65536 / 8, AT24_FLAG_ADDR16); 162 AT24_CHIP_DATA(at24_data_24cs64, 16, 163 AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY); 164 AT24_CHIP_DATA(at24_data_24c128, 131072 / 8, AT24_FLAG_ADDR16); 165 AT24_CHIP_DATA(at24_data_24c256, 262144 / 8, AT24_FLAG_ADDR16); 166 AT24_CHIP_DATA(at24_data_24c512, 524288 / 8, AT24_FLAG_ADDR16); 167 AT24_CHIP_DATA(at24_data_24c1024, 1048576 / 8, AT24_FLAG_ADDR16); 168 AT24_CHIP_DATA(at24_data_24c2048, 2097152 / 8, AT24_FLAG_ADDR16); 169 /* identical to 24c08 ? */ 170 AT24_CHIP_DATA(at24_data_INT3499, 8192 / 8, 0); 171 172 static const struct i2c_device_id at24_ids[] = { 173 { "24c00", (kernel_ulong_t)&at24_data_24c00 }, 174 { "24c01", (kernel_ulong_t)&at24_data_24c01 }, 175 { "24cs01", (kernel_ulong_t)&at24_data_24cs01 }, 176 { "24c02", (kernel_ulong_t)&at24_data_24c02 }, 177 { "24cs02", (kernel_ulong_t)&at24_data_24cs02 }, 178 { "24mac402", (kernel_ulong_t)&at24_data_24mac402 }, 179 { "24mac602", (kernel_ulong_t)&at24_data_24mac602 }, 180 { "spd", (kernel_ulong_t)&at24_data_spd }, 181 { "24c04", (kernel_ulong_t)&at24_data_24c04 }, 182 { "24cs04", (kernel_ulong_t)&at24_data_24cs04 }, 183 { "24c08", (kernel_ulong_t)&at24_data_24c08 }, 184 { "24cs08", (kernel_ulong_t)&at24_data_24cs08 }, 185 { "24c16", (kernel_ulong_t)&at24_data_24c16 }, 186 { "24cs16", (kernel_ulong_t)&at24_data_24cs16 }, 187 { "24c32", (kernel_ulong_t)&at24_data_24c32 }, 188 { "24cs32", (kernel_ulong_t)&at24_data_24cs32 }, 189 { "24c64", (kernel_ulong_t)&at24_data_24c64 }, 190 { "24cs64", (kernel_ulong_t)&at24_data_24cs64 }, 191 { "24c128", (kernel_ulong_t)&at24_data_24c128 }, 192 { "24c256", (kernel_ulong_t)&at24_data_24c256 }, 193 { "24c512", (kernel_ulong_t)&at24_data_24c512 }, 194 { "24c1024", (kernel_ulong_t)&at24_data_24c1024 }, 195 { "24c2048", (kernel_ulong_t)&at24_data_24c2048 }, 196 { "at24", 0 }, 197 { /* END OF LIST */ } 198 }; 199 MODULE_DEVICE_TABLE(i2c, at24_ids); 200 201 static const struct of_device_id at24_of_match[] = { 202 { .compatible = "atmel,24c00", .data = &at24_data_24c00 }, 203 { .compatible = "atmel,24c01", .data = &at24_data_24c01 }, 204 { .compatible = "atmel,24cs01", .data = &at24_data_24cs01 }, 205 { .compatible = "atmel,24c02", .data = &at24_data_24c02 }, 206 { .compatible = "atmel,24cs02", .data = &at24_data_24cs02 }, 207 { .compatible = "atmel,24mac402", .data = &at24_data_24mac402 }, 208 { .compatible = "atmel,24mac602", .data = &at24_data_24mac602 }, 209 { .compatible = "atmel,spd", .data = &at24_data_spd }, 210 { .compatible = "atmel,24c04", .data = &at24_data_24c04 }, 211 { .compatible = "atmel,24cs04", .data = &at24_data_24cs04 }, 212 { .compatible = "atmel,24c08", .data = &at24_data_24c08 }, 213 { .compatible = "atmel,24cs08", .data = &at24_data_24cs08 }, 214 { .compatible = "atmel,24c16", .data = &at24_data_24c16 }, 215 { .compatible = "atmel,24cs16", .data = &at24_data_24cs16 }, 216 { .compatible = "atmel,24c32", .data = &at24_data_24c32 }, 217 { .compatible = "atmel,24cs32", .data = &at24_data_24cs32 }, 218 { .compatible = "atmel,24c64", .data = &at24_data_24c64 }, 219 { .compatible = "atmel,24cs64", .data = &at24_data_24cs64 }, 220 { .compatible = "atmel,24c128", .data = &at24_data_24c128 }, 221 { .compatible = "atmel,24c256", .data = &at24_data_24c256 }, 222 { .compatible = "atmel,24c512", .data = &at24_data_24c512 }, 223 { .compatible = "atmel,24c1024", .data = &at24_data_24c1024 }, 224 { .compatible = "atmel,24c2048", .data = &at24_data_24c2048 }, 225 { /* END OF LIST */ }, 226 }; 227 MODULE_DEVICE_TABLE(of, at24_of_match); 228 229 static const struct acpi_device_id at24_acpi_ids[] = { 230 { "INT3499", (kernel_ulong_t)&at24_data_INT3499 }, 231 { /* END OF LIST */ } 232 }; 233 MODULE_DEVICE_TABLE(acpi, at24_acpi_ids); 234 235 /* 236 * This routine supports chips which consume multiple I2C addresses. It 237 * computes the addressing information to be used for a given r/w request. 238 * Assumes that sanity checks for offset happened at sysfs-layer. 239 * 240 * Slave address and byte offset derive from the offset. Always 241 * set the byte address; on a multi-master board, another master 242 * may have changed the chip's "current" address pointer. 243 */ 244 static struct at24_client *at24_translate_offset(struct at24_data *at24, 245 unsigned int *offset) 246 { 247 unsigned int i; 248 249 if (at24->flags & AT24_FLAG_ADDR16) { 250 i = *offset >> 16; 251 *offset &= 0xffff; 252 } else { 253 i = *offset >> 8; 254 *offset &= 0xff; 255 } 256 257 return &at24->client[i]; 258 } 259 260 static struct device *at24_base_client_dev(struct at24_data *at24) 261 { 262 return &at24->client[0].client->dev; 263 } 264 265 static size_t at24_adjust_read_count(struct at24_data *at24, 266 unsigned int offset, size_t count) 267 { 268 unsigned int bits; 269 size_t remainder; 270 271 /* 272 * In case of multi-address chips that don't rollover reads to 273 * the next slave address: truncate the count to the slave boundary, 274 * so that the read never straddles slaves. 275 */ 276 if (at24->flags & AT24_FLAG_NO_RDROL) { 277 bits = (at24->flags & AT24_FLAG_ADDR16) ? 16 : 8; 278 remainder = BIT(bits) - offset; 279 if (count > remainder) 280 count = remainder; 281 } 282 283 if (count > at24_io_limit) 284 count = at24_io_limit; 285 286 return count; 287 } 288 289 static ssize_t at24_regmap_read(struct at24_data *at24, char *buf, 290 unsigned int offset, size_t count) 291 { 292 unsigned long timeout, read_time; 293 struct at24_client *at24_client; 294 struct i2c_client *client; 295 struct regmap *regmap; 296 int ret; 297 298 at24_client = at24_translate_offset(at24, &offset); 299 regmap = at24_client->regmap; 300 client = at24_client->client; 301 count = at24_adjust_read_count(at24, offset, count); 302 303 /* adjust offset for mac and serial read ops */ 304 offset += at24->offset_adj; 305 306 timeout = jiffies + msecs_to_jiffies(at24_write_timeout); 307 do { 308 /* 309 * The timestamp shall be taken before the actual operation 310 * to avoid a premature timeout in case of high CPU load. 311 */ 312 read_time = jiffies; 313 314 ret = regmap_bulk_read(regmap, offset, buf, count); 315 dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n", 316 count, offset, ret, jiffies); 317 if (!ret) 318 return count; 319 320 usleep_range(1000, 1500); 321 } while (time_before(read_time, timeout)); 322 323 return -ETIMEDOUT; 324 } 325 326 /* 327 * Note that if the hardware write-protect pin is pulled high, the whole 328 * chip is normally write protected. But there are plenty of product 329 * variants here, including OTP fuses and partial chip protect. 330 * 331 * We only use page mode writes; the alternative is sloooow. These routines 332 * write at most one page. 333 */ 334 335 static size_t at24_adjust_write_count(struct at24_data *at24, 336 unsigned int offset, size_t count) 337 { 338 unsigned int next_page; 339 340 /* write_max is at most a page */ 341 if (count > at24->write_max) 342 count = at24->write_max; 343 344 /* Never roll over backwards, to the start of this page */ 345 next_page = roundup(offset + 1, at24->page_size); 346 if (offset + count > next_page) 347 count = next_page - offset; 348 349 return count; 350 } 351 352 static ssize_t at24_regmap_write(struct at24_data *at24, const char *buf, 353 unsigned int offset, size_t count) 354 { 355 unsigned long timeout, write_time; 356 struct at24_client *at24_client; 357 struct i2c_client *client; 358 struct regmap *regmap; 359 int ret; 360 361 at24_client = at24_translate_offset(at24, &offset); 362 regmap = at24_client->regmap; 363 client = at24_client->client; 364 count = at24_adjust_write_count(at24, offset, count); 365 timeout = jiffies + msecs_to_jiffies(at24_write_timeout); 366 367 do { 368 /* 369 * The timestamp shall be taken before the actual operation 370 * to avoid a premature timeout in case of high CPU load. 371 */ 372 write_time = jiffies; 373 374 ret = regmap_bulk_write(regmap, offset, buf, count); 375 dev_dbg(&client->dev, "write %zu@%d --> %d (%ld)\n", 376 count, offset, ret, jiffies); 377 if (!ret) 378 return count; 379 380 usleep_range(1000, 1500); 381 } while (time_before(write_time, timeout)); 382 383 return -ETIMEDOUT; 384 } 385 386 static int at24_read(void *priv, unsigned int off, void *val, size_t count) 387 { 388 struct at24_data *at24; 389 struct device *dev; 390 char *buf = val; 391 int ret; 392 393 at24 = priv; 394 dev = at24_base_client_dev(at24); 395 396 if (unlikely(!count)) 397 return count; 398 399 if (off + count > at24->byte_len) 400 return -EINVAL; 401 402 ret = pm_runtime_get_sync(dev); 403 if (ret < 0) { 404 pm_runtime_put_noidle(dev); 405 return ret; 406 } 407 408 /* 409 * Read data from chip, protecting against concurrent updates 410 * from this host, but not from other I2C masters. 411 */ 412 mutex_lock(&at24->lock); 413 414 while (count) { 415 ret = at24_regmap_read(at24, buf, off, count); 416 if (ret < 0) { 417 mutex_unlock(&at24->lock); 418 pm_runtime_put(dev); 419 return ret; 420 } 421 buf += ret; 422 off += ret; 423 count -= ret; 424 } 425 426 mutex_unlock(&at24->lock); 427 428 pm_runtime_put(dev); 429 430 return 0; 431 } 432 433 static int at24_write(void *priv, unsigned int off, void *val, size_t count) 434 { 435 struct at24_data *at24; 436 struct device *dev; 437 char *buf = val; 438 int ret; 439 440 at24 = priv; 441 dev = at24_base_client_dev(at24); 442 443 if (unlikely(!count)) 444 return -EINVAL; 445 446 if (off + count > at24->byte_len) 447 return -EINVAL; 448 449 ret = pm_runtime_get_sync(dev); 450 if (ret < 0) { 451 pm_runtime_put_noidle(dev); 452 return ret; 453 } 454 455 /* 456 * Write data to chip, protecting against concurrent updates 457 * from this host, but not from other I2C masters. 458 */ 459 mutex_lock(&at24->lock); 460 gpiod_set_value_cansleep(at24->wp_gpio, 0); 461 462 while (count) { 463 ret = at24_regmap_write(at24, buf, off, count); 464 if (ret < 0) { 465 gpiod_set_value_cansleep(at24->wp_gpio, 1); 466 mutex_unlock(&at24->lock); 467 pm_runtime_put(dev); 468 return ret; 469 } 470 buf += ret; 471 off += ret; 472 count -= ret; 473 } 474 475 gpiod_set_value_cansleep(at24->wp_gpio, 1); 476 mutex_unlock(&at24->lock); 477 478 pm_runtime_put(dev); 479 480 return 0; 481 } 482 483 static const struct at24_chip_data *at24_get_chip_data(struct device *dev) 484 { 485 struct device_node *of_node = dev->of_node; 486 const struct at24_chip_data *cdata; 487 const struct i2c_device_id *id; 488 489 id = i2c_match_id(at24_ids, to_i2c_client(dev)); 490 491 /* 492 * The I2C core allows OF nodes compatibles to match against the 493 * I2C device ID table as a fallback, so check not only if an OF 494 * node is present but also if it matches an OF device ID entry. 495 */ 496 if (of_node && of_match_device(at24_of_match, dev)) 497 cdata = of_device_get_match_data(dev); 498 else if (id) 499 cdata = (void *)id->driver_data; 500 else 501 cdata = acpi_device_get_match_data(dev); 502 503 if (!cdata) 504 return ERR_PTR(-ENODEV); 505 506 return cdata; 507 } 508 509 static int at24_make_dummy_client(struct at24_data *at24, unsigned int index, 510 struct regmap_config *regmap_config) 511 { 512 struct i2c_client *base_client, *dummy_client; 513 struct regmap *regmap; 514 struct device *dev; 515 516 base_client = at24->client[0].client; 517 dev = &base_client->dev; 518 519 dummy_client = devm_i2c_new_dummy_device(dev, base_client->adapter, 520 base_client->addr + index); 521 if (IS_ERR(dummy_client)) 522 return PTR_ERR(dummy_client); 523 524 regmap = devm_regmap_init_i2c(dummy_client, regmap_config); 525 if (IS_ERR(regmap)) 526 return PTR_ERR(regmap); 527 528 at24->client[index].client = dummy_client; 529 at24->client[index].regmap = regmap; 530 531 return 0; 532 } 533 534 static unsigned int at24_get_offset_adj(u8 flags, unsigned int byte_len) 535 { 536 if (flags & AT24_FLAG_MAC) { 537 /* EUI-48 starts from 0x9a, EUI-64 from 0x98 */ 538 return 0xa0 - byte_len; 539 } else if (flags & AT24_FLAG_SERIAL && flags & AT24_FLAG_ADDR16) { 540 /* 541 * For 16 bit address pointers, the word address must contain 542 * a '10' sequence in bits 11 and 10 regardless of the 543 * intended position of the address pointer. 544 */ 545 return 0x0800; 546 } else if (flags & AT24_FLAG_SERIAL) { 547 /* 548 * Otherwise the word address must begin with a '10' sequence, 549 * regardless of the intended address. 550 */ 551 return 0x0080; 552 } else { 553 return 0; 554 } 555 } 556 557 static int at24_probe(struct i2c_client *client) 558 { 559 struct regmap_config regmap_config = { }; 560 struct nvmem_config nvmem_config = { }; 561 u32 byte_len, page_size, flags, addrw; 562 const struct at24_chip_data *cdata; 563 struct device *dev = &client->dev; 564 bool i2c_fn_i2c, i2c_fn_block; 565 unsigned int i, num_addresses; 566 struct at24_data *at24; 567 struct regmap *regmap; 568 bool writable; 569 u8 test_byte; 570 int err; 571 572 i2c_fn_i2c = i2c_check_functionality(client->adapter, I2C_FUNC_I2C); 573 i2c_fn_block = i2c_check_functionality(client->adapter, 574 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK); 575 576 cdata = at24_get_chip_data(dev); 577 if (IS_ERR(cdata)) 578 return PTR_ERR(cdata); 579 580 err = device_property_read_u32(dev, "pagesize", &page_size); 581 if (err) 582 /* 583 * This is slow, but we can't know all eeproms, so we better 584 * play safe. Specifying custom eeprom-types via device tree 585 * or properties is recommended anyhow. 586 */ 587 page_size = 1; 588 589 flags = cdata->flags; 590 if (device_property_present(dev, "read-only")) 591 flags |= AT24_FLAG_READONLY; 592 if (device_property_present(dev, "no-read-rollover")) 593 flags |= AT24_FLAG_NO_RDROL; 594 595 err = device_property_read_u32(dev, "address-width", &addrw); 596 if (!err) { 597 switch (addrw) { 598 case 8: 599 if (flags & AT24_FLAG_ADDR16) 600 dev_warn(dev, 601 "Override address width to be 8, while default is 16\n"); 602 flags &= ~AT24_FLAG_ADDR16; 603 break; 604 case 16: 605 flags |= AT24_FLAG_ADDR16; 606 break; 607 default: 608 dev_warn(dev, "Bad \"address-width\" property: %u\n", 609 addrw); 610 } 611 } 612 613 err = device_property_read_u32(dev, "size", &byte_len); 614 if (err) 615 byte_len = cdata->byte_len; 616 617 if (!i2c_fn_i2c && !i2c_fn_block) 618 page_size = 1; 619 620 if (!page_size) { 621 dev_err(dev, "page_size must not be 0!\n"); 622 return -EINVAL; 623 } 624 625 if (!is_power_of_2(page_size)) 626 dev_warn(dev, "page_size looks suspicious (no power of 2)!\n"); 627 628 err = device_property_read_u32(dev, "num-addresses", &num_addresses); 629 if (err) { 630 if (flags & AT24_FLAG_TAKE8ADDR) 631 num_addresses = 8; 632 else 633 num_addresses = DIV_ROUND_UP(byte_len, 634 (flags & AT24_FLAG_ADDR16) ? 65536 : 256); 635 } 636 637 if ((flags & AT24_FLAG_SERIAL) && (flags & AT24_FLAG_MAC)) { 638 dev_err(dev, 639 "invalid device data - cannot have both AT24_FLAG_SERIAL & AT24_FLAG_MAC."); 640 return -EINVAL; 641 } 642 643 regmap_config.val_bits = 8; 644 regmap_config.reg_bits = (flags & AT24_FLAG_ADDR16) ? 16 : 8; 645 regmap_config.disable_locking = true; 646 647 regmap = devm_regmap_init_i2c(client, ®map_config); 648 if (IS_ERR(regmap)) 649 return PTR_ERR(regmap); 650 651 at24 = devm_kzalloc(dev, struct_size(at24, client, num_addresses), 652 GFP_KERNEL); 653 if (!at24) 654 return -ENOMEM; 655 656 mutex_init(&at24->lock); 657 at24->byte_len = byte_len; 658 at24->page_size = page_size; 659 at24->flags = flags; 660 at24->num_addresses = num_addresses; 661 at24->offset_adj = at24_get_offset_adj(flags, byte_len); 662 at24->client[0].client = client; 663 at24->client[0].regmap = regmap; 664 665 at24->wp_gpio = devm_gpiod_get_optional(dev, "wp", GPIOD_OUT_HIGH); 666 if (IS_ERR(at24->wp_gpio)) 667 return PTR_ERR(at24->wp_gpio); 668 669 writable = !(flags & AT24_FLAG_READONLY); 670 if (writable) { 671 at24->write_max = min_t(unsigned int, 672 page_size, at24_io_limit); 673 if (!i2c_fn_i2c && at24->write_max > I2C_SMBUS_BLOCK_MAX) 674 at24->write_max = I2C_SMBUS_BLOCK_MAX; 675 } 676 677 /* use dummy devices for multiple-address chips */ 678 for (i = 1; i < num_addresses; i++) { 679 err = at24_make_dummy_client(at24, i, ®map_config); 680 if (err) 681 return err; 682 } 683 684 nvmem_config.name = dev_name(dev); 685 nvmem_config.dev = dev; 686 nvmem_config.read_only = !writable; 687 nvmem_config.root_only = !(flags & AT24_FLAG_IRUGO); 688 nvmem_config.owner = THIS_MODULE; 689 nvmem_config.compat = true; 690 nvmem_config.base_dev = dev; 691 nvmem_config.reg_read = at24_read; 692 nvmem_config.reg_write = at24_write; 693 nvmem_config.priv = at24; 694 nvmem_config.stride = 1; 695 nvmem_config.word_size = 1; 696 nvmem_config.size = byte_len; 697 698 at24->nvmem = devm_nvmem_register(dev, &nvmem_config); 699 if (IS_ERR(at24->nvmem)) 700 return PTR_ERR(at24->nvmem); 701 702 i2c_set_clientdata(client, at24); 703 704 /* enable runtime pm */ 705 pm_runtime_set_active(dev); 706 pm_runtime_enable(dev); 707 708 /* 709 * Perform a one-byte test read to verify that the 710 * chip is functional. 711 */ 712 err = at24_read(at24, 0, &test_byte, 1); 713 pm_runtime_idle(dev); 714 if (err) { 715 pm_runtime_disable(dev); 716 return -ENODEV; 717 } 718 719 if (writable) 720 dev_info(dev, "%u byte %s EEPROM, writable, %u bytes/write\n", 721 byte_len, client->name, at24->write_max); 722 else 723 dev_info(dev, "%u byte %s EEPROM, read-only\n", 724 byte_len, client->name); 725 726 return 0; 727 } 728 729 static int at24_remove(struct i2c_client *client) 730 { 731 pm_runtime_disable(&client->dev); 732 pm_runtime_set_suspended(&client->dev); 733 734 return 0; 735 } 736 737 static struct i2c_driver at24_driver = { 738 .driver = { 739 .name = "at24", 740 .of_match_table = at24_of_match, 741 .acpi_match_table = ACPI_PTR(at24_acpi_ids), 742 }, 743 .probe_new = at24_probe, 744 .remove = at24_remove, 745 .id_table = at24_ids, 746 }; 747 748 static int __init at24_init(void) 749 { 750 if (!at24_io_limit) { 751 pr_err("at24: at24_io_limit must not be 0!\n"); 752 return -EINVAL; 753 } 754 755 at24_io_limit = rounddown_pow_of_two(at24_io_limit); 756 return i2c_add_driver(&at24_driver); 757 } 758 module_init(at24_init); 759 760 static void __exit at24_exit(void) 761 { 762 i2c_del_driver(&at24_driver); 763 } 764 module_exit(at24_exit); 765 766 MODULE_DESCRIPTION("Driver for most I2C EEPROMs"); 767 MODULE_AUTHOR("David Brownell and Wolfram Sang"); 768 MODULE_LICENSE("GPL"); 769