1 // SPDX-License-Identifier: GPL-2.0+ 2 /* 3 * at24.c - handle most I2C EEPROMs 4 * 5 * Copyright (C) 2005-2007 David Brownell 6 * Copyright (C) 2008 Wolfram Sang, Pengutronix 7 */ 8 9 #include <linux/kernel.h> 10 #include <linux/init.h> 11 #include <linux/module.h> 12 #include <linux/of_device.h> 13 #include <linux/slab.h> 14 #include <linux/delay.h> 15 #include <linux/mutex.h> 16 #include <linux/mod_devicetable.h> 17 #include <linux/log2.h> 18 #include <linux/bitops.h> 19 #include <linux/jiffies.h> 20 #include <linux/property.h> 21 #include <linux/acpi.h> 22 #include <linux/i2c.h> 23 #include <linux/nvmem-provider.h> 24 #include <linux/regmap.h> 25 #include <linux/pm_runtime.h> 26 #include <linux/gpio/consumer.h> 27 28 /* Address pointer is 16 bit. */ 29 #define AT24_FLAG_ADDR16 BIT(7) 30 /* sysfs-entry will be read-only. */ 31 #define AT24_FLAG_READONLY BIT(6) 32 /* sysfs-entry will be world-readable. */ 33 #define AT24_FLAG_IRUGO BIT(5) 34 /* Take always 8 addresses (24c00). */ 35 #define AT24_FLAG_TAKE8ADDR BIT(4) 36 /* Factory-programmed serial number. */ 37 #define AT24_FLAG_SERIAL BIT(3) 38 /* Factory-programmed mac address. */ 39 #define AT24_FLAG_MAC BIT(2) 40 /* Does not auto-rollover reads to the next slave address. */ 41 #define AT24_FLAG_NO_RDROL BIT(1) 42 43 /* 44 * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable. 45 * Differences between different vendor product lines (like Atmel AT24C or 46 * MicroChip 24LC, etc) won't much matter for typical read/write access. 47 * There are also I2C RAM chips, likewise interchangeable. One example 48 * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes). 49 * 50 * However, misconfiguration can lose data. "Set 16-bit memory address" 51 * to a part with 8-bit addressing will overwrite data. Writing with too 52 * big a page size also loses data. And it's not safe to assume that the 53 * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC 54 * uses 0x51, for just one example. 55 * 56 * Accordingly, explicit board-specific configuration data should be used 57 * in almost all cases. (One partial exception is an SMBus used to access 58 * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.) 59 * 60 * So this driver uses "new style" I2C driver binding, expecting to be 61 * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or 62 * similar kernel-resident tables; or, configuration data coming from 63 * a bootloader. 64 * 65 * Other than binding model, current differences from "eeprom" driver are 66 * that this one handles write access and isn't restricted to 24c02 devices. 67 * It also handles larger devices (32 kbit and up) with two-byte addresses, 68 * which won't work on pure SMBus systems. 69 */ 70 71 struct at24_client { 72 struct i2c_client *client; 73 struct regmap *regmap; 74 }; 75 76 struct at24_data { 77 /* 78 * Lock protects against activities from other Linux tasks, 79 * but not from changes by other I2C masters. 80 */ 81 struct mutex lock; 82 83 unsigned int write_max; 84 unsigned int num_addresses; 85 unsigned int offset_adj; 86 87 u32 byte_len; 88 u16 page_size; 89 u8 flags; 90 91 struct nvmem_device *nvmem; 92 93 struct gpio_desc *wp_gpio; 94 95 /* 96 * Some chips tie up multiple I2C addresses; dummy devices reserve 97 * them for us, and we'll use them with SMBus calls. 98 */ 99 struct at24_client client[]; 100 }; 101 102 /* 103 * This parameter is to help this driver avoid blocking other drivers out 104 * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C 105 * clock, one 256 byte read takes about 1/43 second which is excessive; 106 * but the 1/170 second it takes at 400 kHz may be quite reasonable; and 107 * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible. 108 * 109 * This value is forced to be a power of two so that writes align on pages. 110 */ 111 static unsigned int at24_io_limit = 128; 112 module_param_named(io_limit, at24_io_limit, uint, 0); 113 MODULE_PARM_DESC(at24_io_limit, "Maximum bytes per I/O (default 128)"); 114 115 /* 116 * Specs often allow 5 msec for a page write, sometimes 20 msec; 117 * it's important to recover from write timeouts. 118 */ 119 static unsigned int at24_write_timeout = 25; 120 module_param_named(write_timeout, at24_write_timeout, uint, 0); 121 MODULE_PARM_DESC(at24_write_timeout, "Time (in ms) to try writes (default 25)"); 122 123 struct at24_chip_data { 124 u32 byte_len; 125 u8 flags; 126 }; 127 128 #define AT24_CHIP_DATA(_name, _len, _flags) \ 129 static const struct at24_chip_data _name = { \ 130 .byte_len = _len, .flags = _flags, \ 131 } 132 133 /* needs 8 addresses as A0-A2 are ignored */ 134 AT24_CHIP_DATA(at24_data_24c00, 128 / 8, AT24_FLAG_TAKE8ADDR); 135 /* old variants can't be handled with this generic entry! */ 136 AT24_CHIP_DATA(at24_data_24c01, 1024 / 8, 0); 137 AT24_CHIP_DATA(at24_data_24cs01, 16, 138 AT24_FLAG_SERIAL | AT24_FLAG_READONLY); 139 AT24_CHIP_DATA(at24_data_24c02, 2048 / 8, 0); 140 AT24_CHIP_DATA(at24_data_24cs02, 16, 141 AT24_FLAG_SERIAL | AT24_FLAG_READONLY); 142 AT24_CHIP_DATA(at24_data_24mac402, 48 / 8, 143 AT24_FLAG_MAC | AT24_FLAG_READONLY); 144 AT24_CHIP_DATA(at24_data_24mac602, 64 / 8, 145 AT24_FLAG_MAC | AT24_FLAG_READONLY); 146 /* spd is a 24c02 in memory DIMMs */ 147 AT24_CHIP_DATA(at24_data_spd, 2048 / 8, 148 AT24_FLAG_READONLY | AT24_FLAG_IRUGO); 149 AT24_CHIP_DATA(at24_data_24c04, 4096 / 8, 0); 150 AT24_CHIP_DATA(at24_data_24cs04, 16, 151 AT24_FLAG_SERIAL | AT24_FLAG_READONLY); 152 /* 24rf08 quirk is handled at i2c-core */ 153 AT24_CHIP_DATA(at24_data_24c08, 8192 / 8, 0); 154 AT24_CHIP_DATA(at24_data_24cs08, 16, 155 AT24_FLAG_SERIAL | AT24_FLAG_READONLY); 156 AT24_CHIP_DATA(at24_data_24c16, 16384 / 8, 0); 157 AT24_CHIP_DATA(at24_data_24cs16, 16, 158 AT24_FLAG_SERIAL | AT24_FLAG_READONLY); 159 AT24_CHIP_DATA(at24_data_24c32, 32768 / 8, AT24_FLAG_ADDR16); 160 AT24_CHIP_DATA(at24_data_24cs32, 16, 161 AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY); 162 AT24_CHIP_DATA(at24_data_24c64, 65536 / 8, AT24_FLAG_ADDR16); 163 AT24_CHIP_DATA(at24_data_24cs64, 16, 164 AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY); 165 AT24_CHIP_DATA(at24_data_24c128, 131072 / 8, AT24_FLAG_ADDR16); 166 AT24_CHIP_DATA(at24_data_24c256, 262144 / 8, AT24_FLAG_ADDR16); 167 AT24_CHIP_DATA(at24_data_24c512, 524288 / 8, AT24_FLAG_ADDR16); 168 AT24_CHIP_DATA(at24_data_24c1024, 1048576 / 8, AT24_FLAG_ADDR16); 169 AT24_CHIP_DATA(at24_data_24c2048, 2097152 / 8, AT24_FLAG_ADDR16); 170 /* identical to 24c08 ? */ 171 AT24_CHIP_DATA(at24_data_INT3499, 8192 / 8, 0); 172 173 static const struct i2c_device_id at24_ids[] = { 174 { "24c00", (kernel_ulong_t)&at24_data_24c00 }, 175 { "24c01", (kernel_ulong_t)&at24_data_24c01 }, 176 { "24cs01", (kernel_ulong_t)&at24_data_24cs01 }, 177 { "24c02", (kernel_ulong_t)&at24_data_24c02 }, 178 { "24cs02", (kernel_ulong_t)&at24_data_24cs02 }, 179 { "24mac402", (kernel_ulong_t)&at24_data_24mac402 }, 180 { "24mac602", (kernel_ulong_t)&at24_data_24mac602 }, 181 { "spd", (kernel_ulong_t)&at24_data_spd }, 182 { "24c04", (kernel_ulong_t)&at24_data_24c04 }, 183 { "24cs04", (kernel_ulong_t)&at24_data_24cs04 }, 184 { "24c08", (kernel_ulong_t)&at24_data_24c08 }, 185 { "24cs08", (kernel_ulong_t)&at24_data_24cs08 }, 186 { "24c16", (kernel_ulong_t)&at24_data_24c16 }, 187 { "24cs16", (kernel_ulong_t)&at24_data_24cs16 }, 188 { "24c32", (kernel_ulong_t)&at24_data_24c32 }, 189 { "24cs32", (kernel_ulong_t)&at24_data_24cs32 }, 190 { "24c64", (kernel_ulong_t)&at24_data_24c64 }, 191 { "24cs64", (kernel_ulong_t)&at24_data_24cs64 }, 192 { "24c128", (kernel_ulong_t)&at24_data_24c128 }, 193 { "24c256", (kernel_ulong_t)&at24_data_24c256 }, 194 { "24c512", (kernel_ulong_t)&at24_data_24c512 }, 195 { "24c1024", (kernel_ulong_t)&at24_data_24c1024 }, 196 { "24c2048", (kernel_ulong_t)&at24_data_24c2048 }, 197 { "at24", 0 }, 198 { /* END OF LIST */ } 199 }; 200 MODULE_DEVICE_TABLE(i2c, at24_ids); 201 202 static const struct of_device_id at24_of_match[] = { 203 { .compatible = "atmel,24c00", .data = &at24_data_24c00 }, 204 { .compatible = "atmel,24c01", .data = &at24_data_24c01 }, 205 { .compatible = "atmel,24cs01", .data = &at24_data_24cs01 }, 206 { .compatible = "atmel,24c02", .data = &at24_data_24c02 }, 207 { .compatible = "atmel,24cs02", .data = &at24_data_24cs02 }, 208 { .compatible = "atmel,24mac402", .data = &at24_data_24mac402 }, 209 { .compatible = "atmel,24mac602", .data = &at24_data_24mac602 }, 210 { .compatible = "atmel,spd", .data = &at24_data_spd }, 211 { .compatible = "atmel,24c04", .data = &at24_data_24c04 }, 212 { .compatible = "atmel,24cs04", .data = &at24_data_24cs04 }, 213 { .compatible = "atmel,24c08", .data = &at24_data_24c08 }, 214 { .compatible = "atmel,24cs08", .data = &at24_data_24cs08 }, 215 { .compatible = "atmel,24c16", .data = &at24_data_24c16 }, 216 { .compatible = "atmel,24cs16", .data = &at24_data_24cs16 }, 217 { .compatible = "atmel,24c32", .data = &at24_data_24c32 }, 218 { .compatible = "atmel,24cs32", .data = &at24_data_24cs32 }, 219 { .compatible = "atmel,24c64", .data = &at24_data_24c64 }, 220 { .compatible = "atmel,24cs64", .data = &at24_data_24cs64 }, 221 { .compatible = "atmel,24c128", .data = &at24_data_24c128 }, 222 { .compatible = "atmel,24c256", .data = &at24_data_24c256 }, 223 { .compatible = "atmel,24c512", .data = &at24_data_24c512 }, 224 { .compatible = "atmel,24c1024", .data = &at24_data_24c1024 }, 225 { .compatible = "atmel,24c2048", .data = &at24_data_24c2048 }, 226 { /* END OF LIST */ }, 227 }; 228 MODULE_DEVICE_TABLE(of, at24_of_match); 229 230 static const struct acpi_device_id at24_acpi_ids[] = { 231 { "INT3499", (kernel_ulong_t)&at24_data_INT3499 }, 232 { /* END OF LIST */ } 233 }; 234 MODULE_DEVICE_TABLE(acpi, at24_acpi_ids); 235 236 /* 237 * This routine supports chips which consume multiple I2C addresses. It 238 * computes the addressing information to be used for a given r/w request. 239 * Assumes that sanity checks for offset happened at sysfs-layer. 240 * 241 * Slave address and byte offset derive from the offset. Always 242 * set the byte address; on a multi-master board, another master 243 * may have changed the chip's "current" address pointer. 244 */ 245 static struct at24_client *at24_translate_offset(struct at24_data *at24, 246 unsigned int *offset) 247 { 248 unsigned int i; 249 250 if (at24->flags & AT24_FLAG_ADDR16) { 251 i = *offset >> 16; 252 *offset &= 0xffff; 253 } else { 254 i = *offset >> 8; 255 *offset &= 0xff; 256 } 257 258 return &at24->client[i]; 259 } 260 261 static struct device *at24_base_client_dev(struct at24_data *at24) 262 { 263 return &at24->client[0].client->dev; 264 } 265 266 static size_t at24_adjust_read_count(struct at24_data *at24, 267 unsigned int offset, size_t count) 268 { 269 unsigned int bits; 270 size_t remainder; 271 272 /* 273 * In case of multi-address chips that don't rollover reads to 274 * the next slave address: truncate the count to the slave boundary, 275 * so that the read never straddles slaves. 276 */ 277 if (at24->flags & AT24_FLAG_NO_RDROL) { 278 bits = (at24->flags & AT24_FLAG_ADDR16) ? 16 : 8; 279 remainder = BIT(bits) - offset; 280 if (count > remainder) 281 count = remainder; 282 } 283 284 if (count > at24_io_limit) 285 count = at24_io_limit; 286 287 return count; 288 } 289 290 static ssize_t at24_regmap_read(struct at24_data *at24, char *buf, 291 unsigned int offset, size_t count) 292 { 293 unsigned long timeout, read_time; 294 struct at24_client *at24_client; 295 struct i2c_client *client; 296 struct regmap *regmap; 297 int ret; 298 299 at24_client = at24_translate_offset(at24, &offset); 300 regmap = at24_client->regmap; 301 client = at24_client->client; 302 count = at24_adjust_read_count(at24, offset, count); 303 304 /* adjust offset for mac and serial read ops */ 305 offset += at24->offset_adj; 306 307 timeout = jiffies + msecs_to_jiffies(at24_write_timeout); 308 do { 309 /* 310 * The timestamp shall be taken before the actual operation 311 * to avoid a premature timeout in case of high CPU load. 312 */ 313 read_time = jiffies; 314 315 ret = regmap_bulk_read(regmap, offset, buf, count); 316 dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n", 317 count, offset, ret, jiffies); 318 if (!ret) 319 return count; 320 321 usleep_range(1000, 1500); 322 } while (time_before(read_time, timeout)); 323 324 return -ETIMEDOUT; 325 } 326 327 /* 328 * Note that if the hardware write-protect pin is pulled high, the whole 329 * chip is normally write protected. But there are plenty of product 330 * variants here, including OTP fuses and partial chip protect. 331 * 332 * We only use page mode writes; the alternative is sloooow. These routines 333 * write at most one page. 334 */ 335 336 static size_t at24_adjust_write_count(struct at24_data *at24, 337 unsigned int offset, size_t count) 338 { 339 unsigned int next_page; 340 341 /* write_max is at most a page */ 342 if (count > at24->write_max) 343 count = at24->write_max; 344 345 /* Never roll over backwards, to the start of this page */ 346 next_page = roundup(offset + 1, at24->page_size); 347 if (offset + count > next_page) 348 count = next_page - offset; 349 350 return count; 351 } 352 353 static ssize_t at24_regmap_write(struct at24_data *at24, const char *buf, 354 unsigned int offset, size_t count) 355 { 356 unsigned long timeout, write_time; 357 struct at24_client *at24_client; 358 struct i2c_client *client; 359 struct regmap *regmap; 360 int ret; 361 362 at24_client = at24_translate_offset(at24, &offset); 363 regmap = at24_client->regmap; 364 client = at24_client->client; 365 count = at24_adjust_write_count(at24, offset, count); 366 timeout = jiffies + msecs_to_jiffies(at24_write_timeout); 367 368 do { 369 /* 370 * The timestamp shall be taken before the actual operation 371 * to avoid a premature timeout in case of high CPU load. 372 */ 373 write_time = jiffies; 374 375 ret = regmap_bulk_write(regmap, offset, buf, count); 376 dev_dbg(&client->dev, "write %zu@%d --> %d (%ld)\n", 377 count, offset, ret, jiffies); 378 if (!ret) 379 return count; 380 381 usleep_range(1000, 1500); 382 } while (time_before(write_time, timeout)); 383 384 return -ETIMEDOUT; 385 } 386 387 static int at24_read(void *priv, unsigned int off, void *val, size_t count) 388 { 389 struct at24_data *at24; 390 struct device *dev; 391 char *buf = val; 392 int ret; 393 394 at24 = priv; 395 dev = at24_base_client_dev(at24); 396 397 if (unlikely(!count)) 398 return count; 399 400 if (off + count > at24->byte_len) 401 return -EINVAL; 402 403 ret = pm_runtime_get_sync(dev); 404 if (ret < 0) { 405 pm_runtime_put_noidle(dev); 406 return ret; 407 } 408 409 /* 410 * Read data from chip, protecting against concurrent updates 411 * from this host, but not from other I2C masters. 412 */ 413 mutex_lock(&at24->lock); 414 415 while (count) { 416 ret = at24_regmap_read(at24, buf, off, count); 417 if (ret < 0) { 418 mutex_unlock(&at24->lock); 419 pm_runtime_put(dev); 420 return ret; 421 } 422 buf += ret; 423 off += ret; 424 count -= ret; 425 } 426 427 mutex_unlock(&at24->lock); 428 429 pm_runtime_put(dev); 430 431 return 0; 432 } 433 434 static int at24_write(void *priv, unsigned int off, void *val, size_t count) 435 { 436 struct at24_data *at24; 437 struct device *dev; 438 char *buf = val; 439 int ret; 440 441 at24 = priv; 442 dev = at24_base_client_dev(at24); 443 444 if (unlikely(!count)) 445 return -EINVAL; 446 447 if (off + count > at24->byte_len) 448 return -EINVAL; 449 450 ret = pm_runtime_get_sync(dev); 451 if (ret < 0) { 452 pm_runtime_put_noidle(dev); 453 return ret; 454 } 455 456 /* 457 * Write data to chip, protecting against concurrent updates 458 * from this host, but not from other I2C masters. 459 */ 460 mutex_lock(&at24->lock); 461 gpiod_set_value_cansleep(at24->wp_gpio, 0); 462 463 while (count) { 464 ret = at24_regmap_write(at24, buf, off, count); 465 if (ret < 0) { 466 gpiod_set_value_cansleep(at24->wp_gpio, 1); 467 mutex_unlock(&at24->lock); 468 pm_runtime_put(dev); 469 return ret; 470 } 471 buf += ret; 472 off += ret; 473 count -= ret; 474 } 475 476 gpiod_set_value_cansleep(at24->wp_gpio, 1); 477 mutex_unlock(&at24->lock); 478 479 pm_runtime_put(dev); 480 481 return 0; 482 } 483 484 static const struct at24_chip_data *at24_get_chip_data(struct device *dev) 485 { 486 struct device_node *of_node = dev->of_node; 487 const struct at24_chip_data *cdata; 488 const struct i2c_device_id *id; 489 490 id = i2c_match_id(at24_ids, to_i2c_client(dev)); 491 492 /* 493 * The I2C core allows OF nodes compatibles to match against the 494 * I2C device ID table as a fallback, so check not only if an OF 495 * node is present but also if it matches an OF device ID entry. 496 */ 497 if (of_node && of_match_device(at24_of_match, dev)) 498 cdata = of_device_get_match_data(dev); 499 else if (id) 500 cdata = (void *)id->driver_data; 501 else 502 cdata = acpi_device_get_match_data(dev); 503 504 if (!cdata) 505 return ERR_PTR(-ENODEV); 506 507 return cdata; 508 } 509 510 static int at24_make_dummy_client(struct at24_data *at24, unsigned int index, 511 struct regmap_config *regmap_config) 512 { 513 struct i2c_client *base_client, *dummy_client; 514 struct regmap *regmap; 515 struct device *dev; 516 517 base_client = at24->client[0].client; 518 dev = &base_client->dev; 519 520 dummy_client = devm_i2c_new_dummy_device(dev, base_client->adapter, 521 base_client->addr + index); 522 if (IS_ERR(dummy_client)) 523 return PTR_ERR(dummy_client); 524 525 regmap = devm_regmap_init_i2c(dummy_client, regmap_config); 526 if (IS_ERR(regmap)) 527 return PTR_ERR(regmap); 528 529 at24->client[index].client = dummy_client; 530 at24->client[index].regmap = regmap; 531 532 return 0; 533 } 534 535 static unsigned int at24_get_offset_adj(u8 flags, unsigned int byte_len) 536 { 537 if (flags & AT24_FLAG_MAC) { 538 /* EUI-48 starts from 0x9a, EUI-64 from 0x98 */ 539 return 0xa0 - byte_len; 540 } else if (flags & AT24_FLAG_SERIAL && flags & AT24_FLAG_ADDR16) { 541 /* 542 * For 16 bit address pointers, the word address must contain 543 * a '10' sequence in bits 11 and 10 regardless of the 544 * intended position of the address pointer. 545 */ 546 return 0x0800; 547 } else if (flags & AT24_FLAG_SERIAL) { 548 /* 549 * Otherwise the word address must begin with a '10' sequence, 550 * regardless of the intended address. 551 */ 552 return 0x0080; 553 } else { 554 return 0; 555 } 556 } 557 558 static int at24_probe(struct i2c_client *client) 559 { 560 struct regmap_config regmap_config = { }; 561 struct nvmem_config nvmem_config = { }; 562 u32 byte_len, page_size, flags, addrw; 563 const struct at24_chip_data *cdata; 564 struct device *dev = &client->dev; 565 bool i2c_fn_i2c, i2c_fn_block; 566 unsigned int i, num_addresses; 567 struct at24_data *at24; 568 struct regmap *regmap; 569 bool writable; 570 u8 test_byte; 571 int err; 572 573 i2c_fn_i2c = i2c_check_functionality(client->adapter, I2C_FUNC_I2C); 574 i2c_fn_block = i2c_check_functionality(client->adapter, 575 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK); 576 577 cdata = at24_get_chip_data(dev); 578 if (IS_ERR(cdata)) 579 return PTR_ERR(cdata); 580 581 err = device_property_read_u32(dev, "pagesize", &page_size); 582 if (err) 583 /* 584 * This is slow, but we can't know all eeproms, so we better 585 * play safe. Specifying custom eeprom-types via device tree 586 * or properties is recommended anyhow. 587 */ 588 page_size = 1; 589 590 flags = cdata->flags; 591 if (device_property_present(dev, "read-only")) 592 flags |= AT24_FLAG_READONLY; 593 if (device_property_present(dev, "no-read-rollover")) 594 flags |= AT24_FLAG_NO_RDROL; 595 596 err = device_property_read_u32(dev, "address-width", &addrw); 597 if (!err) { 598 switch (addrw) { 599 case 8: 600 if (flags & AT24_FLAG_ADDR16) 601 dev_warn(dev, 602 "Override address width to be 8, while default is 16\n"); 603 flags &= ~AT24_FLAG_ADDR16; 604 break; 605 case 16: 606 flags |= AT24_FLAG_ADDR16; 607 break; 608 default: 609 dev_warn(dev, "Bad \"address-width\" property: %u\n", 610 addrw); 611 } 612 } 613 614 err = device_property_read_u32(dev, "size", &byte_len); 615 if (err) 616 byte_len = cdata->byte_len; 617 618 if (!i2c_fn_i2c && !i2c_fn_block) 619 page_size = 1; 620 621 if (!page_size) { 622 dev_err(dev, "page_size must not be 0!\n"); 623 return -EINVAL; 624 } 625 626 if (!is_power_of_2(page_size)) 627 dev_warn(dev, "page_size looks suspicious (no power of 2)!\n"); 628 629 err = device_property_read_u32(dev, "num-addresses", &num_addresses); 630 if (err) { 631 if (flags & AT24_FLAG_TAKE8ADDR) 632 num_addresses = 8; 633 else 634 num_addresses = DIV_ROUND_UP(byte_len, 635 (flags & AT24_FLAG_ADDR16) ? 65536 : 256); 636 } 637 638 if ((flags & AT24_FLAG_SERIAL) && (flags & AT24_FLAG_MAC)) { 639 dev_err(dev, 640 "invalid device data - cannot have both AT24_FLAG_SERIAL & AT24_FLAG_MAC."); 641 return -EINVAL; 642 } 643 644 regmap_config.val_bits = 8; 645 regmap_config.reg_bits = (flags & AT24_FLAG_ADDR16) ? 16 : 8; 646 regmap_config.disable_locking = true; 647 648 regmap = devm_regmap_init_i2c(client, ®map_config); 649 if (IS_ERR(regmap)) 650 return PTR_ERR(regmap); 651 652 at24 = devm_kzalloc(dev, struct_size(at24, client, num_addresses), 653 GFP_KERNEL); 654 if (!at24) 655 return -ENOMEM; 656 657 mutex_init(&at24->lock); 658 at24->byte_len = byte_len; 659 at24->page_size = page_size; 660 at24->flags = flags; 661 at24->num_addresses = num_addresses; 662 at24->offset_adj = at24_get_offset_adj(flags, byte_len); 663 at24->client[0].client = client; 664 at24->client[0].regmap = regmap; 665 666 at24->wp_gpio = devm_gpiod_get_optional(dev, "wp", GPIOD_OUT_HIGH); 667 if (IS_ERR(at24->wp_gpio)) 668 return PTR_ERR(at24->wp_gpio); 669 670 writable = !(flags & AT24_FLAG_READONLY); 671 if (writable) { 672 at24->write_max = min_t(unsigned int, 673 page_size, at24_io_limit); 674 if (!i2c_fn_i2c && at24->write_max > I2C_SMBUS_BLOCK_MAX) 675 at24->write_max = I2C_SMBUS_BLOCK_MAX; 676 } 677 678 /* use dummy devices for multiple-address chips */ 679 for (i = 1; i < num_addresses; i++) { 680 err = at24_make_dummy_client(at24, i, ®map_config); 681 if (err) 682 return err; 683 } 684 685 nvmem_config.name = dev_name(dev); 686 nvmem_config.dev = dev; 687 nvmem_config.read_only = !writable; 688 nvmem_config.root_only = true; 689 nvmem_config.owner = THIS_MODULE; 690 nvmem_config.compat = true; 691 nvmem_config.base_dev = dev; 692 nvmem_config.reg_read = at24_read; 693 nvmem_config.reg_write = at24_write; 694 nvmem_config.priv = at24; 695 nvmem_config.stride = 1; 696 nvmem_config.word_size = 1; 697 nvmem_config.size = byte_len; 698 699 at24->nvmem = devm_nvmem_register(dev, &nvmem_config); 700 if (IS_ERR(at24->nvmem)) 701 return PTR_ERR(at24->nvmem); 702 703 i2c_set_clientdata(client, at24); 704 705 /* enable runtime pm */ 706 pm_runtime_set_active(dev); 707 pm_runtime_enable(dev); 708 709 /* 710 * Perform a one-byte test read to verify that the 711 * chip is functional. 712 */ 713 err = at24_read(at24, 0, &test_byte, 1); 714 pm_runtime_idle(dev); 715 if (err) { 716 pm_runtime_disable(dev); 717 return -ENODEV; 718 } 719 720 dev_info(dev, "%u byte %s EEPROM, %s, %u bytes/write\n", 721 byte_len, client->name, 722 writable ? "writable" : "read-only", at24->write_max); 723 724 return 0; 725 } 726 727 static int at24_remove(struct i2c_client *client) 728 { 729 pm_runtime_disable(&client->dev); 730 pm_runtime_set_suspended(&client->dev); 731 732 return 0; 733 } 734 735 static struct i2c_driver at24_driver = { 736 .driver = { 737 .name = "at24", 738 .of_match_table = at24_of_match, 739 .acpi_match_table = ACPI_PTR(at24_acpi_ids), 740 }, 741 .probe_new = at24_probe, 742 .remove = at24_remove, 743 .id_table = at24_ids, 744 }; 745 746 static int __init at24_init(void) 747 { 748 if (!at24_io_limit) { 749 pr_err("at24: at24_io_limit must not be 0!\n"); 750 return -EINVAL; 751 } 752 753 at24_io_limit = rounddown_pow_of_two(at24_io_limit); 754 return i2c_add_driver(&at24_driver); 755 } 756 module_init(at24_init); 757 758 static void __exit at24_exit(void) 759 { 760 i2c_del_driver(&at24_driver); 761 } 762 module_exit(at24_exit); 763 764 MODULE_DESCRIPTION("Driver for most I2C EEPROMs"); 765 MODULE_AUTHOR("David Brownell and Wolfram Sang"); 766 MODULE_LICENSE("GPL"); 767