xref: /openbmc/linux/drivers/misc/eeprom/at24.c (revision 95298d63)
1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /*
3  * at24.c - handle most I2C EEPROMs
4  *
5  * Copyright (C) 2005-2007 David Brownell
6  * Copyright (C) 2008 Wolfram Sang, Pengutronix
7  */
8 
9 #include <linux/acpi.h>
10 #include <linux/bitops.h>
11 #include <linux/delay.h>
12 #include <linux/i2c.h>
13 #include <linux/init.h>
14 #include <linux/jiffies.h>
15 #include <linux/kernel.h>
16 #include <linux/mod_devicetable.h>
17 #include <linux/module.h>
18 #include <linux/mutex.h>
19 #include <linux/nvmem-provider.h>
20 #include <linux/of_device.h>
21 #include <linux/pm_runtime.h>
22 #include <linux/property.h>
23 #include <linux/regmap.h>
24 #include <linux/regulator/consumer.h>
25 #include <linux/slab.h>
26 
27 /* Address pointer is 16 bit. */
28 #define AT24_FLAG_ADDR16	BIT(7)
29 /* sysfs-entry will be read-only. */
30 #define AT24_FLAG_READONLY	BIT(6)
31 /* sysfs-entry will be world-readable. */
32 #define AT24_FLAG_IRUGO		BIT(5)
33 /* Take always 8 addresses (24c00). */
34 #define AT24_FLAG_TAKE8ADDR	BIT(4)
35 /* Factory-programmed serial number. */
36 #define AT24_FLAG_SERIAL	BIT(3)
37 /* Factory-programmed mac address. */
38 #define AT24_FLAG_MAC		BIT(2)
39 /* Does not auto-rollover reads to the next slave address. */
40 #define AT24_FLAG_NO_RDROL	BIT(1)
41 
42 /*
43  * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable.
44  * Differences between different vendor product lines (like Atmel AT24C or
45  * MicroChip 24LC, etc) won't much matter for typical read/write access.
46  * There are also I2C RAM chips, likewise interchangeable. One example
47  * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes).
48  *
49  * However, misconfiguration can lose data. "Set 16-bit memory address"
50  * to a part with 8-bit addressing will overwrite data. Writing with too
51  * big a page size also loses data. And it's not safe to assume that the
52  * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC
53  * uses 0x51, for just one example.
54  *
55  * Accordingly, explicit board-specific configuration data should be used
56  * in almost all cases. (One partial exception is an SMBus used to access
57  * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.)
58  *
59  * So this driver uses "new style" I2C driver binding, expecting to be
60  * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or
61  * similar kernel-resident tables; or, configuration data coming from
62  * a bootloader.
63  *
64  * Other than binding model, current differences from "eeprom" driver are
65  * that this one handles write access and isn't restricted to 24c02 devices.
66  * It also handles larger devices (32 kbit and up) with two-byte addresses,
67  * which won't work on pure SMBus systems.
68  */
69 
70 struct at24_client {
71 	struct i2c_client *client;
72 	struct regmap *regmap;
73 };
74 
75 struct at24_data {
76 	/*
77 	 * Lock protects against activities from other Linux tasks,
78 	 * but not from changes by other I2C masters.
79 	 */
80 	struct mutex lock;
81 
82 	unsigned int write_max;
83 	unsigned int num_addresses;
84 	unsigned int offset_adj;
85 
86 	u32 byte_len;
87 	u16 page_size;
88 	u8 flags;
89 
90 	struct nvmem_device *nvmem;
91 	struct regulator *vcc_reg;
92 
93 	/*
94 	 * Some chips tie up multiple I2C addresses; dummy devices reserve
95 	 * them for us, and we'll use them with SMBus calls.
96 	 */
97 	struct at24_client client[];
98 };
99 
100 /*
101  * This parameter is to help this driver avoid blocking other drivers out
102  * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C
103  * clock, one 256 byte read takes about 1/43 second which is excessive;
104  * but the 1/170 second it takes at 400 kHz may be quite reasonable; and
105  * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible.
106  *
107  * This value is forced to be a power of two so that writes align on pages.
108  */
109 static unsigned int at24_io_limit = 128;
110 module_param_named(io_limit, at24_io_limit, uint, 0);
111 MODULE_PARM_DESC(at24_io_limit, "Maximum bytes per I/O (default 128)");
112 
113 /*
114  * Specs often allow 5 msec for a page write, sometimes 20 msec;
115  * it's important to recover from write timeouts.
116  */
117 static unsigned int at24_write_timeout = 25;
118 module_param_named(write_timeout, at24_write_timeout, uint, 0);
119 MODULE_PARM_DESC(at24_write_timeout, "Time (in ms) to try writes (default 25)");
120 
121 struct at24_chip_data {
122 	u32 byte_len;
123 	u8 flags;
124 };
125 
126 #define AT24_CHIP_DATA(_name, _len, _flags)				\
127 	static const struct at24_chip_data _name = {			\
128 		.byte_len = _len, .flags = _flags,			\
129 	}
130 
131 /* needs 8 addresses as A0-A2 are ignored */
132 AT24_CHIP_DATA(at24_data_24c00, 128 / 8, AT24_FLAG_TAKE8ADDR);
133 /* old variants can't be handled with this generic entry! */
134 AT24_CHIP_DATA(at24_data_24c01, 1024 / 8, 0);
135 AT24_CHIP_DATA(at24_data_24cs01, 16,
136 	AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
137 AT24_CHIP_DATA(at24_data_24c02, 2048 / 8, 0);
138 AT24_CHIP_DATA(at24_data_24cs02, 16,
139 	AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
140 AT24_CHIP_DATA(at24_data_24mac402, 48 / 8,
141 	AT24_FLAG_MAC | AT24_FLAG_READONLY);
142 AT24_CHIP_DATA(at24_data_24mac602, 64 / 8,
143 	AT24_FLAG_MAC | AT24_FLAG_READONLY);
144 /* spd is a 24c02 in memory DIMMs */
145 AT24_CHIP_DATA(at24_data_spd, 2048 / 8,
146 	AT24_FLAG_READONLY | AT24_FLAG_IRUGO);
147 AT24_CHIP_DATA(at24_data_24c04, 4096 / 8, 0);
148 AT24_CHIP_DATA(at24_data_24cs04, 16,
149 	AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
150 /* 24rf08 quirk is handled at i2c-core */
151 AT24_CHIP_DATA(at24_data_24c08, 8192 / 8, 0);
152 AT24_CHIP_DATA(at24_data_24cs08, 16,
153 	AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
154 AT24_CHIP_DATA(at24_data_24c16, 16384 / 8, 0);
155 AT24_CHIP_DATA(at24_data_24cs16, 16,
156 	AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
157 AT24_CHIP_DATA(at24_data_24c32, 32768 / 8, AT24_FLAG_ADDR16);
158 AT24_CHIP_DATA(at24_data_24cs32, 16,
159 	AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
160 AT24_CHIP_DATA(at24_data_24c64, 65536 / 8, AT24_FLAG_ADDR16);
161 AT24_CHIP_DATA(at24_data_24cs64, 16,
162 	AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY);
163 AT24_CHIP_DATA(at24_data_24c128, 131072 / 8, AT24_FLAG_ADDR16);
164 AT24_CHIP_DATA(at24_data_24c256, 262144 / 8, AT24_FLAG_ADDR16);
165 AT24_CHIP_DATA(at24_data_24c512, 524288 / 8, AT24_FLAG_ADDR16);
166 AT24_CHIP_DATA(at24_data_24c1024, 1048576 / 8, AT24_FLAG_ADDR16);
167 AT24_CHIP_DATA(at24_data_24c2048, 2097152 / 8, AT24_FLAG_ADDR16);
168 /* identical to 24c08 ? */
169 AT24_CHIP_DATA(at24_data_INT3499, 8192 / 8, 0);
170 
171 static const struct i2c_device_id at24_ids[] = {
172 	{ "24c00",	(kernel_ulong_t)&at24_data_24c00 },
173 	{ "24c01",	(kernel_ulong_t)&at24_data_24c01 },
174 	{ "24cs01",	(kernel_ulong_t)&at24_data_24cs01 },
175 	{ "24c02",	(kernel_ulong_t)&at24_data_24c02 },
176 	{ "24cs02",	(kernel_ulong_t)&at24_data_24cs02 },
177 	{ "24mac402",	(kernel_ulong_t)&at24_data_24mac402 },
178 	{ "24mac602",	(kernel_ulong_t)&at24_data_24mac602 },
179 	{ "spd",	(kernel_ulong_t)&at24_data_spd },
180 	{ "24c04",	(kernel_ulong_t)&at24_data_24c04 },
181 	{ "24cs04",	(kernel_ulong_t)&at24_data_24cs04 },
182 	{ "24c08",	(kernel_ulong_t)&at24_data_24c08 },
183 	{ "24cs08",	(kernel_ulong_t)&at24_data_24cs08 },
184 	{ "24c16",	(kernel_ulong_t)&at24_data_24c16 },
185 	{ "24cs16",	(kernel_ulong_t)&at24_data_24cs16 },
186 	{ "24c32",	(kernel_ulong_t)&at24_data_24c32 },
187 	{ "24cs32",	(kernel_ulong_t)&at24_data_24cs32 },
188 	{ "24c64",	(kernel_ulong_t)&at24_data_24c64 },
189 	{ "24cs64",	(kernel_ulong_t)&at24_data_24cs64 },
190 	{ "24c128",	(kernel_ulong_t)&at24_data_24c128 },
191 	{ "24c256",	(kernel_ulong_t)&at24_data_24c256 },
192 	{ "24c512",	(kernel_ulong_t)&at24_data_24c512 },
193 	{ "24c1024",	(kernel_ulong_t)&at24_data_24c1024 },
194 	{ "24c2048",    (kernel_ulong_t)&at24_data_24c2048 },
195 	{ "at24",	0 },
196 	{ /* END OF LIST */ }
197 };
198 MODULE_DEVICE_TABLE(i2c, at24_ids);
199 
200 static const struct of_device_id at24_of_match[] = {
201 	{ .compatible = "atmel,24c00",		.data = &at24_data_24c00 },
202 	{ .compatible = "atmel,24c01",		.data = &at24_data_24c01 },
203 	{ .compatible = "atmel,24cs01",		.data = &at24_data_24cs01 },
204 	{ .compatible = "atmel,24c02",		.data = &at24_data_24c02 },
205 	{ .compatible = "atmel,24cs02",		.data = &at24_data_24cs02 },
206 	{ .compatible = "atmel,24mac402",	.data = &at24_data_24mac402 },
207 	{ .compatible = "atmel,24mac602",	.data = &at24_data_24mac602 },
208 	{ .compatible = "atmel,spd",		.data = &at24_data_spd },
209 	{ .compatible = "atmel,24c04",		.data = &at24_data_24c04 },
210 	{ .compatible = "atmel,24cs04",		.data = &at24_data_24cs04 },
211 	{ .compatible = "atmel,24c08",		.data = &at24_data_24c08 },
212 	{ .compatible = "atmel,24cs08",		.data = &at24_data_24cs08 },
213 	{ .compatible = "atmel,24c16",		.data = &at24_data_24c16 },
214 	{ .compatible = "atmel,24cs16",		.data = &at24_data_24cs16 },
215 	{ .compatible = "atmel,24c32",		.data = &at24_data_24c32 },
216 	{ .compatible = "atmel,24cs32",		.data = &at24_data_24cs32 },
217 	{ .compatible = "atmel,24c64",		.data = &at24_data_24c64 },
218 	{ .compatible = "atmel,24cs64",		.data = &at24_data_24cs64 },
219 	{ .compatible = "atmel,24c128",		.data = &at24_data_24c128 },
220 	{ .compatible = "atmel,24c256",		.data = &at24_data_24c256 },
221 	{ .compatible = "atmel,24c512",		.data = &at24_data_24c512 },
222 	{ .compatible = "atmel,24c1024",	.data = &at24_data_24c1024 },
223 	{ .compatible = "atmel,24c2048",	.data = &at24_data_24c2048 },
224 	{ /* END OF LIST */ },
225 };
226 MODULE_DEVICE_TABLE(of, at24_of_match);
227 
228 static const struct acpi_device_id at24_acpi_ids[] = {
229 	{ "INT3499",	(kernel_ulong_t)&at24_data_INT3499 },
230 	{ "TPF0001",	(kernel_ulong_t)&at24_data_24c1024 },
231 	{ /* END OF LIST */ }
232 };
233 MODULE_DEVICE_TABLE(acpi, at24_acpi_ids);
234 
235 /*
236  * This routine supports chips which consume multiple I2C addresses. It
237  * computes the addressing information to be used for a given r/w request.
238  * Assumes that sanity checks for offset happened at sysfs-layer.
239  *
240  * Slave address and byte offset derive from the offset. Always
241  * set the byte address; on a multi-master board, another master
242  * may have changed the chip's "current" address pointer.
243  */
244 static struct at24_client *at24_translate_offset(struct at24_data *at24,
245 						 unsigned int *offset)
246 {
247 	unsigned int i;
248 
249 	if (at24->flags & AT24_FLAG_ADDR16) {
250 		i = *offset >> 16;
251 		*offset &= 0xffff;
252 	} else {
253 		i = *offset >> 8;
254 		*offset &= 0xff;
255 	}
256 
257 	return &at24->client[i];
258 }
259 
260 static struct device *at24_base_client_dev(struct at24_data *at24)
261 {
262 	return &at24->client[0].client->dev;
263 }
264 
265 static size_t at24_adjust_read_count(struct at24_data *at24,
266 				      unsigned int offset, size_t count)
267 {
268 	unsigned int bits;
269 	size_t remainder;
270 
271 	/*
272 	 * In case of multi-address chips that don't rollover reads to
273 	 * the next slave address: truncate the count to the slave boundary,
274 	 * so that the read never straddles slaves.
275 	 */
276 	if (at24->flags & AT24_FLAG_NO_RDROL) {
277 		bits = (at24->flags & AT24_FLAG_ADDR16) ? 16 : 8;
278 		remainder = BIT(bits) - offset;
279 		if (count > remainder)
280 			count = remainder;
281 	}
282 
283 	if (count > at24_io_limit)
284 		count = at24_io_limit;
285 
286 	return count;
287 }
288 
289 static ssize_t at24_regmap_read(struct at24_data *at24, char *buf,
290 				unsigned int offset, size_t count)
291 {
292 	unsigned long timeout, read_time;
293 	struct at24_client *at24_client;
294 	struct i2c_client *client;
295 	struct regmap *regmap;
296 	int ret;
297 
298 	at24_client = at24_translate_offset(at24, &offset);
299 	regmap = at24_client->regmap;
300 	client = at24_client->client;
301 	count = at24_adjust_read_count(at24, offset, count);
302 
303 	/* adjust offset for mac and serial read ops */
304 	offset += at24->offset_adj;
305 
306 	timeout = jiffies + msecs_to_jiffies(at24_write_timeout);
307 	do {
308 		/*
309 		 * The timestamp shall be taken before the actual operation
310 		 * to avoid a premature timeout in case of high CPU load.
311 		 */
312 		read_time = jiffies;
313 
314 		ret = regmap_bulk_read(regmap, offset, buf, count);
315 		dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n",
316 			count, offset, ret, jiffies);
317 		if (!ret)
318 			return count;
319 
320 		usleep_range(1000, 1500);
321 	} while (time_before(read_time, timeout));
322 
323 	return -ETIMEDOUT;
324 }
325 
326 /*
327  * Note that if the hardware write-protect pin is pulled high, the whole
328  * chip is normally write protected. But there are plenty of product
329  * variants here, including OTP fuses and partial chip protect.
330  *
331  * We only use page mode writes; the alternative is sloooow. These routines
332  * write at most one page.
333  */
334 
335 static size_t at24_adjust_write_count(struct at24_data *at24,
336 				      unsigned int offset, size_t count)
337 {
338 	unsigned int next_page;
339 
340 	/* write_max is at most a page */
341 	if (count > at24->write_max)
342 		count = at24->write_max;
343 
344 	/* Never roll over backwards, to the start of this page */
345 	next_page = roundup(offset + 1, at24->page_size);
346 	if (offset + count > next_page)
347 		count = next_page - offset;
348 
349 	return count;
350 }
351 
352 static ssize_t at24_regmap_write(struct at24_data *at24, const char *buf,
353 				 unsigned int offset, size_t count)
354 {
355 	unsigned long timeout, write_time;
356 	struct at24_client *at24_client;
357 	struct i2c_client *client;
358 	struct regmap *regmap;
359 	int ret;
360 
361 	at24_client = at24_translate_offset(at24, &offset);
362 	regmap = at24_client->regmap;
363 	client = at24_client->client;
364 	count = at24_adjust_write_count(at24, offset, count);
365 	timeout = jiffies + msecs_to_jiffies(at24_write_timeout);
366 
367 	do {
368 		/*
369 		 * The timestamp shall be taken before the actual operation
370 		 * to avoid a premature timeout in case of high CPU load.
371 		 */
372 		write_time = jiffies;
373 
374 		ret = regmap_bulk_write(regmap, offset, buf, count);
375 		dev_dbg(&client->dev, "write %zu@%d --> %d (%ld)\n",
376 			count, offset, ret, jiffies);
377 		if (!ret)
378 			return count;
379 
380 		usleep_range(1000, 1500);
381 	} while (time_before(write_time, timeout));
382 
383 	return -ETIMEDOUT;
384 }
385 
386 static int at24_read(void *priv, unsigned int off, void *val, size_t count)
387 {
388 	struct at24_data *at24;
389 	struct device *dev;
390 	char *buf = val;
391 	int ret;
392 
393 	at24 = priv;
394 	dev = at24_base_client_dev(at24);
395 
396 	if (unlikely(!count))
397 		return count;
398 
399 	if (off + count > at24->byte_len)
400 		return -EINVAL;
401 
402 	ret = pm_runtime_get_sync(dev);
403 	if (ret < 0) {
404 		pm_runtime_put_noidle(dev);
405 		return ret;
406 	}
407 
408 	/*
409 	 * Read data from chip, protecting against concurrent updates
410 	 * from this host, but not from other I2C masters.
411 	 */
412 	mutex_lock(&at24->lock);
413 
414 	while (count) {
415 		ret = at24_regmap_read(at24, buf, off, count);
416 		if (ret < 0) {
417 			mutex_unlock(&at24->lock);
418 			pm_runtime_put(dev);
419 			return ret;
420 		}
421 		buf += ret;
422 		off += ret;
423 		count -= ret;
424 	}
425 
426 	mutex_unlock(&at24->lock);
427 
428 	pm_runtime_put(dev);
429 
430 	return 0;
431 }
432 
433 static int at24_write(void *priv, unsigned int off, void *val, size_t count)
434 {
435 	struct at24_data *at24;
436 	struct device *dev;
437 	char *buf = val;
438 	int ret;
439 
440 	at24 = priv;
441 	dev = at24_base_client_dev(at24);
442 
443 	if (unlikely(!count))
444 		return -EINVAL;
445 
446 	if (off + count > at24->byte_len)
447 		return -EINVAL;
448 
449 	ret = pm_runtime_get_sync(dev);
450 	if (ret < 0) {
451 		pm_runtime_put_noidle(dev);
452 		return ret;
453 	}
454 
455 	/*
456 	 * Write data to chip, protecting against concurrent updates
457 	 * from this host, but not from other I2C masters.
458 	 */
459 	mutex_lock(&at24->lock);
460 
461 	while (count) {
462 		ret = at24_regmap_write(at24, buf, off, count);
463 		if (ret < 0) {
464 			mutex_unlock(&at24->lock);
465 			pm_runtime_put(dev);
466 			return ret;
467 		}
468 		buf += ret;
469 		off += ret;
470 		count -= ret;
471 	}
472 
473 	mutex_unlock(&at24->lock);
474 
475 	pm_runtime_put(dev);
476 
477 	return 0;
478 }
479 
480 static const struct at24_chip_data *at24_get_chip_data(struct device *dev)
481 {
482 	struct device_node *of_node = dev->of_node;
483 	const struct at24_chip_data *cdata;
484 	const struct i2c_device_id *id;
485 
486 	id = i2c_match_id(at24_ids, to_i2c_client(dev));
487 
488 	/*
489 	 * The I2C core allows OF nodes compatibles to match against the
490 	 * I2C device ID table as a fallback, so check not only if an OF
491 	 * node is present but also if it matches an OF device ID entry.
492 	 */
493 	if (of_node && of_match_device(at24_of_match, dev))
494 		cdata = of_device_get_match_data(dev);
495 	else if (id)
496 		cdata = (void *)id->driver_data;
497 	else
498 		cdata = acpi_device_get_match_data(dev);
499 
500 	if (!cdata)
501 		return ERR_PTR(-ENODEV);
502 
503 	return cdata;
504 }
505 
506 static int at24_make_dummy_client(struct at24_data *at24, unsigned int index,
507 				  struct regmap_config *regmap_config)
508 {
509 	struct i2c_client *base_client, *dummy_client;
510 	struct regmap *regmap;
511 	struct device *dev;
512 
513 	base_client = at24->client[0].client;
514 	dev = &base_client->dev;
515 
516 	dummy_client = devm_i2c_new_dummy_device(dev, base_client->adapter,
517 						 base_client->addr + index);
518 	if (IS_ERR(dummy_client))
519 		return PTR_ERR(dummy_client);
520 
521 	regmap = devm_regmap_init_i2c(dummy_client, regmap_config);
522 	if (IS_ERR(regmap))
523 		return PTR_ERR(regmap);
524 
525 	at24->client[index].client = dummy_client;
526 	at24->client[index].regmap = regmap;
527 
528 	return 0;
529 }
530 
531 static unsigned int at24_get_offset_adj(u8 flags, unsigned int byte_len)
532 {
533 	if (flags & AT24_FLAG_MAC) {
534 		/* EUI-48 starts from 0x9a, EUI-64 from 0x98 */
535 		return 0xa0 - byte_len;
536 	} else if (flags & AT24_FLAG_SERIAL && flags & AT24_FLAG_ADDR16) {
537 		/*
538 		 * For 16 bit address pointers, the word address must contain
539 		 * a '10' sequence in bits 11 and 10 regardless of the
540 		 * intended position of the address pointer.
541 		 */
542 		return 0x0800;
543 	} else if (flags & AT24_FLAG_SERIAL) {
544 		/*
545 		 * Otherwise the word address must begin with a '10' sequence,
546 		 * regardless of the intended address.
547 		 */
548 		return 0x0080;
549 	} else {
550 		return 0;
551 	}
552 }
553 
554 static int at24_probe(struct i2c_client *client)
555 {
556 	struct regmap_config regmap_config = { };
557 	struct nvmem_config nvmem_config = { };
558 	u32 byte_len, page_size, flags, addrw;
559 	const struct at24_chip_data *cdata;
560 	struct device *dev = &client->dev;
561 	bool i2c_fn_i2c, i2c_fn_block;
562 	unsigned int i, num_addresses;
563 	struct at24_data *at24;
564 	struct regmap *regmap;
565 	bool writable;
566 	u8 test_byte;
567 	int err;
568 
569 	i2c_fn_i2c = i2c_check_functionality(client->adapter, I2C_FUNC_I2C);
570 	i2c_fn_block = i2c_check_functionality(client->adapter,
571 					       I2C_FUNC_SMBUS_WRITE_I2C_BLOCK);
572 
573 	cdata = at24_get_chip_data(dev);
574 	if (IS_ERR(cdata))
575 		return PTR_ERR(cdata);
576 
577 	err = device_property_read_u32(dev, "pagesize", &page_size);
578 	if (err)
579 		/*
580 		 * This is slow, but we can't know all eeproms, so we better
581 		 * play safe. Specifying custom eeprom-types via device tree
582 		 * or properties is recommended anyhow.
583 		 */
584 		page_size = 1;
585 
586 	flags = cdata->flags;
587 	if (device_property_present(dev, "read-only"))
588 		flags |= AT24_FLAG_READONLY;
589 	if (device_property_present(dev, "no-read-rollover"))
590 		flags |= AT24_FLAG_NO_RDROL;
591 
592 	err = device_property_read_u32(dev, "address-width", &addrw);
593 	if (!err) {
594 		switch (addrw) {
595 		case 8:
596 			if (flags & AT24_FLAG_ADDR16)
597 				dev_warn(dev,
598 					 "Override address width to be 8, while default is 16\n");
599 			flags &= ~AT24_FLAG_ADDR16;
600 			break;
601 		case 16:
602 			flags |= AT24_FLAG_ADDR16;
603 			break;
604 		default:
605 			dev_warn(dev, "Bad \"address-width\" property: %u\n",
606 				 addrw);
607 		}
608 	}
609 
610 	err = device_property_read_u32(dev, "size", &byte_len);
611 	if (err)
612 		byte_len = cdata->byte_len;
613 
614 	if (!i2c_fn_i2c && !i2c_fn_block)
615 		page_size = 1;
616 
617 	if (!page_size) {
618 		dev_err(dev, "page_size must not be 0!\n");
619 		return -EINVAL;
620 	}
621 
622 	if (!is_power_of_2(page_size))
623 		dev_warn(dev, "page_size looks suspicious (no power of 2)!\n");
624 
625 	err = device_property_read_u32(dev, "num-addresses", &num_addresses);
626 	if (err) {
627 		if (flags & AT24_FLAG_TAKE8ADDR)
628 			num_addresses = 8;
629 		else
630 			num_addresses =	DIV_ROUND_UP(byte_len,
631 				(flags & AT24_FLAG_ADDR16) ? 65536 : 256);
632 	}
633 
634 	if ((flags & AT24_FLAG_SERIAL) && (flags & AT24_FLAG_MAC)) {
635 		dev_err(dev,
636 			"invalid device data - cannot have both AT24_FLAG_SERIAL & AT24_FLAG_MAC.");
637 		return -EINVAL;
638 	}
639 
640 	regmap_config.val_bits = 8;
641 	regmap_config.reg_bits = (flags & AT24_FLAG_ADDR16) ? 16 : 8;
642 	regmap_config.disable_locking = true;
643 
644 	regmap = devm_regmap_init_i2c(client, &regmap_config);
645 	if (IS_ERR(regmap))
646 		return PTR_ERR(regmap);
647 
648 	at24 = devm_kzalloc(dev, struct_size(at24, client, num_addresses),
649 			    GFP_KERNEL);
650 	if (!at24)
651 		return -ENOMEM;
652 
653 	mutex_init(&at24->lock);
654 	at24->byte_len = byte_len;
655 	at24->page_size = page_size;
656 	at24->flags = flags;
657 	at24->num_addresses = num_addresses;
658 	at24->offset_adj = at24_get_offset_adj(flags, byte_len);
659 	at24->client[0].client = client;
660 	at24->client[0].regmap = regmap;
661 
662 	at24->vcc_reg = devm_regulator_get(dev, "vcc");
663 	if (IS_ERR(at24->vcc_reg))
664 		return PTR_ERR(at24->vcc_reg);
665 
666 	writable = !(flags & AT24_FLAG_READONLY);
667 	if (writable) {
668 		at24->write_max = min_t(unsigned int,
669 					page_size, at24_io_limit);
670 		if (!i2c_fn_i2c && at24->write_max > I2C_SMBUS_BLOCK_MAX)
671 			at24->write_max = I2C_SMBUS_BLOCK_MAX;
672 	}
673 
674 	/* use dummy devices for multiple-address chips */
675 	for (i = 1; i < num_addresses; i++) {
676 		err = at24_make_dummy_client(at24, i, &regmap_config);
677 		if (err)
678 			return err;
679 	}
680 
681 	nvmem_config.name = dev_name(dev);
682 	nvmem_config.dev = dev;
683 	nvmem_config.read_only = !writable;
684 	nvmem_config.root_only = !(flags & AT24_FLAG_IRUGO);
685 	nvmem_config.owner = THIS_MODULE;
686 	nvmem_config.compat = true;
687 	nvmem_config.base_dev = dev;
688 	nvmem_config.reg_read = at24_read;
689 	nvmem_config.reg_write = at24_write;
690 	nvmem_config.priv = at24;
691 	nvmem_config.stride = 1;
692 	nvmem_config.word_size = 1;
693 	nvmem_config.size = byte_len;
694 
695 	at24->nvmem = devm_nvmem_register(dev, &nvmem_config);
696 	if (IS_ERR(at24->nvmem))
697 		return PTR_ERR(at24->nvmem);
698 
699 	i2c_set_clientdata(client, at24);
700 
701 	err = regulator_enable(at24->vcc_reg);
702 	if (err) {
703 		dev_err(dev, "Failed to enable vcc regulator\n");
704 		return err;
705 	}
706 
707 	/* enable runtime pm */
708 	pm_runtime_set_active(dev);
709 	pm_runtime_enable(dev);
710 
711 	/*
712 	 * Perform a one-byte test read to verify that the
713 	 * chip is functional.
714 	 */
715 	err = at24_read(at24, 0, &test_byte, 1);
716 	if (err) {
717 		pm_runtime_disable(dev);
718 		regulator_disable(at24->vcc_reg);
719 		return -ENODEV;
720 	}
721 
722 	pm_runtime_idle(dev);
723 
724 	if (writable)
725 		dev_info(dev, "%u byte %s EEPROM, writable, %u bytes/write\n",
726 			 byte_len, client->name, at24->write_max);
727 	else
728 		dev_info(dev, "%u byte %s EEPROM, read-only\n",
729 			 byte_len, client->name);
730 
731 	return 0;
732 }
733 
734 static int at24_remove(struct i2c_client *client)
735 {
736 	struct at24_data *at24 = i2c_get_clientdata(client);
737 
738 	pm_runtime_disable(&client->dev);
739 	if (!pm_runtime_status_suspended(&client->dev))
740 		regulator_disable(at24->vcc_reg);
741 	pm_runtime_set_suspended(&client->dev);
742 
743 	return 0;
744 }
745 
746 static int __maybe_unused at24_suspend(struct device *dev)
747 {
748 	struct i2c_client *client = to_i2c_client(dev);
749 	struct at24_data *at24 = i2c_get_clientdata(client);
750 
751 	return regulator_disable(at24->vcc_reg);
752 }
753 
754 static int __maybe_unused at24_resume(struct device *dev)
755 {
756 	struct i2c_client *client = to_i2c_client(dev);
757 	struct at24_data *at24 = i2c_get_clientdata(client);
758 
759 	return regulator_enable(at24->vcc_reg);
760 }
761 
762 static const struct dev_pm_ops at24_pm_ops = {
763 	SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend,
764 				pm_runtime_force_resume)
765 	SET_RUNTIME_PM_OPS(at24_suspend, at24_resume, NULL)
766 };
767 
768 static struct i2c_driver at24_driver = {
769 	.driver = {
770 		.name = "at24",
771 		.pm = &at24_pm_ops,
772 		.of_match_table = at24_of_match,
773 		.acpi_match_table = ACPI_PTR(at24_acpi_ids),
774 	},
775 	.probe_new = at24_probe,
776 	.remove = at24_remove,
777 	.id_table = at24_ids,
778 };
779 
780 static int __init at24_init(void)
781 {
782 	if (!at24_io_limit) {
783 		pr_err("at24: at24_io_limit must not be 0!\n");
784 		return -EINVAL;
785 	}
786 
787 	at24_io_limit = rounddown_pow_of_two(at24_io_limit);
788 	return i2c_add_driver(&at24_driver);
789 }
790 module_init(at24_init);
791 
792 static void __exit at24_exit(void)
793 {
794 	i2c_del_driver(&at24_driver);
795 }
796 module_exit(at24_exit);
797 
798 MODULE_DESCRIPTION("Driver for most I2C EEPROMs");
799 MODULE_AUTHOR("David Brownell and Wolfram Sang");
800 MODULE_LICENSE("GPL");
801