1 // SPDX-License-Identifier: GPL-2.0-or-later 2 /* 3 * at24.c - handle most I2C EEPROMs 4 * 5 * Copyright (C) 2005-2007 David Brownell 6 * Copyright (C) 2008 Wolfram Sang, Pengutronix 7 */ 8 9 #include <linux/acpi.h> 10 #include <linux/bitops.h> 11 #include <linux/capability.h> 12 #include <linux/delay.h> 13 #include <linux/i2c.h> 14 #include <linux/init.h> 15 #include <linux/jiffies.h> 16 #include <linux/kernel.h> 17 #include <linux/mod_devicetable.h> 18 #include <linux/module.h> 19 #include <linux/mutex.h> 20 #include <linux/nvmem-provider.h> 21 #include <linux/of_device.h> 22 #include <linux/pm_runtime.h> 23 #include <linux/property.h> 24 #include <linux/regmap.h> 25 #include <linux/regulator/consumer.h> 26 #include <linux/slab.h> 27 28 /* Address pointer is 16 bit. */ 29 #define AT24_FLAG_ADDR16 BIT(7) 30 /* sysfs-entry will be read-only. */ 31 #define AT24_FLAG_READONLY BIT(6) 32 /* sysfs-entry will be world-readable. */ 33 #define AT24_FLAG_IRUGO BIT(5) 34 /* Take always 8 addresses (24c00). */ 35 #define AT24_FLAG_TAKE8ADDR BIT(4) 36 /* Factory-programmed serial number. */ 37 #define AT24_FLAG_SERIAL BIT(3) 38 /* Factory-programmed mac address. */ 39 #define AT24_FLAG_MAC BIT(2) 40 /* Does not auto-rollover reads to the next slave address. */ 41 #define AT24_FLAG_NO_RDROL BIT(1) 42 43 /* 44 * I2C EEPROMs from most vendors are inexpensive and mostly interchangeable. 45 * Differences between different vendor product lines (like Atmel AT24C or 46 * MicroChip 24LC, etc) won't much matter for typical read/write access. 47 * There are also I2C RAM chips, likewise interchangeable. One example 48 * would be the PCF8570, which acts like a 24c02 EEPROM (256 bytes). 49 * 50 * However, misconfiguration can lose data. "Set 16-bit memory address" 51 * to a part with 8-bit addressing will overwrite data. Writing with too 52 * big a page size also loses data. And it's not safe to assume that the 53 * conventional addresses 0x50..0x57 only hold eeproms; a PCF8563 RTC 54 * uses 0x51, for just one example. 55 * 56 * Accordingly, explicit board-specific configuration data should be used 57 * in almost all cases. (One partial exception is an SMBus used to access 58 * "SPD" data for DRAM sticks. Those only use 24c02 EEPROMs.) 59 * 60 * So this driver uses "new style" I2C driver binding, expecting to be 61 * told what devices exist. That may be in arch/X/mach-Y/board-Z.c or 62 * similar kernel-resident tables; or, configuration data coming from 63 * a bootloader. 64 * 65 * Other than binding model, current differences from "eeprom" driver are 66 * that this one handles write access and isn't restricted to 24c02 devices. 67 * It also handles larger devices (32 kbit and up) with two-byte addresses, 68 * which won't work on pure SMBus systems. 69 */ 70 71 struct at24_client { 72 struct i2c_client *client; 73 struct regmap *regmap; 74 }; 75 76 struct at24_data { 77 /* 78 * Lock protects against activities from other Linux tasks, 79 * but not from changes by other I2C masters. 80 */ 81 struct mutex lock; 82 83 unsigned int write_max; 84 unsigned int num_addresses; 85 unsigned int offset_adj; 86 87 u32 byte_len; 88 u16 page_size; 89 u8 flags; 90 91 struct nvmem_device *nvmem; 92 struct regulator *vcc_reg; 93 void (*read_post)(unsigned int off, char *buf, size_t count); 94 95 /* 96 * Some chips tie up multiple I2C addresses; dummy devices reserve 97 * them for us, and we'll use them with SMBus calls. 98 */ 99 struct at24_client client[]; 100 }; 101 102 /* 103 * This parameter is to help this driver avoid blocking other drivers out 104 * of I2C for potentially troublesome amounts of time. With a 100 kHz I2C 105 * clock, one 256 byte read takes about 1/43 second which is excessive; 106 * but the 1/170 second it takes at 400 kHz may be quite reasonable; and 107 * at 1 MHz (Fm+) a 1/430 second delay could easily be invisible. 108 * 109 * This value is forced to be a power of two so that writes align on pages. 110 */ 111 static unsigned int at24_io_limit = 128; 112 module_param_named(io_limit, at24_io_limit, uint, 0); 113 MODULE_PARM_DESC(at24_io_limit, "Maximum bytes per I/O (default 128)"); 114 115 /* 116 * Specs often allow 5 msec for a page write, sometimes 20 msec; 117 * it's important to recover from write timeouts. 118 */ 119 static unsigned int at24_write_timeout = 25; 120 module_param_named(write_timeout, at24_write_timeout, uint, 0); 121 MODULE_PARM_DESC(at24_write_timeout, "Time (in ms) to try writes (default 25)"); 122 123 struct at24_chip_data { 124 u32 byte_len; 125 u8 flags; 126 void (*read_post)(unsigned int off, char *buf, size_t count); 127 }; 128 129 #define AT24_CHIP_DATA(_name, _len, _flags) \ 130 static const struct at24_chip_data _name = { \ 131 .byte_len = _len, .flags = _flags, \ 132 } 133 134 #define AT24_CHIP_DATA_CB(_name, _len, _flags, _read_post) \ 135 static const struct at24_chip_data _name = { \ 136 .byte_len = _len, .flags = _flags, \ 137 .read_post = _read_post, \ 138 } 139 140 static void at24_read_post_vaio(unsigned int off, char *buf, size_t count) 141 { 142 int i; 143 144 if (capable(CAP_SYS_ADMIN)) 145 return; 146 147 /* 148 * Hide VAIO private settings to regular users: 149 * - BIOS passwords: bytes 0x00 to 0x0f 150 * - UUID: bytes 0x10 to 0x1f 151 * - Serial number: 0xc0 to 0xdf 152 */ 153 for (i = 0; i < count; i++) { 154 if ((off + i <= 0x1f) || 155 (off + i >= 0xc0 && off + i <= 0xdf)) 156 buf[i] = 0; 157 } 158 } 159 160 /* needs 8 addresses as A0-A2 are ignored */ 161 AT24_CHIP_DATA(at24_data_24c00, 128 / 8, AT24_FLAG_TAKE8ADDR); 162 /* old variants can't be handled with this generic entry! */ 163 AT24_CHIP_DATA(at24_data_24c01, 1024 / 8, 0); 164 AT24_CHIP_DATA(at24_data_24cs01, 16, 165 AT24_FLAG_SERIAL | AT24_FLAG_READONLY); 166 AT24_CHIP_DATA(at24_data_24c02, 2048 / 8, 0); 167 AT24_CHIP_DATA(at24_data_24cs02, 16, 168 AT24_FLAG_SERIAL | AT24_FLAG_READONLY); 169 AT24_CHIP_DATA(at24_data_24mac402, 48 / 8, 170 AT24_FLAG_MAC | AT24_FLAG_READONLY); 171 AT24_CHIP_DATA(at24_data_24mac602, 64 / 8, 172 AT24_FLAG_MAC | AT24_FLAG_READONLY); 173 /* spd is a 24c02 in memory DIMMs */ 174 AT24_CHIP_DATA(at24_data_spd, 2048 / 8, 175 AT24_FLAG_READONLY | AT24_FLAG_IRUGO); 176 /* 24c02_vaio is a 24c02 on some Sony laptops */ 177 AT24_CHIP_DATA_CB(at24_data_24c02_vaio, 2048 / 8, 178 AT24_FLAG_READONLY | AT24_FLAG_IRUGO, 179 at24_read_post_vaio); 180 AT24_CHIP_DATA(at24_data_24c04, 4096 / 8, 0); 181 AT24_CHIP_DATA(at24_data_24cs04, 16, 182 AT24_FLAG_SERIAL | AT24_FLAG_READONLY); 183 /* 24rf08 quirk is handled at i2c-core */ 184 AT24_CHIP_DATA(at24_data_24c08, 8192 / 8, 0); 185 AT24_CHIP_DATA(at24_data_24cs08, 16, 186 AT24_FLAG_SERIAL | AT24_FLAG_READONLY); 187 AT24_CHIP_DATA(at24_data_24c16, 16384 / 8, 0); 188 AT24_CHIP_DATA(at24_data_24cs16, 16, 189 AT24_FLAG_SERIAL | AT24_FLAG_READONLY); 190 AT24_CHIP_DATA(at24_data_24c32, 32768 / 8, AT24_FLAG_ADDR16); 191 AT24_CHIP_DATA(at24_data_24cs32, 16, 192 AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY); 193 AT24_CHIP_DATA(at24_data_24c64, 65536 / 8, AT24_FLAG_ADDR16); 194 AT24_CHIP_DATA(at24_data_24cs64, 16, 195 AT24_FLAG_ADDR16 | AT24_FLAG_SERIAL | AT24_FLAG_READONLY); 196 AT24_CHIP_DATA(at24_data_24c128, 131072 / 8, AT24_FLAG_ADDR16); 197 AT24_CHIP_DATA(at24_data_24c256, 262144 / 8, AT24_FLAG_ADDR16); 198 AT24_CHIP_DATA(at24_data_24c512, 524288 / 8, AT24_FLAG_ADDR16); 199 AT24_CHIP_DATA(at24_data_24c1024, 1048576 / 8, AT24_FLAG_ADDR16); 200 AT24_CHIP_DATA(at24_data_24c2048, 2097152 / 8, AT24_FLAG_ADDR16); 201 /* identical to 24c08 ? */ 202 AT24_CHIP_DATA(at24_data_INT3499, 8192 / 8, 0); 203 204 static const struct i2c_device_id at24_ids[] = { 205 { "24c00", (kernel_ulong_t)&at24_data_24c00 }, 206 { "24c01", (kernel_ulong_t)&at24_data_24c01 }, 207 { "24cs01", (kernel_ulong_t)&at24_data_24cs01 }, 208 { "24c02", (kernel_ulong_t)&at24_data_24c02 }, 209 { "24cs02", (kernel_ulong_t)&at24_data_24cs02 }, 210 { "24mac402", (kernel_ulong_t)&at24_data_24mac402 }, 211 { "24mac602", (kernel_ulong_t)&at24_data_24mac602 }, 212 { "spd", (kernel_ulong_t)&at24_data_spd }, 213 { "24c02-vaio", (kernel_ulong_t)&at24_data_24c02_vaio }, 214 { "24c04", (kernel_ulong_t)&at24_data_24c04 }, 215 { "24cs04", (kernel_ulong_t)&at24_data_24cs04 }, 216 { "24c08", (kernel_ulong_t)&at24_data_24c08 }, 217 { "24cs08", (kernel_ulong_t)&at24_data_24cs08 }, 218 { "24c16", (kernel_ulong_t)&at24_data_24c16 }, 219 { "24cs16", (kernel_ulong_t)&at24_data_24cs16 }, 220 { "24c32", (kernel_ulong_t)&at24_data_24c32 }, 221 { "24cs32", (kernel_ulong_t)&at24_data_24cs32 }, 222 { "24c64", (kernel_ulong_t)&at24_data_24c64 }, 223 { "24cs64", (kernel_ulong_t)&at24_data_24cs64 }, 224 { "24c128", (kernel_ulong_t)&at24_data_24c128 }, 225 { "24c256", (kernel_ulong_t)&at24_data_24c256 }, 226 { "24c512", (kernel_ulong_t)&at24_data_24c512 }, 227 { "24c1024", (kernel_ulong_t)&at24_data_24c1024 }, 228 { "24c2048", (kernel_ulong_t)&at24_data_24c2048 }, 229 { "at24", 0 }, 230 { /* END OF LIST */ } 231 }; 232 MODULE_DEVICE_TABLE(i2c, at24_ids); 233 234 static const struct of_device_id at24_of_match[] = { 235 { .compatible = "atmel,24c00", .data = &at24_data_24c00 }, 236 { .compatible = "atmel,24c01", .data = &at24_data_24c01 }, 237 { .compatible = "atmel,24cs01", .data = &at24_data_24cs01 }, 238 { .compatible = "atmel,24c02", .data = &at24_data_24c02 }, 239 { .compatible = "atmel,24cs02", .data = &at24_data_24cs02 }, 240 { .compatible = "atmel,24mac402", .data = &at24_data_24mac402 }, 241 { .compatible = "atmel,24mac602", .data = &at24_data_24mac602 }, 242 { .compatible = "atmel,spd", .data = &at24_data_spd }, 243 { .compatible = "atmel,24c04", .data = &at24_data_24c04 }, 244 { .compatible = "atmel,24cs04", .data = &at24_data_24cs04 }, 245 { .compatible = "atmel,24c08", .data = &at24_data_24c08 }, 246 { .compatible = "atmel,24cs08", .data = &at24_data_24cs08 }, 247 { .compatible = "atmel,24c16", .data = &at24_data_24c16 }, 248 { .compatible = "atmel,24cs16", .data = &at24_data_24cs16 }, 249 { .compatible = "atmel,24c32", .data = &at24_data_24c32 }, 250 { .compatible = "atmel,24cs32", .data = &at24_data_24cs32 }, 251 { .compatible = "atmel,24c64", .data = &at24_data_24c64 }, 252 { .compatible = "atmel,24cs64", .data = &at24_data_24cs64 }, 253 { .compatible = "atmel,24c128", .data = &at24_data_24c128 }, 254 { .compatible = "atmel,24c256", .data = &at24_data_24c256 }, 255 { .compatible = "atmel,24c512", .data = &at24_data_24c512 }, 256 { .compatible = "atmel,24c1024", .data = &at24_data_24c1024 }, 257 { .compatible = "atmel,24c2048", .data = &at24_data_24c2048 }, 258 { /* END OF LIST */ }, 259 }; 260 MODULE_DEVICE_TABLE(of, at24_of_match); 261 262 static const struct acpi_device_id __maybe_unused at24_acpi_ids[] = { 263 { "INT3499", (kernel_ulong_t)&at24_data_INT3499 }, 264 { "TPF0001", (kernel_ulong_t)&at24_data_24c1024 }, 265 { /* END OF LIST */ } 266 }; 267 MODULE_DEVICE_TABLE(acpi, at24_acpi_ids); 268 269 /* 270 * This routine supports chips which consume multiple I2C addresses. It 271 * computes the addressing information to be used for a given r/w request. 272 * Assumes that sanity checks for offset happened at sysfs-layer. 273 * 274 * Slave address and byte offset derive from the offset. Always 275 * set the byte address; on a multi-master board, another master 276 * may have changed the chip's "current" address pointer. 277 */ 278 static struct at24_client *at24_translate_offset(struct at24_data *at24, 279 unsigned int *offset) 280 { 281 unsigned int i; 282 283 if (at24->flags & AT24_FLAG_ADDR16) { 284 i = *offset >> 16; 285 *offset &= 0xffff; 286 } else { 287 i = *offset >> 8; 288 *offset &= 0xff; 289 } 290 291 return &at24->client[i]; 292 } 293 294 static struct device *at24_base_client_dev(struct at24_data *at24) 295 { 296 return &at24->client[0].client->dev; 297 } 298 299 static size_t at24_adjust_read_count(struct at24_data *at24, 300 unsigned int offset, size_t count) 301 { 302 unsigned int bits; 303 size_t remainder; 304 305 /* 306 * In case of multi-address chips that don't rollover reads to 307 * the next slave address: truncate the count to the slave boundary, 308 * so that the read never straddles slaves. 309 */ 310 if (at24->flags & AT24_FLAG_NO_RDROL) { 311 bits = (at24->flags & AT24_FLAG_ADDR16) ? 16 : 8; 312 remainder = BIT(bits) - offset; 313 if (count > remainder) 314 count = remainder; 315 } 316 317 if (count > at24_io_limit) 318 count = at24_io_limit; 319 320 return count; 321 } 322 323 static ssize_t at24_regmap_read(struct at24_data *at24, char *buf, 324 unsigned int offset, size_t count) 325 { 326 unsigned long timeout, read_time; 327 struct at24_client *at24_client; 328 struct i2c_client *client; 329 struct regmap *regmap; 330 int ret; 331 332 at24_client = at24_translate_offset(at24, &offset); 333 regmap = at24_client->regmap; 334 client = at24_client->client; 335 count = at24_adjust_read_count(at24, offset, count); 336 337 /* adjust offset for mac and serial read ops */ 338 offset += at24->offset_adj; 339 340 timeout = jiffies + msecs_to_jiffies(at24_write_timeout); 341 do { 342 /* 343 * The timestamp shall be taken before the actual operation 344 * to avoid a premature timeout in case of high CPU load. 345 */ 346 read_time = jiffies; 347 348 ret = regmap_bulk_read(regmap, offset, buf, count); 349 dev_dbg(&client->dev, "read %zu@%d --> %d (%ld)\n", 350 count, offset, ret, jiffies); 351 if (!ret) 352 return count; 353 354 usleep_range(1000, 1500); 355 } while (time_before(read_time, timeout)); 356 357 return -ETIMEDOUT; 358 } 359 360 /* 361 * Note that if the hardware write-protect pin is pulled high, the whole 362 * chip is normally write protected. But there are plenty of product 363 * variants here, including OTP fuses and partial chip protect. 364 * 365 * We only use page mode writes; the alternative is sloooow. These routines 366 * write at most one page. 367 */ 368 369 static size_t at24_adjust_write_count(struct at24_data *at24, 370 unsigned int offset, size_t count) 371 { 372 unsigned int next_page; 373 374 /* write_max is at most a page */ 375 if (count > at24->write_max) 376 count = at24->write_max; 377 378 /* Never roll over backwards, to the start of this page */ 379 next_page = roundup(offset + 1, at24->page_size); 380 if (offset + count > next_page) 381 count = next_page - offset; 382 383 return count; 384 } 385 386 static ssize_t at24_regmap_write(struct at24_data *at24, const char *buf, 387 unsigned int offset, size_t count) 388 { 389 unsigned long timeout, write_time; 390 struct at24_client *at24_client; 391 struct i2c_client *client; 392 struct regmap *regmap; 393 int ret; 394 395 at24_client = at24_translate_offset(at24, &offset); 396 regmap = at24_client->regmap; 397 client = at24_client->client; 398 count = at24_adjust_write_count(at24, offset, count); 399 timeout = jiffies + msecs_to_jiffies(at24_write_timeout); 400 401 do { 402 /* 403 * The timestamp shall be taken before the actual operation 404 * to avoid a premature timeout in case of high CPU load. 405 */ 406 write_time = jiffies; 407 408 ret = regmap_bulk_write(regmap, offset, buf, count); 409 dev_dbg(&client->dev, "write %zu@%d --> %d (%ld)\n", 410 count, offset, ret, jiffies); 411 if (!ret) 412 return count; 413 414 usleep_range(1000, 1500); 415 } while (time_before(write_time, timeout)); 416 417 return -ETIMEDOUT; 418 } 419 420 static int at24_read(void *priv, unsigned int off, void *val, size_t count) 421 { 422 struct at24_data *at24; 423 struct device *dev; 424 char *buf = val; 425 int i, ret; 426 427 at24 = priv; 428 dev = at24_base_client_dev(at24); 429 430 if (unlikely(!count)) 431 return count; 432 433 if (off + count > at24->byte_len) 434 return -EINVAL; 435 436 ret = pm_runtime_get_sync(dev); 437 if (ret < 0) { 438 pm_runtime_put_noidle(dev); 439 return ret; 440 } 441 442 /* 443 * Read data from chip, protecting against concurrent updates 444 * from this host, but not from other I2C masters. 445 */ 446 mutex_lock(&at24->lock); 447 448 for (i = 0; count; i += ret, count -= ret) { 449 ret = at24_regmap_read(at24, buf + i, off + i, count); 450 if (ret < 0) { 451 mutex_unlock(&at24->lock); 452 pm_runtime_put(dev); 453 return ret; 454 } 455 } 456 457 mutex_unlock(&at24->lock); 458 459 pm_runtime_put(dev); 460 461 if (unlikely(at24->read_post)) 462 at24->read_post(off, buf, i); 463 464 return 0; 465 } 466 467 static int at24_write(void *priv, unsigned int off, void *val, size_t count) 468 { 469 struct at24_data *at24; 470 struct device *dev; 471 char *buf = val; 472 int ret; 473 474 at24 = priv; 475 dev = at24_base_client_dev(at24); 476 477 if (unlikely(!count)) 478 return -EINVAL; 479 480 if (off + count > at24->byte_len) 481 return -EINVAL; 482 483 ret = pm_runtime_get_sync(dev); 484 if (ret < 0) { 485 pm_runtime_put_noidle(dev); 486 return ret; 487 } 488 489 /* 490 * Write data to chip, protecting against concurrent updates 491 * from this host, but not from other I2C masters. 492 */ 493 mutex_lock(&at24->lock); 494 495 while (count) { 496 ret = at24_regmap_write(at24, buf, off, count); 497 if (ret < 0) { 498 mutex_unlock(&at24->lock); 499 pm_runtime_put(dev); 500 return ret; 501 } 502 buf += ret; 503 off += ret; 504 count -= ret; 505 } 506 507 mutex_unlock(&at24->lock); 508 509 pm_runtime_put(dev); 510 511 return 0; 512 } 513 514 static const struct at24_chip_data *at24_get_chip_data(struct device *dev) 515 { 516 struct device_node *of_node = dev->of_node; 517 const struct at24_chip_data *cdata; 518 const struct i2c_device_id *id; 519 520 id = i2c_match_id(at24_ids, to_i2c_client(dev)); 521 522 /* 523 * The I2C core allows OF nodes compatibles to match against the 524 * I2C device ID table as a fallback, so check not only if an OF 525 * node is present but also if it matches an OF device ID entry. 526 */ 527 if (of_node && of_match_device(at24_of_match, dev)) 528 cdata = of_device_get_match_data(dev); 529 else if (id) 530 cdata = (void *)id->driver_data; 531 else 532 cdata = acpi_device_get_match_data(dev); 533 534 if (!cdata) 535 return ERR_PTR(-ENODEV); 536 537 return cdata; 538 } 539 540 static int at24_make_dummy_client(struct at24_data *at24, unsigned int index, 541 struct regmap_config *regmap_config) 542 { 543 struct i2c_client *base_client, *dummy_client; 544 struct regmap *regmap; 545 struct device *dev; 546 547 base_client = at24->client[0].client; 548 dev = &base_client->dev; 549 550 dummy_client = devm_i2c_new_dummy_device(dev, base_client->adapter, 551 base_client->addr + index); 552 if (IS_ERR(dummy_client)) 553 return PTR_ERR(dummy_client); 554 555 regmap = devm_regmap_init_i2c(dummy_client, regmap_config); 556 if (IS_ERR(regmap)) 557 return PTR_ERR(regmap); 558 559 at24->client[index].client = dummy_client; 560 at24->client[index].regmap = regmap; 561 562 return 0; 563 } 564 565 static unsigned int at24_get_offset_adj(u8 flags, unsigned int byte_len) 566 { 567 if (flags & AT24_FLAG_MAC) { 568 /* EUI-48 starts from 0x9a, EUI-64 from 0x98 */ 569 return 0xa0 - byte_len; 570 } else if (flags & AT24_FLAG_SERIAL && flags & AT24_FLAG_ADDR16) { 571 /* 572 * For 16 bit address pointers, the word address must contain 573 * a '10' sequence in bits 11 and 10 regardless of the 574 * intended position of the address pointer. 575 */ 576 return 0x0800; 577 } else if (flags & AT24_FLAG_SERIAL) { 578 /* 579 * Otherwise the word address must begin with a '10' sequence, 580 * regardless of the intended address. 581 */ 582 return 0x0080; 583 } else { 584 return 0; 585 } 586 } 587 588 static int at24_probe(struct i2c_client *client) 589 { 590 struct regmap_config regmap_config = { }; 591 struct nvmem_config nvmem_config = { }; 592 u32 byte_len, page_size, flags, addrw; 593 const struct at24_chip_data *cdata; 594 struct device *dev = &client->dev; 595 bool i2c_fn_i2c, i2c_fn_block; 596 unsigned int i, num_addresses; 597 struct at24_data *at24; 598 struct regmap *regmap; 599 bool writable; 600 u8 test_byte; 601 int err; 602 603 i2c_fn_i2c = i2c_check_functionality(client->adapter, I2C_FUNC_I2C); 604 i2c_fn_block = i2c_check_functionality(client->adapter, 605 I2C_FUNC_SMBUS_WRITE_I2C_BLOCK); 606 607 cdata = at24_get_chip_data(dev); 608 if (IS_ERR(cdata)) 609 return PTR_ERR(cdata); 610 611 err = device_property_read_u32(dev, "pagesize", &page_size); 612 if (err) 613 /* 614 * This is slow, but we can't know all eeproms, so we better 615 * play safe. Specifying custom eeprom-types via device tree 616 * or properties is recommended anyhow. 617 */ 618 page_size = 1; 619 620 flags = cdata->flags; 621 if (device_property_present(dev, "read-only")) 622 flags |= AT24_FLAG_READONLY; 623 if (device_property_present(dev, "no-read-rollover")) 624 flags |= AT24_FLAG_NO_RDROL; 625 626 err = device_property_read_u32(dev, "address-width", &addrw); 627 if (!err) { 628 switch (addrw) { 629 case 8: 630 if (flags & AT24_FLAG_ADDR16) 631 dev_warn(dev, 632 "Override address width to be 8, while default is 16\n"); 633 flags &= ~AT24_FLAG_ADDR16; 634 break; 635 case 16: 636 flags |= AT24_FLAG_ADDR16; 637 break; 638 default: 639 dev_warn(dev, "Bad \"address-width\" property: %u\n", 640 addrw); 641 } 642 } 643 644 err = device_property_read_u32(dev, "size", &byte_len); 645 if (err) 646 byte_len = cdata->byte_len; 647 648 if (!i2c_fn_i2c && !i2c_fn_block) 649 page_size = 1; 650 651 if (!page_size) { 652 dev_err(dev, "page_size must not be 0!\n"); 653 return -EINVAL; 654 } 655 656 if (!is_power_of_2(page_size)) 657 dev_warn(dev, "page_size looks suspicious (no power of 2)!\n"); 658 659 err = device_property_read_u32(dev, "num-addresses", &num_addresses); 660 if (err) { 661 if (flags & AT24_FLAG_TAKE8ADDR) 662 num_addresses = 8; 663 else 664 num_addresses = DIV_ROUND_UP(byte_len, 665 (flags & AT24_FLAG_ADDR16) ? 65536 : 256); 666 } 667 668 if ((flags & AT24_FLAG_SERIAL) && (flags & AT24_FLAG_MAC)) { 669 dev_err(dev, 670 "invalid device data - cannot have both AT24_FLAG_SERIAL & AT24_FLAG_MAC."); 671 return -EINVAL; 672 } 673 674 regmap_config.val_bits = 8; 675 regmap_config.reg_bits = (flags & AT24_FLAG_ADDR16) ? 16 : 8; 676 regmap_config.disable_locking = true; 677 678 regmap = devm_regmap_init_i2c(client, ®map_config); 679 if (IS_ERR(regmap)) 680 return PTR_ERR(regmap); 681 682 at24 = devm_kzalloc(dev, struct_size(at24, client, num_addresses), 683 GFP_KERNEL); 684 if (!at24) 685 return -ENOMEM; 686 687 mutex_init(&at24->lock); 688 at24->byte_len = byte_len; 689 at24->page_size = page_size; 690 at24->flags = flags; 691 at24->read_post = cdata->read_post; 692 at24->num_addresses = num_addresses; 693 at24->offset_adj = at24_get_offset_adj(flags, byte_len); 694 at24->client[0].client = client; 695 at24->client[0].regmap = regmap; 696 697 at24->vcc_reg = devm_regulator_get(dev, "vcc"); 698 if (IS_ERR(at24->vcc_reg)) 699 return PTR_ERR(at24->vcc_reg); 700 701 writable = !(flags & AT24_FLAG_READONLY); 702 if (writable) { 703 at24->write_max = min_t(unsigned int, 704 page_size, at24_io_limit); 705 if (!i2c_fn_i2c && at24->write_max > I2C_SMBUS_BLOCK_MAX) 706 at24->write_max = I2C_SMBUS_BLOCK_MAX; 707 } 708 709 /* use dummy devices for multiple-address chips */ 710 for (i = 1; i < num_addresses; i++) { 711 err = at24_make_dummy_client(at24, i, ®map_config); 712 if (err) 713 return err; 714 } 715 716 /* 717 * We initialize nvmem_config.id to NVMEM_DEVID_AUTO even if the 718 * label property is set as some platform can have multiple eeproms 719 * with same label and we can not register each of those with same 720 * label. Failing to register those eeproms trigger cascade failure 721 * on such platform. 722 */ 723 nvmem_config.id = NVMEM_DEVID_AUTO; 724 725 if (device_property_present(dev, "label")) { 726 err = device_property_read_string(dev, "label", 727 &nvmem_config.name); 728 if (err) 729 return err; 730 } else { 731 nvmem_config.name = dev_name(dev); 732 } 733 734 nvmem_config.type = NVMEM_TYPE_EEPROM; 735 nvmem_config.dev = dev; 736 nvmem_config.read_only = !writable; 737 nvmem_config.root_only = !(flags & AT24_FLAG_IRUGO); 738 nvmem_config.owner = THIS_MODULE; 739 nvmem_config.compat = true; 740 nvmem_config.base_dev = dev; 741 nvmem_config.reg_read = at24_read; 742 nvmem_config.reg_write = at24_write; 743 nvmem_config.priv = at24; 744 nvmem_config.stride = 1; 745 nvmem_config.word_size = 1; 746 nvmem_config.size = byte_len; 747 748 i2c_set_clientdata(client, at24); 749 750 err = regulator_enable(at24->vcc_reg); 751 if (err) { 752 dev_err(dev, "Failed to enable vcc regulator\n"); 753 return err; 754 } 755 756 /* enable runtime pm */ 757 pm_runtime_set_active(dev); 758 pm_runtime_enable(dev); 759 760 at24->nvmem = devm_nvmem_register(dev, &nvmem_config); 761 if (IS_ERR(at24->nvmem)) { 762 pm_runtime_disable(dev); 763 if (!pm_runtime_status_suspended(dev)) 764 regulator_disable(at24->vcc_reg); 765 return PTR_ERR(at24->nvmem); 766 } 767 768 /* 769 * Perform a one-byte test read to verify that the 770 * chip is functional. 771 */ 772 err = at24_read(at24, 0, &test_byte, 1); 773 if (err) { 774 pm_runtime_disable(dev); 775 if (!pm_runtime_status_suspended(dev)) 776 regulator_disable(at24->vcc_reg); 777 return -ENODEV; 778 } 779 780 pm_runtime_idle(dev); 781 782 if (writable) 783 dev_info(dev, "%u byte %s EEPROM, writable, %u bytes/write\n", 784 byte_len, client->name, at24->write_max); 785 else 786 dev_info(dev, "%u byte %s EEPROM, read-only\n", 787 byte_len, client->name); 788 789 return 0; 790 } 791 792 static int at24_remove(struct i2c_client *client) 793 { 794 struct at24_data *at24 = i2c_get_clientdata(client); 795 796 pm_runtime_disable(&client->dev); 797 if (!pm_runtime_status_suspended(&client->dev)) 798 regulator_disable(at24->vcc_reg); 799 pm_runtime_set_suspended(&client->dev); 800 801 return 0; 802 } 803 804 static int __maybe_unused at24_suspend(struct device *dev) 805 { 806 struct i2c_client *client = to_i2c_client(dev); 807 struct at24_data *at24 = i2c_get_clientdata(client); 808 809 return regulator_disable(at24->vcc_reg); 810 } 811 812 static int __maybe_unused at24_resume(struct device *dev) 813 { 814 struct i2c_client *client = to_i2c_client(dev); 815 struct at24_data *at24 = i2c_get_clientdata(client); 816 817 return regulator_enable(at24->vcc_reg); 818 } 819 820 static const struct dev_pm_ops at24_pm_ops = { 821 SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, 822 pm_runtime_force_resume) 823 SET_RUNTIME_PM_OPS(at24_suspend, at24_resume, NULL) 824 }; 825 826 static struct i2c_driver at24_driver = { 827 .driver = { 828 .name = "at24", 829 .pm = &at24_pm_ops, 830 .of_match_table = at24_of_match, 831 .acpi_match_table = ACPI_PTR(at24_acpi_ids), 832 }, 833 .probe_new = at24_probe, 834 .remove = at24_remove, 835 .id_table = at24_ids, 836 }; 837 838 static int __init at24_init(void) 839 { 840 if (!at24_io_limit) { 841 pr_err("at24: at24_io_limit must not be 0!\n"); 842 return -EINVAL; 843 } 844 845 at24_io_limit = rounddown_pow_of_two(at24_io_limit); 846 return i2c_add_driver(&at24_driver); 847 } 848 module_init(at24_init); 849 850 static void __exit at24_exit(void) 851 { 852 i2c_del_driver(&at24_driver); 853 } 854 module_exit(at24_exit); 855 856 MODULE_DESCRIPTION("Driver for most I2C EEPROMs"); 857 MODULE_AUTHOR("David Brownell and Wolfram Sang"); 858 MODULE_LICENSE("GPL"); 859