xref: /openbmc/linux/drivers/misc/cxl/main.c (revision 2359ccdd)
1 /*
2  * Copyright 2014 IBM Corp.
3  *
4  * This program is free software; you can redistribute it and/or
5  * modify it under the terms of the GNU General Public License
6  * as published by the Free Software Foundation; either version
7  * 2 of the License, or (at your option) any later version.
8  */
9 
10 #include <linux/spinlock.h>
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <linux/device.h>
14 #include <linux/mutex.h>
15 #include <linux/init.h>
16 #include <linux/list.h>
17 #include <linux/mm.h>
18 #include <linux/of.h>
19 #include <linux/slab.h>
20 #include <linux/idr.h>
21 #include <linux/pci.h>
22 #include <linux/sched/task.h>
23 
24 #include <asm/cputable.h>
25 #include <misc/cxl-base.h>
26 
27 #include "cxl.h"
28 #include "trace.h"
29 
30 static DEFINE_SPINLOCK(adapter_idr_lock);
31 static DEFINE_IDR(cxl_adapter_idr);
32 
33 uint cxl_verbose;
34 module_param_named(verbose, cxl_verbose, uint, 0600);
35 MODULE_PARM_DESC(verbose, "Enable verbose dmesg output");
36 
37 const struct cxl_backend_ops *cxl_ops;
38 
39 int cxl_afu_slbia(struct cxl_afu *afu)
40 {
41 	unsigned long timeout = jiffies + (HZ * CXL_TIMEOUT);
42 
43 	pr_devel("cxl_afu_slbia issuing SLBIA command\n");
44 	cxl_p2n_write(afu, CXL_SLBIA_An, CXL_TLB_SLB_IQ_ALL);
45 	while (cxl_p2n_read(afu, CXL_SLBIA_An) & CXL_TLB_SLB_P) {
46 		if (time_after_eq(jiffies, timeout)) {
47 			dev_warn(&afu->dev, "WARNING: CXL AFU SLBIA timed out!\n");
48 			return -EBUSY;
49 		}
50 		/* If the adapter has gone down, we can assume that we
51 		 * will PERST it and that will invalidate everything.
52 		 */
53 		if (!cxl_ops->link_ok(afu->adapter, afu))
54 			return -EIO;
55 		cpu_relax();
56 	}
57 	return 0;
58 }
59 
60 static inline void _cxl_slbia(struct cxl_context *ctx, struct mm_struct *mm)
61 {
62 	unsigned long flags;
63 
64 	if (ctx->mm != mm)
65 		return;
66 
67 	pr_devel("%s matched mm - card: %i afu: %i pe: %i\n", __func__,
68 		 ctx->afu->adapter->adapter_num, ctx->afu->slice, ctx->pe);
69 
70 	spin_lock_irqsave(&ctx->sste_lock, flags);
71 	trace_cxl_slbia(ctx);
72 	memset(ctx->sstp, 0, ctx->sst_size);
73 	spin_unlock_irqrestore(&ctx->sste_lock, flags);
74 	mb();
75 	cxl_afu_slbia(ctx->afu);
76 }
77 
78 static inline void cxl_slbia_core(struct mm_struct *mm)
79 {
80 	struct cxl *adapter;
81 	struct cxl_afu *afu;
82 	struct cxl_context *ctx;
83 	int card, slice, id;
84 
85 	pr_devel("%s called\n", __func__);
86 
87 	spin_lock(&adapter_idr_lock);
88 	idr_for_each_entry(&cxl_adapter_idr, adapter, card) {
89 		/* XXX: Make this lookup faster with link from mm to ctx */
90 		spin_lock(&adapter->afu_list_lock);
91 		for (slice = 0; slice < adapter->slices; slice++) {
92 			afu = adapter->afu[slice];
93 			if (!afu || !afu->enabled)
94 				continue;
95 			rcu_read_lock();
96 			idr_for_each_entry(&afu->contexts_idr, ctx, id)
97 				_cxl_slbia(ctx, mm);
98 			rcu_read_unlock();
99 		}
100 		spin_unlock(&adapter->afu_list_lock);
101 	}
102 	spin_unlock(&adapter_idr_lock);
103 }
104 
105 static struct cxl_calls cxl_calls = {
106 	.cxl_slbia = cxl_slbia_core,
107 	.cxl_pci_associate_default_context = _cxl_pci_associate_default_context,
108 	.cxl_pci_disable_device = _cxl_pci_disable_device,
109 	.cxl_next_msi_hwirq = _cxl_next_msi_hwirq,
110 	.cxl_cx4_setup_msi_irqs = _cxl_cx4_setup_msi_irqs,
111 	.cxl_cx4_teardown_msi_irqs = _cxl_cx4_teardown_msi_irqs,
112 	.owner = THIS_MODULE,
113 };
114 
115 int cxl_alloc_sst(struct cxl_context *ctx)
116 {
117 	unsigned long vsid;
118 	u64 ea_mask, size, sstp0, sstp1;
119 
120 	sstp0 = 0;
121 	sstp1 = 0;
122 
123 	ctx->sst_size = PAGE_SIZE;
124 	ctx->sst_lru = 0;
125 	ctx->sstp = (struct cxl_sste *)get_zeroed_page(GFP_KERNEL);
126 	if (!ctx->sstp) {
127 		pr_err("cxl_alloc_sst: Unable to allocate segment table\n");
128 		return -ENOMEM;
129 	}
130 	pr_devel("SSTP allocated at 0x%p\n", ctx->sstp);
131 
132 	vsid  = get_kernel_vsid((u64)ctx->sstp, mmu_kernel_ssize) << 12;
133 
134 	sstp0 |= (u64)mmu_kernel_ssize << CXL_SSTP0_An_B_SHIFT;
135 	sstp0 |= (SLB_VSID_KERNEL | mmu_psize_defs[mmu_linear_psize].sllp) << 50;
136 
137 	size = (((u64)ctx->sst_size >> 8) - 1) << CXL_SSTP0_An_SegTableSize_SHIFT;
138 	if (unlikely(size & ~CXL_SSTP0_An_SegTableSize_MASK)) {
139 		WARN(1, "Impossible segment table size\n");
140 		return -EINVAL;
141 	}
142 	sstp0 |= size;
143 
144 	if (mmu_kernel_ssize == MMU_SEGSIZE_256M)
145 		ea_mask = 0xfffff00ULL;
146 	else
147 		ea_mask = 0xffffffff00ULL;
148 
149 	sstp0 |=  vsid >>     (50-14);  /*   Top 14 bits of VSID */
150 	sstp1 |= (vsid << (64-(50-14))) & ~ea_mask;
151 	sstp1 |= (u64)ctx->sstp & ea_mask;
152 	sstp1 |= CXL_SSTP1_An_V;
153 
154 	pr_devel("Looked up %#llx: slbfee. %#llx (ssize: %x, vsid: %#lx), copied to SSTP0: %#llx, SSTP1: %#llx\n",
155 			(u64)ctx->sstp, (u64)ctx->sstp & ESID_MASK, mmu_kernel_ssize, vsid, sstp0, sstp1);
156 
157 	/* Store calculated sstp hardware points for use later */
158 	ctx->sstp0 = sstp0;
159 	ctx->sstp1 = sstp1;
160 
161 	return 0;
162 }
163 
164 /* print buffer content as integers when debugging */
165 void cxl_dump_debug_buffer(void *buf, size_t buf_len)
166 {
167 #ifdef DEBUG
168 	int i, *ptr;
169 
170 	/*
171 	 * We want to regroup up to 4 integers per line, which means they
172 	 * need to be in the same pr_devel() statement
173 	 */
174 	ptr = (int *) buf;
175 	for (i = 0; i * 4 < buf_len; i += 4) {
176 		if ((i + 3) * 4 < buf_len)
177 			pr_devel("%.8x %.8x %.8x %.8x\n", ptr[i], ptr[i + 1],
178 				ptr[i + 2], ptr[i + 3]);
179 		else if ((i + 2) * 4 < buf_len)
180 			pr_devel("%.8x %.8x %.8x\n", ptr[i], ptr[i + 1],
181 				ptr[i + 2]);
182 		else if ((i + 1) * 4 < buf_len)
183 			pr_devel("%.8x %.8x\n", ptr[i], ptr[i + 1]);
184 		else
185 			pr_devel("%.8x\n", ptr[i]);
186 	}
187 #endif /* DEBUG */
188 }
189 
190 /* Find a CXL adapter by it's number and increase it's refcount */
191 struct cxl *get_cxl_adapter(int num)
192 {
193 	struct cxl *adapter;
194 
195 	spin_lock(&adapter_idr_lock);
196 	if ((adapter = idr_find(&cxl_adapter_idr, num)))
197 		get_device(&adapter->dev);
198 	spin_unlock(&adapter_idr_lock);
199 
200 	return adapter;
201 }
202 
203 static int cxl_alloc_adapter_nr(struct cxl *adapter)
204 {
205 	int i;
206 
207 	idr_preload(GFP_KERNEL);
208 	spin_lock(&adapter_idr_lock);
209 	i = idr_alloc(&cxl_adapter_idr, adapter, 0, 0, GFP_NOWAIT);
210 	spin_unlock(&adapter_idr_lock);
211 	idr_preload_end();
212 	if (i < 0)
213 		return i;
214 
215 	adapter->adapter_num = i;
216 
217 	return 0;
218 }
219 
220 void cxl_remove_adapter_nr(struct cxl *adapter)
221 {
222 	idr_remove(&cxl_adapter_idr, adapter->adapter_num);
223 }
224 
225 struct cxl *cxl_alloc_adapter(void)
226 {
227 	struct cxl *adapter;
228 
229 	if (!(adapter = kzalloc(sizeof(struct cxl), GFP_KERNEL)))
230 		return NULL;
231 
232 	spin_lock_init(&adapter->afu_list_lock);
233 
234 	if (cxl_alloc_adapter_nr(adapter))
235 		goto err1;
236 
237 	if (dev_set_name(&adapter->dev, "card%i", adapter->adapter_num))
238 		goto err2;
239 
240 	/* start with context lock taken */
241 	atomic_set(&adapter->contexts_num, -1);
242 
243 	return adapter;
244 err2:
245 	cxl_remove_adapter_nr(adapter);
246 err1:
247 	kfree(adapter);
248 	return NULL;
249 }
250 
251 struct cxl_afu *cxl_alloc_afu(struct cxl *adapter, int slice)
252 {
253 	struct cxl_afu *afu;
254 
255 	if (!(afu = kzalloc(sizeof(struct cxl_afu), GFP_KERNEL)))
256 		return NULL;
257 
258 	afu->adapter = adapter;
259 	afu->dev.parent = &adapter->dev;
260 	afu->dev.release = cxl_ops->release_afu;
261 	afu->slice = slice;
262 	idr_init(&afu->contexts_idr);
263 	mutex_init(&afu->contexts_lock);
264 	spin_lock_init(&afu->afu_cntl_lock);
265 	atomic_set(&afu->configured_state, -1);
266 	afu->prefault_mode = CXL_PREFAULT_NONE;
267 	afu->irqs_max = afu->adapter->user_irqs;
268 
269 	return afu;
270 }
271 
272 int cxl_afu_select_best_mode(struct cxl_afu *afu)
273 {
274 	if (afu->modes_supported & CXL_MODE_DIRECTED)
275 		return cxl_ops->afu_activate_mode(afu, CXL_MODE_DIRECTED);
276 
277 	if (afu->modes_supported & CXL_MODE_DEDICATED)
278 		return cxl_ops->afu_activate_mode(afu, CXL_MODE_DEDICATED);
279 
280 	dev_warn(&afu->dev, "No supported programming modes available\n");
281 	/* We don't fail this so the user can inspect sysfs */
282 	return 0;
283 }
284 
285 int cxl_adapter_context_get(struct cxl *adapter)
286 {
287 	int rc;
288 
289 	rc = atomic_inc_unless_negative(&adapter->contexts_num);
290 	return rc >= 0 ? 0 : -EBUSY;
291 }
292 
293 void cxl_adapter_context_put(struct cxl *adapter)
294 {
295 	atomic_dec_if_positive(&adapter->contexts_num);
296 }
297 
298 int cxl_adapter_context_lock(struct cxl *adapter)
299 {
300 	int rc;
301 	/* no active contexts -> contexts_num == 0 */
302 	rc = atomic_cmpxchg(&adapter->contexts_num, 0, -1);
303 	return rc ? -EBUSY : 0;
304 }
305 
306 void cxl_adapter_context_unlock(struct cxl *adapter)
307 {
308 	int val = atomic_cmpxchg(&adapter->contexts_num, -1, 0);
309 
310 	/*
311 	 * contexts lock taken -> contexts_num == -1
312 	 * If not true then show a warning and force reset the lock.
313 	 * This will happen when context_unlock was requested without
314 	 * doing a context_lock.
315 	 */
316 	if (val != -1) {
317 		atomic_set(&adapter->contexts_num, 0);
318 		WARN(1, "Adapter context unlocked with %d active contexts",
319 		     val);
320 	}
321 }
322 
323 static int __init init_cxl(void)
324 {
325 	int rc = 0;
326 
327 	if ((rc = cxl_file_init()))
328 		return rc;
329 
330 	cxl_debugfs_init();
331 
332 	/*
333 	 * we don't register the callback on P9. slb callack is only
334 	 * used for the PSL8 MMU and CX4.
335 	 */
336 	if (cxl_is_power8()) {
337 		rc = register_cxl_calls(&cxl_calls);
338 		if (rc)
339 			goto err;
340 	}
341 
342 	if (cpu_has_feature(CPU_FTR_HVMODE)) {
343 		cxl_ops = &cxl_native_ops;
344 		rc = pci_register_driver(&cxl_pci_driver);
345 	}
346 #ifdef CONFIG_PPC_PSERIES
347 	else {
348 		cxl_ops = &cxl_guest_ops;
349 		rc = platform_driver_register(&cxl_of_driver);
350 	}
351 #endif
352 	if (rc)
353 		goto err1;
354 
355 	return 0;
356 err1:
357 	if (cxl_is_power8())
358 		unregister_cxl_calls(&cxl_calls);
359 err:
360 	cxl_debugfs_exit();
361 	cxl_file_exit();
362 
363 	return rc;
364 }
365 
366 static void exit_cxl(void)
367 {
368 	if (cpu_has_feature(CPU_FTR_HVMODE))
369 		pci_unregister_driver(&cxl_pci_driver);
370 #ifdef CONFIG_PPC_PSERIES
371 	else
372 		platform_driver_unregister(&cxl_of_driver);
373 #endif
374 
375 	cxl_debugfs_exit();
376 	cxl_file_exit();
377 	if (cxl_is_power8())
378 		unregister_cxl_calls(&cxl_calls);
379 	idr_destroy(&cxl_adapter_idr);
380 }
381 
382 module_init(init_cxl);
383 module_exit(exit_cxl);
384 
385 MODULE_DESCRIPTION("IBM Coherent Accelerator");
386 MODULE_AUTHOR("Ian Munsie <imunsie@au1.ibm.com>");
387 MODULE_LICENSE("GPL");
388