1ebf0bd36SAmit Kucheria /* 2ebf0bd36SAmit Kucheria * linux/drivers/i2c/chips/twl4030-power.c 3ebf0bd36SAmit Kucheria * 4ebf0bd36SAmit Kucheria * Handle TWL4030 Power initialization 5ebf0bd36SAmit Kucheria * 6ebf0bd36SAmit Kucheria * Copyright (C) 2008 Nokia Corporation 7ebf0bd36SAmit Kucheria * Copyright (C) 2006 Texas Instruments, Inc 8ebf0bd36SAmit Kucheria * 9ebf0bd36SAmit Kucheria * Written by Kalle Jokiniemi 10ebf0bd36SAmit Kucheria * Peter De Schrijver <peter.de-schrijver@nokia.com> 11ebf0bd36SAmit Kucheria * Several fixes by Amit Kucheria <amit.kucheria@verdurent.com> 12ebf0bd36SAmit Kucheria * 13ebf0bd36SAmit Kucheria * This file is subject to the terms and conditions of the GNU General 14ebf0bd36SAmit Kucheria * Public License. See the file "COPYING" in the main directory of this 15ebf0bd36SAmit Kucheria * archive for more details. 16ebf0bd36SAmit Kucheria * 17ebf0bd36SAmit Kucheria * This program is distributed in the hope that it will be useful, 18ebf0bd36SAmit Kucheria * but WITHOUT ANY WARRANTY; without even the implied warranty of 19ebf0bd36SAmit Kucheria * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 20ebf0bd36SAmit Kucheria * GNU General Public License for more details. 21ebf0bd36SAmit Kucheria * 22ebf0bd36SAmit Kucheria * You should have received a copy of the GNU General Public License 23ebf0bd36SAmit Kucheria * along with this program; if not, write to the Free Software 24ebf0bd36SAmit Kucheria * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 25ebf0bd36SAmit Kucheria */ 26ebf0bd36SAmit Kucheria 27ebf0bd36SAmit Kucheria #include <linux/module.h> 28ebf0bd36SAmit Kucheria #include <linux/pm.h> 29b07682b6SSantosh Shilimkar #include <linux/i2c/twl.h> 30ebf0bd36SAmit Kucheria #include <linux/platform_device.h> 31b0fc1da4SFlorian Vaussard #include <linux/of.h> 32e7cd1d1eSTony Lindgren #include <linux/of_device.h> 33ebf0bd36SAmit Kucheria 34ebf0bd36SAmit Kucheria #include <asm/mach-types.h> 35ebf0bd36SAmit Kucheria 36ebf0bd36SAmit Kucheria static u8 twl4030_start_script_address = 0x2b; 37ebf0bd36SAmit Kucheria 3832057281STony Lindgren /* Register bits for P1, P2 and P3_SW_EVENTS */ 3932057281STony Lindgren #define PWR_STOPON_PRWON BIT(6) 4032057281STony Lindgren #define PWR_STOPON_SYSEN BIT(5) 4132057281STony Lindgren #define PWR_ENABLE_WARMRESET BIT(4) 4232057281STony Lindgren #define PWR_LVL_WAKEUP BIT(3) 4332057281STony Lindgren #define PWR_DEVACT BIT(2) 4432057281STony Lindgren #define PWR_DEVSLP BIT(1) 4532057281STony Lindgren #define PWR_DEVOFF BIT(0) 4632057281STony Lindgren 4726cc3ab9SIgor Grinberg #define SEQ_OFFSYNC (1 << 0) 48ebf0bd36SAmit Kucheria 49ebf0bd36SAmit Kucheria #define PHY_TO_OFF_PM_MASTER(p) (p - 0x36) 50ebf0bd36SAmit Kucheria #define PHY_TO_OFF_PM_RECEIVER(p) (p - 0x5b) 51ebf0bd36SAmit Kucheria 52ebf0bd36SAmit Kucheria /* resource - hfclk */ 53ebf0bd36SAmit Kucheria #define R_HFCLKOUT_DEV_GRP PHY_TO_OFF_PM_RECEIVER(0xe6) 54ebf0bd36SAmit Kucheria 55ebf0bd36SAmit Kucheria /* PM events */ 56ebf0bd36SAmit Kucheria #define R_P1_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x46) 57ebf0bd36SAmit Kucheria #define R_P2_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x47) 58ebf0bd36SAmit Kucheria #define R_P3_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x48) 59ebf0bd36SAmit Kucheria #define R_CFG_P1_TRANSITION PHY_TO_OFF_PM_MASTER(0x36) 60ebf0bd36SAmit Kucheria #define R_CFG_P2_TRANSITION PHY_TO_OFF_PM_MASTER(0x37) 61ebf0bd36SAmit Kucheria #define R_CFG_P3_TRANSITION PHY_TO_OFF_PM_MASTER(0x38) 62ebf0bd36SAmit Kucheria 63ebf0bd36SAmit Kucheria #define END_OF_SCRIPT 0x3f 64ebf0bd36SAmit Kucheria 65ebf0bd36SAmit Kucheria #define R_SEQ_ADD_A2S PHY_TO_OFF_PM_MASTER(0x55) 66ebf0bd36SAmit Kucheria #define R_SEQ_ADD_S2A12 PHY_TO_OFF_PM_MASTER(0x56) 67ebf0bd36SAmit Kucheria #define R_SEQ_ADD_S2A3 PHY_TO_OFF_PM_MASTER(0x57) 68ebf0bd36SAmit Kucheria #define R_SEQ_ADD_WARM PHY_TO_OFF_PM_MASTER(0x58) 69ebf0bd36SAmit Kucheria #define R_MEMORY_ADDRESS PHY_TO_OFF_PM_MASTER(0x59) 70ebf0bd36SAmit Kucheria #define R_MEMORY_DATA PHY_TO_OFF_PM_MASTER(0x5a) 71ebf0bd36SAmit Kucheria 72890463f0SAmit Kucheria /* resource configuration registers 73890463f0SAmit Kucheria <RESOURCE>_DEV_GRP at address 'n+0' 74890463f0SAmit Kucheria <RESOURCE>_TYPE at address 'n+1' 75890463f0SAmit Kucheria <RESOURCE>_REMAP at address 'n+2' 76890463f0SAmit Kucheria <RESOURCE>_DEDICATED at address 'n+3' 77890463f0SAmit Kucheria */ 78e97d1546SAmit Kucheria #define DEV_GRP_OFFSET 0 79ebf0bd36SAmit Kucheria #define TYPE_OFFSET 1 80b4ead61eSAmit Kucheria #define REMAP_OFFSET 2 81b4ead61eSAmit Kucheria #define DEDICATED_OFFSET 3 82ebf0bd36SAmit Kucheria 83e97d1546SAmit Kucheria /* Bit positions in the registers */ 84890463f0SAmit Kucheria 85890463f0SAmit Kucheria /* <RESOURCE>_DEV_GRP */ 86e97d1546SAmit Kucheria #define DEV_GRP_SHIFT 5 87e97d1546SAmit Kucheria #define DEV_GRP_MASK (7 << DEV_GRP_SHIFT) 88890463f0SAmit Kucheria 89890463f0SAmit Kucheria /* <RESOURCE>_TYPE */ 90ebf0bd36SAmit Kucheria #define TYPE_SHIFT 0 91ebf0bd36SAmit Kucheria #define TYPE_MASK (7 << TYPE_SHIFT) 92ebf0bd36SAmit Kucheria #define TYPE2_SHIFT 3 93ebf0bd36SAmit Kucheria #define TYPE2_MASK (3 << TYPE2_SHIFT) 94ebf0bd36SAmit Kucheria 95b4ead61eSAmit Kucheria /* <RESOURCE>_REMAP */ 96b4ead61eSAmit Kucheria #define SLEEP_STATE_SHIFT 0 97b4ead61eSAmit Kucheria #define SLEEP_STATE_MASK (0xf << SLEEP_STATE_SHIFT) 98b4ead61eSAmit Kucheria #define OFF_STATE_SHIFT 4 99b4ead61eSAmit Kucheria #define OFF_STATE_MASK (0xf << OFF_STATE_SHIFT) 100b4ead61eSAmit Kucheria 101ebf0bd36SAmit Kucheria static u8 res_config_addrs[] = { 102ebf0bd36SAmit Kucheria [RES_VAUX1] = 0x17, 103ebf0bd36SAmit Kucheria [RES_VAUX2] = 0x1b, 104ebf0bd36SAmit Kucheria [RES_VAUX3] = 0x1f, 105ebf0bd36SAmit Kucheria [RES_VAUX4] = 0x23, 106ebf0bd36SAmit Kucheria [RES_VMMC1] = 0x27, 107ebf0bd36SAmit Kucheria [RES_VMMC2] = 0x2b, 108ebf0bd36SAmit Kucheria [RES_VPLL1] = 0x2f, 109ebf0bd36SAmit Kucheria [RES_VPLL2] = 0x33, 110ebf0bd36SAmit Kucheria [RES_VSIM] = 0x37, 111ebf0bd36SAmit Kucheria [RES_VDAC] = 0x3b, 112ebf0bd36SAmit Kucheria [RES_VINTANA1] = 0x3f, 113ebf0bd36SAmit Kucheria [RES_VINTANA2] = 0x43, 114ebf0bd36SAmit Kucheria [RES_VINTDIG] = 0x47, 115ebf0bd36SAmit Kucheria [RES_VIO] = 0x4b, 116ebf0bd36SAmit Kucheria [RES_VDD1] = 0x55, 117ebf0bd36SAmit Kucheria [RES_VDD2] = 0x63, 118ebf0bd36SAmit Kucheria [RES_VUSB_1V5] = 0x71, 119ebf0bd36SAmit Kucheria [RES_VUSB_1V8] = 0x74, 120ebf0bd36SAmit Kucheria [RES_VUSB_3V1] = 0x77, 121ebf0bd36SAmit Kucheria [RES_VUSBCP] = 0x7a, 122ebf0bd36SAmit Kucheria [RES_REGEN] = 0x7f, 123ebf0bd36SAmit Kucheria [RES_NRES_PWRON] = 0x82, 124ebf0bd36SAmit Kucheria [RES_CLKEN] = 0x85, 125ebf0bd36SAmit Kucheria [RES_SYSEN] = 0x88, 126ebf0bd36SAmit Kucheria [RES_HFCLKOUT] = 0x8b, 127ebf0bd36SAmit Kucheria [RES_32KCLKOUT] = 0x8e, 128ebf0bd36SAmit Kucheria [RES_RESET] = 0x91, 129d7ac829fSLesly A M [RES_MAIN_REF] = 0x94, 130ebf0bd36SAmit Kucheria }; 131ebf0bd36SAmit Kucheria 132e7cd1d1eSTony Lindgren /* 133e7cd1d1eSTony Lindgren * Usable values for .remap_sleep and .remap_off 134e7cd1d1eSTony Lindgren * Based on table "5.3.3 Resource Operating modes" 135e7cd1d1eSTony Lindgren */ 136e7cd1d1eSTony Lindgren enum { 137e7cd1d1eSTony Lindgren TWL_REMAP_OFF = 0, 138e7cd1d1eSTony Lindgren TWL_REMAP_SLEEP = 8, 139e7cd1d1eSTony Lindgren TWL_REMAP_ACTIVE = 9, 140e7cd1d1eSTony Lindgren }; 141e7cd1d1eSTony Lindgren 142e7cd1d1eSTony Lindgren /* 143e7cd1d1eSTony Lindgren * Macros to configure the PM register states for various resources. 144e7cd1d1eSTony Lindgren * Note that we can make MSG_SINGULAR etc private to this driver once 145e7cd1d1eSTony Lindgren * omap3 has been made DT only. 146e7cd1d1eSTony Lindgren */ 147e7cd1d1eSTony Lindgren #define TWL_DFLT_DELAY 2 /* typically 2 32 KiHz cycles */ 148e7cd1d1eSTony Lindgren #define TWL_RESOURCE_SET(res, state) \ 149e7cd1d1eSTony Lindgren { MSG_SINGULAR(DEV_GRP_NULL, (res), (state)), TWL_DFLT_DELAY } 150e7cd1d1eSTony Lindgren #define TWL_RESOURCE_ON(res) TWL_RESOURCE_SET(res, RES_STATE_ACTIVE) 151e7cd1d1eSTony Lindgren #define TWL_RESOURCE_OFF(res) TWL_RESOURCE_SET(res, RES_STATE_OFF) 152e7cd1d1eSTony Lindgren #define TWL_RESOURCE_RESET(res) TWL_RESOURCE_SET(res, RES_STATE_WRST) 153e7cd1d1eSTony Lindgren /* 154e7cd1d1eSTony Lindgren * It seems that type1 and type2 is just the resource init order 155e7cd1d1eSTony Lindgren * number for the type1 and type2 group. 156e7cd1d1eSTony Lindgren */ 157e7cd1d1eSTony Lindgren #define TWL_RESOURCE_GROUP_RESET(group, type1, type2) \ 158e7cd1d1eSTony Lindgren { MSG_BROADCAST(DEV_GRP_NULL, (group), (type1), (type2), \ 159e7cd1d1eSTony Lindgren RES_STATE_WRST), TWL_DFLT_DELAY } 160e7cd1d1eSTony Lindgren #define TWL_REMAP_SLEEP(res, devgrp, typ, typ2) \ 161e7cd1d1eSTony Lindgren { .resource = (res), .devgroup = (devgrp), \ 162e7cd1d1eSTony Lindgren .type = (typ), .type2 = (typ2), \ 163e7cd1d1eSTony Lindgren .remap_off = TWL_REMAP_OFF, \ 164e7cd1d1eSTony Lindgren .remap_sleep = TWL_REMAP_SLEEP, } 165e7cd1d1eSTony Lindgren 166f791be49SBill Pemberton static int twl4030_write_script_byte(u8 address, u8 byte) 167ebf0bd36SAmit Kucheria { 168ebf0bd36SAmit Kucheria int err; 169ebf0bd36SAmit Kucheria 1704850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, address, R_MEMORY_ADDRESS); 171ebf0bd36SAmit Kucheria if (err) 172ebf0bd36SAmit Kucheria goto out; 1734850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, byte, R_MEMORY_DATA); 174ebf0bd36SAmit Kucheria out: 175ebf0bd36SAmit Kucheria return err; 176ebf0bd36SAmit Kucheria } 177ebf0bd36SAmit Kucheria 178f791be49SBill Pemberton static int twl4030_write_script_ins(u8 address, u16 pmb_message, 179ebf0bd36SAmit Kucheria u8 delay, u8 next) 180ebf0bd36SAmit Kucheria { 181ebf0bd36SAmit Kucheria int err; 182ebf0bd36SAmit Kucheria 183ebf0bd36SAmit Kucheria address *= 4; 184ebf0bd36SAmit Kucheria err = twl4030_write_script_byte(address++, pmb_message >> 8); 185ebf0bd36SAmit Kucheria if (err) 186ebf0bd36SAmit Kucheria goto out; 187ebf0bd36SAmit Kucheria err = twl4030_write_script_byte(address++, pmb_message & 0xff); 188ebf0bd36SAmit Kucheria if (err) 189ebf0bd36SAmit Kucheria goto out; 190ebf0bd36SAmit Kucheria err = twl4030_write_script_byte(address++, delay); 191ebf0bd36SAmit Kucheria if (err) 192ebf0bd36SAmit Kucheria goto out; 193ebf0bd36SAmit Kucheria err = twl4030_write_script_byte(address++, next); 194ebf0bd36SAmit Kucheria out: 195ebf0bd36SAmit Kucheria return err; 196ebf0bd36SAmit Kucheria } 197ebf0bd36SAmit Kucheria 198f791be49SBill Pemberton static int twl4030_write_script(u8 address, struct twl4030_ins *script, 199ebf0bd36SAmit Kucheria int len) 200ebf0bd36SAmit Kucheria { 201f65e9eacSArnd Bergmann int err = -EINVAL; 202ebf0bd36SAmit Kucheria 203ebf0bd36SAmit Kucheria for (; len; len--, address++, script++) { 204ebf0bd36SAmit Kucheria if (len == 1) { 205ebf0bd36SAmit Kucheria err = twl4030_write_script_ins(address, 206ebf0bd36SAmit Kucheria script->pmb_message, 207ebf0bd36SAmit Kucheria script->delay, 208ebf0bd36SAmit Kucheria END_OF_SCRIPT); 209ebf0bd36SAmit Kucheria if (err) 210ebf0bd36SAmit Kucheria break; 211ebf0bd36SAmit Kucheria } else { 212ebf0bd36SAmit Kucheria err = twl4030_write_script_ins(address, 213ebf0bd36SAmit Kucheria script->pmb_message, 214ebf0bd36SAmit Kucheria script->delay, 215ebf0bd36SAmit Kucheria address + 1); 216ebf0bd36SAmit Kucheria if (err) 217ebf0bd36SAmit Kucheria break; 218ebf0bd36SAmit Kucheria } 219ebf0bd36SAmit Kucheria } 220ebf0bd36SAmit Kucheria return err; 221ebf0bd36SAmit Kucheria } 222ebf0bd36SAmit Kucheria 223f791be49SBill Pemberton static int twl4030_config_wakeup3_sequence(u8 address) 224ebf0bd36SAmit Kucheria { 225ebf0bd36SAmit Kucheria int err; 226ebf0bd36SAmit Kucheria u8 data; 227ebf0bd36SAmit Kucheria 228ebf0bd36SAmit Kucheria /* Set SLEEP to ACTIVE SEQ address for P3 */ 2294850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, address, R_SEQ_ADD_S2A3); 230ebf0bd36SAmit Kucheria if (err) 231ebf0bd36SAmit Kucheria goto out; 232ebf0bd36SAmit Kucheria 233ebf0bd36SAmit Kucheria /* P3 LVL_WAKEUP should be on LEVEL */ 2344850f124SPeter Ujfalusi err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &data, R_P3_SW_EVENTS); 235ebf0bd36SAmit Kucheria if (err) 236ebf0bd36SAmit Kucheria goto out; 23732057281STony Lindgren data |= PWR_LVL_WAKEUP; 2384850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, data, R_P3_SW_EVENTS); 239ebf0bd36SAmit Kucheria out: 240ebf0bd36SAmit Kucheria if (err) 241ebf0bd36SAmit Kucheria pr_err("TWL4030 wakeup sequence for P3 config error\n"); 242ebf0bd36SAmit Kucheria return err; 243ebf0bd36SAmit Kucheria } 244ebf0bd36SAmit Kucheria 245f791be49SBill Pemberton static int twl4030_config_wakeup12_sequence(u8 address) 246ebf0bd36SAmit Kucheria { 247ebf0bd36SAmit Kucheria int err = 0; 248ebf0bd36SAmit Kucheria u8 data; 249ebf0bd36SAmit Kucheria 250ebf0bd36SAmit Kucheria /* Set SLEEP to ACTIVE SEQ address for P1 and P2 */ 2514850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, address, R_SEQ_ADD_S2A12); 252ebf0bd36SAmit Kucheria if (err) 253ebf0bd36SAmit Kucheria goto out; 254ebf0bd36SAmit Kucheria 255ebf0bd36SAmit Kucheria /* P1/P2 LVL_WAKEUP should be on LEVEL */ 2564850f124SPeter Ujfalusi err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &data, R_P1_SW_EVENTS); 257ebf0bd36SAmit Kucheria if (err) 258ebf0bd36SAmit Kucheria goto out; 259ebf0bd36SAmit Kucheria 26032057281STony Lindgren data |= PWR_LVL_WAKEUP; 2614850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, data, R_P1_SW_EVENTS); 262ebf0bd36SAmit Kucheria if (err) 263ebf0bd36SAmit Kucheria goto out; 264ebf0bd36SAmit Kucheria 2654850f124SPeter Ujfalusi err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &data, R_P2_SW_EVENTS); 266ebf0bd36SAmit Kucheria if (err) 267ebf0bd36SAmit Kucheria goto out; 268ebf0bd36SAmit Kucheria 26932057281STony Lindgren data |= PWR_LVL_WAKEUP; 2704850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, data, R_P2_SW_EVENTS); 271ebf0bd36SAmit Kucheria if (err) 272ebf0bd36SAmit Kucheria goto out; 273ebf0bd36SAmit Kucheria 274ebf0bd36SAmit Kucheria if (machine_is_omap_3430sdp() || machine_is_omap_ldp()) { 275ebf0bd36SAmit Kucheria /* Disabling AC charger effect on sleep-active transitions */ 2764850f124SPeter Ujfalusi err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &data, 277ebf0bd36SAmit Kucheria R_CFG_P1_TRANSITION); 278ebf0bd36SAmit Kucheria if (err) 279ebf0bd36SAmit Kucheria goto out; 280ebf0bd36SAmit Kucheria data &= ~(1<<1); 2814850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, data, 282ebf0bd36SAmit Kucheria R_CFG_P1_TRANSITION); 283ebf0bd36SAmit Kucheria if (err) 284ebf0bd36SAmit Kucheria goto out; 285ebf0bd36SAmit Kucheria } 286ebf0bd36SAmit Kucheria 287ebf0bd36SAmit Kucheria out: 288ebf0bd36SAmit Kucheria if (err) 289ebf0bd36SAmit Kucheria pr_err("TWL4030 wakeup sequence for P1 and P2" \ 290ebf0bd36SAmit Kucheria "config error\n"); 291ebf0bd36SAmit Kucheria return err; 292ebf0bd36SAmit Kucheria } 293ebf0bd36SAmit Kucheria 294f791be49SBill Pemberton static int twl4030_config_sleep_sequence(u8 address) 295ebf0bd36SAmit Kucheria { 296ebf0bd36SAmit Kucheria int err; 297ebf0bd36SAmit Kucheria 298ebf0bd36SAmit Kucheria /* Set ACTIVE to SLEEP SEQ address in T2 memory*/ 2994850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, address, R_SEQ_ADD_A2S); 300ebf0bd36SAmit Kucheria 301ebf0bd36SAmit Kucheria if (err) 302ebf0bd36SAmit Kucheria pr_err("TWL4030 sleep sequence config error\n"); 303ebf0bd36SAmit Kucheria 304ebf0bd36SAmit Kucheria return err; 305ebf0bd36SAmit Kucheria } 306ebf0bd36SAmit Kucheria 307f791be49SBill Pemberton static int twl4030_config_warmreset_sequence(u8 address) 308ebf0bd36SAmit Kucheria { 309ebf0bd36SAmit Kucheria int err; 310ebf0bd36SAmit Kucheria u8 rd_data; 311ebf0bd36SAmit Kucheria 312ebf0bd36SAmit Kucheria /* Set WARM RESET SEQ address for P1 */ 3134850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, address, R_SEQ_ADD_WARM); 314ebf0bd36SAmit Kucheria if (err) 315ebf0bd36SAmit Kucheria goto out; 316ebf0bd36SAmit Kucheria 317ebf0bd36SAmit Kucheria /* P1/P2/P3 enable WARMRESET */ 3184850f124SPeter Ujfalusi err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &rd_data, R_P1_SW_EVENTS); 319ebf0bd36SAmit Kucheria if (err) 320ebf0bd36SAmit Kucheria goto out; 321ebf0bd36SAmit Kucheria 32232057281STony Lindgren rd_data |= PWR_ENABLE_WARMRESET; 3234850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, rd_data, R_P1_SW_EVENTS); 324ebf0bd36SAmit Kucheria if (err) 325ebf0bd36SAmit Kucheria goto out; 326ebf0bd36SAmit Kucheria 3274850f124SPeter Ujfalusi err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &rd_data, R_P2_SW_EVENTS); 328ebf0bd36SAmit Kucheria if (err) 329ebf0bd36SAmit Kucheria goto out; 330ebf0bd36SAmit Kucheria 33132057281STony Lindgren rd_data |= PWR_ENABLE_WARMRESET; 3324850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, rd_data, R_P2_SW_EVENTS); 333ebf0bd36SAmit Kucheria if (err) 334ebf0bd36SAmit Kucheria goto out; 335ebf0bd36SAmit Kucheria 3364850f124SPeter Ujfalusi err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &rd_data, R_P3_SW_EVENTS); 337ebf0bd36SAmit Kucheria if (err) 338ebf0bd36SAmit Kucheria goto out; 339ebf0bd36SAmit Kucheria 34032057281STony Lindgren rd_data |= PWR_ENABLE_WARMRESET; 3414850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, rd_data, R_P3_SW_EVENTS); 342ebf0bd36SAmit Kucheria out: 343ebf0bd36SAmit Kucheria if (err) 344ebf0bd36SAmit Kucheria pr_err("TWL4030 warmreset seq config error\n"); 345ebf0bd36SAmit Kucheria return err; 346ebf0bd36SAmit Kucheria } 347ebf0bd36SAmit Kucheria 348f791be49SBill Pemberton static int twl4030_configure_resource(struct twl4030_resconfig *rconfig) 349ebf0bd36SAmit Kucheria { 350ebf0bd36SAmit Kucheria int rconfig_addr; 351ebf0bd36SAmit Kucheria int err; 352ebf0bd36SAmit Kucheria u8 type; 353ebf0bd36SAmit Kucheria u8 grp; 354b4ead61eSAmit Kucheria u8 remap; 355ebf0bd36SAmit Kucheria 356ebf0bd36SAmit Kucheria if (rconfig->resource > TOTAL_RESOURCES) { 357ebf0bd36SAmit Kucheria pr_err("TWL4030 Resource %d does not exist\n", 358ebf0bd36SAmit Kucheria rconfig->resource); 359ebf0bd36SAmit Kucheria return -EINVAL; 360ebf0bd36SAmit Kucheria } 361ebf0bd36SAmit Kucheria 362ebf0bd36SAmit Kucheria rconfig_addr = res_config_addrs[rconfig->resource]; 363ebf0bd36SAmit Kucheria 364ebf0bd36SAmit Kucheria /* Set resource group */ 3654850f124SPeter Ujfalusi err = twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &grp, 366e97d1546SAmit Kucheria rconfig_addr + DEV_GRP_OFFSET); 367ebf0bd36SAmit Kucheria if (err) { 368ebf0bd36SAmit Kucheria pr_err("TWL4030 Resource %d group could not be read\n", 369ebf0bd36SAmit Kucheria rconfig->resource); 370ebf0bd36SAmit Kucheria return err; 371ebf0bd36SAmit Kucheria } 372ebf0bd36SAmit Kucheria 37356baa667SAaro Koskinen if (rconfig->devgroup != TWL4030_RESCONFIG_UNDEF) { 374e97d1546SAmit Kucheria grp &= ~DEV_GRP_MASK; 375e97d1546SAmit Kucheria grp |= rconfig->devgroup << DEV_GRP_SHIFT; 3764850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 377e97d1546SAmit Kucheria grp, rconfig_addr + DEV_GRP_OFFSET); 378ebf0bd36SAmit Kucheria if (err < 0) { 379ebf0bd36SAmit Kucheria pr_err("TWL4030 failed to program devgroup\n"); 380ebf0bd36SAmit Kucheria return err; 381ebf0bd36SAmit Kucheria } 382ebf0bd36SAmit Kucheria } 383ebf0bd36SAmit Kucheria 384ebf0bd36SAmit Kucheria /* Set resource types */ 3854850f124SPeter Ujfalusi err = twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &type, 386ebf0bd36SAmit Kucheria rconfig_addr + TYPE_OFFSET); 387ebf0bd36SAmit Kucheria if (err < 0) { 388ebf0bd36SAmit Kucheria pr_err("TWL4030 Resource %d type could not be read\n", 389ebf0bd36SAmit Kucheria rconfig->resource); 390ebf0bd36SAmit Kucheria return err; 391ebf0bd36SAmit Kucheria } 392ebf0bd36SAmit Kucheria 39356baa667SAaro Koskinen if (rconfig->type != TWL4030_RESCONFIG_UNDEF) { 394ebf0bd36SAmit Kucheria type &= ~TYPE_MASK; 395ebf0bd36SAmit Kucheria type |= rconfig->type << TYPE_SHIFT; 396ebf0bd36SAmit Kucheria } 397ebf0bd36SAmit Kucheria 39856baa667SAaro Koskinen if (rconfig->type2 != TWL4030_RESCONFIG_UNDEF) { 399ebf0bd36SAmit Kucheria type &= ~TYPE2_MASK; 400ebf0bd36SAmit Kucheria type |= rconfig->type2 << TYPE2_SHIFT; 401ebf0bd36SAmit Kucheria } 402ebf0bd36SAmit Kucheria 4034850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 404ebf0bd36SAmit Kucheria type, rconfig_addr + TYPE_OFFSET); 405ebf0bd36SAmit Kucheria if (err < 0) { 406ebf0bd36SAmit Kucheria pr_err("TWL4030 failed to program resource type\n"); 407ebf0bd36SAmit Kucheria return err; 408ebf0bd36SAmit Kucheria } 409ebf0bd36SAmit Kucheria 410b4ead61eSAmit Kucheria /* Set remap states */ 4114850f124SPeter Ujfalusi err = twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &remap, 412b4ead61eSAmit Kucheria rconfig_addr + REMAP_OFFSET); 413b4ead61eSAmit Kucheria if (err < 0) { 414b4ead61eSAmit Kucheria pr_err("TWL4030 Resource %d remap could not be read\n", 415b4ead61eSAmit Kucheria rconfig->resource); 416b4ead61eSAmit Kucheria return err; 417b4ead61eSAmit Kucheria } 418b4ead61eSAmit Kucheria 41953cf9a60SAmit Kucheria if (rconfig->remap_off != TWL4030_RESCONFIG_UNDEF) { 420b4ead61eSAmit Kucheria remap &= ~OFF_STATE_MASK; 421b4ead61eSAmit Kucheria remap |= rconfig->remap_off << OFF_STATE_SHIFT; 422b4ead61eSAmit Kucheria } 423b4ead61eSAmit Kucheria 42453cf9a60SAmit Kucheria if (rconfig->remap_sleep != TWL4030_RESCONFIG_UNDEF) { 425b4ead61eSAmit Kucheria remap &= ~SLEEP_STATE_MASK; 4261ea933f4SMike Turquette remap |= rconfig->remap_sleep << SLEEP_STATE_SHIFT; 427b4ead61eSAmit Kucheria } 428b4ead61eSAmit Kucheria 4294850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 430b4ead61eSAmit Kucheria remap, 431b4ead61eSAmit Kucheria rconfig_addr + REMAP_OFFSET); 432b4ead61eSAmit Kucheria if (err < 0) { 433b4ead61eSAmit Kucheria pr_err("TWL4030 failed to program remap\n"); 434b4ead61eSAmit Kucheria return err; 435b4ead61eSAmit Kucheria } 436b4ead61eSAmit Kucheria 437ebf0bd36SAmit Kucheria return 0; 438ebf0bd36SAmit Kucheria } 439ebf0bd36SAmit Kucheria 440f791be49SBill Pemberton static int load_twl4030_script(struct twl4030_script *tscript, 441ebf0bd36SAmit Kucheria u8 address) 442ebf0bd36SAmit Kucheria { 443ebf0bd36SAmit Kucheria int err; 44475a74565SAmit Kucheria static int order; 445ebf0bd36SAmit Kucheria 446ebf0bd36SAmit Kucheria /* Make sure the script isn't going beyond last valid address (0x3f) */ 447ebf0bd36SAmit Kucheria if ((address + tscript->size) > END_OF_SCRIPT) { 448ebf0bd36SAmit Kucheria pr_err("TWL4030 scripts too big error\n"); 449ebf0bd36SAmit Kucheria return -EINVAL; 450ebf0bd36SAmit Kucheria } 451ebf0bd36SAmit Kucheria 452ebf0bd36SAmit Kucheria err = twl4030_write_script(address, tscript->script, tscript->size); 453ebf0bd36SAmit Kucheria if (err) 454ebf0bd36SAmit Kucheria goto out; 455ebf0bd36SAmit Kucheria 456ebf0bd36SAmit Kucheria if (tscript->flags & TWL4030_WRST_SCRIPT) { 457ebf0bd36SAmit Kucheria err = twl4030_config_warmreset_sequence(address); 458ebf0bd36SAmit Kucheria if (err) 459ebf0bd36SAmit Kucheria goto out; 460ebf0bd36SAmit Kucheria } 461ebf0bd36SAmit Kucheria if (tscript->flags & TWL4030_WAKEUP12_SCRIPT) { 462fc7d76e4STony Lindgren /* Reset any existing sleep script to avoid hangs on reboot */ 463fc7d76e4STony Lindgren err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, END_OF_SCRIPT, 464fc7d76e4STony Lindgren R_SEQ_ADD_A2S); 465fc7d76e4STony Lindgren if (err) 466fc7d76e4STony Lindgren goto out; 467fc7d76e4STony Lindgren 468ebf0bd36SAmit Kucheria err = twl4030_config_wakeup12_sequence(address); 469ebf0bd36SAmit Kucheria if (err) 470ebf0bd36SAmit Kucheria goto out; 47175a74565SAmit Kucheria order = 1; 472ebf0bd36SAmit Kucheria } 473ebf0bd36SAmit Kucheria if (tscript->flags & TWL4030_WAKEUP3_SCRIPT) { 474ebf0bd36SAmit Kucheria err = twl4030_config_wakeup3_sequence(address); 475ebf0bd36SAmit Kucheria if (err) 476ebf0bd36SAmit Kucheria goto out; 477ebf0bd36SAmit Kucheria } 478c62dd365SLesly A M if (tscript->flags & TWL4030_SLEEP_SCRIPT) { 4791f968ff6SLesly A M if (!order) 48075a74565SAmit Kucheria pr_warning("TWL4030: Bad order of scripts (sleep "\ 48175a74565SAmit Kucheria "script before wakeup) Leads to boot"\ 48275a74565SAmit Kucheria "failure on some boards\n"); 483ebf0bd36SAmit Kucheria err = twl4030_config_sleep_sequence(address); 484c62dd365SLesly A M } 485ebf0bd36SAmit Kucheria out: 486ebf0bd36SAmit Kucheria return err; 487ebf0bd36SAmit Kucheria } 488ebf0bd36SAmit Kucheria 48911a441ceSMike Turquette int twl4030_remove_script(u8 flags) 49011a441ceSMike Turquette { 49111a441ceSMike Turquette int err = 0; 49211a441ceSMike Turquette 4934850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG1, 49471084406SFelipe Balbi TWL4030_PM_MASTER_PROTECT_KEY); 49511a441ceSMike Turquette if (err) { 49611a441ceSMike Turquette pr_err("twl4030: unable to unlock PROTECT_KEY\n"); 49711a441ceSMike Turquette return err; 49811a441ceSMike Turquette } 49911a441ceSMike Turquette 5004850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG2, 50171084406SFelipe Balbi TWL4030_PM_MASTER_PROTECT_KEY); 50211a441ceSMike Turquette if (err) { 50311a441ceSMike Turquette pr_err("twl4030: unable to unlock PROTECT_KEY\n"); 50411a441ceSMike Turquette return err; 50511a441ceSMike Turquette } 50611a441ceSMike Turquette 50711a441ceSMike Turquette if (flags & TWL4030_WRST_SCRIPT) { 5084850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, END_OF_SCRIPT, 50911a441ceSMike Turquette R_SEQ_ADD_WARM); 51011a441ceSMike Turquette if (err) 51111a441ceSMike Turquette return err; 51211a441ceSMike Turquette } 51311a441ceSMike Turquette if (flags & TWL4030_WAKEUP12_SCRIPT) { 5144850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, END_OF_SCRIPT, 51511a441ceSMike Turquette R_SEQ_ADD_S2A12); 516eac78a21SLesly A M if (err) 51711a441ceSMike Turquette return err; 51811a441ceSMike Turquette } 51911a441ceSMike Turquette if (flags & TWL4030_WAKEUP3_SCRIPT) { 5204850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, END_OF_SCRIPT, 52111a441ceSMike Turquette R_SEQ_ADD_S2A3); 52211a441ceSMike Turquette if (err) 52311a441ceSMike Turquette return err; 52411a441ceSMike Turquette } 52511a441ceSMike Turquette if (flags & TWL4030_SLEEP_SCRIPT) { 5264850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, END_OF_SCRIPT, 52711a441ceSMike Turquette R_SEQ_ADD_A2S); 52811a441ceSMike Turquette if (err) 52911a441ceSMike Turquette return err; 53011a441ceSMike Turquette } 53111a441ceSMike Turquette 5324850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, 0, 53371084406SFelipe Balbi TWL4030_PM_MASTER_PROTECT_KEY); 53411a441ceSMike Turquette if (err) 53511a441ceSMike Turquette pr_err("TWL4030 Unable to relock registers\n"); 53611a441ceSMike Turquette 53711a441ceSMike Turquette return err; 53811a441ceSMike Turquette } 53911a441ceSMike Turquette 540e7cd1d1eSTony Lindgren static int 541e7cd1d1eSTony Lindgren twl4030_power_configure_scripts(const struct twl4030_power_data *pdata) 542f58cb407SFlorian Vaussard { 543f58cb407SFlorian Vaussard int err; 544f58cb407SFlorian Vaussard int i; 545f58cb407SFlorian Vaussard u8 address = twl4030_start_script_address; 546f58cb407SFlorian Vaussard 547f58cb407SFlorian Vaussard for (i = 0; i < pdata->num; i++) { 548f58cb407SFlorian Vaussard err = load_twl4030_script(pdata->scripts[i], address); 549f58cb407SFlorian Vaussard if (err) 550f58cb407SFlorian Vaussard return err; 551f58cb407SFlorian Vaussard address += pdata->scripts[i]->size; 552f58cb407SFlorian Vaussard } 553f58cb407SFlorian Vaussard 554f58cb407SFlorian Vaussard return 0; 555f58cb407SFlorian Vaussard } 556f58cb407SFlorian Vaussard 557e7cd1d1eSTony Lindgren static int 558e7cd1d1eSTony Lindgren twl4030_power_configure_resources(const struct twl4030_power_data *pdata) 559f58cb407SFlorian Vaussard { 560f58cb407SFlorian Vaussard struct twl4030_resconfig *resconfig = pdata->resource_config; 561f58cb407SFlorian Vaussard int err; 562f58cb407SFlorian Vaussard 563f58cb407SFlorian Vaussard if (resconfig) { 564f58cb407SFlorian Vaussard while (resconfig->resource) { 565f58cb407SFlorian Vaussard err = twl4030_configure_resource(resconfig); 566f58cb407SFlorian Vaussard if (err) 567f58cb407SFlorian Vaussard return err; 568f58cb407SFlorian Vaussard resconfig++; 569f58cb407SFlorian Vaussard } 570f58cb407SFlorian Vaussard } 571f58cb407SFlorian Vaussard 572f58cb407SFlorian Vaussard return 0; 573f58cb407SFlorian Vaussard } 574f58cb407SFlorian Vaussard 57526cc3ab9SIgor Grinberg /* 57626cc3ab9SIgor Grinberg * In master mode, start the power off sequence. 57726cc3ab9SIgor Grinberg * After a successful execution, TWL shuts down the power to the SoC 57826cc3ab9SIgor Grinberg * and all peripherals connected to it. 57926cc3ab9SIgor Grinberg */ 58026cc3ab9SIgor Grinberg void twl4030_power_off(void) 58126cc3ab9SIgor Grinberg { 58226cc3ab9SIgor Grinberg int err; 58326cc3ab9SIgor Grinberg 5844850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, PWR_DEVOFF, 58526cc3ab9SIgor Grinberg TWL4030_PM_MASTER_P1_SW_EVENTS); 58626cc3ab9SIgor Grinberg if (err) 58726cc3ab9SIgor Grinberg pr_err("TWL4030 Unable to power off\n"); 58826cc3ab9SIgor Grinberg } 58926cc3ab9SIgor Grinberg 590e7cd1d1eSTony Lindgren static bool twl4030_power_use_poweroff(const struct twl4030_power_data *pdata, 591b0fc1da4SFlorian Vaussard struct device_node *node) 592b0fc1da4SFlorian Vaussard { 593b0fc1da4SFlorian Vaussard if (pdata && pdata->use_poweroff) 594b0fc1da4SFlorian Vaussard return true; 595b0fc1da4SFlorian Vaussard 596b0fc1da4SFlorian Vaussard if (of_property_read_bool(node, "ti,use_poweroff")) 597b0fc1da4SFlorian Vaussard return true; 598b0fc1da4SFlorian Vaussard 599b0fc1da4SFlorian Vaussard return false; 600b0fc1da4SFlorian Vaussard } 601b0fc1da4SFlorian Vaussard 602e7cd1d1eSTony Lindgren #ifdef CONFIG_OF 603e7cd1d1eSTony Lindgren 604e7cd1d1eSTony Lindgren /* Generic warm reset configuration for omap3 */ 605e7cd1d1eSTony Lindgren 606e7cd1d1eSTony Lindgren static struct twl4030_ins omap3_wrst_seq[] = { 607e7cd1d1eSTony Lindgren TWL_RESOURCE_OFF(RES_NRES_PWRON), 608e7cd1d1eSTony Lindgren TWL_RESOURCE_OFF(RES_RESET), 609e7cd1d1eSTony Lindgren TWL_RESOURCE_RESET(RES_MAIN_REF), 610e7cd1d1eSTony Lindgren TWL_RESOURCE_GROUP_RESET(RES_GRP_ALL, RES_TYPE_R0, RES_TYPE2_R2), 611e7cd1d1eSTony Lindgren TWL_RESOURCE_RESET(RES_VUSB_3V1), 612e7cd1d1eSTony Lindgren TWL_RESOURCE_GROUP_RESET(RES_GRP_ALL, RES_TYPE_R0, RES_TYPE2_R1), 613e7cd1d1eSTony Lindgren TWL_RESOURCE_GROUP_RESET(RES_GRP_RC, RES_TYPE_ALL, RES_TYPE2_R0), 614e7cd1d1eSTony Lindgren TWL_RESOURCE_ON(RES_RESET), 615e7cd1d1eSTony Lindgren TWL_RESOURCE_ON(RES_NRES_PWRON), 616e7cd1d1eSTony Lindgren }; 617e7cd1d1eSTony Lindgren 618e7cd1d1eSTony Lindgren static struct twl4030_script omap3_wrst_script = { 619e7cd1d1eSTony Lindgren .script = omap3_wrst_seq, 620e7cd1d1eSTony Lindgren .size = ARRAY_SIZE(omap3_wrst_seq), 621e7cd1d1eSTony Lindgren .flags = TWL4030_WRST_SCRIPT, 622e7cd1d1eSTony Lindgren }; 623e7cd1d1eSTony Lindgren 624e7cd1d1eSTony Lindgren static struct twl4030_script *omap3_reset_scripts[] = { 625e7cd1d1eSTony Lindgren &omap3_wrst_script, 626e7cd1d1eSTony Lindgren }; 627e7cd1d1eSTony Lindgren 628e7cd1d1eSTony Lindgren static struct twl4030_resconfig omap3_rconfig[] = { 629e7cd1d1eSTony Lindgren TWL_REMAP_SLEEP(RES_HFCLKOUT, DEV_GRP_P3, -1, -1), 630e7cd1d1eSTony Lindgren TWL_REMAP_SLEEP(RES_VDD1, DEV_GRP_P1, -1, -1), 631e7cd1d1eSTony Lindgren TWL_REMAP_SLEEP(RES_VDD2, DEV_GRP_P1, -1, -1), 632e7cd1d1eSTony Lindgren { 0, 0 }, 633e7cd1d1eSTony Lindgren }; 634e7cd1d1eSTony Lindgren 635e7cd1d1eSTony Lindgren static struct twl4030_power_data omap3_reset = { 636e7cd1d1eSTony Lindgren .scripts = omap3_reset_scripts, 637e7cd1d1eSTony Lindgren .num = ARRAY_SIZE(omap3_reset_scripts), 638e7cd1d1eSTony Lindgren .resource_config = omap3_rconfig, 639e7cd1d1eSTony Lindgren }; 640e7cd1d1eSTony Lindgren 641e7cd1d1eSTony Lindgren static struct of_device_id twl4030_power_of_match[] = { 642e7cd1d1eSTony Lindgren { 643e7cd1d1eSTony Lindgren .compatible = "ti,twl4030-power-reset", 644e7cd1d1eSTony Lindgren .data = &omap3_reset, 645e7cd1d1eSTony Lindgren }, 646e7cd1d1eSTony Lindgren { }, 647e7cd1d1eSTony Lindgren }; 648e7cd1d1eSTony Lindgren MODULE_DEVICE_TABLE(of, twl4030_power_of_match); 649e7cd1d1eSTony Lindgren #endif /* CONFIG_OF */ 650e7cd1d1eSTony Lindgren 651fae01582SJingoo Han static int twl4030_power_probe(struct platform_device *pdev) 652ebf0bd36SAmit Kucheria { 653e7cd1d1eSTony Lindgren const struct twl4030_power_data *pdata = dev_get_platdata(&pdev->dev); 654b0fc1da4SFlorian Vaussard struct device_node *node = pdev->dev.of_node; 655e7cd1d1eSTony Lindgren const struct of_device_id *match; 656ebf0bd36SAmit Kucheria int err = 0; 657cb3cabd6SFlorian Vaussard int err2 = 0; 658f58cb407SFlorian Vaussard u8 val; 659ebf0bd36SAmit Kucheria 660b0fc1da4SFlorian Vaussard if (!pdata && !node) { 661b0fc1da4SFlorian Vaussard dev_err(&pdev->dev, "Platform data is missing\n"); 662b0fc1da4SFlorian Vaussard return -EINVAL; 663b0fc1da4SFlorian Vaussard } 664b0fc1da4SFlorian Vaussard 6654850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG1, 66671084406SFelipe Balbi TWL4030_PM_MASTER_PROTECT_KEY); 667e77a4c2fSFlorian Vaussard err |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER, 668e77a4c2fSFlorian Vaussard TWL4030_PM_MASTER_KEY_CFG2, 66971084406SFelipe Balbi TWL4030_PM_MASTER_PROTECT_KEY); 670e77a4c2fSFlorian Vaussard 671e77a4c2fSFlorian Vaussard if (err) { 672e77a4c2fSFlorian Vaussard pr_err("TWL4030 Unable to unlock registers\n"); 673e77a4c2fSFlorian Vaussard return err; 674e77a4c2fSFlorian Vaussard } 675ebf0bd36SAmit Kucheria 676e7cd1d1eSTony Lindgren match = of_match_device(of_match_ptr(twl4030_power_of_match), 677e7cd1d1eSTony Lindgren &pdev->dev); 678e7cd1d1eSTony Lindgren if (match && match->data) 679e7cd1d1eSTony Lindgren pdata = match->data; 680e7cd1d1eSTony Lindgren 681b0fc1da4SFlorian Vaussard if (pdata) { 682f58cb407SFlorian Vaussard err = twl4030_power_configure_scripts(pdata); 683e77a4c2fSFlorian Vaussard if (err) { 684e77a4c2fSFlorian Vaussard pr_err("TWL4030 failed to load scripts\n"); 685cb3cabd6SFlorian Vaussard goto relock; 686e77a4c2fSFlorian Vaussard } 687f58cb407SFlorian Vaussard err = twl4030_power_configure_resources(pdata); 688e77a4c2fSFlorian Vaussard if (err) { 689e77a4c2fSFlorian Vaussard pr_err("TWL4030 failed to configure resource\n"); 690cb3cabd6SFlorian Vaussard goto relock; 691e77a4c2fSFlorian Vaussard } 692b0fc1da4SFlorian Vaussard } 693ebf0bd36SAmit Kucheria 69426cc3ab9SIgor Grinberg /* Board has to be wired properly to use this feature */ 695b0fc1da4SFlorian Vaussard if (twl4030_power_use_poweroff(pdata, node) && !pm_power_off) { 69626cc3ab9SIgor Grinberg /* Default for SEQ_OFFSYNC is set, lets ensure this */ 6974850f124SPeter Ujfalusi err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &val, 69826cc3ab9SIgor Grinberg TWL4030_PM_MASTER_CFG_P123_TRANSITION); 69926cc3ab9SIgor Grinberg if (err) { 70026cc3ab9SIgor Grinberg pr_warning("TWL4030 Unable to read registers\n"); 70126cc3ab9SIgor Grinberg 70226cc3ab9SIgor Grinberg } else if (!(val & SEQ_OFFSYNC)) { 70326cc3ab9SIgor Grinberg val |= SEQ_OFFSYNC; 7044850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, val, 70526cc3ab9SIgor Grinberg TWL4030_PM_MASTER_CFG_P123_TRANSITION); 70626cc3ab9SIgor Grinberg if (err) { 70726cc3ab9SIgor Grinberg pr_err("TWL4030 Unable to setup SEQ_OFFSYNC\n"); 70826cc3ab9SIgor Grinberg goto relock; 70926cc3ab9SIgor Grinberg } 71026cc3ab9SIgor Grinberg } 71126cc3ab9SIgor Grinberg 71226cc3ab9SIgor Grinberg pm_power_off = twl4030_power_off; 71326cc3ab9SIgor Grinberg } 71426cc3ab9SIgor Grinberg 71526cc3ab9SIgor Grinberg relock: 716cb3cabd6SFlorian Vaussard err2 = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, 0, 71771084406SFelipe Balbi TWL4030_PM_MASTER_PROTECT_KEY); 718cb3cabd6SFlorian Vaussard if (err2) { 719ebf0bd36SAmit Kucheria pr_err("TWL4030 Unable to relock registers\n"); 720cb3cabd6SFlorian Vaussard return err2; 721cb3cabd6SFlorian Vaussard } 722cb3cabd6SFlorian Vaussard 723637d6895SFlorian Vaussard return err; 724ebf0bd36SAmit Kucheria } 725637d6895SFlorian Vaussard 726637d6895SFlorian Vaussard static int twl4030_power_remove(struct platform_device *pdev) 727637d6895SFlorian Vaussard { 728637d6895SFlorian Vaussard return 0; 729637d6895SFlorian Vaussard } 730637d6895SFlorian Vaussard 731637d6895SFlorian Vaussard static struct platform_driver twl4030_power_driver = { 732637d6895SFlorian Vaussard .driver = { 733637d6895SFlorian Vaussard .name = "twl4030_power", 734637d6895SFlorian Vaussard .owner = THIS_MODULE, 735b0fc1da4SFlorian Vaussard .of_match_table = of_match_ptr(twl4030_power_of_match), 736637d6895SFlorian Vaussard }, 737637d6895SFlorian Vaussard .probe = twl4030_power_probe, 738637d6895SFlorian Vaussard .remove = twl4030_power_remove, 739637d6895SFlorian Vaussard }; 740637d6895SFlorian Vaussard 741637d6895SFlorian Vaussard module_platform_driver(twl4030_power_driver); 742637d6895SFlorian Vaussard 743637d6895SFlorian Vaussard MODULE_AUTHOR("Nokia Corporation"); 744637d6895SFlorian Vaussard MODULE_AUTHOR("Texas Instruments, Inc."); 745637d6895SFlorian Vaussard MODULE_DESCRIPTION("Power management for TWL4030"); 746637d6895SFlorian Vaussard MODULE_LICENSE("GPL"); 747637d6895SFlorian Vaussard MODULE_ALIAS("platform:twl4030_power"); 748