1ebf0bd36SAmit Kucheria /* 2ebf0bd36SAmit Kucheria * 3ebf0bd36SAmit Kucheria * Handle TWL4030 Power initialization 4ebf0bd36SAmit Kucheria * 5ebf0bd36SAmit Kucheria * Copyright (C) 2008 Nokia Corporation 6ebf0bd36SAmit Kucheria * Copyright (C) 2006 Texas Instruments, Inc 7ebf0bd36SAmit Kucheria * 8ebf0bd36SAmit Kucheria * Written by Kalle Jokiniemi 9ebf0bd36SAmit Kucheria * Peter De Schrijver <peter.de-schrijver@nokia.com> 10ebf0bd36SAmit Kucheria * Several fixes by Amit Kucheria <amit.kucheria@verdurent.com> 11ebf0bd36SAmit Kucheria * 12ebf0bd36SAmit Kucheria * This file is subject to the terms and conditions of the GNU General 13ebf0bd36SAmit Kucheria * Public License. See the file "COPYING" in the main directory of this 14ebf0bd36SAmit Kucheria * archive for more details. 15ebf0bd36SAmit Kucheria * 16ebf0bd36SAmit Kucheria * This program is distributed in the hope that it will be useful, 17ebf0bd36SAmit Kucheria * but WITHOUT ANY WARRANTY; without even the implied warranty of 18ebf0bd36SAmit Kucheria * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 19ebf0bd36SAmit Kucheria * GNU General Public License for more details. 20ebf0bd36SAmit Kucheria * 21ebf0bd36SAmit Kucheria * You should have received a copy of the GNU General Public License 22ebf0bd36SAmit Kucheria * along with this program; if not, write to the Free Software 23ebf0bd36SAmit Kucheria * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 24ebf0bd36SAmit Kucheria */ 25ebf0bd36SAmit Kucheria 26ebf0bd36SAmit Kucheria #include <linux/module.h> 27ebf0bd36SAmit Kucheria #include <linux/pm.h> 28a2054256SWolfram Sang #include <linux/mfd/twl.h> 29ebf0bd36SAmit Kucheria #include <linux/platform_device.h> 30b0fc1da4SFlorian Vaussard #include <linux/of.h> 31e7cd1d1eSTony Lindgren #include <linux/of_device.h> 32ebf0bd36SAmit Kucheria 33ebf0bd36SAmit Kucheria #include <asm/mach-types.h> 34ebf0bd36SAmit Kucheria 35ebf0bd36SAmit Kucheria static u8 twl4030_start_script_address = 0x2b; 36ebf0bd36SAmit Kucheria 3732057281STony Lindgren /* Register bits for P1, P2 and P3_SW_EVENTS */ 3832057281STony Lindgren #define PWR_STOPON_PRWON BIT(6) 3932057281STony Lindgren #define PWR_STOPON_SYSEN BIT(5) 4032057281STony Lindgren #define PWR_ENABLE_WARMRESET BIT(4) 4132057281STony Lindgren #define PWR_LVL_WAKEUP BIT(3) 4232057281STony Lindgren #define PWR_DEVACT BIT(2) 4332057281STony Lindgren #define PWR_DEVSLP BIT(1) 4432057281STony Lindgren #define PWR_DEVOFF BIT(0) 4532057281STony Lindgren 46481c7f86STony Lindgren /* Register bits for CFG_P1_TRANSITION (also for P2 and P3) */ 47481c7f86STony Lindgren #define STARTON_SWBUG BIT(7) /* Start on watchdog */ 48481c7f86STony Lindgren #define STARTON_VBUS BIT(5) /* Start on VBUS */ 49481c7f86STony Lindgren #define STARTON_VBAT BIT(4) /* Start on battery insert */ 50481c7f86STony Lindgren #define STARTON_RTC BIT(3) /* Start on RTC */ 51481c7f86STony Lindgren #define STARTON_USB BIT(2) /* Start on USB host */ 52481c7f86STony Lindgren #define STARTON_CHG BIT(1) /* Start on charger */ 53481c7f86STony Lindgren #define STARTON_PWON BIT(0) /* Start on PWRON button */ 54481c7f86STony Lindgren 5526cc3ab9SIgor Grinberg #define SEQ_OFFSYNC (1 << 0) 56ebf0bd36SAmit Kucheria 57ebf0bd36SAmit Kucheria #define PHY_TO_OFF_PM_MASTER(p) (p - 0x36) 58ebf0bd36SAmit Kucheria #define PHY_TO_OFF_PM_RECEIVER(p) (p - 0x5b) 59ebf0bd36SAmit Kucheria 60ebf0bd36SAmit Kucheria /* resource - hfclk */ 61ebf0bd36SAmit Kucheria #define R_HFCLKOUT_DEV_GRP PHY_TO_OFF_PM_RECEIVER(0xe6) 62ebf0bd36SAmit Kucheria 63ebf0bd36SAmit Kucheria /* PM events */ 64ebf0bd36SAmit Kucheria #define R_P1_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x46) 65ebf0bd36SAmit Kucheria #define R_P2_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x47) 66ebf0bd36SAmit Kucheria #define R_P3_SW_EVENTS PHY_TO_OFF_PM_MASTER(0x48) 67ebf0bd36SAmit Kucheria #define R_CFG_P1_TRANSITION PHY_TO_OFF_PM_MASTER(0x36) 68ebf0bd36SAmit Kucheria #define R_CFG_P2_TRANSITION PHY_TO_OFF_PM_MASTER(0x37) 69ebf0bd36SAmit Kucheria #define R_CFG_P3_TRANSITION PHY_TO_OFF_PM_MASTER(0x38) 70ebf0bd36SAmit Kucheria 71ebf0bd36SAmit Kucheria #define END_OF_SCRIPT 0x3f 72ebf0bd36SAmit Kucheria 73ebf0bd36SAmit Kucheria #define R_SEQ_ADD_A2S PHY_TO_OFF_PM_MASTER(0x55) 74ebf0bd36SAmit Kucheria #define R_SEQ_ADD_S2A12 PHY_TO_OFF_PM_MASTER(0x56) 75ebf0bd36SAmit Kucheria #define R_SEQ_ADD_S2A3 PHY_TO_OFF_PM_MASTER(0x57) 76ebf0bd36SAmit Kucheria #define R_SEQ_ADD_WARM PHY_TO_OFF_PM_MASTER(0x58) 77ebf0bd36SAmit Kucheria #define R_MEMORY_ADDRESS PHY_TO_OFF_PM_MASTER(0x59) 78ebf0bd36SAmit Kucheria #define R_MEMORY_DATA PHY_TO_OFF_PM_MASTER(0x5a) 79ebf0bd36SAmit Kucheria 80890463f0SAmit Kucheria /* resource configuration registers 81890463f0SAmit Kucheria <RESOURCE>_DEV_GRP at address 'n+0' 82890463f0SAmit Kucheria <RESOURCE>_TYPE at address 'n+1' 83890463f0SAmit Kucheria <RESOURCE>_REMAP at address 'n+2' 84890463f0SAmit Kucheria <RESOURCE>_DEDICATED at address 'n+3' 85890463f0SAmit Kucheria */ 86e97d1546SAmit Kucheria #define DEV_GRP_OFFSET 0 87ebf0bd36SAmit Kucheria #define TYPE_OFFSET 1 88b4ead61eSAmit Kucheria #define REMAP_OFFSET 2 89b4ead61eSAmit Kucheria #define DEDICATED_OFFSET 3 90ebf0bd36SAmit Kucheria 91e97d1546SAmit Kucheria /* Bit positions in the registers */ 92890463f0SAmit Kucheria 93890463f0SAmit Kucheria /* <RESOURCE>_DEV_GRP */ 94e97d1546SAmit Kucheria #define DEV_GRP_SHIFT 5 95e97d1546SAmit Kucheria #define DEV_GRP_MASK (7 << DEV_GRP_SHIFT) 96890463f0SAmit Kucheria 97890463f0SAmit Kucheria /* <RESOURCE>_TYPE */ 98ebf0bd36SAmit Kucheria #define TYPE_SHIFT 0 99ebf0bd36SAmit Kucheria #define TYPE_MASK (7 << TYPE_SHIFT) 100ebf0bd36SAmit Kucheria #define TYPE2_SHIFT 3 101ebf0bd36SAmit Kucheria #define TYPE2_MASK (3 << TYPE2_SHIFT) 102ebf0bd36SAmit Kucheria 103b4ead61eSAmit Kucheria /* <RESOURCE>_REMAP */ 104b4ead61eSAmit Kucheria #define SLEEP_STATE_SHIFT 0 105b4ead61eSAmit Kucheria #define SLEEP_STATE_MASK (0xf << SLEEP_STATE_SHIFT) 106b4ead61eSAmit Kucheria #define OFF_STATE_SHIFT 4 107b4ead61eSAmit Kucheria #define OFF_STATE_MASK (0xf << OFF_STATE_SHIFT) 108b4ead61eSAmit Kucheria 109ebf0bd36SAmit Kucheria static u8 res_config_addrs[] = { 110ebf0bd36SAmit Kucheria [RES_VAUX1] = 0x17, 111ebf0bd36SAmit Kucheria [RES_VAUX2] = 0x1b, 112ebf0bd36SAmit Kucheria [RES_VAUX3] = 0x1f, 113ebf0bd36SAmit Kucheria [RES_VAUX4] = 0x23, 114ebf0bd36SAmit Kucheria [RES_VMMC1] = 0x27, 115ebf0bd36SAmit Kucheria [RES_VMMC2] = 0x2b, 116ebf0bd36SAmit Kucheria [RES_VPLL1] = 0x2f, 117ebf0bd36SAmit Kucheria [RES_VPLL2] = 0x33, 118ebf0bd36SAmit Kucheria [RES_VSIM] = 0x37, 119ebf0bd36SAmit Kucheria [RES_VDAC] = 0x3b, 120ebf0bd36SAmit Kucheria [RES_VINTANA1] = 0x3f, 121ebf0bd36SAmit Kucheria [RES_VINTANA2] = 0x43, 122ebf0bd36SAmit Kucheria [RES_VINTDIG] = 0x47, 123ebf0bd36SAmit Kucheria [RES_VIO] = 0x4b, 124ebf0bd36SAmit Kucheria [RES_VDD1] = 0x55, 125ebf0bd36SAmit Kucheria [RES_VDD2] = 0x63, 126ebf0bd36SAmit Kucheria [RES_VUSB_1V5] = 0x71, 127ebf0bd36SAmit Kucheria [RES_VUSB_1V8] = 0x74, 128ebf0bd36SAmit Kucheria [RES_VUSB_3V1] = 0x77, 129ebf0bd36SAmit Kucheria [RES_VUSBCP] = 0x7a, 130ebf0bd36SAmit Kucheria [RES_REGEN] = 0x7f, 131ebf0bd36SAmit Kucheria [RES_NRES_PWRON] = 0x82, 132ebf0bd36SAmit Kucheria [RES_CLKEN] = 0x85, 133ebf0bd36SAmit Kucheria [RES_SYSEN] = 0x88, 134ebf0bd36SAmit Kucheria [RES_HFCLKOUT] = 0x8b, 135ebf0bd36SAmit Kucheria [RES_32KCLKOUT] = 0x8e, 136ebf0bd36SAmit Kucheria [RES_RESET] = 0x91, 137d7ac829fSLesly A M [RES_MAIN_REF] = 0x94, 138ebf0bd36SAmit Kucheria }; 139ebf0bd36SAmit Kucheria 140e7cd1d1eSTony Lindgren /* 141e7cd1d1eSTony Lindgren * Usable values for .remap_sleep and .remap_off 142e7cd1d1eSTony Lindgren * Based on table "5.3.3 Resource Operating modes" 143e7cd1d1eSTony Lindgren */ 144e7cd1d1eSTony Lindgren enum { 145e7cd1d1eSTony Lindgren TWL_REMAP_OFF = 0, 146e7cd1d1eSTony Lindgren TWL_REMAP_SLEEP = 8, 147e7cd1d1eSTony Lindgren TWL_REMAP_ACTIVE = 9, 148e7cd1d1eSTony Lindgren }; 149e7cd1d1eSTony Lindgren 150e7cd1d1eSTony Lindgren /* 151e7cd1d1eSTony Lindgren * Macros to configure the PM register states for various resources. 152e7cd1d1eSTony Lindgren * Note that we can make MSG_SINGULAR etc private to this driver once 153e7cd1d1eSTony Lindgren * omap3 has been made DT only. 154e7cd1d1eSTony Lindgren */ 155e7cd1d1eSTony Lindgren #define TWL_DFLT_DELAY 2 /* typically 2 32 KiHz cycles */ 15676714d2cSTony Lindgren #define TWL_DEV_GRP_P123 (DEV_GRP_P1 | DEV_GRP_P2 | DEV_GRP_P3) 157e7cd1d1eSTony Lindgren #define TWL_RESOURCE_SET(res, state) \ 158e7cd1d1eSTony Lindgren { MSG_SINGULAR(DEV_GRP_NULL, (res), (state)), TWL_DFLT_DELAY } 159e7cd1d1eSTony Lindgren #define TWL_RESOURCE_ON(res) TWL_RESOURCE_SET(res, RES_STATE_ACTIVE) 160e7cd1d1eSTony Lindgren #define TWL_RESOURCE_OFF(res) TWL_RESOURCE_SET(res, RES_STATE_OFF) 161e7cd1d1eSTony Lindgren #define TWL_RESOURCE_RESET(res) TWL_RESOURCE_SET(res, RES_STATE_WRST) 162e7cd1d1eSTony Lindgren /* 163e7cd1d1eSTony Lindgren * It seems that type1 and type2 is just the resource init order 164e7cd1d1eSTony Lindgren * number for the type1 and type2 group. 165e7cd1d1eSTony Lindgren */ 16676714d2cSTony Lindgren #define TWL_RESOURCE_SET_ACTIVE(res, state) \ 16776714d2cSTony Lindgren { MSG_SINGULAR(DEV_GRP_NULL, (res), RES_STATE_ACTIVE), (state) } 168e7cd1d1eSTony Lindgren #define TWL_RESOURCE_GROUP_RESET(group, type1, type2) \ 169e7cd1d1eSTony Lindgren { MSG_BROADCAST(DEV_GRP_NULL, (group), (type1), (type2), \ 170e7cd1d1eSTony Lindgren RES_STATE_WRST), TWL_DFLT_DELAY } 17176714d2cSTony Lindgren #define TWL_RESOURCE_GROUP_SLEEP(group, type, type2) \ 17276714d2cSTony Lindgren { MSG_BROADCAST(DEV_GRP_NULL, (group), (type), (type2), \ 17376714d2cSTony Lindgren RES_STATE_SLEEP), TWL_DFLT_DELAY } 17476714d2cSTony Lindgren #define TWL_RESOURCE_GROUP_ACTIVE(group, type, type2) \ 17576714d2cSTony Lindgren { MSG_BROADCAST(DEV_GRP_NULL, (group), (type), (type2), \ 17676714d2cSTony Lindgren RES_STATE_ACTIVE), TWL_DFLT_DELAY } 177e7cd1d1eSTony Lindgren #define TWL_REMAP_SLEEP(res, devgrp, typ, typ2) \ 178e7cd1d1eSTony Lindgren { .resource = (res), .devgroup = (devgrp), \ 179e7cd1d1eSTony Lindgren .type = (typ), .type2 = (typ2), \ 180e7cd1d1eSTony Lindgren .remap_off = TWL_REMAP_OFF, \ 181e7cd1d1eSTony Lindgren .remap_sleep = TWL_REMAP_SLEEP, } 18276714d2cSTony Lindgren #define TWL_REMAP_OFF(res, devgrp, typ, typ2) \ 18376714d2cSTony Lindgren { .resource = (res), .devgroup = (devgrp), \ 18476714d2cSTony Lindgren .type = (typ), .type2 = (typ2), \ 18576714d2cSTony Lindgren .remap_off = TWL_REMAP_OFF, .remap_sleep = TWL_REMAP_OFF, } 186e7cd1d1eSTony Lindgren 187f791be49SBill Pemberton static int twl4030_write_script_byte(u8 address, u8 byte) 188ebf0bd36SAmit Kucheria { 189ebf0bd36SAmit Kucheria int err; 190ebf0bd36SAmit Kucheria 1914850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, address, R_MEMORY_ADDRESS); 192ebf0bd36SAmit Kucheria if (err) 193ebf0bd36SAmit Kucheria goto out; 1944850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, byte, R_MEMORY_DATA); 195ebf0bd36SAmit Kucheria out: 196ebf0bd36SAmit Kucheria return err; 197ebf0bd36SAmit Kucheria } 198ebf0bd36SAmit Kucheria 199f791be49SBill Pemberton static int twl4030_write_script_ins(u8 address, u16 pmb_message, 200ebf0bd36SAmit Kucheria u8 delay, u8 next) 201ebf0bd36SAmit Kucheria { 202ebf0bd36SAmit Kucheria int err; 203ebf0bd36SAmit Kucheria 204ebf0bd36SAmit Kucheria address *= 4; 205ebf0bd36SAmit Kucheria err = twl4030_write_script_byte(address++, pmb_message >> 8); 206ebf0bd36SAmit Kucheria if (err) 207ebf0bd36SAmit Kucheria goto out; 208ebf0bd36SAmit Kucheria err = twl4030_write_script_byte(address++, pmb_message & 0xff); 209ebf0bd36SAmit Kucheria if (err) 210ebf0bd36SAmit Kucheria goto out; 211ebf0bd36SAmit Kucheria err = twl4030_write_script_byte(address++, delay); 212ebf0bd36SAmit Kucheria if (err) 213ebf0bd36SAmit Kucheria goto out; 214ebf0bd36SAmit Kucheria err = twl4030_write_script_byte(address++, next); 215ebf0bd36SAmit Kucheria out: 216ebf0bd36SAmit Kucheria return err; 217ebf0bd36SAmit Kucheria } 218ebf0bd36SAmit Kucheria 219f791be49SBill Pemberton static int twl4030_write_script(u8 address, struct twl4030_ins *script, 220ebf0bd36SAmit Kucheria int len) 221ebf0bd36SAmit Kucheria { 222f65e9eacSArnd Bergmann int err = -EINVAL; 223ebf0bd36SAmit Kucheria 224ebf0bd36SAmit Kucheria for (; len; len--, address++, script++) { 225ebf0bd36SAmit Kucheria if (len == 1) { 226ebf0bd36SAmit Kucheria err = twl4030_write_script_ins(address, 227ebf0bd36SAmit Kucheria script->pmb_message, 228ebf0bd36SAmit Kucheria script->delay, 229ebf0bd36SAmit Kucheria END_OF_SCRIPT); 230ebf0bd36SAmit Kucheria if (err) 231ebf0bd36SAmit Kucheria break; 232ebf0bd36SAmit Kucheria } else { 233ebf0bd36SAmit Kucheria err = twl4030_write_script_ins(address, 234ebf0bd36SAmit Kucheria script->pmb_message, 235ebf0bd36SAmit Kucheria script->delay, 236ebf0bd36SAmit Kucheria address + 1); 237ebf0bd36SAmit Kucheria if (err) 238ebf0bd36SAmit Kucheria break; 239ebf0bd36SAmit Kucheria } 240ebf0bd36SAmit Kucheria } 241ebf0bd36SAmit Kucheria return err; 242ebf0bd36SAmit Kucheria } 243ebf0bd36SAmit Kucheria 244f791be49SBill Pemberton static int twl4030_config_wakeup3_sequence(u8 address) 245ebf0bd36SAmit Kucheria { 246ebf0bd36SAmit Kucheria int err; 247ebf0bd36SAmit Kucheria u8 data; 248ebf0bd36SAmit Kucheria 249ebf0bd36SAmit Kucheria /* Set SLEEP to ACTIVE SEQ address for P3 */ 2504850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, address, R_SEQ_ADD_S2A3); 251ebf0bd36SAmit Kucheria if (err) 252ebf0bd36SAmit Kucheria goto out; 253ebf0bd36SAmit Kucheria 254ebf0bd36SAmit Kucheria /* P3 LVL_WAKEUP should be on LEVEL */ 2554850f124SPeter Ujfalusi err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &data, R_P3_SW_EVENTS); 256ebf0bd36SAmit Kucheria if (err) 257ebf0bd36SAmit Kucheria goto out; 25832057281STony Lindgren data |= PWR_LVL_WAKEUP; 2594850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, data, R_P3_SW_EVENTS); 260ebf0bd36SAmit Kucheria out: 261ebf0bd36SAmit Kucheria if (err) 262ebf0bd36SAmit Kucheria pr_err("TWL4030 wakeup sequence for P3 config error\n"); 263ebf0bd36SAmit Kucheria return err; 264ebf0bd36SAmit Kucheria } 265ebf0bd36SAmit Kucheria 2665c188d74STony Lindgren static int 2675c188d74STony Lindgren twl4030_config_wakeup12_sequence(const struct twl4030_power_data *pdata, 2685c188d74STony Lindgren u8 address) 269ebf0bd36SAmit Kucheria { 270ebf0bd36SAmit Kucheria int err = 0; 271ebf0bd36SAmit Kucheria u8 data; 272ebf0bd36SAmit Kucheria 273ebf0bd36SAmit Kucheria /* Set SLEEP to ACTIVE SEQ address for P1 and P2 */ 2744850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, address, R_SEQ_ADD_S2A12); 275ebf0bd36SAmit Kucheria if (err) 276ebf0bd36SAmit Kucheria goto out; 277ebf0bd36SAmit Kucheria 278ebf0bd36SAmit Kucheria /* P1/P2 LVL_WAKEUP should be on LEVEL */ 2794850f124SPeter Ujfalusi err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &data, R_P1_SW_EVENTS); 280ebf0bd36SAmit Kucheria if (err) 281ebf0bd36SAmit Kucheria goto out; 282ebf0bd36SAmit Kucheria 28332057281STony Lindgren data |= PWR_LVL_WAKEUP; 2844850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, data, R_P1_SW_EVENTS); 285ebf0bd36SAmit Kucheria if (err) 286ebf0bd36SAmit Kucheria goto out; 287ebf0bd36SAmit Kucheria 2884850f124SPeter Ujfalusi err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &data, R_P2_SW_EVENTS); 289ebf0bd36SAmit Kucheria if (err) 290ebf0bd36SAmit Kucheria goto out; 291ebf0bd36SAmit Kucheria 29232057281STony Lindgren data |= PWR_LVL_WAKEUP; 2934850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, data, R_P2_SW_EVENTS); 294ebf0bd36SAmit Kucheria if (err) 295ebf0bd36SAmit Kucheria goto out; 296ebf0bd36SAmit Kucheria 2975c188d74STony Lindgren if (pdata->ac_charger_quirk || machine_is_omap_3430sdp() || 2985c188d74STony Lindgren machine_is_omap_ldp()) { 299ebf0bd36SAmit Kucheria /* Disabling AC charger effect on sleep-active transitions */ 3004850f124SPeter Ujfalusi err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &data, 301ebf0bd36SAmit Kucheria R_CFG_P1_TRANSITION); 302ebf0bd36SAmit Kucheria if (err) 303ebf0bd36SAmit Kucheria goto out; 3045c188d74STony Lindgren data &= ~STARTON_CHG; 3054850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, data, 306ebf0bd36SAmit Kucheria R_CFG_P1_TRANSITION); 307ebf0bd36SAmit Kucheria if (err) 308ebf0bd36SAmit Kucheria goto out; 309ebf0bd36SAmit Kucheria } 310ebf0bd36SAmit Kucheria 311ebf0bd36SAmit Kucheria out: 312ebf0bd36SAmit Kucheria if (err) 313ebf0bd36SAmit Kucheria pr_err("TWL4030 wakeup sequence for P1 and P2" \ 314ebf0bd36SAmit Kucheria "config error\n"); 315ebf0bd36SAmit Kucheria return err; 316ebf0bd36SAmit Kucheria } 317ebf0bd36SAmit Kucheria 318f791be49SBill Pemberton static int twl4030_config_sleep_sequence(u8 address) 319ebf0bd36SAmit Kucheria { 320ebf0bd36SAmit Kucheria int err; 321ebf0bd36SAmit Kucheria 322ebf0bd36SAmit Kucheria /* Set ACTIVE to SLEEP SEQ address in T2 memory*/ 3234850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, address, R_SEQ_ADD_A2S); 324ebf0bd36SAmit Kucheria 325ebf0bd36SAmit Kucheria if (err) 326ebf0bd36SAmit Kucheria pr_err("TWL4030 sleep sequence config error\n"); 327ebf0bd36SAmit Kucheria 328ebf0bd36SAmit Kucheria return err; 329ebf0bd36SAmit Kucheria } 330ebf0bd36SAmit Kucheria 331f791be49SBill Pemberton static int twl4030_config_warmreset_sequence(u8 address) 332ebf0bd36SAmit Kucheria { 333ebf0bd36SAmit Kucheria int err; 334ebf0bd36SAmit Kucheria u8 rd_data; 335ebf0bd36SAmit Kucheria 336ebf0bd36SAmit Kucheria /* Set WARM RESET SEQ address for P1 */ 3374850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, address, R_SEQ_ADD_WARM); 338ebf0bd36SAmit Kucheria if (err) 339ebf0bd36SAmit Kucheria goto out; 340ebf0bd36SAmit Kucheria 341ebf0bd36SAmit Kucheria /* P1/P2/P3 enable WARMRESET */ 3424850f124SPeter Ujfalusi err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &rd_data, R_P1_SW_EVENTS); 343ebf0bd36SAmit Kucheria if (err) 344ebf0bd36SAmit Kucheria goto out; 345ebf0bd36SAmit Kucheria 34632057281STony Lindgren rd_data |= PWR_ENABLE_WARMRESET; 3474850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, rd_data, R_P1_SW_EVENTS); 348ebf0bd36SAmit Kucheria if (err) 349ebf0bd36SAmit Kucheria goto out; 350ebf0bd36SAmit Kucheria 3514850f124SPeter Ujfalusi err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &rd_data, R_P2_SW_EVENTS); 352ebf0bd36SAmit Kucheria if (err) 353ebf0bd36SAmit Kucheria goto out; 354ebf0bd36SAmit Kucheria 35532057281STony Lindgren rd_data |= PWR_ENABLE_WARMRESET; 3564850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, rd_data, R_P2_SW_EVENTS); 357ebf0bd36SAmit Kucheria if (err) 358ebf0bd36SAmit Kucheria goto out; 359ebf0bd36SAmit Kucheria 3604850f124SPeter Ujfalusi err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &rd_data, R_P3_SW_EVENTS); 361ebf0bd36SAmit Kucheria if (err) 362ebf0bd36SAmit Kucheria goto out; 363ebf0bd36SAmit Kucheria 36432057281STony Lindgren rd_data |= PWR_ENABLE_WARMRESET; 3654850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, rd_data, R_P3_SW_EVENTS); 366ebf0bd36SAmit Kucheria out: 367ebf0bd36SAmit Kucheria if (err) 368ebf0bd36SAmit Kucheria pr_err("TWL4030 warmreset seq config error\n"); 369ebf0bd36SAmit Kucheria return err; 370ebf0bd36SAmit Kucheria } 371ebf0bd36SAmit Kucheria 372f791be49SBill Pemberton static int twl4030_configure_resource(struct twl4030_resconfig *rconfig) 373ebf0bd36SAmit Kucheria { 374ebf0bd36SAmit Kucheria int rconfig_addr; 375ebf0bd36SAmit Kucheria int err; 376ebf0bd36SAmit Kucheria u8 type; 377ebf0bd36SAmit Kucheria u8 grp; 378b4ead61eSAmit Kucheria u8 remap; 379ebf0bd36SAmit Kucheria 380ebf0bd36SAmit Kucheria if (rconfig->resource > TOTAL_RESOURCES) { 381ebf0bd36SAmit Kucheria pr_err("TWL4030 Resource %d does not exist\n", 382ebf0bd36SAmit Kucheria rconfig->resource); 383ebf0bd36SAmit Kucheria return -EINVAL; 384ebf0bd36SAmit Kucheria } 385ebf0bd36SAmit Kucheria 386ebf0bd36SAmit Kucheria rconfig_addr = res_config_addrs[rconfig->resource]; 387ebf0bd36SAmit Kucheria 388ebf0bd36SAmit Kucheria /* Set resource group */ 3894850f124SPeter Ujfalusi err = twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &grp, 390e97d1546SAmit Kucheria rconfig_addr + DEV_GRP_OFFSET); 391ebf0bd36SAmit Kucheria if (err) { 392ebf0bd36SAmit Kucheria pr_err("TWL4030 Resource %d group could not be read\n", 393ebf0bd36SAmit Kucheria rconfig->resource); 394ebf0bd36SAmit Kucheria return err; 395ebf0bd36SAmit Kucheria } 396ebf0bd36SAmit Kucheria 39756baa667SAaro Koskinen if (rconfig->devgroup != TWL4030_RESCONFIG_UNDEF) { 398e97d1546SAmit Kucheria grp &= ~DEV_GRP_MASK; 399e97d1546SAmit Kucheria grp |= rconfig->devgroup << DEV_GRP_SHIFT; 4004850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 401e97d1546SAmit Kucheria grp, rconfig_addr + DEV_GRP_OFFSET); 402ebf0bd36SAmit Kucheria if (err < 0) { 403ebf0bd36SAmit Kucheria pr_err("TWL4030 failed to program devgroup\n"); 404ebf0bd36SAmit Kucheria return err; 405ebf0bd36SAmit Kucheria } 406ebf0bd36SAmit Kucheria } 407ebf0bd36SAmit Kucheria 408ebf0bd36SAmit Kucheria /* Set resource types */ 4094850f124SPeter Ujfalusi err = twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &type, 410ebf0bd36SAmit Kucheria rconfig_addr + TYPE_OFFSET); 411ebf0bd36SAmit Kucheria if (err < 0) { 412ebf0bd36SAmit Kucheria pr_err("TWL4030 Resource %d type could not be read\n", 413ebf0bd36SAmit Kucheria rconfig->resource); 414ebf0bd36SAmit Kucheria return err; 415ebf0bd36SAmit Kucheria } 416ebf0bd36SAmit Kucheria 41756baa667SAaro Koskinen if (rconfig->type != TWL4030_RESCONFIG_UNDEF) { 418ebf0bd36SAmit Kucheria type &= ~TYPE_MASK; 419ebf0bd36SAmit Kucheria type |= rconfig->type << TYPE_SHIFT; 420ebf0bd36SAmit Kucheria } 421ebf0bd36SAmit Kucheria 42256baa667SAaro Koskinen if (rconfig->type2 != TWL4030_RESCONFIG_UNDEF) { 423ebf0bd36SAmit Kucheria type &= ~TYPE2_MASK; 424ebf0bd36SAmit Kucheria type |= rconfig->type2 << TYPE2_SHIFT; 425ebf0bd36SAmit Kucheria } 426ebf0bd36SAmit Kucheria 4274850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 428ebf0bd36SAmit Kucheria type, rconfig_addr + TYPE_OFFSET); 429ebf0bd36SAmit Kucheria if (err < 0) { 430ebf0bd36SAmit Kucheria pr_err("TWL4030 failed to program resource type\n"); 431ebf0bd36SAmit Kucheria return err; 432ebf0bd36SAmit Kucheria } 433ebf0bd36SAmit Kucheria 434b4ead61eSAmit Kucheria /* Set remap states */ 4354850f124SPeter Ujfalusi err = twl_i2c_read_u8(TWL_MODULE_PM_RECEIVER, &remap, 436b4ead61eSAmit Kucheria rconfig_addr + REMAP_OFFSET); 437b4ead61eSAmit Kucheria if (err < 0) { 438b4ead61eSAmit Kucheria pr_err("TWL4030 Resource %d remap could not be read\n", 439b4ead61eSAmit Kucheria rconfig->resource); 440b4ead61eSAmit Kucheria return err; 441b4ead61eSAmit Kucheria } 442b4ead61eSAmit Kucheria 44353cf9a60SAmit Kucheria if (rconfig->remap_off != TWL4030_RESCONFIG_UNDEF) { 444b4ead61eSAmit Kucheria remap &= ~OFF_STATE_MASK; 445b4ead61eSAmit Kucheria remap |= rconfig->remap_off << OFF_STATE_SHIFT; 446b4ead61eSAmit Kucheria } 447b4ead61eSAmit Kucheria 44853cf9a60SAmit Kucheria if (rconfig->remap_sleep != TWL4030_RESCONFIG_UNDEF) { 449b4ead61eSAmit Kucheria remap &= ~SLEEP_STATE_MASK; 4501ea933f4SMike Turquette remap |= rconfig->remap_sleep << SLEEP_STATE_SHIFT; 451b4ead61eSAmit Kucheria } 452b4ead61eSAmit Kucheria 4534850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_RECEIVER, 454b4ead61eSAmit Kucheria remap, 455b4ead61eSAmit Kucheria rconfig_addr + REMAP_OFFSET); 456b4ead61eSAmit Kucheria if (err < 0) { 457b4ead61eSAmit Kucheria pr_err("TWL4030 failed to program remap\n"); 458b4ead61eSAmit Kucheria return err; 459b4ead61eSAmit Kucheria } 460b4ead61eSAmit Kucheria 461ebf0bd36SAmit Kucheria return 0; 462ebf0bd36SAmit Kucheria } 463ebf0bd36SAmit Kucheria 4645c188d74STony Lindgren static int load_twl4030_script(const struct twl4030_power_data *pdata, 4655c188d74STony Lindgren struct twl4030_script *tscript, 466ebf0bd36SAmit Kucheria u8 address) 467ebf0bd36SAmit Kucheria { 468ebf0bd36SAmit Kucheria int err; 46975a74565SAmit Kucheria static int order; 470ebf0bd36SAmit Kucheria 471ebf0bd36SAmit Kucheria /* Make sure the script isn't going beyond last valid address (0x3f) */ 472ebf0bd36SAmit Kucheria if ((address + tscript->size) > END_OF_SCRIPT) { 473ebf0bd36SAmit Kucheria pr_err("TWL4030 scripts too big error\n"); 474ebf0bd36SAmit Kucheria return -EINVAL; 475ebf0bd36SAmit Kucheria } 476ebf0bd36SAmit Kucheria 477ebf0bd36SAmit Kucheria err = twl4030_write_script(address, tscript->script, tscript->size); 478ebf0bd36SAmit Kucheria if (err) 479ebf0bd36SAmit Kucheria goto out; 480ebf0bd36SAmit Kucheria 481ebf0bd36SAmit Kucheria if (tscript->flags & TWL4030_WRST_SCRIPT) { 482ebf0bd36SAmit Kucheria err = twl4030_config_warmreset_sequence(address); 483ebf0bd36SAmit Kucheria if (err) 484ebf0bd36SAmit Kucheria goto out; 485ebf0bd36SAmit Kucheria } 486ebf0bd36SAmit Kucheria if (tscript->flags & TWL4030_WAKEUP12_SCRIPT) { 487fc7d76e4STony Lindgren /* Reset any existing sleep script to avoid hangs on reboot */ 488fc7d76e4STony Lindgren err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, END_OF_SCRIPT, 489fc7d76e4STony Lindgren R_SEQ_ADD_A2S); 490fc7d76e4STony Lindgren if (err) 491fc7d76e4STony Lindgren goto out; 492fc7d76e4STony Lindgren 4935c188d74STony Lindgren err = twl4030_config_wakeup12_sequence(pdata, address); 494ebf0bd36SAmit Kucheria if (err) 495ebf0bd36SAmit Kucheria goto out; 49675a74565SAmit Kucheria order = 1; 497ebf0bd36SAmit Kucheria } 498ebf0bd36SAmit Kucheria if (tscript->flags & TWL4030_WAKEUP3_SCRIPT) { 499ebf0bd36SAmit Kucheria err = twl4030_config_wakeup3_sequence(address); 500ebf0bd36SAmit Kucheria if (err) 501ebf0bd36SAmit Kucheria goto out; 502ebf0bd36SAmit Kucheria } 503c62dd365SLesly A M if (tscript->flags & TWL4030_SLEEP_SCRIPT) { 5041f968ff6SLesly A M if (!order) 50581d30edaSJoe Perches pr_warn("TWL4030: Bad order of scripts (sleep script before wakeup) Leads to boot failure on some boards\n"); 506ebf0bd36SAmit Kucheria err = twl4030_config_sleep_sequence(address); 507c62dd365SLesly A M } 508ebf0bd36SAmit Kucheria out: 509ebf0bd36SAmit Kucheria return err; 510ebf0bd36SAmit Kucheria } 511ebf0bd36SAmit Kucheria 51211a441ceSMike Turquette int twl4030_remove_script(u8 flags) 51311a441ceSMike Turquette { 51411a441ceSMike Turquette int err = 0; 51511a441ceSMike Turquette 5164850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG1, 51771084406SFelipe Balbi TWL4030_PM_MASTER_PROTECT_KEY); 51811a441ceSMike Turquette if (err) { 51911a441ceSMike Turquette pr_err("twl4030: unable to unlock PROTECT_KEY\n"); 52011a441ceSMike Turquette return err; 52111a441ceSMike Turquette } 52211a441ceSMike Turquette 5234850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG2, 52471084406SFelipe Balbi TWL4030_PM_MASTER_PROTECT_KEY); 52511a441ceSMike Turquette if (err) { 52611a441ceSMike Turquette pr_err("twl4030: unable to unlock PROTECT_KEY\n"); 52711a441ceSMike Turquette return err; 52811a441ceSMike Turquette } 52911a441ceSMike Turquette 53011a441ceSMike Turquette if (flags & TWL4030_WRST_SCRIPT) { 5314850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, END_OF_SCRIPT, 53211a441ceSMike Turquette R_SEQ_ADD_WARM); 53311a441ceSMike Turquette if (err) 53411a441ceSMike Turquette return err; 53511a441ceSMike Turquette } 53611a441ceSMike Turquette if (flags & TWL4030_WAKEUP12_SCRIPT) { 5374850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, END_OF_SCRIPT, 53811a441ceSMike Turquette R_SEQ_ADD_S2A12); 539eac78a21SLesly A M if (err) 54011a441ceSMike Turquette return err; 54111a441ceSMike Turquette } 54211a441ceSMike Turquette if (flags & TWL4030_WAKEUP3_SCRIPT) { 5434850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, END_OF_SCRIPT, 54411a441ceSMike Turquette R_SEQ_ADD_S2A3); 54511a441ceSMike Turquette if (err) 54611a441ceSMike Turquette return err; 54711a441ceSMike Turquette } 54811a441ceSMike Turquette if (flags & TWL4030_SLEEP_SCRIPT) { 5494850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, END_OF_SCRIPT, 55011a441ceSMike Turquette R_SEQ_ADD_A2S); 55111a441ceSMike Turquette if (err) 55211a441ceSMike Turquette return err; 55311a441ceSMike Turquette } 55411a441ceSMike Turquette 5554850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, 0, 55671084406SFelipe Balbi TWL4030_PM_MASTER_PROTECT_KEY); 55711a441ceSMike Turquette if (err) 55811a441ceSMike Turquette pr_err("TWL4030 Unable to relock registers\n"); 55911a441ceSMike Turquette 56011a441ceSMike Turquette return err; 56111a441ceSMike Turquette } 56211a441ceSMike Turquette 563e7cd1d1eSTony Lindgren static int 564e7cd1d1eSTony Lindgren twl4030_power_configure_scripts(const struct twl4030_power_data *pdata) 565f58cb407SFlorian Vaussard { 566f58cb407SFlorian Vaussard int err; 567f58cb407SFlorian Vaussard int i; 568f58cb407SFlorian Vaussard u8 address = twl4030_start_script_address; 569f58cb407SFlorian Vaussard 570f58cb407SFlorian Vaussard for (i = 0; i < pdata->num; i++) { 5715c188d74STony Lindgren err = load_twl4030_script(pdata, pdata->scripts[i], address); 572f58cb407SFlorian Vaussard if (err) 573f58cb407SFlorian Vaussard return err; 574f58cb407SFlorian Vaussard address += pdata->scripts[i]->size; 575f58cb407SFlorian Vaussard } 576f58cb407SFlorian Vaussard 577f58cb407SFlorian Vaussard return 0; 578f58cb407SFlorian Vaussard } 579f58cb407SFlorian Vaussard 580482e7db1STony Lindgren static void twl4030_patch_rconfig(struct twl4030_resconfig *common, 581482e7db1STony Lindgren struct twl4030_resconfig *board) 582482e7db1STony Lindgren { 583482e7db1STony Lindgren while (common->resource) { 584482e7db1STony Lindgren struct twl4030_resconfig *b = board; 585482e7db1STony Lindgren 586482e7db1STony Lindgren while (b->resource) { 587482e7db1STony Lindgren if (b->resource == common->resource) { 588482e7db1STony Lindgren *common = *b; 589482e7db1STony Lindgren break; 590482e7db1STony Lindgren } 591482e7db1STony Lindgren b++; 592482e7db1STony Lindgren } 593482e7db1STony Lindgren common++; 594482e7db1STony Lindgren } 595482e7db1STony Lindgren } 596482e7db1STony Lindgren 597e7cd1d1eSTony Lindgren static int 598e7cd1d1eSTony Lindgren twl4030_power_configure_resources(const struct twl4030_power_data *pdata) 599f58cb407SFlorian Vaussard { 600f58cb407SFlorian Vaussard struct twl4030_resconfig *resconfig = pdata->resource_config; 601482e7db1STony Lindgren struct twl4030_resconfig *boardconf = pdata->board_config; 602f58cb407SFlorian Vaussard int err; 603f58cb407SFlorian Vaussard 604f58cb407SFlorian Vaussard if (resconfig) { 605482e7db1STony Lindgren if (boardconf) 606482e7db1STony Lindgren twl4030_patch_rconfig(resconfig, boardconf); 607482e7db1STony Lindgren 608f58cb407SFlorian Vaussard while (resconfig->resource) { 609f58cb407SFlorian Vaussard err = twl4030_configure_resource(resconfig); 610f58cb407SFlorian Vaussard if (err) 611f58cb407SFlorian Vaussard return err; 612f58cb407SFlorian Vaussard resconfig++; 613f58cb407SFlorian Vaussard } 614f58cb407SFlorian Vaussard } 615f58cb407SFlorian Vaussard 616f58cb407SFlorian Vaussard return 0; 617f58cb407SFlorian Vaussard } 618f58cb407SFlorian Vaussard 619481c7f86STony Lindgren static int twl4030_starton_mask_and_set(u8 bitmask, u8 bitvalues) 620481c7f86STony Lindgren { 621481c7f86STony Lindgren u8 regs[3] = { TWL4030_PM_MASTER_CFG_P1_TRANSITION, 622481c7f86STony Lindgren TWL4030_PM_MASTER_CFG_P2_TRANSITION, 623481c7f86STony Lindgren TWL4030_PM_MASTER_CFG_P3_TRANSITION, }; 624481c7f86STony Lindgren u8 val; 625481c7f86STony Lindgren int i, err; 626481c7f86STony Lindgren 627481c7f86STony Lindgren err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG1, 628481c7f86STony Lindgren TWL4030_PM_MASTER_PROTECT_KEY); 629481c7f86STony Lindgren if (err) 630481c7f86STony Lindgren goto relock; 631481c7f86STony Lindgren err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, 632481c7f86STony Lindgren TWL4030_PM_MASTER_KEY_CFG2, 633481c7f86STony Lindgren TWL4030_PM_MASTER_PROTECT_KEY); 634481c7f86STony Lindgren if (err) 635481c7f86STony Lindgren goto relock; 636481c7f86STony Lindgren 637481c7f86STony Lindgren for (i = 0; i < sizeof(regs); i++) { 638481c7f86STony Lindgren err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, 639481c7f86STony Lindgren &val, regs[i]); 640481c7f86STony Lindgren if (err) 641481c7f86STony Lindgren break; 642481c7f86STony Lindgren val = (~bitmask & val) | (bitmask & bitvalues); 643481c7f86STony Lindgren err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, 644481c7f86STony Lindgren val, regs[i]); 645481c7f86STony Lindgren if (err) 646481c7f86STony Lindgren break; 647481c7f86STony Lindgren } 648481c7f86STony Lindgren 649481c7f86STony Lindgren if (err) 650481c7f86STony Lindgren pr_err("TWL4030 Register access failed: %i\n", err); 651481c7f86STony Lindgren 652481c7f86STony Lindgren relock: 653481c7f86STony Lindgren return twl_i2c_write_u8(TWL_MODULE_PM_MASTER, 0, 654481c7f86STony Lindgren TWL4030_PM_MASTER_PROTECT_KEY); 655481c7f86STony Lindgren } 656481c7f86STony Lindgren 65726cc3ab9SIgor Grinberg /* 65826cc3ab9SIgor Grinberg * In master mode, start the power off sequence. 65926cc3ab9SIgor Grinberg * After a successful execution, TWL shuts down the power to the SoC 66026cc3ab9SIgor Grinberg * and all peripherals connected to it. 66126cc3ab9SIgor Grinberg */ 66226cc3ab9SIgor Grinberg void twl4030_power_off(void) 66326cc3ab9SIgor Grinberg { 66426cc3ab9SIgor Grinberg int err; 66526cc3ab9SIgor Grinberg 666481c7f86STony Lindgren /* Disable start on charger or VBUS as it can break poweroff */ 667481c7f86STony Lindgren err = twl4030_starton_mask_and_set(STARTON_VBUS | STARTON_CHG, 0); 668481c7f86STony Lindgren if (err) 669481c7f86STony Lindgren pr_err("TWL4030 Unable to configure start-up\n"); 670481c7f86STony Lindgren 6714850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, PWR_DEVOFF, 67226cc3ab9SIgor Grinberg TWL4030_PM_MASTER_P1_SW_EVENTS); 67326cc3ab9SIgor Grinberg if (err) 67426cc3ab9SIgor Grinberg pr_err("TWL4030 Unable to power off\n"); 67526cc3ab9SIgor Grinberg } 67626cc3ab9SIgor Grinberg 677e7cd1d1eSTony Lindgren static bool twl4030_power_use_poweroff(const struct twl4030_power_data *pdata, 678b0fc1da4SFlorian Vaussard struct device_node *node) 679b0fc1da4SFlorian Vaussard { 680b0fc1da4SFlorian Vaussard if (pdata && pdata->use_poweroff) 681b0fc1da4SFlorian Vaussard return true; 682b0fc1da4SFlorian Vaussard 683fecc4452SNishanth Menon if (of_property_read_bool(node, "ti,system-power-controller")) 684fecc4452SNishanth Menon return true; 685fecc4452SNishanth Menon 686b0fc1da4SFlorian Vaussard if (of_property_read_bool(node, "ti,use_poweroff")) 687b0fc1da4SFlorian Vaussard return true; 688b0fc1da4SFlorian Vaussard 689b0fc1da4SFlorian Vaussard return false; 690b0fc1da4SFlorian Vaussard } 691b0fc1da4SFlorian Vaussard 692e7cd1d1eSTony Lindgren #ifdef CONFIG_OF 693e7cd1d1eSTony Lindgren 694e7cd1d1eSTony Lindgren /* Generic warm reset configuration for omap3 */ 695e7cd1d1eSTony Lindgren 696e7cd1d1eSTony Lindgren static struct twl4030_ins omap3_wrst_seq[] = { 697e7cd1d1eSTony Lindgren TWL_RESOURCE_OFF(RES_NRES_PWRON), 698e7cd1d1eSTony Lindgren TWL_RESOURCE_OFF(RES_RESET), 699e7cd1d1eSTony Lindgren TWL_RESOURCE_RESET(RES_MAIN_REF), 700e7cd1d1eSTony Lindgren TWL_RESOURCE_GROUP_RESET(RES_GRP_ALL, RES_TYPE_R0, RES_TYPE2_R2), 701e7cd1d1eSTony Lindgren TWL_RESOURCE_RESET(RES_VUSB_3V1), 702ad48ed0cSAdam Ford TWL_RESOURCE_RESET(RES_VMMC1), 703e7cd1d1eSTony Lindgren TWL_RESOURCE_GROUP_RESET(RES_GRP_ALL, RES_TYPE_R0, RES_TYPE2_R1), 704e7cd1d1eSTony Lindgren TWL_RESOURCE_GROUP_RESET(RES_GRP_RC, RES_TYPE_ALL, RES_TYPE2_R0), 705e7cd1d1eSTony Lindgren TWL_RESOURCE_ON(RES_RESET), 706e7cd1d1eSTony Lindgren TWL_RESOURCE_ON(RES_NRES_PWRON), 707e7cd1d1eSTony Lindgren }; 708e7cd1d1eSTony Lindgren 709e7cd1d1eSTony Lindgren static struct twl4030_script omap3_wrst_script = { 710e7cd1d1eSTony Lindgren .script = omap3_wrst_seq, 711e7cd1d1eSTony Lindgren .size = ARRAY_SIZE(omap3_wrst_seq), 712e7cd1d1eSTony Lindgren .flags = TWL4030_WRST_SCRIPT, 713e7cd1d1eSTony Lindgren }; 714e7cd1d1eSTony Lindgren 715e7cd1d1eSTony Lindgren static struct twl4030_script *omap3_reset_scripts[] = { 716e7cd1d1eSTony Lindgren &omap3_wrst_script, 717e7cd1d1eSTony Lindgren }; 718e7cd1d1eSTony Lindgren 719e7cd1d1eSTony Lindgren static struct twl4030_resconfig omap3_rconfig[] = { 720e7cd1d1eSTony Lindgren TWL_REMAP_SLEEP(RES_HFCLKOUT, DEV_GRP_P3, -1, -1), 721e7cd1d1eSTony Lindgren TWL_REMAP_SLEEP(RES_VDD1, DEV_GRP_P1, -1, -1), 722e7cd1d1eSTony Lindgren TWL_REMAP_SLEEP(RES_VDD2, DEV_GRP_P1, -1, -1), 723e7cd1d1eSTony Lindgren { 0, 0 }, 724e7cd1d1eSTony Lindgren }; 725e7cd1d1eSTony Lindgren 726e7cd1d1eSTony Lindgren static struct twl4030_power_data omap3_reset = { 727e7cd1d1eSTony Lindgren .scripts = omap3_reset_scripts, 728e7cd1d1eSTony Lindgren .num = ARRAY_SIZE(omap3_reset_scripts), 729e7cd1d1eSTony Lindgren .resource_config = omap3_rconfig, 730e7cd1d1eSTony Lindgren }; 731e7cd1d1eSTony Lindgren 73276714d2cSTony Lindgren /* Recommended generic default idle configuration for off-idle */ 73376714d2cSTony Lindgren 73476714d2cSTony Lindgren /* Broadcast message to put res to sleep */ 73576714d2cSTony Lindgren static struct twl4030_ins omap3_idle_sleep_on_seq[] = { 73676714d2cSTony Lindgren TWL_RESOURCE_GROUP_SLEEP(RES_GRP_ALL, RES_TYPE_ALL, 0), 73776714d2cSTony Lindgren }; 73876714d2cSTony Lindgren 73976714d2cSTony Lindgren static struct twl4030_script omap3_idle_sleep_on_script = { 74076714d2cSTony Lindgren .script = omap3_idle_sleep_on_seq, 74176714d2cSTony Lindgren .size = ARRAY_SIZE(omap3_idle_sleep_on_seq), 74276714d2cSTony Lindgren .flags = TWL4030_SLEEP_SCRIPT, 74376714d2cSTony Lindgren }; 74476714d2cSTony Lindgren 74576714d2cSTony Lindgren /* Broadcast message to put res to active */ 74676714d2cSTony Lindgren static struct twl4030_ins omap3_idle_wakeup_p12_seq[] = { 74776714d2cSTony Lindgren TWL_RESOURCE_GROUP_ACTIVE(RES_GRP_ALL, RES_TYPE_ALL, 0), 74876714d2cSTony Lindgren }; 74976714d2cSTony Lindgren 75076714d2cSTony Lindgren static struct twl4030_script omap3_idle_wakeup_p12_script = { 75176714d2cSTony Lindgren .script = omap3_idle_wakeup_p12_seq, 75276714d2cSTony Lindgren .size = ARRAY_SIZE(omap3_idle_wakeup_p12_seq), 75376714d2cSTony Lindgren .flags = TWL4030_WAKEUP12_SCRIPT, 75476714d2cSTony Lindgren }; 75576714d2cSTony Lindgren 75676714d2cSTony Lindgren /* Broadcast message to put res to active */ 75776714d2cSTony Lindgren static struct twl4030_ins omap3_idle_wakeup_p3_seq[] = { 75876714d2cSTony Lindgren TWL_RESOURCE_SET_ACTIVE(RES_CLKEN, 0x37), 75976714d2cSTony Lindgren TWL_RESOURCE_GROUP_ACTIVE(RES_GRP_ALL, RES_TYPE_ALL, 0), 76076714d2cSTony Lindgren }; 76176714d2cSTony Lindgren 76276714d2cSTony Lindgren static struct twl4030_script omap3_idle_wakeup_p3_script = { 76376714d2cSTony Lindgren .script = omap3_idle_wakeup_p3_seq, 76476714d2cSTony Lindgren .size = ARRAY_SIZE(omap3_idle_wakeup_p3_seq), 76576714d2cSTony Lindgren .flags = TWL4030_WAKEUP3_SCRIPT, 76676714d2cSTony Lindgren }; 76776714d2cSTony Lindgren 76876714d2cSTony Lindgren static struct twl4030_script *omap3_idle_scripts[] = { 76976714d2cSTony Lindgren &omap3_idle_wakeup_p12_script, 77076714d2cSTony Lindgren &omap3_idle_wakeup_p3_script, 77176714d2cSTony Lindgren &omap3_wrst_script, 77276714d2cSTony Lindgren &omap3_idle_sleep_on_script, 77376714d2cSTony Lindgren }; 77476714d2cSTony Lindgren 77576714d2cSTony Lindgren /* 77676714d2cSTony Lindgren * Recommended configuration based on "Recommended Sleep 77776714d2cSTony Lindgren * Sequences for the Zoom Platform": 77876714d2cSTony Lindgren * http://omappedia.com/wiki/File:Recommended_Sleep_Sequences_Zoom.pdf 77976714d2cSTony Lindgren * Note that the type1 and type2 seem to be just the init order number 78076714d2cSTony Lindgren * for type1 and type2 groups as specified in the document mentioned 78176714d2cSTony Lindgren * above. 78276714d2cSTony Lindgren */ 78376714d2cSTony Lindgren static struct twl4030_resconfig omap3_idle_rconfig[] = { 784daebabd5STony Lindgren TWL_REMAP_SLEEP(RES_VAUX1, TWL4030_RESCONFIG_UNDEF, 0, 0), 785daebabd5STony Lindgren TWL_REMAP_SLEEP(RES_VAUX2, TWL4030_RESCONFIG_UNDEF, 0, 0), 786daebabd5STony Lindgren TWL_REMAP_SLEEP(RES_VAUX3, TWL4030_RESCONFIG_UNDEF, 0, 0), 787daebabd5STony Lindgren TWL_REMAP_SLEEP(RES_VAUX4, TWL4030_RESCONFIG_UNDEF, 0, 0), 788daebabd5STony Lindgren TWL_REMAP_SLEEP(RES_VMMC1, TWL4030_RESCONFIG_UNDEF, 0, 0), 789daebabd5STony Lindgren TWL_REMAP_SLEEP(RES_VMMC2, TWL4030_RESCONFIG_UNDEF, 0, 0), 79076714d2cSTony Lindgren TWL_REMAP_OFF(RES_VPLL1, DEV_GRP_P1, 3, 1), 79176714d2cSTony Lindgren TWL_REMAP_SLEEP(RES_VPLL2, DEV_GRP_P1, 0, 0), 792daebabd5STony Lindgren TWL_REMAP_SLEEP(RES_VSIM, TWL4030_RESCONFIG_UNDEF, 0, 0), 793daebabd5STony Lindgren TWL_REMAP_SLEEP(RES_VDAC, TWL4030_RESCONFIG_UNDEF, 0, 0), 79476714d2cSTony Lindgren TWL_REMAP_SLEEP(RES_VINTANA1, TWL_DEV_GRP_P123, 1, 2), 79576714d2cSTony Lindgren TWL_REMAP_SLEEP(RES_VINTANA2, TWL_DEV_GRP_P123, 0, 2), 79676714d2cSTony Lindgren TWL_REMAP_SLEEP(RES_VINTDIG, TWL_DEV_GRP_P123, 1, 2), 79776714d2cSTony Lindgren TWL_REMAP_SLEEP(RES_VIO, TWL_DEV_GRP_P123, 2, 2), 79876714d2cSTony Lindgren TWL_REMAP_OFF(RES_VDD1, DEV_GRP_P1, 4, 1), 79976714d2cSTony Lindgren TWL_REMAP_OFF(RES_VDD2, DEV_GRP_P1, 3, 1), 800daebabd5STony Lindgren TWL_REMAP_SLEEP(RES_VUSB_1V5, TWL4030_RESCONFIG_UNDEF, 0, 0), 801daebabd5STony Lindgren TWL_REMAP_SLEEP(RES_VUSB_1V8, TWL4030_RESCONFIG_UNDEF, 0, 0), 80276714d2cSTony Lindgren TWL_REMAP_SLEEP(RES_VUSB_3V1, TWL_DEV_GRP_P123, 0, 0), 80376714d2cSTony Lindgren /* Resource #20 USB charge pump skipped */ 80476714d2cSTony Lindgren TWL_REMAP_SLEEP(RES_REGEN, TWL_DEV_GRP_P123, 2, 1), 80576714d2cSTony Lindgren TWL_REMAP_SLEEP(RES_NRES_PWRON, TWL_DEV_GRP_P123, 0, 1), 80676714d2cSTony Lindgren TWL_REMAP_SLEEP(RES_CLKEN, TWL_DEV_GRP_P123, 3, 2), 80776714d2cSTony Lindgren TWL_REMAP_SLEEP(RES_SYSEN, TWL_DEV_GRP_P123, 6, 1), 80876714d2cSTony Lindgren TWL_REMAP_SLEEP(RES_HFCLKOUT, DEV_GRP_P3, 0, 2), 80976714d2cSTony Lindgren TWL_REMAP_SLEEP(RES_32KCLKOUT, TWL_DEV_GRP_P123, 0, 0), 81076714d2cSTony Lindgren TWL_REMAP_SLEEP(RES_RESET, TWL_DEV_GRP_P123, 6, 0), 81176714d2cSTony Lindgren TWL_REMAP_SLEEP(RES_MAIN_REF, TWL_DEV_GRP_P123, 0, 0), 81276714d2cSTony Lindgren { /* Terminator */ }, 81376714d2cSTony Lindgren }; 81476714d2cSTony Lindgren 81576714d2cSTony Lindgren static struct twl4030_power_data omap3_idle = { 81676714d2cSTony Lindgren .scripts = omap3_idle_scripts, 81776714d2cSTony Lindgren .num = ARRAY_SIZE(omap3_idle_scripts), 81876714d2cSTony Lindgren .resource_config = omap3_idle_rconfig, 81976714d2cSTony Lindgren }; 82076714d2cSTony Lindgren 82143fef47fSTony Lindgren /* Disable 32 KiHz oscillator during idle */ 82243fef47fSTony Lindgren static struct twl4030_resconfig osc_off_rconfig[] = { 82343fef47fSTony Lindgren TWL_REMAP_OFF(RES_CLKEN, DEV_GRP_P1 | DEV_GRP_P3, 3, 2), 82443fef47fSTony Lindgren { /* Terminator */ }, 82543fef47fSTony Lindgren }; 82643fef47fSTony Lindgren 82743fef47fSTony Lindgren static struct twl4030_power_data osc_off_idle = { 82843fef47fSTony Lindgren .scripts = omap3_idle_scripts, 82943fef47fSTony Lindgren .num = ARRAY_SIZE(omap3_idle_scripts), 83043fef47fSTony Lindgren .resource_config = omap3_idle_rconfig, 83143fef47fSTony Lindgren .board_config = osc_off_rconfig, 83243fef47fSTony Lindgren }; 83343fef47fSTony Lindgren 8345c188d74STony Lindgren static struct twl4030_power_data omap3_idle_ac_quirk = { 8355c188d74STony Lindgren .scripts = omap3_idle_scripts, 8365c188d74STony Lindgren .num = ARRAY_SIZE(omap3_idle_scripts), 8375c188d74STony Lindgren .resource_config = omap3_idle_rconfig, 8385c188d74STony Lindgren .ac_charger_quirk = true, 8395c188d74STony Lindgren }; 8405c188d74STony Lindgren 8415c188d74STony Lindgren static struct twl4030_power_data omap3_idle_ac_quirk_osc_off = { 8425c188d74STony Lindgren .scripts = omap3_idle_scripts, 8435c188d74STony Lindgren .num = ARRAY_SIZE(omap3_idle_scripts), 8445c188d74STony Lindgren .resource_config = omap3_idle_rconfig, 8455c188d74STony Lindgren .board_config = osc_off_rconfig, 8465c188d74STony Lindgren .ac_charger_quirk = true, 8475c188d74STony Lindgren }; 8485c188d74STony Lindgren 849908725d5SFabian Frederick static const struct of_device_id twl4030_power_of_match[] = { 850e7cd1d1eSTony Lindgren { 8511b9b46d0STony Lindgren .compatible = "ti,twl4030-power", 8521b9b46d0STony Lindgren }, 8531b9b46d0STony Lindgren { 854e7cd1d1eSTony Lindgren .compatible = "ti,twl4030-power-reset", 855e7cd1d1eSTony Lindgren .data = &omap3_reset, 856e7cd1d1eSTony Lindgren }, 85776714d2cSTony Lindgren { 85876714d2cSTony Lindgren .compatible = "ti,twl4030-power-idle", 85976714d2cSTony Lindgren .data = &omap3_idle, 86076714d2cSTony Lindgren }, 86143fef47fSTony Lindgren { 86243fef47fSTony Lindgren .compatible = "ti,twl4030-power-idle-osc-off", 86343fef47fSTony Lindgren .data = &osc_off_idle, 86443fef47fSTony Lindgren }, 8655c188d74STony Lindgren { 8665c188d74STony Lindgren .compatible = "ti,twl4030-power-omap3-sdp", 8675c188d74STony Lindgren .data = &omap3_idle_ac_quirk, 8685c188d74STony Lindgren }, 8695c188d74STony Lindgren { 8705c188d74STony Lindgren .compatible = "ti,twl4030-power-omap3-ldp", 8715c188d74STony Lindgren .data = &omap3_idle_ac_quirk_osc_off, 8725c188d74STony Lindgren }, 8735c188d74STony Lindgren { 8745c188d74STony Lindgren .compatible = "ti,twl4030-power-omap3-evm", 8755c188d74STony Lindgren .data = &omap3_idle_ac_quirk, 8765c188d74STony Lindgren }, 877e7cd1d1eSTony Lindgren { }, 878e7cd1d1eSTony Lindgren }; 879e7cd1d1eSTony Lindgren MODULE_DEVICE_TABLE(of, twl4030_power_of_match); 880e7cd1d1eSTony Lindgren #endif /* CONFIG_OF */ 881e7cd1d1eSTony Lindgren 882fae01582SJingoo Han static int twl4030_power_probe(struct platform_device *pdev) 883ebf0bd36SAmit Kucheria { 884e7cd1d1eSTony Lindgren const struct twl4030_power_data *pdata = dev_get_platdata(&pdev->dev); 885b0fc1da4SFlorian Vaussard struct device_node *node = pdev->dev.of_node; 886e7cd1d1eSTony Lindgren const struct of_device_id *match; 887ebf0bd36SAmit Kucheria int err = 0; 888cb3cabd6SFlorian Vaussard int err2 = 0; 889f58cb407SFlorian Vaussard u8 val; 890ebf0bd36SAmit Kucheria 891b0fc1da4SFlorian Vaussard if (!pdata && !node) { 892b0fc1da4SFlorian Vaussard dev_err(&pdev->dev, "Platform data is missing\n"); 893b0fc1da4SFlorian Vaussard return -EINVAL; 894b0fc1da4SFlorian Vaussard } 895b0fc1da4SFlorian Vaussard 8964850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, TWL4030_PM_MASTER_KEY_CFG1, 89771084406SFelipe Balbi TWL4030_PM_MASTER_PROTECT_KEY); 898e77a4c2fSFlorian Vaussard err |= twl_i2c_write_u8(TWL_MODULE_PM_MASTER, 899e77a4c2fSFlorian Vaussard TWL4030_PM_MASTER_KEY_CFG2, 90071084406SFelipe Balbi TWL4030_PM_MASTER_PROTECT_KEY); 901e77a4c2fSFlorian Vaussard 902e77a4c2fSFlorian Vaussard if (err) { 903e77a4c2fSFlorian Vaussard pr_err("TWL4030 Unable to unlock registers\n"); 904e77a4c2fSFlorian Vaussard return err; 905e77a4c2fSFlorian Vaussard } 906ebf0bd36SAmit Kucheria 907e7cd1d1eSTony Lindgren match = of_match_device(of_match_ptr(twl4030_power_of_match), 908e7cd1d1eSTony Lindgren &pdev->dev); 909e7cd1d1eSTony Lindgren if (match && match->data) 910e7cd1d1eSTony Lindgren pdata = match->data; 911e7cd1d1eSTony Lindgren 912b0fc1da4SFlorian Vaussard if (pdata) { 913f58cb407SFlorian Vaussard err = twl4030_power_configure_scripts(pdata); 914e77a4c2fSFlorian Vaussard if (err) { 915e77a4c2fSFlorian Vaussard pr_err("TWL4030 failed to load scripts\n"); 916cb3cabd6SFlorian Vaussard goto relock; 917e77a4c2fSFlorian Vaussard } 918f58cb407SFlorian Vaussard err = twl4030_power_configure_resources(pdata); 919e77a4c2fSFlorian Vaussard if (err) { 920e77a4c2fSFlorian Vaussard pr_err("TWL4030 failed to configure resource\n"); 921cb3cabd6SFlorian Vaussard goto relock; 922e77a4c2fSFlorian Vaussard } 923b0fc1da4SFlorian Vaussard } 924ebf0bd36SAmit Kucheria 92526cc3ab9SIgor Grinberg /* Board has to be wired properly to use this feature */ 926b0fc1da4SFlorian Vaussard if (twl4030_power_use_poweroff(pdata, node) && !pm_power_off) { 92726cc3ab9SIgor Grinberg /* Default for SEQ_OFFSYNC is set, lets ensure this */ 9284850f124SPeter Ujfalusi err = twl_i2c_read_u8(TWL_MODULE_PM_MASTER, &val, 92926cc3ab9SIgor Grinberg TWL4030_PM_MASTER_CFG_P123_TRANSITION); 93026cc3ab9SIgor Grinberg if (err) { 93181d30edaSJoe Perches pr_warn("TWL4030 Unable to read registers\n"); 93226cc3ab9SIgor Grinberg } else if (!(val & SEQ_OFFSYNC)) { 93326cc3ab9SIgor Grinberg val |= SEQ_OFFSYNC; 9344850f124SPeter Ujfalusi err = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, val, 93526cc3ab9SIgor Grinberg TWL4030_PM_MASTER_CFG_P123_TRANSITION); 93626cc3ab9SIgor Grinberg if (err) { 93726cc3ab9SIgor Grinberg pr_err("TWL4030 Unable to setup SEQ_OFFSYNC\n"); 93826cc3ab9SIgor Grinberg goto relock; 93926cc3ab9SIgor Grinberg } 94026cc3ab9SIgor Grinberg } 94126cc3ab9SIgor Grinberg 94226cc3ab9SIgor Grinberg pm_power_off = twl4030_power_off; 94326cc3ab9SIgor Grinberg } 94426cc3ab9SIgor Grinberg 94526cc3ab9SIgor Grinberg relock: 946cb3cabd6SFlorian Vaussard err2 = twl_i2c_write_u8(TWL_MODULE_PM_MASTER, 0, 94771084406SFelipe Balbi TWL4030_PM_MASTER_PROTECT_KEY); 948cb3cabd6SFlorian Vaussard if (err2) { 949ebf0bd36SAmit Kucheria pr_err("TWL4030 Unable to relock registers\n"); 950cb3cabd6SFlorian Vaussard return err2; 951cb3cabd6SFlorian Vaussard } 952cb3cabd6SFlorian Vaussard 953637d6895SFlorian Vaussard return err; 954ebf0bd36SAmit Kucheria } 955637d6895SFlorian Vaussard 956637d6895SFlorian Vaussard static int twl4030_power_remove(struct platform_device *pdev) 957637d6895SFlorian Vaussard { 958637d6895SFlorian Vaussard return 0; 959637d6895SFlorian Vaussard } 960637d6895SFlorian Vaussard 961637d6895SFlorian Vaussard static struct platform_driver twl4030_power_driver = { 962637d6895SFlorian Vaussard .driver = { 963637d6895SFlorian Vaussard .name = "twl4030_power", 964b0fc1da4SFlorian Vaussard .of_match_table = of_match_ptr(twl4030_power_of_match), 965637d6895SFlorian Vaussard }, 966637d6895SFlorian Vaussard .probe = twl4030_power_probe, 967637d6895SFlorian Vaussard .remove = twl4030_power_remove, 968637d6895SFlorian Vaussard }; 969637d6895SFlorian Vaussard 970637d6895SFlorian Vaussard module_platform_driver(twl4030_power_driver); 971637d6895SFlorian Vaussard 972637d6895SFlorian Vaussard MODULE_AUTHOR("Nokia Corporation"); 973637d6895SFlorian Vaussard MODULE_AUTHOR("Texas Instruments, Inc."); 974637d6895SFlorian Vaussard MODULE_DESCRIPTION("Power management for TWL4030"); 975637d6895SFlorian Vaussard MODULE_LICENSE("GPL"); 976637d6895SFlorian Vaussard MODULE_ALIAS("platform:twl4030_power"); 977