12f17dd34SAndrew Lunn // SPDX-License-Identifier: GPL-2.0+ 22f17dd34SAndrew Lunn /* 32f17dd34SAndrew Lunn * TQ-Systems PLD MFD core driver, based on vendor driver by 42f17dd34SAndrew Lunn * Vadim V.Vlasov <vvlasov@dev.rtsoft.ru> 52f17dd34SAndrew Lunn * 62f17dd34SAndrew Lunn * Copyright (c) 2015 TQ-Systems GmbH 72f17dd34SAndrew Lunn * Copyright (c) 2019 Andrew Lunn <andrew@lunn.ch> 82f17dd34SAndrew Lunn */ 92f17dd34SAndrew Lunn 102f17dd34SAndrew Lunn #include <linux/delay.h> 112f17dd34SAndrew Lunn #include <linux/dmi.h> 122f17dd34SAndrew Lunn #include <linux/i2c.h> 132f17dd34SAndrew Lunn #include <linux/io.h> 142f17dd34SAndrew Lunn #include <linux/mfd/core.h> 152f17dd34SAndrew Lunn #include <linux/module.h> 162f17dd34SAndrew Lunn #include <linux/platform_data/i2c-ocores.h> 172f17dd34SAndrew Lunn #include <linux/platform_device.h> 182f17dd34SAndrew Lunn 19*051c69ffSMatthias Schiffer #define TQMX86_IOBASE 0x180 20*051c69ffSMatthias Schiffer #define TQMX86_IOSIZE 0x20 212f17dd34SAndrew Lunn #define TQMX86_IOBASE_I2C 0x1a0 222f17dd34SAndrew Lunn #define TQMX86_IOSIZE_I2C 0xa 232f17dd34SAndrew Lunn #define TQMX86_IOBASE_WATCHDOG 0x18b 242f17dd34SAndrew Lunn #define TQMX86_IOSIZE_WATCHDOG 0x2 252f17dd34SAndrew Lunn #define TQMX86_IOBASE_GPIO 0x18d 262f17dd34SAndrew Lunn #define TQMX86_IOSIZE_GPIO 0x4 272f17dd34SAndrew Lunn 28*051c69ffSMatthias Schiffer #define TQMX86_REG_BOARD_ID 0x00 292f17dd34SAndrew Lunn #define TQMX86_REG_BOARD_ID_E38M 1 302f17dd34SAndrew Lunn #define TQMX86_REG_BOARD_ID_50UC 2 312f17dd34SAndrew Lunn #define TQMX86_REG_BOARD_ID_E38C 3 322f17dd34SAndrew Lunn #define TQMX86_REG_BOARD_ID_60EB 4 332f17dd34SAndrew Lunn #define TQMX86_REG_BOARD_ID_E39M 5 342f17dd34SAndrew Lunn #define TQMX86_REG_BOARD_ID_E39C 6 352f17dd34SAndrew Lunn #define TQMX86_REG_BOARD_ID_E39x 7 362f17dd34SAndrew Lunn #define TQMX86_REG_BOARD_ID_70EB 8 372f17dd34SAndrew Lunn #define TQMX86_REG_BOARD_ID_80UC 9 383da48ccbSMatthias Schiffer #define TQMX86_REG_BOARD_ID_110EB 11 393da48ccbSMatthias Schiffer #define TQMX86_REG_BOARD_ID_E40M 12 403da48ccbSMatthias Schiffer #define TQMX86_REG_BOARD_ID_E40S 13 413da48ccbSMatthias Schiffer #define TQMX86_REG_BOARD_ID_E40C1 14 423da48ccbSMatthias Schiffer #define TQMX86_REG_BOARD_ID_E40C2 15 43*051c69ffSMatthias Schiffer #define TQMX86_REG_BOARD_REV 0x01 44*051c69ffSMatthias Schiffer #define TQMX86_REG_IO_EXT_INT 0x06 452f17dd34SAndrew Lunn #define TQMX86_REG_IO_EXT_INT_NONE 0 462f17dd34SAndrew Lunn #define TQMX86_REG_IO_EXT_INT_7 1 472f17dd34SAndrew Lunn #define TQMX86_REG_IO_EXT_INT_9 2 482f17dd34SAndrew Lunn #define TQMX86_REG_IO_EXT_INT_12 3 492f17dd34SAndrew Lunn #define TQMX86_REG_IO_EXT_INT_MASK 0x3 502f17dd34SAndrew Lunn #define TQMX86_REG_IO_EXT_INT_GPIO_SHIFT 4 512f17dd34SAndrew Lunn 521be1b236SMatthias Schiffer #define TQMX86_REG_I2C_DETECT 0x1a7 532f17dd34SAndrew Lunn #define TQMX86_REG_I2C_DETECT_SOFT 0xa5 542f17dd34SAndrew Lunn 552f17dd34SAndrew Lunn static uint gpio_irq; 562f17dd34SAndrew Lunn module_param(gpio_irq, uint, 0); 572f17dd34SAndrew Lunn MODULE_PARM_DESC(gpio_irq, "GPIO IRQ number (7, 9, 12)"); 582f17dd34SAndrew Lunn 592f17dd34SAndrew Lunn static const struct resource tqmx_i2c_soft_resources[] = { 602f17dd34SAndrew Lunn DEFINE_RES_IO(TQMX86_IOBASE_I2C, TQMX86_IOSIZE_I2C), 612f17dd34SAndrew Lunn }; 622f17dd34SAndrew Lunn 632f17dd34SAndrew Lunn static const struct resource tqmx_watchdog_resources[] = { 642f17dd34SAndrew Lunn DEFINE_RES_IO(TQMX86_IOBASE_WATCHDOG, TQMX86_IOSIZE_WATCHDOG), 652f17dd34SAndrew Lunn }; 662f17dd34SAndrew Lunn 672f17dd34SAndrew Lunn /* 682f17dd34SAndrew Lunn * The IRQ resource must be first, since it is updated with the 692f17dd34SAndrew Lunn * configured IRQ in the probe function. 702f17dd34SAndrew Lunn */ 712f17dd34SAndrew Lunn static struct resource tqmx_gpio_resources[] = { 722f17dd34SAndrew Lunn DEFINE_RES_IRQ(0), 732f17dd34SAndrew Lunn DEFINE_RES_IO(TQMX86_IOBASE_GPIO, TQMX86_IOSIZE_GPIO), 742f17dd34SAndrew Lunn }; 752f17dd34SAndrew Lunn 762f17dd34SAndrew Lunn static struct i2c_board_info tqmx86_i2c_devices[] = { 772f17dd34SAndrew Lunn { 782f17dd34SAndrew Lunn /* 4K EEPROM at 0x50 */ 792f17dd34SAndrew Lunn I2C_BOARD_INFO("24c32", 0x50), 802f17dd34SAndrew Lunn }, 812f17dd34SAndrew Lunn }; 822f17dd34SAndrew Lunn 8341e9b5e2SMatthias Schiffer static struct ocores_i2c_platform_data ocores_platform_data = { 842f17dd34SAndrew Lunn .num_devices = ARRAY_SIZE(tqmx86_i2c_devices), 852f17dd34SAndrew Lunn .devices = tqmx86_i2c_devices, 862f17dd34SAndrew Lunn }; 872f17dd34SAndrew Lunn 882f17dd34SAndrew Lunn static const struct mfd_cell tqmx86_i2c_soft_dev[] = { 892f17dd34SAndrew Lunn { 902f17dd34SAndrew Lunn .name = "ocores-i2c", 9141e9b5e2SMatthias Schiffer .platform_data = &ocores_platform_data, 9241e9b5e2SMatthias Schiffer .pdata_size = sizeof(ocores_platform_data), 932f17dd34SAndrew Lunn .resources = tqmx_i2c_soft_resources, 942f17dd34SAndrew Lunn .num_resources = ARRAY_SIZE(tqmx_i2c_soft_resources), 952f17dd34SAndrew Lunn }, 962f17dd34SAndrew Lunn }; 972f17dd34SAndrew Lunn 982f17dd34SAndrew Lunn static const struct mfd_cell tqmx86_devs[] = { 992f17dd34SAndrew Lunn { 1002f17dd34SAndrew Lunn .name = "tqmx86-wdt", 1012f17dd34SAndrew Lunn .resources = tqmx_watchdog_resources, 1022f17dd34SAndrew Lunn .num_resources = ARRAY_SIZE(tqmx_watchdog_resources), 1032f17dd34SAndrew Lunn .ignore_resource_conflicts = true, 1042f17dd34SAndrew Lunn }, 1052f17dd34SAndrew Lunn { 1062f17dd34SAndrew Lunn .name = "tqmx86-gpio", 1072f17dd34SAndrew Lunn .resources = tqmx_gpio_resources, 1082f17dd34SAndrew Lunn .num_resources = ARRAY_SIZE(tqmx_gpio_resources), 1092f17dd34SAndrew Lunn .ignore_resource_conflicts = true, 1102f17dd34SAndrew Lunn }, 1112f17dd34SAndrew Lunn }; 1122f17dd34SAndrew Lunn 1132f17dd34SAndrew Lunn static const char *tqmx86_board_id_to_name(u8 board_id) 1142f17dd34SAndrew Lunn { 1152f17dd34SAndrew Lunn switch (board_id) { 1162f17dd34SAndrew Lunn case TQMX86_REG_BOARD_ID_E38M: 1172f17dd34SAndrew Lunn return "TQMxE38M"; 1182f17dd34SAndrew Lunn case TQMX86_REG_BOARD_ID_50UC: 1192f17dd34SAndrew Lunn return "TQMx50UC"; 1202f17dd34SAndrew Lunn case TQMX86_REG_BOARD_ID_E38C: 1212f17dd34SAndrew Lunn return "TQMxE38C"; 1222f17dd34SAndrew Lunn case TQMX86_REG_BOARD_ID_60EB: 1232f17dd34SAndrew Lunn return "TQMx60EB"; 1242f17dd34SAndrew Lunn case TQMX86_REG_BOARD_ID_E39M: 1252f17dd34SAndrew Lunn return "TQMxE39M"; 1262f17dd34SAndrew Lunn case TQMX86_REG_BOARD_ID_E39C: 1272f17dd34SAndrew Lunn return "TQMxE39C"; 1282f17dd34SAndrew Lunn case TQMX86_REG_BOARD_ID_E39x: 1292f17dd34SAndrew Lunn return "TQMxE39x"; 1302f17dd34SAndrew Lunn case TQMX86_REG_BOARD_ID_70EB: 1312f17dd34SAndrew Lunn return "TQMx70EB"; 1322f17dd34SAndrew Lunn case TQMX86_REG_BOARD_ID_80UC: 1332f17dd34SAndrew Lunn return "TQMx80UC"; 1343da48ccbSMatthias Schiffer case TQMX86_REG_BOARD_ID_110EB: 1353da48ccbSMatthias Schiffer return "TQMx110EB"; 1363da48ccbSMatthias Schiffer case TQMX86_REG_BOARD_ID_E40M: 1373da48ccbSMatthias Schiffer return "TQMxE40M"; 1383da48ccbSMatthias Schiffer case TQMX86_REG_BOARD_ID_E40S: 1393da48ccbSMatthias Schiffer return "TQMxE40S"; 1403da48ccbSMatthias Schiffer case TQMX86_REG_BOARD_ID_E40C1: 1413da48ccbSMatthias Schiffer return "TQMxE40C1"; 1423da48ccbSMatthias Schiffer case TQMX86_REG_BOARD_ID_E40C2: 1433da48ccbSMatthias Schiffer return "TQMxE40C2"; 1442f17dd34SAndrew Lunn default: 1452f17dd34SAndrew Lunn return "Unknown"; 1462f17dd34SAndrew Lunn } 1472f17dd34SAndrew Lunn } 1482f17dd34SAndrew Lunn 1499a8c4bacSMatthias Schiffer static int tqmx86_board_id_to_clk_rate(struct device *dev, u8 board_id) 1502f17dd34SAndrew Lunn { 1512f17dd34SAndrew Lunn switch (board_id) { 1522f17dd34SAndrew Lunn case TQMX86_REG_BOARD_ID_50UC: 1532f17dd34SAndrew Lunn case TQMX86_REG_BOARD_ID_60EB: 1542f17dd34SAndrew Lunn case TQMX86_REG_BOARD_ID_70EB: 1552f17dd34SAndrew Lunn case TQMX86_REG_BOARD_ID_80UC: 1563da48ccbSMatthias Schiffer case TQMX86_REG_BOARD_ID_110EB: 1573da48ccbSMatthias Schiffer case TQMX86_REG_BOARD_ID_E40M: 1583da48ccbSMatthias Schiffer case TQMX86_REG_BOARD_ID_E40S: 1593da48ccbSMatthias Schiffer case TQMX86_REG_BOARD_ID_E40C1: 1603da48ccbSMatthias Schiffer case TQMX86_REG_BOARD_ID_E40C2: 1612f17dd34SAndrew Lunn return 24000; 1622f17dd34SAndrew Lunn case TQMX86_REG_BOARD_ID_E39M: 1632f17dd34SAndrew Lunn case TQMX86_REG_BOARD_ID_E39C: 1642f17dd34SAndrew Lunn case TQMX86_REG_BOARD_ID_E39x: 1652f17dd34SAndrew Lunn return 25000; 1662f17dd34SAndrew Lunn case TQMX86_REG_BOARD_ID_E38M: 1672f17dd34SAndrew Lunn case TQMX86_REG_BOARD_ID_E38C: 1682f17dd34SAndrew Lunn return 33000; 1692f17dd34SAndrew Lunn default: 1709a8c4bacSMatthias Schiffer dev_warn(dev, "unknown board %d, assuming 24MHz LPC clock\n", 1719a8c4bacSMatthias Schiffer board_id); 1729a8c4bacSMatthias Schiffer return 24000; 1732f17dd34SAndrew Lunn } 1742f17dd34SAndrew Lunn } 1752f17dd34SAndrew Lunn 1762f17dd34SAndrew Lunn static int tqmx86_probe(struct platform_device *pdev) 1772f17dd34SAndrew Lunn { 1787ad2915fSyu kuai u8 board_id, rev, i2c_det, io_ext_int_val; 1792f17dd34SAndrew Lunn struct device *dev = &pdev->dev; 1802f17dd34SAndrew Lunn u8 gpio_irq_cfg, readback; 1812f17dd34SAndrew Lunn const char *board_name; 1822f17dd34SAndrew Lunn void __iomem *io_base; 1832f17dd34SAndrew Lunn int err; 1842f17dd34SAndrew Lunn 1852f17dd34SAndrew Lunn switch (gpio_irq) { 1862f17dd34SAndrew Lunn case 0: 1872f17dd34SAndrew Lunn gpio_irq_cfg = TQMX86_REG_IO_EXT_INT_NONE; 1882f17dd34SAndrew Lunn break; 1892f17dd34SAndrew Lunn case 7: 1902f17dd34SAndrew Lunn gpio_irq_cfg = TQMX86_REG_IO_EXT_INT_7; 1912f17dd34SAndrew Lunn break; 1922f17dd34SAndrew Lunn case 9: 1932f17dd34SAndrew Lunn gpio_irq_cfg = TQMX86_REG_IO_EXT_INT_9; 1942f17dd34SAndrew Lunn break; 1952f17dd34SAndrew Lunn case 12: 1962f17dd34SAndrew Lunn gpio_irq_cfg = TQMX86_REG_IO_EXT_INT_12; 1972f17dd34SAndrew Lunn break; 1982f17dd34SAndrew Lunn default: 1992f17dd34SAndrew Lunn pr_err("tqmx86: Invalid GPIO IRQ (%d)\n", gpio_irq); 2002f17dd34SAndrew Lunn return -EINVAL; 2012f17dd34SAndrew Lunn } 2022f17dd34SAndrew Lunn 2032f17dd34SAndrew Lunn io_base = devm_ioport_map(dev, TQMX86_IOBASE, TQMX86_IOSIZE); 2042f17dd34SAndrew Lunn if (!io_base) 2052f17dd34SAndrew Lunn return -ENOMEM; 2062f17dd34SAndrew Lunn 2072f17dd34SAndrew Lunn board_id = ioread8(io_base + TQMX86_REG_BOARD_ID); 2082f17dd34SAndrew Lunn board_name = tqmx86_board_id_to_name(board_id); 2092f17dd34SAndrew Lunn rev = ioread8(io_base + TQMX86_REG_BOARD_REV); 2102f17dd34SAndrew Lunn 2112f17dd34SAndrew Lunn dev_info(dev, 2122f17dd34SAndrew Lunn "Found %s - Board ID %d, PCB Revision %d, PLD Revision %d\n", 2132f17dd34SAndrew Lunn board_name, board_id, rev >> 4, rev & 0xf); 2142f17dd34SAndrew Lunn 2151be1b236SMatthias Schiffer /* 2161be1b236SMatthias Schiffer * The I2C_DETECT register is in the range assigned to the I2C driver 2171be1b236SMatthias Schiffer * later, so we don't extend TQMX86_IOSIZE. Use inb() for this one-off 2181be1b236SMatthias Schiffer * access instead of ioport_map + unmap. 2191be1b236SMatthias Schiffer */ 2201be1b236SMatthias Schiffer i2c_det = inb(TQMX86_REG_I2C_DETECT); 2212f17dd34SAndrew Lunn 2222f17dd34SAndrew Lunn if (gpio_irq_cfg) { 2232f17dd34SAndrew Lunn io_ext_int_val = 2242f17dd34SAndrew Lunn gpio_irq_cfg << TQMX86_REG_IO_EXT_INT_GPIO_SHIFT; 2252f17dd34SAndrew Lunn iowrite8(io_ext_int_val, io_base + TQMX86_REG_IO_EXT_INT); 2262f17dd34SAndrew Lunn readback = ioread8(io_base + TQMX86_REG_IO_EXT_INT); 2272f17dd34SAndrew Lunn if (readback != io_ext_int_val) { 2282f17dd34SAndrew Lunn dev_warn(dev, "GPIO interrupts not supported.\n"); 2292f17dd34SAndrew Lunn return -EINVAL; 2302f17dd34SAndrew Lunn } 2312f17dd34SAndrew Lunn 2322f17dd34SAndrew Lunn /* Assumes the IRQ resource is first. */ 2332f17dd34SAndrew Lunn tqmx_gpio_resources[0].start = gpio_irq; 234a946506cSMatthias Schiffer } else { 235a946506cSMatthias Schiffer tqmx_gpio_resources[0].flags = 0; 2362f17dd34SAndrew Lunn } 2372f17dd34SAndrew Lunn 2389a8c4bacSMatthias Schiffer ocores_platform_data.clock_khz = tqmx86_board_id_to_clk_rate(dev, board_id); 2392f17dd34SAndrew Lunn 2402f17dd34SAndrew Lunn if (i2c_det == TQMX86_REG_I2C_DETECT_SOFT) { 2412f17dd34SAndrew Lunn err = devm_mfd_add_devices(dev, PLATFORM_DEVID_NONE, 2422f17dd34SAndrew Lunn tqmx86_i2c_soft_dev, 2432f17dd34SAndrew Lunn ARRAY_SIZE(tqmx86_i2c_soft_dev), 2442f17dd34SAndrew Lunn NULL, 0, NULL); 2452f17dd34SAndrew Lunn if (err) 2462f17dd34SAndrew Lunn return err; 2472f17dd34SAndrew Lunn } 2482f17dd34SAndrew Lunn 2492f17dd34SAndrew Lunn return devm_mfd_add_devices(dev, PLATFORM_DEVID_NONE, 2502f17dd34SAndrew Lunn tqmx86_devs, 2512f17dd34SAndrew Lunn ARRAY_SIZE(tqmx86_devs), 2522f17dd34SAndrew Lunn NULL, 0, NULL); 2532f17dd34SAndrew Lunn } 2542f17dd34SAndrew Lunn 2552f17dd34SAndrew Lunn static int tqmx86_create_platform_device(const struct dmi_system_id *id) 2562f17dd34SAndrew Lunn { 2572f17dd34SAndrew Lunn struct platform_device *pdev; 2582f17dd34SAndrew Lunn int err; 2592f17dd34SAndrew Lunn 2602f17dd34SAndrew Lunn pdev = platform_device_alloc("tqmx86", -1); 2612f17dd34SAndrew Lunn if (!pdev) 2622f17dd34SAndrew Lunn return -ENOMEM; 2632f17dd34SAndrew Lunn 2642f17dd34SAndrew Lunn err = platform_device_add(pdev); 2652f17dd34SAndrew Lunn if (err) 2662f17dd34SAndrew Lunn platform_device_put(pdev); 2672f17dd34SAndrew Lunn 2682f17dd34SAndrew Lunn return err; 2692f17dd34SAndrew Lunn } 2702f17dd34SAndrew Lunn 2712f17dd34SAndrew Lunn static const struct dmi_system_id tqmx86_dmi_table[] __initconst = { 2722f17dd34SAndrew Lunn { 2732f17dd34SAndrew Lunn .ident = "TQMX86", 2742f17dd34SAndrew Lunn .matches = { 2752f17dd34SAndrew Lunn DMI_MATCH(DMI_SYS_VENDOR, "TQ-Group"), 2762f17dd34SAndrew Lunn DMI_MATCH(DMI_PRODUCT_NAME, "TQMx"), 2772f17dd34SAndrew Lunn }, 2782f17dd34SAndrew Lunn .callback = tqmx86_create_platform_device, 2792f17dd34SAndrew Lunn }, 280d5949a35SMatthias Schiffer { 281d5949a35SMatthias Schiffer .ident = "TQMX86", 282d5949a35SMatthias Schiffer .matches = { 283d5949a35SMatthias Schiffer DMI_MATCH(DMI_SYS_VENDOR, "TQ-Systems"), 284d5949a35SMatthias Schiffer DMI_MATCH(DMI_PRODUCT_NAME, "TQMx"), 285d5949a35SMatthias Schiffer }, 286d5949a35SMatthias Schiffer .callback = tqmx86_create_platform_device, 287d5949a35SMatthias Schiffer }, 2882f17dd34SAndrew Lunn {} 2892f17dd34SAndrew Lunn }; 2902f17dd34SAndrew Lunn MODULE_DEVICE_TABLE(dmi, tqmx86_dmi_table); 2912f17dd34SAndrew Lunn 2922f17dd34SAndrew Lunn static struct platform_driver tqmx86_driver = { 2932f17dd34SAndrew Lunn .driver = { 2942f17dd34SAndrew Lunn .name = "tqmx86", 2952f17dd34SAndrew Lunn }, 2962f17dd34SAndrew Lunn .probe = tqmx86_probe, 2972f17dd34SAndrew Lunn }; 2982f17dd34SAndrew Lunn 2992f17dd34SAndrew Lunn static int __init tqmx86_init(void) 3002f17dd34SAndrew Lunn { 3012f17dd34SAndrew Lunn if (!dmi_check_system(tqmx86_dmi_table)) 3022f17dd34SAndrew Lunn return -ENODEV; 3032f17dd34SAndrew Lunn 3042f17dd34SAndrew Lunn return platform_driver_register(&tqmx86_driver); 3052f17dd34SAndrew Lunn } 3062f17dd34SAndrew Lunn 3072f17dd34SAndrew Lunn module_init(tqmx86_init); 3082f17dd34SAndrew Lunn 309ff8bd0b5SChristophe JAILLET MODULE_DESCRIPTION("TQMx86 PLD Core Driver"); 3102f17dd34SAndrew Lunn MODULE_AUTHOR("Andrew Lunn <andrew@lunn.ch>"); 3112f17dd34SAndrew Lunn MODULE_LICENSE("GPL"); 3122f17dd34SAndrew Lunn MODULE_ALIAS("platform:tqmx86"); 313