xref: /openbmc/linux/drivers/mfd/tqmx86.c (revision f376c479)
12f17dd34SAndrew Lunn // SPDX-License-Identifier: GPL-2.0+
22f17dd34SAndrew Lunn /*
32f17dd34SAndrew Lunn  * TQ-Systems PLD MFD core driver, based on vendor driver by
42f17dd34SAndrew Lunn  * Vadim V.Vlasov <vvlasov@dev.rtsoft.ru>
52f17dd34SAndrew Lunn  *
62f17dd34SAndrew Lunn  * Copyright (c) 2015 TQ-Systems GmbH
72f17dd34SAndrew Lunn  * Copyright (c) 2019 Andrew Lunn <andrew@lunn.ch>
82f17dd34SAndrew Lunn  */
92f17dd34SAndrew Lunn 
102f17dd34SAndrew Lunn #include <linux/delay.h>
112f17dd34SAndrew Lunn #include <linux/dmi.h>
122f17dd34SAndrew Lunn #include <linux/i2c.h>
132f17dd34SAndrew Lunn #include <linux/io.h>
142f17dd34SAndrew Lunn #include <linux/mfd/core.h>
152f17dd34SAndrew Lunn #include <linux/module.h>
162f17dd34SAndrew Lunn #include <linux/platform_data/i2c-ocores.h>
172f17dd34SAndrew Lunn #include <linux/platform_device.h>
182f17dd34SAndrew Lunn 
19051c69ffSMatthias Schiffer #define TQMX86_IOBASE	0x180
20051c69ffSMatthias Schiffer #define TQMX86_IOSIZE	0x20
212f17dd34SAndrew Lunn #define TQMX86_IOBASE_I2C	0x1a0
222f17dd34SAndrew Lunn #define TQMX86_IOSIZE_I2C	0xa
232f17dd34SAndrew Lunn #define TQMX86_IOBASE_WATCHDOG	0x18b
242f17dd34SAndrew Lunn #define TQMX86_IOSIZE_WATCHDOG	0x2
252f17dd34SAndrew Lunn #define TQMX86_IOBASE_GPIO	0x18d
262f17dd34SAndrew Lunn #define TQMX86_IOSIZE_GPIO	0x4
272f17dd34SAndrew Lunn 
28051c69ffSMatthias Schiffer #define TQMX86_REG_BOARD_ID	0x00
292f17dd34SAndrew Lunn #define TQMX86_REG_BOARD_ID_E38M	1
302f17dd34SAndrew Lunn #define TQMX86_REG_BOARD_ID_50UC	2
312f17dd34SAndrew Lunn #define TQMX86_REG_BOARD_ID_E38C	3
322f17dd34SAndrew Lunn #define TQMX86_REG_BOARD_ID_60EB	4
33*f376c479SMatthias Schiffer #define TQMX86_REG_BOARD_ID_E39MS	5
34*f376c479SMatthias Schiffer #define TQMX86_REG_BOARD_ID_E39C1	6
35*f376c479SMatthias Schiffer #define TQMX86_REG_BOARD_ID_E39C2	7
362f17dd34SAndrew Lunn #define TQMX86_REG_BOARD_ID_70EB	8
372f17dd34SAndrew Lunn #define TQMX86_REG_BOARD_ID_80UC	9
383da48ccbSMatthias Schiffer #define TQMX86_REG_BOARD_ID_110EB	11
393da48ccbSMatthias Schiffer #define TQMX86_REG_BOARD_ID_E40M	12
403da48ccbSMatthias Schiffer #define TQMX86_REG_BOARD_ID_E40S	13
413da48ccbSMatthias Schiffer #define TQMX86_REG_BOARD_ID_E40C1	14
423da48ccbSMatthias Schiffer #define TQMX86_REG_BOARD_ID_E40C2	15
43051c69ffSMatthias Schiffer #define TQMX86_REG_BOARD_REV	0x01
44051c69ffSMatthias Schiffer #define TQMX86_REG_IO_EXT_INT	0x06
452f17dd34SAndrew Lunn #define TQMX86_REG_IO_EXT_INT_NONE		0
462f17dd34SAndrew Lunn #define TQMX86_REG_IO_EXT_INT_7			1
472f17dd34SAndrew Lunn #define TQMX86_REG_IO_EXT_INT_9			2
482f17dd34SAndrew Lunn #define TQMX86_REG_IO_EXT_INT_12		3
492f17dd34SAndrew Lunn #define TQMX86_REG_IO_EXT_INT_MASK		0x3
502f17dd34SAndrew Lunn #define TQMX86_REG_IO_EXT_INT_GPIO_SHIFT	4
51*f376c479SMatthias Schiffer #define TQMX86_REG_SAUC		0x17
522f17dd34SAndrew Lunn 
531be1b236SMatthias Schiffer #define TQMX86_REG_I2C_DETECT	0x1a7
542f17dd34SAndrew Lunn #define TQMX86_REG_I2C_DETECT_SOFT		0xa5
552f17dd34SAndrew Lunn 
562f17dd34SAndrew Lunn static uint gpio_irq;
572f17dd34SAndrew Lunn module_param(gpio_irq, uint, 0);
582f17dd34SAndrew Lunn MODULE_PARM_DESC(gpio_irq, "GPIO IRQ number (7, 9, 12)");
592f17dd34SAndrew Lunn 
602f17dd34SAndrew Lunn static const struct resource tqmx_i2c_soft_resources[] = {
612f17dd34SAndrew Lunn 	DEFINE_RES_IO(TQMX86_IOBASE_I2C, TQMX86_IOSIZE_I2C),
622f17dd34SAndrew Lunn };
632f17dd34SAndrew Lunn 
642f17dd34SAndrew Lunn static const struct resource tqmx_watchdog_resources[] = {
652f17dd34SAndrew Lunn 	DEFINE_RES_IO(TQMX86_IOBASE_WATCHDOG, TQMX86_IOSIZE_WATCHDOG),
662f17dd34SAndrew Lunn };
672f17dd34SAndrew Lunn 
682f17dd34SAndrew Lunn /*
692f17dd34SAndrew Lunn  * The IRQ resource must be first, since it is updated with the
702f17dd34SAndrew Lunn  * configured IRQ in the probe function.
712f17dd34SAndrew Lunn  */
722f17dd34SAndrew Lunn static struct resource tqmx_gpio_resources[] = {
732f17dd34SAndrew Lunn 	DEFINE_RES_IRQ(0),
742f17dd34SAndrew Lunn 	DEFINE_RES_IO(TQMX86_IOBASE_GPIO, TQMX86_IOSIZE_GPIO),
752f17dd34SAndrew Lunn };
762f17dd34SAndrew Lunn 
772f17dd34SAndrew Lunn static struct i2c_board_info tqmx86_i2c_devices[] = {
782f17dd34SAndrew Lunn 	{
792f17dd34SAndrew Lunn 		/* 4K EEPROM at 0x50 */
802f17dd34SAndrew Lunn 		I2C_BOARD_INFO("24c32", 0x50),
812f17dd34SAndrew Lunn 	},
822f17dd34SAndrew Lunn };
832f17dd34SAndrew Lunn 
8441e9b5e2SMatthias Schiffer static struct ocores_i2c_platform_data ocores_platform_data = {
852f17dd34SAndrew Lunn 	.num_devices = ARRAY_SIZE(tqmx86_i2c_devices),
862f17dd34SAndrew Lunn 	.devices = tqmx86_i2c_devices,
872f17dd34SAndrew Lunn };
882f17dd34SAndrew Lunn 
892f17dd34SAndrew Lunn static const struct mfd_cell tqmx86_i2c_soft_dev[] = {
902f17dd34SAndrew Lunn 	{
912f17dd34SAndrew Lunn 		.name = "ocores-i2c",
9241e9b5e2SMatthias Schiffer 		.platform_data = &ocores_platform_data,
9341e9b5e2SMatthias Schiffer 		.pdata_size = sizeof(ocores_platform_data),
942f17dd34SAndrew Lunn 		.resources = tqmx_i2c_soft_resources,
952f17dd34SAndrew Lunn 		.num_resources = ARRAY_SIZE(tqmx_i2c_soft_resources),
962f17dd34SAndrew Lunn 	},
972f17dd34SAndrew Lunn };
982f17dd34SAndrew Lunn 
992f17dd34SAndrew Lunn static const struct mfd_cell tqmx86_devs[] = {
1002f17dd34SAndrew Lunn 	{
1012f17dd34SAndrew Lunn 		.name = "tqmx86-wdt",
1022f17dd34SAndrew Lunn 		.resources = tqmx_watchdog_resources,
1032f17dd34SAndrew Lunn 		.num_resources = ARRAY_SIZE(tqmx_watchdog_resources),
1042f17dd34SAndrew Lunn 		.ignore_resource_conflicts = true,
1052f17dd34SAndrew Lunn 	},
1062f17dd34SAndrew Lunn 	{
1072f17dd34SAndrew Lunn 		.name = "tqmx86-gpio",
1082f17dd34SAndrew Lunn 		.resources = tqmx_gpio_resources,
1092f17dd34SAndrew Lunn 		.num_resources = ARRAY_SIZE(tqmx_gpio_resources),
1102f17dd34SAndrew Lunn 		.ignore_resource_conflicts = true,
1112f17dd34SAndrew Lunn 	},
1122f17dd34SAndrew Lunn };
1132f17dd34SAndrew Lunn 
tqmx86_board_id_to_name(u8 board_id,u8 sauc)114*f376c479SMatthias Schiffer static const char *tqmx86_board_id_to_name(u8 board_id, u8 sauc)
1152f17dd34SAndrew Lunn {
1162f17dd34SAndrew Lunn 	switch (board_id) {
1172f17dd34SAndrew Lunn 	case TQMX86_REG_BOARD_ID_E38M:
1182f17dd34SAndrew Lunn 		return "TQMxE38M";
1192f17dd34SAndrew Lunn 	case TQMX86_REG_BOARD_ID_50UC:
1202f17dd34SAndrew Lunn 		return "TQMx50UC";
1212f17dd34SAndrew Lunn 	case TQMX86_REG_BOARD_ID_E38C:
1222f17dd34SAndrew Lunn 		return "TQMxE38C";
1232f17dd34SAndrew Lunn 	case TQMX86_REG_BOARD_ID_60EB:
1242f17dd34SAndrew Lunn 		return "TQMx60EB";
125*f376c479SMatthias Schiffer 	case TQMX86_REG_BOARD_ID_E39MS:
126*f376c479SMatthias Schiffer 		return (sauc == 0xff) ? "TQMxE39M" : "TQMxE39S";
127*f376c479SMatthias Schiffer 	case TQMX86_REG_BOARD_ID_E39C1:
128*f376c479SMatthias Schiffer 		return "TQMxE39C1";
129*f376c479SMatthias Schiffer 	case TQMX86_REG_BOARD_ID_E39C2:
130*f376c479SMatthias Schiffer 		return "TQMxE39C2";
1312f17dd34SAndrew Lunn 	case TQMX86_REG_BOARD_ID_70EB:
1322f17dd34SAndrew Lunn 		return "TQMx70EB";
1332f17dd34SAndrew Lunn 	case TQMX86_REG_BOARD_ID_80UC:
1342f17dd34SAndrew Lunn 		return "TQMx80UC";
1353da48ccbSMatthias Schiffer 	case TQMX86_REG_BOARD_ID_110EB:
1363da48ccbSMatthias Schiffer 		return "TQMx110EB";
1373da48ccbSMatthias Schiffer 	case TQMX86_REG_BOARD_ID_E40M:
1383da48ccbSMatthias Schiffer 		return "TQMxE40M";
1393da48ccbSMatthias Schiffer 	case TQMX86_REG_BOARD_ID_E40S:
1403da48ccbSMatthias Schiffer 		return "TQMxE40S";
1413da48ccbSMatthias Schiffer 	case TQMX86_REG_BOARD_ID_E40C1:
1423da48ccbSMatthias Schiffer 		return "TQMxE40C1";
1433da48ccbSMatthias Schiffer 	case TQMX86_REG_BOARD_ID_E40C2:
1443da48ccbSMatthias Schiffer 		return "TQMxE40C2";
1452f17dd34SAndrew Lunn 	default:
1462f17dd34SAndrew Lunn 		return "Unknown";
1472f17dd34SAndrew Lunn 	}
1482f17dd34SAndrew Lunn }
1492f17dd34SAndrew Lunn 
tqmx86_board_id_to_clk_rate(struct device * dev,u8 board_id)1509a8c4bacSMatthias Schiffer static int tqmx86_board_id_to_clk_rate(struct device *dev, u8 board_id)
1512f17dd34SAndrew Lunn {
1522f17dd34SAndrew Lunn 	switch (board_id) {
1532f17dd34SAndrew Lunn 	case TQMX86_REG_BOARD_ID_50UC:
1542f17dd34SAndrew Lunn 	case TQMX86_REG_BOARD_ID_60EB:
1552f17dd34SAndrew Lunn 	case TQMX86_REG_BOARD_ID_70EB:
1562f17dd34SAndrew Lunn 	case TQMX86_REG_BOARD_ID_80UC:
1573da48ccbSMatthias Schiffer 	case TQMX86_REG_BOARD_ID_110EB:
1583da48ccbSMatthias Schiffer 	case TQMX86_REG_BOARD_ID_E40M:
1593da48ccbSMatthias Schiffer 	case TQMX86_REG_BOARD_ID_E40S:
1603da48ccbSMatthias Schiffer 	case TQMX86_REG_BOARD_ID_E40C1:
1613da48ccbSMatthias Schiffer 	case TQMX86_REG_BOARD_ID_E40C2:
1622f17dd34SAndrew Lunn 		return 24000;
163*f376c479SMatthias Schiffer 	case TQMX86_REG_BOARD_ID_E39MS:
164*f376c479SMatthias Schiffer 	case TQMX86_REG_BOARD_ID_E39C1:
165*f376c479SMatthias Schiffer 	case TQMX86_REG_BOARD_ID_E39C2:
1662f17dd34SAndrew Lunn 		return 25000;
1672f17dd34SAndrew Lunn 	case TQMX86_REG_BOARD_ID_E38M:
1682f17dd34SAndrew Lunn 	case TQMX86_REG_BOARD_ID_E38C:
1692f17dd34SAndrew Lunn 		return 33000;
1702f17dd34SAndrew Lunn 	default:
1719a8c4bacSMatthias Schiffer 		dev_warn(dev, "unknown board %d, assuming 24MHz LPC clock\n",
1729a8c4bacSMatthias Schiffer 			 board_id);
1739a8c4bacSMatthias Schiffer 		return 24000;
1742f17dd34SAndrew Lunn 	}
1752f17dd34SAndrew Lunn }
1762f17dd34SAndrew Lunn 
tqmx86_probe(struct platform_device * pdev)1772f17dd34SAndrew Lunn static int tqmx86_probe(struct platform_device *pdev)
1782f17dd34SAndrew Lunn {
179*f376c479SMatthias Schiffer 	u8 board_id, sauc, rev, i2c_det, io_ext_int_val;
1802f17dd34SAndrew Lunn 	struct device *dev = &pdev->dev;
1812f17dd34SAndrew Lunn 	u8 gpio_irq_cfg, readback;
1822f17dd34SAndrew Lunn 	const char *board_name;
1832f17dd34SAndrew Lunn 	void __iomem *io_base;
1842f17dd34SAndrew Lunn 	int err;
1852f17dd34SAndrew Lunn 
1862f17dd34SAndrew Lunn 	switch (gpio_irq) {
1872f17dd34SAndrew Lunn 	case 0:
1882f17dd34SAndrew Lunn 		gpio_irq_cfg = TQMX86_REG_IO_EXT_INT_NONE;
1892f17dd34SAndrew Lunn 		break;
1902f17dd34SAndrew Lunn 	case 7:
1912f17dd34SAndrew Lunn 		gpio_irq_cfg = TQMX86_REG_IO_EXT_INT_7;
1922f17dd34SAndrew Lunn 		break;
1932f17dd34SAndrew Lunn 	case 9:
1942f17dd34SAndrew Lunn 		gpio_irq_cfg = TQMX86_REG_IO_EXT_INT_9;
1952f17dd34SAndrew Lunn 		break;
1962f17dd34SAndrew Lunn 	case 12:
1972f17dd34SAndrew Lunn 		gpio_irq_cfg = TQMX86_REG_IO_EXT_INT_12;
1982f17dd34SAndrew Lunn 		break;
1992f17dd34SAndrew Lunn 	default:
2002f17dd34SAndrew Lunn 		pr_err("tqmx86: Invalid GPIO IRQ (%d)\n", gpio_irq);
2012f17dd34SAndrew Lunn 		return -EINVAL;
2022f17dd34SAndrew Lunn 	}
2032f17dd34SAndrew Lunn 
2042f17dd34SAndrew Lunn 	io_base = devm_ioport_map(dev, TQMX86_IOBASE, TQMX86_IOSIZE);
2052f17dd34SAndrew Lunn 	if (!io_base)
2062f17dd34SAndrew Lunn 		return -ENOMEM;
2072f17dd34SAndrew Lunn 
2082f17dd34SAndrew Lunn 	board_id = ioread8(io_base + TQMX86_REG_BOARD_ID);
209*f376c479SMatthias Schiffer 	sauc = ioread8(io_base + TQMX86_REG_SAUC);
210*f376c479SMatthias Schiffer 	board_name = tqmx86_board_id_to_name(board_id, sauc);
2112f17dd34SAndrew Lunn 	rev = ioread8(io_base + TQMX86_REG_BOARD_REV);
2122f17dd34SAndrew Lunn 
2132f17dd34SAndrew Lunn 	dev_info(dev,
2142f17dd34SAndrew Lunn 		 "Found %s - Board ID %d, PCB Revision %d, PLD Revision %d\n",
2152f17dd34SAndrew Lunn 		 board_name, board_id, rev >> 4, rev & 0xf);
2162f17dd34SAndrew Lunn 
2171be1b236SMatthias Schiffer 	/*
2181be1b236SMatthias Schiffer 	 * The I2C_DETECT register is in the range assigned to the I2C driver
2191be1b236SMatthias Schiffer 	 * later, so we don't extend TQMX86_IOSIZE. Use inb() for this one-off
2201be1b236SMatthias Schiffer 	 * access instead of ioport_map + unmap.
2211be1b236SMatthias Schiffer 	 */
2221be1b236SMatthias Schiffer 	i2c_det = inb(TQMX86_REG_I2C_DETECT);
2232f17dd34SAndrew Lunn 
2242f17dd34SAndrew Lunn 	if (gpio_irq_cfg) {
2252f17dd34SAndrew Lunn 		io_ext_int_val =
2262f17dd34SAndrew Lunn 			gpio_irq_cfg << TQMX86_REG_IO_EXT_INT_GPIO_SHIFT;
2272f17dd34SAndrew Lunn 		iowrite8(io_ext_int_val, io_base + TQMX86_REG_IO_EXT_INT);
2282f17dd34SAndrew Lunn 		readback = ioread8(io_base + TQMX86_REG_IO_EXT_INT);
2292f17dd34SAndrew Lunn 		if (readback != io_ext_int_val) {
2302f17dd34SAndrew Lunn 			dev_warn(dev, "GPIO interrupts not supported.\n");
2312f17dd34SAndrew Lunn 			return -EINVAL;
2322f17dd34SAndrew Lunn 		}
2332f17dd34SAndrew Lunn 
2342f17dd34SAndrew Lunn 		/* Assumes the IRQ resource is first. */
2352f17dd34SAndrew Lunn 		tqmx_gpio_resources[0].start = gpio_irq;
236a946506cSMatthias Schiffer 	} else {
237a946506cSMatthias Schiffer 		tqmx_gpio_resources[0].flags = 0;
2382f17dd34SAndrew Lunn 	}
2392f17dd34SAndrew Lunn 
2409a8c4bacSMatthias Schiffer 	ocores_platform_data.clock_khz = tqmx86_board_id_to_clk_rate(dev, board_id);
2412f17dd34SAndrew Lunn 
2422f17dd34SAndrew Lunn 	if (i2c_det == TQMX86_REG_I2C_DETECT_SOFT) {
2432f17dd34SAndrew Lunn 		err = devm_mfd_add_devices(dev, PLATFORM_DEVID_NONE,
2442f17dd34SAndrew Lunn 					   tqmx86_i2c_soft_dev,
2452f17dd34SAndrew Lunn 					   ARRAY_SIZE(tqmx86_i2c_soft_dev),
2462f17dd34SAndrew Lunn 					   NULL, 0, NULL);
2472f17dd34SAndrew Lunn 		if (err)
2482f17dd34SAndrew Lunn 			return err;
2492f17dd34SAndrew Lunn 	}
2502f17dd34SAndrew Lunn 
2512f17dd34SAndrew Lunn 	return devm_mfd_add_devices(dev, PLATFORM_DEVID_NONE,
2522f17dd34SAndrew Lunn 				    tqmx86_devs,
2532f17dd34SAndrew Lunn 				    ARRAY_SIZE(tqmx86_devs),
2542f17dd34SAndrew Lunn 				    NULL, 0, NULL);
2552f17dd34SAndrew Lunn }
2562f17dd34SAndrew Lunn 
tqmx86_create_platform_device(const struct dmi_system_id * id)2572f17dd34SAndrew Lunn static int tqmx86_create_platform_device(const struct dmi_system_id *id)
2582f17dd34SAndrew Lunn {
2592f17dd34SAndrew Lunn 	struct platform_device *pdev;
2602f17dd34SAndrew Lunn 	int err;
2612f17dd34SAndrew Lunn 
2622f17dd34SAndrew Lunn 	pdev = platform_device_alloc("tqmx86", -1);
2632f17dd34SAndrew Lunn 	if (!pdev)
2642f17dd34SAndrew Lunn 		return -ENOMEM;
2652f17dd34SAndrew Lunn 
2662f17dd34SAndrew Lunn 	err = platform_device_add(pdev);
2672f17dd34SAndrew Lunn 	if (err)
2682f17dd34SAndrew Lunn 		platform_device_put(pdev);
2692f17dd34SAndrew Lunn 
2702f17dd34SAndrew Lunn 	return err;
2712f17dd34SAndrew Lunn }
2722f17dd34SAndrew Lunn 
2732f17dd34SAndrew Lunn static const struct dmi_system_id tqmx86_dmi_table[] __initconst = {
2742f17dd34SAndrew Lunn 	{
2752f17dd34SAndrew Lunn 		.ident = "TQMX86",
2762f17dd34SAndrew Lunn 		.matches = {
2772f17dd34SAndrew Lunn 			DMI_MATCH(DMI_SYS_VENDOR, "TQ-Group"),
2782f17dd34SAndrew Lunn 			DMI_MATCH(DMI_PRODUCT_NAME, "TQMx"),
2792f17dd34SAndrew Lunn 		},
2802f17dd34SAndrew Lunn 		.callback = tqmx86_create_platform_device,
2812f17dd34SAndrew Lunn 	},
282d5949a35SMatthias Schiffer 	{
283d5949a35SMatthias Schiffer 		.ident = "TQMX86",
284d5949a35SMatthias Schiffer 		.matches = {
285d5949a35SMatthias Schiffer 			DMI_MATCH(DMI_SYS_VENDOR, "TQ-Systems"),
286d5949a35SMatthias Schiffer 			DMI_MATCH(DMI_PRODUCT_NAME, "TQMx"),
287d5949a35SMatthias Schiffer 		},
288d5949a35SMatthias Schiffer 		.callback = tqmx86_create_platform_device,
289d5949a35SMatthias Schiffer 	},
2902f17dd34SAndrew Lunn 	{}
2912f17dd34SAndrew Lunn };
2922f17dd34SAndrew Lunn MODULE_DEVICE_TABLE(dmi, tqmx86_dmi_table);
2932f17dd34SAndrew Lunn 
2942f17dd34SAndrew Lunn static struct platform_driver tqmx86_driver = {
2952f17dd34SAndrew Lunn 	.driver		= {
2962f17dd34SAndrew Lunn 		.name	= "tqmx86",
2972f17dd34SAndrew Lunn 	},
2982f17dd34SAndrew Lunn 	.probe		= tqmx86_probe,
2992f17dd34SAndrew Lunn };
3002f17dd34SAndrew Lunn 
tqmx86_init(void)3012f17dd34SAndrew Lunn static int __init tqmx86_init(void)
3022f17dd34SAndrew Lunn {
3032f17dd34SAndrew Lunn 	if (!dmi_check_system(tqmx86_dmi_table))
3042f17dd34SAndrew Lunn 		return -ENODEV;
3052f17dd34SAndrew Lunn 
3062f17dd34SAndrew Lunn 	return platform_driver_register(&tqmx86_driver);
3072f17dd34SAndrew Lunn }
3082f17dd34SAndrew Lunn 
3092f17dd34SAndrew Lunn module_init(tqmx86_init);
3102f17dd34SAndrew Lunn 
311ff8bd0b5SChristophe JAILLET MODULE_DESCRIPTION("TQMx86 PLD Core Driver");
3122f17dd34SAndrew Lunn MODULE_AUTHOR("Andrew Lunn <andrew@lunn.ch>");
3132f17dd34SAndrew Lunn MODULE_LICENSE("GPL");
3142f17dd34SAndrew Lunn MODULE_ALIAS("platform:tqmx86");
315