1 /* 2 * TI Touch Screen / ADC MFD driver 3 * 4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License as 8 * published by the Free Software Foundation version 2. 9 * 10 * This program is distributed "as is" WITHOUT ANY WARRANTY of any 11 * kind, whether express or implied; without even the implied warranty 12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 */ 15 16 #include <linux/module.h> 17 #include <linux/slab.h> 18 #include <linux/err.h> 19 #include <linux/io.h> 20 #include <linux/clk.h> 21 #include <linux/regmap.h> 22 #include <linux/mfd/core.h> 23 #include <linux/pm_runtime.h> 24 #include <linux/of.h> 25 #include <linux/of_device.h> 26 #include <linux/sched.h> 27 28 #include <linux/mfd/ti_am335x_tscadc.h> 29 30 static unsigned int tscadc_readl(struct ti_tscadc_dev *tsadc, unsigned int reg) 31 { 32 unsigned int val; 33 34 regmap_read(tsadc->regmap_tscadc, reg, &val); 35 return val; 36 } 37 38 static void tscadc_writel(struct ti_tscadc_dev *tsadc, unsigned int reg, 39 unsigned int val) 40 { 41 regmap_write(tsadc->regmap_tscadc, reg, val); 42 } 43 44 static const struct regmap_config tscadc_regmap_config = { 45 .name = "ti_tscadc", 46 .reg_bits = 32, 47 .reg_stride = 4, 48 .val_bits = 32, 49 }; 50 51 void am335x_tsc_se_set_cache(struct ti_tscadc_dev *tsadc, u32 val) 52 { 53 unsigned long flags; 54 55 spin_lock_irqsave(&tsadc->reg_lock, flags); 56 tsadc->reg_se_cache |= val; 57 if (tsadc->adc_waiting) 58 wake_up(&tsadc->reg_se_wait); 59 else if (!tsadc->adc_in_use) 60 tscadc_writel(tsadc, REG_SE, tsadc->reg_se_cache); 61 62 spin_unlock_irqrestore(&tsadc->reg_lock, flags); 63 } 64 EXPORT_SYMBOL_GPL(am335x_tsc_se_set_cache); 65 66 static void am335x_tscadc_need_adc(struct ti_tscadc_dev *tsadc) 67 { 68 DEFINE_WAIT(wait); 69 u32 reg; 70 71 /* 72 * disable TSC steps so it does not run while the ADC is using it. If 73 * write 0 while it is running (it just started or was already running) 74 * then it completes all steps that were enabled and stops then. 75 */ 76 tscadc_writel(tsadc, REG_SE, 0); 77 reg = tscadc_readl(tsadc, REG_ADCFSM); 78 if (reg & SEQ_STATUS) { 79 tsadc->adc_waiting = true; 80 prepare_to_wait(&tsadc->reg_se_wait, &wait, 81 TASK_UNINTERRUPTIBLE); 82 spin_unlock_irq(&tsadc->reg_lock); 83 84 schedule(); 85 86 spin_lock_irq(&tsadc->reg_lock); 87 finish_wait(&tsadc->reg_se_wait, &wait); 88 89 reg = tscadc_readl(tsadc, REG_ADCFSM); 90 WARN_ON(reg & SEQ_STATUS); 91 tsadc->adc_waiting = false; 92 } 93 tsadc->adc_in_use = true; 94 } 95 96 void am335x_tsc_se_set_once(struct ti_tscadc_dev *tsadc, u32 val) 97 { 98 spin_lock_irq(&tsadc->reg_lock); 99 tsadc->reg_se_cache |= val; 100 am335x_tscadc_need_adc(tsadc); 101 102 tscadc_writel(tsadc, REG_SE, val); 103 spin_unlock_irq(&tsadc->reg_lock); 104 } 105 EXPORT_SYMBOL_GPL(am335x_tsc_se_set_once); 106 107 void am335x_tsc_se_adc_done(struct ti_tscadc_dev *tsadc) 108 { 109 unsigned long flags; 110 111 spin_lock_irqsave(&tsadc->reg_lock, flags); 112 tsadc->adc_in_use = false; 113 tscadc_writel(tsadc, REG_SE, tsadc->reg_se_cache); 114 spin_unlock_irqrestore(&tsadc->reg_lock, flags); 115 } 116 EXPORT_SYMBOL_GPL(am335x_tsc_se_adc_done); 117 118 void am335x_tsc_se_clr(struct ti_tscadc_dev *tsadc, u32 val) 119 { 120 unsigned long flags; 121 122 spin_lock_irqsave(&tsadc->reg_lock, flags); 123 tsadc->reg_se_cache &= ~val; 124 tscadc_writel(tsadc, REG_SE, tsadc->reg_se_cache); 125 spin_unlock_irqrestore(&tsadc->reg_lock, flags); 126 } 127 EXPORT_SYMBOL_GPL(am335x_tsc_se_clr); 128 129 static void tscadc_idle_config(struct ti_tscadc_dev *config) 130 { 131 unsigned int idleconfig; 132 133 idleconfig = STEPCONFIG_YNN | STEPCONFIG_INM_ADCREFM | 134 STEPCONFIG_INP_ADCREFM | STEPCONFIG_YPN; 135 136 tscadc_writel(config, REG_IDLECONFIG, idleconfig); 137 } 138 139 static int ti_tscadc_probe(struct platform_device *pdev) 140 { 141 struct ti_tscadc_dev *tscadc; 142 struct resource *res; 143 struct clk *clk; 144 struct device_node *node = pdev->dev.of_node; 145 struct mfd_cell *cell; 146 struct property *prop; 147 const __be32 *cur; 148 u32 val; 149 int err, ctrl; 150 int clock_rate; 151 int tsc_wires = 0, adc_channels = 0, total_channels; 152 int readouts = 0; 153 154 if (!pdev->dev.of_node) { 155 dev_err(&pdev->dev, "Could not find valid DT data.\n"); 156 return -EINVAL; 157 } 158 159 node = of_get_child_by_name(pdev->dev.of_node, "tsc"); 160 of_property_read_u32(node, "ti,wires", &tsc_wires); 161 of_property_read_u32(node, "ti,coordiante-readouts", &readouts); 162 163 node = of_get_child_by_name(pdev->dev.of_node, "adc"); 164 of_property_for_each_u32(node, "ti,adc-channels", prop, cur, val) { 165 adc_channels++; 166 if (val > 7) { 167 dev_err(&pdev->dev, " PIN numbers are 0..7 (not %d)\n", 168 val); 169 return -EINVAL; 170 } 171 } 172 total_channels = tsc_wires + adc_channels; 173 if (total_channels > 8) { 174 dev_err(&pdev->dev, "Number of i/p channels more than 8\n"); 175 return -EINVAL; 176 } 177 if (total_channels == 0) { 178 dev_err(&pdev->dev, "Need atleast one channel.\n"); 179 return -EINVAL; 180 } 181 182 if (readouts * 2 + 2 + adc_channels > 16) { 183 dev_err(&pdev->dev, "Too many step configurations requested\n"); 184 return -EINVAL; 185 } 186 187 /* Allocate memory for device */ 188 tscadc = devm_kzalloc(&pdev->dev, 189 sizeof(struct ti_tscadc_dev), GFP_KERNEL); 190 if (!tscadc) { 191 dev_err(&pdev->dev, "failed to allocate memory.\n"); 192 return -ENOMEM; 193 } 194 tscadc->dev = &pdev->dev; 195 196 err = platform_get_irq(pdev, 0); 197 if (err < 0) { 198 dev_err(&pdev->dev, "no irq ID is specified.\n"); 199 goto ret; 200 } else 201 tscadc->irq = err; 202 203 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 204 tscadc->tscadc_base = devm_ioremap_resource(&pdev->dev, res); 205 if (IS_ERR(tscadc->tscadc_base)) 206 return PTR_ERR(tscadc->tscadc_base); 207 208 tscadc->regmap_tscadc = devm_regmap_init_mmio(&pdev->dev, 209 tscadc->tscadc_base, &tscadc_regmap_config); 210 if (IS_ERR(tscadc->regmap_tscadc)) { 211 dev_err(&pdev->dev, "regmap init failed\n"); 212 err = PTR_ERR(tscadc->regmap_tscadc); 213 goto ret; 214 } 215 216 spin_lock_init(&tscadc->reg_lock); 217 init_waitqueue_head(&tscadc->reg_se_wait); 218 219 pm_runtime_enable(&pdev->dev); 220 pm_runtime_get_sync(&pdev->dev); 221 222 /* 223 * The TSC_ADC_Subsystem has 2 clock domains 224 * OCP_CLK and ADC_CLK. 225 * The ADC clock is expected to run at target of 3MHz, 226 * and expected to capture 12-bit data at a rate of 200 KSPS. 227 * The TSC_ADC_SS controller design assumes the OCP clock is 228 * at least 6x faster than the ADC clock. 229 */ 230 clk = clk_get(&pdev->dev, "adc_tsc_fck"); 231 if (IS_ERR(clk)) { 232 dev_err(&pdev->dev, "failed to get TSC fck\n"); 233 err = PTR_ERR(clk); 234 goto err_disable_clk; 235 } 236 clock_rate = clk_get_rate(clk); 237 clk_put(clk); 238 tscadc->clk_div = clock_rate / ADC_CLK; 239 240 /* TSCADC_CLKDIV needs to be configured to the value minus 1 */ 241 tscadc->clk_div--; 242 tscadc_writel(tscadc, REG_CLKDIV, tscadc->clk_div); 243 244 /* Set the control register bits */ 245 ctrl = CNTRLREG_STEPCONFIGWRT | CNTRLREG_STEPID; 246 tscadc_writel(tscadc, REG_CTRL, ctrl); 247 248 /* Set register bits for Idle Config Mode */ 249 if (tsc_wires > 0) { 250 tscadc->tsc_wires = tsc_wires; 251 if (tsc_wires == 5) 252 ctrl |= CNTRLREG_5WIRE | CNTRLREG_TSCENB; 253 else 254 ctrl |= CNTRLREG_4WIRE | CNTRLREG_TSCENB; 255 tscadc_idle_config(tscadc); 256 } 257 258 /* Enable the TSC module enable bit */ 259 ctrl |= CNTRLREG_TSCSSENB; 260 tscadc_writel(tscadc, REG_CTRL, ctrl); 261 262 tscadc->used_cells = 0; 263 tscadc->tsc_cell = -1; 264 tscadc->adc_cell = -1; 265 266 /* TSC Cell */ 267 if (tsc_wires > 0) { 268 tscadc->tsc_cell = tscadc->used_cells; 269 cell = &tscadc->cells[tscadc->used_cells++]; 270 cell->name = "TI-am335x-tsc"; 271 cell->of_compatible = "ti,am3359-tsc"; 272 cell->platform_data = &tscadc; 273 cell->pdata_size = sizeof(tscadc); 274 } 275 276 /* ADC Cell */ 277 if (adc_channels > 0) { 278 tscadc->adc_cell = tscadc->used_cells; 279 cell = &tscadc->cells[tscadc->used_cells++]; 280 cell->name = "TI-am335x-adc"; 281 cell->of_compatible = "ti,am3359-adc"; 282 cell->platform_data = &tscadc; 283 cell->pdata_size = sizeof(tscadc); 284 } 285 286 err = mfd_add_devices(&pdev->dev, pdev->id, tscadc->cells, 287 tscadc->used_cells, NULL, 0, NULL); 288 if (err < 0) 289 goto err_disable_clk; 290 291 device_init_wakeup(&pdev->dev, true); 292 platform_set_drvdata(pdev, tscadc); 293 return 0; 294 295 err_disable_clk: 296 pm_runtime_put_sync(&pdev->dev); 297 pm_runtime_disable(&pdev->dev); 298 ret: 299 return err; 300 } 301 302 static int ti_tscadc_remove(struct platform_device *pdev) 303 { 304 struct ti_tscadc_dev *tscadc = platform_get_drvdata(pdev); 305 306 tscadc_writel(tscadc, REG_SE, 0x00); 307 308 pm_runtime_put_sync(&pdev->dev); 309 pm_runtime_disable(&pdev->dev); 310 311 mfd_remove_devices(tscadc->dev); 312 313 return 0; 314 } 315 316 #ifdef CONFIG_PM 317 static int tscadc_suspend(struct device *dev) 318 { 319 struct ti_tscadc_dev *tscadc_dev = dev_get_drvdata(dev); 320 321 tscadc_writel(tscadc_dev, REG_SE, 0x00); 322 pm_runtime_put_sync(dev); 323 324 return 0; 325 } 326 327 static int tscadc_resume(struct device *dev) 328 { 329 struct ti_tscadc_dev *tscadc_dev = dev_get_drvdata(dev); 330 u32 ctrl; 331 332 pm_runtime_get_sync(dev); 333 334 /* context restore */ 335 ctrl = CNTRLREG_STEPCONFIGWRT | CNTRLREG_STEPID; 336 tscadc_writel(tscadc_dev, REG_CTRL, ctrl); 337 338 if (tscadc_dev->tsc_cell != -1) { 339 if (tscadc_dev->tsc_wires == 5) 340 ctrl |= CNTRLREG_5WIRE | CNTRLREG_TSCENB; 341 else 342 ctrl |= CNTRLREG_4WIRE | CNTRLREG_TSCENB; 343 tscadc_idle_config(tscadc_dev); 344 } 345 ctrl |= CNTRLREG_TSCSSENB; 346 tscadc_writel(tscadc_dev, REG_CTRL, ctrl); 347 348 tscadc_writel(tscadc_dev, REG_CLKDIV, tscadc_dev->clk_div); 349 350 return 0; 351 } 352 353 static const struct dev_pm_ops tscadc_pm_ops = { 354 .suspend = tscadc_suspend, 355 .resume = tscadc_resume, 356 }; 357 #define TSCADC_PM_OPS (&tscadc_pm_ops) 358 #else 359 #define TSCADC_PM_OPS NULL 360 #endif 361 362 static const struct of_device_id ti_tscadc_dt_ids[] = { 363 { .compatible = "ti,am3359-tscadc", }, 364 { } 365 }; 366 MODULE_DEVICE_TABLE(of, ti_tscadc_dt_ids); 367 368 static struct platform_driver ti_tscadc_driver = { 369 .driver = { 370 .name = "ti_am3359-tscadc", 371 .pm = TSCADC_PM_OPS, 372 .of_match_table = ti_tscadc_dt_ids, 373 }, 374 .probe = ti_tscadc_probe, 375 .remove = ti_tscadc_remove, 376 377 }; 378 379 module_platform_driver(ti_tscadc_driver); 380 381 MODULE_DESCRIPTION("TI touchscreen / ADC MFD controller driver"); 382 MODULE_AUTHOR("Rachna Patil <rachna@ti.com>"); 383 MODULE_LICENSE("GPL"); 384