1 /* 2 * TI Touch Screen / ADC MFD driver 3 * 4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License as 8 * published by the Free Software Foundation version 2. 9 * 10 * This program is distributed "as is" WITHOUT ANY WARRANTY of any 11 * kind, whether express or implied; without even the implied warranty 12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 */ 15 16 #include <linux/module.h> 17 #include <linux/init.h> 18 #include <linux/slab.h> 19 #include <linux/err.h> 20 #include <linux/io.h> 21 #include <linux/clk.h> 22 #include <linux/regmap.h> 23 #include <linux/mfd/core.h> 24 #include <linux/pm_runtime.h> 25 #include <linux/of.h> 26 #include <linux/of_device.h> 27 #include <linux/sched.h> 28 29 #include <linux/mfd/ti_am335x_tscadc.h> 30 31 static unsigned int tscadc_readl(struct ti_tscadc_dev *tsadc, unsigned int reg) 32 { 33 unsigned int val; 34 35 regmap_read(tsadc->regmap_tscadc, reg, &val); 36 return val; 37 } 38 39 static void tscadc_writel(struct ti_tscadc_dev *tsadc, unsigned int reg, 40 unsigned int val) 41 { 42 regmap_write(tsadc->regmap_tscadc, reg, val); 43 } 44 45 static const struct regmap_config tscadc_regmap_config = { 46 .name = "ti_tscadc", 47 .reg_bits = 32, 48 .reg_stride = 4, 49 .val_bits = 32, 50 }; 51 52 void am335x_tsc_se_set_cache(struct ti_tscadc_dev *tsadc, u32 val) 53 { 54 unsigned long flags; 55 56 spin_lock_irqsave(&tsadc->reg_lock, flags); 57 tsadc->reg_se_cache = val; 58 if (tsadc->adc_waiting) 59 wake_up(&tsadc->reg_se_wait); 60 else if (!tsadc->adc_in_use) 61 tscadc_writel(tsadc, REG_SE, val); 62 63 spin_unlock_irqrestore(&tsadc->reg_lock, flags); 64 } 65 EXPORT_SYMBOL_GPL(am335x_tsc_se_set_cache); 66 67 static void am335x_tscadc_need_adc(struct ti_tscadc_dev *tsadc) 68 { 69 DEFINE_WAIT(wait); 70 u32 reg; 71 72 /* 73 * disable TSC steps so it does not run while the ADC is using it. If 74 * write 0 while it is running (it just started or was already running) 75 * then it completes all steps that were enabled and stops then. 76 */ 77 tscadc_writel(tsadc, REG_SE, 0); 78 reg = tscadc_readl(tsadc, REG_ADCFSM); 79 if (reg & SEQ_STATUS) { 80 tsadc->adc_waiting = true; 81 prepare_to_wait(&tsadc->reg_se_wait, &wait, 82 TASK_UNINTERRUPTIBLE); 83 spin_unlock_irq(&tsadc->reg_lock); 84 85 schedule(); 86 87 spin_lock_irq(&tsadc->reg_lock); 88 finish_wait(&tsadc->reg_se_wait, &wait); 89 90 reg = tscadc_readl(tsadc, REG_ADCFSM); 91 WARN_ON(reg & SEQ_STATUS); 92 tsadc->adc_waiting = false; 93 } 94 tsadc->adc_in_use = true; 95 } 96 97 void am335x_tsc_se_set_once(struct ti_tscadc_dev *tsadc, u32 val) 98 { 99 spin_lock_irq(&tsadc->reg_lock); 100 am335x_tscadc_need_adc(tsadc); 101 102 tscadc_writel(tsadc, REG_SE, val); 103 spin_unlock_irq(&tsadc->reg_lock); 104 } 105 EXPORT_SYMBOL_GPL(am335x_tsc_se_set_once); 106 107 void am335x_tsc_se_adc_done(struct ti_tscadc_dev *tsadc) 108 { 109 unsigned long flags; 110 111 spin_lock_irqsave(&tsadc->reg_lock, flags); 112 tsadc->adc_in_use = false; 113 tscadc_writel(tsadc, REG_SE, tsadc->reg_se_cache); 114 spin_unlock_irqrestore(&tsadc->reg_lock, flags); 115 } 116 EXPORT_SYMBOL_GPL(am335x_tsc_se_adc_done); 117 118 void am335x_tsc_se_clr(struct ti_tscadc_dev *tsadc, u32 val) 119 { 120 unsigned long flags; 121 122 spin_lock_irqsave(&tsadc->reg_lock, flags); 123 tsadc->reg_se_cache &= ~val; 124 tscadc_writel(tsadc, REG_SE, tsadc->reg_se_cache); 125 spin_unlock_irqrestore(&tsadc->reg_lock, flags); 126 } 127 EXPORT_SYMBOL_GPL(am335x_tsc_se_clr); 128 129 static void tscadc_idle_config(struct ti_tscadc_dev *config) 130 { 131 unsigned int idleconfig; 132 133 idleconfig = STEPCONFIG_YNN | STEPCONFIG_INM_ADCREFM | 134 STEPCONFIG_INP_ADCREFM | STEPCONFIG_YPN; 135 136 tscadc_writel(config, REG_IDLECONFIG, idleconfig); 137 } 138 139 static int ti_tscadc_probe(struct platform_device *pdev) 140 { 141 struct ti_tscadc_dev *tscadc; 142 struct resource *res; 143 struct clk *clk; 144 struct device_node *node = pdev->dev.of_node; 145 struct mfd_cell *cell; 146 struct property *prop; 147 const __be32 *cur; 148 u32 val; 149 int err, ctrl; 150 int clock_rate; 151 int tsc_wires = 0, adc_channels = 0, total_channels; 152 int readouts = 0; 153 154 if (!pdev->dev.of_node) { 155 dev_err(&pdev->dev, "Could not find valid DT data.\n"); 156 return -EINVAL; 157 } 158 159 node = of_get_child_by_name(pdev->dev.of_node, "tsc"); 160 of_property_read_u32(node, "ti,wires", &tsc_wires); 161 of_property_read_u32(node, "ti,coordiante-readouts", &readouts); 162 163 node = of_get_child_by_name(pdev->dev.of_node, "adc"); 164 of_property_for_each_u32(node, "ti,adc-channels", prop, cur, val) { 165 adc_channels++; 166 if (val > 7) { 167 dev_err(&pdev->dev, " PIN numbers are 0..7 (not %d)\n", 168 val); 169 return -EINVAL; 170 } 171 } 172 total_channels = tsc_wires + adc_channels; 173 if (total_channels > 8) { 174 dev_err(&pdev->dev, "Number of i/p channels more than 8\n"); 175 return -EINVAL; 176 } 177 if (total_channels == 0) { 178 dev_err(&pdev->dev, "Need atleast one channel.\n"); 179 return -EINVAL; 180 } 181 182 if (readouts * 2 + 2 + adc_channels > 16) { 183 dev_err(&pdev->dev, "Too many step configurations requested\n"); 184 return -EINVAL; 185 } 186 187 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 188 if (!res) { 189 dev_err(&pdev->dev, "no memory resource defined.\n"); 190 return -EINVAL; 191 } 192 193 /* Allocate memory for device */ 194 tscadc = devm_kzalloc(&pdev->dev, 195 sizeof(struct ti_tscadc_dev), GFP_KERNEL); 196 if (!tscadc) { 197 dev_err(&pdev->dev, "failed to allocate memory.\n"); 198 return -ENOMEM; 199 } 200 tscadc->dev = &pdev->dev; 201 202 err = platform_get_irq(pdev, 0); 203 if (err < 0) { 204 dev_err(&pdev->dev, "no irq ID is specified.\n"); 205 goto ret; 206 } else 207 tscadc->irq = err; 208 209 res = devm_request_mem_region(&pdev->dev, 210 res->start, resource_size(res), pdev->name); 211 if (!res) { 212 dev_err(&pdev->dev, "failed to reserve registers.\n"); 213 return -EBUSY; 214 } 215 216 tscadc->tscadc_base = devm_ioremap(&pdev->dev, 217 res->start, resource_size(res)); 218 if (!tscadc->tscadc_base) { 219 dev_err(&pdev->dev, "failed to map registers.\n"); 220 return -ENOMEM; 221 } 222 223 tscadc->regmap_tscadc = devm_regmap_init_mmio(&pdev->dev, 224 tscadc->tscadc_base, &tscadc_regmap_config); 225 if (IS_ERR(tscadc->regmap_tscadc)) { 226 dev_err(&pdev->dev, "regmap init failed\n"); 227 err = PTR_ERR(tscadc->regmap_tscadc); 228 goto ret; 229 } 230 231 spin_lock_init(&tscadc->reg_lock); 232 init_waitqueue_head(&tscadc->reg_se_wait); 233 234 pm_runtime_enable(&pdev->dev); 235 pm_runtime_get_sync(&pdev->dev); 236 237 /* 238 * The TSC_ADC_Subsystem has 2 clock domains 239 * OCP_CLK and ADC_CLK. 240 * The ADC clock is expected to run at target of 3MHz, 241 * and expected to capture 12-bit data at a rate of 200 KSPS. 242 * The TSC_ADC_SS controller design assumes the OCP clock is 243 * at least 6x faster than the ADC clock. 244 */ 245 clk = clk_get(&pdev->dev, "adc_tsc_fck"); 246 if (IS_ERR(clk)) { 247 dev_err(&pdev->dev, "failed to get TSC fck\n"); 248 err = PTR_ERR(clk); 249 goto err_disable_clk; 250 } 251 clock_rate = clk_get_rate(clk); 252 clk_put(clk); 253 tscadc->clk_div = clock_rate / ADC_CLK; 254 255 /* TSCADC_CLKDIV needs to be configured to the value minus 1 */ 256 tscadc->clk_div--; 257 tscadc_writel(tscadc, REG_CLKDIV, tscadc->clk_div); 258 259 /* Set the control register bits */ 260 ctrl = CNTRLREG_STEPCONFIGWRT | 261 CNTRLREG_STEPID; 262 if (tsc_wires > 0) 263 ctrl |= CNTRLREG_4WIRE | CNTRLREG_TSCENB; 264 tscadc_writel(tscadc, REG_CTRL, ctrl); 265 266 /* Set register bits for Idle Config Mode */ 267 if (tsc_wires > 0) 268 tscadc_idle_config(tscadc); 269 270 /* Enable the TSC module enable bit */ 271 ctrl = tscadc_readl(tscadc, REG_CTRL); 272 ctrl |= CNTRLREG_TSCSSENB; 273 tscadc_writel(tscadc, REG_CTRL, ctrl); 274 275 tscadc->used_cells = 0; 276 tscadc->tsc_cell = -1; 277 tscadc->adc_cell = -1; 278 279 /* TSC Cell */ 280 if (tsc_wires > 0) { 281 tscadc->tsc_cell = tscadc->used_cells; 282 cell = &tscadc->cells[tscadc->used_cells++]; 283 cell->name = "TI-am335x-tsc"; 284 cell->of_compatible = "ti,am3359-tsc"; 285 cell->platform_data = &tscadc; 286 cell->pdata_size = sizeof(tscadc); 287 } 288 289 /* ADC Cell */ 290 if (adc_channels > 0) { 291 tscadc->adc_cell = tscadc->used_cells; 292 cell = &tscadc->cells[tscadc->used_cells++]; 293 cell->name = "TI-am335x-adc"; 294 cell->of_compatible = "ti,am3359-adc"; 295 cell->platform_data = &tscadc; 296 cell->pdata_size = sizeof(tscadc); 297 } 298 299 err = mfd_add_devices(&pdev->dev, pdev->id, tscadc->cells, 300 tscadc->used_cells, NULL, 0, NULL); 301 if (err < 0) 302 goto err_disable_clk; 303 304 device_init_wakeup(&pdev->dev, true); 305 platform_set_drvdata(pdev, tscadc); 306 return 0; 307 308 err_disable_clk: 309 pm_runtime_put_sync(&pdev->dev); 310 pm_runtime_disable(&pdev->dev); 311 ret: 312 return err; 313 } 314 315 static int ti_tscadc_remove(struct platform_device *pdev) 316 { 317 struct ti_tscadc_dev *tscadc = platform_get_drvdata(pdev); 318 319 tscadc_writel(tscadc, REG_SE, 0x00); 320 321 pm_runtime_put_sync(&pdev->dev); 322 pm_runtime_disable(&pdev->dev); 323 324 mfd_remove_devices(tscadc->dev); 325 326 return 0; 327 } 328 329 #ifdef CONFIG_PM 330 static int tscadc_suspend(struct device *dev) 331 { 332 struct ti_tscadc_dev *tscadc_dev = dev_get_drvdata(dev); 333 334 tscadc_writel(tscadc_dev, REG_SE, 0x00); 335 pm_runtime_put_sync(dev); 336 337 return 0; 338 } 339 340 static int tscadc_resume(struct device *dev) 341 { 342 struct ti_tscadc_dev *tscadc_dev = dev_get_drvdata(dev); 343 unsigned int restore, ctrl; 344 345 pm_runtime_get_sync(dev); 346 347 /* context restore */ 348 ctrl = CNTRLREG_STEPCONFIGWRT | CNTRLREG_STEPID; 349 if (tscadc_dev->tsc_cell != -1) 350 ctrl |= CNTRLREG_TSCENB | CNTRLREG_4WIRE; 351 tscadc_writel(tscadc_dev, REG_CTRL, ctrl); 352 353 if (tscadc_dev->tsc_cell != -1) 354 tscadc_idle_config(tscadc_dev); 355 restore = tscadc_readl(tscadc_dev, REG_CTRL); 356 tscadc_writel(tscadc_dev, REG_CTRL, 357 (restore | CNTRLREG_TSCSSENB)); 358 359 tscadc_writel(tscadc_dev, REG_CLKDIV, tscadc_dev->clk_div); 360 361 return 0; 362 } 363 364 static const struct dev_pm_ops tscadc_pm_ops = { 365 .suspend = tscadc_suspend, 366 .resume = tscadc_resume, 367 }; 368 #define TSCADC_PM_OPS (&tscadc_pm_ops) 369 #else 370 #define TSCADC_PM_OPS NULL 371 #endif 372 373 static const struct of_device_id ti_tscadc_dt_ids[] = { 374 { .compatible = "ti,am3359-tscadc", }, 375 { } 376 }; 377 MODULE_DEVICE_TABLE(of, ti_tscadc_dt_ids); 378 379 static struct platform_driver ti_tscadc_driver = { 380 .driver = { 381 .name = "ti_am3359-tscadc", 382 .owner = THIS_MODULE, 383 .pm = TSCADC_PM_OPS, 384 .of_match_table = ti_tscadc_dt_ids, 385 }, 386 .probe = ti_tscadc_probe, 387 .remove = ti_tscadc_remove, 388 389 }; 390 391 module_platform_driver(ti_tscadc_driver); 392 393 MODULE_DESCRIPTION("TI touchscreen / ADC MFD controller driver"); 394 MODULE_AUTHOR("Rachna Patil <rachna@ti.com>"); 395 MODULE_LICENSE("GPL"); 396