1 /* 2 * TI Touch Screen / ADC MFD driver 3 * 4 * Copyright (C) 2012 Texas Instruments Incorporated - http://www.ti.com/ 5 * 6 * This program is free software; you can redistribute it and/or 7 * modify it under the terms of the GNU General Public License as 8 * published by the Free Software Foundation version 2. 9 * 10 * This program is distributed "as is" WITHOUT ANY WARRANTY of any 11 * kind, whether express or implied; without even the implied warranty 12 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 */ 15 16 #include <linux/module.h> 17 #include <linux/init.h> 18 #include <linux/slab.h> 19 #include <linux/err.h> 20 #include <linux/io.h> 21 #include <linux/clk.h> 22 #include <linux/regmap.h> 23 #include <linux/mfd/core.h> 24 #include <linux/pm_runtime.h> 25 #include <linux/of.h> 26 #include <linux/of_device.h> 27 28 #include <linux/mfd/ti_am335x_tscadc.h> 29 30 static unsigned int tscadc_readl(struct ti_tscadc_dev *tsadc, unsigned int reg) 31 { 32 unsigned int val; 33 34 regmap_read(tsadc->regmap_tscadc, reg, &val); 35 return val; 36 } 37 38 static void tscadc_writel(struct ti_tscadc_dev *tsadc, unsigned int reg, 39 unsigned int val) 40 { 41 regmap_write(tsadc->regmap_tscadc, reg, val); 42 } 43 44 static const struct regmap_config tscadc_regmap_config = { 45 .name = "ti_tscadc", 46 .reg_bits = 32, 47 .reg_stride = 4, 48 .val_bits = 32, 49 }; 50 51 void am335x_tsc_se_update(struct ti_tscadc_dev *tsadc) 52 { 53 tscadc_writel(tsadc, REG_SE, tsadc->reg_se_cache); 54 } 55 EXPORT_SYMBOL_GPL(am335x_tsc_se_update); 56 57 void am335x_tsc_se_set(struct ti_tscadc_dev *tsadc, u32 val) 58 { 59 unsigned long flags; 60 61 spin_lock_irqsave(&tsadc->reg_lock, flags); 62 tsadc->reg_se_cache = tscadc_readl(tsadc, REG_SE); 63 tsadc->reg_se_cache |= val; 64 am335x_tsc_se_update(tsadc); 65 spin_unlock_irqrestore(&tsadc->reg_lock, flags); 66 } 67 EXPORT_SYMBOL_GPL(am335x_tsc_se_set); 68 69 void am335x_tsc_se_clr(struct ti_tscadc_dev *tsadc, u32 val) 70 { 71 unsigned long flags; 72 73 spin_lock_irqsave(&tsadc->reg_lock, flags); 74 tsadc->reg_se_cache = tscadc_readl(tsadc, REG_SE); 75 tsadc->reg_se_cache &= ~val; 76 am335x_tsc_se_update(tsadc); 77 spin_unlock_irqrestore(&tsadc->reg_lock, flags); 78 } 79 EXPORT_SYMBOL_GPL(am335x_tsc_se_clr); 80 81 static void tscadc_idle_config(struct ti_tscadc_dev *config) 82 { 83 unsigned int idleconfig; 84 85 idleconfig = STEPCONFIG_YNN | STEPCONFIG_INM_ADCREFM | 86 STEPCONFIG_INP_ADCREFM | STEPCONFIG_YPN; 87 88 tscadc_writel(config, REG_IDLECONFIG, idleconfig); 89 } 90 91 static int ti_tscadc_probe(struct platform_device *pdev) 92 { 93 struct ti_tscadc_dev *tscadc; 94 struct resource *res; 95 struct clk *clk; 96 struct device_node *node = pdev->dev.of_node; 97 struct mfd_cell *cell; 98 struct property *prop; 99 const __be32 *cur; 100 u32 val; 101 int err, ctrl; 102 int clock_rate; 103 int tsc_wires = 0, adc_channels = 0, total_channels; 104 int readouts = 0; 105 106 if (!pdev->dev.of_node) { 107 dev_err(&pdev->dev, "Could not find valid DT data.\n"); 108 return -EINVAL; 109 } 110 111 node = of_get_child_by_name(pdev->dev.of_node, "tsc"); 112 of_property_read_u32(node, "ti,wires", &tsc_wires); 113 of_property_read_u32(node, "ti,coordiante-readouts", &readouts); 114 115 node = of_get_child_by_name(pdev->dev.of_node, "adc"); 116 of_property_for_each_u32(node, "ti,adc-channels", prop, cur, val) { 117 adc_channels++; 118 if (val > 7) { 119 dev_err(&pdev->dev, " PIN numbers are 0..7 (not %d)\n", 120 val); 121 return -EINVAL; 122 } 123 } 124 total_channels = tsc_wires + adc_channels; 125 if (total_channels > 8) { 126 dev_err(&pdev->dev, "Number of i/p channels more than 8\n"); 127 return -EINVAL; 128 } 129 if (total_channels == 0) { 130 dev_err(&pdev->dev, "Need atleast one channel.\n"); 131 return -EINVAL; 132 } 133 134 if (readouts * 2 + 2 + adc_channels > 16) { 135 dev_err(&pdev->dev, "Too many step configurations requested\n"); 136 return -EINVAL; 137 } 138 139 res = platform_get_resource(pdev, IORESOURCE_MEM, 0); 140 if (!res) { 141 dev_err(&pdev->dev, "no memory resource defined.\n"); 142 return -EINVAL; 143 } 144 145 /* Allocate memory for device */ 146 tscadc = devm_kzalloc(&pdev->dev, 147 sizeof(struct ti_tscadc_dev), GFP_KERNEL); 148 if (!tscadc) { 149 dev_err(&pdev->dev, "failed to allocate memory.\n"); 150 return -ENOMEM; 151 } 152 tscadc->dev = &pdev->dev; 153 154 err = platform_get_irq(pdev, 0); 155 if (err < 0) { 156 dev_err(&pdev->dev, "no irq ID is specified.\n"); 157 goto ret; 158 } else 159 tscadc->irq = err; 160 161 res = devm_request_mem_region(&pdev->dev, 162 res->start, resource_size(res), pdev->name); 163 if (!res) { 164 dev_err(&pdev->dev, "failed to reserve registers.\n"); 165 return -EBUSY; 166 } 167 168 tscadc->tscadc_base = devm_ioremap(&pdev->dev, 169 res->start, resource_size(res)); 170 if (!tscadc->tscadc_base) { 171 dev_err(&pdev->dev, "failed to map registers.\n"); 172 return -ENOMEM; 173 } 174 175 tscadc->regmap_tscadc = devm_regmap_init_mmio(&pdev->dev, 176 tscadc->tscadc_base, &tscadc_regmap_config); 177 if (IS_ERR(tscadc->regmap_tscadc)) { 178 dev_err(&pdev->dev, "regmap init failed\n"); 179 err = PTR_ERR(tscadc->regmap_tscadc); 180 goto ret; 181 } 182 183 spin_lock_init(&tscadc->reg_lock); 184 pm_runtime_enable(&pdev->dev); 185 pm_runtime_get_sync(&pdev->dev); 186 187 /* 188 * The TSC_ADC_Subsystem has 2 clock domains 189 * OCP_CLK and ADC_CLK. 190 * The ADC clock is expected to run at target of 3MHz, 191 * and expected to capture 12-bit data at a rate of 200 KSPS. 192 * The TSC_ADC_SS controller design assumes the OCP clock is 193 * at least 6x faster than the ADC clock. 194 */ 195 clk = clk_get(&pdev->dev, "adc_tsc_fck"); 196 if (IS_ERR(clk)) { 197 dev_err(&pdev->dev, "failed to get TSC fck\n"); 198 err = PTR_ERR(clk); 199 goto err_disable_clk; 200 } 201 clock_rate = clk_get_rate(clk); 202 clk_put(clk); 203 tscadc->clk_div = clock_rate / ADC_CLK; 204 205 /* TSCADC_CLKDIV needs to be configured to the value minus 1 */ 206 tscadc->clk_div--; 207 tscadc_writel(tscadc, REG_CLKDIV, tscadc->clk_div); 208 209 /* Set the control register bits */ 210 ctrl = CNTRLREG_STEPCONFIGWRT | 211 CNTRLREG_STEPID; 212 if (tsc_wires > 0) 213 ctrl |= CNTRLREG_4WIRE | CNTRLREG_TSCENB; 214 tscadc_writel(tscadc, REG_CTRL, ctrl); 215 216 /* Set register bits for Idle Config Mode */ 217 if (tsc_wires > 0) 218 tscadc_idle_config(tscadc); 219 220 /* Enable the TSC module enable bit */ 221 ctrl = tscadc_readl(tscadc, REG_CTRL); 222 ctrl |= CNTRLREG_TSCSSENB; 223 tscadc_writel(tscadc, REG_CTRL, ctrl); 224 225 tscadc->used_cells = 0; 226 tscadc->tsc_cell = -1; 227 tscadc->adc_cell = -1; 228 229 /* TSC Cell */ 230 if (tsc_wires > 0) { 231 tscadc->tsc_cell = tscadc->used_cells; 232 cell = &tscadc->cells[tscadc->used_cells++]; 233 cell->name = "TI-am335x-tsc"; 234 cell->of_compatible = "ti,am3359-tsc"; 235 cell->platform_data = &tscadc; 236 cell->pdata_size = sizeof(tscadc); 237 } 238 239 /* ADC Cell */ 240 if (adc_channels > 0) { 241 tscadc->adc_cell = tscadc->used_cells; 242 cell = &tscadc->cells[tscadc->used_cells++]; 243 cell->name = "TI-am335x-adc"; 244 cell->of_compatible = "ti,am3359-adc"; 245 cell->platform_data = &tscadc; 246 cell->pdata_size = sizeof(tscadc); 247 } 248 249 err = mfd_add_devices(&pdev->dev, pdev->id, tscadc->cells, 250 tscadc->used_cells, NULL, 0, NULL); 251 if (err < 0) 252 goto err_disable_clk; 253 254 device_init_wakeup(&pdev->dev, true); 255 platform_set_drvdata(pdev, tscadc); 256 return 0; 257 258 err_disable_clk: 259 pm_runtime_put_sync(&pdev->dev); 260 pm_runtime_disable(&pdev->dev); 261 ret: 262 return err; 263 } 264 265 static int ti_tscadc_remove(struct platform_device *pdev) 266 { 267 struct ti_tscadc_dev *tscadc = platform_get_drvdata(pdev); 268 269 tscadc_writel(tscadc, REG_SE, 0x00); 270 271 pm_runtime_put_sync(&pdev->dev); 272 pm_runtime_disable(&pdev->dev); 273 274 mfd_remove_devices(tscadc->dev); 275 276 return 0; 277 } 278 279 #ifdef CONFIG_PM 280 static int tscadc_suspend(struct device *dev) 281 { 282 struct ti_tscadc_dev *tscadc_dev = dev_get_drvdata(dev); 283 284 tscadc_writel(tscadc_dev, REG_SE, 0x00); 285 pm_runtime_put_sync(dev); 286 287 return 0; 288 } 289 290 static int tscadc_resume(struct device *dev) 291 { 292 struct ti_tscadc_dev *tscadc_dev = dev_get_drvdata(dev); 293 unsigned int restore, ctrl; 294 295 pm_runtime_get_sync(dev); 296 297 /* context restore */ 298 ctrl = CNTRLREG_STEPCONFIGWRT | CNTRLREG_STEPID; 299 if (tscadc_dev->tsc_cell != -1) 300 ctrl |= CNTRLREG_TSCENB | CNTRLREG_4WIRE; 301 tscadc_writel(tscadc_dev, REG_CTRL, ctrl); 302 303 if (tscadc_dev->tsc_cell != -1) 304 tscadc_idle_config(tscadc_dev); 305 am335x_tsc_se_update(tscadc_dev); 306 restore = tscadc_readl(tscadc_dev, REG_CTRL); 307 tscadc_writel(tscadc_dev, REG_CTRL, 308 (restore | CNTRLREG_TSCSSENB)); 309 310 tscadc_writel(tscadc_dev, REG_CLKDIV, tscadc_dev->clk_div); 311 312 return 0; 313 } 314 315 static const struct dev_pm_ops tscadc_pm_ops = { 316 .suspend = tscadc_suspend, 317 .resume = tscadc_resume, 318 }; 319 #define TSCADC_PM_OPS (&tscadc_pm_ops) 320 #else 321 #define TSCADC_PM_OPS NULL 322 #endif 323 324 static const struct of_device_id ti_tscadc_dt_ids[] = { 325 { .compatible = "ti,am3359-tscadc", }, 326 { } 327 }; 328 MODULE_DEVICE_TABLE(of, ti_tscadc_dt_ids); 329 330 static struct platform_driver ti_tscadc_driver = { 331 .driver = { 332 .name = "ti_am3359-tscadc", 333 .owner = THIS_MODULE, 334 .pm = TSCADC_PM_OPS, 335 .of_match_table = ti_tscadc_dt_ids, 336 }, 337 .probe = ti_tscadc_probe, 338 .remove = ti_tscadc_remove, 339 340 }; 341 342 module_platform_driver(ti_tscadc_driver); 343 344 MODULE_DESCRIPTION("TI touchscreen / ADC MFD controller driver"); 345 MODULE_AUTHOR("Rachna Patil <rachna@ti.com>"); 346 MODULE_LICENSE("GPL"); 347